Open navigation menu
Close suggestions
Search
Search
en
Change Language
Upload
Sign in
Sign in
Download free for days
0 ratings
0% found this document useful (0 votes)
51 views
26 pages
Instructions Set
Uploaded by
tony stark
AI-enhanced title
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content,
claim it here
.
Available Formats
Download as PDF or read online on Scribd
Download
Save
Save instructions set For Later
Share
0%
0% found this document useful, undefined
0%
, undefined
Print
Embed
Report
0 ratings
0% found this document useful (0 votes)
51 views
26 pages
Instructions Set
Uploaded by
tony stark
AI-enhanced title
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content,
claim it here
.
Available Formats
Download as PDF or read online on Scribd
Carousel Previous
Carousel Next
Download
Save
Save instructions set For Later
Share
0%
0% found this document useful, undefined
0%
, undefined
Print
Embed
Report
Download
Save instructions set For Later
You are on page 1
/ 26
Search
Fullscreen
ficroprocessor and Microcontrg), 3, Bit Manipulation Instructions Logical instructions Vi Shift instructions . Rotate instructions poe 4. String Instructions | 5, Program execution trans! Unconditional instructions Conditional instructions Iteration Control instructions fer Instructions Interrupt instructions High level language inter 6. Processor Control Instructions «Flag set/ clear instructions «External hardware synchronization instructions Nooperation instructions 30188 only) . face instructions (80186/ ATA TRANSFER INSTRUCTIONS: 4.1 D instructions which perform data transfer in this group we have a large number of i a following types: ‘Move contents of a re; data register or memory location Data transfer between a segment register and a register or gister, or contents of a memory location, or i immedial? a memom location Push and Pop instructions, Exchange instructions Data ug with 1/O ports and Translate the value in AL. ° . 4.4.1 General - purpose Data Transfer Instructions: 1.MOV_ : Copy a byt py a byte or word from specified source to specified destinatio® | Syntax MOV destination, source The destination can be regi; register, a mem register or a memory locati can ory location or an immediat ion. The source © jate number, é Be |Set of 8086 uv psrtion ‘The source and destination in a MOV instruction must be same type and the ° source and destination in an instruction cannot both be memory locations. This instruction does not affect any flags. Example: MOV AX, BX : Copies contents of register BX to AX MOV DL, [BX] ; Copies ‘byte’ from memory address stored in BX to DL MOV CX, 0374H_: Puts the immediate number 0374 in CX MOV BL, [437AH] : Copies byte from ‘offset 437AH in DS’ to BL . 2.PUSH : Copy a specified word to the top of Stack temporarily with Last in First out (LIFO) logic. Syntax : PUSH source The PUSH instruction decrements the Stack Pointer (SP) by two and copies aword from some source to location in the stack segment. © The source can be general-purpose register, a segment register, or memory. But it must be word transfer not a byte. Example: PUSH BX : Decrements SP by 2, copy BX to Stack PUSH DS : Decrements SP by 2, copy DS to Stack. 3 POP: Copy a word from top of the Stack to specified location. . Syntax POP destination * The destination can be a general — purpose register, a segment register, or a memory location. * After the word is copied to the specified designation, the Stack pointer is automatically incremented by two. * No flags are affected by PUSH or POP Example: . POP BX : Increments SP by 2 and copies a word from top of Stack to BXMicroprocessor and Microc Onto ines nel ly PoP Ds i Increments SP by 2 and copies a word from Stack to DS ma PUSH A, POP A ; Copy all registers to Stack (Available only in, 801%) ol | i 80188) Exchange a byte or word i.e. exchanges the contents of a Fepiy, with the contents of another register or the contents of repister wi 4. XCHG ; the content of memory location, Syntax : XCHG destination, source Exchange of contents of memory location directly cannot acceptable * No flags are affected by this instruction Example: XCHG AX, DX : Exchange word in AX with word in DX 5.XLAT : (Translate) This instruction can be used to convert any code of 8b: or less to any other code of 8-bits or less. The XLATB instruction is used to translate a byte from one code to another This instruction replaces a byte in the AL register with a byte pointed to BY lookup table in memory, Example: + 8086 routine to convert ASCI code byte into EBCDIC equivalent + ASCII code byte is in AL to stat | & EBCDIC code in AL at end MOV BX, OFFSET EBCDIC TABLE + point BX at start of EBCDIC tate F inDS XLATB + Replace ASCH in AL we EBCDIC 4.4.2 Input and Output Port Transfer Instructions: ‘The following instructions are described in this section,partion Oe — Move data to Accumulator from an input port using and Variable port addressing Move data from Accumulator to an output port using and Variable port addressing {IN + Copy a byte or word from specified port address to accumulator. © Fixed port addressing Fixed port addressing ator, port address e [fan 8-bit port is read, the data will go to AL. « Ifa 16-bit port is read, the data will go to AX Example: INAL, OC8H : Input a byte from port 0C8H to AL. IN AX, 34H__: Input a word from port 34H to AX. 2.0UT : Copy a byte or word from accumulator to specified port address. Syntax : OUT _ port address, accumulator For the fixed port, the 8-bit port address is specified directly in the instruction. For the variable port of the OUT instruction, the content of AL or AX will be copied to the port at an address contained in DX. Example: OQUT3BH, AL : Copy the contents of AL to port 3BH. OUT DX, AL: Copy the content of AL to port FFFF8H, | 44.3 Special Address Transfer Instructions: The following instructions are explained in this section * Load effective address of a memory location into a register © Load DS and another register with contents of 2 memory words © Load ES and another register with contents of 2 memory words LEA : Load effective address of the operand into specified register. Syaix LEA register, source __* This instruction determines the offset of the variable or memory locationeroprocessor and Micro, 0 On| ee Molly named as the source and puts this offset in the indicated 16-bit registe, © No flags are affected by this instruction Example: LEA BX, PRICES ; Load BX with the offset of prices in Data Sepp, i (DS). 2.LDS — : Load DS register and other specified register from memory GAIN ee ree Syntax ; LDS register, (Mem, Address of 1" word) [SPS nce a eeeameud Re a ok This instruction copies a word from two memory locations into the registe specified in the instruction. It then copies a word from the next two memory locations into the DS register. : It is useful for pointing SI and DS at the start of a string before using one of the string instruction and no flags are affected by this nstruction, 3.LES — : Load Extra segment (ES) register and other specified register from memory. Syntax : LES register, (Mem. Address of 1 word) ‘This instruction loads new values into the specified register and into the ES register from four successive locations. The word from the first two memory locations is copied into the speci! register and the word from the next two memory locations is copied into ES register. LES can be used to point DI and ES at the start of a string before a strié instruction is executed, LES affects no flags LES[789Ayj] + Contents of memory at displacements. 789A and 78° in DS copied to BX. Contents of memory displacemen"® 789Cy, and 789D,, in DS copied to ES register. 41.4 String Transfer Instructions: In this section, the following instructions are explained. Load AH with LS byte of Flags register Store AH in LS byte of Flags registerSet of 8086, ; 44 jc — _— _—_—__— LLABE + Copy low byte of flag register to AH. “| The lower byte of the 8086 flag register is the same as the flag byte for the 085. LAHF copies these 8085 equivalent flags to the AH register. They can then be pushed on the stack along with AL by a PUSH AX . instruction. « An LAHF-instruction followed by a PUSH AX instruction has the same effect as the 8085 PUSH PSW instruction. « LAHF changes no flags. .SAHF : Copy AH register to lower byte of flag register. « SAHF replaces the 8085 equivalent flag byte with a byte from the AH register. ¢ SAHF is used with the POP AX instruction to simulate the 8085 POP PSW instruction. « SAHF changes the flags in the lower byte of the flag register. 4.2 ARITHMETIC INSTRUCTIONS: 8086 has very powerful instructions in the Arithmetic group compared to 8085 microprocessor. It can perform addition, subtraction, multiplication, and division on 8 or6 bit quantities which can be unsigned or signed numbers. 421 Addition Instructions: Inthis group, we have instructions to * Add contents of two registers, with or without carry * Add contents of a register and a memory location, with or without carry * Add immediate data to a register or a memory location, with or without carry * Increment contents of a register or a memory location To perform decimal adjust after addition To perform ASCII adjustment after addition LADD: Add specified byte to byte or specified word to word Syntax : ADD destination, source Source and destination cannot both be memory locations.Microprocessor and Microcony — Olle, 48 Source and destination must be of the same type. * Flags affected are AF, CF, OF, PF, SF, and ZF. Example: ADD AL, 74H : Add immediate number 74H to the content of AL ADD DX, [SI] ; Add word from memory at offset [SI] in DS 10 y, content of DX 2. ADC; Add with Cary insiniction, ADC also adds the status of the cary flag into the result. Syntax : ADC — destination, source © The source as well as the destination may be an immediate number, : register, or a memory location. « Flags affected are AF, CF, OF, PF, SF, and ZF. Example: ADC CL, BL : Add contents of BL plus carry status to contents of CL Result in CL. 3.INC __: Increment specified byte or specified word by one. Syntax : INC destination The INC instruction adds 1 to a specified register or to a memory location AF, OF, PF, SF, and ZF are affected by this instruction. © Carry flag is not affected. Example: INC BL 4. AAA: ASCII adjust after addition. Syntax : sik «Ju he ion is used to make sure the result is the correct unpack BCD. «The AAA instruction works only on the AL register, og 7 AF and CF, but OF, PF, SF & ZF are left undefines- aaastruction Set of 8086 49 5,DAA : Decimal Adjust AL after BCD addition Syntax : DAA « This Instruction is used to make sure the result of adding two packed BCD numbers is adjusted to be a legal BCD number. «The result of the addition must be in AL for DAA to work. This instruction updates AF, CF, PF, and ZF. ¢ OF is undefined after a DAA instruction. Example: > AL=0101 1001=59BCD ; BL=0011 0101=35BCD ADD AL, BL ; AL=1000 1110=8EH DAA 3 add 0110 because 1110>9 ; AL=1001 0100=94BCD. 42.2 Subtraction Instructions: Inthis group, we have instructions to * Subtract contents of two registers, with or without borrow * Subtract contents of a register and a memory location, with or without borrow * Subtract immediate data to a register or a memory location, with or without borrow * Decrement contents of a register or a memory location * To perform decimal adjust after subtraction * To perform ASCII adjustment after subtraction LSUB — ; Subtract a byte from byte, or a word from word, Syntai SUB * All conditions in ADD instruction are applicable. * For subtraction, the carry (CF) functions as a borrow flag. The carry flag will set after a subtraction if the number in the specified source is larger than the number in the specified destination.Microprocessor and Micro, COntrgy Example: SUB CX, BX + Subtract contents of BX from contents of Cx , alg result in CX. SUB AX, 4357H_ ; Subtract immediate number 4357H from AX 2. SBB : Subtract with borrow. ety ay pes id ste Lal AS ie te Syntax: SBB destination, source * Subtracts the contents of the source and the contents of CF of the indicateg destination. 3.DEC — : Decrement destination register or memory oo Syntax : DEC destination * This instruction subtracts 1 from the destination word or byte. The destination can be a register or a memory location. © The AF, OF, PF, SF, and ZF are updated, but the CF is not affected. Example: DEC CL; Subtract one from contents of CL register DEC BP ; Subtract one from contents of BP register 4.NEG — : Form 2’s complement Syntax. NEG — destination a ‘This instruction replaces the number in a destination with the complement of that number. ‘This instruction useful for changing the sign of'a signed word or byte. ‘The destination can be a register or memory location ‘The NEG updates the AF, CF, SP, PP, ZP, and OF. Example: NEG AL ; Replace the number in AL with its 2's complement. NEG BX; Replace word in BX with its 2°s complement. - —_ |Instruction Set of 8086 5.CMP = Compare 1 : sei 0 5 Result of Subtraction is zero 0 3 No borrow required, so CF =0 5 borrow required, so CF = 1 Example: CMP AL,O1H ; Compare immediate number 01H with byte in AL CMP BH, CL; Compare byte in CL with byte in BH 6. AAS — : ASCII adjust after subtraction Syntax : AAS © The AAS leaves the correct unpacked BCD result in the low nibble of AL and resets the upper nibble of AL to all 0’s. © The AAS only works on AL register. The AAS correctly updates the AF, and CF, but the OF, PF, SF, and ZF are left undefined. Example: ; AL=0011 1001(ASCII9) + BL=0011 0101 (ASCII5) + SUB AL, BL : (9-5) AL =0000 0100=BCD 04, CF=0 AAS ;AL=0000 0 10.0 = BCD 04, CF = 0, no borrow required Bare 1. gts eran ace4.12 i DE MRE ce 7.DAS — : Decimal adjust after subtraction See ee eee aia aeaene ¢ This instruction used a! Syntax : Coen i usec Spansion fter subtracting two packed BCD numbers 4, , the result in correct packed BCD. * DAS works only on AL and if the lower n result greater than 9 then the DA‘ AL. DAS Microprocessor and Micy ibble in AL after a sy, Dt acy § will subtract 6 from the lower nippy © If the result in upper nibble is greater than 9, the DAS instruction , subtract,60 from AL. e The DAS instruction update: undefined after DAS. Example: SUB AL, BH ; DAS s the AF, CF, SF, PF, and ZF. The oF ; AL=1000 0110=86BCD ; BH=0101 0111=57BCD AL=0010 1111=2FH, CF=0 + Subtract 0.0.0.0 01 1 0 (06H) because 1111 in low nibble ; AL=0010 1001=29BCD 4.2.3 Multiplication Instructions: 8086 provides instructions to perform multiplication of two unsigned numbers The numbers we are multiplying can be of word size or byte 1. MUL: Multiply unsigned byte or words Syntax : MUL source » This instruction multiplies an unsigned byte from some source ti! afl unsigned byte in AL register, or an unsigned word from some soute® ots unsigned word in the AX register. «When a byte is multiplies by the contents of AL, the result (produc! The MSB byte of the result is put in AH and the LSB byte of the result put in AL. As alset of 8086 4.13 osrution . When a word is multiplied by the contents of AX, the MSB byte of the result is put in DX and the LSB byte of the result is put in AX. The source can be a register or a memory location « The AF, PF, SF, and ZF are undefined after a MUL instruction. Example: MUL BH ; AL times BH, result in AX MUL CX ; AX times CX, result high word in DX, low word in AX 2. IMUL : Integer (signed) Multiply Immediate Syntax : IMUL destination, source, immediate byte/word e This instruction is for 80186/80188 only « Multiply an immediate byte or word by byte or word in a specified register and put the result in a general purpose register Example: IMUL CX, BX, 07H ; multiply contents of BX times 07H and put lower 16 bits of results in CX 3.AAM_ : BCD adjusts after multiply Syntax : AAM * Before we can multiply two ASCII digits, we must first mask the upper 4 bits of each. This leaves unpacked BCD (one BCD digit per byte) in each byte. * AAM only works after the multiplication of two unpacked BCD digits and the AAM instruction is used to adjust the product to two unpacked BCD digits in AX. _ * AAM only works on an operand in AL. The PF, SF, and ZF are updated Example: ; AL = 00000101 = unpacked BCD 5 ; BH = 00001001 = unpacked BCD 9 MUL BH ; AL*BH result in AX ; AX = 00000000 00101101 =.002DHMicroprocessor and Micro, cessor and Microcon, — tral 44 fe pAX= 00000100 00000101 AAM ; which is unpacked BCD fo: 45. 4.2.4 Division Instructions: 8086 provides instructions to perform signed numbers. It is integer division only, fhe divisor (the denominator) can 2 and a remainder of 1. TI a size. The dividend (numerator) is always double the size of the divisor. Syntax division of two unsigned numbers g, ‘That is, 9 divided by 4 gives a quotiey be of word size ory. This instruction is used to divide an unsigned word by a byte, or to divides unsigned double word (32 bits) by a word. © When dividing a word by a byte, the word mu: division AL will contain an 8-bit result (Quotient) and AH will contin 8-bit remainder. © When a double word is divided by quotient), and DX will contain a 16-bit remainder. st be in the AX. Afier th a word, the AX will contain the 16-i result ( Example: DIV CX ; double word in DX and AX/word in CX + Quotient in AX, remainder in DX ; AX =37D7H = 14295 decimal, BH = 97H = 151 decimal DIV BH ; AX/BH + Quotient in AL = SEH = 94 decimal, Remainder in ; AH = 65H = 101 decimal ; Quotient in AL = SEH = 94 decimal, Remainder in ; AH = 65H = 101 decimal 2, IIV + Divide by signed byte or word Byihee IDIV source ‘This instruction is used to divide a si, ‘ aot ‘i igned xd byte divide a signed double word (32 bits) by a aah a mame ae| snc Set Of SOS 4 When dividing a signed word by a signed byte, the word must be in the AX ree. oe asten can be inan 8-bit register or a memory location. After the division, AL ee contain the signed result (quotient) and AH will contain the signed remainder. The sign of the remainder will be same as the sign of 4.15 the dividend. Example: IDIV BL ; signed word in AX / signed byte in BL ; AX = 00000011 10101011 =03ABH = 939 decimal ; BL=11=1=11=D3H= —2DH = —45 decimal IDIV BL ; Quotient in AL = 111011001, AH = ECH = —14H = -20 decimal ; Remainder in AH = 3.4AD : BCDto Binary convert before Division AAD 0100111, AH = 27H = +39 decimal | Syntax AAD converts two unpacked BCD digits in AH and AL to the equivalent binary number in AL. «This adjustment must in AX by an unpacket unpacked BCD quotient Example: : ; AX = 0607 unpacked BCD for 67 decimal, CH = 09H AAD ; Adjust to binary bel ; Result AX = 0043 = 4,CBW ; Convert signed byte to signed Syntax = cBwW viding the two unpacked BCD digits fier division, AL will contain the remainder. be made before di d BCD byte. A! and all will contain the unpacked BCD | | | | | | fore division 43H=67 decimal word. AH is copies the sign of @ byte in AL to all the bits in AH. on extension of AL. done before si IDIV instruction. “This instruction ened byte in AL can be divided LOS AO eee aMicroprocessor and Microcon $$ Nitro, Jal As Example: ; AX = 00000000 10011011 = = 155 decimal CBW. ; Converts signed byte in AL to signed word in AX. ; Result in AX = 111111111001 1011 = -155 decimal 5. CBW: Convert signed word to Signed Doubleword Syntax: cBW © It copies the sign bit of a word in AX to all the bits of DX registers. Example: ; DX = 00000000 00000000 ; AX = 11110000 11000111 = —3897 decimal . converts signed word in AX to signed double word in DX:AX ; Result DX = 11111111 11111111 AX = 11110000 11000111 = -3897 decimal 4.3 BIT MANIPULATION INSTRUCTIONS: 4.3.1 Logical instructions: 1.NOT _ : Invert each bit of operand. Syntax : NOT destination The NOT instruction inverts each bit of the byte or word at the specified destination. e The destination can be a register or a memory location. ¢ Not instruction affects no flags. Example: NOT BX ; complement contents of BX register 2. AND: AND corresponding bits of two operands. ‘Syntax: * AND destination, source «This instruction ANDs each bit in a so ; sat ne murce by ith the number bit in a destination byte or word, ao ee aes deayn a astruction Set of 8086 4.17 e The result is put in the specified de: Stination. The contents of the specified source will not be changed, The re Sult for each bit position will follow the truth table for a two input and gate. Example: AND BH, CL ; AND byte in CL with byte in BH, result in BH 3.0R — : Logically OR Corresponding. bits of two operands. Syntax ; OR destination, source « This instruction OR's each bit in a source byte or word with the corresponding bit in a destination byte or word. « The result is put in the specifi source will not be changed. Th: for a two input OR gate. Example: ied destination. The contents of the specified e result for each bit will follow the truth table OR AH, CL ; CL ORed with AH, result in AH and CL not t changed. 4.XOR + Exclusive OR corresponding bits of two operands Syntax : XOR destination, source This instruction Exclusive ORs each bit in a source byte or word with the same number bit in a destination byte or word. The result replaces the content of the specified destination, The content of the specified source will not be changed. Example: XOR CL, BH ,; byte ina BH XORed with byte in CL. Result in CL ; BH is not changed. S.TEST : AND operands to update flags Syntax TEST destination, source This instruction ANDs the content of the source byte or word with the Contents specified destination word. Flags are updated, but neither operand is changed, The test instruction often Uses set flags before a conditional jump instruction.418 Microprocessor and Microcony : 3 lcroconry, Example: TEST AL, BH ; AND BH with AL, no result stored, update PF, sp, 7» 4.3.2. Shift Instructions: In this group, we have instructions to © Shift Left the contents ofa register or memory location. © Shift Right the contents of a register or memory location ¢ Arithmetic Shift Right the contents of a register or memory location, 1. SAL/SHL: Shift operand bits left, put zero in LSB(s) Syntax SAL/SHL destination, count © SAL and SHL are two mnemonics for the same instruction. This instruction shift each bit in the specified destination some number of bit positions to the left. * Asa bit is shifted out of the LSB position, a 0 is put in the LSB position, The MSB will be shifted into the CF. ¢ In the case of multiple bit shifts, CF will contain the bit most recently shifted in from the MSB. Bits shifted into CF previously will be lost. CF +— MsB+————_1 sp «9 Example: 3 CF=0, BX=11100101 11010011 SAL BX, 1; Shift BX register contents one bit left ; CF=1,BX= 11001011 10100110 ; OF =0, PF=2,SF=1,7F=0 2.SHR — + Shift operand bits right, put zero in MSB(s), Syntax : SHR destination, count ¢ This instruction shifts each bit in the specified destination some numbet bit positions to the right, As w bit is shifted SSMOOUE OS the MSBinsichs a0. is put in the M5* position. The LSB will be shifted into the Cp. :419 sq the case of multiple bit shifts, CF will contain the bit most recently in from the LSB, Bits shifted into CF previously will be lost. ¢——> MSB——___—____ +188 —+ CF ‘ ; CF = 0,51 10010011 10101101 RSI, 1 ; Shift contents of SI register right one bit position ; CF = 1, St 01001001 11010110 ; OF =1,PF=?,SF=1,ZF=0 + Shift operand bi , new MSB = old MSB. ‘Syntax * SAR destination, count nis instruction shifts each bit in the specified destination some number of it positions to the right. abit is shifted out of the MSB position, a copy of old M! ‘The LSB will be shifted into CF. case of multiple bit shifts, CF will contain the bit most recently 4 in from the LSB. Bits shifted into CF previously will be lost. Msp —> MSB ————— LSB —+ CF ISB is put in the ; AL = 00011101 = +29 decimal CF = 0 1; Shift signed byte in AL right to divide by 2. + AL = 00001110 = +14 decimal CF = 1 ; OF <0, PF~0, SF=0,ZF=04.20 Microprocessor and Microey, ocont le * This instruction rotates all of the bits of the specified word into numb : eee fs to bit positions to the right. . © The operation is described as a rotate rather than a shift because the 5 moves out of the LSB is rotated around into the MSB. CE MSB «———-> LSB a | ; CF =0, BX = 00111011 01110101 ROR BX, 1 ; Rotate all bits of BX one bit position right ; CF=1,BX= 10011101 10111010 2.ROL _ : Rotate all bits of operand left, MSB to LSB Example: Syntax : ROL destination, count e This instruction rotates all of the bits of the specified word into number of bit positions to the left. e The operation can be thought of as circular, because the data bit rotated ou of the MSB is circled back into the LSB. CF MSB «——_— LSB ieee | ; CF =0,BH = 10101110 ROL BH, I ; Rotate all bits of BH one bit position left ; CF=1, BH=01011101, OF =1 3. RCR__ : Rotate operand around to the right through Carry Flag Example: ‘Syntax : RCR destination, count This instruction rotates all of the bits of the specified word ot byte so" number of bit positions to the right. © The operation is circular because the LSB of the operand is rotated int S carry flag and the bit in the carry flag is rotated into the carry flag and the © in the carry flag is rotated around into the MSB of the operand. ve E 43 CF=1, BL= 00111000 BL, 1 ; Byte in BL one bit position right, LSB to CF 3 CF=0. BL= 10011100 3 OF = 1 because MSB changed to 1 3 Rotate operand sround to the lef through Camry Flag Syeiax RCL destination, count instruction rotates all of the bits of the specified word or byte some ber of bit positions to the left. ‘operation is circular because the MSB of the operand is rotated into the ry flag and the bit in the carry flag is rotated into the carry flag and the bit n the carry flag is rotated around into the LSB of the operand. i. CF <— Msp LSB ; CF=0, BL= 10110011 BH, 1 ; Byte in BH one bit position left, MSB to CF, CF to LSB ; CF=1,BH=01100110 ; OF =1 because MSB changed to 1 INSTRUCTIONS: —- ‘Powerful instructions in the String manipulation group. It can ‘Comparison, Load, Store, and Scan operations on strings. String ‘series of words in a sequential memory location. is a prefix, which is written before one of the string ructions, It will cause the CX register to be decremented, the ‘instruction to be repeated, until CX = 04.22 Microprocessor and Mi. POC Onay ole Example: REP MOVSR, will continue to copy string byte until the number oy Joucled into CX hay been copied. 2. REPE/REPZ: An instruction prefix, Repeat until CX = 0 or zero flay 7)» i 3. REPNE/REPNZ : An instruction prefix repeat until CX = 0 or ZF | 4. MOVS/MOVSB/MOVSW ; Move string byte or string word * This instruction copies a byte or a word from a location in the data sey, 10 a location in the extra segment, + The offset to the source byte oF word in the data segment must be in the byte,- pruction Set of 8086 4.23 ‘This instruction copies a byte from a string location pointed to by SI to AL, ora word from a string location pointed to by SI to AX. Ifthe direction flag is cleared (0), SI will be automatically incremented to point to the next element of the string. Example: cLD ; Clear direction flag so SI is auto ; Incremented MOV SI, OFFSET SOURCE_STRING ; Point SI at string LODS SOURCE_STRING 8, STOS/STOSB/STOSW : STORE byte or word in string. The STOS instruction copies a byte from AL or word from AX to a memory location in the extra segment pointed to by DI, it replaces a string segment with a byte from AL or a word from AX. After the copy DI is automatically incremented or decremented to point to the next string element in memory. Example: MOV DI, OFFSET TARGET_STRING ; Point DI at destination string STOS TARGET-STRING «Assembler uses the string name to determine whether the string is of type byte or type word. * ‘If byte string, then string byte replaced with contents of AL. If word string, then string word replaced with the contents of AX. Bs PROGRAM EXECUTION TRANSFER INSTRUCTIONS: instructions are used to tell the microprocessor to start fetching instruction new address, rather than continuing in sequence. lly 8086 keeps on executing one instruction after another in a sequence. when a branch group of instruction is encountered by the 8086, 4 jump is can be a forward or a backward jump, if the condition for branching very powerful instructions in the Branch group. It can perform a branely or based on a single flag value, or based on multiple flag values, )424 Microprocessor and Microcony There are instructions to branch to a subroutine, and return from a Subroutine 4.5.1 Unconditional Transfer Instructions: 1. CALL : call a procedure (sub ~ program), save the return address on stay, 2. RET — : Return from sub-program to call main program 3.JMP — : Go to specified address to get next instruction. 4.5.2 Conditional Transfer Instructions: Here, the terms below and above refer to unsigned binary numbers. Above mea larger in magnitude. The terms greater than or lesser than refer to signed bingy numbers. The term Greater than means more positive. 1.JA : Jump if above 2.JAE — : Jump if above or equal 3.JB —: Jump if below 4.JBE— : Jump if below or equal 5. JE/JZ = Jump if equal or if ZF = 1, 6.IC : Jump if CF=1,. 7.5G + Jump if greater. 8.JGE — : Jump if greater than or equal, 9. JL : Jump if lesser. 10.JLE — : Jump if lesser than or equal 11, INC: Jump ifno carry (CF = 0) 12. SNE: Jump ifnot equal (ZF = 0) * 13.JNO_ : Jump ifno OF =0 14, NP: Jump if not parity (PF = 1) 15.5NS + Jump if not sign (SF = 0) 16.JO : JumpifOF=1 17.5P ——: Jump if parity (PF = 1), 18.JS —: Jump if sign (SF = }),f 8086 on St a 3 jteration Control Instructions; 4: g086 provides a very convenient way to implement loops in a program, The loop jnstructions can result in a branch both conditionally and unconditionally without ach Toop ins ame effect using other instructions, ‘These iteration instructions are used to execute a ructions, it requires more code and more execution time to achieve the series of instructions some number of times, 4, LOOP : Loop through a sequence of instructions until CX = 0. «¢ This instruction is used to repeat a series of instructions some number of times « The number of tinies the instruction sequence is to be repeated is loaded in the count register (CX) ¢ Each time the LOOP instruction executes, CX is automatically decrements by one, 2. LOOPE / LOOP: ¢ This instruction is used to repeat a group of instructions some number of Loop while CX # 0 and ZI times until the zero flag becomes 0. « The number of times the instruction sequence is to be repeated is loaded into the count register (CX) and each time the LOOP instruction executes, CX is automatically decrements by one. 3. LOOPNZ / LOOPNE : Loop while CX is not 0 and ZF = 0 * This instruction is used to repeat a group of instructions some number of times until the zero flag becomes 1. 4.JCXZ : Jump if CX register is zero. © This instruction will cause a jump to a label given in the instruction if the | CX register contains all zeros * IfCX does not contain all 0’s, the execution will simply proceed to the next instruction. $54 Interrupt Instructions: When the 8086 is executing a program, it can get interrupted because of one of ‘the following:Microprocessor and Micra, ny “l 426 4) Due to an Interrupt getting aetivated This in called as hardware ‘tery, MINT 2111", This torrupl instruction, Hike ' b) Due to the execution of In a Software interrupt LLINT + Interrupt program execution 086 to interrupt the main program * This instruction causes the from 0008CH, New CS from 0008R} xample; INT 35; New Pp * For 2ANTO + Interrupt on overflow, © Ifthe overflow flag (OF) is set indirect far call to a procedure you write £0 handle the o « this instruction will cause the 8086 to q, verflow condition 3, IRET + Retum from interrupt services procedure to main program 4.6 PROCESSOR CONTROL INSTRUCTIONS: In this chapter, instructions that operate on Fl synchronization, and No operation instruction are discussed. gs, instruction for exten, 4.6.1 Flag Set / Clear Instructions: 1.STC — : Set the Carry Flag to ‘1’. STC does not affect any other flags. 2, CLC — : Clear the Carry flag to ‘0’. No other flags are affected. 3,€MC_ : Complement the Carry flag. 4,STD _ : Set the Direction flag to ‘1’. 5.CLD _ : Clear Direction flag to ‘0’. 6.STI + Set Interrupt flag to ‘1’. 7,CLI + Clear Interrupt flag to ‘0°. 4.6.2. External Hardware Synchronization Instructions: 1. HLT; Halt (do nothing) until interrupt or reset. 2. WAIT. : Wait until signal on the test pin is low. 3. ESC + Escape to external co-processor such as 8087 to 8089. 4. LOCK + An instrucion- prefix, prevents another processor from latchi"# = bus while the adjacent instruction ‘‘No Operation Instruction: yp + Perform no operation, ‘this instruction simply uses up three clock cycles and inerements the Instruction. Pointer to point to the next instruction Itcan also be used to hold a place in a program for instructions that will be ae
You might also like
UNIT-4 8086 Instruction
PDF
No ratings yet
UNIT-4 8086 Instruction
93 pages
8086 Instruction Set: 1. Data Transfer Instructions
PDF
0% (1)
8086 Instruction Set: 1. Data Transfer Instructions
7 pages
Instr Set
PDF
No ratings yet
Instr Set
63 pages
CH 4
PDF
No ratings yet
CH 4
72 pages
Instructions Assembler Directivesppt
PDF
100% (1)
Instructions Assembler Directivesppt
22 pages
MIC-Project 2023-24
PDF
No ratings yet
MIC-Project 2023-24
17 pages
8086 Instruction Set
PDF
No ratings yet
8086 Instruction Set
60 pages
MP Unit 1 Part D
PDF
No ratings yet
MP Unit 1 Part D
183 pages
Chapter 4. Instruction Sets
PDF
No ratings yet
Chapter 4. Instruction Sets
74 pages
Chapter Fourb
PDF
No ratings yet
Chapter Fourb
61 pages
FALLSEM2023-24 CSE2006 ETH VL2023240104104 2023-08-23 Reference-Material-I
PDF
No ratings yet
FALLSEM2023-24 CSE2006 ETH VL2023240104104 2023-08-23 Reference-Material-I
52 pages
2.2 Instruction Set
PDF
No ratings yet
2.2 Instruction Set
17 pages
CH 4 Instructions 2
PDF
No ratings yet
CH 4 Instructions 2
43 pages
Instruction Set 8086slide
PDF
No ratings yet
Instruction Set 8086slide
97 pages
Chapter 4
PDF
No ratings yet
Chapter 4
96 pages
CH-04 8086 Instruction Set B
PDF
No ratings yet
CH-04 8086 Instruction Set B
49 pages
8086 Instruction Set
PDF
No ratings yet
8086 Instruction Set
22 pages
MP MC Unit 2 Material
PDF
No ratings yet
MP MC Unit 2 Material
43 pages
Assembly - Prereading
PDF
No ratings yet
Assembly - Prereading
60 pages
MPMC Unit 2 8086 Instructions
PDF
No ratings yet
MPMC Unit 2 8086 Instructions
29 pages
Unit-2 MPMC
PDF
No ratings yet
Unit-2 MPMC
103 pages
11 Instruction Set of 8086
PDF
0% (1)
11 Instruction Set of 8086
61 pages
Module 2 06012025
PDF
No ratings yet
Module 2 06012025
86 pages
MP 2
PDF
No ratings yet
MP 2
36 pages
Instructions Set 8086
PDF
No ratings yet
Instructions Set 8086
76 pages
Instruction Set 1
PDF
No ratings yet
Instruction Set 1
48 pages
8086 Instruction Set
PDF
No ratings yet
8086 Instruction Set
22 pages
MP Unit2
PDF
No ratings yet
MP Unit2
106 pages
MP MC Unit 2 Material
PDF
No ratings yet
MP MC Unit 2 Material
43 pages
18 Unnamed 26 03 2024
PDF
No ratings yet
18 Unnamed 26 03 2024
52 pages
Samara University College of Engineering and Technology Computer Science
PDF
No ratings yet
Samara University College of Engineering and Technology Computer Science
64 pages
MIC CH 3
PDF
No ratings yet
MIC CH 3
6 pages
Instruction Set 1 Rev.
PDF
No ratings yet
Instruction Set 1 Rev.
54 pages
MP MC Unit 2 Material
PDF
No ratings yet
MP MC Unit 2 Material
43 pages
Instruction Set 8086
PDF
100% (1)
Instruction Set 8086
104 pages
Instruction Set of 8086
PDF
No ratings yet
Instruction Set of 8086
30 pages
Intruction Set & Assembler Directives of 8086
PDF
No ratings yet
Intruction Set & Assembler Directives of 8086
81 pages
FMPMC Unit 2
PDF
No ratings yet
FMPMC Unit 2
44 pages
Chapter 3.1 - Instruction Set
PDF
No ratings yet
Chapter 3.1 - Instruction Set
30 pages
Instruction Set PDF
PDF
No ratings yet
Instruction Set PDF
36 pages
4 Instruction Set 8086 Up
PDF
No ratings yet
4 Instruction Set 8086 Up
60 pages
8086 Assembly Language Programming
PDF
No ratings yet
8086 Assembly Language Programming
38 pages
8086 Instruction Set: Data Transfer Instructions
PDF
No ratings yet
8086 Instruction Set: Data Transfer Instructions
31 pages
Chapter 4 and 5 Microprocessor
PDF
No ratings yet
Chapter 4 and 5 Microprocessor
13 pages
Instruction Set of 8086 Microprocessor
PDF
No ratings yet
Instruction Set of 8086 Microprocessor
95 pages
MP Lecture 2
PDF
No ratings yet
MP Lecture 2
106 pages
Instruction Set
PDF
No ratings yet
Instruction Set
69 pages
MP Lecture 2
PDF
No ratings yet
MP Lecture 2
40 pages
8086 Alp
PDF
No ratings yet
8086 Alp
36 pages
MP Lecture 2
PDF
No ratings yet
MP Lecture 2
56 pages
Microprocessor Based System: Muhammad Syargawi B. Abdullah Photonics Lab, Mimos Berhad For Unikl, Miit Sept 2012
PDF
No ratings yet
Microprocessor Based System: Muhammad Syargawi B. Abdullah Photonics Lab, Mimos Berhad For Unikl, Miit Sept 2012
69 pages
L6 Data Transfer Instructions
PDF
No ratings yet
L6 Data Transfer Instructions
15 pages
Instruction Set
PDF
No ratings yet
Instruction Set
60 pages
2.1 2.2 8086 Addressing Modes and Instruction Set
PDF
No ratings yet
2.1 2.2 8086 Addressing Modes and Instruction Set
55 pages
Unit-2 MPMC
PDF
No ratings yet
Unit-2 MPMC
36 pages
8086 Instructions
PDF
No ratings yet
8086 Instructions
25 pages
Differences Between 8086 and 8088 Microprocessors
PDF
No ratings yet
Differences Between 8086 and 8088 Microprocessors
16 pages