Standard Variable Output LDO Regulators

1A Standard
Variable Output LDO Regulators
BD00C0AWFP,BD00C0AWCP-V5 No.11023EBT03

●Description
The BD00C0AW Series is low-saturation regulators. The output voltage can be arbitrarily configured using the external resistance.
This IC has a built-in over-current protection circuit that prevents the destruction of the IC due to output short circuits and a
thermal shutdown circuit that protects the IC from thermal damage due to overloading.

●Features
1) Output Current: 1A
2) High Output Voltage Precision : ±1%
3) Low saturation with PDMOS output
4) Built-in over-current protection circuit that prevents the destruction of the IC due to output short circuits
5) Built-in thermal shutdown circuit for protecting the IC from thermal damage due to overloading
6) Low ESR Capacitor
7) TO252-5,TO220CP-V5 packaging

●Applications
Audiovisual equipments, FPDs, televisions, personal computers or any other consumer device

●Absolute maximum ratings (Ta=25℃)

Parameter Symbol Ratings Unit

*1
Supply Voltage Vcc -0.3 ~ +35.0 V

Output Control Voltage VCTL -0.3 ~ +35.0 V

*2
Power Dissipation (TO252-5) Pd 1.3 W

Power Dissipation (TO220CP-V5) *3 Pd 1.85 W

Operating Temperature Range Topr -40 ~ +105 ℃

Storage Temperature Range Tstg -55 ~ +150 ℃

Maximum Junction Temperature Tjmax +150 ℃

*1 Not to exceed Pd.
*2 TO252-5:Reduced by 10.4mW / ℃ over Ta = 25℃, when mounted on glass epoxy board: 70mm×70mm×1.6mm.
*3 TO220CP-V5:Reduced by 14.8mW / ℃ over Ta = 25℃, when It’s without Aluminium heat dissipation board.
NOTE : This product is not designed for protection against radioactive rays.

●Operating conditions (Ta=25℃)

Parameter Symbol Min. Max. Unit

Supply Voltage Vcc 4.0 26.5 V

Output Control Voltage VCTL 0 26.5 V

Output Current Io 0 1.0 A

Output Voltage Vo 3.0 15.0 V

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BD00C0AWFP,BD00C0AWCP-V5 Technical Note

●Electrical characteristics
Unless otherwise specified, Ta=25℃, Vcc=10V,VCTL=5V,Io=0mA,Vo=5.0Vsetting
(The resistor of between ADJ and Vo =56.7kΩ,ADJ and GND =10kΩ)

Parameter Symbol Min. Typ. Max. Unit Conditions

Shut Down Current Isd － 0 10 µA VCTL=0V

Bias Current Ib － 0.5 1.0 mA

ADJ Terminal Voltage VADJ 0.742 0.750 0.758 V Io=50mA

Dropout Voltage ΔVd － 0.3 0.5 V Vcc=Vo×0.95, Io=500mA

*1
f=120Hz,ein =1Vrms,
Ripple Rejection R.R. 45 55 － dB
Io=100mA

Line Regulation Reg.I － 20 60 mV Vcc=6→25V

Load Regulation Reg.L － Vo×0.010 Vo×0.015 V Io=5mA→1A

Tcvo.1 － +0.04 － %/℃ Io=5mA,Tj=-40 ~ -20℃

Temperature Coefficient of
Output Voltage
Tcvo.2 － ±0.005 － %/℃ Io=5mA,Tj=-20 ~ +105℃

CTL ON Mode Voltage VthH 2.0 － － V ACTIVE MODE

CTL OFF Mode Voltage VthL － － 0.8 V OFF MODE

CTL Bias Current ICTL － 25 50 µA

*1 ein : Input Voltage Ripple

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BD00C0AWFP,BD00C0AWCP-V5 Technical Note

●Electrical characteristic curves (Reference data)

Unless otherwise specified, Ta=25℃, Vcc=10V,VCTL=5V,Io=0mA,Vo=5.0Vsetting
(The resistor of between ADJ and Vo =56.7kΩ,ADJ and GND =10kΩ)
1.0 18 6
CIRCUIT CURRENT: Ib+IFEEDBACK_R [mA]

15 5

STANBY CURRENT： Isd [µA]

OUTPUT VOLTAGE : Vo [V]

0.8

12 4
0.6
9 3

0.4
6 2

0.2
3 1

0.0 0 0
0 2 4 6 8 10 12 14 16 18 20 22 24 0 2 4 6 8 10 12 14 16 18 20 22 24 0 2 4 6 8 10 12 14 16 18 20 22 24
SUPPLY VOLTAGE: Vcc [V] SUPPLY VOLTAGE: Vcc [V] SUPPLY VOLTAGE: Vcc [V]
Fig.1 Circuit Current Fig.2 Shut Down Current Fig.3 Line Regulation
(IFEEDBACK_R≒75µA) (Io=0mA)
6 6 600

DROPOUT VOLTAGE ： ΔVd [mV]

5 5 500
OUTPUT VOLTAGE ： Vo [V]
OUTPUT VOLTAGE ： Vo [V]

4 4 400

3 3 300

2 2 200

1 1 100

0 0 0
0 2 4 6 8 10 12 14 16 18 20 22 24 0 400 800 1200 1600 2000 0 200 400 600 800 1000
SUPPLY VOLTAGE： Vcc [V] OUTPUT CURRENT： IO[mA] OUTPUT CURRENT： Io [mA]
Fig.4 Line Regulation Fig.5 Load Regulation Fig.6 Dropout Voltage
(Io=500mA) (Vcc=4.75V)
(lo=0mA→1000mA)

1.0 6 1.0
CIRCUIT CURRENT : Ib+ IFEEDBACK_R [mA]

CIRCUIT CURRENT: Ib+IFEEDBACK_R [mA]

5
0.8 0.8
OUTPUT VOLTAGE : Vo [V]

4
0.6 0.6
3

0.4 0.4
2

0.2 0.2
1

0 0.0
0.0
0 200 400 600 800 1000 -40 -20 0 20 40 60 80 100 0 200 400 600 800 1000
OUTPUT CURRENT: Io [mA]
OUTPUT CURRENT: Io [mA] AMBIENT TEMPERATURE: Ta[℃]

Fig.7 Ripple Rejection Fig.8 Output Voltage Fig.9 Circuit Current

(lo=100mA) Temperature Characteristics (lo=0mA→1000 mA)
(IFEEDBACK_R≒75µA)
100 6 6
90
CIRCUIT CURRENT: I CTL [µA]

5 5
80
OUTPUT VOLTAGE: Vo [V]

OUTPUT VOLTAGE ： Vo [V]

70
4 4
60
50 3 3
40
2 2
30
20
1 1
10
0 0 0
0 2 4 6 8 10 12 14 16 18 20 22 24 0 2 4 6 8 10 12 14 16 18 20 22 24 130 140 150 160 170 180 190
CONTROL VOLTAGE: VCTL[V] CONTROL VOLTAGE: VCTL [V] AMBIENT TEMPERATURE： Ta [℃]

Fig.10 CTL Voltage vs CTL Current Fig.11 CTL Voltage vs Output Voltage Fig.12 Thermal Shutdown
Circuit Characteristics

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BD00C0AWFP,BD00C0AWCP-V5 Technical Note

●Measurement circuit for reference data

A Vcc Vo Vcc Vo Vcc Vo

56.7kΩ 56.7kΩ 56.7kΩ

1µF 1µF 1µF 1µF 1µF 1µF
CTL ADJ CTL ADJ CTL ADJ V
GND GND GND

5V 10kΩ A 10kΩ 5V 10kΩ

IFEEDBACK _R

Measurement Circuit of Fig.1 Measurement Circuit of Fig.2 Measurement Circuit of Fig.3

Vcc Vo Vcc Vo Vcc Vo

56.7kΩ 56.7kΩ 56.7kΩ

1µF 1µF 1µF 1µF A 1µF 1µF A
CTL ADJ V CTL ADJ CTL ADJ
GND GND GND
10V 4.75V
500mA
5V 10kΩ 5V 10kΩ 5V 10kΩ

Measurement Circuit of Fig.4 Measurement Circuit of Fig.5 Measurement Circuit of Fig.6

Vcc Vo Vcc Vo Vcc Vo

1Vrms 56.7kΩ 56.7kΩ 56.7kΩ

～ 1µF 1µF 1µF 1µF 1µF 1µF
CTL ADJ CTL ADJ CTL ADJ
GND GND V GND
10V 10V 10kΩ
100mA IFEEDBACK _R
10V 5V 10kΩ 5V 10kΩ 5V
A

Measurement Circuit of Fig.7 Measurement Circuit of Fig.8 Measurement Circuit of Fig.9

Vcc Vo Vcc Vo Vcc Vo

56.7kΩ 56.7kΩ 56.7kΩ

1µF 1µF 1µF 1µF 1µF 1µF
A CTL ADJ CTL ADJ CTL ADJ
GND GND V GND V
10V 10V 10V
10kΩ 10kΩ 10kΩ
5V

Measurement Circuit of Fig.10 Measurement Circuit of Fig.11 Measurement Circuit of Fig.12

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BD00C0AWFP,BD00C0AWCP-V5 Technical Note

●Block diagrams (BD00C0AWFP / BD00C0AWCP-V5)

GND / －
FIN

VREF : Bandgap Reference

OCP : Over Current Protection Circuit
TSD : Thermal Shut Down Circuit

VREF - Driver : Power Transistor Driver

+ Driver

OCP

TSD

1 2 3 4 5
CTL Vcc N.C. / GND Vo ADJ

Fig.13

Pin Name
Pin No. Function
(BD00C0AWFP / BD00C0AWCP-V5)

1 CTL Output Control Pin

2 Vcc Power Supply Pin

3 N.C. / GND N.C. Pin / GND

4 Vo Output Pin

5 ADJ Adjustable Pin

Fin GND / － GND / -

●TOP VIEW〈Package dimension〉

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BD00C0AWFP,BD00C0AWCP-V5 Technical Note

●Input / Output Equivalent Circuit Diagrams

Vcc Pin CTL Pin

200kΩ 1kΩ

Vcc CTL

IC 200kΩ

Vo Pin ADJ Pin

Vcc Vo

15 kΩ
1kΩ

ADJ

Vo

35kΩ

●Output Voltage Configuration Method

Please connect resistors R1 and R2 (which determines the output voltage) as shown in Fig.14.
Please be aware that the offset due to the current that flows from the ADJ terminal becomes large when resistors with large
values are used. The use of resistors with R1=5kΩ to 10kΩ is recommended.

Vo

R2
IC

ADJ≒0.75V
(TYP.) Vo ≒ ADJ × (R1+R2) / R1
ADJ pin

R1

Fig.14

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BD00C0AWFP,BD00C0AWCP-V5 Technical Note

●Thermal Design
TO252-5 TO252-5 TO220CP-V5

5 5 25
Mounted on a Rohm standard board Mounted on a Rohm standard board
Board size : 70 ㎜×70 ㎜×1.6 ㎜ ③ 4.80 Board size : 70 ㎜×70 ㎜×1.6 ㎜
Copper foil area :7 ㎜×7 ㎜ Copper foil area :7 ㎜×7 ㎜ ② 20.0 (Ref erence data)
4 4 20
TO252-5θja=96.2(℃/W)
② 3.50 Aluminum heat
Power dissipation Pd （W)

Power dissipation Pd （W)

Power dissipation Pd （W)

①2-layer board
(back surface copper foil area :15 ㎜×15 ㎜)
dissipation board
②2-layer board θja=6.3℃/W
3 3 (back surface copper foil area :70 ㎜×70 ㎜) 15
(Reference Data)
③4-layer board
(back surface copper foil area :70 ㎜×70 ㎜)

2 2 ① 1.85 ①:θja=67.6℃/W
②:θja=35.7℃/W 10
③:θja=26.0℃/W
1.30 IC Only
θja=67.6℃/W
1 1 5
① 1.85

0 0 0
0 25 50 75 100 125 150 0 25 50 75 100 125 150 0 25 50 75 100 125 150
Temperature atmosphere Ta(℃) Temperature atmosphere Ta(℃) Temperature atmosphere Ta(℃)
Fig.15 Fig.16(Reference data) Fig.17

When using at temperatures over Ta=25℃, please refer to the heat reducing characteristics shown in Fig.15 and Fig.16.
The IC characteristics are closely related to the temperature at which the IC is used, so it is necessary to operate the IC at
temperatures less than the maximum junction temperature Tjmax.

Fig.15 and Fig.16 shows the acceptable loss and heat reducing characteristics of the TO252-5 package. Even when the
ambient temperature Ta is a normal temperature (25℃), the chip (junction) temperature Tj may be quite high so please
operate the IC at temperatures less than the acceptable loss Pd.

The calculation method for power consumption Pc(W) is as follows :(Fig.16③ and Fig.17)
Pc=(Vcc-Vo)×Io+Vcc×Ib
Acceptable loss Pd≧Pc Vcc: Input voltage
Vo: Output voltage
Solving this for load current Io in order to operate within the acceptable loss, Io: Load current
Pd－Vcc×Ib Ib: Circuit current
Io≦ (Please refer to Fig.9 for Ib.) Ishort: Short current
Vcc－Vo

It is then possible to find the maximum load current IoMax with respect to the applied voltage Vcc at the time of thermal
design.

Calculation Example) When TO252-5,Ta=85℃,Vcc=10V,Vo=5V

2.496－10×Ib
Io≦ Fig.16③:θja=26.0℃/W → -38.4mW/℃
5
25℃=4.80W → 85℃=2.496W
Io≦498.2mA (Ib:0.5mA)
Calculation Example) When TO220CP-V5,Ta=85℃,Vcc=25V,Vo=5V

10.4－25×Ib
Io≦
20 Fig.17(Aluminium heat dissipation board)θja=6.3℃/W → -160mW/℃
25℃=20W → 85℃=10.4W
Io≦ 519.4mA (Ib:0.5mA)

Please refer to the above information and keep thermal designs within the scope of acceptable loss for all operating
temperature ranges. The power consumption Pc of the IC when there is a short circuit (short between Vo and GND) is :

Pc=Vcc×(Ib+Ishort) (Please refer to Fig.5 for Ishort.)

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BD00C0AWFP,BD00C0AWCP-V5 Technical Note

●Notes for use

1. Absolute maximum ratings

Use of the IC in excess of absolute maximum ratings (such as the input voltage or operating temperature range) may
result in damage to the IC. Assumptions should not be made regarding the state of the IC (e.g., short mode or open mode)
when such damage is suffered. If operational values are expected to exceed the maximum ratings for the device, consider
adding protective circuitry (such as fuses) to eliminate the risk of damaging the IC.

2. Electrical characteristics described in these specifications may vary, depending on temperature, supply voltage,
external circuits and other conditions. Therefore, be sure to check all relevant factors, including transient characteristics.

3. GND potential
The potential of the GND pin must be the minimum potential in the system in all operating conditions.
Ensure that no pins are at a voltage below the GND at any time, regardless of transient characteristics.

4. Ground wiring pattern

When using both small-signal and large-current GND traces, the two ground traces should be routed separately but
connected to a single ground potential within the application in order to avoid variations in the small-signal ground caused
by large currents. Also ensure that the GND traces of external components do not cause variations on GND voltage.
The power supply and ground lines must be as short and thick as possible to reduce line impedance.

5. Inter-pin shorts and mounting errors

Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in
damage to the IC. Shorts between output pins or between output pins and the power supply or GND pins (caused by poor
soldering or foreign objects) may result in damage to the IC.

6. Operation in strong electromagnetic fields

Using this product in strong electromagnetic fields may cause IC malfunction. Caution should be exercised in applications
where strong electromagnetic fields may be present.

7. Testing on application boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance pin may subject the IC to
stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be
turned off completely before connecting or removing it from a jig or fixture during the evaluation process. To prevent
damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage.

8. Thermal consideration
Use a thermal design that allows for a sufficient margin in light of the Pd in actual operating conditions.
Consider Pc that does not exceed Pd in actual operating conditions. (Pd≧Pc)

Tjmax : Maximum junction temperature=150[℃] , Ta : Peripheral temperature[℃] ,

θja : Thermal resistance of package-ambience[℃/W], Pd : Package Power dissipation [W],
Pc : Power dissipation [W], Vcc : Input Voltage, Vo : Output Voltage, Io : Load, Ib : Bias Current

Package Power dissipation : Pd (W)=(Tjmax-Ta) / θja

Power dissipation : Pc (W)=(Vcc-Vo)×Io+Vcc×Ib

9. Vcc pin
Insert a capacitor(Vo≧5V:capacitor≧1µF ~ , Vo＜5V:capacitor≧2.2µF ~ ) between the Vcc and GND pins.
The appropriate capacitance value varies by application. Be sure to allow a sufficient margin for input voltage levels.

Electric capacitance

IC

Ceramic capacitors, Low ESR capacitors

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BD00C0AWFP,BD00C0AWCP-V5 Technical Note

10. Output pin

It is necessary to place capacitors between each output pin and GND to prevent oscillation on the output. Usable
capacitance values range from 1µF to 1000µF. Ceramic capacitors can be used as long as their ESR value is low enough
to prevent oscillation (0.001Ω to 20Ω). Abrupt fluctuations in input voltage and load conditions may affect the output
voltage. Output capacitance values should be determined only through sufficient testing of the actual application.
Vcc=4V～25V Vo=3V～15V Vcc=4V～25V Vo=3V～15V Vcc=6V～25V Vo=5V～15V
Ta=-40℃～+105℃ Ta=-40℃～+105℃ Io=0A～1A Ta=-40℃～+105℃ Io=0A～1A
R1=5kΩ～10kΩ R1=5kΩ～10kΩ R1=5kΩ～10kΩ
Cin=2.2µF～100µF Cout=1µF～100µF
100 100 100
Unstable operating region

10
Cout_ESR(Ω）

Cin（μF）
Cin（μF）
Stable operating region 10 Stable operating region 10 Stable operating region
0.1

2.2
0.01
Unstable
operating region
0.001 1 1
0 200 400 600 800 1000 1 10 100 1 10 100

Io(mA) Cout（μF） Cout(μF)

Cout_ESR vs Io(reference data) Cin vs Cout(reference data)

Cout(1μF～)

ESR (0.001Ω～)
Vcc Vo

Vcc R2
Cin
(4～25V)
(1μF～)
CTL GND ADJ
Io(ROUT)
VCTL
R1
(5V) （5k～10kΩ）

※Operation Notes 10 Measurement circuit

11. CTL pin

Do not make voltage level of chip enable pin keep floating level, or in between VthH and VthL. Otherwise, the output
voltage would be unstable or indefinite.

12. For a steep change of the Vcc voltage

Because MOS FET for output Transistor is used when an input voltage change is very steep, it may evoke large current.
When selecting the value of external circuit constants, please make sure that the operation on the actual application takes
these conditions into account.

13. For an infinitesimal fluctuations of output voltage.

At the use of the application that infinitesimal fluctuations of output voltage caused by some factors (e.g. disturbance noise,
input voltage fluctuations, load fluctuations, etc.), please take enough measures to avoid some influence (e.g. insert the
filter, etc.).

14. Over current protection circuit (OCP)

The IC incorporates an integrated over-current protection circuit that operates in accordance with the rated output capacity.
This circuit serves to protect the IC from damage when the load becomes shorted. It is also designed to limit output current
(without latching) in the event of a large and instantaneous current flow from a large capacitor or other component. These
protection circuits are effective in preventing damage due to sudden and unexpected accidents. However, the IC should
not be used in applications characterized by the continuous or transitive operation of the protection circuits.

15. Thermal shutdown circuit (TSD)

The IC incorporates a built-in thermal shutdown circuit, which is designed to turn the IC off completely in the event of
thermal overload. It is not designed to protect the IC from damage or guarantee its operation. ICs should not be used after
this function has activated, or in applications where the operation of this circuit is assumed.

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BD00C0AWFP,BD00C0AWCP-V5 Technical Note

16. Applications or inspection processes where the potential of the Vcc pin or other pins may be reversed from their normal
state may cause damage to the IC's internal circuitry or elements. Use an output pin capacitance of 1000µF or lower in
case Vcc is shorted with the GND pin while the external capacitor is charged. Insert a diode in series with Vcc to prevent
reverse current flow, or insert bypass diodes between Vcc and each pin.

17. Positive voltage surges on VCC pin

A power zener diode should be inserted between VCC and GND for protection against voltage surges of more than 35V on
the VCC pin.
Vcc

GND

18. Negative voltage surges on VCC pin

A schottky barrier diode should be inserted between VCC and GND for protection against voltages lower than GND on the
VCC pin.
Vcc

GND

19. Output protection diode

Loads with large inductance components may cause reverse current flow during startup or shutdown. In such cases, a
protection diode should be inserted on the output to protect the IC.

20. Regarding input pins of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
PN junctions are formed at the intersection of these P layers with the N layers of other elements, creating parasitic diodes
and/or transistors. For example (refer to the figure below):
○When GND > Pin A and GND > Pin B, the PN junction operates as a parasitic diode
○When GND > Pin B, the PN junction operates as a parasitic transistor
Parasitic diodes occur inevitably in the structure of the IC, and the operation of these parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Accordingly, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.

Resistor Transistor (NPN)

(Pin A) (Pin B) B (Pin B)
C E
C
B

E
N
P P GND
P+ P+ P+ P+

N N N N N N
Parasitic elements
or transistors
P
Parasitic elements P substrate
(Pin A)

GND Parasitic elements GND Parasitic elements

or transistors

Example of Simple Monolithic IC Architecture

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BD00C0AWFP,BD00C0AWCP-V5 Technical Note

●Ordering part number

B D 0 0 C 0 A W F P - E 2

Part No. Output voltage Current capacity Shutdown switch Package Packaging and forming specification
00:Variable C0A：Output 1A W : With switch FP E2: Embossed tape and reel
None : Without : TO252-5
switch CP-V5
: TO220CP-V5

TO252-5
<Tape and Reel information>
6.5±0.2 2.3±0.2 Tape Embossed carrier tape
Quantity 2000pcs
+0.2 C0.5 0.5±0.1
5.1 -0.1
1.5±0.2

E2
Direction
The direction is the 1pin of product is at the lower left when you hold
FIN
of feed ( reel on the left hand and you pull out the tape on the right hand )
5.5±0.2

9.5±0.5
1.5

1 2 3 4 5
2.5
0.8

0.5±0.1
0.5 1.27
1.0±0.2

1pin Direction of feed

(Unit : mm) Reel ∗ Order quantity needs to be multiple of the minimum quantity.

TO220CP-V5
4.5±0.1
<Tape and Reel information>
+0.3 φ3.2±0.1 +0.2 Tape Embossed carrier tape
10.0 -0.1 2.8 -0.1
Quantity 500pcs
E2
Direction The direction is the 1pin of product is at the lower left when you hold
+0.4

( reel on the left hand and you pull out the tape on the right hand )
15.2 -0.2

12.0 ± 0.2

of feed
13.60
8.0 ± 0.2

16.92
(1.0)
4.92 ± 0.2

1.0 ± 0.2

0.82±0.1
0.42±0.1
0.92
1.58
1.444 1.778
(2.85)
4.12

1pin Direction of feed

Reel
(Unit : mm) ∗ Order quantity needs to be multiple of the minimum quantity.

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 Notice

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which can be obtained from ROHM upon request.

Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.

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However, should you incur any damage arising from any inaccuracy or misprint of such
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The technical information specified herein is intended only to show the typical functions of and
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