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TCS 402/TIT 402: B Tech. (CS/IT) (Fourth Semester) Mid Semester Examination, 2014

This document contains a mid-semester exam for a Computer Organization course. The exam has two sections: Section A contains 6 multiple choice questions testing concepts like program counters, 2's complement subtraction, computer generations, and binary operations. Section B contains 6 long-form questions asking about common bus systems, binary floating point representation, Booth's multiplication algorithm, instruction formats, parity encoding, RISC vs CISC architectures, ALU workings, instruction cycles, and addressing modes. Students must answer any 4 of the 6 long-form questions.

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Aditya Gaba
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0% found this document useful (0 votes)
62 views4 pages

TCS 402/TIT 402: B Tech. (CS/IT) (Fourth Semester) Mid Semester Examination, 2014

This document contains a mid-semester exam for a Computer Organization course. The exam has two sections: Section A contains 6 multiple choice questions testing concepts like program counters, 2's complement subtraction, computer generations, and binary operations. Section B contains 6 long-form questions asking about common bus systems, binary floating point representation, Booth's multiplication algorithm, instruction formats, parity encoding, RISC vs CISC architectures, ALU workings, instruction cycles, and addressing modes. Students must answer any 4 of the 6 long-form questions.

Uploaded by

Aditya Gaba
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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••

-,
TCS-401

number vith the help of


RollNo. H

das:
TCS--402/TIT --402

o estimate )
least two B. Tech. (CS/IT) (Fourth Semester)
Mid Semester EXAMINATION,2014
value of COMPUTERORGANIZATION

Time: Two Hours] [ Maximum Marks: 60

Note: (i) This qU,estion paper contains two Sections :


Section A and Section B.
(ii) Answer all questions in Section A by choosing
the correct option from multiple choices. Each
, compute question carries 2 marks.
=Z= 1.
(iii) Answer any four questions from Section B. Each o sort the elements
·8) using question carries 12 marks.
Section-A

1. Attempt all multiple choice questions, choosing the


correct option. 1,16,18,17,9,3,

(i) Which register contains the information of the next


instruction to be fetched?

(a) Program counter iearch tree,


x-}=o
d of false
(b) Instruction register

240 (c) Memory address register


e.
(d) Memory buffer register

F-34 P.T.O. whose information part


[2] TC5-402ITIT -402

(ii) Using 2's complement, subtraction of (1010)2 from


" (0011)2 is:
ote ;
(a) (Olllh
(a)
(b) (1001)2
(c) -(0111)2
(d) - (1001)2 (b)
(Hi) The Second Generation of computers used .
(a) IC-chip
(b) Transistors
(c) Vacuum tubes
..(d) Microprocessor chip
. (a)
(iv) A stack-organized computer uses instruction of

(a) Indirect addressing (b


(b) Two-addressing
(c) Zero addressing
(d) Index addressing
..
(v) (F3A7C2)1O = (?)8 :
(a) (74723702)8
(b) (74733702)0
(c) (75723702)8
(d) (75723802)8
(vi) If a register containing data (11001100h is
subjected to arithmetic shift left operation, then the
content of the register after.jashl' shall be:
(a) (11001100)z 4.
(b) (1101100)2
(c) (10011001)2
(d) (10011090)2

F-34
)2
[3] TCS-402ITIT -402

m
Section-B 12 (6+6) each
vith the help of
ote: Attempt any four of the following questions.

. (a) What is a Common Bus ? Why is it required and


explain a bus system for four registers each of four
hits with the help of suitable diagram.
(b) Represent the following decimal numbers of Binary
Floating Point Representation (i) 17 (ii) -0· 125
and also perform the arithmetic operations
)
(+42) + (-13) and (-42) - (-13) in binary
signed 2's complement representation for negative
numbers.

3. (a) Write Booth's algorithm for multiplication of signed


-2's complement numbers. Also give an example
for the same.
(b) A computer uses a memory unit with 256 K words
of 32 bits each., A binary instruction code is stored
in one word of memory. The instruction has four
parts : an indirect bit, an operation code, a register
code part of specify one of the 64 registers, an
operation code and an address part. .0 sort the elements
• How many bits are there.in the operation code,
the register code part and the address part ?
• Draw the instruction format
. . and indicate the
number of bits in each part. 1,16,18,17,9,3,
s
e • How many bits <, are there in data and address
inputs of the memory ?

(a) What is an Instruction ? Explain the various


search tree.
instruction formats for a basic computer.
(b) Enumerate the various steps used to encode the
binary word 1011 into even parity Hamming code.
e.
34 P.T.O.
whose information part
••

(4) TCS-402ITIT -402

5. (a) Enumerate the various ways for increasing the


computer performance and how Reduced
Instruction Computer Architecture (RISC) is
different from Complex Instruction Set Computers
. (CISC).
(b) With the help of suitable diagram explain the
working of arithmetic logic Unit.

6. (a) What is an Instruction Cycle? Explain the various


phases of instruction .cycle with the help of
flowchart.
(b) Explain the following instructions:
• Branch Unconditionally (BUN)
• Branch and Save Return Address (BSA)

7. (a) What is an Interrupt Cycle? Explain it with the help


of a flowchart.
(b) What do you understand by Addressing Mode ?
Explain the various addressing modes with the help
of a suitable numerical example .

..

TCS-402/TIT-402
290

F-34

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