Chapter 6 Solutions (Global Edition) : Find V, V, and V - Find V For V - 3V
Chapter 6 Solutions (Global Edition) : Find V, V, and V - Find V For V - 3V
Prob. 6.1
Find V O , V P , and V T . Find V D,sat for V G =-3V.
VT = VP - VO = 6.85V
VD,sat = VT + VG = 6.85V - 3.00V = 3.85V
Prob. 6.2
Find I D,sat for V G =0V, -2V, -4V, and -6V and plot I D,sat versus V D,sat for JFET in 6.1.
Z
GO = 2 ⋅ a ⋅ q ⋅ μn ⋅ n ⋅ = 2 ⋅10-4 cm ⋅1.6 ⋅10-19 V ⋅103 cm
V⋅s ⋅10 cm3 ⋅10 = 3.2 ⋅10 S
-3
2 16 1
L
3
V -V 2 V -V 2
1
I D,sat = G O ⋅ VP ⋅ G O
+ ⋅ G O
+
VP 3 VP 3
3
V - 0.814V 2 V - 0.814V 1
I D,sat = 3.2 ⋅10-3S ⋅ 7.66V ⋅ G
2
+ ⋅ G +
7.66V 3 7.66V 3
Prob. 6.3
Graph I D versus V D for V G =0V, -2V, -4V, and -6V for JFET in 6.1.
3 3
V 2 V -V 2
2 V +V -V 2
I D = G O ⋅ VP ⋅ + ⋅ - ⋅
VP 3 VP 3
D O G O D G
VP
3 3
V 2 0.814V-V 2 0.814V+V -V
I D = 3.2 ⋅10 S ⋅ 7.66V ⋅
2 2
-3 D
+ ⋅ G
- ⋅ D G
7.66V 3 7.66V 3 7.66V
Prob. 6.4
Graph the I D – V D curve.
Prob. 6.5
Graph the I D – V D curve.
Prob. 6.6
Consider an n-channel JFET. Draw the transfer characteristics curve. Show that the drain
current is independent of drain voltage after pinch off. If the donor concentration increases
in the substrate, then how will it affect the drain current?
2
V
For n-channel JFET, I D = I DSS 1 − GS .(1 + λ .VDS )
VP
For pinch off to occur with pinch off voltage V P , VGS = VDS , sat − V p
2
VDs, sat
Thus, I D = I Dss . .[1 + λ.(VGS − VP )]
VP
qa 2 .N d
We know pinch off voltage can be estimated as, VP = . This drain current will
2ε
be,
2
VDs, sat qa 2 .N d
I D = I Dss . .2ε
.1 + λ. VGS −
2 2ε
q.N d a
So with the increase in donor concentration, V P increases and I D decreases.
Prob. 6.7
Show that the width of the depletion region in Figure 6-15 is given by Equation 6-30.
Use the mathematics leading to Equation 5-23b with Φ s for the potential difference across
the depletion region contained in x po =W.
Prob. 6.8
Sketch the low and high frequency behavior (and explain the difference) of an MOS
capacitor with a high-k gate dielectric (ε r =25) on an n-type semiconductor (ε r =10, n i =1013
cm-3). Mark off the accumulation, depletion, inversion regions, and the approximate
location of the flatband and threshold voltages. If the high frequency capacitance is 250
nF/cm2 in accumulation and 50 nf/cm2 in inversion, calculate the dielectric thickness and
the depletion width in inversion.
In a high frequency measurement, the charge in the inversion layer cannot follow rapid
voltage variations and thus does not contribute to the small signal AC capacitance. Hence,
the semiconductor capacitance is at a minimum, corresponding to maximum depletion
width.
=2
(11.8 × 8.85 ×10 F/cm ) × ( 0.417 V ) = 1.04 ×10
-14
-5
cm
(1.6 ×10 C ) × (10 cm )
-19 17 -3
εs
⇒ Cd = = 10-7 F/cm 2
Wm
Ci C d
Cmin = = 9.5 × 10-8 F/cm 2
Ci +Cd
The difference in C HF and C LF in the accumulation and depletion regions is due to interface
states that respond to LF, but cannot respond to the HF AC. Also, carrier recombination-
generation is too slow to respond to HF. Hence we see no inversion there.
Prob. 6.10
Find (a) oxide capacitance, (b) maximum depletion width, and (c) modified work function.
E − EF
We know, N a = ni exp i
KT
Na 1.5 x1016
Ei − E F = qφ F = KT ln = 0.0259 ln = 0.36eV
Ni 10
1.5 x10
At strong inversion, φ S = 2φ F
Thus, maximum depletion width,
1/ 2
2ε .φ
1/ 2 2 x3.9 x8.854 x10 −14 x 2 x0.36
Wm = s s = = 2.5 x10 − 5 cm.
q.N a 1.6 x10 −19 x1.5 x1016
E g , sem
Thus, qφms = qχ m − qχ m − + qφ F = −0.92eV . So,
2
ϕ ms = −0.92V .
Prob. 6.11
Find Wm , V FB , and V T . Sketch the C-V curve.
Nd 5 ⋅1017 cm1 3
Φ F = -kT ⋅ ln = -0.0259V ⋅ ln = -0.449V
ni 1.5 ⋅1010 cm1 3
1 1
∈s ⋅ ( -Φ F ) 2 11.8 ⋅ 8.85 ⋅10-14 cm
F
⋅ ( 0.449V ) 2
Wm = 2 ⋅ = 2⋅ = 0.049μm
q ⋅ Nd 1.6 ⋅10-19 C ⋅ 5 ⋅1017 cm1 3
Qd = q ⋅ N d ⋅ Wm = 1.6 ⋅10-19 C ⋅ 5 ⋅1017 1
cm3
⋅ 0.049 ⋅10-4 cm = 3.92 ⋅10-7 C
cm 2
Prob. 6.13
In Problem 6.2, find the threshold voltage V T for the MOS structure. How much AL has to
be doped in the substrate in order to achieve 20% reduction in the present threshold
voltage of the structure?
Qox QD
Threshold voltage, VT = φms − − + 2φ F
Cox Cox
8 x10 −8 − 6 x10 −8
VT = −0.92 − − + 2 x0.36 = −0.78 V
−9 −9
3.45 x10 3.45 x10
To get 20% reduction in the present threshold voltage, the change in threshold will be,
∆VT = −0.156V .
2 x1016
Fermi potential, φ F = 0.0259 ln = 0.365V
10
1.5 x10
Maximum depletion width,
1/ 2
ε .φ
1/ 2 2 x11.8 x8.854 x10 −14 x0.365
Wm = 2 s F = = 0.69 x10 − 3 cm.
q.N a 1.6 x10 −19 x 2 x1016
4ev
4eV
EC
EFM 1.5eV
HfO2 Ei
qVT qΦS qΦF
EF
EV
1.5eV 1018 1
F ms = F m - F s = 5eV - 4eV+ +0.026eV ⋅ ln 12 cm3
= -0.11eV
2 10 1
cm3
∈ 25 ⋅ 8.85 ⋅10 cm
-14 F
Ci = i = = 2.21 ⋅10-6 cmF 2
d 100 ⋅10 cm
-8
1 1
At high frequency, inversion electrons do not respond while at low frequency, they do
At large negative bias, doubling the substrate doping does not change C i but would affect
the depletion capacitances
C
Coxi C
Low Frequency
High Frequency
V
Prob. 6.17
Find the oxide thickness and substrate doping.
Prob. 6.19
Determine the field oxide charge and the mobile ion content.
Qi
VFB = F ms - q = -1.0V (from 6.16) where F ms = -0.35V
Ci
3.785 ⋅10 cmF 2
-8
Qi = ( F ms -VFB ) ⋅ i = ( -0.35V- ( -1.0V ) ) ⋅
C
= 1.53 ⋅1011 cm1 2
q 1.6 ⋅10-19 C
To determine mobile ion concentration, compare the positive and negative bias temperature
flatband voltages.
Ci 3.785 ⋅10-8 cmF 2
Qion = ( VFB- -VFB+ ) = -1.0V - ( -1.5V ) ⋅ = 1.2 ⋅1011 cm
ions
1.6 ⋅10-19 C
2
q
Prob. 6.20
Sketch the cross-section of a n-channel enhancement mode Si MOSFET. It has a channel
length of 2 μm, width of 5 μm, high-k gate dielectric of thickness 10 nm, with a relative
dielectric constant of 25, and substrate doping of 1018 cm-3. If the threshold voltage is 0.5
V, calculate the flatband voltage. For a gate bias of 3V, what is the total approximate
inversion charge under the channel? Sketch the band diagram as a function of depth in the
middle of the channel under this condition, specifying the value of the band edges to the
Fermi level deep in the bulk and at the interface with the gate dielectric.
For a drain bias of 0.1V, calculate the drain current. The mobility of electrons is 1000
cm2/V-s and the effective mobility of holes is 200 cm2/V-s. Repeat the calculation of drain
current using a “charge control” approach by dividing the inversion charge by the transit
time for carriers to go from source to drain.
VT = VFB + 2 ln +
q ni Ci
) ))) (
2φ F
16
Here, φ F = 0.365V and N a = 2x10 /cm3.
VT = -0.6 V
W 1
I D,lin = μ p Cox ( VGS - VT ) VDS - VDS2
L 2
50 μm 1 2
=
2 μm
( )(
)
150 cm 2 /V ⋅ s 4.427 ×10-7 F/cm 2 ( -3 V + 0.6 V )( -0.05 V ) - ( -0.05 V )
2
-4
⇒ I D,lin = 1.97 ×10 A = 197 μA
W
μ p Cox ( VGS - VT )
2
I D,sat =
2L
50 μm
=
2 μm
( )( )
150 cm 2 /V ⋅ s 4.427 ×10-7 F/cm 2 ( -3 V + 0.6 V )
2
∂I D
g= = 0 since device is in saturation
∂VD
μ Ci Z
I D,sat = ⋅ (VG -VT ) 2 = k ⋅ (VG -VT ) 2
2L
10-4 A
I D,sat = k ⋅ (VG -VT ) 2 → 10-4 A = k ⋅ (6V-1V) 2 → k = 2
= 4 ⋅10-6 A
V2
25V
∂I D
gm = = 2 ⋅ k ⋅ (VG -VT ) = 2 ⋅ 4 ⋅10-6 A
⋅ 5V = 4 ⋅10-5 A
∂VG V2 V
n i2
At VT near the interface, n = N a = 1018 1
cm3
and p = = 2.25 ⋅102 1
cm3
Na
n i2
In bulk, p = 1018 1
cm3
and n = = 2.25 ⋅102 1
cm3
p
SiO2
EC
ФF Ei
EFp
EV
EFn
ФF
2ФF-1.5eV
Prob. 6.26 Calculate threshold voltage
Qd
VT = VFB + 2φF -
Ci
Qi
VFB = 2φF -
Ci
εi 8.85 × 10-14 × 3.9
Ci = = = 3.452 × 10- 7 F/cm 2
d 100 × 10-8
Note : Here we use dielectric constant of oxide.
For an n-channel MOSFET with gate oxide thickness of 30 nm, threshold voltage of 0.7 V,
Z = 30 µm, and length of the device is 0.9 µm, calculate the drain current for V G = 3 V and
V D = 0.2 V. Assume that the electron channel mobility is 200 cm2/V-sec. What will be the
required drain current to drive the MOS in saturation region?
(VG − VT ) = 3 − 0.7 = 2.3V and VD = 0.2V . Since, VD < (VG − VT ) , so the MOS is
operating in the linear region.
Z .m n .Cox 1 2
ID =
L (VG − VT ).VD − 2 .VD
Z .m n .Cox 1 2
ID =
L (VG − VT ).VD − 2 .VD
From equation (3), inserting the values from (1) and (2)
kN
0.74 ⋅10-3 = (4V - VT ) 2
2
k
1.59 ⋅10-3 = N ⋅ (5V - VT ) 2
2
0.74 (4V - VT ) 2
=
1.59 (5V - VT ) 2
VT =1.85V, k N =3.20 ⋅10-4 A/V 2
Prob. 6.29
For Problem 6.28, calculate the gate oxide thickness and the substrate doping either
graphically or iteratively.
Z
(a) k N = ⋅ μ n ⋅ Ci
L
use k N from Problem 6.22 and μ n =500 cm
2
V⋅s
100μm
1.36 ⋅10-3 ⋅ 500 cm
V⋅s ⋅ Ci
2
A
V2
=
2μm
∈i 3.9 ⋅ 8.85 ⋅10-14 F
Ci = 5.42 ⋅10-8 F
=
cm 2
= cm
d d
d = 6.36 ⋅10 cm = 636Å
-6
Q
(b)VT = VFB + 2 ⋅ φF - d
Ci
Qd q⋅∈s ⋅N a ⋅ φF
2.71V = 2 ⋅ φF - = 2 ⋅ φF -
Ci Ci
start from φF 0.3V
= = (note: since VT 2.71 V, it cannot be PMOS)
Step 1:
2 ⋅ 1.6 ⋅10-19 C ⋅11.8 ⋅ 8.85 ⋅10-14 F
cm ⋅ N a ⋅ 0.3V
2.71V = 0.6V +
5.42 ⋅10 F -8
N a = 6.523 ⋅10 16 1
cm3
kT N 6.37 ⋅10 16 1
φF = ⋅ ln a = 0.0259V ⋅ ln cm3
= 0.395V
q ni 1.5 ⋅1010 1
cm3
Step 2:
2 ⋅ 1.6 ⋅10-19 C ⋅11.8 ⋅ 8.85 ⋅10-14 F
cm ⋅ N a ⋅ 0.395V
2.71V=0.792V+
5.42 ⋅10 F -8
N a =4.08 ⋅10 cm
16 -3
kT N 4.08 ⋅10 16 1
φF = ⋅ ln a = 0.0259V ⋅ ln cm3
= 0.384V
q ni 1.5 ⋅1010 1
cm3
Step 3:
2 q⋅∈s ⋅N a ⋅ φF
2.71V=0.767+
Cox
N a = 4.22 ⋅1016 1
cm3
→ φF = 0.385 V
gives a self-consistent set of values
n-channel MOSFET, N a = 4.22 ⋅1016 1
cm3
Prob. 6.30
For an n-channel MOSFET with gate oxide thickness of 20 nm, calculate the required
phosphorous (P ions/cm2) to be doped to reduce the threshold voltage from 1.5 V to 1 V. If
the P ion implantation takes place for 15 seconds with a beam current of amount 10-6 Amp,
then what scan area will be covered by the implanted beam?
1.727 x10 − 7
FP =
Cox
[
. VT , new − VT , old = ] [1 − 1.5] = 0.269 x1012 /cm2.
q 1.6 x10 −19
BeamCurrentxt
We know, + iondosexq
Area
10 − 6 x15
Scanned area, = = 348.5 cm2.
12 −19
0.269 x10 x1.6 x10
Prob. 6.31
In Problem 6.5, calculate the depletion charge (Q D ) and the threshold voltage (V T ). Now
suppose a reverse bias of 0.4 V is applied between the substrate and the source, how will it
affect the V T due to evolved substrate bias effect?
φ F = 0.4069 V VT = −0.267 V
Now depletion charge/ unit area will be,
QD = −q.N A .Wm = −1.6 x10 −19 x1017 x0.348 x10 − 3 = −0.5568 x10 − 5 C/cm2.
Now due to application of reverse bias, the depletion charge/ unit area will change to,
[
= 2 x11.8 x8,854 x10 −14 x1.6 x10 −19 x1017 x(0.8138 + 0.4 ) ]1/ 2 = −26.04x10− 4 C / cm2
The change in V T due to substrate bias effect will be,
∆VT =
2.ε S .N A
Cox
[
. (2φ F − VB )1 / 2 − (2φ F )1 / 2 ]
=
2 x11.8 x8.854 x10 −14.x1.6 x10 −19 x1017
3.45 x10 − 9
[
. (0.8138 + 0.4 )1 / 2 − (0.8138)1 / 2 ]
= 1.059 x105V
Due to substrate bias effect V T increases enormously.
Prob. 6.32
Plot the drain characteristics for an n+-polysilicon-SiO 2 -Si p-channel transistor with
o
Nd =
1016 cm1 3 , Qi = 100 A, m p =
5 ⋅1010 q, d = V ⋅s , and Z =
2
200 cm 10 L .
Prob. 6.33
For the transistor in Problem 6-32 with L=1μm, calculate the cutoff frequency above
pinch-off.
gm
fc ;
2πCi LZ
For p-channel, we must include a minus sign in Equation 6-54 for positive g m .
1 Z μp
fc = ⋅ ⋅ μ p ⋅ Ci ⋅ (VT -VG ) = ⋅ (VT -VG )
2πCi LZ L 2πL2
2
200 cm
For VG =-5V, f c = V⋅s
⋅ (-1.1- -5V) = 12.4GHz
2π ⋅ (10-4 cm) 2
2
200 cm
For VG =-3V, f c = V⋅s
⋅ (-1.1- -3V) = 6GHz
2π ⋅ (10 cm) 2
-4
Prob. 6.34
∂I D'
Derive the drain conductance g D' = beyond saturation in terms of the effective
∂VD
channel length L-ΔL and then in terms of V D .
Using L′ in Equation 6-53,
Z L L
I′D = 12 μ n Ci (VG -VT ) 2 = I D,SAT ⋅ = I D,SAT ⋅
L′ L′ L-DL
-1
∂I′D ∂ L ∂ DL
g′D = = I D,SAT ⋅ = I D,SAT ⋅ 1-
∂VD ∂VD L-DL ∂VD L
-1 -2
∂ DDL L 1 ∂DL
1- = -1 ⋅ 1- ⋅- ⋅
∂VD L L L ∂VD
1
-2
DL 1 ∂ 2 ∈s (VD -VD,SAT ) 2
= -1 ⋅ 1- ⋅- ⋅
L L ∂VD qN a
1
-2 -
DL 1 1 2 ∈s 2 ∈s (VD -VD,SAT ) 2
= -1⋅ 1- ⋅- ⋅ ⋅
L L 2 qN a qN a
-2
1
-
1
∂I′D ∈ ∈ ∈
= I D,SAT ⋅ -1⋅ L2 L- s D D,SAT ⋅ - ⋅ ⋅ s s D D,SAT
2 (V -V ) 2
1 1 2 2 (V -V ) 2
g′D =
∂VD
qN a L 2 qN a qN a
1
2∈ 2
I D,SAT ⋅ L ⋅ s
∂I′ qN a
g′D = D =
∂VD 1 2
2 ∈s (VD -VD,SAT ) 2 1
2 ⋅ L- ⋅ (V -V ) 2
D D,SAT
qN a
Prob. 6.35
An n-channel MOSFET has a 1μm long channel with N a = 1016 1
cm3
and N d = 1020 1
cm3
in
the source and drain. Find the V D which causes punch-through.