MIC Solved Questions Bank
MIC Solved Questions Bank
2) READY : This is the acknowledgement from the memory or slow device that
they have completed the data transfer. The signal made available by the
devices is synchronized by the 8284A clock generator to provide ready input to
the microprocessor. The signal is active high(1).
3) INTR : Interrupt Request. This is triggered input. This is sampled during the
last clock cycles of each instruction for determining the availability of the
request. If any interrupt request is found pending, the processor enters the
interrupt acknowledge cycle. This can be internally masked after resulting the
interrupt enable flag. This signal is active high(1) and has been synchronized
internally.
Ans. If Trap Flag (TF) is set ,the processor enters the single step execution
mode.
1.The process of fetching the next instruction when the present instruction is
being executed is called as pipelining.
3.BIU (Bus Interfacing Unit) fills in the queue until the entire queue is full.
4.BIU restarts filling in the queue when at least two locations of queue are
vacant.
Advantages of pipelining:
•The execution unit always reads the next instruction byte from the queue in
BIU. This is faster than sending out an address to the memory and waiting for
the next instruction byte to come.
•In short pipelining eliminates the waiting time of EU and speeds up the
processing. -The 8086 BIU will not initiate a fetch unless and until there are
two empty bytes in its queue. 8086 BIU normally obtains two instruction bytes
per fetch.
Ans.
BX – This is the base register. It is of 16 bits and is divided into two 8-bit
registers BH and BL to also perform 8-bit instructions.
CX – This is the counter register. It is of 16 bits and is divided into two 8-bit
registers CH and CL to also perform 8-bit instructions.
DX – This is the data register. It is of 16 bits and is divided into two 8-bit
registers DH and DL to also perform 8-bit instructions.
It points to the topmost item of the stack. If the stack is empty the stack
pointer will be (FFFE)H. It’s offset address relative to stack segment.
It is primary used in accessing parameters passed by the stack. It’s offset address
The code segment of program memory has all the code instructions. The code
The data segment contains the data of the program and this register holds the
The Flag or Status register is a 16-bit register which contains 9 flags, and the
remaining 7 bits are idle in this register. These flags tell about the status of the
processor after any arithmetic or logical operation. IF the flag value is 1, the flag
is set, and if it is 0, it is said to be reset.
Status Flags:
CF-Carry Flag : It is set when carry/borrow is generated out of MSB of result. (i.e.
D7 bit for 8-bit operation, D15 bit for a 16 bit operation).
AF-Auxiliary Carry Flag :This is set if a carry is generated out of the lower nibble,
(i.e. From D3 to D4 bit)to the higher nibble.
ZF-Zero Flag : This flag is set if the result is zero after performing ALU operations.
Otherwise it is reset.
SF-Sign Flag : This flag is set if the MSB of the result is equal to 1 after
performing ALU operation , otherwise it is reset.
OF-Overflow Flag : This flag is set if an overflow occurs, i.e. if the result of a
signed operation is large enough to be accommodated in destination register
Control Flags:
TF-Trap Flag : If this flag is set ,the processor enters the single step execution
mode.
The Flag or Status register is a 16-bit register which contains 9 flags, and the
remaining 7 bits are idle in this register. These flags tell about the status of the
processor after any arithmetic or logical operation. IF the flag value is 1, the flag
is set, and if it is 0, it is said to be reset.
Status Flags:
CF-Carry Flag : It is set when carry/borrow is generated out of MSB of result. (i.e.
D7 bit for 8-bit operation, D15 bit for a 16 bit operation).
AF-Auxiliary Carry Flag :This is set if a carry is generated out of the lower nibble,
(i.e. From D3 to D4 bit)to the higher nibble.
ZF-Zero Flag : This flag is set if the result is zero after performing ALU operations.
Otherwise it is reset.
SF-Sign Flag : This flag is set if the MSB of the result is equal to 1 after
performing ALU operation , otherwise it is reset.
OF-Overflow Flag : This flag is set if an overflow occurs, i.e. if the result of a
signed operation is large enough to be accommodated in destination register
Control Flags:
TF-Trap Flag : If this flag is set ,the processor enters the single step execution
mode.
•Finds the physical address of that location in the memory where the instruction
is stored and
•Manages the 6-byte pre-fetch queue where the pipelined instructions are
stored.
Also, the BIU contains 4 segment registers. Each segment register is of 16-bit. The
segments are present in the memory and these registers hold the address of all
the segments.
1.Code segment register: It is a 16-bit register and holds the address of the
instruction or program stored in the code segment of the memory.Also, the IP in
the block diagram is the instruction pointer which is a default register that is used
by the processor in order to get the desired instruction. The IP contains the offset
address of the next byte that is to be taken from the code segment.
2. Stack segment register: The stack segment register provides the starting
address of stack segment in the memory. Like in stack pointer, PUSH and POP
operations are used in this segment to give and take the data to/from it.
3. Data segment register: It holds the address of the data segment. The data
segment stores the data in the memory whose address is present in this 16-bit
register.
4. Extra segment register: Here the starting address of the extra segment is
present. This register basically contains the address of the string data.It is to be
noteworthy that the physical address of the instruction is achieved by combining
the segment address with that of the offset address.
10.List features of 8086 microprocessor.
Ans. 1) It has a 16 bit data bus-D0- D15
2) 8086 has a 20 bit address lines can access up to.(2
20 = 1MB)
Therefore , 20 address lines that is A0 to A19 memory locations.
The address range for this memory is 00000H to FFFFFH.
3) It provides 14 16-bit registers. AX,BX,CX,DX,CS,SS,DS,ES,BP,SP,SI,DI,IP &
FLAG REGISTER.
4) It has multiplexed address and data bus AD0-AD15.
5) Interrupts:-8086 has 256 vectored interrupts.
11. State number of data lines and number of address lines used in 8086
microprocessor .
FLAG REGISTER.
12. Name the general purpose registers of 8086 giving brief description of each.
BX – This is the base register. It is of 16 bits and is divided into two 8-bit
registers BH and BL to also perform 8-bit instructions.
CX – This is the counter register. It is of 16 bits and is divided into two 8-bit
registers CH and CL to also perform 8-bit instructions.
DX – This is the data register. It is of 16 bits and is divided into two 8-bit
registers DH and DL to also perform 8-bit instructions.
Declaration examples:
Byte1 DB 10h
The EQU directive is used to give name to some value or symbol. Each time the
assembler finds the given names in the program, it will replace the name with
the value or a symbol. The value can be in the range 0 through 65535 and it can
be another Equate declared anywhere above or below.
THIS BYTE
THIS WORD
THIS DWORD
A variable – declared with a DB, DW, or DD directive – has an address and has
space reserved at that address for it in the .COM file. But an Equate does not
have an address or space reserved for it in the .COM file.
3.
4. Ends – A Structure ends by using the ENDS directive meaning END of Structure.
16. List and explain in detail the program development steps in assembly
language programming.
Editor
b) It enables one to create, edit, save, copy and make modification in source file.
Assembler
Linker
Debugger
18. Describe any 4 addressing modes of 8086 with one example each
Eg.
➢ Instruction are shorter but the operands cannot be identified by the looking at
the instructions.
Eg.
➢ Here, only the offset address is specified, the segment being indicated by the
Instruction.
Eg.
MOV CL , [4321H] ; Moves data from location 4321H in the data segment into CL.
CL = [54321H]
➢ In this addressing mode the operands are implied and are hence not specified
in the Instruction.
Eg.
19. Select an appropriate instruction for each of the following & write: 1)
Multiply content of AX by 06H 2) Copy the contents of BX register to CX
Ans.
20. Explain any four instructions from the Data Transfer instructions of 8086
Ans. 1.MOV Destination , Source: Moves a BYTE / WORD from the source to the
destination specified in the instruction.
Source: Register ,Memory Location , Immediate Number.
2.PUSH Source: PUSH the source (word) into the stack and decrement the stack
pointer by two.
3. POP Destination: POP a word from the stack into the given destination and
increment the stack pointer by two.
4.PUSHF: PUSH the FLAG register (16-Bits) into the stack and decrement the stack
pointer by Two.
21. Explain any four instructions from the Arithmetic group instructions of 8086