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Microcontrollers
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OE 8051
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 Microprocessors:
General-purpose microprocessor
• CPU for Computers
o m
• No RAM, ROM, I/O on CPU chip itself
. c
• Example：Intel’s x86, Motorola’s 680x0
e rs
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Data Bus
n g Many chips on mother’s board
CPU

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General-
Purpose
D oRAM ROM I/O Timer
Serial

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Micro- Port
COM
Port
F
processor
Address Bus

General-Purpose Microprocessor System

 Microcontroller :
• A smaller computer o m
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• On-chip RAM, ROM, I/O ports...
e rs
e
• Example：Motorola’s 6811, Intel’s 8051, Zilog’s Z8 and PIC 16X
in
n g
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CPU o
RAM ROM
D
F aa
I/O
Serial
Timer COM
A single chip

Port
Port
Microcontroller
Microprocessor vs. Microcontroller
Microprocessor Microcontroller
o m
• CPU is stand-alone, RAM, . c
• CPU, RAM, ROM, I/O and
ROM, I/O, timer are separate
e rs
timer are all on a single chip
• designer can decide on the
in e
• fix amount of on-chip ROM,
amount of ROM, RAM and
n g RAM, I/O ports
I/O ports.
• expansive O E • for applications in which cost,

• versatility D o power and space are critical

• single-purpose
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• general-purpose
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 Advantages over mp
• Cost is lower m
• Standalone mp never used – memory, . c o I/O,
clock necessary e r s
• For mp- large size PCB i n e
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• Large PCB- more
O E effort and cost
• Big physical
D o size
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• More difficult to trouble shoot mp based
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• A mc is a mp with integrated peripherals.
 Advantages of mc
• Low cost
o m
• Small size of product
. c
• Easy to troubleshoot and maintain
e rs
•
•
More reliable
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• n g
Additional mem, I/o can also be added

• O E
Software security feature

• D o
All features available with 40 pins.

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Useful for small dedicated applications and not for larger
system designs which may require many more I/O ports.
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• Mostly used to implement small control functions.
 Block Diagram
External interrupts
On-chip
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Timer/Counter

.
rs
Interrupt ROM for
On-chip Timer 1 Counter
program

ee
Control RAM Inputs
code Timer 0

g i n
CPU
E n
o O Serial
OSC
a D Bus
Control
4 I/O Ports
Port

F a
P0 P1 P2 P3 TxD RxD
Address/Data
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Pin Description of the 8051
P1.0 1 40 Vcc
P1.1
P1.2
2
3
39
38
P0.0(AD0
o m
)P0.1(AD1)
P1.3 4 8051 37
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P0.2(AD2
P1.4
P1.5
5
6 (8031)
36

e
35 rs P0.3(AD3)
)
P0.4(AD4)
P1.6
P1.7
7
8
in e 34
33
P0.5(AD5)
P0.6(AD6)
RST
(RXD)P3.0
9
10
n g 32
31
P0.7(AD7)
EA/VPP
(TXD)P3.1
(INT0)P3.2
11

O
12E 30
29
ALE/PROG
PSEN

D o
(INT1)P3.3
(T0)P3.4
13
14
28
27
P2.7(A15)
P2.6(A14

a a(T1)P3.5
(WR)P3.6
15
16
26
25
)P2.5(A13
P2.4(A12
)
F (RD)P3.7
XTAL2
XTAL1
17
18
19
24
23
22
)P2.3(A11)
P2.2(A10)
P2.1(A9)
GND 20 21 P2.0(A8) 
 Register Set of 8051-SFR
• Special Function Registers (SFR) are
m
special purpose registers – 21 in number
o
• Addresses from 80H to FFH of s . c
all SFR’s
r
• Two 8 bit regist. A and Be–estore operands
• A, B, PSW, P0-P3, IP, i n
g IE, TCON,SCON
n
– Bit addressable,E8bit each, 11 in number
• o O
a D 8bit each.
SP, DPH,DPL,TMOD,TH0,TL0,TH1,TL1,SBUF,PCON
– Byte addressable,
F
– DPTR a
– data pointer, accesses ext. mem. DPH + DPL = DPTR
• Starting 32 bytes of RAM – general purpose reg, divided
into 4 register banks of 8 registers each. Only one of
these bank accessible at one time. RS1 and RS0 of
PSW used to select bank.
 Register Set of 8051-SFR
• TH0-TL0 and TH1-TL1
– 16 bit timer registers
o m
• P0-P3 – port latches . c
ers
• SP, PSW, IP – Interrupt Priority, IE – enable
in e
g
• TCON – timer/counter control reg to turn on/off the
n
E
timers, interrupt control flags for ext. int like INT1
O
and INT0
D o
a
• TMOD – modes of operation of timer/counter
a
F
• SCON – serial port mode control reg
• SBUF – serial data buffer for transmit and receive
• PCON – Power control reg – power down bit, idle bit
 Registers
A

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B

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R0
DPTR DPH DPL
R1

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in
R2 PC PC
R3

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E
R4 Some 8051 16-bit Register hold
addresses
R5

o O
D
R6

a a R7

F
PSW (8)
Some 8-bitt Registers of
the 8051 SP (8)
 8051 features
• Internal ROM – 4K, RAM – 128bytes
o
• Thirty two I/O pins as 4 – 8 bit ports m
P0 –P3
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• Two 16 bit timer/counters T0rs and T1
e e
• i n
Full duplex serial data receiver/trans.
g
SBUF
• Control registersE–nTCON, TMOD, SCON,
PCON, IP and o O IE
• a D
F a
Two external and three Internal Interrupt
sources
• Oscillator and clock circuits
 PCON
m
• Idle mode – oscillator, serial port, interrupt,
o
timer blocks are active but clock
s . cdisabled.
• Can be terminated with INT
r
e or reset
i n e
• Power down moden–gon-chip osc stopped.
E
RAM contentsOpreserved. Hardware reset
D
• Two general
opurpose flags and a double
a a
baudFbit.
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 TMOD Register:

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• Gate : When set, timer i n e
n g only runs while INT(0,1) is
high.
O E
• o
C/T : Counter/Timer select bit.
• M1 a a D
: Mode bit 1.
•
F
M0 : Mode bit 0.
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 TCON Register:

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• TF1: Timer 1 overflow flag.
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• g
TR1: Timer 1 run control bit.
n
•
•
E
TF0: Timer 0 overflag.
O
• D o
TR0: Timer 0 run control bit.
a
IE1: External interrupt 1 edge flag.
a
•
•
F
IT1: External interrupt 1 type flag.
IE0: External interrupt 0 edge flag.
• IT0: External interrupt 0 type flag.
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 Memory addressing
• Program memory - EPROM
– Intermediate results, variables, const
o m
– 4KB internal from 0000 – 0FFFH . c
e rs
– 64KB external with PSEN, till FFFFH
in e
– Internal –external difference PSEN
n g
E
• Data Memory – RAM
O
o
– 64KB of external with DPTR signal
D
a
– Internal memory two parts - 128 bytes Internal RAM
a
F
and secondly set of addresses from 80-FFH for
SFR’s
– 128 bytes from 00 – 7FH direct or indirect
– SFR addresses – only direct addressing mode
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 Memory Addressing
• Lower 128 bytes in three sections
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– 00-1F – 32 bytes 4 banks 00,01,10,11 each
e rs
containing 8 registers of 8 bits each. Only
in e
one accessible at a time with PSW bits.
n g
– 20-2FH – 16bytes is bit addressable with
O E
o
addresses 0F to 7FH, 20.7 or 20.0, or 0-7
D
a
– 30-7F – 80 bytes of general purpose data
a
F
memory. It is byte addressable, used for
stack
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• RAM memory space allocation in the 8051

7FH

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rs
Scratch pad RAM

30H
e e
2FH
g in
En Bit-Addressable RAM

20H

o
1FH O
D
Register Bank 3
18H

F aa 17H
10H
0FH
Register Bank 2

(Stack) Register Bank 1

08H
07H
Register Bank 0
00H
 External I/O interfacing
• 8051 has two timers, one Serial i/o mport
and 4 – 8bit addressable ports.. c o
r s
i ee
• More I/O as external memory-mapped
n I/O
n g
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 Interrupts of 8051
• 5 sources of Interrupts
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– INT0 and INT1 bars external interrupt inputs
e rs
• These are processed internally by IE0 and IE1
flags in e
– Two timers which n
g
generate int when FFFFH
– Serial port o
E
O if R1 or T1 is set.
interrupt
• aD int by software
Singleastep
F
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Interrupt Enable Register :

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ers
• EA : Global enable/disable.
in e
•
•
--- : Undefined.
ET2 :Enable Timer 2 interrupt.n
g
• ES :Enable Serial portO E
interrupt.
• D
ET1 :Enable Timer o1 interrupt.
• a
EX1 :Enable aExternal 1 interrupt.
• F Timer 0 interrupt.
ET0 : Enable
• EX0 : Enable External 0 interrupt.
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 Addressing modes
• Direct - MOV R0, 89 H, Eg 89 of TMOD
– operands 8 bit address field
– Internal data RAM and SFRS only
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• Indirect - ADD A, @ R0
e rs
– 16 bit addresses only in DPTR in e
– Address is stored in R0 or R1 or SP if 8bits

• Register Instructions E
g
n A, R
- ADD
– Operands in R o–ROof selected register bank. Register
7

a Dby two bank select bits of PSW

bank selected
0 7

•
a
RegisterFspecific (Register Implicit) RLA
• Immediate Mode ADD A, #100
• Indexed Addressing
 Addressing Modes
• Indexed Addressing
o m
– MOVC A, @A+DPTR . c
– JMP @ A + DPTR
rs
e
n e
– Used to access only programimemory
– Used for look up tableE n g
manipulations
not data

– Only PC or datao O – 16 bit storage registers allowed

pointer
a
– Base address Din PC or DPTR, relative addr in A
F a
 Identify the addressing modes
• MOV A,#50H
o m
• MOV A, R5 s . c
e r
• MOV DPTR,#nn
i n e
• MOV 90H, #0a5Hng
• O
MOV 0A8H,o77H
E
• a D
a
MOV @R1,#n
F
• MOV A, @R0
• MOVX @DPTR,A
• MOVC A, @A+PC
• Explain the internal and external program memory as well as data memory
of 8051 with the diagram showing their capacities.
• Draw the diagram to Interface Program memory of 16K x 8 EPROM to
8051and give its memory map. The address of memory map should start
from 0000H.
• Discuss about various addressing modes of 8051.
• Explain the interrupt structure. Mention the priority. Explain how least priority
is made as highest priority?
o m
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• Explain in 8051 instruction set to handle bit addressable RAM.
rs
• Draw and discuss the formats and bit definitions of the following SFR’s .(a)
e
IP(b) TMOD(c) TCON(d) SCON

in e
• (a) Explain the internal RAM organization of 8051? Discuss how switching
between register banks is possible?
n g
• What is the use of SFR? List out the SFR of 8051?

O E
• Discuss the advantages of microcontroller based systems over

D o
microprocessor based systems?
• (b) With a neat sketch discuss the internal architecture of 8051?
a a
Explain the Flags d program status word of 8051 microcontroller?
F
• Explain the different types of Interrupt in 8051.
• Discuss the register set of 8051
• Explain the addressing modes of 8051 microcontroller.
• Explain the different modes of operation of timer/counter in 8051.
• How does 8051 differentiate between the external and Internal prog mem