Instruction Set and

Programming of Intel
8085 Microprocessor
Instruction Set
• An instruction is a command given to the computer to
perform a specified operation on a given data.
• The instruction set is the collection of instructions
which the microprocessor is designed to execute.
• The assembly language program comprises of the
collection of instructions to perform a certain
operation.
• Different companies such as Intel, Motorola, etc. have
different instruction set.
 Instruction

Type of operation Length of Instruction

Data transfer/ Copy Instruction 1 Byte Instruction
Arithmetic Instruction 2 Byte Instruction
Logical Instruction
3 Byte Instruction
Branching Instruction

Machine control Instruction

 Data Transfer Instruction
• These instructions are used to transfer data from one
location to another, i.e. source to destination. It may
include:
 Register Register (MOV A, B)
 Register Memory (MOV M, r and MOV r, M
)
 Data Register (MVI r, data)
Arithmetic Instruction
• These instructions are used to perform arithmetic
operations like addition, subtraction, increment,
decrement. Example- ADD, SUB, INR, DAD, etc.
 Logical Instruction
• These instructions performs logical operations such as
AND, OR, compare, rotate. Example- ANA, XRA,
CMP, ORA, RAL.
Branching Instruction
• The instruction under this group performs conditional
and unconditional jump, subroutine call and return and
restart. Example- JMP, CALL, RST, etc.
I/O and Machine control Instruction
• This group of instruction includes instruction for
input/output ports, stack and machine control
operations. Example- IN, OUT, PUSH, POP, HLT, etc.
DATA FORMAT
• There are various techniques of specifying data for an
instruction. These can be defined as:
 Instruction itself includes 8 bit/16 bit data
 Instruction includes address of the memory location,
I/O port.
 Instruction has only one register.
 Instruction has two register.
 In some instruction data is implied.
ADDRESSING MODES
• Instruction has opcode and operand. There are different
techniques to specify operand in an instruction. These
techniques are called as addressing modes.
• Intel 8085 has the following addressing modes:
a) Direct addressing mode
b) Register addressing mode
c) Register indirect addressing mode
d) Immediate addressing mode
e) Implicit/Implied addressing mode
a) Direct addressing mode
• Address of the operand (data) is given in the
instruction itself.
• Example-

LDA 6000H Load the accumulator with the contents of the

memory location 6000H
STA 2400H Store the contents of the accumulator in the
memory location 2400H
IN 02 The data available on the 8 bit address of the
input port is moved to the accumulator
b) Register addressing mode
• Operand is one of the GPR or the accumulator.
• Opcode specifies the operation to be performed and
address of the registers.
• Operation takes place between registers.
• Example-
MOV A, B Move the content of the register B to register A

ADD B Add the content of the register B to the content of

the register A
c) Register Indirect addressing mode
• Address of the data is present as the content of the
another register pair.
• Example
LXI H, 2500H Load H-L pair with 2500 H

MOV A,M Move the content of the memory location whose address is
in H-L pair to the accumulator
HLT Halt

LXI H, 2500H Load H-L pair with 2500 H

ADD M Add the content of the memory location whose address is in

H-L pair to the content of the accumulator
HLT Halt
d) Immediate addressing mode
• In this addressing mode the operand (data) is specified
within the instruction itself.
• Example
MVI A,05 Move the data 05 into the accumulator

ADI 06 Add 06 to the content of the accumulator

LXI H, 2500 2500 is 16 bit data and is loaded into H-L pair
e) Implicit/ Implied addressing mode
• In this type of instruction, operand is the content of the
accumulator.
• No data, address of data, register are present in the
instruction.
• Example
CMA Complement the content of the accumulator

RAL Rotate accumulator left through carry

RAR Rotate accumulator right through carry

RLC Rotate accumulator left

 Symbols and Abbreviations
addr 16-bit address of the memory location
data 8-bit data
data 16 16-bit data
r,r1,r2 One of the register A, B, C, D, E, H, L
A, B, C, D, H, L 8-bit register
A Accumulator
M Memory whose address is in H-L pair
H Appearing at the end of a group of digits specifies
hexadecimal
rp Represents one of the register pair
B represents B-C pair
D represents D-E pair
H represents H-L pair
[] The content of the register identified within the brackets

[[]] The content of the memory location whose address is in the

register pair identified within the brackets
Data Transfer Group
Instruction Operation Machine
cycles
MOV A, B Move the content of register B to register A 1

MOV r, M Move the content of memory to register. 2

MOV M, r Move the content of the register to the memory 2

location addressed by H-L pair.

MVI r, data Move immediate data to the register 2

MVI M, data Move the immediate data to memory location 3

addresses by H-L pair

LXI rp, data 16 Load the register pair with the 16 bit data 3

LDA addr Load the accumulator with the content of the 4

specified address in the instruction
 STA addr Store the content of the accumulator in the specified 4
memory location
LHLD addr Load the content of the specified memory location in 5
the address to the L register and the content of the next
memory location is loaded into H.

SHLD addr Store the content of the L register in the specified 5

address in the instruction and the content of the H
register is stored in the next memory location.

LDAX rp Load the accumulator with the content of the address 2

stored in the rp

STAX rp Store the content of the accumulator in the memory 2

location whose address is in the register pair rp.

XCHG Exchange the contents of H-L pair with D-E pair. 1

Arithmetic Group
ADD rl, Add register to accumulator. [A] [A]+[r] 1

ADD M Add the content of the memory to accumulator 2

[A] [A]+[[H-L]]

ADI data Add immediate data to accumulator [A] [A]+data 2

ADC r The content of register r and carry status are added with 1
the content of the accumulator
DAD rp Add the content of register pair rp to the content of 3
H-L pair [H-L] [H-L]+[rp]

SUB r Subtract register from memory [A] [A]-[r] 1

SUB M Subtract memory from accumulator [A] [A]-[[H-L]] 2

SUI data Subtract immediate data from accumulator 2

[A] [A]-data
SBB r The content of register r and carry status are subtracted 1
from the content of the accumulator.
INR r Content of register r are incremented by one 1
[r] [r]+1
INR M Increment the content of memory location in H-L pair 3
by one [[H-L]] [[H-L]]+1

DCR r Decrement the content of register by one 1

[r] [r]-1
DCR M Decrement the content of memory location in H-L pair 3
by one [[H-L]] [[H-L]]-1

INX rp Increment the content of register pair rp by one 1

[rp] [rp]+1
DCX rp Decrement the content of register pair rp by one 1
[rp] [rp]-1
DAA Converts the content of accumulator from Hexadecimal to 1
Decimal
 Logical Group
ANA r The content of register r is ANDed with the content of accumulator 1

ANA M The content of the memory location addressed by H-L pair is ANDed 2
with content of accumulator

ANI data The data is ANDed with the content of the accumulator 2

ORA r The content of the register is ORed with the content of the 1
accumulator
ORA M The content of the memory location addressed by H-L pair is ORed 2
with content of accumulator

ORA data The data is ORed with the content of the accumulator 2

XRA r The content of the register r is EXCLUSIVE-ORed with the content 1

of the accumulator
XRA M The content of the memory location addressed by H-L pair is 2
EXCLUSIVE-ORed with content of accumulator

XRI data The data is EXCLUSIVE-ORed with the content of the 2

accumulator

CMA Complement the content of the accumulator 1

CMP r The content of the register r is subtracted with the content of the 1
accumulator and the status flag are set according to the result
CMP M The content of the memory location addressed by H-L pair is 2
subtracted with the content of the accumulator and the status flag
are set according to the result. The result of the accumulator
remains unchanged.
RLC The content of the accumulator is rotated left by one bit without 1
carry`
RRC The content of the accumulator is rotated right by one bit without 1
carry
RAL The content of the accumulator is rotated left by one bit with 1
carry
RAR The content of the accumulator is rotated right by one bit with 1
carry
 Branch Group
• The instruction in this group change the normal sequence of the
program.

Conditional

Branch Group

Unconditional

• Unconditional- The program is transferred to a specified memory

location unconditionally.
• Conditional- The program is transferred to a specified memory location
when certain condition is satisfied.
 Unconditional instructions
• JMP addr- Program jump to the instruction specified
by the address (label) unconditionally.
Conditional instructions
JZ addr Jump if the result is zero

JNZ addr Jump if the result is non-zero

JC addr Jump if there is a carry

JNC addr Jump if there is no carry

JP addr Jump if the result is plus

JM addr Jump if the result is minus

JPE addr Jump if even parity

JPO addr Jump if odd parity

Machine control Group
IN port-address The data available on the port is moved 03
to the accumulator

OUT port-address The content of the accumulator is 03

moved to the port specified by its
address

HLT The program execution is stopped 01

Problems
• WAP to place the content of the memory location
FC50H in register B and that of FC51 in register C.
The content of FC50 and FC51 are 11H and 12H.
• WAP to place 05 in the accumulator. Increment it by
one and store the result in the memory location
FC50H.
• WAP to add two numbers 49H and 56H which are
stored in memory location 2501H and 2502H and store
the result in 2503H.
• WAP to subtract two numbers 48 and 32 which are
stored in 2501H and 2502H and store the result in
2503H.
• WAP to find one’s complement of 96H which is stored in
2501H and store the result in 2502H.
• WAP to find the one’s complement of 5485H. The number
is stored in memory location 2501H, 2502H and the result
is to be stored in memory location 2503H and 2504H.
• WAP to find two’s complement of 96H which is stored in
2501H and store the result in 2502H.
• WAP to find the two’s complement of 5B8CH. The
number is stored in memory location 2501H, 2502H and
the result is to be stored in memory location 2503H and
2504H.
• WAP to find smaller of two numbers 56H and 32H. The
first number is stored in 2501H and second number is
stored in 2502H. The result is to be stored in 2503H.
• WAP to access data 33H and CCH from 01H and 08H.
Do the OR operation and transfer the resultant value to
port address 03H.
• WAP to access data 32H and 45H from 2501H and
2502H, add them and rotate the result right 3 times
and store the result in memory location 2503H.
• WAP to access data 33H and CCH from 2501H and
2502H. Do the AND operation and store the result in
memory location 2503H.