Porting The xv6 OS To The Nezha D1 RISC-V Board: Michael Engel Department of Computer Science Ntnu
Porting The xv6 OS To The Nezha D1 RISC-V Board: Michael Engel Department of Computer Science Ntnu
Michael Engel
Department of Computer Science
NTNU
https://multicores.org
Motivation
• Provide a basis for OS teaching and research
• Small and easy to understand for a single student
• Useful in emulation (qemu) as well as on real hardware
• Sufficiently complex to demonstrate important CPU
features
• Protection modes, virtual memory, interrupt handling,
system calls, …
• Enable students to do quantitative analysis on real HW
• Show students the challenges of running bare-metal OS
code on a real hardware system vs. an emulator
• Additional benefit:
• Providing simple example code for other OS porting
projects
Porting the xv6 OS to the Nezha D1 RISC-V Board 2
The xv6 OS
• Small teaching OS
• Developed since summer
2006 for MIT's OS course
• Inspiration: 6th Edition PDP11 Unix (1975)
• Used by Prof. John Lions at UNSW
(Australia) to teach OS engineering
• Lions’ book ("commentary") on the 6th
edition kernel source code [1]
Status of xv6
• RV64 version stable and used in many courses
• x86 version working, but no longer maintained
• The xv6 companion book [2] gives many details on the structure
and implementation as well as on RISC-V
• Read it together with the RISC-V specs and RISC-V Reader
Nezha/D1 hardware
• Hardware
• Raspberry Pi form factor
• Allwinner D1 SoC @ 1 GHz
• 0.5 GB, 1 GB or 2 GB DDR3 RAM
• 256 MB NAND Flash
• Separate Wifi+Bluetooth
chip – XRadioTech XR829
• D1 SoC [4]
• Single Core RV64GCV
• HiFi4 DSP
• Display/video engine
• Numerous peripherals
(many similar to Allwinner ARM SoCs)
Nezha/D1 CPU
• T-Head XuanTie C906 CPU core [4]
Use in education
• Course in OS engineering:
• Learn about the internals of an OS kernel
• Interaction of hardware and software
• Interrupts, Virtual memory management, DMA, …
• Implement new OS features for xv6
• Recreate some defining features of Unix evolution as well as
some new ideas from research papers
• Low-level programming:
• Assembler and C bare-metal programming for RISC-V
• Linux device driver development
• Nezha was not available in time for the course
• uses Raspberry Pi 4’s for now
• Computer architecture:
• Explore performance evaluation, cache effects, power/energy…
Porting the xv6 OS to the Nezha D1 RISC-V Board 14
Work in progress
• More drivers
• SD card
• future work: Ethernet, video, USB
• Better debugging facilities
• JTAG/openocd
• Porting additional resource-aware operating systems Project Oberon on RV32
References
1. John Lions, Lions’ Commentary on UNIX 6th Edition,
Peer to Peer Communications, ISBN: 1-57398-013-7; 1st edition (June 14, 2000).
Online version of Lions’ Commentary: http://www.lemis.com/grog/Documentation/Lions/
Online version of the 6th Edition Unix source code: http://v6.cuzuco.com/
2. Russ Cox, Frans Kaashoek, Robert Morris, xv6: a simple, Unix-like teaching operating system
First RISC-V version: https://github.com/mit-pdos/xv6-riscv-book
Book LaTeX source code: https://github.com/mit-pdos/xv6-riscv-book
3. xv6 ports:
Raspberry Pi 1: https://github.com/zhiyihuang/xv6_rpi_port
Raspberry Pi 2: https://github.com/zhiyihuang/xv6_rpi_port
Kendryte K210: https://github.com/HUST-OS/xv6-k210
RISC-V RV32: https://github.com/michaelengel/xv6-rv32
4. D1 documentation: https://linux-sunxi.org/D1
5. Nezha D1 bare metal examples: https://github.com/bigmagic123/d1-nezha-baremeta
6. xv6 port to the Nezha/D1: https://github.com/michaelengel/xv6-d1
7. Project Oberon port to RISC-V: https://github.com/solbjorg/oberon-riscv
8. T-Head processor core source code (C906, C910, E902, E906): https://github.com/T-head-Semi
C910 processor core paper: https://ieeexplore.ieee.org/document/9138983
9. SystemC RV32/RV64 models:
http://www.informatik.uni-bremen.de/agra/systemc-verification/riscv-vp.html
Paper: http://www.informatik.uni-bremen.de/agra/doc/konf/2018FDL_RISCV_VP.pdf