Microprocessor Assignment (Assignment-2)

Q1. Which one of the following statements is correct?

(a) Microprocessor is more suitable for general purpose and micro-controller is more suitable for special
purpose and custom-built application
(b) Microprocessor and microcontroller are suitable for general purpose application
(c) Microprocessor and microcontroller are suitable for special purpose application
(d) Microprocessor and microcontroller are suitable for special purpose and custom-built application

Q2. 8085 processor consists of

(a) 8 bit data bus, 8 bit address bus. (b) 16 bit data bus, 16 bit address bus
(c) 16 bit data bus, 8 bit address bus (d) 8 bit data bus, 16 bit address bus

Q3. The memory capacity of 8085 processor is

(a) 64KB (b) 1MB (c) 128 KB (d) 526KB

Q4. A specially designed processor has 16 bit registers and the address bus is of 32 bit. Then the memory
capacity is ________.

(a) 4 GB (b) 8 GB (c) 6 GB (d) 16 GB

Q5. In 8085 microprocessor, after the execution of logical operation, the content will be stored in

(a) Stack pointer (b) Accumulator (c) Program counter (d) None of the above

Q6. Which of the following is the bi-directional bus.

(a) Control bus (b) Address bus (c) Data bus (d) none.

Q7. Which of the following register is used to store the address of next instruction to be executed.

(a) Stack Pointer (b) Accumulator (c) Flag Register Pair (d) Program counter

Q8. In 8085 processor flag register is

(a) 8 bit register (b) 16 bit register (c) 32 bit register (d) 4 bit register

Q9. Which of the following register is called as programmable register

(a) Flag register (b) Stack pointer (c) Accumulator (d) temp register

Q10. The arithmetic and logical instructions will be executed in which of the unit in 8085 up.

(a) CU (b) Accumulator (c) ALU (d) None of these

Q11. Which of the following is high priority interrupt in 8085 Microprocessor.

a) INTR b) RST 5.5 c) RST 6.5 d) TRAP

Q12. Which of the following register is used to represent the status of logical/arithmetic operation in 8085 up.

(a) Flag register (b) BC Register Point (c) Accumulator (d) temp register

Q13.Which of the following statement is true regarding flag register.

Statement2: If result of logical/arithmetic consists of odd number of 1’s then the parity flag becomes 0.

Statement3: Once the zero flag turns on then sign-flag must be zero.

(a) 1 and 2 (b) 2 and 3 (c) 1 and 3 (d) all of the above.

Q14. The addressing mode in which the machine language instruction itself includes the data is called as

(a) Immediate (b) Indirect (c) Direct (d) None of these.

Q15. Which of the following instruction is of “Register Indirect Addressing Mode”.

(a) MOV A,B (b) LDA 2600H (c) MOV A,M (d) MVI A,25H

Q16. Which of the following instruction is of 3 byte instruction.

(a) MOV A,B (b) LDA 2600H (c) MVI A,25H (d) None of these

Q17. “MVI B, 25H” is ____________ type instruction

(a) 1 byte (b) 2 byte (c) 3 byte (d) None of these

Q18. In 8085 microprocessor, HL Register pair is used for storing

(a) Address of memory location (b) Data (c) Address of next instruction (d) Current instruction

Q19. The accumulator of a microprocessor contains . If data ( is added then the contents of flag register are
given by

(a) (b) (c) (d)

Q20. Consider the following 8085 instruction

Q21. Which of the following is the vectored address of RST 5.5 interrupt signal ?
a) 0036 H b) 002C H c) 0034 H d) 0000 H

Q22. Find the content of accumulator after the execution of 8085 microprocessor program code shown below:
LXI H, 7500H
MVI M, FF H
LDA 7500 H
CMA
INR A
STA 7500 H
HLT
Choose the best option regarding the code.
(a) 50H b) 01H c) 10H d) 11H

Q23. A single instruction to clear the lower 4-bits of the accumulator is 8085 microprocessor is
(a) XRI 0F H (b) ANI 0F H (c) XRI F0 H (d) ANI F0 H

Q24. Which of the following interrupt is maskable but not vectored ?

a) RST 5.5 b) RST 6.5 c) TRAP d) INTR

Q25. What should be the condition for lower 8 lines of 16 lines address bus to carry only 8 bit data.

a). ALE=1 b). ALE=0

Q26. Which of the following signal (PIN) is used to access the data from IO devices to 8085 processor.
a). RD b). WR
Q27. Match the following List-I. List-II
p) RAM. 1) Erased Optically
q) PROM. 2) Volatile
r) EPROM. 3) Only Once Programmable
s) EEPROM. 4) Electrically erasable memory

(a) p-2, Q-3, r-1, s-4 (b) p-4, Q-2, r-1, s-3 (c) p-3, Q-2, r-1, s-4 (d) p-1, Q-2, r-3, s-4

Q28.Which of the following memory type is programmed only once according to customer requirement.

(a) EPROM (b) PROM (c) EEPROM (d) ROM

Q29. Which one of the following is not an Addressing Mode in 8085?

a) Immediate b) Indirect c) Register d) Segment

Q30. Consider the following statements regarding Programming Logic Controller (PLC) :

1) It was developed to replace the microprocessor

2) Wiring between devices and relay contacts are done in its program

3) Its IO interface section connects it to external field devices

4) It requires extensive wiring in its application.

Which one of the above statements are correct?

a) 1 and 3 b) 1 and 4 c) 2 and 3 d) 2 and 4

Q31. HOLD signal refers in 8085 processor ??

a). The processor terminates the execution of program.

b). It is request from the processor to IO devices .

c). It is the request from IO devices to processor to access address and data bus of processor during Direct
Memory Access.

d). It is the request from IO devices to processor to access address bus of processor during Direct Memory
operation

Q32. When “PUSH” instruction is executed .

b). The content of the stack pointer is decremented by 2

c). The content of the stack pointer is incremented by 1

d). The content of the stack pointer is decremented by 1

Q33. Which of the following statement is true about Relay system.

a). Relays consists of both control circuit and load circuit.

b). Relays requires lot of wiring for external connections.

c).Lot of heat is generated in relay system during operation.

d).All of the above.

Q34. Which one of the following statements is correct?A micro-controller differs from me microprocessor in
that it has

a. Both on-chip memory and on-chip ports. b. Only on chip memory but not on chip ports.

c. Only on chip port but not on chip memory. d. Neither on chip memory nor on chip Ports.

Q35. If the status of the control lines S1 and S2 are LOW, then 8085 microprocessor is performing

a. Reset operation b. HOLD operation

c. Halt operation d. Interrupt acknowledge

Q36. Which one of the following statements is correct? The ALE line of Intel 8085 microprocessor is used to

a. Latch the output of an I/O instruction into an external latch.

b. Deactivate the chip-select signal from memory devices.

c. Latch the 8-bits of address lines AD7- ADo into an external latch.

d. Find the interrupt enables status of the TRAP input.

Q37. Some of the pins of 8085 CPU and Day functions are listed below. Identify the correct answer that matches
the pins to their respective functions:

P. RST 7.5 1. Select IO or memory

Q. HOLD. 2. Demultiplexes the address and data bus

R. IO/M. 3. Is a vectored interrupt

5. Is a clock

6. Selects BCD mode of operation

a. P-3, Q-2, R-1, S-4 b. P-4, Q-1, R-5, S-3

Q38.Which of the following flag conditions are not available in 8085 processor ?

a. Zero flag. b. Parity flag. c. Overflow flag. d. Auxiliary carry flag.

Q39. In 8085 microprocessor

a. P flag is set , when the result has odd parity. b. P flag is reset , when the result has odd parity.

c. P flag is reset , when the result has even parity. d. Any of above.

Q40. The sign-flag of 8085 microprocessor is set to 1, if

a. The result of an arithmetic operation is zero.

b. The most significant bit of the result of an arithmetic or logic operation is 1.

c. There is a carry from addition or borrow from subtraction.

d. The result of an operation carries four 1’s in accumulator.

Q41. What is the vectored address of interrupt RST5??

a. 0040 H b. 0028 H

c. 0005 H d. 0008 H

Q42. An interrupt in which the external device supplies it’s address as well as the interrupt request is known as

a. Vectored interrupt. b. Maskable interrupt.

c. Polled interrupt. d. Non-Maskable interrupt

Q43. Assertion (A) : The data bus and address bus of 8085 microprocessor are multiplexed.
Reason (R) : Multiplexing reduces number of pins.
a. Both A and R are correct and R is the correct explanation of A.
b. Both A and R are correct but R is not correct explanation of A.
c. Only A is correct.
d. Only R correct.
Q44. A stack is
a. An 8-bit register in the microprocessor.
b. An 16-bit register in the microprocessor.
c. A set of memory location in Read/Write memory reserved for storing information temporarily during the
execution of a program.
d. A 16-bit memory address stored in the program counter.
Q45. Statement 1 : Program counter is the register which stores the address of the next instruction to be executed.
Statement 2 : Stack pointer stores the address of the top of the stack.
 Out of these two statements , which statements is/are true ??
a. Only P b. Only Q. c. Both P and Q. d. None of them.
Q46. A 4KB RAM has
a. 12 address lines/bits.
b. 8 data lines/bits (capacity of each memory location).
c. Both A and B.
d. None of the above.
Q47. A memory system of size 16 KB is required to be design using memory chips , which have 12 address
lines/bits and 4 data lines /bits (capacity of memory location) . Then the number of such chips required to design
the memory system is
A. 2 B. 4 C. 8 D. 16.
Q48. In 8085 Microprocessor “STACK” works on the principle
a. LIFO (Last in First out). b. FIFO (First in First out).
c. Both A and B. d. None

Q49. Assertion (A) : The DMA technique is more efficient than the interrupt-driven technique for high volume
I/O data transfer.
Reason (R) : The DMA technique does not make use of the interrupt mechanism.
a. Both A and R are true and R is the correct explanation of A.
b. Both A and R are true but R is not the correct explanation of A.
c. A is true but R is false.
d. A is false but R is true.
Q50. Match List-i with List-ii and select the correct answer using the codes given below the lists.
List -1 List-2
A. Immediate addressing. 1. LDA 3000 H
B. Implied addressing 2. MOV A,B
C. Register addressing 3. LXI H,2050 H
D. Direct addressing 4. CMA
a). A-3 B-4 C-2 D-1. c) A-3 B-1 C-2 D-4
b). A-2 B-1 C-3 D-4 d) A-2 B-4 C-3 D-1

Assignment Key