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Digital Electronics and Logic Design Solved MCQs (Set-20)

This document contains 500 multiple choice questions about digital electronics and logic design. The questions cover topics such as combinational vs sequential circuits, flip-flops, counters, shift registers, encoders, decoders, and synchronous vs asynchronous circuits. Correct answers are provided for each question. The purpose is to test understanding of fundamental concepts in digital logic design.

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0% found this document useful (0 votes)
534 views8 pages

Digital Electronics and Logic Design Solved MCQs (Set-20)

This document contains 500 multiple choice questions about digital electronics and logic design. The questions cover topics such as combinational vs sequential circuits, flip-flops, counters, shift registers, encoders, decoders, and synchronous vs asynchronous circuits. Correct answers are provided for each question. The purpose is to test understanding of fundamental concepts in digital logic design.

Uploaded by

Kunal
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Digital Electronics and Logic Design MCQs [set-20]

476. The dynamic hazard problem occurs in

A. combinational circuit alone

B. sequential circuit only

C. both (a) and (b)

D. none of these
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Answer: C
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477. A n-stage ripple counter will count up to
q
A. 2n c
B. 2n-1
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C. n

D. 2n-1

Answer: A

478. The clock signals are used in sequential logic circuits to

A. tell the time of the day

B. tell how much time has elapsed since the system was turned on

C. carry parllel data signals

D. synchroniz e events in various parts of system

Answer: D

479. 74L5138 chip functions as

A. decoder/demu ltiplexer

B. encoder

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C. multiplexer

D. demultiple xer

Answer: A

480. A sequential circuit outputs a ONE when an even number (> 0) of


one's are input; otherwise the output is ZERO. The minimum number of
states required is

A. 0

B. 1
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C. 2
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D. none of these a
Answer: C
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481. A shift register can be used forM
A. digital delay line

B. serial to parallel conversion

C. parallel to serial conversion

D. all of these

Answer: D

482. Popular application of flip-flop are

A. transfer register

B. shift registers

C. counters

D. all of these

Answer: D

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483. For which of the following flip-flops, the output is clearly defined for
all combinations of two inputs ?

A. q type flip-flop

B. r-s flip-lop

C. j-k flip-lop

D. d flip-flop

Answer: C

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484. When a large number of analog signals are to be converted an analog
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multiplexer is used. In this case most suitable A.D. converter will be
a
A. ripple carry counter type
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B. dual stop type c
C. forward counter type M
D. successive approxima tion type

Answer: D

485. To build a mod-19 counter the number of flip-flops required is

A. 3

B. 5

C. 7

D. 9

Answer: B

486. The astable multivibrator has

A. two quasi stable states

B. two stable states

C. one stable and one quasi-stable state

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D. none of these

Answer: A

487. How many bits are required to encode all twenty six letters, ten
symbols, and ten numerals ?

A. 5

B. 6

C. 10

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Answer: B
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488. The functional difference between S-R flip-flop and J-K flip-flop is that
J- K flip-flop c
A. is faster than s- r flip-flop
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B. has a feed- back path

C. accepts both inputs 1

D. both (a) and (b)

Answer: C

489. In a positive edge triggered JK flip-flop, a low J and low K produces

A. no change

B. low state

C. high state

D. none of thes

Answer: A

490. When an inverter is placed between both inputs of an SR flip-flop,


then resulting flip-lop is

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A. jk flip-flop

B. d flip-flop

C. sr flip-flop

D. master slave jk flip-flop

Answer: B

491. A 2 MHz signal is applied to the input of a J-K lip-lop which is


operating in the 'toggle' mode. The frequency of the signal at the output
will be
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A. 1 mhz
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B. 2 mhz a
C. 6 mhz
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D. 8 mhz c
Answer: D
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492. The master slave JK lip-flop is effectively a combination of

A. a sr flip-flop and a t flip- flop

B. an sr flip- lfop and a d flip-flop

C. a t flip-flop and a d flip- flop

D. two d flip- flops

Answer: A

493. It is difficult to design asynhronous sequential circuit because

A. external clock is to be provided

B. it is more complex

C. both (a) and (b)

D. generally they involve stability problem

Answer: D

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494. A stable multivibrator is used as

A. comparator circuit

B. demultiplexe r

C. frequency to voltage converter

D. voltage to frequency converter

Answer: A

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495. How many flip-flop are needed to divide the input frequency by 64 ?
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A. 2
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B. 5

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C. 6
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D. 8
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Answer: C

496. 41: In a ripple counter using edge triggered JK flfp-flops, the pulse
input is applied to the

A. clock input of all flip-flops

B. clock input of one flip- flops

C. j and k inputs of all flip-flops

D. j and k inputs of one flip- flop

Answer: C

497. The number of clock pulses needed to shift one byte of data from
input to the output of a 4-bit shift register is

A. 10

B. 12

C. 16

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D. 32

Answer: C

498. The main difference between JK and RS flip-flop is that

A. jk flip flop needs a clock pulse

B. there is a feedback in jk lip-lop

C. jk flip-flop accepts both inputs as 1

D. jk flip-flop is acronym of junction cathode multivibra tor


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Answer: C
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a to transform decimal number
499. Which of the following unit will choose
to binary code ?
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A. encoder

B. decoder
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C. multiplexer

D. counter

Answer: A

500. The flip-flops which operate in synchronism with external clock


pulses are known as

A. synchronous flip-flop

B. asynchronou s flip-flop

C. either of the above

D. none of these

Answer: A

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Take Quick Mock/Practice test on this topic HERE

For Discussion / Reporting / Correction of any MCQ please visit discussion page by clicking on
'answer' of respective MCQ.

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