PD - 95332B

IRF2804PbF
IRF2804SPbF
Features IRF2804LPbF
l Advanced Process Technology HEXFET® Power MOSFET
l Ultra Low On-Resistance
D
l 175°C Operating Temperature VDSS = 40V
l Fast Switching
l Repetitive Avalanche Allowed up to Tjmax
l Lead-Free
RDS(on) = 2.0mى
G

Description S ID = 75A
This HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low
on-resistance per silicon area. Additional features
of this design are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating. These features combine
to make this design an extremely efficient and
reliable device for use in a wide variety of other
applications. TO-220AB D2Pak TO-262
IRF2804PbF IRF2804SPbF IRF2804LPbF

Absolute Maximum Ratings

Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 270 A
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (See Fig. 9) 190
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package Limited) 75
IDM Pulsed Drain Current c 1080
PD @TC = 25°C Maximum Power Dissipation 300 W
Linear Derating Factor 2.0 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy (Thermally Limited) d 540 mJ
EAS (tested) Single Pulse Avalanche Energy Tested Value i 1160
IAR Avalanche Current c See Fig.12a,12b,15,16 A
EAR Repetitive Avalanche Energy h mJ
TJ Operating Junction and -55 to + 175 °C
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 screw 10 lbf•in (1.1N•m)
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.50 l °C/W
RθCS Case-to-Sink, Flat, Greased Surface 0.50 –––
RθJA Junction-to-Ambient ––– 62
RθJA Junction-to-Ambient (PCB Mount, steady state)j ––– 40

HEXFET® is a registered trademark of International Rectifier.

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IRF2804/S/LPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250µA
∆ΒVDSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.031 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) SMD Static Drain-to-Source On-Resistance ––– 1.5 2.0 mΩ VGS = 10V, ID = 75A f
RDS(on) TO-220 Static Drain-to-Source On-Resistance ––– 1.8 2.3 VGS = 10V, ID = 75A f
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 130 ––– ––– S VDS = 10V, ID = 75A
IDSS Drain-to-Source Leakage Current ––– ––– 20 µA VDS = 40V, VGS = 0V
––– ––– 250 VDS = 40V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 200 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -200 VGS = -20V
Qg Total Gate Charge ––– 160 240 nC ID = 75A
Qgs Gate-to-Source Charge ––– 41 62 VDS = 32V
Qgd Gate-to-Drain ("Miller") Charge ––– 66 99 VGS = 10V f
td(on) Turn-On Delay Time ––– 13 ––– ns VDD = 20V
tr Rise Time ––– 120 ––– ID = 75A
td(off) Turn-Off Delay Time ––– 130 ––– RG = 2.5Ω
tf Fall Time ––– 130 ––– VGS = 10V f
LD Internal Drain Inductance ––– 4.5 ––– nH Between lead, D

6mm (0.25in.)
LS Internal Source Inductance ––– 7.5 ––– from package G

and center of die contact S

Ciss Input Capacitance ––– 6450 ––– pF VGS = 0V

Coss Output Capacitance ––– 1690 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 840 ––– ƒ = 1.0MHz, See Fig. 5
Coss Output Capacitance ––– 5350 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance ––– 1520 ––– VGS = 0V, VDS = 32V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 2210 ––– VGS = 0V, VDS = 0V to 32V
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 270 MOSFET symbol D

(Body Diode) A showing the

ISM Pulsed Source Current ––– ––– 1080 integral reverse G

(Body Diode)c p-n junction diode.

f
S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 75A, VGS = 0V
trr Reverse Recovery Time ––– 56 84 ns TJ = 25°C, IF = 75A, VDD = 20V
Qrr Reverse Recovery Charge ––– 67 100 nC di/dt = 100A/µs f
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Repetitive rating; pulse width limited by † Limited by T Jmax , see Fig.12a, 12b, 15, 16 for typical repetitive
max. junction temperature. (See fig. 11). avalanche performance.
‚ Limited by TJmax, starting TJ = 25°C, ‡ This value determined from sample failure population. 100%
L=0.24mH, RG = 25Ω, IAS = 75A, VGS =10V. tested to this value in production.
Part not recommended for use above this value. ˆ This is applied to D 2Pak, when mounted on 1" square PCB
ƒ ISD ≤ 75A, di/dt ≤ 220A/µs, VDD ≤ V(BR)DSS, ( FR-4 or G-10 Material ). For recommended footprint and
TJ ≤ 175°C. soldering techniques refer to application note #AN-994.
„ Pulse width ≤ 1.0ms; duty cycle ≤ 2%. ‰ Max R DS(on) for D2Pak and TO-262 (SMD) devices.
… Coss eff. is a fixed capacitance that gives the same Š TO-220 device will have an Rth value of 0.45°C/W.
charging time as Coss while VDS is rising from 0 to 80%
VDSS.
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 IRF2804/S/LPbF

10000 10000
VGS
TOP 15V
V
VGS
GS
TOP 15V
10V TOP 15V
10V
8.0V 10V
8.0V
ID, Drain-to-Source Current (A)

7.0V 8.0V

ID, Drain-to-Source Current (A)

7.0V
1000 6.0V 7.0V
6.0V
5.5V 6.0V
5.5V
5.0V 5.5V
5.0V
BOTTOM 4.5V 1000
BOTTOM 5.0V
4.5V
BOTTOM 4.5V

100

100
10
4.5V 4.5V
20µs PULSE WIDTH 20µs PULSE WIDTH
Tj = 25°C Tj = 175°C
1 10
0.1 1 10 100 0.1 1 10 100
VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 300
G fs , Forward Transconductance ( S)
ID, Drain-to-Source Current (Α)

250 T J = 25°C
T J = 175°C
100 200

150 T J = 175°C
T J = 25°C
10 100

50
VDS = 10V VDS = 10V
20µs PULSE WIDTH 20µs PULSE WIDTH
1 0
4.0 5.0 6.0 7.0 8.0 9.0 0 40 80 120 160 200
VGS, Gate-to-Source Voltage (V) ID, Drain-to-Source Current (A)

Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance

vs. Drain Current

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 IRF2804/S/LPbF

12000 20
VGS = 0V, f = 1 MHZ ID= 75A
Ciss = Cgs + Cgd, Cds SHORTED
VDS= 32V

VGS , Gate-to-Source Voltage (V)

10000 Crss = Cgd
16 VDS= 20V
Coss = Cds + Cgd
VDS= 8.0V
C, Capacitance (pF)

8000
12
Ciss
6000
8
4000

4
2000 Coss

Crss
0
0
0 40 80 120 160 200 240
1 10 100
Q G Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance vs. Fig 6. Typical Gate Charge vs.

Drain-to-Source Voltage Gate-to-Source Voltage

1000.0 10000

OPERATION IN THIS AREA

LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)

T J = 175°C
100.0 1000

100µsec

1msec
10.0 100

10msec

1.0 10
T J = 25°C Tc = 25°C
Tj = 175°C
VGS = 0V Single Pulse
0.1 1
0.2 0.6 1.0 1.4 1.8 2.2 0 1 10 100
VSD, Source-toDrain Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage

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 IRF2804/S/LPbF

300 2.0
ID = 75A

RDS(on) , Drain-to-Source On Resistance

VGS = 10V
250 Limited By Package
ID, Drain Current (A)

200 1.5

(Normalized)
150

100 1.0

50

0.5
0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
25 50 75 100 125 150 175
TJ , Junction Temperature (°C)
T C , Case Temperature (°C)

Fig 9. Maximum Drain Current vs. Fig 10. Normalized On-Resistance

Case Temperature vs. Temperature

D = 0.50
Thermal Response ( Z thJC )

0.1 0.20
0.10
0.05

0.01 0.02
0.01

0.001 SINGLE PULSE

( THERMAL RESPONSE ) Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-008 1E-007 1E-006 1E-005 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRF2804/S/LPbF

15V
1200

EAS , Single Pulse Avalanche Energy (mJ)

ID
TOP 31A
L DRIVER 1000
VDS 53A
BOTTOM 75A
RG D.U.T 800
+
V
- DD
IAS A
VGS
20V 600
tp 0.01Ω

400
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS 200
tp

0
25 50 75 100 125 150 175
Starting T J , Junction Temperature (°C)

I AS

Fig 12c. Maximum Avalanche Energy

Fig 12b. Unclamped Inductive Waveforms
vs. Drain Current
QG
10 V
QGS QGD
4.0

VG
VGS(th) Gate threshold Voltage (V)

ID = 250µA
Charge 3.0

Fig 13a. Basic Gate Charge Waveform

Current Regulator
Same Type as D.U.T. 2.0

50KΩ

12V .2µF
.3µF

+
V
D.U.T. - DS 1.0
-75 -50 -25 0 25 50 75 100 125 150 175
VGS
T J , Temperature ( °C )
3mA

IG ID
Current Sampling Resistors

Fig 14. Threshold Voltage vs. Temperature

Fig 13b. Gate Charge Test Circuit
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 IRF2804/S/LPbF

1000
Duty Cycle = Single Pulse

Allowed avalanche Current vs

Avalanche Current (A)

100 0.01 avalanche pulsewidth, tav

assuming ∆ Tj = 25°C due to
avalanche losses
0.05
0.10

10

1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

Fig 15. Typical Avalanche Current Vs.Pulsewidth

600 Notes on Repetitive Avalanche Curves , Figures 15, 16:

TOP Single Pulse (For further info, see AN-1005 at www.irf.com)
BOTTOM 10% Duty Cycle 1. Avalanche failures assumption:
500 ID = 75A Purely a thermal phenomenon and failure occurs at a
EAR , Avalanche Energy (mJ)

temperature far in excess of T jmax. This is validated for

every part type.
400 2. Safe operation in Avalanche is allowed as long asT jmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
300 Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
200
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
100 6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
0 tav = Average time in avalanche.
25 50 75 100 125 150 175 D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav ) = Transient thermal resistance, see figure 11)
Starting T J , Junction Temperature (°C)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 16. Maximum Avalanche Energy
vs. Temperature
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IRF2804/S/LPbF

Driver Gate Drive

P.W.
D.U.T P.W.
Period D=
Period
+

ƒ
*
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚ Recovery Body Diode Forward
-
„ + Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • dv/dt controlled by RG V DD Re-Applied

• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• I SD controlled by Duty Factor "D" - Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

RD
V DS

V GS
D.U.T.
RG
+
-V DD

10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

Fig 18a. Switching Time Test Circuit

VDS
90%

10%
VGS
td(on) tr t d(off) tf

Fig 18b. Switching Time Waveforms

8 www.irf.com
 IRF2804/S/LPbF

TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

TO-220AB Part Marking Information

(;$03/( 7+,6,6$1,5)
/27&2'( ,17(51$7,21$/ 3$57180%(5
$66(0%/('21:: 5(&7,),(5
,17+($66(0%/</,1(& /2*2
'$7(&2'(
1RWH3LQDVVHPEO\OLQHSRVLWLRQ <($5 
$66(0%/<
LQGLFDWHV/HDG)UHH /27&2'( :((.
/,1(&

Notes:
1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/datasheets/data/auirf2804.pdf
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
www.irf.com 9
IRF2804/S/LPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)

D2Pak Part Marking Information

7+,6,6$1,5)6:,7+ 3$57180%(5
/27&2'( ,17(51$7,21$/
$66(0%/('21:: 5(&7,),(5 )6
,17+($66(0%/</,1(/ /2*2
'$7(&2'(
$66(0%/< <($5 
/27&2'( :((.
/,1(/

25
3$57180%(5
,17(51$7,21$/
5(&7,),(5 )6
/2*2 '$7(&2'(
3 '(6,*1$7(6/($')5((
352'8&7237,21$/
$66(0%/< <($5 
/27&2'(
:((.
$ $66(0%/<6,7(&2'(

Notes:
1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/datasheets/data/auirf2804.pdf
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
10 www.irf.com
 IRF2804/S/LPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)

TO-262 Part Marking Information

(;$03/( 7+,6,6$1,5//
/27&2'( 3$57180%(5
$66(0%/('21:: ,17(51$7,21$/
5(&7,),(5
,17+($66(0%/</,1(& /2*2
1RWH3LQDVVHPEO\OLQH '$7(&2'(
SRVLWLRQLQGLFDWHV/HDG)UHH $66(0%/< <($5 
/27&2'( :((.
/,1(&

OR
3$57180%(5
,17(51$7,21$/
5(&7,),(5
/2*2
'$7(&2'(
3 '(6,*1$7(6/($')5((
$66(0%/< 352'8&7237,21$/
/27&2'( <($5 
:((.
$ $66(0%/<6,7(&2'(

Notes:
1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/datasheets/data/auirf2804.pdf
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
www.irf.com 11
IRF2804/S/LPbF
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)

TRR

1.60 (.063)
1.50 (.059)
1.60 (.063)
4.10 (.161) 1.50 (.059)
3.90 (.153) 0.368 (.0145)
0.342 (.0135)

FEED DIRECTION 1.85 (.073) 11.60 (.457)

1.65 (.065) 11.40 (.449) 24.30 (.957)
15.42 (.609)
23.90 (.941)
15.22 (.601)
TRL
1.75 (.069)
10.90 (.429) 1.25 (.049)
10.70 (.421) 4.72 (.136)
16.10 (.634) 4.52 (.178)
15.90 (.626)

FEED DIRECTION

13.50 (.532) 27.40 (1.079)

12.80 (.504) 23.90 (.941)

330.00 60.00 (2.362)

(14.173) MIN.
MAX.

30.40 (1.197)
NOTES : MAX.
1. COMFORMS TO EIA-418. 26.40 (1.039) 4
2. CONTROLLING DIMENSION: MILLIMETER. 24.40 (.961)
3. DIMENSION MEASURED @ HUB.
3
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

TO-220AB package is not recommended for Surface Mount Application.

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 05/2010
12 www.irf.com
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