Department of Cse CP7103 Multicore Architecture Unit - 2, DLP in Vector, Simd and Gpu Architectures 100% THEORY Question Bank
Department of Cse CP7103 Multicore Architecture Unit - 2, DLP in Vector, Simd and Gpu Architectures 100% THEORY Question Bank
DEPARTMENT OF CSE
CP7103 Multicore Architecture
UNIT – 2, DLP in VECTOR, SIMD AND GPU ARCHITECTURES
100% THEORY
QUESTION BANK
Vector architecture
SIMD instruction set extensions for multimedia
Graphics Processing Units
Detecting and Enhancing Loop Level Parallelism
Case studies.
74. What is the relation between chime clock cycles and vector length?
75. Write the disadvantage in chime model.
76. Expand VLR, SSE, MVL and VMR.
77. Explain briefly about strip mining.
78. What is the use of Vector mask register?
79. What is vector mask control?
80. What is a memory bank?
81. What is the use of memory bank?
82. How a multi-dimensional array can be handled in vector architecture?
83. What is gather scatter?
84. Write a short note on AVX.
85. Expand these instruction VADDPD, VSUBPD, VMULPD and VDIVPD.
86. Write short note on GFlOp and FlOp.
87. Define attainable GFLOP/Sec.
88. What is a thread block?
89. What is the use of multithreaded SIMD processor?
90. Write the extended function call syntax for the function name that runs on the GPU.
91. What dimGRID and dimBLOCK represents in GPU program?
92. What GRID in GPU.
93. What are the Program abstractions?
94. Mention the Machine objects.
95. What are the processing hardware in GPUs?
96. What are the Memory hardware available in GPUs?
97. Write a short note on WRAP.
98. What is giga thread engine?
99. Write a short note on PTX instruction.
100. Write a short note on global, local and shared memories in GPUs