An Introduction to System Programming - Based

on the PDPll
Macmillan Computer Science Series

Consulting Editor
Professor F. H. Sumner, University of Manchester

S.T . Allworth, Introduction to Read-time Software Design

Ian O . Angell , A Practical Introduction to Computer Graphics
G .M . Birtwistle , Discrete Event Modelling on Simula
T.B . Boffey, Graph Theory in Operations Research
Richard Bornat, Understanding and Writing Compilers
J.K. Buckle, The ICL 2900 Series
J.K. Buckle, Software Configuration Management
J.C. Clule y, Interfacing to Microprocessors
Robert Cole, Computer Communications
Derek Coleman, A Structured Programming Approach to Data"
Andrew J. T . Colin, Fundamentals of Computer Science
Andrew J .T. Colin, Programming and Problem-solving in Algol 68*
S.M . Deen, Fundamentals of Data Base Systems"
P.M. Dew and K.R. James, Introduction to Numerical Computation in Pascal
K.C.E. Gee, Introduction to Local Area Computer Net works
J. B. Gosling, Design of Arithmetic Units for Digital Computers
David Hopkin and Barbara Moss, Automata"
Roger Hutty, Fortran for Students
Roger Hutty, Z80 A ssembly Language Programm ing for Studen ts
Roland N. Ibbett, The Architecture of High Performance Computers
H. Kopetz, Software Reliability
E. V. Krishnamurthy, Introductory Theory of Computer Science
Graham Lee, From Hardware to Software: an introduction to computers
A.M . Lister, Fundamentals of Operating Systems, second edition *
G.P. McKeown and V.J. Rayward -Smith, Mathematicsfor Computing
Brian Meek , Fortran, PL I1 and the Algols
Derrick Morris, An Introduction to System Programming - Based on the PDPll
Derrick Morris and Roland N. Ibbett, The MU5 Computer System
John Race, Case Studies in Systems Analysis
Colin J. Theaker and Graham R. Brookes, A Practical Course on Operating
Systems
B.S . Walker, Understanding Microprocessors
Peter J.L. Wallis , Portable Programming
LR. Wilson and A.M . Addyman, A Practical Introduction to Pascal- with BS
6192, second edition

"The titles marked with an asterisk were prepared du ring the Co nsulting Edito rship of
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 An Introduction to
System Programming -
Based on the PDP!!

Derrick Morris
Department of Computer Science
University of Manchester

M
MACMILLAN PRESS
LONDON
© Derrick Morris 1983

All rights reserved. No part of this

publication may be reproduced or transmitted,
in any form or by any means, without permission .

Published by
THE MACMILLAN PRESS LTO
London and Basingstoke
Companies and representatives
throughout the world

ISBN 978-0-333-32906-1 ISBN 978-1-349-06310-9 (eBook)

DOI 10.1007/978-1-349-06310-9
Contents

Preface

Acknowledgements

1. The Binary System 1

1. 1 Number Representation 1
1. 2 Binary Arithmetic 2
1. 3 Negative Number Representation 3
1. 4 Notations for Binary Numbers 5
1. 5 Radix Conversion 6
1. 6 Exercises 6

2. A Simple Computer - MUO 9

2.1 The Memory 9

2.2 The Control Unit 10
2 .3 Overall Operation 11
2 .4 The Instruction Format 11
2 .5 Operation of the Control Unit 12
2 .6 Programming MUO 13
2. 7 Exercises 21

3. The Structure of the PDP11 22

3. 1 Addressing Modes 25
3 . 1. 1 Addressing Modes O. 2. 4 and 6 25
3 .1 .2 Examples of the use of modes O. 2. 4 and 6 27
3. 1.3 Addressing Modes 1. 3. 5 and 7 26
3 . 1.4 Examples of the use of modes 1 . 3 . 5 and 7 26
3 . 1.5 Special Registers 29
3 .1.6 Address modes 2. 3. 6 and 7 with PC 30

3.2 Computational Instructions 31

3 .2. 1 Double Operand Instructions 31
3 .2.2 Single Operand Instructions 32
3.2.3 Condition Codes 34
3.2.4 Implicit Setting of Condition Codes 35
3 .2 .5 Explicit Setting of Condition Codes 35
3 .3 Branch Instructions 35
3 .3. 1 Examples Using Branch Instructions 37
3 .4 Subroutines 36
3 . 5 The Jump Instruction 40
3 . 6 Byte Addressing 40
3. 7 Anomalies in the PDP11 Instruction Set 41
3.6 Exercises 43
4. Operation and Bootstrapping 44

4. 1 Manual Operation of the PDPll 45

4 .2 Manual Operation of an LSI11 48
4.3 An Octal Loader 50
4.4 A Practical Approach to Bootstrapping 55
4. 5 Bootstrapping by 'Cross Compiling' 57
4 . 6 Automatic Bootstrapping 59
4. 7 Exercises 60

5. A Simple Assembly Language 61

5. 1 A SAL Program 62
5 .2 Constants 62
5 . 3 Instructions 65
5.4 Operands 66
5.5 Constant Statements 66
5.6 Directive Statements 67
5 .7 The Special Name ' Dot ' 68
5 . 8 Comment Statements 69
5. 9 Library Subroutines 69
5. 10 Simple Input Output Subroutines 69
5.10 .1 Octal Input 70
5. 10 . 2 Octal Output 71
5. 11 An Example of a Complete SAL Program 71
5 . 12 Exercises 73

6. Arithmetic Subroutines 76

6. 1 Multiplication 77
6 . 2 Division 79
6 .3 Double Length Arithmetic 82
6 .3 . 1 Double Length Addition and Subtraction 82
6.3.2 Multiplication 83
6 . 4 Floating Point Arithmetic 85
6.4. 1 Floating Point Addition 86
6.4.2 Floating Point Subtraction 90
6.4.3 Floating Point Multiply 90
6 .4. 4 FloaJlng Po int Division 93
6 .4.5 Floating Po int Round ing Errors 94
6 . 5 Binary Coded Decimal Arithmetic 95
6. 5. 1 16-Blt Unsigned Binary Coded Decimal Add'ttlon 96
6.5.2 32-Blt BCD Addition 98
6.5.3 BCD Subtraction. 99
6 .5.4 BCD MUltiplication and Division 100
6.5.5 Conversion from BCD to Binary 100
6 . 6 Input Output of Decimal Numbers 101
6.6. 1 Decimal Input Subroutine 102
6 . 6 . 2 Decimal Output Subroutine 103
6. 7 Exercises 105
7. Implementallon of the Assembler 107

7. 1 The Data Structures of the Assembler 108

7.1.1 The Line Buffer 109
7.1.2 The Source Buffer 111
7.1.3 The Name List 111
7.1.4 The Character Table 116
7.1.5 The Function Table 117
7 .1.6 Summary of the Lists Required 117
7.2 The SUbroutine Structure of the Assembler 118
7.3 The Coding of the Assembler 118
7 .3.1 Global variables 119
7 .3 .2 SUbroutine specifications 120

8. Control of Input and Output 123

8.1 The Basic Mechanism for Input Output 124

8.2 Teletype Input Output 126
8.3 Bootstrap Sequences 127
8.4 Buffering 130
8.5 Interrupts 132
8.5. 1 Interrupt Entry 133
8.5.2 The Processor Status Register (PS) 134
8.6 Implementation of Input BUffering 135
8 . 7 Implementation of Output Buffering 139
8.8 Using 'Floppy' Discs 141
8 . 9 Exercises 144

Appendices

1 Summary of PDP11 Instruction Code 146

2 SAL Code for the MUO Interpreter 148
3 The Flowcharts and Code for SAL 151
4 The Octal Code for the SAL Assembler 179
5 Allocation of Device and Interrupt Addresses 183
6 7-Blt ASCII Character Code 184

Index
Preface

This book Is Intended as the text for an Introductory practical course In

System Programming based on the PDPll . It contains a description of
the machine , the techniques used In programming It In machine
language, and the programs needed to convert a machine, totally
without software, Into a usable system at assembly language level. The
material might be viewed as both a bridge between hardware and
software courses and as a platform upon which courses concerned with
the design of compliers and operating systems might be built.

The material given Is Illustrated by reference to the PDPll and Is

intended to be used In an environment In which ' han ds on' access can
be provided . It has grown out of a first year course of about 40
lectures and 10 half day practical sessions given In the Computer
Science Department of the University of Manchester over the past 10
years . Mostly the computers used have been the PDPll/20 and the
PDP 11140 , but this presentation is aimed more at the LSlll.

In fact. the course Is now supported by means of a PDP11/44 to

which sixteen PDTll with VT105 terminals are connected. The 11/44 Is
controlled by a general purpose operating system , and It is primarily
used for file management and program assembly. Students downline
load their assembled programs Into the single user PDTll 's, where they
have hands on access . The only system software necessarily resident
In the PDTll's are the TRANSMIT sequence and OCTAL LOADER
Introduced In Chapter 4.

Exercises are g iven at the end of each chapter which are

appropriate to the material It contains. Those In the first three chapters
are paper exercises only . From Chapter 4 onwards some exercises
require a computer.
Acknowledgements

I am Indebted to my colleagues and the many students who have helped

to shape and assemble the material presented in this book . In
particular. I am enormously Indebted to Dr . P. C. Capon whose advice
and ass istance has been Inval uable . and without whose encouragement
I would have given up long ago . Also my sincere thanks go to Pat
Cook who has tirelessly struggled through the almost endless series of
Iterations to which this text has been subjected . to produce the final
camera copy on a rather Inadequate text formatting system .
1 The Binary System

This book Is founded on the belief that a computer scientist should

know the intimate details of at least one computer . Experience has
shown that this cannot be gained by looking into the computer through
hundreds of man years of software . or by starting from circuit
diagrams . The Interface between these two areas of complex detail is
the numeric code used to program the computer and the inbullt
prim itive functions of the computer which It controls . Thus th is book is
mainly concerned with the numeric code or Instruction set of the PDP 11
computer. and Its use in providing an empty machine with elementary
system software to support assembly language programming. However.
by way of introduction. this Chapter considers binary number
representatIon and arithmetic . Also. In order to make It easier to
understand what Is meant by a program . without first understanding the
considerable detail of the PDP11. the second Chapter is concerned with
a very simple hypothetical computer .

1. 1 NUMBER REPRESENTATION

Inside a computer . numbers are represented by electrical . or magnetic

signals. in the computer ' store ' they exist In static form; for example.
as voltage levels In bi-stable circuits or as magnetic patterns on a
disc. When numbers are copied from one part of the computer to
another . they are converted to pulses and transmitted along wires . In
ail of these cases It Is only practicable to recognise two states. for
example. high or low voltage level. north or south pole. presence or
absence of a pulse at a given time. Thus It Is natural for computers to
work with binary digits using the presence of a pulse . say. to Indicate
the value 1 and its absence to Indicate O. A binary number Is a
sequence of these binary digits or bits as they are most often called .

The Interpretation of a binary number and the method of performing

arithmetic on binary numbers follows the same basic rules as the more
2 An Introduction to System ProgrammIng - Based on the PDP11

famil iar decimal system . except for the obvious difference In the range
of digit values . In any number system each digit position can express a
restricted range of values . 0 to r-sl . where r Is the radix. and
successive digit positions represent successive powers of the radix.
Obviously decimal numbers use the radix 10. the individual digits values
are In the range 0 to 9. and the significance of the d igit positions Is:
1
UNITS (10°). TENS (10 ) . HUNDREDS (102.). In the binary system the
o 1
sl~~plflcance of the digit positions is : UNITS (2 i . TWOS (2 i. FOURS
(2 ). The value of a number Is the sum of the values of the digits
multiplied by their significance .

Some examples of numbers expressed in the two systems are

DECIMAL BINARY
1 1
2 10
3 11
31 11111

One further point about arithmetic In computers Is that the numbers

are of fixed size. although not ali computers use the same size. and
sometimes different sizes are used in different contexts in the same
computer. Sizes such as 16. 24. 32. 36. 60 and 64 binary digits are
quite common . We shall be concerned with computers operating mainly
on numbers containing 16 binary digits . The predom inant In-built
number size Is usually called the word length of the computer . and It
obviously determines the range of numbers which can be represented .
Thus we might say that the word length of our computer Is 16 bits .
Numbers written for such a computer should Include all 16 bits. to
remind us that the computer operations will always apply to all 16 b its
regardless of their va lue . and the results generated will be 16 bits.
Therefore the above examples should be written

0000000000000001
0000000000000010
0000000000000011
0000000000001010
0000000000011111

1. 2 BINARY ARITHMETIC

Arithmetic in binary is simple but tedious . The basic rules for addition
of binary digits are

0+0 ... 0
0+1 1
 The Binary System 3

HO = 1
H1 .. 10 (or 0 and carry 1)

otherwise the process Is similar to the one used when adding decimal
numbers. Consider. for example. the addition In binary of the decimal
numbers 27 and 3

0000000000000011
+ 0000000000011011

0000000000011110 30 decimal

It follows that the basic rules for subtraction of binary digits are

0-0 .. 0
0-1 .. 1 (but 1 has been borrowed)
1-0 = 1
1-1 = 0

As an example of this consider the subtraction of 3 from 30

0000000000011110
- 0000000000000011

0000000000011011 = 27 decimal

MUltiplication and division In binary can also be carried out in a

manner analogous to that used for decimal numbers. For example.
consider the long rnultlptlcatlon of the decimal numbers 12 by 5 in
binary .

0000000000001100
x 0000000000000101

0000000000110000
+ 0000000000001100

0000000000111100 60

Here the multiplicand Is muitlplled by each non-zero digit of the

multlpller In turn. with zeros Inserted at the right hand end according
to the significance of the digit. Finally these partial products are
added.

1.3 NEGATIVE NUMBER REPRESENTATION

Negative numbers may be represented according to one of three

4 An Introduction to System Programming - Based on the PDP11

conventions . First there Is the sign and modulus convention In which

one digit (usually the most significant> gives the sign of the number
and the remainder give Its magnitude. Normally a 1 Is used to
represent minus and a 0 to represent plus, thus -9 would be encoded
as 1000000000001001. An alternative is the 2's ~omplement system, in
which a negative number -x Is represented by 2 - .x , where n Is the
word length . Thus , In this system, -9 would be expressed as
10000000000000000 0000000000001001 1111111111110111. The
convention followed In interpreting 2's complement numbers Is that any
number whose most significant d igit Is 1 is a negative number . It Is
worth noting that In the 2's complement system , the sign of a number
can be changed by forming Its 2 's complement. For example , the 2's
complement of the -9 given above yields +9 thus 10000000000000000 -
1111111111110111 = 0000000000001001. The third convention for the
representation of negative numbers Is l 's complement. In this system -x
1'fs
~sn~~p~es:,nt~~th~u~~e It C~:tvl:~:~tt ~~ xr~::~:e~sI:o~~a~~ed~f~~~~tI~~
that changes all the l's Into O's and all the O's Into t ' s , Since the l's
complement Is so easy to generate, It Is also useful to note that the
l's complement + 1 gives the 2's complement. and to use this as a way
of obtaining the 2's complement.

The 2's complement system Is the one normally used In PDP11s . It

has some advantages which are worth noting . First It Is not necessary
to take the signs of numbers Into account In order to perform the
operations add , subtract and muttlply. This can be proved
mathematically but simple examples will serve to Illustrate the point . In
fact the l 's complement system has the same advantage but the sign
and magnitude does not . Consider the following

1 + -2
0000000000000001
+ 1111111111111110
---------
1111111111111111 - -1
----------
1 - -2
0000000000000001
- 1111111111111110
---------
0000000000000011
_._----- - - - 3
 The Binary System 5

~ X -2
0000000000000001
x 1111111111111110
1000000000000000
+ 0100000000000000
+ 0010000000000000

+ 0000000000000010

1111111111111110 - - 2

A second advantage of the 2's complement system Is that It has only

one form of zero whereas the other two accommodate both +0 and -0.
which Introduces complications In recognising whether or not a given
result Is less than zero or equal to zero . However the result of having
only one zero Is that the range Is asymmetrical . In both complement
systems the largest positive 16-blt number Is expressed as
0111111111111111. and the la rgest negative number Is
1000000000000000 . .I.~n the 1's cPflplement system the values of these
two numbers are 2 - 1 a~~ - (2 - 1) • .I.~hereas In the 2's complement
system they represent 2 - 1 and -2 . Thus the largest negative
number In a 2's complement system cannot be negated .

1. 4 NOTATIONS FOR BINARY NUMBERS

It Is abundantly clear from the examples In this Chapter that writing

numbers In binary Is extremely tedious . A convenient alternative Is to
consider the binary digits In groups of three and to denote the value of
each group of three by an octal digit thus

000 Is represented by 0
001 Is represented by 1
010 Is represented by 2
011 Is represented by 3
100 Is represented by 4
101 Is represented by 5
"0 Is represented by 6
"1 Is represented by 7

A further alternative which Is widely used. although not usually on

PDP11 systems. Is hexadecimal. In which the digits are taken In groups
of four as follows
S An Introduction to System Programming - Based on the PDP"

0000 Is represented by 0
0001 Is represented by 1
0010 Is represented by 2

1001 Is represented by 9
1010 Is represented by A
1011 Is represented by B
1100 Is represented by C
1101 Is represented by D
1110 Is represented by E
1111 Is represented by F

Thus a lS-blt number can be expressed as 4 hexadecimal digits or as

a binary dig it followed by five octal digits. For example. assuming the
2's complement sign convention we might write

DECIMAL OCTAL HEXADECIMAL

1 000001 0001
8 000010 0008
10 000012 OOOA
-1 177777 FFFF
-13 177763 FFF3

When using these notations It Is Important to keep In mind that the

computer works In binary. not octal or hexadecimal. Therefore. It Is
useful to be able to think In binary whilst. for convenience . writing
octal or hexadecimal.

1. 5 RADIX CONVERSION

Computers work In binary because It Is expedient to do so. but people

naturally prefer decimal. Thus computers have to be programmed to
convert Input data from decimal to binary and answers from binary to
decimal. The system programmer must provide the Instruction
sequences to perform this conversion on behalf of the general user. He
must also be reasonably competent at performing manual conversions
on his own behalf. since situations Inevitably arise In which the system
programmer has to prepare binary Input for the computer. and Interpret
the binary Information that It contains.

The formal way to convert the number (N) from radix rJ. to radix rz.
Is to fIrst express rz In radix r.1.. then repeatedly divide N by re,
workIng In radix r.1.. until an answer of zero arises . The digits of the
result In radix re , starting from the least significant end. are given by
the remainders generated from each dIvision . For example . consider
 The Binary System 7

the conversion of the decimal number 105 to binary. Since the

conversion Is to radix 2 we repeatedly divide by 2 and note the
remainders.

2)105
2)52 REM 1
2)26 REM 0
2)13 REM 0
2)6 REM 1
2)3 REM 0
2>1 REM 1
0 REM 1
11 5 3
Thus ANS = 1101001 2 + 2 + 2 + 2° = 105 decimal

The reverse conversion Is also possible but it is more tedious . For

example

1101001/1010 1010 REM 101(=5)

101011010 = REM 0

111010 = 0 REM

In practice this formal method Is rarely used. Manual conversion Is

often best done by ad hoc methods. In this connection It Is useful to
remember a few powers of 2. for example
11
2° is 1 2 is 64
1 7
2 is 2 2 Is 128
z 11
2 is 4 2 Is 256
3 8
2 Is 8 2 Is 512
2· Is 16 210
Is 1024
5 11
2 Is 32 2 Is 2048

It can then be seen by Inspection. that 105 Is 64+32+8+ 1 which Is

11
0000000001101001 and 0000000011111111 Is 2 - 1 which Is 255
decimal.

In order to convert negative numbers It Is necessary to know the

sign conventions. and It Is usually best to form the absolute value of
the number. apply the conversion to It. and then add the sign. For
example. In order to translate the 2's complement number
1111111110111011 Into decimal. first note that It Is negative and
change Its sign thus

000000001000100+1 = 000000001000101

now evaluate this as

8 An Introduction to System Programming - Based on the PDPt t
z 8
2° + 2 + 2 69

and finally add the sign giving -69 .

1. 6 EXERCISES

1. Express the following as 2's complement 16-blt binary numbers

96, 512, -48 , 16384 , -32768 .

2. Now write each of the above numbers In octal and sum them.
Convert the answer back to decimal, and check It by doing the
sum In decimal.

3. Negate the binary form of the numbers In exercise 1.

4. Express the following 2's complement 16-blt numbers In octal.

hexadecimal and decimal

0000000000001111
0000000000011111
0000000001100100
1111111111100000

5. Working entirely In binary complete the following

0000000001100100 x 0000000001100100 =
1111111110000000 / 0000000000001010 =
Check the answers by converting the original numbers and the
answers to decimal .

6. Prepare a table giving the decimal. octal and hexadecimal

equivalents of all powers of two from 0 to 31 .
2 A Simple Computer - MUD

Before getting Involved in the detailed complexities of the PDP 11

computer . It is best to gain some understanding of what a computer
does and how it Is programmed by considering a very simple computer.
Computers have become progressively more complicated through 30
years of development and only the very early designs show true
simplicity. As a starting point we shall take a hypothetical machine
based very closely on the first computer built at the University of
Manchester in 1948 (MUO).

Although It Is not necessary to know the engineering detail of a

computer In order to program It. It Is useful to have an outline
impression of its mode of operation . Further It is Important to realise
that the computer has no Intrinsic Intelligence and that the programmer
dictates its every action. From a programming point of view. the MUO
computer can be regarded as

A Memory (or Store as It Is often called)

A Control Unit
and An Arithmetic Unit

2.1 THE MEMORY

The Memory can be likened to a sheet of ruled paper with numbered

lines . and space for exactly one number to be written on each line.
Thus. If a new number Is recorded In a particular line. the old one is
erased . It Is most Important that the programmer is clear In his mind
about the difference between a store line number. and the number that
it contains . The former is fixed by the way the machine Is built. but
the latter Is decided by the programmer (and the programs that he
creates) . A program Itself Is mereiy a sequence of numbers . chosen
by a programmer. which are to be placed In store lines and then
' obeye d' by the control unit . In obeying a sequence of numbers as a
10 An Introduction to System Programming - Based on the PDP11

program, the computer takes each number In turn to be an Instruction

representing one small step of the complete program. Obviously this
means that the programmer must know the precise meaning, to the
control unit. of each number (or Instruction) . The programmer must
also decide which store lines are to be used for the Instructions of the
program, any constants It may require, and numbers which are to be
computed as the program runs. The latter entities are usually referred
to as variables .

In addition to the main memory of the computer. each unit In the

computer will have a small number of store lines for recording the
numbers on which It Is currently operating. These functional store lines
are called registers .

2 .2 THE CONTROL UNIT

The control unit Is connected by means of wires (or lines on a printed

circuit> to several other places In the computer. Some of these wires
are used to transmit control and timing signals. which determine the
actions of the other parts of the computer . and others allow numbers
(or data) to be copied from one place to another. Internally the control
unit Is capable of remembering two numbers (In registers) and Its
actions are determined by a rigid set of rules for Interprettlng these
numbers . These actions are mostly very simple but they are repeated
very rapidly. which Is where the computer derives Its power.

The registers In the control unit are called the present Instruction
register (PI>. and the program counter register ( PC) . The control
unit's function Is to take the Instructions of a program one at a time
from the store . and to cause the computer as a whole to 'obey' them .
by transmitting the appropriate control signals and data along the wires
which It controls . Normally the Instructions are obeyed sequentially in
the order In which they appear In the store. but some instructions,
called branch Instructions, alter this sequence. Thus some Instruction
sequences may be obeyed many times and others may be obeyed
conditionally (I. e . only If certain values arise In the calculation) . The
value In the PC roglster Is the means by which the computer 'keeps Its
place' In the program. In fact It Is always the number of the store line
containing the next Instruction . The reason why the control unit contains
a register (PI> to remember the present Instruction. Is that Its
execution will take place In stages. at fixed time Intervals, and the
control unit needs to 'Iook at' the bits In the Instruction to decide which
control signals It must generate at each stage. Obviously this Implies
that a lot of control circuitry Is wired Into the PI register .
 A Simple Computer - MUD tt
The operation of the control unit can be summarised as follows

1) PI <= the number from the store line whose number Is given by
PC
2) PC <= PC+l
3) examine PI and cause the Instruction It specifies to be obeyed
4) repeat action (1).

(The symbol <= should be read as 'becomes a copy of')

2 .3 OVERALL OPERATION

Returning to the three main components of the computer (Its store,

control unit and arithmetic unit>. we can now present a model of how
they connect and operate. Obviously. the store. which was likened to a
sheet of ruled paper with numbered lines. Is not visible as such to the
control unit. The connection Is by means of wires . of which there are
sufficient to specify

a store line number

the number It contains (or Is to contain)
and an Indication of whether the number In
the store line Is to be copied out or
replaced .

The Importance of being very clear about the difference between a store
line number and the number It contains cannot be overstressed.

The arithmetic unit. which Is often a complex and expensive part of

a computer , Is quite simple from a programming point of view. It can
be thought of as a calculator to which two operands and a function can
be presented. and after an appropriate time an answer will be
generated . In MUO. and many other computers. the complexity and
cost of simultaneously presenting two operands to the arithmetic unit
and then receiving an answer Is avoided by Including within It a
register. called the accumulator. which always forms one of the Inputs
and which receives the answer .

2.4 THE INSTRUCTION FORMAT

Given that each Instruction has to specify an operation such as add or

subtract, and to define a store line containing one of Its operands, It
follows that the Instructions In general need two components, a function
part (F) and an address part (S) . Both must fit Into the standard word
size of the computer which we are taking to be 16 bits. The number of
different functions that the Control Unit Is to recognise determines the
size of the F component. and the number of bits remaining for S
12 An Introduction to System Programming - Based on the PDP11

determines the maximum number of store lines which the computer can
have. The division we shall assume Is 4 bits for F and 12 bits for S.
Hence the computer can have 16 functions and 4096 store lines. We
shall only consider the first 8 Instructions as shown In Table 2. 1. The
rest may be assumed to be for control of the computer's Input/output
devices. which allow programs and data to be Input and results to be
printed. The notation '[S)' should be read as 'the content of the store
line whose address Is given by S'.

Table 2. 1 The MUO Instruction Set

Number Mnemonic Action

o ACC<-[S] The Accumulator becomes a copy of

the number in the specified store
line .

1 ACC->[S] The number in the specified store

line becomes a copy of that in the
Accumulator.

2 ACC+[S] The number in the specified store

line is added to that in the
Accumulator.

3 ACC-[S] The number in the specified store

line is subtracted from that in the
Accumulator.

4 pc<-S PC is reset to S.
I
5 IF +VE PC<-S I PC is reset to S only if ACC>O.
I
6 IF ;t 0 PC<-S I PC is reset to S only if ACC;tO.
I
7 STOP I computer stops.
I

2.5 OPERATION OF THE CONTROL UNIT

Figure 2 . 1. which summarises the organisation of the machine and the

main datapaths. will clarify the above description. The Control Unit
(CU) presents addresses to the store either from PC or the S part of
PI. DATA read from the store can be routed to either PI or the
Arithmetic Unit (AU) via a switch controlled by the Control Unit.
Function Information Is also sent from the PI register of the control unit
to the arithmetic unit. but these control paths are omitted from the
diagram.
 A Simple Computer - MUD 13

Control Unit
(CU)

Address
PC
PI

Data
Store

Arith Unit
(AU)

Figure 2. 1 Block Diagram of MUO

An expanded definition of the operation of the Control Is now given

In diagrammatic form In Figure 2 .2 .

2 .6 PROGRAMMING MUO

We now require a simple problem on which to demonstrate the

technique of programming . It Is sufficient. Initially. to consider any
basic arithmetic operation for which the computer has no Instruction.
such as multiplication. but It must be specified In complete detail. Let
us therelore make the problem one of constructing a sequence of
Instructions which will take the number In store line 40. mUltiply It by
the one In store line 41. and place the answer In store line 42. We
shall assume that the numbers In store lines 40 and 41 will not be
needed again and may therefore be altered If necessary.
14 An Introduction to System ProgrammIng - Based on the PDPII

START

'GOTO' Cond 'GOTO' Store ACC Ar ithmetic

Function

IS COND TRUE COPY ACC TOISI Copy [51 TO AU

Copy F TO AU

Figure 2.2 The Operation of the MUO Control Unit

The way to approach this sort of problem Is to devise a possible

method of solution and express It In any easily understood notation.
check Its correctness . and then translate It Into machine language. In
practice several attempts may be required before a satisfactory method
Is discovered. Suppose the problem Is to multiply X by Y to obtain Z.
using only addition. subtraction and testing operations . An obvious
approach Is to add X to Itself Y-l times . In fact It Is slightly more
convenient to express this method as adding X Into zero Y times. For
example. to compute 2 x 3 we have
 A Simple Computer - MUD 15

o
+2
+2
+2

=6

and for X by Y we have

o
+X
+X
Y times

+X

The main difficulty arises from the fact that X and Yare not known
explicitly. Instead It Is given that X Is In store line 40 and Y Is In store
line 41 . Thus the notion of repeatedly obeying an add Instruction a
variable number of times is needed . One solution Is

z--o
L1: Z<=Z+X
Y<=Y-1
IF Yl'!O GO BACK TO L1
STOP

When such a sequence Is translated Into computer Instructions

'going back' to the step labelled L1 will be achieved by resetting the
program counter.

It can be proved mathematically that the above Is a correct solution ,

but we can alternatively demonstrate Its validity to ourselves by taking
typical values for X and Y. and executing the program as the computer
would. In general. a formal approach to proving the correctness of a
program. In this style of programming . Is not feasible. Some form of
empirical check Is usually the best that can be achieved. All that Is
needed for this Is a pencil and paper to act as the store. which
changes Its content as the program Is executed. Thus to multiply 10 by
6 we progress through the following sequence of values as a result of
obeying the Instructions of the program In sequence
16 An Introduction to System Programming - Based on the PDP11

X 10
Y 6 S 4 3 210
Z 0 10 20 30 40 SO 60

It Is also the case that this program will generate the correct answers
for negative and zero operands provided l.ihat the computer uses 2's
complement notation and works modulo 2 . There may however be a
time advantage In treating negative numbers and zero specially . For
example, If thls1.Sls not done. multiplication by -1 will be achieved by
multiplying by 2 -1

A sequence of MUO Instructions to Implement the above method of

multiplication is as follows , the explicit addresses are given In octal

ACC<=[L2)
ACC=>[S2]
L1: ACC <=[S2]
ACC+ [SO)
ACC=> [S2]
ACC<=[Sl]
ACC- [L3]
ACC=>[Sl)
IF ACC ~ O. PC = L 1
STOP
L2 : 0
L3: 1

Before this sequence can be placed In the computer. it is

necessary to translate It into octal. and to decide Its position in the
store so that the addresses of the store lines denoted by L1. L2 . L3
can be turned Into numbers. In order to accomplish this we shall need
to know the detailed format of MUO Instructions.

Each instruction occupies 16 bits. of which the most significant 4

bits contain the function number. and the least significant 12 bits
contain the store address or'S' part.

F S
4 12

Assuming that the Instructions are to be placed In store starting from

line O. the octal form of the program Is
 A Simple Computer - MUD 17

store line 0 000012

1 010052
2 000052
3 020050
4 010052
5 000051
6 030013
7 010051
10 060002
11 070000
12 000000
13 000001

A program to emulate the action of the MUO control un it Is g iven as

an example program for the PDPll In Chapter 5 . A simple
demonstration of the validity of the above sequence would be to run it
on a PDPll using this MUO emulator.

As a second example. consider the problem of finding the largest

entry In a list of numbers contained In a set of consecutive store lines .
The simplest method Is to start by provisionally setting the answer to
the first entry In the list. and then to compare the number in each
subsequent store line with th is provisional answer . If the number in any
store line Is found to be greater than the provisional answer . it
becomes the new provisional answer. The required solution can be
expressed in flow diagram form as shown In Figure 2 .3 .

The main new concept introduced by Figure 2.3 Is one of using a

variable of the program ( J) to determine the store line upon which an
Instruction Is to operate. The implementation of this. on MUO.
highlights a major deficiency Which has been remedied almost all
subsequent computer designs. albeit at the price of additional
conceptual complexity . In the example under consideration the actual
requirement Is to repeatedly obey a sequence of Instructions some of
which must operate on different store lines on each execution . The only
way that this can be done . on our slmplo machine . Is by writing a
program which changes the address part of some of the Instructions in
the repeated sequence . each time it Is obeyed . This technique uses
the knowledge that each in str uc ti o n Is encoded as a number . and If the
number is altered by treating It as an operand. It will have a different
effect when next obeyed .

For example . If the octal number 030050 . Is treated as an

Instruction. it means

ACC <= ACC - [SOl.

18 An Introduction to System Programming - Based on the PDP11

1
FIND MAX El.EIENT

Figure 2.3 Locate Maximum Element In List

However. It could be treated as a number and thereby altered to

030051. say . If It Is now used as an Instruction. It means

ACC <= ACC - [51).

Two Instructions (labelled L3 and L5) of the sequence for finding the
largest entry In a list. Which Is given below. are altered In this way.
Also In the symbolic form. the list Is assumed to start In the store line
whose address Is given by L1STSTART. and finish In the store line
preceding the one whose address Is L1STEND.
 A Simple Computer - MUD 19

ACC<=[L1STSTARTJ
ACC,;=> [ANSJ
L1: ACC<=[ANSJ
L3 : ACC-[L1STSTART+1J
IF ACC>O PC=L2
L4: ACC<=[L1STSTART+ll
ACC=> [ANSJ
L2: ACC<=[L3J
ACC+[L5J
ACC=>[L3J
ACC<=[L4]
ACC+[L5]
ACC=>[L4]
ACC-[L6J
IF ACC;tO PC=L 1
STOP
L5: 1
L6: ACC = [LISTEN OJ
ANS :O

Two points are worth special mention. First there Is an apparent

redundancy In lines 2 and 3 which denote

'the store line ANS becomes a copy of the accumulator'

'the accumulator becomes a copy of store line ANS'

This Is only the case on Initial entry to the program. As It runs the
sequence Is repeated only from L1 at which time the accumulator will
not already contain [ANSl. Second, the means by which the repetitive
part of the program Is terminated. Is that the Instruction at L4 will
eventually become 'ACC <= [LISTEN OJ' after progressing through the
sequence

ACC <= [L1STSTART + 1J

ACC <= [L1STSTART+2J

Again some actual store line numbers must be chosen before an

octal translation can be given . Thus. assuming that the sequence Is to
be placed In store. starting from line 0, and that the list of numbers Is
In store lines 32 to 64 Inclusive. we have
20 An Introduction to System Programming - Based on the PDP11

store line 0 000040

1 010022
2 000022
3 030041
4 050007
5 000041
6 010022
7 000003
10 020020
11 010003
12 000005
13 020020
14 010005
15 030021
16 060002
17 070000
20 000001
21 000101

It Is now clear from our attempts to program this simple machine

that it has several serious deficiencies. The most serious of these Is
the failure of the machine to provide a construct corresponding to the
notion of operating on the I'th number In a list. Great confusion can
arise due to a program altering Itself as It runs. Another rather tedious
characteristic Is the need to constantly return partial results to the
store. In order to reload the ACC with the next variable to be modified.
Also a necessary change to the operation of the branch Instructions Is
one which will allow the PC register to be set to the content of a
store line. This allows the Implementation of subroutines I. e.
sequences of Instructions which can be 'entered' from any place In a
program. after which the PC . can be reset to continue at the Instruction
following the one which entered the subroutine. The same feature will
also allow the im p lem en la li on of ' swil c he s' . These are Instructions
which set PC to one value from a table according to the value of a
computed result. In fact. even the actual MUO built had this feature.
the nature of the control transfers actually being PC<=[S) not PC<=S. it
was removed from the model presented here for simplicity . Finally there
Is often a lack of suitable functions. such as muttlpty. Hence. In order
to combat all these deficiencies. present day machines have more
complexity In their design which reflects In more complicated ways of
Interpreting the F and S parts of an Instruction. and In some cases the
Introduction of several S parts to allow for functions which Involve more
than one store line .
 A Simple Computer - MUD 21

2 . 7 EXERCISES

1. For the hypothetical machine described In this Chapter write ( In

octaD a sequence of Instructions which divide the number In store
line 500 by the number In store line 501 . Place the result In store
line 502. Use a process of repeated subtraction. Make the
sequence as short as possible and arrange that the answer Is
rounded towards zero. That Is

11/3 should give 3

-7/2 should give -3

2. For the same machine write a program which sorts a list of

numbers Into descending order . A simple method of sorting can
be developed as a modification of the second example given in
Section 2 .6 . The Inner loop would be an instruction sequence that
scanned the list and. by Interchanging numbers as appropriate.
placed the largest number In the first position. This sequence
could be used repeatedly first to place the largest number In the
first position. and then the second largest number In the second
position and so on . Obviously the sequence will need to modify
Itself as It runs in two ways . First the Inner loop must modify
Itself In order to progress through the list. Second the outer loop
must keep resetting the Instruction changed during the Inner loop
so that the list can be scanned repeatedly. This resetting must
take account of the fact that each time the Inner loop Is executed
there Is one less element In the list to be sorted.
3 The Structure of the PDP11

Chapter 2 described a simple computer which served to Illustrate the

principles on which computers are based . but it showed some serious
deficiencies . The main two. whose rectification Implies changes to the
organisation of the computer. are the lack of a facility to use computed
addresses and the lack of a facility which enables several partial
answers to be immediately accessible.

Both requirements can In fact be met by a single means. and this is

the solution adopted In the PDPll . There is naturally quite a lot of
consequential complication In the control unit. and some new data
routes have to be provided . but the solution stems In principle from the
replacement of the single ACC register of the simple machine by a set
of (eight> registers. The control complications are concerned with
allowing results to be returned to any register. and the number In any
register to be used as an operand or as the address of an operand .
Thus If the registers are given the names RO. Rl . . . R7 . then typical
Instructions might be

Rl <=Rl+10
Rl <=R1+R2
Rl <=R1+lR2l

The meaning of the first two should be obvious. and that of the last
Instruction Is that the number in the store line whose address is given
by the value of R2 Is added to the number In Rl. after Which the
number In Rl Is replaced by the result.

To a first approximation we can regard the PDPll as comprising the

four hardware units
 The Structure of the PDP11 23

COntrol Unit (CU)

Arithmetic unit (AU)
Register store ( RS )
Main store ( MS)

connected as shown schematically In Figure 3 . 1.

Register Address Control Store Address

Unit
ICU)

R
E
G Main
I Data Store
S
T
E
R
S

Arith
Unit
(AU)

Figure 3. 1 A Simplified View of the PDP11

Obviously this diagram Is a gross simplification. but It will suffice as a

model to Illustrate the functions of the Instructions. A very significant
and Important aspect of the PDP11 design. namely the way In which It
connects to Input and output devices. Is for the present Ignored .

The purpose of the central switch Is to allow the Control Unit to

route data. either from a main store line or from a register. to either
Itself or the arithmetic unit. It will be obvious that the control unit must
be built to execute a more complicated set of rules than MUO.
Considering first only the Interface Into the Arithmetic Unit. It Is clear
that two operands and a result must traverse the same route. although
they may come from and return to either the Registers or Main store .
Hence the Control Unit must generate signals which position them
correctly In time . It also follows that the Arithmetic Unit will need some
Internal memory. but this need not concern us yet . In some of the
operand forms. a value from a register Is taken Into the Control Unit.
to be used as the address of the store line from which the actual
operand Is to be read or to which a result Is to be sent. and there
24 An Introduction to System ProgrammIng - Based on the PDPf t

are even more complicated sequences as we shall see later.

The above organisation of the Arithmetic Unit would allow three

different operands to be Involved In each Instruction. For example It
would be possible to have an Instruction

lZ] <=[X]+[y]

meaning add the contents of the store lines whose addresses are given
by X and Y, and place the result in the store line whose address is
given by Z. However, this would Impose a requirement for the
Instruction format to accommodate three addresses . On a 16-blt
computer this Is not practicable and the PDPll uses a 'two address
format' . In this case the result replaces one of the two operands, thus
the general form of Instruction is

lX]<=[X]+[Y] .

In fact In the Interest of obtaining a satisfactory range of functions

within the 16-blt constraint. the designers of the PDPll have gone
further and Introduced some single address Instructions which provide
for operations Involving only a single register or store line . Typical
functions of this kind are

Clear (set to 0)
Negate (replace by 2's complement>
Increment (add one) .

The same policy Is continued to Include some 'zero address' functions

but these are of more marginal Interest. An example Is

HALT.

The machine design also inco r porates a fourth, quite different.

Instruction format which Is used specifically for the ' branc h ' (or goto)
Instructions. Therefore, to summarise, the PDPll has the four different
Instruction formats

F2 As Ad
Fl Ad
FO
and the branch Instructions .

It Is conventional to refer to the location which a PDP11 Instruction

changes as the destination hence Its address Is denoted by Ad, and
the other location as the source having the address As . As the number
of addresses In the format reduces, more bits are available In the
function part . In fact F2 has only 4 bits whereas Fl has 10 and FO
16 . However, all functions must be uniquely distinguished, and at least
one combination of the F2 bits, Is needed to Indicate that the format is
one of the other types. The bits corresponding to F2 In Fl and FO
 The Structure of the PDP11 25

Instructions must then always have this value: thus the effective part of
F 1 Is only 6 bits. and at least one combination of these must be
reserved to denote an FO. In fact the branch Instructions also must be
distinguished and resultant function encoding Is not completely
straightforward .

The basic Instruction size Is 16 bits and the following allocation of

bits applies

--------
1"2 As Ad zi I Ad I 1"0

4 6 6 10 6 16

The 6 bits allocated to an address (either As or Ad) are divided Into

two groups of three to specify a register number. and an •addressing
mode' which Is the way In which the specified register value Is to be
used to obtain the operand . We shall see that In some modes the store
lines Immediately following an Instruction are used as constants and
consequently the effective Instruction size can be 16. 32 or ~8 bits.

3. 1 ADDRESSING MODES

It Is convenient to postpone further discussion of the function part of

Instructions. and to explain next the eight addressing modes. This Is a
very powerful feature of the PDPll and many readers may not
understand It completely In the first reading. It is however. Important to
understand fully this aspect of the machine before continuing Into
subsequent chapters. The examples given to Illustrate the addressing
modes will all use the add Instruction . which has the F2 value 0110 .

3.1.1 Addressing Modes O. 2. 4 and 6

The odd numbered modes are systematic variants of the corresponding

even numbered modes. and they are described later.

Mode 0 Is called Reg/ster Mode. and In this case the number In the
specified register is used as the operand. and of course replaced by
the result In the case of Ad . Thus the Instruction
26 An Introduction to System Programming - Based on the PDP' 1

0110 000 011 000 101

I I I I I
I I I I destination register =5
I I I ------ destination mode = 0 (register mode)
I I --------- source register = 3
I ------------ source mode = 0 (register mode)
---------------- function = 6 (ADD>

means add the number In register 3 to the number in register 5 and

place the result In register 5 . In symbolic form we shall write this as
R5<=R5+R3. It can also be seen from the grouping of bits In the above
example that an octal representation of machine instructions will be
tolerable. and It will be used In preference to binary In subsequent
examples . For the double operand Instruction the Initial binary digit and
first octal digit represent the function. the next two octal digits give the
mode and register of the source. and the last two give the mode and
register of the destination. Thus the above Instruction has the octal
representation 060305 .

Mode 2 Is one of several methods of accessing a store line. The

store line In question Is the one whose address is given by the number
In the specified register . However It Is Intended to be a means of
accessing consecutive store lines and after the number In the specified
register has been used to select a line In main store , It Is replaced by
the number of the next store line . The name of this addressing mode
Is auto-Increment.

Mode 4 has a strong similarity with mode 2 and as Its name.

auto-decrement , Implies, It Is complementary to It . Like mode 2, the
operand Is taken from the store line whose address Is given by the
number In the specified register . The difference Is that the number In
the specified register Is first decremented so as to refer to the previous
store line. It will become apparent from the discussion of stacks, In
Section 3. 1.5, that there Is a good reason for the register content
being changed before It Is used to select an operand with
auto-decrement. and after the operand access with auto-Increment.

Mode 6 Is called Index Mode . This mode causes the computer to

treat the next 16 bits In the program (that Is . the content of the store
line whose address Is given by the program counter) as part of the
Instruction using mode 6 . The operand accessed as a result of using
mode 6. Is the content of the store line whose address Is obtained by
adding the number In the specified reg ister to the number In the next
line of the program . Clearly the Control Unit must also cause an extra
Increment to the program counter for each Instance of mode 6. to
avoid these 'In-line' constants being subsequently treated as
Instructions .
 The Structure of the PDP" 27

Before we consider examples of the use of the addressing modes. It

Is necessary to note the way In which the store lines of a PDP11 are
numbered . They are . In fact. numbered by even numbers O. 2. 4 etc.
There are no store lines numbered 1. 3. 5 etc . This results from the
facility described later which allows some Instructions to operate on 1/2
store lines. and hence two numbers are required for each store line .
one for each half. It can now be stated that when the computer Is
operating on complete store lines. which Is the only case that we shall
consider for the present. the Incremonts and decrements mentioned
above will be In steps of 2 .

3 . 1.2 Examples of the use of modes O. 2. 4 and 6

The actions of the Instructions. using modes O. 2. 4 and 6 given

below. are explained In symbolic notation. and by their numeric effect.
assuming that they are obeyed sequentially starting with the Initial values

R1 = 1000
R2 = 2
STORE LINE 1000 = 2
STORE LINE 1002 = 10
STORE LINE 1004 -4

In the symbolic description the brackets T T will be used to denote

the content of the store line whose address Is given by the expression
Inside the brackets. If the access Implies an auto-Increment a '+'
symbol will be written after the T. and If It Implies auto-decrement a
«:» symbol will precede the T. This ordering should remind us that
auto-decrement changes the register before the access and
auto-Increment changes It after the access .

060102 R2 <= R2 + R1 (R2 <= 1002)

062102 R2 <= R2 + [R1J+ (R2 <= 1004)
( R1 <= 1002)
064102 R2 <= R2 + -ran ( Rl <= 1000)
(R2 <: 1006)
064202 R2 <: R2 + -[R2] (R2 <= 1000)
066261 [R1 +4] <= [R1+4] + [R2+2] ([1004] <: 6)
000002
000004

In the case of Instructions which have multiple effects It Is very

Important to know the order In which they will occur. It may be
assumed that the sequence Is

take the Instructions from store (and Increment PC)

compute the address of the source operand
compute the address of the destination operand
execute the function
28 An Introduction to System Programming - Based on the PDP"

When the computation of an address Includes execution of an auto

Increment or decrement these side effects of the Instruction are
completed before the main function. Thus in the fourth instruction above
the auto-decrement of 2 Is subtracted from the number in register 2
before the operand from store Is added to R2. In the case of the ADD
function this order is irrelevant but It matters with some of the other
functions.

When the address of an Index mode operand Is computed the

program counter Is used to locate the address of the constant and It Is
then Incremented. Thus when both operands are of Index mode two
constants are required . The first constant following the instruction Is
used to form the address of the source operand and the second Is
used to form the destination address .

3 . 1.3 Addressing Modes 1. 3. 5 and 7

Modes 1. 3. 5 and 7 can now be described In terms of their

correspondence to modes O. 2 . 4 and 6. Each odd numbered mode Is
the deferred ( or Indirect) form of the corresponding even numbered
mode . This means that the operand access Initially proceeds as for the
even numbered mode. but the operand so produced is then used as
the address of the final operand. Thus. for example. mode 1 (the
deferred form of mode 0) causes the number In the specified register
to be used as the address of the operand In main store . It Is therefore
similar to modes 2 and 4 but unlike them In that the register content
Itself Is not altered.

3. 1. 4 Examples of the use of modes 1. 3. 5 and 7

The Initial values assumed In the examples given below are

Rl = 1000
R2 = 1002
STORE LINE 1000 = 100
STORE LINE 1002 = 1006
STORE LINE 1004 = 1008
STORE LINE 1006 = -2
STORE LINE 1008 = -1

The style of presentation of the examples below follows that of Section

3 . 1. 2. However. the reader will find them much more difficult to
understand . It may also be unclear at this stage In what situations
these rather complicated modes would be used. This Is best Ignored
until the need arises . in practice many programs can be written which
use only a subset of the PDP11 's functions and addressing modes .
 The Structure of the PDP11 29

061132 [A1) +> [[A2)+) [lO06) <= 98

A2 <= 1004
066252 [A2+4) +> [-[A2lJ A2 <= 1002
000004 (1006) <= 97
063272 [[A2]+] +> [[A2+0lJ (1008) <= 96
000000 A2 <= 1004

Some explanation of the above might be helpful. Firstly the notation

'+>' has been introduc ed to mean ' Is added into' since it avo ids having
to specify the destination twice and it keeps the operands in the order
in which the computer deals with them (as read left to right) . That Is
' 10 +> X' Is equivalent to ' X <= X+ 10' , but It Implies that the lOis
obtained before the address of X. Secondly, nested brackets are used
to express the concept of an operand from store being used as the
address of an operand. Thus the first Instruction causes the operand
from the store line whose address Is given by A1 (the 100 from store
line 1000) to be added Into the number in the store line 1006 . The
1006 arises as the number In the store line 1002 whose address is
given by A2 . Finally as a side effect of using mode 3 the number In
A2 is incremented by two .

S. 1. 5 Special Registers

Until now all eight registers have been treated the same. but A6 and
A7 serve special functions. In fact A7 Is the program counter, hence It
Is automatically incremented (by 2) each time an Instruction Is taken
from the store. and each time a constant required by a mode 6
operand Is accessed. The effects of specifying A7 with certain
addressing modes are both Interesting and useful. They are discussed
below. A6 is the 'stack pointer' . Because A6 and A7 serve these
special functions. they are usually referred to as SP and PC.

A stack Is a way of using a computer store to achieve an effect

analogous to a physical stack (of say saucers). That Is, whenever a
number Is taken from the stack It Is the last one that was placed on
the stack. In the case of the PDP11 a stack runs backwards. from high
address to low address, through the designated area of the store.
When a number Is removed from the stack the access Is made using
Mode 2 register 6: thus register 6 automatically becomes a pointer to
the previous number on the stack . New numbers are added by using
mode 4 register 6 which causes Aeglster 6 to move to the next empty
position on the stack before the access Is made . It should now be
obvious why the machine was designed so that auto-decrement changes
the register before making an access . whilst auto-Increment changes It
afterwards .
30 An Introduction to System Programming - Based on the PDPf f

A programmer Is free to use any register except PC as a stack

pointer but SP Is always used this way . The subroutine entry and exit
Instruction described later requires this .

3. 1. 6 Address modes 2. 3. 6 and 7 with PC

Any addressing mode can be used with PC . the program counter . but
the effects of using 2 . 3. 6 and 7 with PC are the most Interesting
and are given special names . The other modes are rarely. If ever.
used with PC.

Mode 2 with PC simply causes an operand to be selected from the

store line whose address Is given by PC and PC Is Incremented by 2.
However. when an Instruction containing this model register combination
Is being executed . PC Is the address of the next 'Instruction' which Is
therefore treated as a constant. Consider. for example. the Instruction

062702
000005

which achieves the action R2 <= R2 + 5 and Is In effect a 32-blt

Instruction . This mode with PC Is called Immediate mode.

Mode 3 with PC again results In what Is In effect an extended

Instruction. The extra 16 bits In this case are used as the address of
the operand. Thus It Is the means whereby Instructions can be written
which refer to the absolute number of a store line and It Is given the
name absolute modo. An example Which Illustrates Immediate and
absolute In one (48-blt) Instruction Is

062737
000003
000006

which adds the constant 3 Into the number In store line 6 . In order to
decode this kind of Instruction. It Is necessary to remember the rule
given In 3 . 1. 1. that the source operand address Is always computed
before the destination operand address .

Mode 6 with PC causes the constant from the next store line to be
added to the number from PC to form the address of the operand .
Thus the constant gives the position of the operand relative to the
position of the Instruction containing It. and Is therefore called relative
mode . More strictly It Is relative to the address of the store line
following the constant because the program counter ( PC) Is
Incremented as the constant Is taken from store. Its significance
hinges on the property that If a sequence of Instructions. and the data
 The Structure of the PDP11 31

they operate upon. Is coded to use only relative addresses. It can be

placed anywhere In the store. or 'relocated' . Mode 7 with PC simply
Involves an extra stage of Indirection and Is called relative deferred
mode.

3.2 COMPUTATIONAL INSTRUCTIONS

The double operand Instructions with functions F2. and the single
operand Instructions with functions F 1 provide the computational
facilities . They are mostly readily understandable functions which can be
defined In tabular form In terms of the way the operands (SOURCE and
DEST) are used . but some amplification Is given of points of possible
difficulty.

3.2.1 Double Operand Instructions

Table 3.1 The f'2 Functions

OC'rAL CODE N:TION MNDI>NIC DESCRIPTION

01 J«)VE IfJV DEST <= SOURCE

02 COMPARE CMP SOURCE - DEST
03 BIT TEST BIT SOURCE & DEST
04 BIT CLEAR BIC DEST <- DEST & ·SOURCE
05 BIT SET BIS DEST <- DEST V SOURCE
06 ADD ADD DEST <'" DEST + SOURCE
16 SUBTRACT SUB DEST <- DEST - SOURCE

Only those functions whose description Involves the ' bec o me s' symbol
«=) cause a change In the value of a store line or register . In the
case of the other functions. the result formed In the arithmetic unit Is
lost when the next computational Instruction Is obeyed . Nevertheless
they serve a useful purpose because the conditional branch Instructions .
as will be seen later. branch according to the value of the last
computed result. Thus as their names Imply. functions 02 and 03 are
used for comparing and testing operands.

The operators used above may need some discussion . Add (+) afl.~
subtract (-) are the straightforward 2's complement modulo 2
operations that were encountered In MUO. The logical operators - . If,
and V are new. The not operator ( ") Is the simplest. It Is a unary
operator which Indicates that the following operand Is to be l's
32 An Introduction to System Programming - Based on the PDP11

complemented . The and (&) and or (V) operations generate a result In

which each digit Is a function only of the corresponding digits In the
two operands as shown In Table 3.2 . That Is there Is no carry between
digits .

Table 3 .2 Logical Operations

SOURCE opp PEST opp & result V result BIC result

0 0 0 0 0
0 1 0 1 1
1 0 0 1 0
1 1 1 1 0

Some examples will perhaps clarify this.

012701 sels R1 10 177777

177777
042701 changes R1 to 177400
000377
052701 changes R1 to 177555
000555
050101 leaves R1 unchanged
040101 changes R1 to 0

The names chosen for the functions should help us remember their
actions. For example. the bit set function sets to one all the digits In
the destination which correspond with ones In the source operand
leaving the rest unchanged. and the bit clear function sets to zero all
the digits In the destination which correspond with ones In the source
leaving the rest unchanged . Realistic examples of the use of these
functions cannot be given until other functions have been described.

3.2.2 Single Operand Instructions

In order to describe the actions of some of the F 1 functions It Is

necessary to Introduce the ' Ca rry Bit' (C) which exists In the Internal
memory of the Arithmetic Unit. Most of the computational Instructions
set this bit to be the 17th bit of the answer. but a fuller description of
this Is given In the next Section . The main use of C Is In calculations
which Involve numbers so large that they occupy several store lines .
When arithmetic Is performed on these numbers It can only be done 16
bits at a time and C Is the means by which carry Is propagated from
one group of bits to the next. The Instructions ADC and SBC fulfil this
purpose. The carry bit (C) Is also Involved In the operation of the
rotate Instructions.
 The Structure of the PDP11 33

.. •

I I
DeST
I~I I I

•
; I I
DeST
I~I I I II JROL
Figure 3.2 Pictorial Description of ROR and ROL

Rotate right (ROR) moves all the digits of the destination one place
to the right. The least significant digit has no digit position to move
Into. therefore It Is placed In C and the previous value of C Is moved
to the vacant. most significant. digit position. Rotate left (ROU Is
similar but the digits are moved left. Figure 3.2 Illustrates the actions
of ROR and ROL.

Most of the other functions In Table 3 .3 are self explanatory except

the test Instruction . Its operation relates to the condition codes of the
arithmetic unit which are described below.

Table 3 .3 The F 1 Functions

OCTAL ACTION HNEK>NIC I [)ESCRIPTION

I I
0050 CLEAR I CLR I DEST<=O
005~ COMPLEMENT I COM I DEST<--DEST
I I(~'s complement)
0052 INCREMENT I INC I DEST<=DEST+l
0053 DECREMENT I DEC I DEST<-DEST-~
0054 NEGATE I NEG I DEST<--DEST
I 1(2's complement)
0055 ADD CARRY I ADC I DEST<-DEST+C
0056 SUBTRACT CARRY I SBC I DEST<-DEST-C
0057 TEST I TST I test DEST
0060 ROTATE RIGHT I ROR I see figure 302
0061 ROTATE LEFT I ROL I see figure 302
0062 ARITBo SHIFT RIGHT I ASR I DEST<'=DEST/2
0063 ARITB 0 SHIFT LEFT I ASL I DEST<""DESTx2
I I
34 An Introduction to System Programming - Based on the PDPf t

3.2.3 Condition Codes

The Arithmetic Unit has some Internal memory . and Included In this are
four single bit quantities which contain Information relating to the most
recent result. They Include the carry bit CC) already described . a zero
bit CZ> which Is set to one only If the last result was zero. a sign bit
CN) which Is set to one only If the last result was negative. and an
overflow bit CV) which Is set only If the last result Is In error because
of arithmetic overflow. With some functions the setting of these
condition codes Is not as might be expected and these exceptions are
shown In Table 3.4 .

Table 3 .4 Implicit Setting of Condition Codes

FUNCTION NZVC NOTES

J«>V **0-
CMP **** no other action
BIT **0- no other action
BIC **0-
BIS **0-
ADD ****
SUB ****
CLR 0100
COM **01
INC ..-_1t_
DEC ***-
NEG ***1 C cleared if result .. 0, otherwise set .. 1
ACe ****
sac 1t***
TST **00 no other action
ROR **1* V is cleared if N-e, otherwise set .. 1
ROL **1* V is cleared if N-e, otherwise set .. 1
ASR **1* V is cleared if N-e, otherwise set .. 1
ASL ****
SWAB **00

A closer Investigation of arithmetic overflow Is appropriate at this

point. It results when the true answer Is a number which cannot be
expressed In 16 bits. When the operations Involved are addition and
subtraction one effect Is that the answer Is of the wrong sign.
Fortuitously overflow only occurs In cases where the sign Is easily
predicted. For example When two numbers of like sign are added the
sign of the answer should be the same. but overflow might occur
causing It to differ. In the case of subtraction overflow has occurred If
the signs of the operands differ and the sign of the answer Is the same
as that of the subtrahend .
 The Structure of the PDP11 35

3.2.4 Implicit Setting of Condition Codes

Most of the computational functions affect some of the condition codes .

Their effect Is summarised In the Table 3.4 to which the following key
applies

0 means always set to zero

1 means always set to one
- means not changed
• means set conditionally as stated above
? means set conditionally as specified

3.2 .5 Explicit Setting of Condition Codes

A significant number of the FO functions (the rest are given In Appendix

1) are provided specifically to allow Individual condition codes to be
set. They have no other effect. Table 3 .5 summarises their action .

Table 3.5 Functions which set Condition Codes

OCTAL CODE ACTION MNEK>NIC

000241 CLEAR C CLC

000242 CLEAR V ON
000244 CLEAR Z CLZ
000250 CLEAR N CLN
000261 SET C SEC
000262 SET V SEV
000264 SET Z SEZ
000270 SET N SEN

3.3 BRANCH INSTRUCTIONS

The format of the branch Instructions In the PDPll Is quite different

from that of other types of Instructions . It Is always 16 bits long and
the only kind of operand that It accommodates Is an a-bit constant.
Since a bits are not enough to specify a full store address they are
treated as a relative address and called an offset . That Is . when a
branch occurs the a-bit offset Is added Into the program counter to
form the new program counter . Obviously . the offset has to be treated
as a signed Integer since the branch might be forwards or backwards .
Even when used as a relative address a bits Is stili rather restrictive
36 An Introduction to System Programming - Based on the PDP11

and to achieve better range they are shifted one place left before being
added to the program counter . This exploits the fact that store lines
only have even numbered addresses . Thus the format of a branch
instruction Is

FUNCTION OFFSET

Fb x
a a
and the action Is PC<=PC+2X. If the condition specified by Fb is
satisfied . otherwise It has no action .

The conditions that can be specified by Fb relate to the last result

generated In the Arithmetic Unit . or more particularly to the setting of
the condition codes as Table 3.6 shows.

Table 3.6 The Fb Functions

OCTAL CODE DESCRIPTION MNEK:>NIC CONDITION TESTED

000400 Branch always BR NONE

001000 Branch if not equal (zero) BNE Z=O
001400 Branch if equal (zero) BEQ Z=l
002000 Branch if greater or equal BGE (N=O and V=O) or
( zero) (N=l and V=l)
002400 Branch if less than (zero) BLT (N=l and V=O) or
(N=O and V=l)
003000 Branch if greater than BGT as for BGE
(zero) providing Z=O
003400 Branch if less or equal BLE as for BLT or when
( zero) Z=l
100000 Branch if plus BPL N=O
100400 Branch if minus BMI N=l
101000 Branch if higher BHI C=O and Z=O
101400 Branch if lower or same BIDS C=1 or Z=l
102000 Branch if overflow is clear BVC V=O
102400 Branch if overflow is set BVS V=l
103000 Branch if carry is clear BeC C=O
103400 Branch if carry is set BeS C=l

In the octal column of Table 3.6 a complete Instruction is given

consisting of an a-bit function and a zero (a-bit> offset. When such
Instructions are used the appropriate a-bit offset should be added .
The meaning and use of those instructions which test a single condition
code Is clear . Some discussion is necessary for the other two groups
 The Structure 01 the PDP11 37

which perform multiple tests.

The group BGE . BlT. BGT and BlE are used for quite
straightforward comparisons but the means by which they achieve the
required effects are possibly obscure . Consider BGE which branches If
the last result was greater than or equal to zero . This might be used
after comparing two numbers . X and Y say . by means of the compare
Instruction CMP X Y. which will subtract Y from X. As we would
expect . a BGE Instruction following this CMP Instruction would branch If
X > Y. This condition can be detected from the sign of X-V provided
that no arithmetic overflow occurs . In other words If N=O and V=O. X Is
greater than or equal to Y. If overflow does occur then the sign of the
result Is wrong. Therefore X is also greater than Y if the result of X-V
is negative but overflow has occurred . Hence the conditions for BGE
must Include N=l and V=l. The BlT function Is the converse expecting
a negative result from X-V In the no overflow case . An additional test
for zero as shown In the Table is necessary with the functions BGT and
BlE . excluding zero In the former and Including It In the latter.

The second group of functions Involving multlple tests are the

branch higher (BHU and branch lower or same (BlOS) functions which
are Intended for unsigned arithmetic. This has not been considered
before . but If It Is known that all the numbers In a calculation are
posltlvrs the range can ~~ doubled by treating the octalsnumber 1 ~2000
as +2 • 100001 as +(2 + 1) and so on Instead of -2 and - ( 2 -1)
as is more usual. It Is now a zero in the C bit rather than the N bit
that Indicates X> Y after the operation X-Y. and a 1 in the C bit
Indicates that Y>X . The functions BHI and BlOS actually correspond to
X>Y and Y>X; thorotoro additional tests on the Z bit are needed as
shown in the Table.

3. 3 . 1 Examples Using Branch Instructions

As a first example. consider the simple multiply algorithm given In

Section 2.6 In connection with MUO. In the PDP11 it would be natural
to use registers for X. Y and Z . Therefore assume

R1 contains X
R2 contains Y
RO Is to contain the answer Z

Translating the sequence into PDP11 code we have

005000 RO<=O
060100 RO<=RO+R1
005302 R2<=R2-1
001375 BRANCH NOT EQUAL (ZERO>
38 An Introduction to System Programming - Based on the PDP"

In deciding the offset to be added to a branch Instruction. It Is

necessary to remember that the program counter will contain the
address of the next Instruction . Thus an offset of - 1 will cause an
Instruction to branch to Itself. -2 to the previous 16 bits. and so on .
The last Instruction In the above sequence Is the BNE Instruction
001000 to which the B-blt offset ' 11 11 10 1' (-3) has been added .
Clearly while the result generated by the preceding Instruction Is
non-zero the branch Instruction will cause the program counter to be
reset to the address of the 06 Instruction .

As a second example consider the problem . again from Chapter 2

(Figure 2 .3) . of find ing the largest number In a list of numbers stored
In consecutive store lines starting In the store line L1STSTAAT and
finishing In the line before L1STEND. The algorithm used variables ANS
and I. These are best placed In registers say ANS In AO and I In Al.
The most obvious translation of the algorithm Into PDPll code Is

013700 RO<-FIRST NUMBER

[,ISTSTART
012701
000002
026100 COMPARE [[,ISTSTART + Rl] AND RO
[,ISTSTART
003402 BLE (OFFSET - 2)
016100 RO<- [[,ISTSTART+Rl]
[,ISTSTART
062701 Rl<-Rl+2
000002
020127 COMPARE Rl and [,ISTEND-[,ISTSTART
[,ISTEND-[,ISTSTART
001366 BNE (OFFSET - - 10 )

This example Illustrates many of the features of the PDPll that have
been described above . Obviously It does not Illustrate all the functions.
nor all the addressing modes . but students who find It understandable
are making satisfactory progress. Those who do not understand the
example should take It as a signal that they need to read again the
preceding description of the PDPll.

3.4 SUBROUTINES

Before undertaking any significant programming tasks. the use of

subroutines must be discussed . A subroutine Is a sequence of
Instructions that performs an action . likely to be needed several times
In a program. organised so that only one copy of the Instructions need
exist. In a well designed program. the subroutines will have a neat
Interface that enables their actions to be thought of almost as an
extension to the instruction set of the computer . For example. a
 The Structure of the PDP11 39

subroutine which multiplies the Integer In registers R1 and R2 to give

an answer In RO can be thought of as a multiply Instruction. The
creation of programs Is greatly simplified If the programmer learns to
Identify subproblems whIch can be delegated to subroutines and to think
of the total problem In terms of the operations which these subroutines
represent. Also. If some care Is exercised by choosIng the Interface
specifications of subroutines In a SUfficiently general way. they will be
useful In other programs . In very complex programs. this hierarchical
structure should be applied through several levels . In the extreme.
subroutines may even be Introduced for actions whIch only occur once
In the program . as a means of reducing the complexity of the design
by abstracting out detail.

In general. a subroutine Is a sequence of Instructions that Is

' entered ' from several places In a program, and when It has done Its
Job. the program counter Is reset to the next Instruction of the program
proper In order to exit. To facilitate this the PDP11 has two special
Instructions ,

For most purposes the subroutine entry Instruction can be regarded

as the single operand function 0047 . It Is called Jump to SUbroutine and
has the ' mnemonic JSR. Two actions result from the execution of this
Instruction . First. after the operand address has been evaluated . the
value of the program counter (PC) Is stacked. It wil l at this time be
the address of the next Instruction and the stacked copy Is called a
'link' . Next the program counter Is reset to the address of the operand .
Thus If the Instruction

004737
002000

was In store lines 1000 and 1002, Its execution would ba aqulvalenl 10
the two Instructions

012746 -[SP)<=1004
001004
012707 PC<=2000
002000

It should now be obvious that the Instruction required at the end of

the subroutine must perform the action PC<=[SP)+ . to unstack the link
and copy It Into the program counter. The octal code for this
Instruction Is 000207 and It Is called return from subroutine (RTS) .

Clearly the correct operation 01 the subroutine mechanism relies

upon SP having the same value at the point of exit from a subroutine
that It had at the point of entry. This means that If any numbers are
stacked by the routine, they must be unstacked before the RTS
40 An IntroductIon to System ProgrammIng - Based on the PDP"

Instruction Is obeyed . One common use of the stack In a subroutine Is

to store copies of the Initial values of the registers that are to be used
within the subroutine so that they may be reset before exit.

As an example. consider that a subroutine Is required to multiply

the Integer In Rl by that In R2 placing an answer In RO and disturbing
only RO . Using the rnultlpllcatlon algorithms from Section 3 .3 .1 we
might write

010246 stack R2
005000 multiply sequence as above
060100
005302
001375
012602 unstack R2
000207

This Is. of course. a rather Inefficient way to multiply and a better

sequence will be given In Section 6 . 1.

If several registers are stacked on entry to a subroutine. the same

registers must be unstacked before exit. but in reverse order because a
stack Is a ' last In first out' storage structure. Within a subroutine
further subroutines may be called provided that each observes the
correct stack discipline. In fact a subroutine can call Itself. In which
case It would be called a recursive subroutine .

3. 5 THE JUMP INSTRUCTION

Another Instruction not previously introduced Is the 'Jum p ' Instruction

JMP . This again Is a single operand Instruction and like JSR It causes
the program counter (PC) to be set to the address of the operand . It
does not however stack a link. By convention we shall program all
'Jumps' within a subroutine by using the branch Instructions but those
going between routines will be JSR's or JMP's. In an exceptionally large
subroutine It may be necessary to use a JMP Internally because the
range provided by the a-bit offset of the branch Instructions might be
too small.

3. 6 BYTE ADDRESSING

A final Important aspect of the PDPll order code that we must consider
Is Its ability to operate on ' Bytes' . We have already said that the
addresses In the PDPll can refer to half words. These a-bit quantities
are called bytes and most of the computational Instructions can operate
on bytes as well as on 16-blt full store lines (or words) . The two
 The Structure of the PDPf 1 41

cases are distinguished by the most significant bit of the function as

Indicated In Appendix 1. However not all functions beginning with a one
are the byte form of the corresponding function beginning with a zero .
See, for examp le , ADD and SUB for which no byte forms exist. In
mnemonic form the distinction between the two kinds of functions Is
made by adding a ' B' to the mnemon ic In the byte case . When a
function Is a byte function any auto-Increment or auto-decrement It
contains will cause 1 (Instead of 2) to be added or subtracted , unless
the specified register Is 6 or 7 . Always. with registers 6 and 7 the
Increments and decrements are In units of 2 regardless of the function .
The most obvious need for byte operations Is In connection with text
processing where the text Is best stored 1 character to a byte .
Examples will be given later.

3. 7 ANOMAUES IN THE PDP11 INSTRUCTION SET

Some additional Instructions exist In the PDP11 Instruction set which do

not fit Into the regular system of encoding that we have considered
above . The main departure Is a further class of double operand
Instructions In which the mode bits of the source are taken to be part
of the function . Thus we have the format

L F2
7

wh ich has 7 bits In the function field .

In fact one instruction previously described as a single operand

Instruction Is really of this form. It Is the jump to subroutine Instruction
JSA which was sa id to have the function code 0047 . The '7' Is not
actually part of the function . It denotes PC . and It could be replaced
by any register, the actual operation of the instruction being as follows.
First the specified register As Is stacked. then the value of PC Is
copied to the specified register and finally PC Is reset to the address of
the destination . Obviously when As Is 7 the copy of PC Into As is
Irrelevant. which Is the form In which the Instruction was presented
earlier . The Instruction works this way so that the parameters for the
subroutine can be placed in locations Immediately following the JSA,
and they can be accessed from within the subroutlne by using As .

As a consequence of presenting the JSA Instruction In simplified

form. the complementary Instr uc ti o n ATS was also only partially
described. It was described as the zero operand Instruction

000207

In fact It Is also an anomalous form . with yet another format. In which

42 An Introduction to System Programming - Based on the PDP11

the 7 could be any register R. say . Its complete action Is

PC <= the va lue of register R

register R <= -[SP).

That Is the specified register Is copied to PC. and the register Is then
reset from the stack. It Is. therefore . necessary to advance the
register R to the first Instruction after the 'Inllne' parameters If the
facility to store parameters after the JSR Instruction Is exploited. This
can sometimes be achieved by using auto-Increment at the time of
accessing the parameters.

Another Instruction which follows the modified double operand form

Is the 'exclusive or ' Instruction (XOR) which Is an addition to the
repertoire to logical Instructions . This function operates on the
Individual bits of the two operands and generates a '0' In the answer If
the two operand bits are the same otherwise ' 1'. The general form of
the Instruction Is 074 Rs OEST meaning

OEST <= OEST (XOR) Rs.

The condition codes are set as for the other logical functions such as
BIC .

The final anomalous instruction that Is of general Interest Is the

'subtract one and branch' Instruction SOB. There are other anomalous
Instructions concerned with optional arithmetic extensions that can be
fitted to some POPlls. but these are not described here . SOB has the
unique format

077 R OFFSET

Where R specifies a register and the OFFSET Is a 6-blt unsigned

Integer. The Instruction combines Into one Instruction two actions which
occur frequently at the end of simple loops . and would otherwise take
two Instructions. namely

decrement the specified register

and branch If the result Is not zero .

The branch Is assumed to be always backwards . hence It takes the

form PC = PC - 2*OFFSET. Even so It can only branch half the
distance of a normal branch Instruction.

It Is a pity that In a computer with an otherwise neat and regUlar

Instruction encoding these anomalies need to exist. They result from a
combination of afterthoughts and tight physical constraints . Perfection
In practice Is rarely achieved.
 The Structure of the PDP11 43

3. 8 EXERCISES

1. Express the following operations as octal PDPll Instructions

R3 <= 0
R4 <= 10
R5 <= R2
(98) <= 0
[R3-6) <= 20

2. What Is the effect of the following sequences of Instructions

a) 005000
012701
000140
066100
000400
005301
005301
001373

b) 060202
010246
060202
060202
062602

3. Write the sort routine of question 2 example 2 as a sequence of

(octal) PDPll Instructions.

4. Write sequences of octal PDPll Instructions which perform the

operations

a) RO <= Rll
b) RO <= INTEGER PART (Rl/R2)
4 Operation and Bootstrapping

Present day computers are usually delivered complete with very

sophisticated programs supplied by the manufacturer to make them easy
to use . These programs will usually have been constructed. tested and
placed In the memories of the computer by means of the even more
sophisticated computers which the manufacturers use for the
development and production of software . An average user will treat the
computer. together with these Inbullt programs (systems software) . as
an Integrated system. and will never need to know about the underlying
hardware characteristics or the system software structure. He will
usually execute a simple sequence of switch operations at the time the
computer Is powered up. which bring the system Into tull operation .
and which he knows as the bootstrap sequence. In this book we are
very much concerned with the hardware characteristics and system
software structure. thus It Is Inappropriate to assume the existence of
system software. A better starting point for our purposes Is a more
primitive system equipped only with a simple means for reading from an
external media containing programs . The simplest device which has
been used In this connection Is a paper tape reader or a teleprinter
with a paper tape reader/punch .

Bootstrapping Is the term that has been traditionally used to describe

the process of loading. Into a computer system. programs of gradually
Increasing complexity and usefulness . unlike modern practice where one
key operation may activate millions of In built Instructions . The principle
Involved In a traditional bootstrap can be Illustrated as follows. Consider
that Initially the only way that Information can be loaded Into an empty
computer Is by using the switches and keys on Its control console In
much the same way that a pocket calculator Is used. Obviously this Is
tedious . therefore the first stage of the bootstrap process Is to key In a
program (called a loader) that has the ability to read In other
programs which have been keypunched on to paper tape. The notation
chosen to represent these programs will have direct bearing on the size
and complexity of the program that has to be manually keyed In.
Therefore. It Is advantageous to keep It simple. say to use octal
 Operation and Bootstrapping 45

notation. It follows that the preparation of programs to be Input In this

way Is stili tedious. so the next stage In the bootstrap Is to design a
better notation. and to write a program. In octal. to read In programs
written In this better notation. Again practical considerations should
moderate ambitions. and the step to the standard user languages such
as Basic. Fortran or Pascal should not be taken In one stride. Usually
the language used at this point Is a symbolic form of the machine
Instructions which stili largely maintains a one-to-one correspondence
between statements In the language and machine Instructions. At this
stage of the bootstrap It Is often expedient to write the program to read
In the symbolic programs (called an assembler) . In Its own language
(called assembly language). It has then to be translated Into octal
before It can be used . but the assembly language version forms a
useful test program . Obviously when the assembler. written In assembly
language. can again read Itself. It Is working fairly satisfactorily.
Furthermore. If any changes need to be made . they can be more
easily made to the assembly language version . This bootstrap Is
summarised as follows :

Write the loader In octal.

Key In the loader.
Write the assembler In assembly language .
Translate the assembler Into octal.
Use the loader to read the assembler.
Use the assembler to read an assembly language
version of Itself.
"Maintain" the assembler.

The process could be continued. and compliers for Basic. Fortran.

Pascal etc. could be written In assembly language.

4. 1 MANUAL OPERATION OF THE PDP11

From the point of view of manual operation there are two main types of
PDPll. Early versions of the machine such as the 11/20 and 11/40
have a control console with lamps and switches. The LSI based systems
have the absolute minimum of switches . and manual control Is achieved
by commands typed on a console teletype or VDU. Some of the larger
systems offer a combination of both facilities but these are not
discussed . It Is convenient to describe first the early system since the
basic actions available are similar.

The photograph In Figure 4. 1 Is of a PDPll/20 control panel.

Several other PDP11s have similar control panels. The main features
are : the two rows of lamps which usually display the address of the
most recently accessed store line and Its contents : a row of switches
(called the SWITCH REGISTER) which can be used to manually Input
binary numbers: and several switches and keys. to the right of the
46 An Introduction to System Programming - Based on the PDP"

SWITCH REGISTER. which control the actions of the computer.

Figure 4 . 1 A PDPll/20 Console

Most of the operations that can be Initiated from the control panel
depend upon the setting of a special Internal register. called the
ADDRESS REGISTER. Therefore. before any other action can be
performed. It Is necessary to operate the load address key ( LOAD
ADDR) . This key causes the number defined by the setting of the
SWITCH REGISTER to be copied Into the ADDRESS REGISTER. The
deposit key (DEP) provides the means for writing numbers Into the
store. Each time It Is operated. It caples the number. which Is set up
on the SWITCH REGISTER. Into the store line whose address Is given
by the value of the ADDRESS REGISTER. If the DEP key Is operated
repeatedly. the number In the ADDRESS REGISTER will be repeatedly
Incremented to address successive store lines. Thus to load a program
Into the store of the PDPll by means of the console facilities we
proceed as follows .

Step Set on the SWITCH REGISTER the address of the store

line Into which the first Instruction Is to be placed .
Step 2 Operate the LOAD ADDR key .
Step 3 Set on the SWITCH REGISTER an Instruction .
Step 4 Operate DEP.
Step 5 Repeat from Step 3 for each Instruction of the program.

Having loaded a program In this way . It may be prudent to check It

before running It. This can be done by using the examine key (EXAM) .
When the EXAM Is operated. a copy of the store line whose address Is
given by the value of the ADDRESS REGISTER. Is displayed on the
second row of lamps on the console. If the EXAM key Is repeatedly
operated the number In the ADDRESS REGISTER Is repeatedly
Incremented to refer to successive store lines. Thus a program may be
 Operation and Bootstrapping 47
checked by performing

Step Set the SWITCH REGISTER to the address of the first

Instruction .
Step 2 Operate the LOAD ADDR key.
Step 3 Operate the EXAM key to read an Instruction to the
console lamps .
Step 5 Repeat Step 3 for each line of the program .

Note that it Is only when either the DEP key or the EXAM key Is
repeatedly operated that the content of the ADDRESS REGISTER Is
Incremented . Alternate operation of these keys will leave the ADDRESS
REGISTER unchanged . This means that If an Incorrect value Is noticed
after operating EXAM It can be corrected simply by setting the correct
value on the SWITCH REGISTER and operating DEP.

In order to cause the computer to obey a program In the store It Is

first necessary to set the ADDRESS REGISTER to the address of the
store line containing the first Instruction . This Is achieved by setting Its
address on the SWITCH REGISTER and operating LOAD ADDR. After the
ADDRESS REGISTER has been set. the START key should be operated .
This copies the content of the ADDRESS REGISTER to the program
counter and starts the control unit. The machine can run In continuous
or single mode according to the setting of the ENABLE I HALT switch . In
continuous mode It executes consecutive Instructions In the normal way
until encountering a HALT Instruction. but In single mode It stops after
each Instruction and the next Instruction Is only obeyed If the continue
switch (CONT> Is operated .

It Is also possible to examine and set registers by manual operation

of the computer. This Is sometimes useful when It Is halted having
partially executed a program . For this purpose the registers are viewed
as part of the store and not as special registers outside of the store .
Some high numbered addresses are reserved for this purpose (and
others). Hence the actual store of the PDP11 cannot be as large as
the address allows. In fact the highest numbered 4096 storellnes. of
the 32768 made possible by the 16-blt-address. are treated specially.
and in particular addresses 177700 to 177707 octal correspond to
registers 0 to 7 . There Is a departure here from the normal addressing
rules because the registers. which are 16 bits long. have consecutive
rather than even addresses. The reg isters can only be accessed In this
way from the console. not by program . Thus R4 can be Inspected by
the sequence

set the SWITCH REGISTER to 177704

operate the LOAD ADDR key

and the program counter can be set to 2000 by the sequence

48 An Introduction to System Programming - Based on the PDP11

set the SWITCH REGISTER to 177707

operate the LOAD ADDR key
set the SWITCH REGISTER to 002000
operate the DEP key

4 .2 MANUAL OPERATION OF AN LSlll

The LSI types of PDP11 present an apparent contradiction. They are the
simpler and cheaper systems In hardware terms yet they have a more
sophisticated mechanism for manual control. However. this Is easily
explained .

It must have been obvious from the description of the control unit of
the simple computer In Chapter 3. that It bore strong resemblance to a
program. In fact. the operation of a control unit can be formally
expressed as a program. and this Is often done when programs written
In the machine code of one computer are to be run on another. An
actual example Is given In Section 5. 11. In the form of a PDP11
program that emulates the action of the MUO processor. This technique
Is In fact the basis of computers that are said to be microprogrammed .
In such computers the hardware provides a very primitive Instruction set
and there Is a program written In this Instruction set. permanently
resident In the machine. which Interprets the user Instruction set.
LSI11 s are microprogrammed In this way and the microprogram Is
contained In a read only memory Inaccessible to the user. Therefore.
without Incurring any extra hardware cost. except possibly as a result of
Increasing the size of the microprogram store . quite sophisticated
control operations can be provided . In fact all the later models of
PDP" are microprogrammed but some. such as the 11/40 . maintain
control console compatibility with earlier models such as the "/20.
others such as the 11/34 have a different key arrangement but a
functional similarity. and on the very latest models no hand switches
are provided.

Entry to the microprogram which provides the control operations can

be caused In several ways . For the present It Is enough to know that
this happens when the machine Is first switched on and when the user
operates the Interrupt (or break) key on the console teletype or VDU.
There are two main commands available to the user which correspond
roughly with 'LOAD ADDR ' and 'START' . These take the form of an
octal number followed by the characters '/' and 'G' respectively . The
command terminating with '/' Is said to 'open a store location' . In
fact. the store location whose number preceded the 'L". That Is. the
control program notes Its address and prints Its value . Once a store
location has been opened further commands can be used which have
similar effects to the EXAM and DEP keys . A new value Is loaded Into
a store line by typing Its value In octal followed by one of the folloWing
 Operation and Bootstrapping 49

keys.

LF this causes the given value to be deposited In the open store line
al')d the next store line Is opened which means that Its address
and value Is printed .
t this has similar action to LF except the new store line opened Is
the previous store line .
CR this causes the given value to be deposited but there Is then no
open store line, therefore the next command should be a I or G .

If any of the above keys Is operated without first giving a new value,
the value of the open store line Is unchanged but the action of moving
onto a new open store line stili applies .

If the values of the registers are to be Inspected, a register can be

opened by using R followed by the register number, Instead of the
address. Thus If It Is required to Inspect the content of registers O. 1 .
2 and 3 , this can be done as follows .

RO/OOOOOO LF CR
RlI000001 LF CR
R2/000002 LF CR
R3/000003 CR LF
•
The bold characters above Indicate the computers response to a user
typing the characters shown In normal type. assuming that the values of
RO. R1. R2 and R3 were O. 1, 2 and 3 at the time . The It symbol Is
output by the computer when It Is ready to accept a new I or G
command .

The G command Is the means wheroby a program already In the

store Is started. It has the form octal number followed by G. The octal
number Is taken as the Initial value of the program counter . that Is . It
Is the address of the first Instruction to be obeyed. Once a program
has been started the console Is no longer effective as a control device
unless the user operates the break key . In this event. the computer will
cease execution of the program. print the value of program counter ,
and revert to console mode awaiting further commands. One use of this
feature Is that the user can at this stage Inspect or even alter the
content of the store lines and registers. and then cause the program to
continue from where It was Interrupted by typing P.

There are two other ways In which the user can regain console
control from a program . One Is by setting the HALT switch , before
starting the program. In this case the computer will automatically halt
the program after each Instruction and return to console mode. This
enables the user to 'single shot' through the program by repeated
operation of the P command. Although this Is not to be recommended
50 An Introduction to System Programming - Based on the PDP11

as the normal way of finding errors In programs It Is sometimes

necessary as a last resort. The second way In which console control
can be resumed Is by the program obeying a halt Instruction.

There are some other commands In the repertoire of the

microprogram but they need not be considered here .

We must now reconsider the problem of bootstrapping some

programs Into the PDPll , which will facilitate the Input of further
programs . We have chosen to assume Initially an LSlll with a console
teletype. with paper tape attachment . and later the same system with a
second teletype channel connected to a teletype line from a general
purpose timesharing system. For both of these configurations the
bootstrap will Involve an octal loader. An attractive alternative to the
assumed paper tape system would be a cassette tape system .

4 .3 AN OCTAL LOADER

The octal loader will read a program presented as a sequence of

characters. These might have been punched on external media such as
paper tape or stored as a file . We shall consider paper tape .
Characters punched on paper tape will have the codes given In
Appendix 6. That Is. If the pattern of holes punched to represent say a
'3' Is read as a number. Its value will be octal 063 . The conventions
that a programmer Is to follow In preparing the paper tape must now be
decided .

It Is usual to have a definite character to mark the beginning of the

Information on the paper tape rather than assume that the tape will be
positioned In the reader exactly on the starting character . This
character will be 'f ' and the loader will be organised to Ignore any
preceding characters which In general would be runout characters and
possibly newline or carriage return characters .

The main Information following the t will be the list of octal numbers
representing the program . and the loader could place them In fixed
positions In the store, but It Is more useful to allow the user to specify
a position . Therefore. the first number after the Initial t will be taken
as the address of the first store line Into which the program. which
then follows. Is to be loaded. Each number In this list must be
separated from the adjacent ones and the space or newline characters
would be the obvious choice, so that If the tape Is printed each
number. or group of numbers separated by spaces , will appear on a
separate line . The list of numbers must be terminated by a further
definite character and "l" Is again used for this purpose . When this
second ' f ' character Is encountered the loader will halt. Usually the
 Operation and Bootstrapping 51

user will take control at this point and manually start the program. If.
however. there are further Instructions to be read a new tape can be
placed In the reader and operation of CONT (or typing P) will restart
the loader .

Thus . a simple program written for the loader will have the form

t address of the first Instruction (In octal>

first Instruction (In octal>
second Instruction (In octal>

last Instruction (In octal>

t

Although the norm will be for each octal number to appear on a

separate line. the loader given below will Ignore any sequence of
characters , other than octal digits or t , between numbers.

Now that the loader notation Is specified we can consider Its

design . The design of any program Is Intrinsically Iterative . In fact.
depending upon the experience of the programmer. several attempts will
be required before a design Is established that both has an acceptably
tidy structure. and meets the specification. Also . the design Is often
best approached In a 'top down ' manner. This means that the overall
program Is partitioned Into sections and the function of each section.
and the way that It Is to connect (or Interface) to other sections . Is
clearly Identified . The design detail for each section Is then developed
separately. Some sections of the program will be further sUbdivided and
some will become subroutines which are used In several places In the
program. In practice the design process will not proceed exclusively In
this strict ' to p down' manner , because It may be necessary to explore
the Implementation of possible subsections before deciding on a
particular way of partitioning the program, but as It crystallizes It Is
best presented In this manner . Thus, the reader should not be unduly
concerned If he cannot see. at present. how to produce the design of
a loader from scratch . It Is sufficient to understand the design given.

The octal loader has a main program section and two subroutines .
One subroutine Is responsible for reading the Individual characters from
paper tape and a second will read complete octal numbers. Thus the
operation of the main program can be expressed as In Figure 4.2.

It Is clear that the subroutine concerned with reading octal numbers

must take special action when the final °to occurs In the Input.
otherwise the program has no end. The design of this subroutine Is
shown In Figure 4 .3 .
52 An Introduction to System Programming - Based on the PDPf 1

1
OCTAL LDAIEl

Figure 4.2 Octal Loader Main Loop

It might be helpful to point out that the octal number Is built up In

Rl a digit at a time, and that each time a new digit Is read the
existing ones are shifted left by 3 places (or multiplied by 8) to make
room for it. Also It must be remembered that If the character '0' Is
read, RO becomes (octal) 60 and if the character '7' is read It
becomes 67. Therefore 60 Is subtracted to generate the required octal
value In the range 0 to 7.

The design of the other subroutine for reading characters depends

upon detail which Is not presented until much later . Hence, In the
coding given below , the Instructions of this subroutine are Included
without explanation, and It Is discussed again In Chapter 8 .

Before the loader can be expressed In octal a suitable store layout

must be decided . There Is only the stack and the loader to be
accomodate ; therefore , we shall reserve the first 256 storellnes for
the stack, and place the loader Immediately above this In the store .
Remembering that the 256th store line will have address 1000 octal. we
have the layout

1000 ->
STACK I LOADER AVAIL TO USER
 Operation and Bootstrapping 53

l
READ OCTAL NUMBER

Figure 4.3 Read Octal Number Routine

The code for the loader can now be derived from the given flowcharts.
It was not written out In a single pass because the addresses In some
Instructions depend upon the position that other later instructions
occupy . but after some trial and error and some tedious counting the
following sequence results. Note that an Instruction not mentioned on
the flowchart has been added to the main program. to set SP to the
chosen address so that the JSR Instructions will function properly. Also
the operands of the JSR Instructions are expressed In relative mode . so
that the loader could In fact be placed anywhere In the store. although
it Is written against addresses 1000 upwards to help readers who wish
to check the detail of the encoding .

POSN. IN STORE INSTRUCTIONS COMMENTS

I I STARr OF MAIN PROGRAM
1000 I 012706 I SET SP - 1000
1002 I 001000_ I
1004 f 004767 I I ENTER THE READ CHARACTER
1006 I 000120 I I SUBROUTINE AT U30
54 An Introduction to System Programming - Based on the PDP11

1010 020027 1 COMPARE RO WITH • t •

1012 000136 1
1014 001373- BNE (-5)
1016 004767 ENTER THE READ OCTAL NUMBER
1020 000012 SUBROUTINE AT 1134
1022 010102_ R2 <- Rl
1024 004767 I ENTER THE READ OCTAL NUMBER
1026 000004 I SUBROUTINE AT 1134
1030 010122 1 [R2] + <- Rl
1032 000774- BR (-4)
START OF READ OCTAL NUMBER
1034 005001_ CLEAR Rl
1036 004767 ENTER THE READ CHARACTER
1040 000066 SUBROUTINE AT ~130
1042 020027 COMPARE RO WITH • O'
1044 000060 I
1046 100403-1 BMI (3)
1050 02270011 COMPARE • 7' WITH RO
1052 00006711
1054 10000611 - BPL (5)
1056 020027 II COMPARE RO WITH •t •
1060 000136 II
1062 001365 -I BNE (-11)
1064 000000 1 HALT
1066 000167 I RE-ENTER MAIN PROGRAM
1070 177706 -l.
1072 006301 R1 X 8
1074 006301
~076 00630~
1100 060001 R1 + RO - 60
1102 162701
1104 000060
1106 004767 ENTER THE READ CBARAC'l'ER
1110 000016 SUBROUTINE AT ~130
1112 020027 COMPARE RO WITH • 0 •
1114 000060
1116 ~00403 BMI (3)
1120 022700 COMPARE • 7' WITH RO
1122 000067
1124 100362 BPL (-14)
1126 000207 RTS
1130 005237 START OF READ CHARACTER
1132 177560
1134 105737
1136 177560
1140 100375
1142 013700 FOR EXPLANATION SEE CH 8
1144 177562
1146 042700
1150 000200
1152 000207
 Operation and Bootstrapping 55

This loader can now be keyed Into the machine as described earlier
and each time an octal program. punched on paper tape. Is to be run
the following sequence of actions will be required

load paper tape Into reader attachment of the TTY

set octal '000 on the handswltches
operate the LOAD ADDR key
operate START
start the TTY tape reader.

A simple test for the loader would be to use It to load the sequence
of Instructions given In Chapter 3 to find the largest number In a list of
numbers. It Is only necessary to decide where the sequence Is to be
placed In the store and to append a suitable list of numbers for the
Instructions to scan. Thus the program and data to be punched Is

t2000
013700 002040 012701 000002 026100 002042 003402 016100
002042 062701 000002 020127 000020 001366 000000 000001
000002 000100 177000 000101 000000 177777 000100
t

If this paper tape Is now fed Into the computer as described above,
and entered at address 2000. The computer will halt with the PC =
2036 and an answer In register 0 which will be '0' .

Any reader with access to a PDP" who keys In the octal loader,
and uses It to read some octal programs will appreciate that In practice
It becomes necessary to repeat the manual loading sequence many
times . The loader Is vulnerable to being overwritten by accident. and
on machines with 'MOS' stores the contents are lost each time the
machine Is switched off. For this reason It Is attractive to devise a
means by which the octal loader can Itself be read In from paper tape.

4. 4 A PRACTICAL APPROACH TO BOOTSTRAPPING

When considering a bootstrap process In detail we must recognise that

there are two problems . The first Is to establish a particular set of
programs In the computer store for the first time, and the second Is to
conveniently re-establish them on subsequent occasions. The octal
loader Is one specific example . Obviously It could be used to read Itself
but this would be of no advantage . What Is required Is a simpler format
which requires fewer Instructions to be manually keyed In, and If
possible results In shorter paper tapes.
56 An Introduction to System Programming - Based on the PDP11

A binary loader which simply loads consecutive a-bit characters.

from a paper tape. Into consecutive store lines. Is the most compact
and economical system. However. there Is some difficulty in preparing
the Input for such a system. Keyboard devices work with a fixed set of
codes. as for example In Appendix 6 . and they cannot be used to
generate all possible a-bit combinations. The simplest method Is to first
of all achieve the Input of the Information by some other means. and
then to use a sequence of Instructions to output this Information In the
requisite format. for subsequent re-Input . Thus we need to add to the
octal loader. already given. a binary output routine. Activation of this
routine will generate a paper tape which can later be re-Input. after
keying In a corresponding binary input routine (or loader). This same
mechanism might be used at each principal stage of the bootstrap to
facilitate an easy return to that stage whilst the next stage Is being
'debugged '. The detail of the two required routines depends entirely on
the mechanics of driving the punch and reader and Is not discussed
further until Chapter a . For the present they will be referred to as
BINOUT and BININ.

The simple bootstrap sequence .gIven earlier might now be refined as

follows

Write octal Loader In octal

Key In the octal Loader
Debug the octal Loader
Read In BINOUT
Use BINOUT to produce a binary tape
for the octal Loader
• Key In BININ
Use BININ to read the octal Loader
Use the octal Loader to read the Assembler
Debug the Assembler (octal version)
Use BINOUT to produce a binary tape for the Assembler
• Key In BININ
Use BININ to read the Assembler
Use the Assembler to read the Assembler In own langage
Debug the Assembler (Assembly Language version)
Use BINOUT to produce a binary tape for this Assembler
• Key In BIN IN '
Use BININ to read the Assembler
Use the Assembler for the next stage .

The points marked • are the places at which the bootstrap can be
restarted If for any reason the content of the store Is lost.

It only remains to decide the operating conventions for BINOUT and

BININ and a suitable store layout for each stage of the bootstrap .

BINOUT requires to be given the addresses of the first and last lines
 Operation and BootstrapplnQ 57

of store containing the Information that Is to be punched on tape. This

can be reduced to one address If It Is assumed that BINOUT has been
placed In the store Immediately before or after the Information to be
punched. Therefore It will be assumed that BINOUT Is to be keyed (or
loaded) Into store Immediately before the Information that Is to be
punched. and that before BINOUT Is entered RO Is manually set to the
address of the first store line after the last one containing the
Information to be output .

BININ will be written to be keyed Into store with Its last Instruction
Immediately preceding the store line at which loading Is to commence .
It will load until there Is no more paper tape . Further operating
Information for BINOUT and BININ . that will be required If a computer Is
available to try them In practice. Is that execution of both Is to be
started at their first Instruction. Also the second line of BININ must
always be the absolute address of Its last line . Finally. the tape
produced by BINOUT Is to be placed In the reader for reading
backwards from either of the two 366 characters which are the fourth
and fifth last character punched by BINOUT.

It will be apparent from the rather ad hoc nature of the specification

that the criteria applied In Its production do not relate to ease of use .
They do. however. result In the minimum number of key operations In
getting the system started.

4. 5 BOOTSTRAPPING BY 'CROSS COMPILING'

Cross compiling Is the term used when one computer Is used to

compile (or assemble) Instr uc tions for another. We shall demonstrate
this by assuming the existence of any computer (X) that allows a user
at a terminal to create and print flies . The system Is now configured by
Inserting the PDPll Into the line between the teletype and computer X.
That Is. the PDPll must have at least two teletype channels and one Is
connected to the teletype and the other to the computer X.

Through this configuration It Is required to use the facilities of

computer X to create programs for the PDPll and then to load these
programs Into the PDPll. Instructions are required for the PDPll that
will allow the user of the teletype to Iss ue normal commands to
computer X and receive their responses . This sequence. to be called
TRANSMIT . will enable a program for the PDPll to be created In say
octal In computer X. The only additional requirement Is for a command
to be Issued to computer X (for example LIST FILE) that will cause It to
respond by printing the octal program . and for the Instructions In the
PDPll to know that output from the computer X at that point Is to be
treated as lnput to be loaded and not printed . Any character not used
In the command language of computer X can be used to effect this
58 An Introduction to System Programming - Based on the PDP11

change of state In the PDPll. we shall assume s , It Is probably best If

entry to the loader Is delayed until the first significant character of the
program to be loaded Is received. in case any error condition arises .
Thus In the flowchart given below the loader Is only entered when
computer X produces the character ' t '. The octal code to be
downloaded might be generated In a number of ways . One way used
by the author has been to translate the assembler. described In
Chapter 6. in Fortran. and to run It on the computer X.

A flowchart description of the required instructions for TRANSMIT Is

given In Figure 4 .4.

1
TRANSMIT SEIJ.EIa

Figure 4 .4 The TRANSMIT Sequence

The reason for the particular sequence of tests in Figure 4 . 4 may

not be clear until Chapter 8. nor can the code for the flowchart be
given before them. It should however be clear that each time the user
 Operation and Bootstrapping 59

types a character and computer X Is ready to receive It. It will be

transmitted. Likewise each time computer X prints a character and the
users teletype Is ready for It , It will be printed . It should also be clear
that If the user types a '$' It will not be transmitted but the sequence
will enter a watchful state In which as soon as computer X returns a 't'
the loader will be entered.

Only one problem remains, namely how Is the above sequence and
the loader to be Input. They can of course be keyed In but this Is
tedious since together they occupy over 100 lines of store .

If the teletype has a paper tape attachment then BINOUT and BININ
can be used to reduce the problem to more manageable proportions.
Failing this the problem can be allevlated by using the teletype directly
connected to computer X to get to a state where one final character
will cause It to output the required code In some more optimal format.
At this point the system can be reconfigured to Include the PDPll. The
only code that then has to be keyed In would send the final character
and load the response. This Is a rather Inelegant approach which Is
not pursued here. Perhaps the best solution of all Is the one mentioned
below .

4.6 AUTOMATIC BOOTSTRAPPING

Microprogrammed computers which have magnetic discs attached usually

have an automatic bootstrap sequence built Into their microprogrammed
control sequence . This can be entered when a particular control
switch Is operated or a character Is typed on the control console . Two
examples are as follows.

In the case of some models of PDPll there Is a 'boot' key on the

control panel . There may also be a bootstrap command . which can be
typed on the operators console . Both these methods activate some
special hardware which will copy a block of Information Into memory.
usually from a magnetic disc, although other devices may be selected
as the bootstrap device. The 'boot' key on a PDPll/44 , for example .
will transfer the first block from disc drive zero Into memory at address
zero and start obeying It. Obviously, this would only be the first stage
of a bootstrap. and a suitable sequence of Instructions would have to
be stored on the first block of the disc . which could read Into memory
more substantial system programs also previously placed on disc.

A similar facility exists In LSlll systems . For example. the

bootstrap of a LSlll/03, with an FDl771 floppy disc system, can be
activated by operating reset and then typing '8' '8' on the control
console. In this case sectors 1, 3. 5 and 7 are transferred to main
60 An tntroauctton to System ProgrammIng - Based on the PDP11

memory at address zero and the code sequence they contain Is

obeyed . There Is further discussion of the method of controlling the
FDl771 floppy disc system In Section 8.8 .

4.7 EXERCISES

1. Key the multiply sequence given In Section 3. 3. 1 Into the store of

a PDP11 at address 2000a. Read It back and check It using the
EXAMINE facility . Place a HALT Instruction In store line 2010a.

2. Using the facility to 'DEPOSIT' Into the special addresses 177700

to 177707 set the registers as follows :

RO = -1
R1 16
R2 =4
R7 = 2000 8 ,
Again use the EXAMINE facility to check the result.

3. Now cause the sequence keyed In as In exercise 1 to be executed

with the registers set as In exercise 2 . That Is. operate the
START switch or type 2000G depending on the type of PDP11
which you are using . Check the value of the program counter
( R7> . It should be 2012. Also check the answer In RO.

4. With the multiply sequence stili In memory set

R1 4
R2 = -1
R7 = 2000

Again operate start. or type 2000G, and If you can observe the
time needed to complete the multiplication . Check that the answer
In RO Is correct and compute the approximate average Instruction
time of your computer.

5. Key Into the store of a PDP11 the loader given In 4 .3. 'Start'
execution of the loader at the first Instruction (octal 1000) and
either type the sequence of Instructions given on page 60. After $
has been typed the loader should halt. Now 'start' the sequence
at the first Instruction (octal 2000). It should halt at address 2036
octal. Examine the content of register O.
5 A Simple Assembly Language

The simple assembly language (SAL> described here Is very similar 10

the standard manufacturers assembly language for the PDPll
(MACRD11). but certain restrictions have been Imposed to enable a
simpler smaller assembler to be produced . There Is also one addition
of some significance. namely the block structure described in Section
5 .6 below . All modern programming languages are founded on this
notion . and Its Introduction Into SAL serves to Illustrate the principle in
addition to being a useful feature. The main characteristics of SAL.
which also apply to most other assembly languages are as follows

Each Instruction In assembly language corresponds exactly to one

machine Instruction .

The function parts of instructions are expressed by their mnemonics .

for example. ADD . BNE etc.

Store lines whose addresses are to appear explicitly In instructions

are given names .

Values can be associated with names by one of two different

mechanisms . First a name can be attached as a label to an
Instruction and Its value Is then the address of the store line
containing the Instruction. Second a value . which Is a function of
the values of other names and constants. can be assigned directly
to a name by means of a statement called a 'Iabel setting directive' .

Constants can appear In a number of contexts . for example. as an

operand. as the address of an operand and In a list of constants
embedded In a program. The constants arise naturally in a variety
of forms . for example . as decimal numbers. octal numbers and the
codes for characters . The assembly language provides a notation for
each of these variations.

A block structure is provided to localise the scope of a name .

Outside the block In which a name Is defined. It cannot be
62 An Introduction to System Programming - Based on the PDP11

referenced unless It Is defined again . Usually each subroutine Is

expressed as a separate block .

The assembly language SAL Is Intended as part of the bootstrap

process , leading eventually to high-level language use of the machine .
Therefore the programmer Is given full control of the store layout. By
contrast. some other assemblers are Intended to be used for user
programs, possibly In conjunction with high-level languages, and the
responsibility for store allocation In that case rests with the Assembler.

5. 1 A SAL PROGRAM

A program In SAL Is a sequence of statements terminated by an enter

statement . The assembler translates the program , statement by
statement Into Its binary equ ivalent. and upon encountering the
'ENTER' , It will normally set the program counter to the address of the
first Instruction. thus causing the program to be obeyed . A program
usually cons ists of several subroutines delimited by 'BEGIN' and 'END'
and a main program sequence . In a complicated program, the block
structure might extend through several levels of nested 'BEGIN 's and
' END' s . It might be helpful to Illustrate the language with an example of
a SAL program before giving the detailed rules of the language . The
example for this purpose , g iven In Figure 5.1, Is the octal loader from
Chapter 4. The resulting binary code would correspond exactly with the
octal of Chapter 4, If It was translated to run at the same address.
Assembly language is meant to be a readable form of machine
Instructions , and It Is hoped that Figure 5. 1 demonstrates this .

In order to present the detail of SAL , It Is conven ient to classify Its

statements under the headings, Instructions, constant statements and
directive statements . However , all of them Involve constants, therefore
the general form of constants will be described first.

5 .2 CONSTANTS

A constant can be expressed as any of the following five forms of basic

constant. or as an expression Involving several basic constants

octal constant (e.g, 12, 177560)

decimal constant (e.g, 10" 1023.,99)
character constant (e .g, 'A, '7)
double character constant (e.g . "AS, "CD)
label (e.g, L1, RDCH)
 A Simple Assembly Language 63

• - 2000
STARr:J«lV t~OOO,SP; STARr OP OCTAL LOADER
LllJSR PC,RDCH
CMP RO,t't
BNE Ll.
JSR PC, RDOOl'
K>V Rl.,RZ
LZ :JSR PC,RDOOl'
K>V Rl., (RZ)+
BR LZ
RDOOl':BEGIN; READ OCTAL NUMBER SUBROUTINE
CLR Rl.
L3 I JSR PC, RDCB
CMP RO,t'O
BMI Ll.
CMP "7,RO
BPI. LZ
LllCMP RO," t
BNE L3
HALT
JMP
LZIASL Rl.
ASLRl.
ASL Rl.
ADD RO,Rl.
SUB "O ,Rl.
L4IJSR PC, RDCB
CMP RO,t'O
BMI LS
CMP t'7,RO
BPI. LZ
LSIRTS PC
END
RDCHI BEGIN; READ CHARACTER SUBROUTINE
STATLN - l.77560
INC otSTATIM
Ll.1 TSTB OtSTATIM
BPI, Ll.
K>V OtSTATLN+2, RO
BIC t200,RO
RTS PC
END
ENTER

Figure 5. 1 An example of a SAL program

Octal constants are any sequence of octal digits not followed by a

',.' , The binary value Is right Justified. and truncated to 16 bits. That Is
64 An tntroductton to System ProgrammIng - Based on the PDP11

to say

1 Is equivalent to 000001
12 Is equivalent to 000012
5555555 Is equivalent to 155555.

Decimal constants are any sequence of decimal digits followed by a

' . ' , The onus Is on the programmer only to use constants that will be
In range when converted to 16-blt binary. Any sequence of digits
containing at least one of the digits ' 8 ' , '9 ' , will be taken as a
decimal constant even If there is no following

Character constants are provided to avoid the need to refe r to the

Table In Appendix 6 whenever the code corresponding to a character of
Input or output Is required. The distinguish ing character is ' after wh ich
any character (except CR or LF) may be given. The constant generated
by the assembler will be the value of the given character In the Table
In Appendix 6 . Thus

'A is equivalent to 101

'7 is equivalent to 67

Double character constants are usually used when It is required to

generate a list of character constants packed two to a 16-blt word .
Here the qualifying character is " and It causes a 16-bit constant to be
generated whose two bytes contain the character codes for the two
characters which follow It. Thus

"AS Is equivalent to 041101

"SA is equivalent to 040502 .

Note that because the first byte of a storellne Is the rightmost one the
characters appear to be Interchanged .

Labels are names which have been given values elsewhere In the
program. When used as constants their values are substituted . Names
always begin with a letter which may be followed by up to five further
letters and/or digits . If a constant Is specified by a name that has
been earlier defined, it is called a backward reference. whereas If the
name Is later defined. It Is called a forward reference . There are some
contexts In which a forward reference Is not allowed . and these will be
Identified as they arise .

Expressions are sequences of basic constants connected by the

operators
 A Simple Assembly Language 65

+ (meaning add)
- (meaning subt:ract:)
" (meaning mUltiply)
I (meaning divide)
& (meaning logical •and' )
I (meaning logical (inclusive) 'or')

and possibly preceded by a unary plus or minus sign. The assembler

evaluates each expression as it reads it from left to right. in order to
generate the equivalent 16-blt constant. A legitimate but frivolous
example is

-1& 177400!'A+256"16 .

This would be evaluated 'left to right' with all operators having equal
precedence to yield

((((-1)&177400)! 'A)+256)"16 = 2020 .

More realistic examples usually involve labels and are often quite
simple. for example Ll+2. and COUNT-l. would be typical. It should
be noted that forward references are not permitted except when the
(forward referenced) name is the entire expression . Thus. at a point In
the program where Ll is not yet defined . ' L I ' alone Is a legitimate
form of expression, but ' Ll + l' and "- L'l ' are not .

5. 3 INSTAUCTIONS

The Instruction forms of SAL accommodate the four types of instructions

which exist in the machine. namely . double operand. single operand .
zero operand . and branch Instructions.

Double operand instructions consist of the instruction mnemonic

followed by at least one space and the two operands separated by a
comma. for example 'MOV A1. A2 ' which produces the octal Instruction
010102 . Any of the F2 mnemonics introduced In Table 3 .1 can be
used. and the operands can be any of the 14 operand forms described
In Section 5.4. except in those anomalous functions where the full
operand form is not allowed .

Single operand Instructions consist of any F1 function followed by

any of the operand forms. again separated by at least one space . An
example Is 'ClA A1' which yields 005001 .

Obviously the zero operand Instructions only involve a mnemonic. for

example 'ClC'.
66 An Introduction to System Programming - Based on the PDP11

Branch Instructions have a very restricted operand form. namely a

label. The value of the label Is used to compute the offset. Thus
' Ll : BNE Ll' Is equivalent to 001377. and

BEQ L1
Ll:

Is equivalent to 001400 . Clearly In more realistic examples. the label

would not be so near to the Instruction which references It.

5. 4 OPERANDS

There are 14 operand forms In SAL which correspond to the eight basic
addressing modes. the four modes that have special significance In
conjunction with PC. and alternative notations for two modes which
arise out of a rationalisation In the notation. Using the symbol <C> to
represent any constant and <R> to represent any register. the operand
forms can be defined thus

Mode 0 <R> example Rl

Mode 1 @I<R> or ( <R» example @lR3 or (R3)
Mode 2 ( <R» + example (R2)+
Mode 3 @I( <R>)+ example @I(Rl>+
Mode 4 -( <R» example -ra»
Mode S @I-«R» example @I-(R2)
Mode 6 <C> «R» example 10(R3)
Mode 7 @I<C> «R» example @lLl+S12. (R3)
Mode 2/PC t<C> example t17
Mode 3/PC @It<C> example @lt2000
Mode 6/PC <C> example Ll
Mode 7/PC @I<C> example @lSTATLN+2
Mode 7 @I( <R» example @I(Rl> e.@l0(R1)}

Registers 0 - S are denoted RO. R1. ... RS. but registers 6 and 7
are denoted by the names SP and PC to remind us of their special
functions .

5.5 CONSTANT STATEMENTS

When It Is required to Include a list of constants within a program. they

are written as a single statement preceded by the symbol '. WORD'. and
separated by commas. For example

POWERS: . WORD 1. 10 .. 100 . • 1000.• 10000.

would cause a table of powers of 10 to be assembled Into consecutive

16-blt words. and the address of the first to be assigned to the value
 A Simple Assembly Language 67

of the label POWERS. In the case of very large tables It may be

necessary to write them as several consecutive statements .

5.6 DIRECTIVE STATEMENTS

These statements direct the assembly process without causing any

Instructions to be assembled Into the program . BEGIN and END are
clearly In this category . As has already been stated, they delimit the
block of statements which they contain. The significance of this Is that
the definitions of all the labels defined within the block are erased at
the end of the block. ENTER Is another directive and It marks the end
of the program.

BEGIN
Ll:

BEGIN
BEGIN

-) Ll
END

Ll :
END
-) L1
END

Figure 5. 2 Example of Labels in Blocks

One directive remains , It Is the 'label setting directive' . The general

form of this statement Is

name constant

Examples are

STATLN - 177560
L3 - L4
BUFf' - STATLN+2

There are some peculiarities of this type of statement that should be

noted . First, It Is the only statement which violates the normal block
structure rule relating to the scope of names. Normally the use of a
name In a constant refers to a definition of the name (either before or
after this use) In the same block. Failing that. the name may be
B8 An Introduction to System Programming - Based on the PDP' 1

defined In a block which encloses the one In question . If there Is a

nest of blocks and the same name Is defined In more than one. each
reference to the name will relate to the most Immediate block. For
example . In Figure 5.2 the first reference to Ll relates to Its second
definition. whereas the second reference relates to the first definition.
The exceptional feature of the label setting directive Is that the names
In the constant part cannot be forward references . For each such name
the nearest (In a block structure sense) prior definition Is always used .
Perhaps this can be made clear by the example In Figure 5.3 .

SAL FORM OCTAL EQUIVALENT

COUNT - 10.
COUNT2 - 20.
BEGIN
COUNTl - COUNT
COUNT - 30 .
K>V #COUNT, Rl 012701
000036
K>V #COUNT1, R2 012702
000012
K>V #COUNT2, R3 012703
000000
END

Figure 5.3 Example of label setting directives in blocks.

The label setting directive always generates an explicit value for the
label: hence. Inside the block COUNT1 and COUNT have the values 10
and 30 decimal. All references to names which have already been
defined In the current block are replaced by their values as they are
assembled . References to names not yet defined In the current block
(e . g . COUNT2) are treated as forward references . and are left blank
at least until they are defined within the block or until the end of the
block. At the end of the block COUNT1 and COUNT cease to be
defined as 10 and 30. COUNT1 becomes undefined and COUNT reverts
to Its previous value of 10. Also the definition of COUNT2 becomes
operative again and the blank line previously left In the program
becomes 20 .

5 .7 THE SPECIAL NAME 'DOT'

The symbol ": ' Is treated as a pseudo name. and the value associated
with It Is always the address of the store line Into which the next
statement will be assembled . Although It can be used In any context
where a normal name Is permitted. the most common use Is In
controlling the position of code and data at assembly time. For example
 A Simple Assembly Language 69

the statement

. = 2000

will result In the assembly of sUbsequent statements Into store line 2000
(octal) onwards . Another fairly common use Is In leaving areas of store
empty to be used as working space. For example. two areas each of
size 128 (decimal) store lines called AREA 1 and AREA2 can be created
using

AREAl :
. = . +256.
AREA2:
. = . +256.

5.8 COMMENT STATEMENTS

A comment can be placed on any line of a program using the

character ';'. The semicolon and all subsequent characters up to the
next newline are Ignored. except when the semicolon Is part of a
character or double character constant .

5 .9 LIBRARY SUBROUTINES

Programming In assembly language Is only tolerable If a library of

subroutines Is available which provide for the commonly occurring tasks.
It Is convenient at this point to discuss the Implementation of such
subroutines. and to use them In part as an Illustration of the use of
SAL . before attempting to describe the Implementation of an assembler
for SAL In Chapter 7. Thus. the simple subroutines required for octal
Input and output are given here. followed by an example of a complete
program which uses them. The more complicated Input/output
subroutines and the subroutines which extend arithmetic capability are
dealt with In the next chapter .

5 .10 SIMPLE INPUT OUTPUT SUBROUTINES

We use the term Input to describe the Information that Is to be read by

a program. say. as It Is being typed on a VDU. or from a paper tape
or from a 'file' stored on magnetic tape or disc. Similarly the term
output Is used to describe Information which a program produces. say
on a VDU or a lineprinter . or in a file . Most programs will require to
read some Initial Input which relates to the problem they are designed
to solve. and later to print answers. The natural form of numbers. for
normal users. In both Input data and results Is decimal. but some
situations , particularly In system programming produce a requirement for
70 An Introduction to System ProgrammIng - Based on the PDP11

octal (or hexadecimal> Input and output. Alphabetic Information can

also occur In both Input and output and this Is discussed later.

The basic unit of computer Input/output Is the character. Normally

each key on a keyboard produces a character of Input. and a line of
output Is generated as a sequence of characters. It follows that the
most basic Input subroutine Is one which reads a character . and the
most basic output subroutine prints a character . For the present we
shall assume the exlstance of these two subroutines (called INCH and
OUTCH). Their Implementation requires a knowledge of how readers
and printers operate and this Is not dealt with until Chapter 8.

internally characters are represented by numbers according to the

table given In Appendix 6 . The INCH subroutine delivers the number
corresponding to the next character of Input. In RO. and It does not
disturb any other registers . OUTCH assumes that the code number of
the character to be printed Is given In RO . Both subroutines are based
on the notion of serial Input and output. That Is repeated calls of
either are associated with consecutive character positions across a line
and down the page . The end of a line Is always followed by the
carriage return line feed characters 15 and 12. Thus the information

123
ABO
+9 - 3C

would appear as. or be produced by. the octal number sequence

61.62 .63 .15.12.101.102 .104 .15 . 12 .53.71.40.55 .40.63 . 103. 15. 12

Again for the present It Is enough to assume that the Input for a
program will be the sequence of characters Immediately following the
ENTER statement. and the output Is to be printed.

5 . 10 . 1 Octal Input

The requirement here Is for a subroutine to read the next octal number
from the Input and convert It to binary. Its detailed specification Is a
matter of Individual choice. We shall assume that the subroutine Is to
Ignore any characters which precede the first octal digit. then treat all
following octal digits as part of the number . stopping when a character
other than an octal digit Is encountered . The result will be placed In
Rl and no other register except RO will be disturbed. A very similar
subroutlna. forming part of the octal loader . was given In Figure 4. 3 .
In both cases as each new octal character Is read the previous octal
digits are moved three binary places to the left. and an octal digit.
computed from the value of the character minus the value of character
 A Simple Assembly Language 71

O. Is placed In the space so provided. There Is no check against too

many octal digits being given and only the least significant 16 bits are
retained . The difference Is that In this context boxes 5 and 6 are not
applicable to the octal read subroutine given below.

INOCT : BEGIN
CLR R1
L1: JSR PC, INCH
CMP RO,I'O
BMI L1
CMP 1'7, RO
BMI L1
L2 : ASL R1
ASL Rl
ASL RI
BIC 1177770.RO
ADD RO.Rl
JSR PC. INCH
CMP RO ,I'O
BMI L3
CMP 1'7. RO
BPL L2
L3 : RTS PC
END

5. 10,2 Octal Output

The octal Print subroutine will be given a value, say In R1. and Its
function Is to determine and print the code for each digit In the octal
representation of the value . It Is assumed that a binary digit followed by
5 octal digits are to be printed, regardless of the values of the leading
digits. The operation of the subroutine Is summarised In flowchart form
In Figure 5 .5 . This Is a precise flowchart corresponding exactly to the
Instructions which appear In the OUTOCT subroutine of Appendix 2.

5 . 11 AN EXAMPLE OF A COMPLETE SAL PROGRAM

The Interpreter for MUO mentioned In Chapter 2 Is used here as an

example of a complete SAL program . It Is necessary for this program to
provide a means for manually loading programs Into the store. for
Inspecting the contents of the store, and for causing a program to be
executed . For this purpose a subset of the manual control facilities of
the LSl11 are Implemented, and the actual Interpreter of MUO
Instructions Is the Instruction sequence that Is obeyed when a G Is
typed. Once the MUO Interpreter Is running the user can stop It and
regain control by striking any key except the Break Key (which
automatically returns control to the microprogram of the PDP 11) .
72 An Introduction to System Programming - Based on the PDP"

1
OCTAL PRrNT (RD

Figure 5.5 Flowchart for Octal Print

Figure 5.6 Is a flowchart which describes the program . It Is

moderately complicated because It must provide several possible actions
to be selected by what the user types. Thus the central control loop
reads a character, and switches to one of the actions depending on
the value of the character . Meaningless characters are Ignored. The
possible actions are as follows .

If an octal digit Is typed, It and all following octal digits are treated
as an octal number to be placed In a variable called OCT . NO.
Normally a '/' or a ' G' should follow an octal number. The former will
cause the OCT . NO to be copied to another variable called ADDR, and
then both ADDR and the content of the store line whose address It
contains are printed. The latter causes the MUO program counter to be
set to the value of OCT . NO, the MUO ACC to be cleared. and
Inter pretati on of MUO instructions begins . Note that ADDR and PC are
doubled before use. because they represent MUO words and the PDPll
addressing Is In byte units. If '/' Is typed without a preceding octal
number ADDR is unchanged. likewise If G Is typed without a preceding
octal number . tho program counter Is set to zero. After ADDR has
been set. consecutive lines can be Inspected by repeatedly typing LF.
 A SImple Assembly Language 73

They can be altered by typing new values In octal before the LF . When
an MUO program Is 'running' the user can stop It and regain control by
striking any key (except break). In which case the current value of PC
and ACC will be printed . A STOP Instruction In the program has the
same effect. The program can be caused to continue by typ ing 'P·.
The INOCT subroutine used here Is very similar to that In Section
5 .10.1. except the first octal digit has been read before entry.
Appendix 2 gives the SAL encoding for the program and all the
necessary subroutines except INCH. OUTCH and IENQ which are based
on Information not presented until Chapter B.

The required actions of these will be obvious except possibly for

IENQ which Is assumed to return a character If one has been Input. or
zero otherwise .

5. 12 EXERCISES

1. Translate the Instructions given below Into octal. Also each

Instruction can be replaced by a shorter (In bits) more compact
Instruction . State what these are In both SAL and octal.

a) MOV #0 . AS
b) ADD #1. A4
c) SUB #1. A2
d) ADD Ll. Ll
e) MOV -2( AD. 8-2( AD

2. Again translate the Instructions given below Into octal. Each of the
sequences of Instructions could have been replaced by single
Instructions. What are the Instructions?

a) COM AS
INC AS

b) MOV AO. -(SP)

MOV #1 . AO
BIC (SP)+. AO

c) NEG A2
DEC A2

d) MOV AS. -(SP)

MOV flO. AS
ADD (AS) . A4
MOV (SP)+. AS

e) MOV AS. -(SP)

74 An Introduction to System Programming - Based on the PDP11

10
NUl
INTERPRETER

+
23 21
<CH 0)
(~)
a

4
Pe-ocT.tI> 22
CI..EAR ACt PRINT ?

25
<CH a P)

.-------l2B - - - - - ,
svrrtH ON FPART a= PI
F~ ACt-IS PART a= P[]
Fall ACt=>IS PART a= P[]
F-2I ACt+IS PART a= P[]
F-31 Act-IS PART a= P[]
Fa40 PC-S PART a= PI
F"5, IF ACC>-O. PeaS PART a= PI
F-6o IF ACt/-o. PCa5 PART a= PI
F-7, lEALT WITH INOOX 19
30 F-e, PRINT ACt IN OCTAL
00

Figure 5.6 An Interpreter for MUO

MOV (A3). A3
MOV (A3) . A4
MOV (SP)+. A3

f) MOV A4. -(SP)

MOV A3 . -(SP)
MOV .10. A3
ADD A3. A4
MOV (A4). A4
MOV (A4). A2
MOV (SP)+. A3
MOV (SP)+. A4

3. Each of the Instruction sequences below can be replaced by

 A Simple Assembly Language 75

smaller sequences . What are the smallest CIn PDP11 w,ords)

alternatives that you can devise? Express your solutions In octal
and count the number of words they occupy .

a) MOV R3. -CSP)

MOV R4. -CSP)
MOV CSP)+. R3
MOV CSP)+. R4

b) MOV IVEC1. R1
MOV 'VEC2. R2
Ll:ADD CRl> , CR2)
INC R1
INC R1
INC R2
INC R2
CMP R1. #VEC1 + LIMIT
BNE L1

c) CLR R4
MOV #1. Rl
MOV #100000. R2
L2 : BIT R3, R2
BEQ L1
ADD Rl. R4
Ll : ROR R2
ROL R1
BCC L2
6 Arithmetic Subroutines

The arithmetic capabilities of most small computers are limited. and

they usually fall below the requirements of both the high-level language
compliers. and assembly language programmers. In the case of the
PDP11 some hardware enhancements are available. to partially remedy
the situation . but in many PDP11 's a software solution Is necessary.
The most obvious deficiency Is the lack of multiply and divide functions.
but there Is also a need for arithmetic operations which apply to other
' types' than the 16-blt integer provided by the basic PDPll .

When 16-blt Integer arithmetic Is used. the number range Is only

-32768 to +32767. This range Is clearly Inadequate for many problems
and double length arithmetic Is necessary In which two 16-blt nury~ers
ar~.1 taken together to represent.18 single nllJ"ber In the range -2 to
.. 2 -1. or approximately -10 to + 10 . If a bigger range Is
required. then triple or quadruple length arithmetic maybe necessary.
However. in scientific calculations. provision has also to be made for
real numbers with a fractional part. This must cater for a very large
range of numbers. although the precision required In any particular
number may be moderate . Hence . It Is usual to provide floating point
arithmetic In which each number has two components . a mantlssaC M)
and an exponent( E). The va lue of such a number Is

M x base L

If computers worked with decimal numbers the base would be 10. but
In binary computers It Is usually 2 . or a power of 2 such as 8 or 16.
Another form of arithmetic that Is often provided on computers Is binary
coded decimal arithmetic. In this case a number is diVided Into groups
of 4 bits. and each group Is used to represent a decimal digit. For
example. the number 1879 would be represented by the binary pattern

0001 1000 0111 1001

Even though there is some redundancy In this method of coding .

 Arithmetic Subroutines 77

because the combinations 1010. 1011. 1100. 1101. 111 0 and 1111 are
not used as decimal digits . the system stili has some attraction
because of Its simple correspondence with the decimal form of the
numbers. When a large amount of Input/output has to be processed In
a relatively simple way. It is sometlmos thought more effle!ent to work
with binary coded decimal than to convert such numbers to binary on
Input. and back to decimal on output. Commercial data processing
tends to have this characteristic . hence the computers Intended
primarily for such applications have arithmetic units which operate
directly on binary coded decimal numbers . Also the principal data
processing language. Cobol. has truncation and rounding rules which
assume that the operands are decimal numbers. thus producing a
requirement for binary coded decimal arithmetic even If It Is not
provided by the hardware . When binary coded decimal arithmetic has to
be provided by software. the time advantage Is eroded. and the only
Justification Is to support a Cobol complier .

In the final Section In this Chapter subroutines are considered which

convert between the external decimal representation of numbers and
their internal binary representation . Although this does not fall strictly
under the heading of this Chapter. the subroutines In question are
arithmetic In nature and they are best dealt with here .

6. 1 MULTIPUCATION

The most straightforward method for programmed multlpllcatlon Is the

one of repeated addition as used In a coding example In Section 3 .4.
However. the number of Instructions to be obeyed in achieving
multiplication In this way Is proportional to the magnitude of the
multlpller. Methods less sensitive to multiplier size are usually
preferred . Most practical methods are based on considering the
muttlptlar digits one by one . For each non-zero digit the multlpllcand ,
multiplied by an appropriate power of two . Is added Into an
accumulating answer. This is analogous to the method of 'Iong
multlpllcatlon' used In hand calculatton , and In the example of long
multiplication In binary. given below. It can 3be seen thoat the
multiplication of 9 by 9 Is achieved by adding 9 x 2 and 9 x 2

1001
x 1001
1001000
+ 1001
1010001 81

When this method Is coded. It results in an Instruction loop which Is

longer than that for repeated addition. but It need only be repeated 16
times (for 16-blt numbers> . In fact. If the multiplier bits are dealt with
78 An Introduction to System Programming - Base9 on the PDP11

starting with the least significant. then the repetition can terminate
when all the non-zero bits have been considered. A flowchart of the
method applied to the generation of

ANS MULTIPLICAND x MULTIPLIEA

Is given In Figure 6. 1.

I
Ml1.TIPLY

d~l
,------+-~--
,CLEAR CARRY
0ND ROR MULTIPLlER

Figure 6 . 1 Flowchart for Multiply

It should be clear that the requisite powers of two. times the

multiplicand. are generated progressively by multiplying the multiplicand
by 2 each time through the loop . Similarly the multiplier digits are
rotated right on each pass through the loop so that they appear
sequentially In 'C' (the carry bit>.

In order to give an assembly language coding for this method. It Is

necessary to specify how the parameters are to be passed. The
following Is assumed

AO Is to contain a is-en result

Al contains a l6-blt multiplicand
R2 contains a l6-blt multlpller

and the subroutine might be coded thus

 Arithmetic Subroutines 79

MULT: BEGIN; AO <= Al x R2

CLA AO
L2: ADA A2
BCC Ll
ADD A1. AO
L1: ASL Al
TST A2
BNE L2
ATS PC
END

An explicit clear carry Instruction is not necessary because . on the

first execution C will be zero. as a result of the preceding CLA
instruction. and on subsequent executions C will have been cleared by
the TST Instruction. Optimisations of this kind are Important in this
class of coding . even though the effect In this case would be less than
10% . The systems programs of a computer should never degrade
performance unnecessarily.

One feature of multiplication. which is Ignored In the above

subroutine. Is that the product of two 16-blt numbers might be too big
to express In 16 bits . In the limit It might requ ire 31 bits . For
example . In

we can see that the square of the largest positive number expressible
In 16 bits Is a number that cannot be expressed in less than 31 bits .

Normally In n-blt arithmetic . results greater than n bits correspond

to arithmetic overflow and Ideally the overflow bit should be set. Thus
a double length Intermediate answer might be needed In order to detect
overflow . This will be considered again in the Section on double
length arithmetic.

6 .2 DIVISION

Here the simplest method would be repeated SUbtraction . That Is. In

the case of positive numbers . the divisor Is subtracted from the
dividend until It Is about to go negative and the number of times the
subtraction has been performed Is the quotient. Again the preferred
methods are more complex but they limit the number of executions of
the loop to the number of bits In the operands . One such method can
be based on the rules for 'long division' . Consider. for example. 100
divided by 5 as a binary operation .
80 An Introduction to System Programming - Based on the PDP11

10100 - 20
101)1100100
101
101
101
000 '" REM

The basis of this method is to work progressively through the digits

of the dividend from the most significant end . generating one digit of
answer for each digit of the dividend . Each time that the group of
dividend digits under consideration represent a number less than the
divisor a zero digit Is generated in the answer. and when they are
greater than or equal to the divisor a one is generated in the answer
and the divisor Is subtracted from them. In both cases the number on
hand Is then extended by placing the next more s ignificant digit of the
dividend at its least significant end. This action is modelled In the
flowchart given In Figure 6 .2 .

Figure 6.2 Flowchart for Divide

 Arithmetic Subroutines 81

The notation should be clear except for the dividend which must be
treated as a 32-blt number. Obviously this requires two PDP11 words
and Initially the least significant one contains the actual dividend whilst
the other contains zero. Each time through the loop the whole of this
32-blt number. referred to as DIVIDEND. Is shifted one place left. Thus
the most significant part called DIVTOP contains the digits which are to
be compared with the divisor . The successive digits of ANSWER are
generated at Its least significant end. hence ANSWER Is also shifted left
on each pass through the loop . Since the loop Is executed sixteen
times the ANSWER digit resulting from the first execution eventually
arrives at the most significant end .

This method Is only applicable to positive operands. and the answer

It generates Is rounded towards zero. If the method Is applied manually
to evaluate 11/3. It will be seen that the answer 3 Is generated with a
remainder of 2 . If negative numbers are to be allowed for. and a
correct remainder Is required. It would be necessary first to note the
sign of each operand and make negative operands positive . Then after
the division has been performed. the signs of the quotient and
remainder must be corrected. That Is. the quotient should be negative
If the signs of the operands were originally different and the remainder
will have the same sign as the dividend. For example

11/3 = 3 REM 2
-11/3 = -3 REM -2
11/-3 = -3 REM 2
- 11 / - 3 = 3 REM -2

This form of rounding . towards zero. Is commonly used In computers

even though rounding towards minus Infinity Is often preferred by
mathematicians. In the coding given below Instructions have been
Included to deal with signed operands. and for this reason the stack Is
used to store copies of the divisor and dividend. It Is also used for
the most significant 16 bits of DIVIDEND .

The arithmetic left shift of the 32-blt dividend requires two

Instructions and It Is significant that the second one dealing with the
most significant part Is a 'rotate' Instruction. This causes the most
significant bit from the least significant part. left In 'C' by the 'ASL R1'
Instruction. to become the least significant bit of the most significant
part.
82 An IntroductIon to System ProgrammIng - Based on the PDPt t

DIV : BEGIN; RO = Rl/R2(Rl=REM)

MOV ai. -(SP); NOTE Rl ON THE STACK
BPL Ll
NEG Rl
U : MOV R2 . -CSP) ; NOTE R2 ON THE STACK
BPL l2
NEG R2
l2: MOV #16 .• -CSP) ; SET COUNT = 16
CLR -CSP) ; SET M. S. PART OF DIVIDEND = 0
CLR RO ; CLEAR ANSWER
LOOP:ASL RO
ASL Rl
ROL (SP)
CMP R2. (SP)
BGT L3
SUB R2. (SP)
INC RO
L3: DEC 2(SP)
BNE LOOP; REPEAT LOOP 16 TIMES
MOV (SP)+ . Rl ; Rl = REMAINDER
CLR (SP)+; REMOVE COUNT FROM STACK
TST CSP)+; TEST AND UNSTACK ORIGINAL R2
BPL L4
NEG RO
L4: TST CSP) + ; TEST AND UNSTACK ORIGINAL Rl
BPL L5
NEG RO
NEG Rl
L5:RTS PC
END

6. 3 DOUBLE LENGTH ARITHMETIC

In double length arithmetic on the PDPll. two 16-blt store lines are
used for each number . as they were In the case of the DIVIDEND In
the above division SUbroutine .

6. 3. 1 Double Length Addition and Subtraction

When two double length numbers aro added. using the 16-blt arithmetic
provided by the PDP 11. special action is needed to propagate the carry
which arises from the addition of the two least significant 16-blt parts.
into the most significant 16 bits of the answer. Thus . the first step is
the addition of the two least significant parts. This addition sets 'C'
according to whether or not the addition produces carry. Before any
fur.ther arithmetic functions are used. which would alter ·C·. an add
carry instruction CADC) must be obeyed to Incorporate the carry in the
 Arithmetic Subroutines 83

answer . For example. If AO and Al contain the addresses of two

double length numbers In the store . the first might be replaced by their
sum using the following sequence

ADD 2( an . 2( AO)
ADC (AO)
ADD (Al). (AO>

Subtraction can be achieved by a similar sequence which uses the

subtract carry Instruction (SSC> Instead of ADC .

It should be noted that these sequences do not produce the correct

setting of the condition codes Z. V and C whose values are determined
only by the result of the last Instruction . Hence Z will be set If (AO) Is
zero and no account Is taken of the other half of the answer In 2 ( AO) .
Also there may be a carry or overflow resulting from the second
Instruction which Is lost after the final Instruction. The examples In
Figure 6.3 demonstrate this

(l) -1 +

(RO) 2(RO) (JU) 2(JU) C

~77777 ~77777 000000 ooooo~
ADD 2(JU ),2(RO) 000000 ~
ADC (RO) 000000 ~
ADD (JU),(RO) 000000 0

(2) _23~ - ~
( RO) 2(RO) (JU) 2(JU) V
100000 000000 000000 000001
SUB 2( JU ),2( RO) 177777 0
sac (RO) 077777 1
SUB (JU),(RO) 077777 0

Figure 6.3 Double length Addition and Subtraction .

6.3.2 Multiplication

The technique used In 6 . 1 for single length multiplication can be also

used for double length multiplication. In this case the quantities 'ANS',
'MULTIPLlEA' and 'MULTIPLICAND'. In Figure 6 .1 . will all be double
length numbers . This Implies that the specified additions. rotations and
tests must be Interpreted as double length operations. Given AO and A1
as the addresses of two double length numbers, the follOWing
subroutine would replace the first by their product.
84 An Introduction to System ProgrammIng - Based on the PDP11

DLMULT I BEGIN
K>V 2(RO), -( SP)
K>V (RO), -( SP ); STACK MULTIPLICAND
CLR 2(RO)
CLR (RO) ; ANS - 0
LOOP I CLC
ROR (RJ.)
ROR 2( RJ.) ; ROR MULTIPLIER
BeC Ll
ADD 2(SP), 2(RO)
ADC (RO)
ADD (SP), (RO); ANS - ANS+MULTIPLICAND
L11 ASL 2(SP)
ROL (SP) ; MULTIPLICAND*2
TST 2(Rl)
BNE LOOP
TST (Rl)
BNE LOOP
ADD #4, SP
RTS PC
END

The coding of this subroutine should be fairly understandable from

what has gone before. but two points are worth specific mention. The
first concerns the multlpllcatron of a double length number by two .
This requires two Instructions. As a result of the first Can ASU the
least significant part of the number Is multiplied by two leaving Its
previous most significant bit In 'C' and clearing Its least significant bit.
The next Instruction. a AOL of the most significant part. multlplles It by
two and sets Its least significant bit from ·C· . The second point Is that
the SUbroutine uses two words on the stack as local working space .
Therefore . the stack pointer must be restored to Its entry value. before
the ATS Is obeyed. by the addition of four .

It was mentioned in connection with single length mUltiply that a

double length answer ought to be formed In order that overflow might
be detected. This might be coded as follows

BEGIN
CLA AO
CLA -CSP); m . s , part of ANS
CLA -CSP); m. s . part of MULTIPLICAND
L2: AOA A2
BCC Ll
ADD at . AO
ADC 2CSP)
ADD CSP) . 2CSP)
L1: ASL Al
 Arithmetic Subroutines 86

AOL CSP)
TST A2
SNE L2
TST CA6)+
TST CA6)+
SEQ L3
SEV
L3: ATS PC
END

6.4 FLOATING POINT ARITHMETIC

Until rocently there has been no standard for the representation of

floating point numbers. Differing engineering views of the optimum cost
performance trade-ofts have resulted in a different format for almost
every computer . In some cases there Is more than one format for a
single machine. and the PDP11 Is a case in po int. Its hardware
floating point format Is different trom that used In the standard software
subroutines supplied by the manufacturer . In this book only the PDP 11
hardware format. and i ts Implementation In software. will bo
considered . In this format the mantissa is represented by sign and
modulus thus

5 E' M'
1 8 23

However, the actual stored exponent CE') and mantissa CM') are not
the true values for the number they represent . and the difference Is
described below . Other relevant details are mentioned In relation to
specific examples.

The mantissa Is a fractional number. For example. 1 would be

represented as
1
1/2 x 2 CM = .1. E = 1)

However . It could also be represented by

2
1/4 x 2 CM = .01. E = 2)
3
1/8 x 2 CM = . 00 1, E = 3)
and so on.

One of these forms. the first. Is choson as the standard. Standard

floating point numbers on the PDP11 have a mantissa whose most
significant digit Is a 1. This fact has been exploited In the design of
the machine by arranging that the Initial . 1 of the mantissa Is never
stored. It Is assumed to precede every actual mantissa. Thus the true
mantissa of a PDP11 floating point number Is 24 bits of which only the
least significant 23 are actually stored.
88 An Introduction to System Programming - Based on the PDP"

The second peculiarity of the PDP11 floating point format is that the
true exponent (E) Is represented In ' exc ess 128 ' form. This means that
each actual exponent In the machine (E ') Is bigger than Its true value
by 128. Consider now the following examples

DECIMAL FORM fLOATING FORM PDPll encoding

1 H=1/2,E-=1 01000000100000 •• ,. 0
-3/4 M---3/4,E-=0 11000000010000 • • •• 0
100 H=25/32,E-=7 01000011110010 .••• 0
-.15625 M=-5/8,E-=-2 10111111001000 • • • • 0

If the correspondence botween the decimal value and the PDP 11

encoding is not cloar . closer exam ination of the last example might
help . Working back from the format definition we can see that It
subdivides as follows

1 01111110 010 •••• 0

S E' M'

A one In the sign (S) position Indicates a negative number and

attaching this sign and the 'hidden' . 1 to M ' gives the binary value
-.101 for the true mantissa. which Is In fact -5/8 . The true exponent
of the number Is 128 less than the encoded ,exponent hence Its value Is
126-128 = -2 .

A special ~~coding is needed for 'floating point zero'. This Is the

number 0 x 2 and the floating point number whose digits are all 0 Is
taken to mean this. In the subroutines given below a zero value of E'
Is assumed to Indicate floating point zero.

We may now consider arithmetic operations on floating point

numbers.

6 .4. 1 Floating PoInt AddItion

E1 E2
Let the two operands be represented by M1x2 and M2x2 The rules
of simple algebra allow their sum to be expressed as

Mlx2 E 1 + M2x2 E2 = (M1+M2x2E2-E1)x2El

This Implies two steps in the addition ; first make the two exponents the
same by mUltiplying one of the mantlssae by 2 to the power of the
exponent difference (called aligning the manttssae) • and second add
the two mantlssae.

A numerical example will make this clear. Take the two numbers as
and -1/2 . Their binary floating point forms will be
 Arithmetic Subroutines 87

1
M1= .l.E1=1 <'lx2) 0
and M2 = -. 1. E2 = 0 C- . 1x2 ) .

The first step Is to align the mantlssae by expressing the second

number as -.01x21. and the second Is to add their mantlssae to obtain
the answer . 0 1x2 1. which Is one representation of 1/2. However. two
points of detail now emerge .

First the mantissa of an answer generated this way may not be

standard. In the above example It Is less than standard and Is therefore
called suostenaera. However . If the addition of the mantlssae had
Involved two numbers of like sign It might have produced an answer
bigger than the standard which Is called superstendsrd . A substandard
answer can be rectified by multiplying Its mantissa by the appropriate
power of two and subtracting this power l.from Its 0 exponent. In the
example above this rule would convert .01x2 to. 1x2 . A superstandard
number can be similarly standardised by dividing by a suitable power of
2 and Increasing the exponent appropriately.

A second point which Is less evident from the given example is that.
In general. aligning the mantlssae results in one mantissa becoming
either substandard or superstandard before the addition takes place. It
Is Important to choose the mantissa to be scaled. so that the
superstandard case does not arise . Then If any digits are lost In the
addition they will be at the least significant end. When this rule Is
observed the result of addition can never be more than one place
superstandard .

The flowchart for floating point addition given In Figure 6.4.

corresponds exactly with the cod ing . given below. except for one
detail . At the beginning of the flowchart the largest number CA) Is
selected by examination of the exponents only Cbox 2) . This means that
If the exponents are equal the other number CB) may in fact be the
larger number. hence the arithmetic In box 20 can give a negative
answer. The coding of box 20 tests for and corrects this condition.

It is Interesting to observe how the glve0.11Jpwchart d'1'iI~ with out of

range answers. These are numbers < 2 or ~ 2 . They are
detected during the final standardisation when the exponent Is either
being decremented or Incremented. depending on whether the answer
Is substandard_Br7 superstandard. In the case of underflow. where the
answor Is < 2 • a floating point zero answer Is generated. This will
normally be acceptable . Overflow Is more serious and will have to be
treated as a fault condition . The action for this is not coded.
88 An Introduction to System Programming - Based on the PDP"

2J
F.P. ADD

18
ANS = A

19
<EXIT)

11
PIICK ANS

12
<EXIT)

Figure 6.4 Flowchart for Floating Point Addition

In connection with floating point arithmetic there Is also a need to

consider rounding. This Is discussed In 6.4.5.
 Arithmetic Subroutines 89

FIADDI BEGIN; (RO)-A+B,(R~)-A ,(R2)-B

)«)V (Rl), -( SP)
BIC #100177,(SP)1 STACK EA
)«)V (R2 ),-( SP)
BIC #100177 ,(SP)
SUB 2( SP), (SP)
NEG (SP) 1 STACK EA-EB
BPL L1 BRANCH IF EA >- EB
)«)V Rl, -( SP) )
)«)V R2,Rl )
)«)V (SP)+, R2 ) INTERCHANGE A AND B
NEG (SP) )
ADD (SP),2(SP) ; )
L11 BIT (R2),#077600
BEQ SMALLB ; BRANCH EB-o
CMP (SP),#006000
BPL SKALLB 1 BRANCH EA-EB>-24
)«)V (R1),(RO)
BIC #077777,(00)1 SIGN ANS-SIGN A
KJV 2( Rl ),...:(SP) ; )
)«)V (Rl), -( SP ) 1 ) STACK CORRECTED
BIC #177600,(SP); ) MANTISSA CMA
BIS #000200, ( SP ); )
)«)V 2( R2 ), -( SP) 1 )
)«)V (R2), -( SP ) 1 ) STACK CORRECTED
BIC #177600,(SP); ) MANTISSA CMB
BIS #000200, ( SP ); )
; STACK CONTENT I CMB I CMA I EA-EB I EA I LINK
1 tSP t+4 t+8 t +10 t+12
L31 SUB #000200,8(SP)
BMI L2 BRANCH IF CMB IS ALIGNED
ASR (SP)
ROR 2(SP) RIGHT SHIFT CMB
BR L3
L21 CMP (R2),(RO)
aMI SUB BRANCH IF SIGNS DIFFER
ADD 2(SP),6(SP)
ADC 4(SP)
ADD (SP), 4( SP ) CMA-CMA+CMB
BIT #000400,4(SP)
BEQ 1,4 1 BRANCH CMA NOT SUPERSTANDARD
ASR 4(SP)
ROR 6( SP ) 1 RIGHT SHIFT CMA
ADD #000200,10.(SP)1 INC EANS
BMI FAULT ; BRANCH IF OVERFLOW
1,41 BIS 4(SP),(OO)
BIC #000200,(00)
BIS 10. ( SP ), ( 00 )
KJV 6( SP ) , 2( 00) ; PACK ANS
L6 : ADD #12., SP ; RESTORE STACK
RTS PC
SUB 1 SUB 2(SP),6(SP)
90 An Introduction to System Programming - Based on the PDP11

sac 4(SP)
SUB (SP), 4( SP ) CMA-eMA-CMB
BPI. LS BRANCH IF CMA>CMB
NEG 6( SP ) THIS PATH IS NOT SHOWN ON F. C.
ADC 4(SP)
NEG 4( SP ) ; NEG CMA
ADD #100000, ( RO ); CHANGE SIGN OF ANS
LS: BIT #000200,4(SP)
BNE L4 ; BRANCH t."MA NOT SUBSTANDARD
ASI. 6(SP)
ROI. 4( SP ) ; LEI.'T SHIFT CMA
SUB #000200,10.(SP) ; DEC E ANS
BGT LS ; BRANCH UNLESS UNDERFLOW
CLR (RO)
CI.R 2( RO) I FORCE F.P. ZERO
BR L6
SMALUB: ADD #4,SP ; CORRECT STACK
K)V (Rl),(RO)
K)V 2(Rl),2(RO)
RTS PC ; EXIT WITH ANS - A
FAULT : ?
END

6 .4. 2 Floating Point Subtraction

One of the attractions of sign and modulus arithmetic Is that a number

can be negated simply by changing the sign bit. Thus. the subtract
operation can be Implemented as a negate followed by an add. For
example. a floating point subtract using the FLADD given In 6 .4. 1
would be

f'LSUB: BEGIN; (RO) - A-B, (Rl) - A, (R2) - B

K)V 2(R2), -(SP)
K)V ( R2 ), -( SP) ; STACK B
ADD #100000, (SP); NEGATE IT
K)V SP, R2
JSR FLACD
ADD #4, SP
RTS PC

6.4.3 Floating Point Multiply

The basis of this subroutine Is the equation

E1 E2 E 1 E2
M1X2 x M2X2 = Ml x M2 x 2 +
 Arithmetic Subroutines 91

14
F.P. ~HPLY

, . . . - - - - - - - - l 4 - - - - ,1
MULHPLY ella, ell> TO lIlTA1N
A 48-Bn PROV1SlONSALK MANHSSA<TIO

Figure 6 .5 Flowchart for Floating Point Multiplication

It Is applied In the flowchart of Figure 6 .5. As In the case of

addition It Is necessary to start by forming the corrected mantlssae.
Then a 48-blt product is formed from the two 24-bit mantlssae. and
since they are fractional numbers. the required result Is the most
significant 24-bits of this multiplication. In fact. since the two
mantlssae are each In the range ~ -.5. < 1 the result may also be in
this range. and hence standard. or it may be substandard in the range
~ . 25 . < .5 . This latter condition has to bo detected and corrected by
a standardisation shift of one place ieft .
92 An Introduction to System Programming - Based on the PDP11

The exponent arithmetic Is straightforward If we recognise that each

exponent Is a true exponent plus 128, hence 128 has to be subtracted
from their sum , except the final actual exponent may be out of the
permitted range ?. 0, < 256 . In order that the test for these conditions
can be delayed until the exponent arithmetic Is complete , It is
necessary to have at least two zero ( 'guard') digits to the left of the
exponents. The place allotted to the exponent In the floating point
format is ono place from the most significant position, therefore the
expononts are right shifted one place. before the exponent arithmetic is
performed. On completion of the exponent arithmetic the ' g uar d ' digits
will be either

00 indicating exponent In range

01 indicating exponent overflow
11 indicating exponent underflow

The subroutine given below relates exactly to the flowchart In Figure

6.5 . It should now be understandable . even though the multlply
sequence It contains involves triple length addition. which has not been
previously described . Particular attention should be paid to the way that
this achieves carry propagation through 48-blts .

FPMULT: BEGIN; (RO) • A*B, (Rl) • A, (R2) - B

KlV (Rl), -( SP )
KlV (R2), -( SP)
BIC #100177, 2(SP); STACK EA
BEQ FPZERO BRANCH EA - 0
BIC #~00~77, (SP) STACK EB
BEQ FPZERO ; BRANCH EB - 0
ADD (SP)+ , (SP)
ROR (SP)
SUB #020000, ( SP ) STACK - (EA+EB-128 )/2
KlV (Rl), -( SP)
BIC #077777, (SP)
ADD (R2), (SP)
BIC #077777, (SP) STACK SIGN OF ANS
BIC #177600, (Rl)
BIS #000200, (Rl) ; FORM CMA
BIC #177600, (R2)
BIS #000200, (R2) FORM CMB
CLR -(SP)
CLR -(SP)
CLR -( SP ) ; STACK 48 BIT 'I'M
CLR -( SP ) ; STACK MS 16 BITS OF CMB
; THE STACK NOW CONTAINS
( SP) - MS 16 BITS OF 48 BIT CMB
2(SP), 4(SP), 6(SP) - 48 BIT 'I'M
10(SP) - TS, 12(SP) - TE

START OF MULTIPLY SEQ 'I'M - CMB X CMA

HLOOP: CLC
 Arithmetic Subroutines 93

ROR (Rl)
ROR 2(Rl) ; ROTATE ~IPLIER
ace Ll
ADD 2(R2), 6(SP) ; ADD ~IPLlCAND
ADC 4(SP)
ADC 2(SP)
ADD (R2), 4(SP)
ADC 2(SP)
ADD (SP), 2(SP)
Ll : ASL 2( R2) ; MULTIPLlCAND*2
ROL (R2)
ROL (SP)
TST 2(Rl) REPEAT UNTIL
BNE MIDOP ~IPLIER - 0
TST (Rl)
BNE MIDOP
TST 2(SP)
BMI L2 BRANCH 'l'M STANDARD
ASL 6(SP)
ROL 4(SP)
ROL 2(SP) LEFT SHIFT 'l'M
Sl1B .()()OLOO, 12(SP)
L2: BIT '140000, 12( SP)
BNE OFWW BRANCH TE Otrr OF RANGE
K:>V 10( SP ) , (RO)
K:>VB 3( SP ), ( RO)
K:>VB 2( SP), 3(RO)
K:>VB 5(SP), 2(RO)
BIC '000200, (RO)
ASL 12(SP)
BIS 12(SP), ( RO)
ADD .14, SP
Rl'S PC
OFWW: ADD 110, SP
8MI FPZERO
; FAULT
FPZERO: CLR (RO)
CLR 2( RO)
ADD '4, SP
Rl'S PC
END

6 .4. 4 Floating Point Division

In practice division Is often Implemented by means of an Iterative

technique. This starts from an Initi al 'guess ' and progressively computes
more accurate answers . The number of Iterations required to obtain a
given degree of accurancy can be predicted . Each Iteration makes use
of floating point add and multiply Instructions: thus the method Is best
94 An tntroauctton to System ProgrammIng - Based on the PDP11

suited to situations where they exist In hardware .

Programmed floating point division can also be based upon the

formula
E1 E2 E1-E2
M1x2 I M2x2 = M1/M2 x 2

Its Implementation Is left as an exercise for the reader.

6. 4. 5 Floating Point Rounding Errors

Floating point operations often result .In an answer containing more bits
In Its mantissa than exist In the mantlssae of the numbers being added .
If only the appropriate number of mantissa bits are retained throughout.
24 In our case. the answers are said to be rounded by truncation.
This Is the effect In the subroutines given above. However. a minor
adjustment could retain the extra bits. as the operation proceeds.
thereby making other rounding strategies possible . In fact. In the case
of multiplication a 48-blt mantissa Is already generated. The extra bits
In the case of addition would be those lost by the alignment shift on
the mantissa . Again there could be up to a total of 48 bits.

The general rounding problem we face therefore . Is how to reduce

a 48-blt number to a 24-blt number. and simple truncation Is clearly
one way; but there Is an objection to this technique . We can see the
basis for this In the reduction of the following numbers to two digits

. 1249 . . 1399 . . 1402 . .1550

giving by simple truncation

. 12 • . 13 • . 14 . . 15

All of these numbers have been reduced In magnitude, hence the

errors do not average out. they are said to be bIased . In fact the
average error In the above Is .005 . This can be serious In some
techniques used for scientific applications. where a long sequence of
numbers are computed, each from Its predecessor . The biased errors
can accumulate and swamp the answer .

When calculations are performed by hand numbers are 'rounded up'

or ' rounded down ' according to the magnitude of the first digit being
discarded. One way of achieving this Is to add 5 Into the first digit
being discarded. which Is sometimes called rounding by addition . For
example, the above sequence might be rounded to . 12 . .14. . 14 ,
. 16. This produces a smaller average error. In fact In this case the
average error Is now O. but this Is coincidental.
 Arithmetic Subroutines 95

The main objection to rounding by addition In computers Is that It

costs an extra add time . or maybe more If the result becomes
superstandard. therefore an alternative which avoids the cost of addition
but Is nevertheless unbiased Is sought. The s implest method Is called
force one rounding . In this method the least significant digit of the
retained part of the number Is made '1' . The Idea behind this Is that
sometimes the number will be increased, and sometimes It will be
reduced. so that on average the errors will cancel out . In fact the
analysis presented In Table 6. 1 shows that this Is not quite the case .
A conditional variant of the method In which the one Is not forced If
the discarded digits are zero achieves a better result. It also has the
effect that when floating point calculations Involve only Integer values.
which can be defined exactly within the mantissa size, exact answers
result.

Table 6 . 1 Errors In Rounding the Fractional Part

UNROUNDED 1TRUNCATION FORCE • 1 • CONDITIONAL FORCE 11

ERROR ERROR ERROR 1
0.00 o +~ o I
0.01 -1/4 +3/4 +3/4 I
0.10 -1/2 +1/2 +l/2 I
O.ll -3/4 +1/4 +1/4 I
1.00 o o o I
1.01 -1/4 -1/4 -1/4 I
1 .10 -1/2 -1/2 -l/2 I
loll -3/4 -3/4 -3/4 I
AVERAGE 318 ~/8 o I

The average errors can be determined by considering all possible

values of the discarded digits. In combination with each value of the
digit which is forced . Table 6.1 shows the effect In the case where 2
digits are discarded . It can be inferred that In the case where n
fractional digits are discarded the average errors are

TRUNCATION . 5-2-( n+ 1)

2-(n+1)
FORCE 1

CONDITiONAL FORCE 0

6. 5 BINARY CODED DECIMAL ARITHMETIC

For simplicity we will consider the form of binary coded decimal

arithmetic which operates on 16-blt numbers containing 4 decimal digits
each . For example. the number 912 would be expressed as
96 An Introduction to System Programming - Based on the PDP11

0000 1001 0001 0010

Clearly one way to proceed Is to convert the BCD numbers to binary.

use ordinary binary arithmetic . and then convert the answer back to
BCD . However. It would be surprising If even the most accomplished
programmer could achieve this In under 100 obeyed Instructions.
Several alternatives spring to mind. and one Is to operate on the BCD
numbers directly without converting or unpacking them. The code given
below achieves BCD add In 16 Instructions.

6.5.1 16-Blt Unsigned Binary Coded Decimal Addition

Consider first the effect of using binary arithmetic with the BCD
numbers 1879 and 912. Straight binary addition gives the following

1879 0001 1000 0111 1001

~ 0000 1001 0001 0010
"2791 0010 0001 1000 1011
2 1 8 11

The answer Is obviously not a correct BCD number but It Is Interesting

to analyse where It goes wrong . In fact there are two problems . First.
the addition of 9 and 2 In the least significant digit position should
have produced a 1 and given a carry to the next digit position .
However. the carry that should occur In decimal arithmetic when the
value In a given digit position exceeds 9 Is not occurring . It only
occurs In fact when the value exceeds 15 as can be seen with the
addition of 8 and 9 In the third digit position . This leads to the second
problem which Is that If carry does occur. the value left behind Is 6
too small. which Is again evident In the third digit position of the
example . Thus the conclusion Is that to correct the answer we must
add 6 into every digit position that has. or should have. given carry.
For example

0010 0001 1000 1011

0000 0110 0000 0110
0010 0111 1001 0001 - 2791

Although this last operation sounds simple It Is not easy to know

which digit positions are Involved . In practice It Is simpler to add six
Into all digit positions and then subtract It from those where It should
not have been added. thus
 Arithmetic Subroutines 97

000], 100Q Oll]. 1001

+ OOOQ 100!. OOO! 0010

0010 0001 1000 1011

+ 0110 OllO OllO OllO
100Q Oll! lllJ,. 0001
- OllO 0000 OllO 0000*
0010 Olll 1001 0001 ... 2791

The only difficulty Is in establishing the pattern marked ,. . Th is Is

most easily done by remembering that the digit positions where the ' 6'
has to be removed are those which have not given carry. For the most
significant BCD digit. the carry digit ' C' will contain the Information.
provided that the operations are done in the correct sequence . For
each remaining digit the least significant bit ot Its next more significant
digit must be used. The relevant bits are those underlined. They are In
the two operands and the result. at the stage when the two operands
and the 6s have been added. If no carry has been received these
three bits should yield 0 when combined by exclusive or . For example

1+0 should give 1 and 1 'XOR' 0 ' XOR' 1 0

0+ 1 should give 1 and o 'XOR' 1 'XOR' 1 = 0
1+ 1 should give 0 and 1 ' XOR' 1 'XOR' 0 = 0
0+0 should give 0 and o 'XOR' 0 'XOR' 0 = 0

A result of 1 In the ' exc lusive or' Indic a te s that carry has been
received . Thus, by means ot two XOR functions a bit pattern can be
created that contains a one In the least significant bit ot a BCD digit If
the next least significant BCD digit gave carry . The 'not' ot this pattern
with the surrounding bits removed by a BIC instruction can be used to
create the required 6's by means of right shifts by 2 and 3 . The
complete instruction sequence is given below .

BCDADD : BEGIN; RO <= RO+RHIN BCD)

KJV RO,-( SP) (SP)- 004422
XOR Rl,(SP) (SP)- 010553
ADD #063146, RO RO - 017337
ADD Rl,RO BO ... 103761C e-o)
XDR RO,(SP) (SP)- ll3232
ROR (SP) (SP)- 045515
ROR (SP) (SP)- 022646
COM (SP) (SF)- 155131
BIC #135673,(SP) (SP)- 040100
SUB (SP),RO BO - 043661
ASR (SP) (SP)- 020040
SUB (SP),RO RO .. 023621CC=Q)
BIT #020000,(SP)+ - 020000
BNE Ll
SEC
98 An Introduction to System Programming - Based on the PDP11

Ll: Rl'S PC
END

The rlghthand column above gives the values that would result If the
subroutine was called with AO = BCD 1879 (014171> and A 1 = BCD 912
(004422). The exit value of AO Is 023621 octal which Is

0010 0111 1001 0001 = 2791

and carry will equal O. The significance of achieving the correct setting
of C Is that the above subroutine can be used In programming
multi-length BCD addition .

6.5.2 32-8It 8CD Addition

Obviously the technique used above could be extended to deal directly

with 32-blt numbers . but the resultant code would be almost twice the
size and the alternative of using the 16-blt addition given above. as a
subroutine. has some attraction . The method would follow very closely
that for add ition of double length binary numbers. That Is

add the two least significant halves

add carry to one of the more significant halves
add the most significant halves .

The addition of carry can be done as an ordinary binary addition. even

though It may yield a result with a least significant BCD digit = 10 .
This will be corrected In the next addition .

Thus. assuming that the two numbers to be added occupy pairs of

consecutive store lines and that the address of the first of each pair Is
given by A2 and A3 . the following Instructions will suffice for the
operation

(A2.A2+2) <= (A2.A2+2) BCDADD (A3.R3+2)

MOV 2( R2) • RO
MOV 2( R3) • Rl
JSR PC. BCDADD
MOV RO . 2( A2)
MOV (R2). RO
ADC RO
MOV (A3). Rl
JSR PC. BCDADD
MOV RO. (R2)

In practice BCD decimal numbers are usually signed and one full
 Arithmetic Subroutines 99

BCD digit. say the most significant. Is used to represent the sign. The
coding of addition In this case Is left as an exercise for the reader.

6 . 5. 3 BCD Subtraction

Signed binary coded decimal numbers are usually represented In sign

and modulus form . Thus an add subroutine should strictly compare the
signs and perform addition or subtraction of their moduli according to
whether they are the same or not. It is important that the subtrahend
Is chosen so that the result of the subtraction Is not negative .
Fortunately the smaller of the two BCD numbers can be determined by
an ordinary binary comparison.

Only the detailed sequence for the subtraction of 16-blt BCD

numbers Is given here. assuming that the answer will be positive . The
combinatIon of this . with the addition technique given above to form
more general subroutines for adding and subtracting signed BCD
numbers . Is left as an exercise for the reader .

Proceeding In a manner analogous to addition. binary SUbtraction of

BCD number results In an answer whose only defect is that some digits
are 6 too big . This occurs wher ever ' bor r ow' applies since In effect
16 rather than 10 Is borrowed. Consider 2791 - 912

2791 - 0010 0111 1001 0001

-912 - 0000 1001 0001 0010
:~87~ ooo~ ~1l0 0111 1111
1 14 7 15

Fortunately It Is easy to detect which digit positions have borrowed by

examining the least significant bits of the next most significant digit (or
carry In the case of the most significant digit> . The technique Is
similar to that used in addition and the code is

BCDSUB : BEGIN RO <= RO-R1 (IN BCD>

MOV RO. -(SP)
XOR R1. (SP)
SUB Rl. RO
XOR RO , (SP)
ROR (SP)
ROR (SP)
BIC #135673. (SP)
SUB (SP). RO
ASR (SP)
SUB (SP) , RO
BIT #020000. (SP) +
100 An Introduction to System Programming - Based on the PDP11

BNE Ll
SEC
Ll : ATS PC
END

6.5.4 BCD MUltiplication and Division

The coding tricks used above cannot be applied to multiplication and

division . Aesort to the simpler approach of converting each operand
from BCD to binary in order to perform the operation In binary becomes
necessary. The binary answer thus produced must then be converted
from binary to BCD . The first conversion is given below and the
completion of the mUltiplication and division subroutines Is left as an
exercise.

6.5.5 Conversion from BCD to Binary

A flowchart for this conversion Is given in Figure 6.6. The coding given
below is derived directly from the flowchart . It assumes that the BCD
number is given In Al and a result Is to be returned In AO. Also It
assumes that no other registers may be changed; therefore. It uses the
stack for local working space.

BCDBIN : BEGIN
CLA AO
MOV '4. -(SP)
Ll : CLA -(SP)
ASL Al
AOL (SP)
ASL Al
AOL (SP)
ASL Al
AOL (SP)
ASL Al
AOL (SP)
ASL AO
MOV AO. -(SP)
ASL AO
ASL AO
ADD (SP>+ . AO
ADD (SP>+ . AO
DEC (SP)
BNE Ll
TST (SP)+
ATS PC
END
 Arithmetic Subroutines 101

1
BClBIN

I ---,:=i::::::==::J 4 - - - -----,
SHIFT TI£ 1m OPERAND 4 PLACES LEFT
PLACIP«; TI£ IIlST SIGIHF ICANT
lECIMAL DIGIT 011 TI£ STACK

Figure 6.6 Conversion from BCD to Binary

6. 6 INPUT OUTPUT OF DECIMAL NUMBERS

Subroutines for reading and printing decimal numbers are an essential

part of any computer system . In principle they are simple and their
main arithmetic feature Is that they Involve radix conversion. decimal to
binary In the case of Input. and binary to decimal In the case of
output. However. they become surprisingly complex In detail by the
time allowance has been made for the usual variations In sign and
format conventions . It will be assumed In the Input SUbroutine given
below that a number may be preceded by an arbitrary sequence of
spaces and I or newllnes which are to be Ignored . Also a number may
or may not be signed. the absence of sign Implying '+'. After the
sign there must be at least one decimal digit and the first character
thereafter which Is not a decimal digit will be assumed to terminate the
number.

Numbers printed by the decimal output subroutine will only be signed

If they are negative . The SUbroutine will have two parameters. the
number Itself and a field size specification. This second parameter
102 An Introduction to System Programming - Based on the PDP11

facilitates the generation of tabular output. It should normally Indicate

the maximum number of decimal digits expected In a number . Space
for the sign 15 automatically provided . Each number printed by the
subroutine will be preceded by the appropriate number of spaces to
cause Its least significant digit to occupy the rightmost position within
the specified field.

6.6. 1 Decimal Input Subroutine

The organisation of this subroutine Is specified by the flowchart In

Figure 6.7. Only the central part. boxes 5 . 6 and 7 . Is concerned
with the actual decimal digits . These are accumulated as a binary
value In register 1. which Initially has the value zero, and Is thereafter
multiplied by ten as each new digit Is added . The rest of the flowchart
Is concerned with the treatment of signs , preceding spaces and other
organisational details . A SAL encoding Is given below.

DECIN : BEGIN
MOV R2. -(SP)
CLR R2
Ll : JSR PC. INCH
CMP RO, #' ; COMPARE WITH SPACE
BLE L1 IGNORE SPACE AND ALL CONTROL CHS
CMP RO . #'+
BEQ L5
CMP RO, #'-
BNE L2
DEC R2
L5 : JSR PC INCH
L2 : CMP RO. #'0
BLT FAULT
CMP RO , #'9
BGT FAULT
ASL Rl
ADD Rl. RO
ASL Rl
ASL Al
ADD AO. Al
L4: JSR PC INCH
CMP AO, #'0
BLT L3
CMP AO, #'9
BGT L3
L3: TST A2
BEQ L7
NEG Al
L7: MOV (-SP)+, R2
RTS PC
FAULT: HALT; SUITABLE ACTION TO BE DECIDED
END
 Arithmetic Subroutines 103

1
INI

,-------.--.J 1S -
STACK R2 AND SET R2 = 0
- ----,

IALSO SET R!..=0 <TO !HONE ANS)

14

,--- ------'7
!EC[ AL
READ CHARACTER
[S IT A !ECI~AL D[GIT
T [J;C[MAL
Y 9
, . - - + - - { IS R2 = 0

Figure 6. 7 Flowchart for a Decimal Input Subroutine

6. 6. 2 Decimal Output Subroutine

Again the organisation Is described In flowchart form. In this case In

Figure 6 .8 . The arithmetic detail Is not g iven. but It Is mainly
confined to box 7 where the Individual decimal digits are computed.
This Is done by repeatedly subtracting the power of 10 which each digit
represents until a negative value results. The number of subtractions
achieved gives the decimal value of the digit. Some comments are
attached to the SAL encoding given below to relate the code to - the flow
diagram.
104 An Introduction to System Programming - Based on the PDP11

OUTI : BEGIN; PRINT RO ALLOWING Rl PLACES

MOV R2. -CSP)
MOV #•• -CSP)
TST RO
BPL Ll
NEG RO
MOV #'-. CSP)
Ll : MOV #8. R2
L3: CMP RO. POWER CR2)
BGE L2
SUB #2. R2
BNE L3
ADD #2. R2
L2 : MOV R2. -CSP)
ASR CSP)
SUB CSP)+. Rl
MOV RO. -CSP)
MOV #' • RO
L5: DEC Rl
BMI L4
JSR PC. OUTCH
BR L5
L4 : MOV CSP)+. Rl
MOV CSP) +. RO
JSR PC. OUTCH
L7: MOV #'0-1. RO
L6 : INC RO
SUB POWER IR21. Rl
BPL L6
JSR PC. OUTCH
SUB #2. R2
BPL L7
MOV CSP)+ . R2
RTS
 Arithmetic Subroutines 106

1
OlIn

Figure 6.8 Flowchart for a Decimal Output Routine

6.7 EXERCISES

1. Express the following numbers In binary using the PDP11 floating

point format

+100
- .5
-.1
+1/9

2. Design and write a subroutine for adding signed 32 -blt BCD

numbers. Assume that the most significant BCD digit gives the
106 An Introduction to System Programming - Based on the PDP11

sign of the number according to the convention

o represents +
8 represents -

3. Adapt the subroutine given In Section 6.5 .5. to produce a

subroutine which will convert a seven digit signed BCD number to
32-blt 2's complement form. Write also a subroutine to perform
the reverse conversion .

4. Estimate the number of Instructions that would be required to

achieve the multiplication of two 7 digit epius sign) BCD numbers:
by converting to 2 's complement form. mUltiplying the binary
numbers. and converting back to BCD .

5. Write a floating point division subroutine to complement the

addition and multiplication subroutines given In Section 6.4. Use
this subroutine to Implement a subroutine to evaluate square roots
of floating point numbers using the approximation formulae
2
XL" 1 ee ex / Xt XI) / 2
7 Implementation of the Assembler

This dotailed presentation of the design and implementation of an

assembler is given for several reasons . First the production of an octal
oncoding for the assembler is a necessary part of the bootstrap theme
running through this book . No program of this complexity would be
wr itten d irectly in octal . and the systematic approach described here is
one way in which it might be derived . In fact the approach adopted
might be used to produce any s ignificant program in machine code . Of
course . with more aids In the form of fully operational computers.
much of the detail work m ight be avoided. but such an approach would
pre-empt the full understanding of the operation of the computer and its
low level software wh ich we are seeking here. Finally. an assembler
might be regarded as a very s imple complier. and as such its main
components could be a suitable base from which consideration of the
more formal and complex algorithms of a compiler m ight begin .

In outline . the operation of the assembler is as follows . Lines of a

SAL program are read one at a time and an encoded representation is
placed in the line buffer . The actual source form Is also stored In a
source buffer to facilitate error monitoring . Th is encoding Ide nti fi es
various types of Items within each line. for example. names. numbers
and delimiter symbols . A character table Is used in this process to aid
the recognition of Items . Next the encoded line is examined . and the
type of statement that it contains determines which translation rules are
to be applied . If the line contains an instruction. the function
mnemonic is looked up in a function table and Its binary equivalent is
placed in the assembled program. Type Information is also encoded in
the function table which guides the assembler In processing the
operands . Operands which reference labels require the binary value of
the label to be SUbstituted . Thus a namellst is maintained which records
names and their associated values; or when names are referenced
before being defined. it records these forward references which must
be completed when the name is defined .
1DB An Introduction to System Programming - Based on the PDP11

An assembler of this kind . which reads a program and generates

directly the binary equivalent. Is termed a one pass assembler. Clearly
considerable care is needed to keep its size small so that there Is
room in the computer memory for both the assembler and the program
being assembled. This problem is often avoided by organising the
assembler to make several passes through the program to be
assembled. and performing some aspect of the translation on each
pass . There Is an operational inconvenience in th is . and it requires a
suitable external storage medium such as magnetic disc. on which the
output of each pass can be recorded . However. it avoids the need to
have the complete assembler and the program being assembled resident
in memory.

In order to derive an octal version of the assembler. we shall

proceed In a systematic manner. First the data structures to be used
by the assembler will be defined. Next the subrouttne structure of the
assembler will be Identified and a brief specification will be written for
each subroutine. Their Internal organisation will then be detailed on
flowcharts. At this stage the coding can begin and the complete
assembler is written in SAL. Finally it only remains to translate
manually the SAL version Into octal.

7.1 THE DATA STRUCTURES OF THE ASSEMBLER

Every program comprises an active part in the form of lists of

Instructions. and a passive part In the form of structured lists of
constants or computed data . In some programs the required list
structures are simple and clearly defined from the outset. In others.
and an assembler Is a good example of this. an Important part of the
design Is to determine the structure and content of these working lists
or data structures. The Information held in these lists will Influence the
design of the assembler. and their size will determine the feasibility of
Its one pass operation . It Is therefore appropriate to begin this
description of the SAL assembler with a description of the lists that It
uses. Of course. in practice. design is a Iterative process and the
initial decisions about the data structures for a program of this
complexity would probably be modified several times as the design Is
refined. The lists required by this assembler have been mentioned
above. They are

a line buffer
a source buffer
a name list
a character table
a function table
 Implementation of the Assembler 109

7. 1. 1 The Une Buffer

The line buffer must allow for the maximum number of Ite m s likely to
occur on one line, say 32. Th is is a fa irly generous allocation because
It will become clear that such a line buffer Is only half full when
dealing with In str uc ti o n s of the complexity of

MOV tl77&L2+L3-10, L1ST+20(R4)

and it can even accommodate statements such as

TX: . WORD "TH, "IS," 1."5 , "A , "ME , "55, "AG,"E ,"FO,"R .rou . "TP , oUT

Each entry In the line buffer consists of 4 words and corresponds to

one of the following Items.

1) a name
2) a constant
3) one of the symbols + , <, ", / , I. =, 8, It. &, " . , NL
4) an opening bracket used In a (R) context
5) an opening bracket used in a (R)" context
6) an opening bracket used In a -( R) context

The reason for distinguishing the first three should be obvious. When
the subroutine which deals with operands is considered, the
convenience of distinguishing the three types of open ing bracket and
encoding the complete bracketed structure as a single item will also be
clear.

As each line is read, spaces and erases are Ignored and ":' and
. WORD are encoded as ' na m e s' . Also, " : ': the comment symbol, Is
translated to NL and the rest of the line is ig no r e d . Any other spurious
characters cause the line to be faulted . The detailed encoding of the
six items Is as follows

1) 1st word = 0 and the next 3 words contain up to 6 characters

which are left Justified .
2) 1st word = 1 and the 2nd word = the value of the. constant
3) 1st word = the value of the symbol (e. g. '+' , <:» etc)
4) 1st word = -1 and the 2nd word is the specified register number
5) 1st word = -2 and the 2nd word Is the specified register number
6) 1st word -3 and the 2nd word Is the specified register number

There Is an unused part In most Items which will be zero . Th is

might create the Impression that the encoding Is wasteful. However the
total line buffer size Is only 128 words and a more complicated
encoding could easily result In significantly more instructions be ing used
to create and process the Itemised statements . When the Items are of
110 An tmroductlon to System Programming - Based on the PDP1 t

fixed size . It bocomes much easier to examine the context of any given
Item. for example . to code tho test "Is the next Item a name and the
one following it a : " .

Some examples of Itemised statements are given below . Tho

addressing rule for bytes must be remembered when interpreting the
name Items . That Is . the first byte of each pair appears as the right
most of a pair . Thus. SA which Is represented by the character codes
102 and 122 octal appears In store as

01 010 010 01 000 010 binary

hence it Is written as 051102 octal . Although ite m ise d statements

occupy a sequence of consecutive words in the store. thoy are grouped
Into fours in the given examples. for greater clarity .

Examples of Itemised Statements

SA L1 0000001051102100000010000001
0000001030514100000010000001
0000121000000100000010000001

L4 : . WOAD 10. 0000001032114100000010000001

0000721000000100000010000001
0000001053456105111710001041
0000011000012100000010000001
0000121000000100000010000001

Ll: MOV AO. (AD

0000001030514100000010000001
0000721000000100000010000001
0000001047515100012610000001
0000001030122100000010000001
0000541000000100000010000001
7777771030522100000010000001
0000121000000100000010000001

ADD 1400. L 1
0000001042101100010410000001
000043100UO()()1000000IOOOOOOI
0000011000400100000010000001
0000541000000100000010000001
0000001030514100000010000001
0000121000000100000010000001

L3 .- 49
0000001031514100000010000001
 Implementation 01 the Assembler 111

0000751000000100000010000001
0000011000061100000010000001
0000121000000100000010000001

7 .1.2 The Source Buffer

Th is list has no special structure ; consecutive byte positions contain

consnouuvo bytos of the source statement inclUd ing the f inal nowline.
Space Is allocated for up to 128 characters. Its purpose is to facilitate
tho subsequent handling of characters one at a time and to retain a
record of the current line in the event that it contains an error which is
to be signalled to the user .

7. 1. 3 The Name List

The name list structure reflects the block structure of the user
program. Its first two words (labelled NLiST and LEVEL> point to tho
next free position . and the first name of the current block .
respectively. A new level Is started for each BEGIN and an entry for a
dummy name is made at this new level whose value contains the start
of the previous level . Names are usually only looked up at the current
revet . except for those occurring In the label setting directive. which
are looked up 'globally' through all levels . An entry for a name may
either define Its value or conta in a pointer to a chain of references .
depending on whether it has been defined or merely referenced .

A level is removed for each END at which time defined names are
' for g ott en' and outstanding forward references are moved back to the
previous level (or they are filled In if the label Is defined at the
previous level) . If there are no unfilled references to add to the
previous level. the removal of a level simply requires NLiST to be reset
to LEVEL and LEVEL to be reset to the value contained In the dummy
name entry that It addresses . This simple mechan ism allows blocks to
be nested to any depth .

POINTER TO PREVIOUS LEVEL

NAMES LEV 0 NAMES CURRENT LEVEL

Figure 7. 1 Block of the Name List

112 An Introduction to System Programming - Based on the PDP11

The general form of the name list Is shown in Figure 7. 1. Each

name entry occupies five 16-blt words . The first three words contain
the characters which comprise the name . They are left justified and
filled out with null characters (code 0) as In the itemised line .
Because the character codes are less than 128 there Is an unused bit
In each byte; therefore . the sign digit of the third word Is used as a
switch to Indicate that the name has a value which Is stored in the
fourth word . If this sign digit Is not set then it ind ic ate s that the name
has been referenced but not set. In this case either the fourth or fifth
words. or maybe both. are pointers to the reference chain. If the
names were unlimited in size a more complicated structure would be
needed to accommodate the ir variable size. This would increase the
time to find names on the name list and an even more complicated
structure might be required to combat this.

There Is some difficulty In deciding how large the name list should
be . It does not need to contain all the names used In a program
because the names Internal to each block are deleted . and the space
Is recovered. at the end of each block. As a minimum It must be
large enough to hold all the names of the largest block . The nesting
of blocks Increases this requirement ; therefore In the Implementation
described here a namellst of 320 words will be used wh ich provides for
up to 64 names.

Label Reference Chains

Three kinds of reference have to be accommodated ; an absolute word

reference. a relative word reference and an offset reference . In the
first case. when the value of the label is known. It has to be placed in
a full word. In the second case Its relative value has to be placed In
a full word. while In the last case It has to be placed In the second
byte of a branch Instruction. Multiple references are ' c hained ' through
the words. or bytes. into which the value. or relative value has
subsequently to be placed. Some examples should make this clear.

Consider that an Instruction such as

MOV #L1. R3

has to be assembled. and Ll Is a label that has already been defined

In the current block . Its value (say 2400) will be available on the
name list and the assembler would place In the store

01 27 03
00 24 00

However. If L1 has not been defined the assembler would not be able
to complete the second of these two words . In this case an entry would
 Implementation of the Assembler 113

be required on the name list Indicating that L1 is a labe l which has

been referenced but not defined . The fourth word In this entry would be
used to give the address of the store line which is eventually to contain
the absolute value of L 1. Value words used in this way are thought of
as pointers Into the program. as depicted In Figure 7 .2a. and several
cases arise .

NAME LIST ASSEMBLED

PROGRAM

L1 10

NEXT -
INSTRUCTION

Figure 7.2a

A similar problem arises when the reference to a label is in relative

mode. but In this case the pointer Is placed in the fifth word . For
example. In the case of the Instruction MOV L2. R4 the assembler Is
expected to generate the two words

01 67 04
RELATIVE VALUE OF L2

If L2 is an undefined label. then the Information that its relative value

Is eventually required Is Im pli ed by the use of the fifth word as a
pointer . Thus. if L2 was undefined and the above Instruction followed
the previous one . the assembler would generate the structure of Figure
7 .2b.

NAME LIST ASSEMBLED

PROGRAM

L1 0
L2 0
012703
o
016704

NEXT ..
INSTRUCTION

Figure 7.2b
t t4 An Introduction to System Programming - Based on the PDPt t
If the first reference to an undefined label Is In a branch
Instruction . then the space left In the program to accommodate the
value . when It Is known. Is the a-bit offset field of the branch
Instruction pointed to by the fourth word of the name list entry. For
example. if the next instruction is

BNE L3

and L3 is undefined the assembler will generate the structure shown in

Figure 7. 2c .

NAME LIST ASSEMBLED

PROGRAM

Ll ,-To
L2 10j. -
L3 110

Figure 7.2c

When L2 15 later defined. the fuJI l6-blt relative value of L2 will be

placed In the store word pointed to by the fifth word of the name JIst
entry . When the labels L1 and L3 are defined . it will be necessary to
know that in the first case the full l6-blt absolute value of Ll 15 to be
placed In the store word pointed to by the fourth word of name list
entry for L2. whereas In the second case an a-bit offset has to be
computed and placed In the offset part of the store word pointed to by
the fourth word of the name list entry for L3. Since the addresses of
store words are always even numbers. the least significant digit of each
pointer In the name list 15 effectively spare. and it is therefore used to
distinguish the two cases. This bit is set 1 in the case of an offset
reference .

It must be remembered that a label might be referenced several

times before It 15 defined. and not necessarily In the same way .
Hence. the general requirement Is to be able to remember in the name
list structure that there are several references to a label which have not
yet been defined . It would be logically satisfactory to make a new entry
on the name list for each reference. but It would be wasteful of space .
Considering Ll In the above example . there Is a word in the assembled
program allocated to contain Its value that is serving no purpose until
the value Is known .
 Implementation of the Assembler 115

If a second similar reference to L1 occurs. there will be two words

In this state and the name list need only point to one since that one
can point to the other . Following this polley. If the next instr uc ti on
encountered was

ADD Ill. R2

the assembler would generate the linked structure of Figure 7 .2d. That
is the name list entry points to the most recent entry wh ich points to
the next most recent entry and so on. Th is structure Is called a linked
list or chain . Each pointer in the chain is called a link and when a
zero link is encountered It signifies the end of the chain . The same
chaining rules can apply to words which indicate word relative
references .

NAME LIST ASSEMBLED

PROGRAM

L1 1'10
L2 101" f-
L3 I 10 012703
o
016704

Figure 7. 2d

Offset references Introduce one final problem because they only

leave an a-bit 'hole ' In the program. Therefore in this case the link in
the reference chain must be an a-bit relative address . Eight bits are
enough. provided that the chain Is organised so that offset references
only po int to other offset references . This will always be true. because
eventually when the label In question Is defined all the offsets so linked
must point to the same position In store . To achieve the above
ordering. offset references will be placed at the end of the chain. and
when a link In the chain points to an offset reference Its least
significant bit Is set to a 1.

Most of the features of the name list structure are Illustrated in

Figure 7.3. which shows the content of the section of store containing
the assembled code and the name list. Immediately after the following
code sequence has been assembled .

Ll = 2400
116 An Introduction to System Programming - Based on the PDP11

= 2000
BEGIN
l2 = Ll + 400
MOV 110., Rl
L3 : MOV LHRl>. l2(Rl>
CLR LHRl>
DEC Rl
DEC R1
BNE L3
CMP R2. tL5
BMI OK
CMP R2, tL4
BPL OK
NOTOK: MOV L1. R3

NAME LIST ASSEMBLED CODE

INAME I DEF I VALUE1 IVALUE21 ADDRESS OCTAL CODE
L1 I y I 2400 I 0 I 2000 012701
DUMMY I I POINTER I 0 I 2002 000012
L21 Y I 3000 I 0 I 2004 016161
L3 I Y I 2004 I 0 I 2006 000000<--
L1 I N I 2014 I 2042 I 2010 003000 I
LSI N I 2026 I 0 I 2012 005061 I
OK I N I 2037 I 0 I 2014 002006
L4 I N I 2034 I 0 I 2016 005301
NOTOKI Y I 2040 I 0 I 2020 005301
2022 001370
2024 020227
2026 000000
2030 100400<-
2032 020227 I
2034 000000 I
2036 100374 -
2040 016703
2042 o
Figure 7 ,3

7, 1. 4 The Character Table

The character Table 15 a list of 128 Integers each occupying 1 byte.

Each entry corresponds to a character and the I'th entry gives a type
code for the character with value I. Type codes are assigned In order
to simplify the tests of the READL subroutine described later although
the reasons for some of the groupings should be Immediately obvious.
They are as follows
 Implementation of the Assembler tt7
Type 0 Octal Digit 0 .1.2.3 .4.5.6.7
Type 1 Decimal Digit 8 .9
Type 2 Letters A - - - - Z
Type 3 , . NL. FF
Type 4
Type 5 (
Type 6 )
Type 7 Ill e ga l characters c, >. etc
Type 8
Type 9
Type 10 - Delimiter It. :. etc
Type 11 - Expr Opr + . -. !. &. -, I
Type 12 - Ignore space, CR. erase

7 , 1, 5 The Function Table

There Is an entry In this Table for each function mnemonic and for the
directives ·BEGIN' . 'END' . 'ENTER'. Each entry contains three fields
thus

FUNCTION NAME TYPE BINARY VALUE

The field sizes are 5 x 8 bits for the function name, 8 bits for the
type and 16 bits for the value. A typical entry would be

"A" "0" "0" o o 2 060000

Types aro assigned as follows

Type 0 zero operand functions e . g. CLC

Type 1 one e . g . NEG
Type 2 two e . g . ADD
Type 3 branch instructions e. g. BNE
Typo 10 - BEGIN
Typo 11 - END
Typo 12 - ENTER
Typo 13 - CALL
Type 14 - RETURN

There are 80 mnemonics to be accommodated and each one takes four

words so that the total size Is 320 words .

7. 1. 6 Summary of the Usts Required

In discussing the logical structure of the lists Introduced In th is Section

some attention has been given to their size . This might seem
Irrelevant. but It should be remembered that the system programmer
rarely enjoys the freedom from economic constraint that would be
f 18 An Introduction to System Programming - Based on the PDP11

granted to a novice programmer struggling to generate his first high

level language program . In our case the constraint is that we wish to
create an assembler for the given language that will leave as much of
the store of a small PDPll available to the user as is possible . whilst
maintaining a decent standard of program structure and clarity.

The lists used by the assembler and their sizes are as follows. and
the abbreviated names are the way they will SUbsequently be
referenced .

line bUffer(LBUFF) 128 words

source buffer(SBUFF) 64 words
name list( NLIST) 256 words
character table( CHTAB ) 64 words
function table(FNTAB) 320 words

The total Table size Is therefore 832 words.

7. 2 THE SUBROUTINE STRUCTURE OF THE ASSEMBLER

The other Important part of establish ing the overall design of a program
Is to decide how It Is to be subdivided Into subroutines. This will not
be clear at the start. and the design will usually have progressed some
way before Is does become clear. With hindsight Figure 7.4 in d ic ates
the breakdown of the SAL assembler into subroutines and shows where
they are called. Their specifications are given In Section 7 .3.2 .

The importance of a good subroutine structure cannot be

overstressed. It is the primary tool In reducing the complexity of
programs to manageable proportions . This point is hard to bring home
to novice programmers. because the exerc ises given to them are
necessarily of a simple nature; however. the assembler given here has
sufficient complexity to require a clear functional subdivision Into
procedures.

7. 3 THE CODING OF THE ASSEMBLER

The operation of each subroutine In the assembler Is described In

flowchart form In Appendix 3 together with the assembly language
coding . In order to support the practical work suggested In this book .
the coding for the assembler is also given In octal In Appendix 4.
These codlngs correspond very closely with each other. and with the
flowcharts . In fact the correspondence between flowchart boxes and
code Is shown . The octal code can be loaded Into the PDPll using
either of the two bootstrap techniques described In Chapter 4.
 Implementation of the Assembler 119

BEGIN
~
ETC.

Figure 7.4 The Subroutines of the SAL Assembler

The only further explanation of the code . which m ight be needed by

the reader who wishes to understand the full details. Is concerned with
the global variables . through which the subroutines communicate . and
the specification of the subroutines. It Is always worth writing this out
for any program of significance. because even If the original
programmer can carry it In his head. It will be invaluable If subsequent
modifications to the program become necessary.

7. 3. 1 Global variables

These are variables whose values are used and possibly altered by
more than one subroutine. Hence. they are declared at the start of the
main block of the assembler. Inside which the other subroutines are
nested. Mostly they are contained In store lines. but some that are
frequently used are In registers . They are referred to on flowcharts and
In the code by the names which are given below. together with a
summary of their functions
120 An Introduction to System Programming - Based on the PDP11

LCOUNT - Is a count of source lines. which Is used In

error monitoring
FCOUNT - Is a count of the number of faults in the
program
IPTA( A2) - is a pointer to the next item of the statement
contained in the line buffer
DOTe AU - is the address of the next 16-bit word Into
which assembled code Is to be placed
NINDEX - is set by the FINDN subroutine to the address
of the value word of a name on the namellst
NSTATUS( AO) - is set by the same subroutine to Indic ate the
status of a name as follows
-1 Indicates name not on NLiST
o Indicates name referenced
1 Indicates name defined
2 Indicates defined re-deflnable name
NLiST - this Is a pointer to the next vacant position on
the name list
LEVEL - this Is a pointer to the first name at the
current level of the name list
FNAME - Is normally a copy of LEVEL but it Is set to
NLiST when a label setting directive Is being
processed
XMODE - this switch Is set zero if the procedure ASSX
Is to compute absolute values of expressions
and non-zero if relative values are required
IADDA - this is the address of the first 16-blt word of
the Instruction currently being assembled .

7. 3 . 2 Subroutine specifications

In this Section a brief summary of the action of each subroutine Is

given. followed by a statement of Its Input/output parameters (that Is
how Information is passed on to it and received back) and the names
of the registers that It disturbs.

SAL - This Is the main control loop of the assembler . It uses

A2 ( IPTA) as a pointer to the current Item of the
Itemised line and expects all subroutines which process
Items to advance A2 appropriately . Apart from this It
uses no registers and the question of parameters does
not arise .
AEADL This subroutine reads and Itemlses the lines of a SAL
program one at a time. It requires no input parameters
and Its ' result' Is the Itemised line which Is stored in
LBUFF . Since It is only called at the start of the main
loop where there Is no Information In the registers that
has to be preserved for other subroutines, except A1, It
makes use of all the registers AO, A2, A3, A4 and AS.
 Implementation ot the Assembler 121

ASSX This subroutine Is called from several places in the

assembler when It Is expected that the next few ite ms In
LBUFF represent an expression. Its function is to
evaluate the express ion and store Its value In lDOTI.
advancing DOT appropriately . It needs to know the
context of the exprosston In order to know whether
names are to be looked up globally or locally . and
whether or not forward references are to be faulted. In
the SAL language these two conditions are linked and
the Information Is conveyed by setting a global variable .
FNAME . either to the start of NUST or the start of the
current level. In some contexts . a forward reference to
a label might have to be converted to a relative
reference by the calling subroutine. This Is Indicated by
the value of the variable XMODE . It uses registers AO.
A3. A4 and AS.
COM PI - The function of th is subroutine Is to assemble a
complete Instruction Including Its operands. Obviously
this results In DOT and IPTA being advanced
appropriately . The only register that it uses directly is
AO but It calls subsubroutlnes which make extensive use
of registers.
COMPO This subroutine deals with operands specified as a
string of Items In LBUFF . It returns 6 bits corresponding
to the MODE/AEG of the operand In A4. If the operand
Involves an expression It will be evaluated and stored at
lDOTl . Thus IPTA and possibly DOT are advanced . The
only registers It uses directly are AO and A4 .
COMPBA - This subroutine Is called by COMPI to deal with the
operand of branch Instructions. If the operand part of
the Instruction being assembled Is a known label. an
offset Is computed . and placed in store. Otherwise. a
reference to the label Is added to the name list. It has
no parameters and does not require any registers
beyond those used by FINDN .
FINDN This subroutine searches the name list back to the point
specified by FNAME for the name contained In the Item
pointed to by IPTA. If the name Is found. the address
of Its value word Is placed In A4( NINDEX) and
NSTATUS Is set as described earlier . The registers
modified are AO and R4.
SET N - This subroutine expects to be given a name . In an item
pointed to by IPTA. a value for the name In A3 and
NINDEX and NSTATUS as set by the FINDN subroutine;
It makes an entry for the name of the name list which
has the stated value. If there are previous references to
the name . they will be given the stated value . Only
registers AO and A3 are altered.
ADDAEF This subroutine Is called to add to the name list a
reference to a name . Again the address of the Item
containing the name Is given by IPTA. The subroutine
assumes that the reference Is to the store line whose
122 An Introduction to System Programming - Based on the PDP11

address Is given by DOT. A further parameter ( R3)

Indicates whether the reference Is to a word or byte
location .
BEGIN - This subroutine Is called for each BEGIN which occurs
In a program . Its main task Is to make a new level
entry on the NLiST.
END This subroutine Is called for each END which occurs In
a program . It has to remove the current level from the
NLiST . This Implies filling In references for names
which are already defined in the previous level. and
moving other unfilled references onto the previous level.
This Is the most complicated procedure In the
assembler.
ENTER - This subroutine Is called when an ENTER statement Is
encountered .

There are a few other subroutines which are mainly concerned with
monitoring errors .
8 Control of Input and Output

The PDP 11 design allows for the connection of a large variety of

devices which transfer Information between programs running In the
computer and external media. There are two broad classes of such
devices which can be categorised as

devices which allow programs and people to communicate

and devices which provide additional storage .

In the first category there are the keyboard devices such as

teletypes and VDUs on which users type Input and receive output. the
readers Which deal with pre-prepared Input on punched cards or paper
tape, and printers which generate bulk output for remote use . By
comparison with the device In the second category they are slow , with
transfer rates In the range 10-1000 characters/sec . This fact reflects In
their control characteristics . They can mostly be thought of a devices
which transmit single characters. even though some of them may have
some Internal storage. Consider for example a ' li neprinter ' . This Is a
device which typically stores all the characters to be printed until It
receives a newline character, at which point It prints the complete line
using a separate print hammer for each character position .

The second category of device , for prOViding extra storage, Is

mostly based on the magnetic recording of Information on tape or disc
surfaces. Information can be transferred either from the computer store
to the device or vice-versa at the programmer's discretion . Access Is
serial In the sense that the magnetic surface moves past a single
read/write station as the Information Is transferred . The programmer
has the facility to move the surface to a particular position from which
a transfer Is to commence. Thus with this class of device there Is the
notion of an address similar to the address of a store line except that
It usually relates to a string of words or bytes (called a sector or
block) which are then accessed consecutively. Normally discs are
partitioned Into fixed size sectors which are preaddressed, and read or
'24 An Introduction to System Programming - Based on the PDP"

write transfers can be performed at any chosen sector position.

whereas magnetic tape Is usually written serially from the beginning with
variable sized blocks. and random selection of a block Is only permitted
for read operations . Obviously there Is more complexity associated with
the control of magnetic tape and disc than with the readers and
8
printers . They also have a much higher data rate. typically 10.-10
characters/sec . Hence these devices . once started . often have the
built-In ability to transfer complete sectors/blocks between the computer
store and their own magnetic surfaces . However. In principle the
mechanism for starting them Is similar to that for the simpler devices In
the first category . and when the block transfer Is complete their
stopping characteristics are similar. OWing to their relatively high cost.
magnetic tape and disc systems are not usually found on LS111s. and
they are not considered further . except for the relatively Inexpensive
floppy disc which Is discussed In Section 8.8.

8. 1 THE BASIC MECHANISM FOR INPUT OUTPUT

In order to understand the control of Input and output devices It Is

necessary to complicate the logical picture of the PDP11 that was
presented In Figure 3. 1. The simplest model to consider Is one In
which the store Is extended as shown In Figure 8. 1. That Is. some
extra lines are Introduced at the most significant end which look exactly
like store lines to the control unit. In that they have unique addresses.
and can be written to or read from In the usual way . However. these
lines are special In that the content of each can also be accessed from
the electronics. called a device controller. associated with an Input and
output device. In the simple cases there are two of these lines
associated with each device controller ; complicated devices have more.

One of the lines associated with a device Is called Its control/status

line . and the other Is a single character buffer. Device controllers are
built to respond to the setting of digits In their control/status line In the
same way that other machines might respond to the operation of control
buttons . They themselves set other digits In the control/status line to
convey Information back to the computer about their status . When a
reader Is operating. each character (e. g . pattern of holes In a paper
tape) that arrIves at Its read station Is copied to the buffer; hence It
becomes available to a program . Similarly. characters to be printed are
written by a program to the buffer line associated with a printer.

A simple way of operating a paper tape reader will serve to Illustrate

:hls mechanIsm . There are only two digits of the paper tape reader
control/status line that are relevant to this kind of use. The least
significant Is the start (or enable) digit . Whenever this digit Is set to
one the reader will start. move the paper tape on one character
position and stop . The second digit Is In position 7 (numbering from 0
on the right>. ThIs Is called the done bit ; It Is forced to 0 when the
 Control of Input and Output 125

ADDRESS

DEVICE CONTROL REGISTERS

- -
MAIN
STORE ••

DEVICE CONTROLLERS

Figure a . 1 The Device Control Registers

reader Is started and It becomes 1 when the reader has stopped, and
a character has been copied to the buffer . Given that the control/status
and buffer lines for the paper tape reader have addresses 177550 and
177552 octal respectively. the following annotated SAL subroutine to
read the next character to RO should now be Intelligible.

READCH : BEGIN ;
MOV 11. "177550 ;START PAPER TAPE READER
WAIT : BIT "177550, '200
BEQ WAIT ; WAIT UNTIL DONE BIT SET
MOV "177552. RO ;COPY PTR BUFFER TO RO
BIC #200, RO ; REMOVE PARITY BIT
RTS PC
END

Perhaps It should be added that paper tape Is normally a-track. on

which seven tracks gives the numeric code for the characters and the
most significant track Is used to give each row of holes the same
parity.
f 26 An IntroductIon to System ProgrammIng - Based on the PDP1 f

8.2 TEleTYPE INPUT OUTPUT

Another very simple device from a control point of view Is the console
teletype. It Is convenient to use the term teletype to categorise this
device although It may In fact be a VDU. There Is one slight
complication In that a teletype Is both an Input device and an output
device . However. this resolves Itself quite simply since It Is allocated
two pairs of control/status and buffer lines . and the Input and output
mechanisms are Independent.

The addresses allocated are normally

teletype input control/status 177560

teletype input buffer 177562
teletype output control/status 177564
teletype output buffer 177566

The subroutine given above could be modified to read a character

from the teletype by substituting the appropriate addresses. However. In
both cases some space can be saved by observing that a stopped
device can be started by Incrementing Its status register rather than
moving a 1 to It. and the walt can be Implemented by using

WAIT : TSTB I I status address

BPL WAIT

This was In fact done In the read character subroutine forming part of
the octal loader In Section 4 .3. Thus the subroutine given there was
equivalent to

BEGIN
INC 11177560 ; SET TELETYPE INPUT START BIT
WAIT TSTB 11177560
BPL WAIT ; WAIT UNTIL DONE BIT SET
MOV 11177562; RO ; READ CHARACTER TO RO
BIC 1200 . RO ; CLEAR PARITY BIT
RTS R7
END

On some teletypes the start bit has no significance and the first
Instruction above Is redundant . Characters are Input whenever the user
strikes a key. or at a fixed rate If a tape reader attachment Is
operative. On other kinds of teletype a character can only be Input
after a start signal has been given.

Most kinds of teletype are capable of half duplex or full duplex

 Control of Input and Output 127

operation . In half duplex mode the effect of operating a key Is to print

the corresponding character and send Its code to the device buffer . In
full duplex mode the printing does not occur unless the read character
subroutine •echos' every character Input through the output register . A
simple subroutine to output the character whose code Is given by RO Is
the following

OUTCH : BEGIN
WAIT : TSTB 8t177564
BPL WAIT
MOV RO.8.177566
RTS R7
END

Here again there Is a wait at the start. In case the output of the
previous character has not been completed . Once the device Is ready a
new character can be output by copying It to the device buffer. There
Is no need to set a start bit since writing to the buffer Implies start.

In practice. rather more complicated subroutines than the above are

used. but before considering these. the other Input/output sequences
Introduced In the BOOTSTRAP description of Chapter 4 are described .
They are best treated under a separate heading because they exhibit In
extreme form what Is generally considered to be one of the worst
features of machine code programming. namely. the sacrifice of clarity
and good logical structure in the Interests of economy In Instructions.
The Justification Is that. In their case . they simply become lists of
numbers which have to be manually keyed Into the machine before the
real work can begin. and their size Is all that matters . It Is unlikely
that such obscure coding can be Justified In any normal situation .

8. 3 BOOTSTRAP SEQUENCES

The bootstrap as described in Chapter 4 raqutres

A sequence BINOUT to produce binary tape

A sequence BININ to read It in again. and
A sequence TRANSMIT to transmit characters between a user
and another computer to facilitate the cross compiling action .

Because of the extreme emphasis placed on reducing the size of

BINOUT and BININ their structure Is not simple and it Is perhaps best
to state the Instruction sequences Involved and then discuss their main
features .
128 An Introduction to System Programming - Based on the PDP11

BINOUT I BEGIN OCTAL CODE

WAIT I TSTB .,177564 105737
177564
BPL WAIT 100375
MOVB -(RO),.#177566 114037
177566
CMP RO, R7 020007
BNE WAIT 001371
HALT 000000
. WORD 173366 173366
.WORD 000770 000770
END

BININ BEGIN
L1 K:>V #X,RO 012700
X
INC @#177560 005237
177560
WAIT TSTB .#177560 105737
177560
BPL WAIT 100375
MOVB .#177562,(RO)+ 113720
177562
X BR Ll 000766
END

The SUbroutine BINOUT Is Intended to be keyed Into store

Immediately preceding the program which It Is required to punch In
binary (that Is. eight bits of the program to each character on the
tape). It punches the program In reverse order starting with the last
byte. and for this reason AO should be set to the address of the first
store line following the program. before BINOUT Is entered . It stops
when It has punched all the store lines up to and Including the first
byte of Its own 'BNE WAIT' Instruction. Thus the last eight characters
on the tape will always be

001. 370. 366. 366. O. O. 001. 371

When It Is required to re-Input a program punched In this way the

BININ subroutine must be keyed Into store . so that Its last Instruction Is
In the store line preceding the first store line Into which the program Is
to be loaded . The tape should then be placed In the reader so that It
can be read backwards starting on either of the 366 characters . If
BIN IN Is entered at Its first Instruction. It will set AO to the address of
Its own BA L1 Instruction and read a character of Input Into the least
significant byte of this Instruction . Provided that the byte read Is 366
the program will be unchanged : hence It will loop back to the
 Control of Input and Output 129

beginning and repeat the same operation . When the byte 372 Is read
the effect Is to change the BA L1 Instruction to a BA WAIT Instruction;
hence AO Is not now reset . The next character is therefore read to the
most significant byte of the Instruction which Is now BA WAIT; hence It
must be 001 If the program Is not to be altered further . SUbsequent
characters on the tape are now loaded Into store Immediately following
the BININ sequence until there Is no more tape in the reader. In effect
the 366 characters are nothing more than a ' le ader ' on which the tape
Is positioned. and there couid be an arbitrary number of them .

A flowchart description of the sequence TRANSMIT which Is Intended

to be used In conjunction with the octal loader was given In Figure
4.4. The corresponding code can now be presented . Assuming that the
addresses for the users teletype and computer X are

TELETYPE COMPUTER X
INSTATUS ~77560 INSTATUS ~76500
INBUFl"ER ~77562 INBUFFER ~76502
OUTSTATUS ~77564 OUTSTATUS ~76504
OUTBUFFER ~77566 OUTBUFl"ER ~76506

the TRANSMIT sequence Is

BEGIN I TlU\NSMIT SEQUENCE

CLR Rl ; CLEAR SWITCH
L3lTSTB 0#177560
BPL L1 ; BRANCH IF TTY INPUT NOT READY
TSTB 0#176504
BPL L1 ; BRANCH IF X NOT READY TO RECEIVE
MOV 0#177562, RD
CMP RD, #'$
BNE L2 ;BRANCH IF CH ~ '$'
INC R1
BR L1
L2 IMOV RD, 0#176506 ;COPY CH TO X
L1lTSTB 0#176500
BPL L3 ; BRANCH IF X NOT READY TO TlU\NSMIT
TSTB 0#177564
BPL L3 I BRANCH IF TTY NOT READY TO PRINT
MOV O#~76502, RO
MOV RD, 0#177566 ;COPY CH TO TTY
CMP RD, #' r
BNE L3 I BRANCH IF CH NOT ' f '
TST R1
BEQ L3 ; BRANCH SWITCH NOT SET
END
LOADER GOES HERE
130 An Introduction to System Programming - Based on the PDP11

The octal version 01 this sequence Is

005001 105737 177560 100014 105737 176504 100011 013700

177562 020027 000044 001002 005201 000402 010037 176506
105737 176500 100356 105737 177564 100353 013700 176502
010037 177566 020027 000336 001344 105701 001742

Although It may not be obvious from what has already been said.
the above sequence relies on the speed of the teletype being at least
equal to the speed of the connection Into computer X. Devices such as
teletypes are often a substantial distance from the computer and the
device controllers do not expect a . response after each character has
been printed. Instead. they themselves set the done bit at the rate at
which the device Is designed to operate. Therefore. It Is necessary for
the teletype to match the speed of the device controller, even when
TRANSMIT Is Interposed.

If It Is required to use the loader given In Chapter 4 with this

sequence . two points should be noted. First the loader expects a 'f'
character before the first number. Since TRANSMIT does not enter the
loader until a 'f' character has been read. two such characters will be
necessary In the output from computer X. Secondly. the loader was
written expecting Input on the teletype channel (address 177560/2).
Since computer X Is assumed to be on a channel having addresses
176500/2. appropriate changes will be required to lines 1132, 1136
and 1144 of the loader.

The above simple approaches suffice for simple applications but In

order to avoid the computer Idling away Its time In various WAIT loops.
when user programs could be running. more complicated systems for
Input/output control are adopted . The basis of these systems Involves
the notion of buffering the Input/output.

8.4 BUFFERING

We are very much concerned In practice with the efficiency of

computing systems because they represent large capital outlays. and
sometimes they are In a real time environment which means that the
results they are computing are eagerly awaited. A computer system Is
thought to be efficient If Its control unit and Input/output devices are
doing useful work most of the time . In the example above when the
reader Is going. the control unit Is Idling. and when the control unit Is
profitably employed the reader Is stopped.
 Control of Input and Output 131

A partial remedy could be achieved by designing readers so that

they always stop with the next character at the reading station. Thus.
whilst one character Is being processed the reader can be moving the
next one into position . This is only helpful if a significant amount of
processing Is done on each character . In practice programs tend to
read many characters. for example . a complete line. then process
them before moving on to the next line. This leads to an activity
diagram as In Figure 8 .2a .

CONTROL UNIT BUSY

INITIAL COMPUTE COMPUTEI

COMPUTATION ONA ON B
IDLE TIME

READ READ
STATEMENT A STATEMENT B

READER BUSY

Figu re 8.2a Activity States with Unbuffered Input

CONTROL UNIT BUSY

INITIAL COMPUTE COMPUTE

COMPUTATION ON A ON B TIME

READ
STATEMENT A
READ
STATEMENT B
I
READER BUSY

Figure 8 .2b Activity States with Buffered Input

Buffering Is the means by which these activities can be made to

overlap. The basic Idea Is simple . Whilst a program Is computing.
Input that has not yet been called for is read and stored In an area of
store set aside for use as a 'buffer' . Then. when the program needs
new input. It is immediately available In the buffer. Application of this
technique to the situation represented by Figure 8.2a would yield the
activity diagram of Figure 8.2b.
132 An Introduction to System Programming - Based on the PDP11

That Is. A Is read In advance of It being required so that no delay

Is encountered when the computation on A commences . Whilst the
computation on A Is In progress . B Is read so that It also is available
when required. This kind of overlap of Input and computing Implies that
there are two separate sequences of Instructions (an INCH SUBROUTINE
and a READER SUBROUTINE) concerned with the Input. and that an
area of store Is set aside as a buffer. through which they
communicate. This Is summarised diagrammatically In Figure 8.3.

Figure 8.3 The Principle of Buffering

Each time a program processing Input requires a new Input

character It calls the INCH subroutine which delivers the next character
from the buffer . Simultaneously with this. the READER subroutine takes
characters from the reader buffer as they become available and copies
them Into the buffer In store. Two facts should now be apparent. First.
a discipline must be established which keeps these two subroutines In
step. For example. the INCH subroutine must be prevented from
reading from buffer locations which have not yet been filled. and the
READER routine must walt If the program Is using Input so slowly that
the butter becomes full. Second. If truly parallel operation of the
program (and INCH) and the READER SUBROUTINE Is to be achieved.
two control units will be required. In fact . since in general there may
be several readers and printers which have to be kept running
simultaneously. even more control units would be required. Fortunately.
there Is the fact that If a control unit was allocated full time to the
READER subroutine. or any other similar device subroutine . It would
spend most of Its time waiting for the device to enter the DONE state.
Thus the Idea arises of borrowing the control unit for a few Instruction
times every time the reader achieves the DONE state . The character
can then be removed from the reader buffer and the device restarted.
This Idea Is the basis of 'Interrupt' systems.

8. 5 INTERRUPTS

An Interrupt takes the form of a signal which Is transmitted from a

control/status line to the control unit whenever the associated device
completes an operation. and the Interrupt enable bit (bit 6) Is set In
the control/status line of the device.

In order to explain the Interrupt mechanism of the PDPll. It Is

necessary to recall the simple view that was given of the operation of
 Control of Input and Output 133

the control unit earlier. The control unit was presented as a mechanism
that continuously executes the sequence

1. use PC to obtain an Instruction from store ([PCI>

2. Increment PC so that It 'points' to the next store line
3. execute the Instruction
4. repeat 1.

The existence of an Interrupt mechanism means that under some

conditions this sequence Is broken. In effect step 4 becomes

4. If there Is no Interrupt then repeat 1 else

5. force a subroutine entry to the appropriate
Interrupt subroutine
6. repeat 1.

Entry to an Interrupt subroutine In this way Is similar to entry to a

subroutine by means of the JSR Instruction, but there are some detailed
differences which are described below and provided that. the Interrupt
SUbroutine leaves the registers undisturbed and terminates with the
special return from Interrupt Instruction (RT!) . the program In execution
at the time of the Interrupt will be resumed without any noticeable
effect.

8.5. 1 Interrupt Entry

It Is appropriate to mention here that there are several possible causes

of Interrupts and . as the control unit Is conscious of this. It enters a
different subroutine for each type of Interrupt. In fact the control unit
assumes that there Is a list of the entry addresses to the Interrupt
subroutines at a fixed place In the store which Is reserved for this
purpose. This Is called the Interrupt vector .

The Interrupt vector Is In store lines 0 onwards. There are In fact

two words for each Interrupt typically allocated as shown In the Table In
Appendix 5. The first of these words Is the Interrupt entry address and
the second Is a new value which Is to be placed In a register (PS).
which has not previously been mentioned . This register Is the processor
status register whose functions are described In the next Section.

When the control unit decides to enter an Interrupt subroutine It

performs the operations

Stack PS
Stack PC
Reset PS
Reset PC .
134 An Introduction to System Programming - Based on the PDP11

Thus the next Instruction obeyed Is the first one of the Interrupt
routine.

It will now be obvious that the RTI Instruction . which Is used to

terminate an Interrupt subroutine. must reset both PC and PS from the
stack .

8.5.2 The Processor Status Register (PS)

Most computers have a few single digit quantities . relating to the

operation of a program. that are not formally regarded as registers by
the programmer. The N . Z. V and C bits of the PDP11 are a good
example . They do. however. have to be remembered and later reset If
an Interrupt occurs . Therefore the PDP11 has a register called
processor status (PS) which In effect contains such miscellaneous bits .
It has already been stated that PS Is stacked when a Interrupt occurs
and reset by the RTI Instruction .

The function of the other bits In the processor status word Is not
the same on all PDP 11s. In general they are concerned wIth the
mechanIsms that operating system software would use to prevent user
programs from InterferIng wIth the Input/output devices . or areas of
store allocated to other programs . It Is only necessary here to consider
the use of three other bits called the processor priorIty bits. These are
positIoned thus

_ _PROCESSOR PRIORITY

I I I INIZIVICI
7 6 543 2 1 0

The processor priority bits have a role to play In connection with

Interrupts. Every peripheral device has a wired In priority number and
the Interrupts which It generates are at this priority. The control unit
will Ignore the Interrupts from devices of lower priority number than that
specified In PS. In the case of the LSl11 s all the peripheral devices
have priority number 0 and only digit 7 actually exists In PS. so that
digit 7 can be thought of as an interrupt Inhibit bit . A program which
needs to make decisions based on the values of variables which are
also used by Interrupt SUbroutines may need to Inhibit Interrupts to
avoid Interrupt subroutines being called during critical sequences . An
example of this arises In the buffering scheme described below. It Is
also usual to execute the Interrupt subroutines themselves with Interrupt
inhibited. otherwise logical complications might arise .
 Control of Input and Output 135

8. e IMPLEMENTATION OF INPUT BUFFERING

In order to Implement an Input buffering scheme. for a paper tape

reader say. It Is necessary to provide at least

INCH - a subroutine called by a program to read a character

RINT - a subroutine to be called when a reader Interrupt occurs
BUFF - space In store for a buffer.

and to make an entry for RINT In the Interrupt vector. There will also
be a need to allocate space for some 'polnters' Into the buffer which
will be used to remember positions In the buffer. The pointer NXICH will
be used for the position of the next character to be read; and the next
position to be used when a reader Interrupt occurs will be given by
NXIPOS. This organisation could apply to any Input device which has
the characteristic of delivering characters one at a time. It would not
apply to card readers which can only be stopped at the end of a card .

Before the detail of INCH and RINT can be described. the

conventions for using the buffer must be established . A number of
possibilities exist here but a simple and effective convention Is to treat
the buffer as a cyclic buffer . That Is. positions In the buffer are used
consecutively until the last position Is reached. after which the buffer
positions are re-used starting again from the first position . This cyclic
structure will be assumed both on reading characters from the buffer
and on loading new characters Into the buffer. Thus the typical states
of the buffer might be those shown In Figure 8.4.

c~ CH,"S TO" ''''0

~m)
NXCH NXPOS

OR

C "'-1- - " T T T T 7 T T T T T T T T T T - r r r T 1 7 7 7 7 r - - - - . - -

NXPOS

Figure 8.4 Cyclic Buffer States

Rules must now be established to Identify the two special cases

buffer full
buffer empty.
136 An Introduction to System Programming - Based on the PDP' 1

Either could be represented by the state NXPOS = NXCH, so to keep

the two separate the buffer will be deemed to be full when there Is
actually one empty position remaining, as In Figure 8.5.

I MORE CHARS ~ CHARS TO BE READ I

.NXCH
NX POS

Figure 8.5 Buffer Full State

Thus

NXPOS = NXCH will be taken to mean 'buffer empty'

and NXPOS+l = NXCH will be taken to mean 'buffer full" .

All Increments to the pointers must take account of the cyclic nature of
the buffer . In order to keep this In mind the symbol + will be used .
This notation represents an operation which Is Identical to + unless the
result Is beyond the end of buffer, In which case It Is forced to the
corresponding position at the start of the buffer.

We can now consider the operation of the subroutines INCH and

AINT given In flowcharts form In Figures 8 .6 and 8.7. The simpler one
Is AINT . First there Is a possibility that the Interrupt Is due to an error
such as the reader Is not switched on. In this case, some suitable
action must be decided. The flowchart given above simply walts for the
error to be corrected exte.-nally then exits the subroutine. Hopefully the
device fault will now be rectified, and a character Interrupt will occur .
Next It must be remembered that entries to Interrupt subroutines are
forced by the machine at places In a program that cannot be
predicted; therefore, If any registers are to be used they must first be
stacked . After this precaution has been taken the main function of the
subroutine can be performed, namely to move a character from the
reader buffer to the buffer In store (BUFF), removlnq Its parity bit and
advancing the pointer . It would be better to check that the parity of the
character Is correct. but It Is not done here because It would
complicate the routine In a way that Is not relevant to the understanding
of the bUffering techn ique . The final action of the subroutine, before
resetting the stacked registers and obeying a ATI Instruction, Is to
restart the reader , provided that there Is stili room In the buffer.
 Control 01 Inpu t and Output 137

1
RINT

.----- - -...J4 ---~

NOVE CHARAClER FROM
[EVICE BlFFER TO POSlTlON
IN BlFFER GIVEN BY NXPOS
Mil REIIlVE PARITY BIT

SlBLFFER FUW

Figure 8 .6 The Reader Interrupt Subroutine

11
INCH

Figu re 8 . 7 The Read Cha racter Subroutine

The INCH subrou tine Is apparently simple . but It exhibits some

rather subtle problems . Its main action Is to copy a character from the
138 An Introduction to System Programming - Based on the PDP11

buffer to RO and advance the pointer . However. If the program has

been reading Input faster than the reader can go. the buffer might be
empty. In this event the subroutine must walt. This Is an apparently
endless loop but provided that the reader Is started an Interrupt will
eventually occur and RINT will store a character In the buffer and move
NXPOS .

Another problem Is that the program might be reading Input more

slowly than the reader. In which case the buffer will become full and
RINT will leave the reader stopped . It thus becomes necessary for the
INCH subroutine to restart the reader after It has created a space In
the butter. If In fact It Is stopped for the above reason. A variable
RSWITCH Is used to record the stopped/started states of the register.
In fact. the significant Information which this conveys to the INCH
subroutine Is that an Interrupt Is expected .

Finally. there Is the problem that at the start of a new program

some special action may be needed to start the reader. This Is
perhaps best done at the time the buffer pointers are Initialised. If this
Is not done . then the program would loop Indefinitely at the start of the
INCH subroutine the first time It attempts to read a character. An
alternative way of avoiding this problem Is to preload the buffer with an
Ignorable character such as newline.

The SAL encoding of RINT and INCH Is given below. It follows

directly from the flowchart and only the Implementation of + needs
further description. This assumes that the cyclic buffer Is 128 bytes
long and starts at an address which ends with at least eight zero bits.
Thus the effect of resetting to the beginning of the buffer after a
pointer moves past the end Is achieved by following each INC of a
buffer pointer by a BIC with 200 octal .

RINT : BEGIN
PTRS = 177550
PTRB = 177552
TST (UPTRS
BMI FAULT
MOV RO. -( R6)
MOV NXPOS. RO
MOVB ...PTRB . (RO)
BICB 1200. (RO) +
BIC .200. RO
MOV RO . NXPOS
INC RO
BIC .200. RO
CMP RO. NXCH
BEQ FULL
INC PTRS
CLR RSWITCH
 Control 01 Input and Output 139

ll : MOVCA6)+. AO
AT'
FUll: INC ASWITCH
BA Ll
FAULT : TST 8'PTAS
BMI FAULT
AT!
END

INCH : BEGIN
ll: CMP NXCH . NXPOS
BEQ II
MOVB 8NXCH . AO
INC NXCH
BIC '200. NXCH
TST ASWITCH
BEQ L2
INC IIPTAS
ClA ASWlTCH
L2 : ATS PC
END

8.7 IMPLEMENTATION OF OUTPUT BUFFERING

An output buffering scheme may also use a cyclic buffer. In general.

characters to be printed would be placed In this buffer by an OUTCH
subroutine . and they would be removed and sent to the printer by the
printer Interrupt subroutine PINT . However. these two subroutines must
Interlock so that the following special cases are satisfactorily dealt with

buffer empty and printer stopped at time of an OUTCH call

buffer full at the time of an OUTCH call.

The buffer would again be managed by means of two pointers

NXOCH and NXOPOS. Their roles would be as depleted for NXICH and
NXIPOS In Figure 8 .4. except that the CHAAS TO BE AEAD would In
this case be CHAAS TO BE PAINTED .

Figure 8 . 8 Is a flowchart for the OUTCH subroutine. The loop at

the beginning takes care of the case when the buffer Is full. Although
this is an apparently endless loop. the printer will have been previously
started . and an Interrupt will eventually occur. From Figure 8.9 It can
be seen that the occurence of an Interrupt when there are some
CHAAS TO BE PAINTED will alter NXCH. thus allowing the OUTCH
subroutine to proceed. It Is Important that during the rest of the
OUTCH subroutlne. execution of PINT Is prevented. since both of them
use and alter the variables NXPOS and PSWITCH. Apart from this the
action of the rest of the OUTCH subroutine Is fairly obvious. It must
140 An Introduction to System Programming - Based on the PDP11

however start the printer If It Is stopped .

I
DUTCH

lYE?,r:-::--::-b t2 - - - ___
~~~ FULL <r.E. NXOCH = NXOPOS~

Figure 8 . 8 The OUTCH Subroutine

I
PINT

r - - - -- - - ' - -- - - " " ' YES

}----if------,

Figure 8 .9 PINT Subroutine

An Interrupt will occur after each character written to a printer

buffer has been removed from the device buffer . by the device control
hardware . and is being printed . This Is the signal that the next
character may be written to the device buffer . which Is what the PINT
subroutine of Figure 8 .9 does . In the case where there are no more
 Control of Input and Output 141

characters to be printed. the PSWITCH Is set. which means that the

next call of OUTCH will cause a character to be written directly to the
device buffer.

Again In the coding of the subroutines given below. It Is assumed

that the buffer size Is 128 bytes and that It starts at an address which
Is a multiple of 256 . This coding Is for a lineprinter with control/status
and buffer addresses as given

LPTS =
LPTB =
OUTCH : BEGIN
Ll: MOV NXOPOS. - CSP)
INC CSP)
BIC '200. CSP)
CMP NXOCH. CSP) +
BEQ L1
?
TST PSWITCH
BNE L2
MOV AO. IINXOPOS
INC NXOPOS
BIC '200 . NXOPOS
L3: ?
ATS PC
L2 : MOV AO. I
CLA PSWITCH
BA L3
END
PINT : BEGIN
CMP NXOPOS . NXOCH
BEQ L1
MOV IINXOCH. IOPTB
INC NXOCH
BIC '200. NXOCH
ATS PC
L1: INC PSWITCH
ATS PC
END

8.8 USING •FLOPPY' DISCS

Almost all computers have magnetic disc memories In addition to the

main store In which the programs run . An Important use of these
memories Is for the long term storage of system programs. so that they
can be quickly loaded Into the main memory when they are needed .
Another very Important use of disc memory Is that of storing the lists of
characters Ccalled flies) which represent programs . and other text
142 An Introduction to System Programming - Based on the PDPII

documents. The system programs In this case would be expected to

provide the means to change (or 'edit') these flies. It Is beyond the
scope of this book to enter Into a tull discussion of disc memories In
relation to system programming. but a brief Introduction to the method
of driving the low cost 'floppy' discs. which exist on most micro
computers. Is given .

Even when the discussion Is limited to floppy discs there are many
types from which to choose . We will consider the FDl771 as used on
the PDP 11/03 systems.

These discs have a total capacity of approximately 1/4 million bytes.

The layout of this Information Is In 'sectors' of size 128 bytes and
'tracks' containing 31 sectors each. An address of a sector on a disc
contains the sector number In the least significant byte. and the track
number In the most significant byte.

Transfers of Information between a floppy disc and the computer

require the use of three special registers

a COIIIIIlUld a status register (RXCS) at address 177170

a data buffer register (RXDB) at address 177172
and a disc address register (RXSA) at address 177174.

The transfers take place In two stages . Inside the disc control
hardware . which 15 In fact Itself a microcomputer. there 15 a one
sector buffer. Commands exist to copy complete sectors between the
disc and the buffer. Other commands allow the buffer to be read from
or written to In 16-blt word units. with the consecutive words all
passing through AXDB. Thus the following actions are required to read
a sector from disc to main memory

1) write the disc address to AXSA

2) write a 'read sector' command to AXCS
3) walt for transfer complete
4) write an 'empty buffer' command to AXCS
5) copy 64 words to main memory from AXDB.

Similarly a write to disc transfer will require

1) write a 'fill buffer' command to AXCS

2) copy 64 words to the disc buffer via AXDB
3) write a disc address to AXSA
4) write a 'write sector' command to AXCS
5) walt for transfer complete.

In order to give specific examples. It Is necessary to describe some

of the detail of the control and status register . Assuming the bits to
 Control of Input and Output 143

number from 0 at the right hand end. this Is

bit 0 the start bit

bits 1-3 the command
o means fill buffer
1 means empty buffer
2 means write sector
3 means read sector
bit 7 the done bit.

The following subroutines provide for transfers between any disc

sector and any 54-word block In main memory.

AXCS = 177170
AXDB = 177172
AXSA = 177174
DREAD: BEGIN; Rl = DISC ADDRESS. RO = STORE ADDRESS
MOV R1 . AXSA ; SET DISC ADDRESS
MOV '7. AXCS ; START READ TRANSFER
WAIT: TSTB AXCS
BMI WAIT ; WAIT FOR COMPLETION
MOV '100. -CSP) ; SET COUNT
MOV '3 . AXCS ISSUE 'EMPTY BUFFER'
COPY: MOV AXDB. CRO)+
DEC CSP)
BNE COpy
TST CSP)+
RTS PC
END

DWRITE : BEGIN
MOV '100. -CSP) ; SET COUNT
MOV '1. AXCS ISSUE ' FILL BUFFER'
COPY: MOV CRO)+. AXDB
DEC CSP)
BNE COpy
MOV ai . AXSA SET DISC ADDRESS
MOV '5. AXCS START WRITE TRANSFER
WAIT : TSTB AXCS
BMI WAIT
TST CSP)+
RTS PC
END

It Is also possible to use Interrupts Instead of the walt loop, and

this would be preferable. since the transfers Involve relatively
mechanical movements. Also. there Is the possibility of errors
occurring which are Indicated by bit 15 ofAXCS, and suitable lists
ought to be Incorporated In the disc driving subroutines .
144 An tntroauctton to System ProgrammIng - Based on the PDP11

8. 9 EXERCISES

Write suitable subroutines for the INCH . OUTCH and IENQ assumed
In the program given In Section 5. 11 . The INCH subroutine Is
expected to return the next character of Input In RO and OUTCH Is
expected to print the character In RO . IENQ Is a variant of INCH
which should return the next character In RO If one has been
typed , otherwise It should return zero.

2. If you have access to a suitable PDP11, attempt to run the

program which you completed In Exercise 1.
Appendix 1 7-bit ASCII Character Code

The table on the next page gives a summary of the Instructions

discussed In this book. There are a small number of additional
(anomalous) Instructions available only In particular types of PDPll
which are not Included. some octal digits In the given Instructions are
represented by the letters

M - meaning any octal value Is permitted and its value will

determine the mode of use of the next octal digit which
specifies a register number. as follows
o Register Mode
1 Register Deferred Mode
2 Autolncrement Mode
3 Autolncrement Deferred Mode
4 Autodecrement Mode
5 Autodecrement Deferred Mode
6 Index Mode
7 Index Deferred Mode .
o - represents the destination register number.
8 - represents the source register number.

All of the last group of Instructions. the branch Instructions. have an

B-blt offset which Is written as zero In the table .
 Appendix 1 Summary of PDPII Instruction Code 147

CQDE/MNEIfJNIC BITE roRM ACTION

OlJlSMD MlV ~lJISMD MOVB DES'!' c- SOURCE
02MSMD CMP ~2MSMD CMPB SOURCE - DES'!'
03MSMD BIT ~3MSMD BITB SOURCE & DEST
04MSMD BIC ~4MSMD BITe DES'!' c- DES'!' & ~SOURCE
05MSMD BIS ~5MSMD BISC DES'!' c- DES'!' V SOURCE
06MSMD ADD NONE DES'!' c- DES'!' + SOURCE
~6MSMD SUB NONE PEST c- PEST - SOURCE
004SMD JSR NONE JUMP TO SUBROOTlNE( 0-7 )
OOOlMD JMP NONE JUMP (PC - DEST)
000200 K1'S NONE RETURN fROM SUBROO'l.'INe( 0-7 )
0050MD CLR ~050MD CLRB DES'!' c- 0
005lMD COM ~05lMD CORB DES'!' c- ~DEST

0052MD INC ~052MD INCB DEST c- DEST + ~

0053MD DEC ~053MD DECB DEST c- DEST - ~
0054MD NEG ~054MD NEGB DEST c- -DEST
0055MD ACe ~055MD ADCB DEST c- DEST + C
0056MD SBC ~056MD SUBa DEST c- DES'!' - C
0057MD TST ~057MD TSTB TEST DEST
0060MD ROR ~060MD RORB DEST c- DEST ROTATED RIGBT
006lMD ROL ~06lMD ROLB DEST c- DEST ROTATED LEFT
0062MD ASR ~062MD ASRB DEST C'" DEST / 2
0063MD ASL ~063MD ASLB PEST c- DEST x 2
000000 HALT NONE HALT PROCESSOR
000249 NaP NONE NO OPERATION
00024~ CLC NONE CLEAR C
000242 CLV NONE CLEAR v
000244 CLZ NONE CLEAR Z
000250 CIB NONE CLEAR N
000257 CCC NONE CLEAR CVNZ
00026~ SEC NONE SET C
000262 SEV NONE SET v
000264 SEZ NONE SET Z
000270 SEN NONE SET N
000277 SCC NONE SET CVNZ
000400 BR NONE BRANCH ALWAYS
001000 BNE NONE BRANCH NOT EQUAL ZERO
001400 BEQ NONE BRANCH EQUAL ZERO
100000 BPL NONE BRANCH PLUS
100400 BMI NONE BRANCH MINUS
101000 BHI NONE BRANCH HIGHER
101400 BLOS NONE BRANCH LOWER OR SAME
102000 BVC NONE BRANCH V - 0
102400 BVS NONE BRANCH V - 1
103000 Bee NONE BRANCH C - 0
103400 BeS NONE BRANCH C - 1
002000 BGE NONE BRANCH GREATER OR EQUAL
002400 BLT NONE BRANCH LESS THAN
003000 BGT NONE BRANCH GREATER THAN
003490 B1£ NONE BRANCH LESS OR EQUAL
Appendix 2 SAL Code for the MUD Interpreter

MUOINT : BEGIN; MUO INTEAPAETEA

JMP STAAT
MUO = . ; ' MUO STOAE'
= +8192
STAAT: CLA A4 ; BOX 11. A4 Is ADDA
L1 : CLA Al ; BOX 12 . Al Is OCT. NO
CLA A5 ; A5 Is SWITCH
JSA PC. INCH ; BOX 13, AO = CHAA
L2: CMP t'/. AO ; BOX 14
BEQ SLASH
CMP t12, AO
BEQ LF
CMP t'G, AO
BEQ G
CMP t'P. AO
BEQ P
CMP AO, t'O
BMI OTHEA
CMP t'7. AO
BMI OTHEA
JSA PC. INOCT ; BOX 6, SETS Al
INC A5 ;BOX 17
SA L2
SLASH: TST A5 ;BOX 2
BEQ L3
MOV Al. A4 ;BOX 3
BIC 1170000. A4 ; MAX ADDA SIZE IS 4095
BA L3
LF : MOV t15. AO ;BOX 5
JSA PC, OUTCH
TST A5 ; BOX 6
BEQ L4
ASL A4 ; BOX 7 , TO USE BYTE UNITS
MOV Al. MUO( A4)
ASA A4
L4 : INC A4 ; BOX 8
BIC t170000. A4
MOV A4, Al
JSA PC. OUTOCT
MOV "~I. AO
JSA PC. OUTCH
L3: ASL A4 ; BOX 9 TO USE BYTE UNITS
MOV MUO( A4). Al
JSA PC. OUTOCT
ASA A4
MOV t' • AO
JSA PC. OUTCH
BA L1
 Appendix 2 SAL Code for the MUD Interpreter 149

G: MOV Al. A2 ;BOX 24 . A2 Is PC

BIC £ 170000 . A2 ; MAX PC IS 4095
CLA A3 ; A3 Is ACC
P: ASL A2 ;BOX 26 . TO USE BYTE UNITS
MOV MUOCA2) • AS ; AS Is PI
ASA A2
INC A2
BIC '170000. A2
MOV AS. Al
BIC '170000 . Al ; Al = 5 PAAT OF PI
ASL Al ; IN BYTE UNITS
CMP AS. 1100000 ; BOX 27
BHI P
BIC '007777 . AS
SWAB AS ; BOX 28
AOA AS
AOA AS
MOV AS . -CSP)
AOA AS
ADD CSP>+. AS ; AS = 6 X F
ADD AS. PC ; SWITCH ON F
MOV MUO(Al) . A3 ; LOAD (F = 0)
BA ENDSW
MOV A3. MUO( Al> ; STOAE (F = l>
BA ENDSW
ADD MUO(Al> . A3 ; ADD (F = 2)
BA ENDSW
SUB MUO( au . A3 ; SUB (F = 3)
BA ENDSW
GOTO : ASA Al ; GOTO (F = 4 )
MOV Al. A2
BA ENDSW ; FILL TO 6 BYTES
TST A3 ; IF GE (F = 5)
BPL GOTO
BA ENDSW
TST A3 ; IF NE (F = 6)
BNE GOTO
BA ENDSW
BA LS ; J MP BOX 19 (F = 7)
BA ENDSW ; FILL TO 6 BYTES
BA ENDSW
MOV A3. Al ; PAINT ACC (F = 8)
JSA PC . OUTOCT
MOV '12 . AO
JSA PC . OUTCH
ENDSW: JSA PC . IENQ ; BOX 31
TST AO
BEQ P
OTHEA : MOV ,'? AO ; BOX 22
JSA PC. OUTCH
BA L6
LS: MOV A2. Al ; BOX 19
150 An Introduction to System Programming - Based on the PDP11

JSA PC. OUTOCT

MOV It'. AO
JSA PC. OUTCH
MOV A3. A1
JSA PC, OUTOCT
L6 : MOV 1t12, AO ; BOX 20
JSA PC. OUTCH
MOV It'., AO
JSA PC. OUTCH
JMP L1
: END OF PAOGRAM. SUBAOUTINES FOLLOW
INOCT: BEGIN
CLA A1
L2: ASL A1
ASL A1
ASL A1
BIC 1t177770. AO
ADD AO, A1
JSA PC. INCH
CMP AO, ,'0
BMI L3
CMP 1t'7. AO
BPL L2
L3 : ATS PC
END
OUTOCT: BEGIN
MOV It'O. AO :BOX 2
ASL A1
ADC AO
JSA PC, OUTCH :BOX 3
MOV '5. -eSP) : BOX 4
Ll: ASL A1 :BOX 5
AOL A1
AOL A1
AOL A1
MOV A1. AO
AOA A1
BIC '177770, AO
ADD "0. AO
JSA PC, OUTCH ; BOX 6
DEC esP) :BOX 7
BNE L1 : BOX 8
TST eSP) + :BOX 9
ATS PC
END

END
ENTEA MUOINT
Appendix 3 Flowcharts for the SAL Assembler
DOT: . WORD 0 ; GLOBAL DATA DECLARATIONS
FNAME: . WORD 0
IADDR: . WORD 0
XMODE : . WORD 0
LBUFF = XMODE +2
SBUFF = LBUFF + 256.
NLIST = SBUFF + 80
LEVEL = NLIST + 2
. = NLIST + 640 .

CHTAB: ; CONTAINS 1 BYTE CODE PER CHARACTER

· WORD 7*256. +14. 7*256. + 7. 7*256. + 7. 7*256. + 7
.WORD 14*256. + 7. 7*256. + 3.14*256. + 3. 7*256. + 7
· WORD 7*256. + 7. 7*256. + 7. 7*256 . + 7, 7*256. + 7
· WORD 7*256. + 7. 7*256. + 7, 7*256. + 7. 7*256. + 7
· WORD 13*256. +14.12*256. + 8. 7*256. + 7, 9*256. +13
· WORD 6*256. + 5.13*256. +13.13*256. +12.13*256. + 4
. WORD 0 0 0 0
· WORD 257. ,3*256. +12,12*256 . + 7. 7*256. + 7
· WORD 512. +12. 514. 514 . 514.
· WORD 514. 514. 514. 514.
· WORD 514 . 514. 514. 514.
· WORD 514. 7*256. + 2. 7*256 . + 7. 7*256 . + 7
· WORD 256. + 7. 514. 514 . 514 .
· WORD 514 . 514. 514. 514.
· WORD 514 . 514. 514. 514 .
· WORD 514. 7*256. + 2. 7*256. + 7.12*256. + 7
FNTAB; ; 5 CH NAME. 1 BYTE CODE. 16 BIT VALUE
· WORD "CL. ·R. 1*256. • 005000
· WORD "CL. "RB. 1*256., 105000
. WORD "CO. 'M . 1*256.. 005100
. WORD "CO. "MB, 1*256.. 105100
· WORD "IN, 'C. 1*256.. 005200
. WORD "IN, "CB. 1*256.. 105200
· WORD "DE. 'C. 1*256. , 005300
· WORD "DE. "CB. 1*256.. 105300
· WORD "NE. 'G. 1*256., 005400
. WORD "NE. "GB. 1*256., 105400
· WORD "TS. 'T. 1*256.. 005700
· WORD "TS. "TB. 1*256.. 105700
· WORD "AS. ' R, 1*256. • 006200
· WORD "AS. "RB. 1*256.. 106200
· WORD "AS. 'L, 1*256. • 006300
· WORD "AS. "LB, 1*256.. 106300
· WORD "RO. 'R. 1*256. • 006000
· WORD "RO. "RB. 1*256.. 106000
· WORD "RO. 'L. 1*256. • 006100
· WORD "RO. "LB. 1*256.. 106100
· WORD "SW. "AB. 1*256.. 000300
152 An Introduction to SY8tem Programming - Ba8ed on the PDPt 1

. WORD "A D . 'C.1*256. . 005500

. WORD "AD. 1*256.,
"CB. 105500
. WORD "SB, 1*256. ,
'C , 005600
. WORD "SB . 1*256. ,
"CB, 105600
. WORD "MO. 2*256 . ,
' V. 010000
. WORD "MO , 2*256 . ,
"VB, 110000
. WORD "CM, 2*256 . .
' P. 020000
. WORD "CM , 2*256. .
"PB , 120000
. WORD "AD . 2*256 . ,
'D , 060000
. WORD "SU, 2*256 .,
' B, 160000
. WORD "BI. 'T . 2*256 . , 030000
. WORD "BI. "TB • 2*256. , 130000
. WORD "BI. ' C. 2*256 . . 040000
. WORD "BI. "CB , 2*256 . , 140000
. WORD "BI. 'S. 2*256 .. 050000
. WORD "BI , "SB , 2*256. , 150000
. WORD "XO, 'A. 2*256. . 074000
. WORD "BR, 0 , 3*256 . . 000400
. WORD "BN , 'E , 3*256. , 001000
. WORD "BE , 'Q. 3*256 . . 001400
. WORD "BP. ' L, 3*256 . , 100000
. WORD "BM , 'I. 3*256. . 100400
. WORD "BV . ' C , 3*256 . . 102000
. WORD "BV , 'S. 3*256. , 102400
. WORD "BC. ' C , 3*256 . , 103000
. WORD "BC. ' S, 3*256 . . 103400
. WORD "BG , ' E. 3*256 . , 002000
. WORD "Bl, 'T, 3*256. . 002400
. WORD "BG , 'T. 3*256 . . 003000
. WORD "Bl. 'E , 3*256 . , 003400
. WORD "BH . ' I. 3*256.. 101000
. WORD "Bt., "OS • 3*256. , 101400
. WORD "BH, "IS • 3*256. , 103000
. WORD "Bl., '0 . 3*256 .. 103400
. WORD "JM. 'P , ,.256 . . 000100
. WORD "JS , ' A, 2*256 . , 004000
. WORD "AT, 'S , 1*256. . 000200
. WORD "HA . "LT • 0 , 000000
. WORD "Cl, 'C, 0, 000241
. WORD "Cl. 'V, 0, 000242
. WORD "Cl. 'Z, 0, 000244
. WORD "Cl. ' N, 0, 000250
. WORD "CC, 'C , 0, 000257
. WORD "SE , ' C . 0, 000261
. WORD "SE . 'V • O. 000262
. WORD "SE . ' Z • 0, 000264
. WORD "SE. ' N, 0, 000270
. WORD "SC, 'C , 0, 000277
. WORD "BE , "GI, 12*256. + 'N , BEGIN
. WORD "EN, 'D , 13*256. , END
. WORD "EN, "TE, 14*256. +'R , ENTER
FTBEND =
 Appendix 3 The Flowcharts and Code for SAL 153

25
SAL - MAIN FI..IJWI:IlART
SETOOTOOSP
INITIALISE x.rsr

r----.--=- -+-----~- _l22

r------'g
laD LItE ,00 ITElIISE
CSAL.ll
SET IPlll ,00 IAlDl

Zl

YES 12 23
...._---4-- -=< IS ll£ 2Nl ITElI I 1 ADVAt«:E IPlll 100
ASSEIIlI£ A VAUE
FOR ll£ EXPR
rsAL.2J

6
FAIl..T B

START : ; MAIN FLOWCHART

MOV 1t20000. Rl ; Rl = DOT
MOV tNLlST+24 .. 8.NLlST ; SET UP NAME LIST WITH
MOV .NLlST+14 . • It.LEVEL ;A DUMMY LEVEL AND
MOV tNLlST. It.NLlST+10 . ; AND A CURRENT LEVEL
MOV ItNLlST+4. IUNLlST+20.
RESET : ; FPRINT RE-ENTERS HERE
MOV IttLEVEL. It.FNAME
CLR It.XMODE
MOV 12000. SP ;SET SP
Ll : JSR PC. ItItREADL ; BOX 9
154 An Introduction to System Programming - Based on the PDPII

MOV ILBUFF, R2 ; A2 = IPTA

MOV A1, 1t'lADDA
L7 : TST CA2) ;BOX 10
BNE L2
CMP 2( A2), It· . W ; BOX 11
BEQ L3
CMP 8(A2), I' : ; BOX 12
BEQ L4
CMP 8(A2) , 1'= ;BOX 13
BNE L5
JSA PC, ItIFINDN ; BOX 15
CMP AO, 11 ; BOX 16
BEQ L6
MOV A2, -(SP)
ADD 1t16. , R2 ; BOX 14
MOV AO , -CSP)
MOV A4, -CSP)
MOV INLIST , ItltFNAME
JSA PC, ItltASSX
MOV ItILEVEL, ItltFNAME
MOV -C AD , A5
CLA (AD
MOV 4CSP), AO ; BOX 17
MOV A2, 4CSP)
MOV AO, A2
MOV (SP)+, A4
MOV (SP)+, AO
JSA PC, IttSETN
MOV (SP)+, R2
L2: CMP (A2), 112 ;BOX 18
BEQ L1
MOV 1t1, AO ; BOX 19
JSA PC , IttFPAINT
L3 : ADD 1t8, A2 ; BOX 23
MOV ItILEVEL, ItltFNAME
JSA PC, ItltASSX
CMP (A2), I ' , ; BOX 35
BEQ L3
BA L2
L5: JSA PC , ItICOMPI ; BOX 21
BA L2
L4 : JSA PC, ItlflNDN
CMP AO, 1t1 ; BOX 3
BEQ L6
MOV A1, A5 ;BOX 4
JSA PC , ItISETN
ADD 1t16., A2
CMP CA2>. 112 ; BOX 5
BNE L7
BA Ll
L6: MOV 16, AO ; BOX 6
JSA PC, ItIFPAINT
 Appendix 3 The Flowcharts and Code for SAL 155

1
SAL. 1 - READ L1t£ AND ITEMISE

r "
READ AND STORE2 A COl4PLElE
L1t£ INlU 'SBLfF' I
t
IINrTlALlSE 11£ miISED L1t£ 8l.fFER 1
' LBLfF'
SET lP POIWTER TO SCAN 11£ L1t£
t
SWITCH ACCOROIN~ TO 11£
VALlE CF 11£ NEXT CHARACTER
I
AND ACT AS F[ll()VS
t 5
CHARAClER ACTIONS
SPACE. ND ACTION
lELINITER. STORE 11£ lELINllER
lECOIGIT. READ & STORE CONSTANT ITEM
LETTER COR'. '), READ & STORE NAIE ITEM
WlTE (' ), READ & STORE CHAR CONST
ClIl1ES ("), READ & STORE IlOLllLE CHAR CONST
OPEN BRACKET. IF PREV ITEM ~ "- " TI£N
ALlER IT TO A -3 ITEM
ELSE STORE A -I ITEM
CLOSE BRACKET. O£CK THAT 11£ PREVIOUS 2 IlEICS
ARE ' (' " REGISlER NAIE.
JE.E1E 11£ PREVIOUS ITEM AND
STORE REGISlER NO IN 11£ ' (' ITEM
FINALLY IF teeT CH = ' +' l:HAN(C
11£ BR!IO<ET ITEM TO A -2 ITEM

~SKIPlERMINATllRS - SEMICOLON AND NL

ALL REMAINING 6
CHS lJ' TO t£WLIt£
ARE TI£RE ANY SAL IlEICS ON 11£ Llt£?

f-ES
7
END

READL : BEGIN
LBUFF = LBUFF
Ll : MOV 'SBUFF. R3 ; BOX 2
B2A: JSR PC. ItIiNCH
MOVB RO. CR3) +
CMP RO . '12
BNE B2A
MOV 'LBUFF+256. . R2 ; BOX 3
B3A: CLR -CR2)
CMP R2. 'LBUFF
BNE B3A
MOV 'SBUFF. R3
L2: IG: MOVB CR3) +" RO ; BOX 4
MOVB CHTAB CRO). RO
ASL RO
JMP ItSWITCH CRO>
SWITCH: . WORD 00. DO. ALPHA. NL . STOP. LB . RB
. WORD ILLCH. DQUOTE. SQUOTE. DELIM. XOPR. IG
156 An Introduction to System Programming - Based on the PDP11

NL: MOV t12 , (R2) ; BOX 6

CMP R2, tLBUFF
BEQ L1
RTS PC ;BOX 7
; ALL THE FOLLOWING ARE BOX 5
DELlM : XOPR: ; STORE DELIM
MOVB -1 (RS) , (R2)+
ADD 17, R2
BR L2
00:00: ; READ & STORE NUMBER
MOV RS, R4
DEC R4
B51: MOVB (R4)+, RO
CMP RO, I'.
BEQ DEC
CMPB CHTAB (RO) , '1
BGT OCT ; BR NOT DEC DIGIT
BLT B51 ; BR IF OCTAL DIGIT
DEC: MOVB -1 (RS), R4 ; ASSEMBLE DECIMAL NO
B53: SUB "0, R4
MOVB (RS)+, RO
CMPB CHTAB (RO) , '1
BGT B52
ASL R4
ADD R4. RO
ASL R4
ASL R4
ADD RO. R4
BR B5S
B52 : CMPB CHTAB(RO). t4
BEQ B54 ; IGNORE
B59 : DEC R3
B54: MOV t1, (R2)+ ; STORE CONST ITEM
MOV R4. (R2)+
ADD '4. R2
BR L2
OCT : MOVB -1 (RS). R4 ; ASSEMBLE OCTAL NO
B55 : SUB ,'0, R4
MOVB (RS)+, RO
TSTB CHTAB (RO)
BNE B59
ASL R4
ASL R4
ASL R4
ADD RO, R4
BR B55
 Appendix 3 The Flowcharts and Code for SAL 167

ALPHA : STOP:;READ AND STORE NAME

MOV .6, R4 : COUNT CHS
CLR (R2)+
B57 : MOVB -1 (RS) , (R2) +
DEC R4
BEQ B56
MOVB (RS) + , RO
CMPB CHTAB (RO), .2
BLE B57
DEC RS
B56: ADD R4, R2
BR L2
DQUOTE : : DOUBLE CHAR CONST
MOVB 1 (RS), R4
SWAB R4
BISB (RS) +, R4
INC RS
BR B54
SQUOTE: : SINGLE CHAR CONST
MOVB (RS)+, R4
BR B54
LB: : THIS WILL GENERATE -2 OR -S
CMP -8(R2), .'-
BNE B58
MOV .-S, -8( R2)
BR L2
B58: MOV .-2, ( R2)
ADD .8, R2
BR L2
RB: ; THIS WILL MODIFY PREVIOUS ITEMS
SUB .8, R2
JSR PC, ••REGNO
ADD .8, R2
TST RO
BPL B5B
B5A: MOV .8, RO
JSR PC, ••FPRINT
B5B: TST -16 . (R2)
BPL B5A
MOV RO, -14. (R2)
SUB .8, R2
CLR (R2)
CLR 2(R2)
CMPB (RS), .'+
BNE B5C
INC RS
MOV .-1. -8(R2)
B5C : JMP L2 : L2 IS OUT OF OFFSET RANGE
ILLCH: : ILLEGAL CHAR ERROR
CLR RO
JSR PC, ••FPRINT
END
158 An Introduction to System Programming - Based on the PDP11

1
SAl.2 - ASSEIIllE EXPf5SIllN

N~--....J,- --"",\
.------+-----{

N 9------.,
r - - - - f - - - - " - ( IS Tl£ !£Xl ITEM AN Il'ERATlJR ?

N ,-----'
.---+--<

13 Zl
(SW = Q) <SW • l>

28
FALlT 5

ASSX : BEGIN
CLR -(SP) ; BOX 2 STACK SW
 Appendix 3 The Flowcharts and Code for SAL 159

MOV It'+ . A3 ; A3 Is FN
ClA (A1) ; (Al> Is EXPA
CMP (A2). A3 ;BOX 3
BEQ II
CMP (A2) . It'-
BNE l2
ll : MOV (A2) . A3 ; BOX 4
ADD 1t8. A2
L2: TST (A2) ; BOX 5
BEQ L10
L3 : CMP (A2) . 1t1 ; BOX 6
BNE L4
MOV 2(A2). AS ; BOX 7 AS Is OPD
ADD 1t8. A2
L5 : JSA PC. 8ltEVALFN ; BOX 8
INC (SP) ; BOX 19
MOV (A2) . A3 ; BOX 9
BMI L8
CMPB CHTAB (A3) • #11 .
BNE L8
ADD #8. A2 ; BOX 10
TST (A2) ; BOX 11
BNE L3
LlO : JSA PC. 8#FINDN ; BOX 22
TST AO ; BOX 23
BlE L6
MOV (A4). AS ; BOX 24
ADD 1t8. A2
BA L5
L6 : TST (SP) ; BOX 26
BNE l7
CMP 8#lEVEL. 8ltFNAME ; BOX 14
BNE L7
MOV UXMODE. A3 ; BOX 15
ASL A3
JSA PC . 8ltADDAEF
ADD 1t8. A2
ADD 1t2. A1
BA L9
L8 : 1ST 8#XMODE ; BOX 12
BEQ B12A
SUB ai . ( AD
SUB 1t2. ( AD
B12A : ADD 1t2. Al
L9 : TST (SP)+ ; BOX 18
ATS PC
L4 : MOV #3 . AO ; BOX 17
JSA PC . 8#FPAINT
L7 : MOV #5. AO ; BOX 29
JSA PC. 8#FPAINT
END
160 An Introduction to System Programming - Based on the PDP11

7
SAL.. 3 - C04!'rLE OPERAND

N 9-----
r5 Tl£ taT [TEI4 AN "G" 7

N 12 - - - - - - - ,
. . . - -- - - +- - ---<r5 Tl£ taT [TEll -VE r. E. A " (" 7
,.- --1[ --,.
(.
rF Tl£ taT [TEI4 r s A REGrS!ER REG = REGr5lEll NlMEl ADVANCE rPTR
SET REG = rrsNlJIER
rON
, . -- -- - - 1 . ______.,
AOO 6 TO MOlE AND
UD< MEAD AT Tl£ OPERAND TYPE
I4llE

COMPO : BEG IN
CLR -CSP) ; BOX 8
CMP CR2), 11:'8 ;BOX 9
BNE Ll
MOV 11:10 . CSP) ; BOX 10
ADD 11:8 , R2
Ll : CMP CR2), 11:'11: ; BOX 11
BEQ L2
TST CR2) ; BOX 12
BPL L3
ADD 2C R2) , CSP) ; B OX 4
ADD 11:8 . R2
CMP - 8 CR2 ). 11:-2 ; BOX 15
BEQ L4
ADD 11:20 . CSP) ; BOX 16
CMP -8C R2) • 11:-3 ; BOX 17
 Appendix 3 The Flowcharts and Code lor SAL 161

BNE L5
ADD #20 . CSP)
L5 : MOV CSP)+. R4 ; BOX 19
RTS PC
L2 : ADD #8 . R2 ; BOX 23
JSR PC. 8#ASSX
ADD #27. CSP) ; B OX 25
BR L5
L3 : JSR PC. 8#REGNO ; BOX 1
TST RO
BMI L9
ADD RO. CSP)
BR L6
L9 : ADD #60. CSP) ;BOX 4
MOV R2. R4 ;R4 = START OF EXPR
CMP CR2) . #2
BGE B4A
ADD #8. R4 ; IGNORE INITIAL OPD
B4A : MOV CR4). RO
BMI L7 ; BRACKET FOUND
CMPB CHTAB CRO) • #1l.
BNE B4B ; END OF EXPR
ADD #16 . • R4 ; MOVE TO NEXT OPR
BR B4A
B4B:
INC 8#XMODE ; BOX 32
JSR PC. 8#ASSX
CLR 8#XMODE
BIS #7. CSP)
BR L5
L7 : JSR PC. 8#ASSX ;BOX 5
BIS 2CR2). CSP)
L6: ADD #8. R2 ; BOX 2
BR L5
L4 : BIT CSP) . #70 ; BOX 27
BEQ L8
BIS #70 . CSP) ; BOX 28
CLR CRl>+
BR L5
L8: ADD #10. CSP) ; BOX 22
BR L5
END
162 An Introduction to System Programming - Based on the PDP11

I
SAL. 4 - COMPILE INSTRl£TION

oor IN

,----J16-
CALL SlIlROl/Tlt-l; FOR
"I£GIN" [SAL. 9J
"00" [SAL. IOJ
"ENTER" [SAL. llJ

17
CEXIT)
 Appendix 3 The Flowcharts and Code for SAL 163

COMPI : BEGIN ; A2 = ADDAESS OF 1ST ITEM

MOV 'FNTAB . AO ; BOX 2
B2C : CMP CAO) . 2CA2)
BNE B2A
CMP 2CAO) . 4CA2)
BNE B2A
CMPB 4CAO) . 6CR2)
BEQ B2B
B2A : ADD '8. AO
CMP AO. 'FTBEND
BlT B2C
BA II
B2B : MOV 6( AO) • A3 ; A3 = FUNCTION
MOVB SCAO). - CSP) ; SP = TYPE
ADD '8 . A2 ;BOX 4
CMPB CSP) . 1t9 ;BOX S
BGT l2
MOV A3 . CAl> + ; BOX 6
TSTB CSP) ; BOX 7
BEQ l7
CMPB CSP) . '3 ; BOX 8
BEQ l4
JSA PC . 8ltCOMPO ; BOX 9
CMPB CSP) . Itl ; BOX 10
BEQ lS
SWAB A4 ; BOX 12
ASA A4
ASA A4
BIS A4 . 81ADDA
CMP CA2) .
BNE l6
". ; BOX 11

ADD 1t8. A2 ; BOX 13

JSA PC. 8ltCOMPO
L5: BIS A4. 81ADDA ; BOX 14
BA l7
l2: JSA PC. CA3) ; BOX 16
l7 : TST (SP)+ ; BOX lS
ATS PC
ll : MOV 1t2 . AO ; BOX 19
JSA PC. 8ltFPAINT
l4: JSA PC. 8'COMPBA ; BOX 21
BA l7
l6 : MOV 1t11.. AO ; BOX 18
JSA PC. 8,FPAINT
END
164 An Introduction to System Programming - Based on the PDP11

1
SAL. 5 - FIND HAlE
GETS N1NIEXINSTAllJS)

12
EXrT
 Appendix 3 The Flowcharts and Code for SAL 166

FINDN : BEGIN ; R2 = AD DR OF NAME ITEM

CMP 2( R2) • #•. ; BOX 2
BEQ Ll
MOV UNLIST. R4 ; BOX 3 R4 Is PTR
L3 : SUB #10 . • R4 ; BOX 4
CMP R4 . IUFNAME ; BOX 5
BLE L2
CMP (R4) . 2(R2) ; BOX 6
BNE L3
CMP 2( R4) • 4(R2) ; BOX 7
BNE L3
MOV 4(R4) . -(SP) ; BOX 8
BIC #100000. (SP)
CMP (SP)+. 6( R2)
BNE L3
ADD #6 . R4 ; BOX 9
CLR RO
TST -2( R4) ; BOX 10
BPL L4
INC RO ; BOX 11
BR L4
Ll : MOV #IADDR. R4 ; BOX 16
MOV #2 . RO
BR L4
L2: MOV #-1. RO ; BOX 15
L4 : RTS PC
END
'66 An IntroductIon to System ProgrammIng - Based on the PDP"

1
SAL. 6 - SET HAlE
<USES NIIlEX/NSTATUS AS SET BY FIt{JN)

11
EXIT

SETN: BEGIN; A2=ADDA OF NAME ITEM A5=VALUE

CMP AO. #2 ; BOX 2
BEQ L1
TST AO ; BOX a
BMI L2
MOV CA4). AS ; BOX 4 AS Is PTA
MOV A5. (A4)
BIS #100000. -2CA4)
L5: TST AS ; BOX 6
BEQ La
 Appendix 3 The Flowcharts and Code for SAL f67

BIT AS, .1 ;BOX S

BNE L4
MOV CAS), -CSP) ; BOX 22
MOV AS. CAS) ;BOX 7
MOV CSP)+. RS ; BOX 9
BR LS
LS: MOV 2CA4). RS ; BOX 28
CLA 2(R4)
L6 : TST RS ; BOX 10
BEQ L7
MOV (RS), -(SP) ; BOX 14
MOV AS . (RS) ; BOX 19
SUB AS . ( RS)
SUB '2 . (RS)
MOV CSP)+, RS ; BOX lS
BR L6
L4 : DEC RS ; BOX 2S
L9 : MOV RS, RO ; BOX 16
SUB RS. AO
ASR RO
DEC AO ; AO = OFFSET
MOV RO. -CSP) ; BOX 17
ADD '200, (SP)
BIT '177400, (SP)+
BNE L8
MOV CRS), -CSP) ; BOX 18
MOVB RO. (RS)
MOVB (SP), RO
ASL RO
ADD AO, RS
TSTB CSP)+ ;BOX 20
BNE L9
BA LS
L2 : MOV 8.NLlST, RO ; BOX 12
MOV 2(R2). (RO) +
MOV 4(R2) . (RO)+
MOV 6(A2). (RO) +
BIS '100000. -2( RO)
MOV RS. (RO) +
CLR CRO)+
MOV RO. 8.NLlST
BA L7
Ll : MOV AS . IUIADDA ; BOX lS
MOV RS. Rl
BA L7
L8 : MOV '9., RO ; BOX 21
JSR PC. 8.FPAINT
L7 : ATS PC
END
168 An Introduction to System Programming - Based on the PDP11

I
SAL.7 - ADO ~
<USES NINlEXINSTATUS AS SET BY FINDNl

1r----...I14 - - - ,
ADO THIS REFERENCE TO 11£
ABSOLUTE REF LIST

';=:±:=:=J29 - - . , 1
ADO THIS REFE~NCE TO 11£
~mVE REF LIST
1..-----l12 - - - ,
SET 11£ HAlE VALlE TO OOT
SlIl11lACT I Fill lFFSET REF 15
<EXIn

'------,t:==:::lg ----,
STORE DlSPl.ACElENT
IN lFFSET lFaxm
Mil POINTER TO unn
IN 11£ REFERENCE CHAIN

10
EXIT
 Appendix 3 The Fl owc har ts and Code for SAL 169

ADDAEF : BEGIN ; A2=ADDA OF NAME . A3=AEFTYPE

TST AO ; BOX 2
BMI L1
BIT A3. #1 ; BOX 3
BEQ L2
CLA AS ; BOX 18 AS is DISPLACEMENT
MOV A4 . A3
LS: TST CA3) ; BOX 4
BEQ L3
BIT CA3). #1 ; BOX S
BNE L4
MOV CA3) . A3 ; BOX 6
BA LS
L4 : MOV CA3). AS ; BOX 7
DEC AS
SUB !#IADDA. AS
ASA AS
MOV AS. -CSP) ; BOX 8
ADD #200. CSP)
BIT #177400 . CSP)+
BNE L6
L3 : MOVB AS. -2C Al> ; BOX 9
MOV Al. (A3)
DEC (A3)
BA L10
Ll : MOV !#NLlST. A4 ; BOX 11
MOV 2CA2). CA4) +
MOV 4(A2). CA4) +
MOV 6CR2). CA4) +
BIT A3 . #2 ; BOX 2S
BNE L7
BIC #177776. A3 ; BOX 12
MOV Al. (A4)
SUB A3 . CA4) +
CLA CA4)+
BA L8
L7: CLA CA4)+ ; BOX 26
MOV A1. (A4) +
L8 : MOV A4 . 8#NLlST ; BOX 27
BA L10
L2 : BIT A3 . #2 ; BOX 28
BNE L9
MOV (A4). CAl> ; BOX 14
MOV A1 . ( A4)
BA L10
L9 : MOV 2CA4). (A1 ) ; BOX 29
MOV A1. 2(A4)
BA L10
L6 : MOV #4 . AO ; BOX 16
JSA PC. 8#FPAINT
LlO : ATS PC ; BOX 10
END
170 An Introduction to System Programming - Based on the PDP' 1

1
SAl.. 8 - COII'ILE BRAtol

COMPBR : BEGIN
TST (R2) ; BOX 2
BNE L1
JSR PC. 8#FINDN ; BOX 3
TST RO : BOX 4
BGT L2
MOV 11=1. R3 ; BOX 5
JSR PC. I#ADDREF
L3 : ADD 11=8. R2 ; BOX 11
RTS PC
L1 : MOV 11=12 .• RO ; BOX 7
JSR PC. 8ltFPRINT
L2: MOV (R4). R4 : BOX 8
SUB R1. R4
ASR R4
MOVB R4. -2( RD
ADD 11=200. R4 ;BOX 9
BIT 1t177400. R4
BEQ L3
MOV 1t4. RO ; BOX 10
JSR PC. IItFPRINT
END
 Appendix 3 The Flowcharts and Code for SAL 171

I
SAl... 9 - PROCESS !'£GIN

BEGIN : BEGIN
JSR PC. 8ltPRTAD ; BOX 2
MOV 8ItNLlST . R4 ; BOX 3
CLR (R4)+
CLR (R4)+
MOV It 100000. (R4) +
MOV 8ItLEVEL. (R4) +
CLR (R4)+
MOV 8ItNLlST. 8ltLEVEL ; BOX 4
MOV 8ItLEVEL . 8ltFNAME
MOV R4. tUNLIST
RTS PC
END
1 72 An Introduction to System Programming - Based on the PDP"

1
SAl.. 10 - PRll:ESS 00

15
EXIT

j-rt:==:::J18
110O HAlE AND I5'EREI«:E
TO f'fa. LEVEL
 Appendix 3 The Flowcharts and Code fo r SAL 173

END : BEGIN
NUST = NUST
MOV A2 . -(SP)
JSA PC . 8,PATAD ; BOX 14
CMP 8'LEVEL. 'NUST + 4 ; BOX 2
BEQ Ll
MOV 8'LEVEL. A2 ; BOX 3 A2 Is PTA
MOV 8'NUST . - ( SP)
MOV A2. 8,NUST
MOV 6(A2) . 8'LEVEL
MOV 8'LEVEL. 8'FNAME
L3 : ADD '10 . • A2 ; BOX S
CMP A2 . (SP)
BEQ L2
TST 4( A2) ; BOX 6
BMI L3
MOV A2. AS ; BOX 7

MOV '6 . -( SP)

B7B : MOVB (AS) +• AO
BEQ B 7A
JSA PC. 8'OUTCH
DEC (SP)
BNE B7B
B7A : TST (SP)+
MOV '12 . AO
JSA PC . 8'OUTCH
SUB ea. A2
JSA PC. 8'FINDN
ADD t2 . A2
TST AO ; BOX B
BLE L4
MOV (A4) . AS ; BOX 10
MOV A2. A4
ADD t6 . A4
CLA AO
JSA PC. 8'SETN
BA L3
L4 : BM I LS ; BOX 17
MOV A4 . AS ; BOX 12
ADD t2 . AS
B12B : TST (AS)
BEQ B12A
MOV (AS). AS
SA B12B
B12A : MOV B( A2) . (AS)
MOV A4 . AS ; BOX 20
B20B : TST (AS)
BEQ B20A
BIT (AS) . '1
BNE L6
MOV (AS) . AS
174 An Introduction to System Programming - Based on the PDP11

BA B20B
B20A:
MOV 6(A2). (AS) ; BOX 9
BA L3
LS: MOV IUNLIST . AS ; BOX 18
MOV (A2) +. (AS) +
MOV (A2)+. (AS) +
MOV (A2) +. (AS) +
MOV (A2)+ . (AS) +
MOV (A2) +. ( AS) +
MOV AS. 8#NLlST
SUB #10 . • A2
BA L3
L6 : MOV (AS). A4 ; BOX 19
DEC A4
MOV 6(A2) . ( AS)
MOV A2 . AS
ADD #6 . AS
B19B : TST (AS)
BEQ B19A
BIT (AS) . Itl
BNE B19A
MOV (AS). AS
BA B19B
B19A :
BNE L7 ; BOX 21
MOV A4 . (AS) ; BOX 22
BA L3
L7 : MOV (AS) . AS
DEC AS ; BOX 23
B23B : TSTB (AS)
BEQ B23A
MOVB (AS) . -(SP)
ASL (SP)
ADD (SP)+. AS
BA B23B
B23A :
SUB AS . A4 ; BOX 24
ASA A4
MOVB A4. (AS)
ADD #200 . A4
BIT 1t177400 . A4
BEQ L3
MOV #4. AO
JSA PC . 8ltFPAINT
Ll : MOV #7. AO ; BOX 13
JSA PC . 8#FPAINT
L2: TST (SP) + ; BOX lS
MOV (SP)+ . A2
RTS PC
END
 Appendix 3 The Flowcharts and Code for SAL t 75

1
SAL. 11 - PAOCESS ENTER

ENTEA: BEGIN
NLIST = NLIST
MOV tNLlST . 8tFNAME; BOX 2
CLA 8#XMOD E
JSA PC • .#ASSX
JSA PC . • #END ; BOX 3
CMP tNLlS T + 4 . 8#NLlST ; BOX 4
BNE Ll
CMP #NLlST+4 . .#LEVEL
BNE Ll
MOV - ( Al> • PC ; BOX 5
L1 : MOV #7 . AO ; BOX 6
JSA PC. 8#FPAINT
END
176 An Introduction to System Programming - Based on the PDP11

l
MISCELLAtBlUS
ROOTlt£S

.-------2----~
FAULT
PRINTS 11£ FAULT NlER AND 11£ Lltt CF
11£ PROOlAM WHICH CONTAINS 11£ FAULT

,.----4----,
PRThD
PRINTS ClJlHENT Lltt AND
VALLE CF lXlT IN OCTAL

,----5----,
!aXl
CI£CKS lllI\T 11£ ClJll<ENT ITEM
IS A REGISTER HAle
AND GIVES ITS NUII£R IN RO

,-----6-----,
EVALFN
USED BY ASSX TO EVALUATE EXPRESSIONS
REG a = FN (+. -. &. V. *. /)
REG 5 = OPD
(RL> = EXPRESSION

FPRINT: BEGIN
MOV RO . -(SP)
MOV #'F. RO
JSR PC. 8#OUTCH
MOV (SP) +. RO
ADD #'0. RO
JSR PC. 8#OUTCH
JSR PC . 8#PRTLN
JMP 8#RESET
END

PRTAD: BEGIN
MOV Rl. -(SP)
MOV 8#IADDR. Rl
JSR PC. 8#OUTOCT
JSR PC. 8#PRTLN
MOV (SP) +. Rl
RTS PC
END
 Appendix :3 The Flowcharts and Code for SAL 177

PATLN : BEGIN
MOV A1 , - CSP)
MOV 'SBUFF. A1
MOV t ' , AO
JSA PC , 8tOUTCH
Ll : MOVB CAl>+, AO
JSA PC, 8'OUTCH
CMPB - H A l> , '12
BNE Ll
MOV CSP) +, A1
ATS PC
END

AEGNO : BEGIN
MOV '-1 , AO
MOV 2CA2) , -CSP)
SWAB CSP)
TST CA2)
BNE NOTAEG
TST 4CA2)
BNE NOTAEG
TS T 6CA2)
BNE NOTREG
CMP CSP) , ,·7A
BGT Ll
CMP CSP) , ' ·OA
BGE AEG
CMP CSP) , '·CP
BNE Ll
MOV '7 , AO
BA NOTAEG
Ll : CMP CSP) , ' ·PS
BNE NOTAEG
MOV '6 . AO
BA NOTAEG
AEG : MOV CSP) . AO
SUB '·OA . AO
NOTAEG : TST CSP)+
ATS PC
END

EVALFN : BEG IN ; CAl> = CAl> <A3> AS

CMP "+ . A3
BNE L1
ADD AS. CAl>
ATS PC
Ll : CMP " - . A3
BNE L2
SUB AS, CAl>
ATS PC
L2 : CMP " !. A3
1 78 An Introduction to System Programming - Based on the PDP11

BNE L3
XOR R3, (RD
RTS PC
L3 : CMP #'& . R3
BNE L4
COM R3
BIC R3, (RD
RTS PC
L4 : ; INSERT HERE A SUITABLE
; MUL T AND DIV SEQUENCE
; TO COMPLETE THIS PROCEDURE
END

OUTOCT : BEGIN
MOV #'0, RO
ASL Rl
ADC RO
JSR PC • • #OUTCH
MOV #5 . - ( SP)
U: ASL Rl
ROL Rl
ROL Rl
ROL Rl
MOV at. RO
ROR Rl
BIC #177770, RO
ADD #'0. RO
JSR PC. 8#OUTCH
DEC (SP)
BNE Ll
TST (SP) +
RTS PC
END

ENTER START
Appendix 4 Code for the SAL Assembler

The following Is the octal code for the assembler given In Appendix 3.
Each line represents B octal words and the address of the first Is given
In the lefthand column.

Initial zeros In the data structures at the beginning are omitted . To

assist In relating the octal to the SAL given In Appendix 3 the first word
of each procedure has been underlined .

Cl02000 000000 000000 000000 000000 000000 000000 000000 000000

Cl03720 000000 000000 000000 000000 003414 003407 003407 003407

Cl03740 006007 003403 006003 003407 003407 003407 003407 003407
Cl03760 003407 003407 003407 003407 005414 005010 003407 004413
Cl04000 003005 005413 005412 005404 000000 000000 000000 000000
Cl04020 000401 001412 005007 003407 001012 001002 001002 001002
Cl04040 001002 001002 001002 001002 001002 001002 001002 001002
Cl04060 001002 003402 003407 003407 000407 001002 001002 001002
004100 001002 001002 001002 001002 001002 001002 001002 001002
ClO4120 001002 003402 003407 005007 046103 000122 000400 005000
004140 046103 041122 000400 105000 047503 000115 000400 005100
004160 047503 041115 000400 105100 047111 000103 000400 005200
004200 047111 041103 000400 105200 042504 000103 000400 005300
004220 042504 041103 000400 105300 042516 000107 000400 005400
Cl04240 042516 041107 000400 105400 051524 000124 000400 005700
Cl04260 051524 041124 000400 105700 051501 000122 000400 006200
Cl04300 051501 041122 000400 106200 051501 000114 000400 006300
Cl04320 051501 041114 000400 106300 047522 000122 000400 006000
Cl04340 047522 041122 000400 106000 047522 000114 000400 006100
Cl04360 047522 041114 000400 106100 053523 041101 000400 000300
Cl04400 042101 000103 000400 005500 042101 041103 000400 105500
Cl04420 041123 000103 000400 005600 041123 041103 000400 105600
Cl04440 047515 000126 001000 010000 047515 041126 001000 110000
Cl04460 046503 000120 001000 020000 046503 041120 001000 120000
Cl04500 042101 000104 001000 060000 052523 000102 001000 160000
Cl04520 044502 000124 001000 030000 044502 041124 001000 130000
Cl04540 044502 000103 001000 040000 044502 041103 001000 140000
Cl04560 044502 000123 001000 050000 044502 041123 001000 150000
ClO4600 047530 000122 001000 074000 051102 000000 001400 000400
ClO4620 047102 000105 001400 001000 042502 000121 001400 001400
180 An Introduction to System Programming - Based on the PDP11

1104640 050102 000114 001400 100000 046502 000111 001400 100400

1104660 053102 000103 001400 102000 053102 000123 001400 102400
1104700 041502 000103 001400 103000 041502 000123 001400 103400
Cl04720 043502 000105 001400 002000 046102 000124 001400 002400
Cl04740 043502 000124 001400 003000 046102 000105 001400 003400
1104760 044102 000111 001400 101000 046102 051517 001400 101400
Cl05000 044102 051511 001400 103000 046102 000117 001400 103400
Cl05020 046512 000120 000400 000100 051512 000122 001000 004000
1105040 052122 000123 000400 000200 040510 052114 000000 000000
1105060 046103 000103 000000 000241 046103 000126 000000 000242
005100 046103 000132 000000 000244 046103 000116 000000 000250
Cl05120 041503 000103 000000 000257 042523 000103 000000 000261
005140 042523 000126 000000 000262 042523 000132 000000 000264
005160 042523 000116 000000 000270 041523 000103 000000 000277
Cl05200 042502 044507 005116 010076 047105 000104 005400 010146
Cl05220 047105 042524 006122 010560 QlZ1Ql 020000 012737 002560
005240 002530 012737 002546 002532 012737 002530 002542 012737
@05260 002534 002554 013737 002532 002002 005037 002006 012706
@05300 002000 004737 005564 012702 002010 010137 002004 005712
@05320 001052 026227 000002 053456 001455 026227 000010 000072
@05340 001467 026227 000010 000075 001060 004737 007216 020027
@05360 000001 001474 010246 062702 000020 010046 010446 012737
@05400 002530 002002 004737 006300 013737 002532 002002 014105
@05420 005011 016600 000004 010266 000004 010002 012604 012600
@05440 004737 007340 012602 021227 000012 001713 012700 000001
@05460 004737 010634 062702 000010 013737 002532 002002 004737
@05500 006300 021227 000054 001766 000756 004737 007006 000753
@05520 004737 007216 020027 000001 001411 010105 004737 007340
@0554O 062702 000020 021227 000012 001262 000653 012700 000006
@05560 004737 010634 012703 002410 004737 000000 110023 020027
1105600 000012 001372 012702 002410 005042 020227 002010 001374
Cl05620 012703 002410 112300 116000 003730 006300 000170 005640
1105640 005720 005720 006064 005672 006064 006142 006174 006272
005660 006122 006136 005706 005706 005624 012712 000012 020227
Cl05700 002010 001730 000207 116322 177777 062702 000007 000742
Cl05720 010304 005304 112400 020027 000056 001405 126027 003730
Cl05740 000001 003033 002767 116304 177777 162704 000060 112300
Cl05760 126027 003730 000001 003006 006304 060400 006304 006304
Cl06000 060004 000763 126027 003730 000004 001401 005303 012722
Cl06020 000001 010422 062702 000004 000675 116304 177777 162704
Cl06040 000060 112300 105760 003730 001361 006304 006304 006304
Cl06060 060004 000765 012704 000006 005022 116322 177777 005304
006100 001406 112300 126027 003730 000002 003767 005303 060402
Cl06120 000641 116304 000001 000304 152304 005203 000730 112304
Cl06140 000726 026227 177770 000055 001004 012762 177775 177770
Cl06160 000621 012712 177776 062702 000010 000614 162702 000010
Cl06200 004737 010752 062702 000010 005700 100004 012700 000010
Cl06220 004737 010634 005762 177760 100371 010062 177762 162702
Cl06240 000010 005012 005062 000002 121327 000053 001004 005203
Cl06260 012762 177777 177770 000167 177332 005000 004737 010634
Cl06300 005046 012703 000053 005011 021203 001403 021227 000055
@06320 001003 011203 062702 000010 005712 001424 021227 000001
 Appendix 4 The Octal Code for the SAL Assembler 181

1lI0634O 001063 016205 000002 062702 000010 004737 Oll062 005216

1lI06360 Oll203 100440 126327 003730 000013 001034 062702 000010
1lI06400 005712 001354 004737 007216 005700 003404 Oll405 062702
1lI06420 000010 000753 005716 001034 023737 002532 002002 001030
1106440 013703 002006 006303 004737 007570 062702 000010 062701
1lI06460 000002 000410 005737 002006 001403 1601ll 162711 000002
006500 062701 000002 005726 000207 012700 000003 004737 010634
1106520 012700 000005 004737 010634 ~ 021227 000100 001004
@0654O 012716 000010 062702 000010 021227 000043 001424 005712
@06560 100031 066216 000002 062702 000010 026227 177770 177776
@06600 001470 062716 000020 026227 177770 177775 001002 062716
@06620 000020 012604 000207 062702 000010 004737 006300 062716
@0664O 000027 000767 004737 010752 005700 100402 060016 000436
@06660 062716 000060 010204 021227 000002 002002 062704 000010
@06700 011400 100420 126027 003730 000013 001003 062704 000020
@06720 000767 005237 002006 004737 006300 005037 002006 052716
@0674O 000007 000727 004737 006300 056216 000002 062702 000010
@06760 000720 031627 000070 001404 052716 000070 005021 000711
@07000 062716 000010 000706 012700 004130 021062 000002 001010
1lI07020 026062 000002 000004 001004 126062 000004 000006 001406
007040 062700 000010 020027 005230 002760 000446 016003 000006
1lI07060 ll6046 000005 062702 000010 121627 000011 003032 010321
tlJ07l00 105716 001430 121627 000003 001433 004737 006530 121627
tlJ07l20 000001 001414 000304 006204 006204 050477 172646 021227
tlJ07l4O 000054 001021 062702 000010 004737 006530 050477 172624
1lI07160 000401 004713 005726 000207 012700 000002 004737 010634
@07200 004737 010000 000767 012700 000013 004737 010634 ~
@07220 000002 000056 001435 013704 002530 162704 000012 020437
@0724O 002002 003433 021462 000002 001370 026462 000002 000004
@07260 001364 016446 000004 042716 100000 022662 000006 001355
@07300 062704 000006 005000 005764 177776 100011 005200 000407
@07320 012704 002004 012700 000002 000402 012700 177777 000207
@0734O 020027 000002 001500 005700 100456 011403 010514 052764
1107360 100000 177776 005703 001407 030327 000001 001021 Oll346
007400 010513 012603 000767 016403 000002 005064 000002 005703
1107420 001462 Oll346 010513 160313 162713 000002 012603 000767
007440 005303 010500 160300 006200 005300 010046 062716 000200
tlJ07460 032726 177400 001034 011346 110013 111600 006300 060003
1lI07500 105726 001357 000740 013700 002530 016220 000002 016220
tlJ07520 000004 016220 000006 052760 100000 177776 010520 005020
tlJ07540 010037 002530 000410 010537 002004 010501 000404 012700
tlJ07560 OOOOll 004737 010634 000207 ~ 100434 030327 000001
@07600 001457 005005 010403 005713 001420 031327 000001 001002
@O7620 011303 000771 011305 005305 163705 002004 006205 010546
@0764O 062716 000200 032726 177400 001046 110561 177776 010113
@07660 005313 000445 013704 002530 016224 000002 016224 000004
@07700 016224 000006 030327 000002 001006 042703 177776 010114
@07720 160324 005024 000402 005024 010124 010437 002530 000417
@0774O 030327 000002 001003 011411 010114 000411 016411 000002
@07760 010164 000002 000404 012700 000004 004737 010634 000207
@10000 ~ 001013 004737 007216 005700 003013 012703 000001
U0020 004737 007570 062702 000010 000207 012700 000014 004737
182 An Introduction to System ProgrammIng - Based on the PDP11

1110040 010634 011404 160104 006204 110461 177776 062704 000200

1110060 032704 177400 001757 012700 000004 004737 010634 QQi11Z
010100 010670 013704 002530 005024 005024 012724 100000 013724
010120 002532 005024 013737 002530 002532 013737 002532 002002
010140 010437 002530 000207 010246 004737 010670 023727 002532
1110160 002534 001567 013702 002532 013746 002530 010237 002530
010200 016237 000006 002532 013737 002532 002002 062702 000012
010220 020216 001553 005762 000004 100771 010205 012746 000006
010240 112500 001404 004737 000000 005316 001372 005726 012700
.H0260 000012 004737 000000 162702 000002 004737 007216 062702
1110300 000002 005700 003410 011405 010204 062704 000006 005000
010320 004737 007340 000733 100424 010405 062705 000002 005715
010340 001402 011505 000774 016215 000010 010405 005715 001405
010360 031527 000001 001021 011505 000771 016215 000006 000706
010400 013705 002530 012225 012225 012225 012225 012225 010537
010420 002530 162702 000012 000672 011504 005304 016215 000006
010440 010205 062705 000006 005715 001405 031527 000001 001002
010460 011505 000771 001002 010415 000651 011505 005305 105715
1110500 001404 111546 006316 062605 000772 160504 006204 110415
010520 062704 000200 032704 177400 001631 012700 000004 004737
010540 010634 012700 000007 004737 010634 005726 012602 000207
1110560 ~ 002530 002002 005037 002006 004737 006300 004737
@10600 010146 022737 002534 002530 001005 022737 002534 002532
@10620 001001 014107 012700 000007 004737 010634 010046 012700
010640 000106 004737 000000 012600 062700 000060 004737 000000
010660 004737 010712 000137 005264 ~ 013701 002004 004737
@10700 011134 004737 010712 012601 000207 010146 012701 002410
010720 012700 000040 004737 000000 112100 004737 000000 126127
010740 177777 000012 001371 012601 000207 012700 177777 016246
@10760 000002 000316 005712 001033 005762 000004 001030 005762
@11000 000006 001025 021627 051067 003011 021627 051060 002014
@11020 021627 050103 001003 012700 000007 000411 021627 051520
011040 001006 012700 000006 000403 011600 162700 051060 005726
011060 000207 022703 000053 001002 060511 000207 022703 000055
011100 001002 060511 000207 022703 000041 001002 074311 000207
011120 022703 000046 001003 005103 040311 000207 012700 000060
011140 006301 005500 004737 000000 012746 000005 006301 006101
011160 006101 006101 010100 006001 042700 177770 062700 000060
@11200 004737 000000 005316 001362 005726 000207 000000 000000
011220 000000 000000 000000 000000 000000 000000 000000 000000
Appendix 5 Allocation of Device and Interrupt
Addresses

DEVICE CONTROL BUFFER IN'l'ERRI.1PT

CONSOLE-INPUT 177560 177562 60

OUTPUT 177564 177566 64

PAPER TAPE INPUT 177550 177552 10

PAPER TAPE PUNCH 177554 177556 14
FLOPPY DISC 111110 (RXDB )171112 264
FLOPPY DISC (RXSA)111114

PDT TERMINAL1 INPUT 176500 176502 300

OUTPUT 116504 176506 304

PDT TERMlNAL2 INPUT 116510 176512 310

OUTPUT 116514 176516 314

PDT TERMINAL3 INPUT 176520 116522 320

OUTPUT 116524 116526 324
Appendix 6 7-bit ASCII Character Code

octal octal OCtal octal

COde COde COde Code

000 Null 040 space 100 @ 140

001 SOH (start of heading) 041 I 101 A 141 a
002 STX (start of text:) 042 102 B 142 b
003 ETX (end of text:) 043 # 103 C 143 c
004 EOT (end of transmission) 044 $ 104 0 144 d
005 ENg (enquiry) 045 % 105 E 145 e
006 ACK (acknowledge) 046 & 106 1" 146 f
007 BEL (bell) 047 107 G 147 g
010 BS (backspace) 050 ( 110 H 150 h
011 HT (horizontal tab) 051 ) 111 1 151 i
012 Lf' (line feed) 052 * 112 J 152 j
013 VT (vertical tab) 053 + 113 K 153 k
014 1"1" (form feed) 054 114 L 154 1
015 CR (carriage return) 055 115 M 155 m
016 SO (shift out) 056 116 N 156 n
017 SI (shift in) 057 I 117 0 157 0
020 OLE (data link escape) 060 0 120 P 160 P
021 DCl (XON) 061 1 121 Q 161 q
022 DC2 062 2 122 R 162 r
023 DC3 (XOFF) 063 3 1.23 S 1.63 s
024 DC4 064 4 124 T 164 t
025 NAK (negative acknowledge) 065 5 125 U 165 u
026 SYN (synchronous idle) 066 6 126 V 166 v
027 ETB (end of transmission block)067 7 127 W 167 w
030 CAN (cancel) 070 8 130 X 170 x
031. EM (end of medium) 071. 9 131. Y 171 Y
032 SUB (substitute) 072 132 Z 172 z
033 ESC (escape) 073 133 [ 173 {
034 FS (field separator) 074 134 \ 174 I
035 GS (group separator) 075 135 ] 175 }
036 RS (record separator) 076 136 t 176
037 US (unit separator) 077 ? 137 177 delete
Index

Absolute 30
Accumulator 11
Address 11 .22
Address register 46
Addressing mode 25.30
- Absolute 30
- Auto-decrement 26 .41
- Auto-Increment 26.41
- Deferred 28
- Index 26
- Immediate 30
- Register 25
Anomalies 41
Arithmetic
- Binary 2
- Binary coded decimal 95
- Double length 76.82
- Floating point 76.85
- Integer 76
Arithmetic operations
- Add 2.82.86.96
- Divide 79.93
- Multiply 3 .14.40 .77.83.90
- Subtract 3.82.90.99
Arithmetic unit 11.23.34
Assembler 45
Assembly language 45.61
Binary coded decimal 76
Binary digit 1
Binary number 1
Bit 1
Block structure 61. 112
Bootstrap 44.50.55 .59.127
Branch Instruction 31.35.37
Buffer 108 .130 .135.139
Byte 40
Carry 32.34
Chain 112
Comment 69
Complement 4
Condition code 35
Console 45 .59
Control unit 10.12.23
Conversion 6 . 100
Cross-compile 57
Cyclic 135
Data 12
Data structure 108
Deferred 28
Destination 24
Device 123
Directive 67
Disc 124.141
Double length 76
Duplex
- Full 126
- Half 126
Exponent 16.85.92
Floating point 76
Floppy disc 141
Format 11.16.24.41
Forward reference 108
Function 11.24
Global variable 119
Hexadecimal 5
Idling 130
Immediate 30
Input 69.101.124.135
Instruction 10.31. 65
Interpreter 71
Interrupt 132.136.140
- Entry 133
- Vector 133
Itemise 109
Jump 40
Keyboard 123
Label 61
Label reference 112
Level 111
Line buffer 109
Lineprinter 123
Linked 115
Loader 44
Mantissa 76.85
Microprogram 48
Memory 9
Mnemonic 31. 33. 35. 36. 61
Mode 25
Multiplication 3.14
Namellst 111
Negative 3
Octal 5
Octal loader 50
Offset 36.38.42
Operands 24.31.66
Output 69.101.124.139
Overflow 34.37
Program 9.71
Program counter 10.29.39
Programming 13
Processor priority 134
Processor status 134
Radix 2.6
Range 5.37
Real time 130
Register 22
Remainder 81
Rotate 33
Rounding 77
Rounding errors 94
Scope 61
Side effect 28
Source 24
Special registers 29
Specification 120
Stack 29.40
Stack pointer 29
Store 9
Standard 85
Standardisation 91
Subroutine 20.38.69.118
Substandard 87
Superstandard 87
Switch 45
Switch register 45
System software 44
Truncation 77
Variable 10
Word length 2