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NPTEL Online Certification Course Advanced Computer Architecture Gem5 - Practice Questions Indian Institute of Technology Guwahati

The document describes a base configuration for running gem5 simulations with 1 CPU, specified cache sizes and parameters, and a bzip2 benchmark. It provides 4 questions related to modifying cache and CPU parameters and measuring the resulting cycles per instruction, cache miss rates, and L1 instruction cache misses. The questions analyze the performance impacts of changing between in-order and out-of-order CPU types, varying the ROB and L2 cache sizes, and using different benchmarks.

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143 views4 pages

NPTEL Online Certification Course Advanced Computer Architecture Gem5 - Practice Questions Indian Institute of Technology Guwahati

The document describes a base configuration for running gem5 simulations with 1 CPU, specified cache sizes and parameters, and a bzip2 benchmark. It provides 4 questions related to modifying cache and CPU parameters and measuring the resulting cycles per instruction, cache miss rates, and L1 instruction cache misses. The questions analyze the performance impacts of changing between in-order and out-of-order CPU types, varying the ROB and L2 cache sizes, and using different benchmarks.

Uploaded by

Red Viper
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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NPTEL Online Certification Course

Advanced Computer Architecture


gem5 – Practice questions
Indian Institute of Technology Guwahati

********Base Configuration*********

Numberof Cores/CPUs: 1

L1-I cache (size/associativity): 64kB/2-way

L1-I cache (size/associativity): 64kB/2-way

L2 cache (size/associativity): 256kB/8-way

Cacheline/Cache-block-szie: 64B

Main Memory size: 1GB

Benchmark: bzip2

Instruction Count: 1000000

Note:

i) To solve these questions one can make the changes in the:

a) Command line

b) configs/common/Options.py or

c) a combination of command line and configs/common/Options.py

ii) In cpu2006.py (inside gem5/configs/common), change the path variables to the correct path of benchmark directory
at in all the lines where it is used.

iii) Build the system with ALPHA ISA, gem5.opt binary and by invoking RUBY memory module and MESI Two-Level
protocol for cache coherence

Build Command: scons build/ALPHA/gem5.opt RUBY=True PROTOCOL=MESI_Two_Level -j5

iv) Run Command: build/ALPHA/gem5.opt configs/example/se.py --cpu-type=DerivO3CPU --num-cpus=1 --caches --


l1d_size=64kB --l1i_size=64kB --l1i_assoc=2 --l1d_assoc=2 --l2_size=256kB --l2_assoc=8 --cacheline_size=64 --mem-
size=1GB --bench=bzip2 --maxinsts=1000000 --ruby
NPTEL Online Certification Course
Advanced Computer Architecture
gem5 – Practice questions
Indian Institute of Technology Guwahati

Ques1)

Using the above configuration, change the cpu type to i) TimingSimpleCPU (inOrder Processor) ii) DerivO3CPU
(OutOfOrder Processor)

Calculate Cycles Per Instruction (CPI) for both the cases and choose the correct option.

[CPI can be calculated as: CPI=numCycles/committedinsts]

a) CPI(i) < CPI(ii)

b) CPI(i) > CPI(ii)

c) CPI(i) = CPI(ii)

d) CPI(i) and CPI(ii) cannot be compared

CPI(i)= 22540122 / 1000001

CPI(ii)= 7133021 / 1000203

Ans is: b)

Ques2)

In the same configuration with cpu-type as DerviO3CPU, experiment with two different ROBEnteries. Change the
numROBEnteries in the file O3CPU.py to a) numROBEnteries= 30 and b) numROBEnteries= 60.

[the number of ReOrder buffer (numROB)= 1 in both the cases]. Calculate the ratio of cpu.fetch.rate in ‘a’
cpu.fetch.rate in ‘b’
NPTEL Online Certification Course
Advanced Computer Architecture
gem5 – Practice questions
Indian Institute of Technology Guwahati

[Note: Before making each runs on changing the numROBEnteries, perform the build operation.]

Ans is: 0.369643 / 0.449039 = 0.82318

Ques3)

In the same configuration with cpu-type as DerivO3CPU, experiment with L2 cache size as: 32kB, 64kB & 128kB. Which
one of the following is true? (set numROBEntries to default as 192 and no_of_instructions as: 100000)

a) L2-cache miss(32kB) > L2-cache miss(64kB) > L2-cache miss(128kB)

b) L2-cache miss(32kB) > L2-cache miss(64kB) >= L2-cache miss(128kB)

c) L2-cache miss(32kB) < L2-cache miss(64kB) < L2-cache miss(128kB)

d) L2-cache miss(32kB) = L2-cache miss(64kB) = L2-cache miss(128kB)

L2-cache miss(32kB) : 14100

L2-cache miss(64kB) : 14084

L2-cache miss(128kB) : 14083

Ans is b)

Ques4)

Use the base configuration to measure L2 cache MPKI for two cpu types: a) TimingSimpleCPU (In-order Processor/IOP)
b) DerivO3CPU (OutOfOrder Processor/OOOP) with benchmark as namd

Find which one of the following satiesfies:


NPTEL Online Certification Course
Advanced Computer Architecture
gem5 – Practice questions
Indian Institute of Technology Guwahati

a) L2 Cache MPKI (IOP) > L2 Cache MPKI (OOOP)

b) L2 Cache MPKI (IOP) < L2 Cache MPKI (OOOP)

c) L2 Cache MPKI (IOP) = L2 Cache MPKI (OOOP)

d) L2 Cache MPKI (IOP) <= L2 Cache MPKI (OOOP)

L2 Cache MPKI (IOP) : (1171/1000000)*1000 = 1.171

L2 Cache MPKI (OOOP) : (1361/1000000)*1000 = 1.361

Ans is b)

Ques5)

In base configuration, use –cpu-type=DerivO3CPU and change the cacheline to 128B, benchmark to leslie3d. What will
be the value of L1-I cache MPKI:

a) 0.45 - 0.75 b) 1.25 - 1.55 c) 2.90 - 3.10 d) 2.75 - 2.90

L1-I cache demand misses = 638

L1-I MPKI = (1371*1000)/1000000 = 0.638

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