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Lab 4 - NOR and NAND Implementation of Logic Functions

This document outlines an experiment on implementing logic functions using NOR and NAND gates. The objectives are to demonstrate building digital systems with NOR and NAND gates. The experiment procedures involve constructing basic logic gates like AND and OR using NOR and NAND gates in a software simulation. Students are then asked to implement logic functions in sum of products form using only NOR or NAND gates. The document provides guidelines on drawing truth tables and using software tools to analyze logic circuits.
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© © All Rights Reserved
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0% found this document useful (0 votes)
113 views

Lab 4 - NOR and NAND Implementation of Logic Functions

This document outlines an experiment on implementing logic functions using NOR and NAND gates. The objectives are to demonstrate building digital systems with NOR and NAND gates. The experiment procedures involve constructing basic logic gates like AND and OR using NOR and NAND gates in a software simulation. Students are then asked to implement logic functions in sum of products form using only NOR or NAND gates. The document provides guidelines on drawing truth tables and using software tools to analyze logic circuits.
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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CPE 301 – Logic Circuit

Experiment 4: NOR and NAND Implementation of Logic Functions

Objective/s:

1. To demonstrate the implementation of digital systems using NOR and NAND gates

Equipment Required

1. Software simulation: The Logisim software package

Theory

NOR and NAND gates are said to be universal gates because any digital system could be implemented
using only one type of these gates. As these gates are easier to fabricate with electronic components,
digital circuits are frequently constructed with only NOR or only NAND gates. Because of the importance
of NOR and NAND gates in the design of digital circuits, rules and procedures have been developed for
the conversion from Boolean functions in terms of AND, OR, and NOT into equivalent NOR or NAND-
based logic diagrams. From DeMorgan theorem, we can see two expressions and symbols of NOR and
NAND gates as follows:

Procedures/Lab Work:

A. Implementation of Basic Gates using NOR gate:

1. Software Simulation
a. Let's start by implementing the basic AND using universal NOR gates. The NOR
implementation of the basic AND gate is shown in the figure below

b. Start a new Logisim project and enter the NOR-based circuit, to the right of the above
figure, into it

Prepared by: Rodolfo G. Doromal, Jr. Ph.D. Page 1


c. Use the poke tool to simulate the circuit and fill in the following truth table. The truth
table should be identical to that of the basic AND gate

d. Now, let's see another method to generate the truth table of any circuit other than the
poke tool.
e. From the Project menu, click on Analyze Circuit

f. The Combinational Analysis window will show up

g. Click on the Table tab. The truth table will show up and it should be identical to the one
you generated using the poke tool. The table ensures that the NOR implementation of
the AND gate is correct.

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h. Remember to save your work for future usage.

B. Implementation of Logic Functions using NOR gates:

1. Software Simulation

a. In order to implement any logic function using NOR gates, the function should be in the
Product of Sum (POS) representation. POS could be obtained by applying DeMorgan
Theorem on the Sum of Product (SOP) representation.
b. Consider the following POS function: F = (X + Y + Z')( X + Y' + Z)( X' + Y + Z)( X' + Y' + Z')
c. Create a new Logisim project and construct the above function using OR-AND gates.

d. Use the poke tool or the Combinational Analysis window to generate the truth table of the
circuit.

e. Construct the same function using only NOR gates. Draw your circuit in the area below and
have your TA to check it

Answer:

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f. Enter the NOR-based circuit you constructed into Logisim and generate its truth table. The
generated table should be identical to that of the OR-AND implementation. This ensures
that any logic function could be implemented using NOR gates only.

C. Implementation of Basic Gates using NAND gate

1. Software Simulation

a. Let's start by implementing the basic OR using universal NAND gates. The NAND
implementation of the basic OR gate is shown in the figure below

b. You could enter the NAND-based circuit into Logisim and simulate it, as you did with the
NOR-based circuit. Let's see an another method to enter logic expressions and implement
them using universal NAND gates.
c. Start a new Logisim project, simply by clicking Ctrl + N.
d. From the Project menu, click Analyze Circuit. The Combinational Analysis window will show
up.

e. Ensure that you are in the Inputs tab. Then, enter X in the bottom Edit Box and click on the
Add button.

f. Variable X will be added to the upper Edit Box as an input. Similarly, add Y as another input

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g. Go to the Outputs tab, and add Z as an output of your circuit

h. Go to the Expression tab. Write the basic OR gate expression (i.e., X+Y) into the Edit Box and
click on the Enter button.

i. Click on the Build Circuit button, at the bottom of the Combinational Analysis window. The
Build Circuit window will show up. Check the box beside "Use NAND Gates Only". Then, click
OK

j. Click Yes on the Confirm replace Window.

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k. Go to Logisim main window. The NAND-implementation of the basic OR gate will be
automatically generated for you.

l. Ensure that the circuit is identical to the NAND implementation of the OR gate, as in point.
m. Generate the truth table, using the poke tool or the Combinational Analysis window,
and ensure that it is identical to that of the OR gate.

n. Remember to save your work for future usage

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D. Implementation of Logic Functions using NAND gates:

1. Software Simulation

a. In order to implement any logic function using NAND gates, the function should be in the
Sum of Product (SOP) representation.
b. Consider the following POS function: F = X' Y' Z' + X ' Y Z + X Y' Z +X Y Z'
c. Create a new Logisim project. As you did through Subsection 3.7.1, enter the above
expression using the Combinational Analysis window. Remember to define your inputs and
outputs before writing the expression. In order to complement any Boolean variable, the
character '~' should be written before the variable. Moreover, a space should be left between
any two adjacent variables.

d. Click on the Build Circuit button, the Build Circuit window will appear. Click OK. The
Confirm Replace window will appear, click Yes. The logic function will be generated using
AND-OR gates.

e. Use the poke tool or the Combinational Analysis window to generate the truth table of the
circuit.

Prepared by: Rodolfo G. Doromal, Jr. Ph.D. Page 7


f. Now, construct the same function using only NAND gates. Draw your circuit in the area
below and have your TA to check it.
g. Now, use the Combinational Analysis window again to rebuild the circuit. However, in this
time, check the "Use NAND Gates Only" box

h. A NAND-based implementation of the logic function is generated in Logisim main window.


The implementation should be identical to the one you generate in point
i. Moreover, check the truth table of the NAND-based circuit. It should be also identical to that
of the ANDOR representation. This ensures that any logic function could be implemented
using NAND gates only.

Questions/Exercises:

1. Realize the function F = (AB)′ + A + (B + C)′ NAND gates only. Draw the logic diagram using the
Logisim simulation software. Include the snapshot of the logic diagram created in Logisim.
2. Realize the function F = B′C′ + A′C′ + A′B′ by NOR gates only. Draw the logic diagram using the
Logisim simulation software. Include the snapshot of the logic diagram created in Logisim.

Reference(s)
1. Introduction to Logic Circuits & Logic Design with Verilog, 1st Edition, Brock J. LaMeres
2. Digital Design, 3rd Edition, M. Morris Mano
3. Digital Principles and Logic Design, A. Saba & N Manna

Laboratory Report Format

Prepared by: Rodolfo G. Doromal, Jr. Ph.D. Page 8


CPE 306 – Introduction to HDL

Name: _____________________________________ Yr. & Sec. ____________ Date:


______________

Experiment Title
Experiment No. _

I. Introduction

II. Objectives

III. Materials and Components

IV. Procedure (include screenshots/images)

V. Results and Discussion

VI. Conclusion

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