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Chapter 4 Answers

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100% found this document useful (1 vote)
861 views9 pages

Chapter 4 Answers

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© © All Rights Reserved
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Chapter 4: Logic gates and logic circuits:

Answers to coursebook questions and


tasks and to Worksheet questions
Syllabus section covered: 3.2

From the coursebook


Task 4.01
This might be presented with or without an outcome and with or without an IF. The basic expression can be
written as (NOT Copyright) OR (Copyright AND Permission), which could be rewritten using symbols as (NOT A)
OR (A AND B).

Task 4.02
A B X
0 0 0
0 1 1
1 0 1
1 1 1

Task 4.03
This is designed to reinforce the point that a NAND gate is a combination of an AND gate and the negation of its
output. The circuit diagram could be analysed using a truth table with an intermediate point after the AND gate
where there is a 1 only for the A = 1 and B = 1 combination. Passing the four combinations through a NOT gate
causes 0 for the A = 1 and B = 1 combination but 1 for the other three combinations.

Extension Question 4.01


There are two inputs, so these could not be input to one NOT gate. Interestingly, if both the A and B inputs went
to individual NOT gates, the outcome after passing through the AND gate corresponds to an overall NOR gate.
(This outcome could be revisited when Boolean algebra is introduced in Chapter 18.)

Question 4.01
This question is intended to encourage learners to commit the symbols and definitions to memory.

Task 4.04
The condition for the signal can be expressed as:
S = (C = 1) AND ((A = 0) OR (B = 0)).

© Cambridge University Press 2019


This is the same as S = (C = 1) AND (A NAND B).
The corresponding circuit is:

An alternative is to have A and B input to NOT gates with the outputs fed into an OR gate.

Exam-style Questions
1 a These are straightforward memory questions. The OR, NAND and NOT gates are shown and the truth
tables do not need reproducing here. (1 per correct gate, 2 for correct truth table)
b i The workspace is set up with three intermediate points: M output from the top AND gate, N output
from the bottom AND gate, and O output from the top OR gate. (2 for each column, max 8)

Inputs Work space Output


A B C M N O X
0 0 0 0 0 0 0
0 0 1 0 0 0 1
0 1 0 0 0 0 0
0 1 1 0 1 1 1
1 0 0 0 0 0 0
1 0 1 0 0 0 1
1 1 0 1 0 1 1
1 1 1 1 1 1 1

ii Because there is a C input directly to the final OR gate, there is always a 1 output if C = 1 irrespective
of the values for A and B (1). Therefore, the input of C to an AND gate with B is not needed (1), nor is
the intermediate OR gate needed (1). The truth table shows that the only other 1 output is found
when A = 1 and B = 1. All that is needed, therefore, is an AND gate for A and B inputs linking in to an
OR gate with the C input (1). (max 2)
2 a A straightforward learning question with the answer in the coursebook. (1 for each row)
b i Team wins both (1); team wins one loses one (1); team has highest total score (1).
ii Winner IF A OR (B AND C) (1 for each correct part, max 3). Note that ‘Winner IF’ is not needed for
full marks.
iii (1 for each gate, 1 for each pair of inputs)

© Cambridge University Press 2019


3 a i (1 per column)

Inputs Output
A B C F1
0 0 0 1
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 0

ii (1 for each gate and 1 for the inputs)

b (1 for each gate, 3 for the inputs)

4 This is Question 6 in 9608 Paper 13 June 2015. At the time of writing the published mark scheme is available
on the Cambridge International School Support Hub (requires registration). The Examiners Report for the June
2015 series is also available there and this may contain comments specific to this question.
The following are what the author of this chapter in the Teacher Resource would suggest as reasonable
answers with alternatives suggested where appropriate.

© Cambridge University Press 2019


a Because there are two alternative statements, the final gate must be an OR gate.

b
Workspace
A B C P Q X
0 0 0 1 0 1
0 0 1 1 0 1
0 1 0 0 1 1
0 1 1 0 0 0
1 0 0 1 0 1
1 0 1 1 0 1
1 1 0 1 1 1
1 1 1 1 0 1
In the workspace the values could be calculated for positions P and Q, which are sensibly chosen and added
to the original circuit diagram as shown here.
c This could be answered with Boolean algebra or with phrases using ‘is’, but the best approach is as
illustrated here. The answer should be created in steps starting from the top left of the diagram and using
brackets along the way as shown by:
(NOT A AND B)
(NOT B OR C)
((NOT A AND B) OR (NOT B OR C))
((NOT A AND B) OR (NOT B OR C)) AND NOT C
Cambridge International AS & A Level Computer Science 9608 paper 13 Q6 June 2015
5 This is Question 1 in 9608 Paper 12 November 2016. At the time of writing the published mark scheme is
available on the Cambridge International School Support Hub (requires registration). The Examiners Report
for the November 2016 series is also available there and this may contain comments specific to this question.
The following are what the author of this chapter in the Teacher Resource would suggest as reasonable
answers with alternatives suggested where appropriate.

© Cambridge University Press 2019


a Because the expression has two parts linked with OR, the final gate must be an OR gate.

b Workspace
B S P First part Second part X
0 0 0 1 0 1
0 0 1 1 0 1
0 1 0 0 1 1
0 1 1 0 0 0
1 0 0 0 0 0
1 0 1 0 0 0
1 1 0 0 1 1
1 1 1 0 0 0

This shows how the workspace could be used to provide the results of the first part and the second part of
the expression. Then these could be used in applying the OR operation to get the value for X.
Cambridge International AS & A Level Computer Science 9608 paper 12 Q1 November 2016

© Cambridge University Press 2019


Worksheet 4.1: for testing basic understanding
1

This question concerns definitions that learners need to be familiar with, although note that relational
operator has not been formally defined in this chapter. Some learners may have noted that a logic
expression has a value TRUE or FALSE, but that was not the answer required here. Finally, note that a logic
proposition is expressed using a relational operator once it is expressed formally.
2

3 XOR operator
NOR operator
A B X A B X
0 0 1 0 0 0
0 1 0 0 1 1
1 0 0 1 0 1
1 1 0 1 1 0

For NOR or NAND, it is best if learners start with OR or AND then apply the NOT operator, which switches 0 to
1 and 1 to 0. Learners need to remember what XOR stands for: exclusive OR, which excludes the case when
both A and B are true.

© Cambridge University Press 2019


4

Learners need to be able to remember these. Those that begin with N all have a small circle on the exit side.
Learners may find it useful to remind them that AND has the D shape.
5
A B M N X

0 0 0 0 0

0 1 1 1 0

1 0 1 1 1

1 1 0 1 1

The use of intermediate points is a standard technique, and learners may be required to choose these
themselves. Learners should place one after each logic gate and then work left to right. In this example,
column M follows directly from the A and B input to the XOR gate. For column N, take the combination of B
values with those in column M and apply the OR logic. Finally, for X, take the combination of the column N
values with A values and apply the AND logic.
6 a Travel at the weekend is by car.
Travel on a weekday is by train for up to 300 km otherwise it is by air.
b Car_travel = TRUE IF day = weekend
Train_travel = TRUE IF day = weekday AND distance ≤ 300
Air_travel = TRUE IF day = weekday AND distance > 300
c Begin by using X = Car_travel, Y = Train_travel and Z = Air_travel, which is sensible because each one is an
outcome.

© Cambridge University Press 2019


There are different approaches but the simplest one is to assign A to represent weekday and B to
represent distance ≤ 300. This gives:
Y = A AND B
Z = A AND NOT B
(Note that for the car travel option the expression could be written as X = NOT A.)
It must be understood that all of X, Y, Z, A and B are Boolean, each having a value that might be given as
TRUE or FALSE or as 1 or 0.
d For Z the truth table is:
A B Z
0 0 0
0 1 0
1 0 1
1 1 0

For Y, the standard AND gate truth table applies (and the circuit for that is simple).
e

7 a i A represents regular customer; B represents order over $100; C represents special promotion or,
alternatively, not the first one in the month.
ii Special double discount applied.
iii One answer could be: A AND ((B AND C) OR (B AND D))
where D represents not the first order in month.
Another option is:
A AND ((B AND C) OR (B AND NOT D))
where D represents the first order in the month.
b X = A AND ((B > 100 AND C) OR (B > 100 AND D > 1))
Now X represents special double discount applied; A represents regular customer; B represents order
value; C represents special promotion; and D represents the number of orders already processed.
8 a X = (NOT A AND B) OR (A AND NOT B)
b Exclusive OR (XOR)

© Cambridge University Press 2019


Worksheet 4.2: more challenging questions
1 A B X
0 0 0
0 1 1
1 0 1
1 1 1

Note that the top input into the AND gate is 1 whatever the value for A. The circuit in this question has built-
in redundancy. The overall logic is simply that of the OR gate. Noticing this gives a direct route to the truth
table. Otherwise the truth table can be worked out the long way using intermediate points.

2 a NOT A AND NOT B AND NOT C


NOT A AND NOT B AND C
A AND B AND NOT C
A AND B AND C
b There are two pairs here. In a pair, the only change is NOT C into C. This means that the C input does not
affect the output.
The combined expression is, therefore:
(NOT A AND NOT B) OR (A AND B)
c

© Cambridge University Press 2019

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