17

Input Filter Design

17.1 Introduction
17.1.1 Conducted EMI

It is nearly always required that a filter be added at the power input of a switching converter. By
attenuating the switching harmonics that are present in the converter input current waveform, the
input filter allows compliance with regulations that limit conducted electromagnetic interference
(EMI). The input filter can also protect the converter and its load from transients that in the input
voltage vg (t), thereby improving the system reliability.
A simple buck converter example is illustrated in Fig. 17.1. The converter injects the pulsat-
ing current ig (t) of Fig. 17.1b into the power source vg (t). The Fourier series of ig (t) contains
harmonics at multiples of the switching frequency f s , as follows:
∞
2I
ig (t) = DI + sin(kπD) cos(kωt) (17.1)
k=1
kπ

In practice, the magnitudes of the higher-order harmonics can also be significantly affected by
the current spike caused by diode reverse recovery, and also by the finite slopes of the switching
transitions. The large high-frequency current harmonics of ig (t) can interfere with television and
radio reception, and can disrupt the operation of nearby electronic equipment. In consequence,
regulations and standards exist that limit the amplitudes of the harmonic currents injected by a

(a) (b)
ig 1 i L
ig(t)
+ i i
2
vg(t) + C v R

0
0
0 DTs Ts t

Fig. 17.1 Buck converter example: (a) circuit of power stage; (b) pulsating input current waveform

© Springer Nature Switzerland AG 2020 675

R. W. Erickson, D. Maksimović, Fundamentals of Power Electronics,
https://doi.org/10.1007/978-3-030-43881-4_17
676 17 Input Filter Design

(a) iin Lf ig 1 L
i
+
2
vg(t) + Cf C v R

Input filter

(b) ig(t)

iin(t)

0
0
0 DTs Ts t

Fig. 17.2 Addition of a simple L–C low-pass filter to the power input terminals of the buck converter:
(a) circuit; (b) input current waveforms

switching converter into its power source [143–150]. As an example, if the dc inductor current
i of Fig. 17.2 has a magnitude of several Amperes, then the fundamental component (n = 1) has
an rms amplitude in the vicinity of one Ampere. Regulations may require attenuation of this
current to a value typically in the range 10 μA to 100 μA.
To meet limits on conducted EMI, it is necessary to add an input filter to the converter.
Figure 17.2 illustrates a simple single-section L–C low-pass filter, added to the input of the
converter of Fig. 17.1. This filter attenuates the current harmonics produced by the switching
converter, and thereby smooths the current waveform drawn from the power source. If the filter
has transfer function H(s) = iin /ig , then the input current Fourier series becomes
∞
2I
iin (t) = H(0)DI + H(k jω) sin(kπD) cos(kωt + ∠H(k jω)) (17.2)
k=1
kπ
In other words, the amplitude of each current harmonic at angular frequency kω is attenuated
by the filter transfer function at the harmonic frequency, H(k jω). Typical requirements effec-
tively limit the current harmonics to have amplitudes less than 100 μA, and hence input filters
are often required to attenuate the current amplitudes by 80 dB or more.
To improve the reliability of the system, input filters are sometimes required to operate nor-
mally when transients or periodic disturbances are applied to the power input. Such conducted
susceptibility specifications force the designer to damp the input filter resonances, so that input
disturbances do not excite excessive currents or voltages within the filter or converter.

17.1.2 The Input Filter Design Problem

The situation faced by the design engineer is typically as follows. A switching regulator has
been designed, which meets performance specifications. The regulator was properly designed
 17.1 Introduction 677

Fig. 17.3 Small-signal equivalent circuit models of the buck converter: (a) basic converter model, (b)
with addition of input filter

as discussed in Chap. 9, using a small-signal model of the converter power stage such as the
equivalent circuit of Fig. 17.3a. In consequence, the transient response is well damped and suffi-
ciently fast, with adequate phase margin at all expected operating points. The output impedance
is sufficiently small over a wide frequency range. The line-to-output transfer function Gvg (s), or
audiosusceptibility, is sufficiently small, so that the output voltage remains regulated in spite of
variations in v̂g (t).
Having developed a good design that meets the above goals regarding dynamic response,
the designer then addresses the problem of conducted EMI. A low-pass filter having attenua-
tion sufficient to meet conducted EMI specifications is constructed and added to the converter
input. A new problem then arises: the input filter changes the dynamics of the converter. The
transient response is modified, and the control system may even become unstable. The output
impedance may become large over some frequency range, possibly exhibiting resonances. The
audiosusceptibility may be degraded.
The problem is that the input filter affects the dynamics of the converter, often in a man-
ner that degrades regulator performance. For example, when a single-section L–C input filter is
added to a buck converter as in Fig. 17.2a, the small-signal equivalent circuit model is modified
as shown in Fig. 17.3b. The input filter elements affect all transfer functions of the converter, in-
cluding the control-to-output transfer function Gvd (s), the line-to-output transfer function Gvg (s),
and the converter output impedance Zout (s). Moreover, the influence of the input filter on these
transfer functions can be quite severe.
678 17 Input Filter Design

40 dBV
|| Gvd || Gvd
|| Gvd ||
30 dBV

20 dBV

10 dBV
Gvd
0 dBV 0

100 Hz 1 kHz 10 kHz

f

Fig. 17.4 Control-to-output transfer functions predicted by the equivalent circuit models of Fig. 17.3.
Dashed lines: without input filter (Fig. 17.3a). Solid lines: with input filter (Fig. 17.3b)

As an illustration, let us examine how the control-to-output transfer function Gvd (s) of the
buck converter of Fig. 17.1 is altered when a simple L–C input filter is added as in Fig. 17.2. For
this example, the element values are chosen to be: D = 0.5, L = 100 μH, C = 100 μF, R =
3 Ω, L f = 330 μH, C f = 470 μF. Figure 17.4 contains the Bode plot of the magnitude and phase
of the control-to-output transfer function Gvd (s). The dashed lines are the magnitude and phase
before the input filter was added, generated by solution of the model of Fig. 17.3a. The complex
poles of the converter output filter cause the phase to approach −180◦ at high frequency. Usually,
this is the model used to design the regulator feedback loop and to evaluate the phase margin
(see Chap. 9). The solid lines of Fig. 17.4 show the magnitude and phase after addition of the
input filter, generated by solution of the model of Fig. 17.3b. The magnitude exhibits a “glitch”
at the resonant frequency of the input filter, and an additional −360◦ of phase shift is introduced
into the phase. It can be shown that Gvd (s) now contains an additional complex pole pair and
a complex right half-plane zero pair, associated with the input filter dynamics. If the crossover
frequency of the regulator feedback loop is near to or greater than the resonant frequency of the
input filter, then the loop phase margin will become negative and instability will result. Such
behavior is typical; consequently, input filters are notorious for destabilizing switching regulator
systems.
This chapter shows how to mitigate the stability problem, by introducing damping into the
input filter and by designing the input filter such that its output impedance is sufficiently small
[69, 151–162]. The result of these measures is that the effect of the input filter on the control-to-
output transfer function becomes negligible, and hence the converter dynamics are much better
behaved. Although analysis of the fourth-order system of Fig. 17.3b is potentially quite complex,
the approach used here simplifies the problem through use of impedance inequalities involving
the converter input impedance and the filter output impedance [151, 152]. These inequalities are
based on Middlebrook’s Extra Element Theorem of Sect. 16.1. This approach allows the engi-
 17.2 Effect of an Input Filter on Converter Transfer Functions 679

neer to gain the insight needed to effectively design the input filter. Optimization of the damping
networks of input filters, design of multiple-section filters, and the exact stability criterion, are
also discussed.

17.2 Effect of an Input Filter on Converter Transfer Functions

17.2.1 Modified Transfer Functions

The control-to-output transfer function Gvd (s) is defined as follows:


v̂(s) 
Gvd (s) =  (17.3)
d̂(s) v̂ (s)=0
g

The control-to-output transfer functions of basic CCM converters with no input filters are listed
in Sect. 8.2.2.

Hi(s) He(s)
e(s)d (s)
1 : M(D)
+

Lf +
Le

vg(s) + Cf j(s)d (s) Zei C v(s) R

Input Filter Canonical Model

Fig. 17.5 Addition of an input filter to the canonical model of a switching converter

Addition of an input filter to a switching regulator leads to the system illustrated in Fig. 17.5.
In Fig. 17.6, the input filter is represented by its Thevenin-equivalent circuit, with Hi (s) equal
to the unloaded transfer function of the filter, and Zo equal to the output impedance of the input
filter. To determine the control-to-output transfer function in the presence of the input filter,
we set v̂g (s) to zero and solve for v̂(s)/d̂(s) according to Eq. (17.3). The input filter can then be
represented simply by its output impedance Zo (s) as illustrated in Fig. 17.7. Thus, the input filter
can be treated as an extra element having impedance Zo (s), and the Extra Element Theorem of
Chap. 16.1 can be employed to determine how addition of the input filter modifies the control-
to-output transfer function. Specifically, the modified control-to-output transfer function can be
expressed as follows [151]:


Z (s)
⎛  ⎞ 1+ o
⎜⎜  ⎟⎟⎟ ZN (s)
Gvd (s) = ⎜⎜⎝⎜Gvd (s) ⎟⎟
 (17.4)
Z (s)=0 ⎠ Zo (s)
o
1+
ZD (s)
680 17 Input Filter Design

Fig. 17.6 Use of Thevenin-equivalent model for the input filter

Fig. 17.7 Finding the control-to-output transfer function Gvd (s)

where 
Gvd (s) (17.5)
Zo (s)=0

is the original control-to-output transfer function with no input filter.

Figure 17.8 illustrates determination of ZN (s). In the presence of d̂, a current îtest is injected
at the input port of the converter, and the d̂ and îtest inputs are adjusted such that the output v̂ is
nulled. Under these conditions, we find v̂test and
v̂test 
ZN =  0 (17.6)
îtest v̂→null

When the output v̂ is nulled, then no current flows through the load R, capacitor C, or inductor
Le . Hence there is no voltage across these elements, and the voltages across the transformer
windings are zero. With no secondary winding current, the transformer primary winding current
is zero as well. Hence we can find that

v̂test = −e(s)d̂ (17.7)

îtest = j(s)d̂ (17.8)
 17.2 Effect of an Input Filter on Converter Transfer Functions 681

Fig. 17.8 Finding ZN (s)

Therefore,
−e(s)d̂ e(s)
ZN = =− (17.9)
j(s)d̂ j(s)
This is a general result, expressed in terms of the canonical model parameters e(s) and j(s). The
impedance ZN is the input port impedance of the converter, under the conditions that d̂ and îtest
are varied as necessary to null the output voltage v̂. Generally, ZN is negative.

Fig. 17.9 Finding ZD (s)

Figure 17.9 illustrates determination of ZD (s). The input d̂ is set to zero, and current îtest is
injected at the input port of the converter. The quantity ZD is given by

v̂test 
ZD =  (17.10)
îtest d̂=0

Setting d̂ to zero causes the e(s)d̂ and j(s)d̂ sources to be zero. The driving-point impedance
at the injection point is equal to the canonical model filter impedance Zei , reflected through the
transformer turns ratio:
Zei (s)
ZD (s) = (17.11)
M2
682 17 Input Filter Design

This is a general result, expressed in terms of the canonical model parameters Zei and M. The
impedance ZD is the input port impedance of the converter, under open-loop conditions with
d̂ = 0.
A similar analysis shows that the converter open-loop output impedance can be expressed
in the form

Zo (s)
  1 + Z (s)
Zout (s) = Zout (s)
e

 (17.12)
Zo (s)=0 Zo (s)
1+
ZD (s)
where 
Zout (s) (17.13)
Zo (s)=0

is the original converter output impedance with no input filter. The quantity Ze (s) is equal to the
converter input impedance Zi (s) under the conditions that the converter output is shorted:

Ze = Zi  (17.14)
v̂=0

The quantity ZD (s) is again the open-loop driving-point impedance at the power input port of
the open-loop converter, given by Eq. (17.11).

17.2.2 Discussion

Equation (17.4) relates the power stage control-to-output transfer function Gvd (s) to the output
impedance Zo (s) of the input filter, and also to the quantities ZN (s) and ZD (s) measured at
the power input port of the converter. The quantity ZD (s) coincides with the open-loop input
impedance of the converter.
As described above, the quantity ZN (s) is equal to the input port impedance of the converter
power stage, under the conditions that d̂(s) is varied as necessary to null v̂(s) to zero. This is,
in fact, the function performed by an ideal controller: it varies the duty cycle as necessary to
maintain zero error of the output voltage. Therefore, ZN (s) coincides with the impedance that
would be measured at the converter power input terminals, if an ideal feedback loop perfectly
regulated the converter output voltage. Of course, Eq. (17.4) is valid in general, regardless of
whether a control system is present.
Figure 17.10 illustrates the large-signal dc behavior of a feedback loop that perfectly reg-
ulates the converter output voltage. Regardless of the applied input voltage vg (t), the output
voltage is maintained equal to the desired value V. The load power is therefore constant, and
equal to Pload = V 2 /R. In the idealized case of a lossless converter, the power flowing into the
converter input terminals will also be equal to Pload , regardless of the value of vg (t). Hence, the
power input terminal of the converter obeys the equation

vg (t)T s ig (t)T s = Pload (17.15)

This characteristic is illustrated in Fig. 17.10b, and is represented in Fig. 17.10a by the depen-
dent power sink symbol. The properties of power sources and power sinks are discussed in
detail in Chap. 15.
Figure 17.10b also illustrates linearization of the constant input power characteristic, about
a quiescent operating point. The resulting line has negative slope; therefore, the incremental
 17.2 Effect of an Input Filter on Converter Transfer Functions 683

(a) Closed-loop
voltage regulator
i g(t) Ts

vg(t) + Pload + V
Ts R

(b) vg(t) i g(t) = Pload

i g(t) Ts
Ts Ts

Quiescent
operating
point
Ig M2
Ig slope
Vg R

Vg vg(t) Ts

Fig. 17.10 Power input port characteristics of an ideal switching voltage regulator: (a) equivalent circuit
model, including dependent power sink, (b) constant power characteristic of input port

(small signal) input resistance of the ideal voltage regulator is negative. For example, increasing
the voltage vg (t)T s causes the current ig (t)T s to decrease, such that the power remains constant.
This incremental resistance has the value [151, 156]:
R
− (17.16)
M2
where R is the output load resistance, and M is the conversion ratio V/Vg . For the buck, boost,
buck–boost, and other converters, the dc asymptote of ZN (s) coincides with the negative in-
cremental resistance given by Eq. (17.16). In a closed-loop switching regulator that regulates
its output voltage well, the negative incremental resistance (17.16) is the dc asymptote of the
regulator closed-loop input impedance Zi (s).
Loading of an L–C input filter and its output impedance Zo (s) by the negative incremental
resistance of Eq. (17.16) can lead to instability. Indeed, the (v̂/v̂g ) transfer function of the closed-
loop regulator with input filter includes the voltage divider term
Zi (s)
(17.17)
Zo (s) + Zi (s)
684 17 Input Filter Design

If the regulator input impedance Zi (s) is well approximated by Eq. (17.16) and the input filter is
an undamped L–C filter, then the divider ratio (17.17) contains RHP poles.
Hence, when an undamped or lightly damped input filter is connected to the regulator input
port, the input filter can interact with the negative resistance characteristic of Zi (s) to form a
negative resistance oscillator that can be viewed as the origin of input filter instabilities. It
should be noted that the regulator closed-loop input impedance Zi (s) is also affected by the
power stage reactive elements and the loop gain, and reverts to a positive impedance at high
frequencies. These additional dynamics also impact the stability of the system. A more detailed
stability analysis that accounts for the dynamics of Zi (s) is explained in Sect. 17.5.

17.2.3 Impedance Inequalities

Expressions for ZN (s), ZD (s), and Ze (s) for the basic buck, boost, and buck–boost converters are
listed in Table 17.1.
Equation (17.4) reveals that addition of the input filter causes the control-to-output transfer
function Gvd (s) to be modified by the factor


Zo (s)
1+
ZN (s)

 (17.18)
Zo (s)
1+
ZD (s)

called the correction factor. When the following inequalities are satisfied,

Zo   ZN , and (17.19)

Zo   ZD 

then the correction factor has a magnitude of approximately unity, and the input filter does not
substantially alter the control-to-output transfer function [151, 152]. These inequalities limit
the maximum allowable output impedance of the input filter, and constitute useful filter design
criteria. One can sketch the Bode plots of ZN ( jω) and ZD ( jω), and compare with the Bode
plot of Zo ( jω). This allows the engineer to gain the insight necessary to design an input filter
that satisfies inequalities (17.19).

Table 17.1 Input filter design criteria for basic converters

Converter ZN (s) ZD (s) Ze (s)

 L
R 1 + s R + s LC
2
R sL
Buck − 2
D D2 (1 + sRC) D2
L LC
 sL 1 + s 2 + s2 2
Boost −D 2 R 1 − 2 D 2 R D R D sL
D R  (1 + sRC)
L 2 LC
D 2 R  sDL 2
D R 1 + s 2
D R
+ s
D 2 sL
Buck–boost − 1 − 2
D 2 D R D2 (1 + sRC) D2
 17.3 Buck Converter Example 685

The buck converter example of the next section illustrates how violation of inequali-
ties (17.19) not only causes the transfer function Gvd (s) to be significantly changed, but also
can introduce resonant poles and RHP zeroes that can seriously degrade the converter loop gain
and its phase margin.
According to Eq. (17.12), the converter open-loop output impedance Zout (s) is not substan-
tially affected by the input filter when the following inequalities are satisfied:
Zo   Ze , and (17.20)
Zo   ZD 
An input filter design that satisfies inequalities (17.19) but not (17.20) can be expected to leave
the loop gain unchanged, but to modify the open-loop converter output impedance. This would
lead to a modified closed-loop output impedance as well.
Similar impedance inequalities can be derived for the case of current-programmed convert-
ers [154, 155], or converters operating in the discontinuous conduction mode. Feedforward of
the converter input voltage was suggested in [157]. Analysis of the effect of an input filter on a
current-programmed converter is discussed in Sect. 18.4.4.

17.3 Buck Converter Example

Let us again consider the example of a simple buck converter with L–C input filter, as illustrated
in Fig. 17.11a. Upon replacing the converter with its small-signal model, we obtain the equiv-
alent circuit of Fig. 17.11b. Let us evaluate Eq. (17.4) for this example, to find how the input
filter modifies the control-to-output transfer function of the converter.

(a) Input filter Converter

Lf 1 L i
330 μH 100 μH +

Vg 2 R
+ Cf C
v
470 μF 100 μF 3
30 V

D = 0.5

(b) Input filter Converter model

Lf 1:D ^i L
+

330 μH 100 μH +
Vg d^
Cf C R
^v +
g I d^ ^v
470 μF 100 μF 3
Zo(s) Zi(s)

d^

Fig. 17.11 Buck converter example: (a) converter circuit, (b) small-signal model
686 17 Input Filter Design

17.3.1 Effect of Undamped Input Filter

The quantities ZN (s) and ZD (s) can be read from Table 17.1, or can be derived from the converter
model of Fig. 17.11b using Eqs. (17.6) and (17.10) as described in Sect. 17.2. Figure 17.12a
illustrates determination of ZD based on the buck converter model Fig. 17.11b. Upon setting
d̂(s) to zero, the converter small-signal model reduces to the circuit of Fig. 17.12a. It can be
seen that ZD (s) is equal to the input impedance of the R–L–C filter, divided by the square of the
turns ratio:
 1 
1
ZD (s) = 2 sL + R  (17.21)
D sC
Construction of asymptotes for this impedance is treated in Sect. 8.4, with the results for the nu-
merical values of this example given in Fig. 17.13. The load resistance dominates the impedance
at low frequency, leading to a dc asymptote of R/D2 = 12 Ω. For the high-Q case shown,
ZD ( jω) follows the output capacitor asymptote, reflected through the square of the effective
turns ratio, at intermediate frequencies. A series resonance occurs at the output filter resonant
frequency f0 , given by
1
f0 = √ (17.22)
2π LC
For the element values listed in Fig. 17.11a, the resonant frequency is f0 = 1.6 kHz. The values
of the asymptotes at the resonant frequency f0 are given by the characteristic impedance R0 ,
referred to the transformer primary:

Fig. 17.12 Determination of the quantities ZN (s) and ZD (s) for the circuit of Fig. 17.11b; (a) determina-
tion of ZD (s), (b) determination of ZN (s)
 17.3 Buck Converter Example 687

Fig. 17.13 Construction of ZN ( jω) and ZD ( jω), buck converter example


R0 1 L
= 2 (17.23)
D2 D C
For the element values given in Fig. 17.11a, this expression is equal to 4 Ω. The Q-factor is
given by 
R C
Q= =R (17.24)
R0 L
This expression yields a numerical value of Q = 3. The value of ZD ( jω) at the resonant fre-
quency 1.6 kHz is therefore equal to (4 Ω)/(3) = 1.33 Ω. At high frequency, ZD ( jω) follows
the reflected inductor asymptote.
Figure 17.12b illustrates determination of ZN based on the buck converter model in
Fig. 17.11b. This impedance is equal to the converter input impedance under the conditions that
d̂(s) is varied to maintain the output voltage v̂(s) at zero. Figure 17.12b illustrates the derivation
of an expression for ZN (s). A test current source îtest (s) is injected at the converter input port.
The impedance ZN (s) can be viewed as the transfer function from îtest (s) to v̂test (s):

v̂test (s) 
ZN (s) =  (17.25)
îtest (s) v̂−−→ 0
null

−−→ 0 greatly simplifies analysis of the circuit of Fig. 17.12b. Since the
The null condition v̂(s)null
voltage v̂(s) is zero, the currents through the capacitor and load impedances are also zero. This
further implies that the inductor current î(s) and transformer winding currents are zero, and
hence the voltage across the inductor is also zero. Finally, the voltage v̂ s (s), equal to the output
voltage plus the inductor voltage, is zero.
Since the currents in the windings of the transformer model are zero, the current itest (s) is
equal to the independent source current I d̂(s):

îtest (s) = I d̂(s) (17.26)

Because v̂ s (s) is equal to zero, the voltage applied to the secondary of the transformer model is
equal to the independent source voltage −Vg d̂(s). Upon dividing by the turns ratio D, we obtain
v̂test (s):
Vg d̂(s)
v̂test (s) = − (17.27)
D
688 17 Input Filter Design

Insertion of Eqs. (17.26) and (17.27) into Eq. (17.25) leads to the following result:
⎛ ⎞
⎜⎜⎜ Vg d̂(s) ⎟⎟⎟
⎜⎝− ⎟⎠
D R
ZN (s) = =− 2 (17.28)
(I d̂(s)) D

The steady-state relationship I = DV g /R has been used to simplify the above result. This equa-
tion coincides with the expression listed in Table 17.1. The Bode diagram of ZN ( jω) is con-
structed in Fig. 17.13; this plot coincides with the dc asymptote of ZD ( jω). The impedance
ZN is negative, and has magnitude equal to the reflected load resistance.

Lf
Fig. 17.14 Determination of the filter output
impedance Zo (s) Cf

Zo(s)

Next, let us construct the Bode diagram of the filter output impedance Zo (s). When the inde-
pendent source v̂g (s) is set to zero, the input filter network reduces to the circuit of Fig. 17.14. It
can be seen that Zo (s) is given by the parallel combination of the inductor L f and the capacitor
Cf:
 1
Zo (s) = sL f  (17.29)
sC f
Construction of the Bode diagram of this parallel resonant circuit is discussed in Sect. 8.3.4.
As illustrated in Fig. 17.15, the magnitude Zo ( jω) is dominated by the inductor impedance at
low frequency, and by the capacitor impedance at high frequency. The inductor and capacitor
asymptotes intersect at the filter resonant frequency:

Fig. 17.15 Magnitude plot of the output impedance of the input filter of Fig. 17.14. Since the filter is not
damped, the Q-factor is very large
 17.3 Buck Converter Example 689

1
ff =  (17.30)
2π L f C f

For the given values, the input filter resonant frequency is f f = 400 Hz. This filter has charac-
teristic impedance 
Lf
R0 f = (17.31)
Cf
equal to 0.84 Ω. Since the input filter is undamped, its Q-factor is ideally infinite. In practice,
parasitic elements such as inductor loss and capacitor equivalent series resistance limit the value
of Q f . Nonetheless, the impedance Zo ( jω) is very large in the vicinity of the filter resonant
frequency f f .
The Bode plot of the filter output impedance Zo ( jω) is overlaid on the ZN ( jω) and
ZD ( jω) plots in Fig. 17.16, for the element values listed in Fig. 17.11a. We can now determine
whether the impedance inequalities (17.19) are satisfied. Note the design-oriented nature of
Fig. 17.16: since analytical expressions are given for each impedance asymptote, the designer
can easily adjust the component values to satisfy Eq. (17.19). For example, the values of L f and
C f should be chosen to ensure that the asymptotes of Zo ( jω) lie below the worst-case value
of R/D2 , as well as the other asymptotes of ZD ( jω).
It should also be apparent that it is a bad idea to choose the input and output filter reso-
nant frequencies f0 and f f to be equal, because it would then be more difficult to satisfy the
inequalities of Eq. (17.19). Instead, the resonant frequencies f0 and f f should be well separated
in value.
Since the input filter is undamped, it is impossible to satisfy the impedance inequali-
ties (17.19) in the vicinity of the input filter resonant frequency f f . Regardless of the choice
of element values, the input filter changes the control-to-output transfer function Gvd (s) in
the vicinity of frequency f f . Figures 17.17 and 17.18 illustrate the resulting correction factor
[Eq. (17.18)] and the modified control-to-output transfer function [Eq. (17.4)], respectively. At

40 dB

f1 = 530 Hz
30 dB Qf L
fo = 1.59 kHz D2 || ZD ||
12
20 dB || ZN ||
1
D 2C R0 /D 2
10 dB
|| Zo || Q=3
0 dB R0f
Lf
1
ff = 400 Hz Cf

100 Hz 1 kHz 10 kHz

f

Fig. 17.16 Impedance design criteria ZN ( jω) and ZD ( jω) from Fig. 17.13, with the filter output
impedance Zo ( jω) superimposed. The design criteria of Eq. (17.19) are not satisfied at the input filter
resonance
690 17 Input Filter Design

10 dB
Zo
1+
ZN 0 dB
Z
1+ o
ZD

0
Zo
1+
ZN
Z
1+ o
ZD

100 Hz 1 kHz 10 kHz

f

Fig. 17.17 Magnitude (upper plot) and phase (lower plot) of the correction factor, Eq. (17.18), for the
buck converter example of Fig. 17.11

40 dB
|| Gvd || Gvd
|| Gvd ||
30 dB

20 dB

10 dB
Gvd
0 dB 0

100 Hz 1 kHz 10 kHz

f

Fig. 17.18 Effect of undamped input filter on the control-to-output transfer function of the buck converter
example. Dashed lines: without input filter. Solid lines: with undamped input filter

frequencies well below the input filter resonant frequency, impedance inequalities (17.19) are
well satisfied. The correction factor tends to the value 1∠0◦ , and the control-to-output trans-
fer function Gvd (s) is essentially unchanged. In the vicinity of the resonant frequency f f , the
correction factor contains a pair of complex poles, and also a pair of right half-plane complex
zeroes. These cause a “glitch” in the magnitude plot of the correction factor, and they contribute
360◦ of lag to the phase of the correction factor. The glitch and its phase lag can be seen in the
Bode plot of Gvd (s). At high frequency, the correction factor tends to a value of approximately
1∠−360◦ ; consequently, the high-frequency magnitude of Gvd is unchanged. However, when the
 17.3 Buck Converter Example 691

–360◦ contributed by the correction factor is added to the −180◦ contributed at high frequency
by the two poles of the original Gvd (s), a high-frequency phase asymptote of −540◦ is obtained.
If the crossover frequency of the converter feedback loop is placed near to or greater than the
input filter resonant frequency f f , then a negative phase margin is inevitable. This explains why
addition of an input filter often leads to instabilities and oscillations in switching regulators.

17.3.2 Damping the Input Filter

Let us damp the resonance of the input filter, so that impedance inequalities (17.19) are satisfied
at all frequencies.

(a) (b) Rf

Lf

Lf

Cf Rf Cf

Fig. 17.19 Two attempts to damp the input filter: (a) addition of damping resistance R f across C f , (b)
addition of damping resistance R f in parallel with L f

One approach to damping the filter is to add resistor R f in parallel with capacitor C f as illus-
trated in Fig. 17.19a. The output impedance of this network is identical to the parallel resonant
impedance analyzed in Sect. 8.3.4. The maximum value of the output impedance occurs at the
resonant frequency f f , and is equal in value to the resistance R f . Hence, to satisfy impedance
inequalities (17.19), we should choose R f to be much less than the ZN ( jω) and ZD ( jω)
asymptotes. The condition R f  ZN ( jω) can be expressed as:

R
Rf  (17.32)
D2
Unfortunately, this raises a new problem: the power dissipation in R f . The dc input voltage Vg is
applied across resistor R f , and therefore R f dissipates power equal to Vg2 /R f . Equation (17.32)
implies that this power loss is greater than the load power! Therefore, the circuit of Fig. 17.19a
is not a practical solution.
One solution to the power loss problem is to place R f in parallel with L f as illustrated in
Fig. 17.19b. The value of R f in Fig. 17.19b is also chosen according to Eq. (17.32). Since the dc
voltage across inductor L f is zero, there is now no dc power loss in resistor R f . The problem with
this circuit is that its transfer function contains a high-frequency zero. Addition of R f degrades
the slope of the high-frequency asymptote, from −40 dB/decade to −20 dB/decade. The circuit
of Fig. 17.19b is effectively a single-pole R–C low-pass filter, with no attenuation provided by
inductor L f .
692 17 Input Filter Design

One practical solution is illustrated in Fig. 17.20 [152]. Dc blocking capacitor Cb is added
in series with resistor R f . Since no dc current can flow through resistor R f , its dc power loss is
eliminated. The value of Cb is chosen to be very large such that, at the filter resonant frequency
f f , the impedance of the R f -Cb branch is dominated by resistor R f . When Cb is sufficiently
large, then the output impedance of this network reduces to the output impedances of the filters
of Fig. 17.19. The impedance asymptotes for the case of large Cb are illustrated in Fig. 17.20b.
The low-frequency asymptotes of ZN ( jω) and ZD ( jω) in Fig. 17.13 are equal to R/D2 =
12 Ω. The choice R f = 1 Ω therefore satisfies impedance inequalities (17.19) very well. The
choice Cb = 4700 μF leads to 1/2π f f Cb = 0.084 Ω, which is much smaller than R f . The re-
sulting magnitude ||Zo ( jω)|| is compared with ZN ( jω) and ZD ( jω) in Fig. 17.21. It can be
seen that the chosen values of R f and Cb lead to adequate damping, and impedance inequali-
ties (17.19) are now well satisfied.
Figure 17.22 illustrates how addition of the damped input filter modifies the magnitude and
phase of the control-to-output transfer function. There is now very little change in Gvd (s), and
we would expect that the performance of the converter feedback loop is unaffected by the input
filter.

(a) Lf (b)
Rf

Rf R0f
Cf Lf ff
1
Cb Cf

Fig. 17.20 A practical method to damping the input filter, including damping resistance R f and dc block-
ing capacitor Cb : (a) circuit, (b) output impedance asymptotes

40 dB

30 dB
f1 = 530 Hz L
fo = 1.59 kHz D2 || ZD ||
12
20 dB || ZN ||
1
R0 /D 2
10 dB D 2C
Q=3
|| Zo ||
0 dB Rf = 1 R0f
Lf 1
ff = 400 Hz Cf

100 Hz 1 kHz 10 kHz

f

Fig. 17.21 Impedance design criteria ZN ( jω) and ZD ( jω) from Fig. 17.13, with the damped filter
output impedance Zo ( jω) of Fig. 17.20 superimposed. The design criteria of Eq. (17.19) are well satisfied
 17.4 Design of a Damped Input Filter 693

40 dBV
|| Gvd || Gvd
|| Gvd ||
30 dBV

20 dBV

10 dBV
Gvd
0 dBV 0

100 Hz 1 kHz 10 kHz

f

Fig. 17.22 Effect of the damped input filter on the control-to-output transfer function of the buck con-
verter example. Dashed lines: without input filter. Solid lines: with damped input filter

17.4 Design of a Damped Input Filter

As illustrated by the example of the previous section, design of an input filter requires not
only that the filter impedance asymptotes satisfy impedance inequalities, but also that the filter
be adequately damped. Damping of the input filter is also necessary to prevent transients and
disturbances in vg (t) from exciting filter resonances. Other design constraints include attaining
the desired filter attenuation, and minimizing the size of the reactive elements. Although a large
number of classical filter design techniques are well known, these techniques do not address the
problems of limiting the maximum output impedance and damping filter resonances.
The value of the blocking capacitor Cb used to damp the input filter in Sect. 17.3.2 is ten
times larger than the value of C f , and hence its size and cost are of practical concern. Optimiza-
tion of an input filter design therefore includes minimization of the size of the elements used in
the damping networks.
Several practical approaches to damping the single-section L–C low-pass filter are illustrated
in Fig. 17.23 [152, 153, 158]. Figure 17.23a contains the R f –Cb damping branch considered in
the previous section. In Fig. 17.23b, the damping resistor R f is placed in parallel with the filter
inductor L f , and a high-frequency blocking inductor Lb is placed in series with R f . Inductor
Lb causes the filter transfer function to roll-off with a high-frequency slope of −40 dB/decade.
In Fig. 17.23c, the damping resistor R f is placed in series with the filter inductor L f , and the
dc current is bypassed by inductor Lb . In each case, it is desired to obtain a given amount of
damping (i.e., to cause the peak value of the filter output impedance to be no greater than a
given value that satisfies the impedance inequalities (17.19)), while minimizing the value of Cb
or Lb . This problem can be formulated in an alternate but equivalent form: for a given choice of
Cb or Lb , find the value of R f that minimizes the peak output impedance [152]. The solutions
694 17 Input Filter Design

Lf
(a)
+
Rf
v1 + Cf v2
Cb

Rf Lb
(b)
Fig. 17.23 Several practical approaches +
to damping the single-section input filter: Lf
(a) R f –Cb parallel damping, (b) R f –Lb par-
v1 + Cf v2
allel damping, (c) R f –Lb series damping

Lb
(c) Lf

+
Rf

v1 + Cf v2

to this optimization problem, for the three filter networks of Fig. 17.23, are summarized in this
section. In each case, the quantities f f and R0 f are defined by Eqs. (17.30) and (17.31).
Consider the filter of Fig. 17.23b, with fixed values of L f , C f , and Lb . Figure 17.24 contains
Bode plots of the filter output impedance Z0 ( jω) for several values of damping resistance R f .
For the limiting case R f = ∞, the circuit reduces to the original undamped filter with infinite Q f .
In the limiting case R f = 0, the filter is also undamped, but the resonant frequency is increased
because Lb becomes connected in parallel with L f . Between these two extremes, there must
exist an optimum value of R f that causes the peak filter output impedance to be minimized.
It can be shown [152, 158] that all magnitude plots must pass through a common point, and
therefore the optimum attains its peak at this point. This fact has been used to derive the design
equations of optimally damped L-C filter sections.

17.4.1 R f –C b Parallel Damping

Optimization of the filter network of Fig. 17.23a and Sect. 17.3.2 was described in [152]. The
high-frequency attenuation of this filter is not affected by the choice of Cb , and the high-
frequency asymptote is identical to that of the original undamped filter. The sole tradeoff in
design of the damping elements for this filter is in the size of the blocking capacitor Cb vs. the
damping achieved.
 17.4 Design of a Damped Input Filter 695

30 dB
Original undamped Undamped
filter (Qf = ) filter (Qf = 0)
20 dB
Suboptimal damping Suboptimal damping
(Qf = 5Qopt ) (Qf = 0.2Qopt )
10 dB

Zo Optimal damping
0 dB (Qopt = 0.93)
R0 f

-10 dB

-20 dB

-30 dB
0.1 1 10
f
fo

Fig. 17.24 Comparison of output impedance curves for optimal parallel R f –Lb damping with undamped
and several suboptimal designs. For this example, n = Lb /L = 0.516

For this filter, let us define the quantity n as the ratio of the blocking capacitance Cb to the
filter capacitance C f :
Cb
n= (17.33)
Cf
For the optimum design, the peak filter output impedance occurs at the frequency

2
fm = f f (17.34)
2+n
The value of the peak output impedance for the optimum design is
√
2(2 + n)
Zo mm = R0 f (17.35)
n
The value of damping resistance that leads to optimum damping is described by

Rf (2 + n)(4 + 3n)
Qopt = = (17.36)
R0 f 2n2 (4 + n)

The above equations allow choice of the damping values R f and Cb .

For example, let us redesign the damping network of Sect. 17.3.2, to achieve the same peak
output impedance Zo ( jω)mm = 1 Ω, while minimizing the value of the blocking capacitance
Cb . From Sect. 17.3.2, the other parameter values are R0 f = 0.84 Ω, C f = 470 μF, and L f =
330 μH. First, we solve Eq. (17.35) to find the required value of n:
696 17 Input Filter Design

20 dB
|| Zo || Undamped
10 dB
Suboptimal
damping
Cb = 4700 ∀F
0 dB Rf = 1

Optimal
damping
Cb = 1200 ∀F
Rf = 0.67

100 Hz 1 kHz 10 kHz

f

Fig. 17.25 Comparison of the output impedances of the design with optimum parallel R f –Cb damping,
the suboptimal design of Sect. 17.3.2, and the original undamped filter

⎛  ⎞
R20 f ⎜⎜⎜ 2 ⎟
n= ⎜⎜⎜1 + 1 + 4 Zo mm ⎟⎟⎟⎟⎟ (17.37)
Zo 2mm ⎝ R2 ⎠0f

Evaluation of this expression with the given numerical values leads to n = 2.5. The blocking
capacitor is therefore required to have a value of nC f = 1200 μF. This is one-quarter of the
value employed in Sect. 17.3.2. The value of R f is then found by evaluation of Eq. (17.36),
leading to 
(2 + n)(4 + 3n)
R f = R0 f = 0.67 Ω (17.38)
2n2 (4 + n)
The output impedance of this filter design is compared with the output impedances of the orig-
inal undamped filter of Sect. 17.3.1, and of the suboptimal design of Sect. 17.3.2, in Fig. 17.25.
It can be seen that the optimally damped filter does indeed achieve the desired peak output
impedance of 1 Ω, at the slightly lower peak frequency given by Eq. (17.34)
The R f –Cb parallel damping approach finds significant application in dc–dc converters.
Since a series resistor is placed in series with Cb , Cb can be realized using capacitor types
having substantial equivalent series resistance, such as electrolytic and tantalum types. How-
ever, in some applications, the R f –Lb approaches of the next subsections can lead to smaller
designs. Also, the large blocking capacitor value may be undesirable in applications having an
ac input.

17.4.2 R f –L b Parallel Damping

Figure 17.23b illustrates the placement of damping resistor R f in parallel with inductor L f . In-
ductor Lb causes the filter to exhibit a two-pole attenuation characteristic at high frequency. To
allow R f to damp the filter, inductor Lb should have an impedance magnitude that is sufficiently
smaller than R f at the filter resonant frequency f f . Optimization of this damping network is
described in [158].
 17.4 Design of a Damped Input Filter 697

With this approach, inductor Lb can be physically much smaller than L f . Since R f is typi-
cally much greater than the dc resistance of L f , essentially none of the dc current flows through
Lb . Furthermore, R f could be realized as the equivalent series resistance of Lb at the filter reso-
nant frequency f f . Hence, this is a very simple, low-cost approach to damping the input filter.
The disadvantage of this approach is the fact that the high-frequency attenuation of the
filter is degraded: the high-frequency asymptote of the filter transfer function is increased from
1/ω2 L f C f to 1/ω2 (L f ||Lb )C f . Furthermore, since the need for damping limits the maximum
value of Lb , significant loss of high-frequency attenuation is unavoidable. To compensate, the
value of L f must be increased. Therefore, a tradeoff occurs between damping and degradation
of high-frequency attenuation, as illustrated in Fig. 17.26. For example, limiting the degradation
of high-frequency
√ attenuation to 6 dB leads to an optimum peak filter output impedance ||Zo ||mm
of 6 times the original characteristic impedance R0 f . Additional damping leads to further
degradation of the high-frequency attenuation.
The optimally damped design (i.e., the choice of R f that minimizes the peak output
impedance Zo  for a given choice of Lb ) is described by the following equations:

Rf n(3 + 4n)(1 + 2n)
Qopt = = (17.39)
R0 f 2(1 + 4n)
where
Lb
n= (17.40)
Lf
The peak filter output impedance occurs at frequency

1 + 2n
fm = f f (17.41)
2n

30 dB

20 dB Degradation of HF
filter attenuation
Fig. 17.26 Zo mm
Performance attained R0 f
via optimal design procedure, par- 10 dB
allel R f –Lb circuit of Fig. 17.23b.
Optimum peak filter output
impedance Zo mm and increase
of filter high-frequency gain, vs.
n = Lb /L 0 dB

0.1 1 10
Lb
Lf
698 17 Input Filter Design

and has the value   

 Zo  = R0 f 2n(1 + 2n) (17.42)
mm
The attenuation of the filter high-frequency asymptote is degraded by the factor
Lf 1
 = 1 + (17.43)
L f Lb n

So, given an undamped L f –C f filter having corner frequency f f , and characteristic impedance
R0 f , and given a requirement for the maximum allowable output impedance ||Zo ||mm , one can
solve Eq. (17.42) for the required value of n. One can then determine the required numerical
values of Lb and R f .

17.4.3 R f –L b Series Damping

Figure 17.23c illustrates the placement of damping resistor R f in series with inductor L f . Induc-
tor Lb provides a dc bypass to avoid significant power dissipation in R f . To allow R f to damp
the filter, inductor Lb should have an impedance magnitude that is sufficiently greater than R f
at the filter resonant frequency.
Although this circuit is theoretically equivalent to the parallel damping R f –Lb case of
Sect. 17.4.2, several differences are observed in practical designs. Both inductors must carry
the full dc current, and hence both have significant size. The filter high-frequency attenuation
is not affected by the choice of Lb , and the high-frequency asymptote is identical to that of the
original undamped filter. The tradeoff in design of this filter does not involve high-frequency
attenuation; rather, the issue is damping vs. bypass inductor size.
Design equations similar to those of the previous sections can be derived for this case. The
optimum peak filter output impedance occurs at frequency

2+n
fm = f f (17.44)
2(1 + n)

and has the value √

2(1 + n)(2 + n)
Zo mm = R0 f (17.45)
n
The value of damping resistance that leads to optimum damping is described by


R0 f 1+n 2(1 + n)(4 + n)
Qopt = = (17.46)
Rf n (2 + n)(4 + 3n)
√
For this case, the peak output impedance cannot be reduced below 2 R0 f via damping.
Nonetheless, it is possible to further reduce the filter output impedance by redesign of L f and
C f , to reduce the value of R0 f .
 17.4 Design of a Damped Input Filter 699

17.4.4 Cascading Filter Sections

A cascade connection of multiple L–C filter sections can achieve a given high-frequency at-
tenuation with less volume and weight than a single-section L–C filter. The increased cutoff
frequency of the multiple-section filter allows use of smaller inductance and capacitance values.
Damping of each L–C section is usually required, which implies that damping of each section
should be optimized. Unfortunately, the results of the previous sections are restricted to single-
section filters. Interactions between cascaded L–C sections can lead to additional resonances
and increased filter output impedance.
It is nonetheless possible to design cascaded filter sections such that interaction between L–
C sections is negligible. In the approach described below, the filter output impedance is approxi-
mately equal to the output impedance of the last section, and resonances caused by interactions
between stages are avoided. Although the resulting filter may not be “optimal” in any sense,
insight can be gained that allows intelligent design of multiple-section filters with economical
damping of each section.

+
Additional Existing
vg + filter Za Zi1 filter Zo v itest
test
section

Fig. 17.27 Addition of a filter section at the input of an existing filter

Consider the addition of a filter section to the input of an existing filter, as in Fig. 17.27.
Let us assume that the existing filter has been correctly designed to meet the output impedance
design criteria of Eq. (17.19): under the conditions Za (s) = 0 and v̂g (s) = 0, Zo  is sufficiently
small. It is desired to add a damped filter section that does not significantly increase Zo .
Middlebrook’s Extra Element Theorem of Sect. 16.1 can again be invoked, to express how
addition of the filter section modifies Zo (s):


Za (s)
  1 + Z (s)
Zo (s) = Zo (s)
N1

 (17.47)
Za (s)=0 Za (s)
1+
ZD1 (s)

where 
ZN1 (s) = Zi1 (s) (17.48)
v̂test (s)→ 0
null

is the impedance at the input port of the existing filter, with its output port short-circuited. Note
that, in this particular case, nulling v̂test (s) is the same as shorting the filter output port because
the short-circuit current flows through the îtest source. The quantity

ZD1 (s) = Zi1 (s) (17.49)
îtest (s)=0
700 17 Input Filter Design

is the impedance at the input port of the existing filter, with its output port open-circuited. Hence,
the additional filter section does not significantly alter Zo provided that

Za   ZN1  and

Za   ZD1  (17.50)

Bode plots of the quantities ZN1 and ZD1 can be constructed either analytically or by computer
simulation, to obtain limits of Za . When ||Za || satisfies Eq. (17.50), then the “correction factor”
(1 + Za /ZN1 )/(1 + Za /ZD1 ) is approximately equal to 1, and the modified Zo is approximately
equal to the original Zo .
To satisfy the design criteria (17.50), it is advantageous to select the resonant frequencies
of Za to differ from the resonant frequencies of ZD1 . In other words, we should stagger-tune
the filter sections. This minimizes the interactions between filter sections, and can allow use of
smaller reactive element values.

17.4.5 Example: Two Stage Input Filter

As an example, let us consider the design of a two-stage filter using R f –Lb parallel damping in
each section as illustrated in Fig. 17.28 [158]. It is desired to achieve the same attenuation as
the single-section filters designed in Sects. 17.3.2 and 17.4.1, and to filter the input current of
the same buck converter example of Fig. 17.11. These filters exhibit an attenuation of 80 dB at
250 kHz, and satisfy the design inequalities of Eq. (17.19) with the ZN  and ZD  impedances of
Fig. 17.13. Hence, let us design the filter of Fig. 17.28 to attain 80 dB of attenuation at 250 kHz.

R2 n2L2 R1 n1L1

L2 L1

vg + Zo
C2 C1

Section 2 Section 1

Fig. 17.28 Two-section input filter example, employing R f –Lb parallel damping in each section

As described in the previous section and below, it is advantageous to stagger-tune the fil-
ter sections so that interaction between filter sections is reduced. We will find that the cut-
off frequency of filter section 1 should be chosen to be smaller than the cutoff frequency of
section 2. In consequence, the attenuation of section 1 will be greater than that of section
2. Let us (somewhat arbitrarily) design to obtain 45 dB of attenuation from section 1, and
 17.4 Design of a Damped Input Filter 701

35 dB of attenuation from section 2 (so that the total is the specified 80 dB). Let us also se-
lect n1 = n2 = n = Lb /L f = 0.5 for each section; as illustrated in Fig. 17.26, this choice leads to
a good compromise between damping of the filter resonance and degradation of high frequency
filter attenuation. Equation (17.43) and Fig. 17.26 predict that the R f –Lb damping network will
degrade the high-frequency attenuation by a factor of (1+1/n) = 3, or 9.5 dB. Hence, the section
1 undamped resonant frequency f f 1 should be chosen to yield 45 dB + 9.5dB = 54.5dB ⇒ 533
of attenuation at 250 kHz. Since section 1 exhibits a two-pole (−40dB/decade) roll-off at high
frequencies, f f 1 should be chosen as follows:

(250 kHz)
ff1 = √ = 10.8 kHz (17.51)
533
Note that this frequency is well above the 1.6 kHz resonant frequency f0 of the buck converter
output filter. Consequently, the output impedance Zo  can be as large as 3 Ω, and still be well
below the ZN ( jω) and ZD ( jω) plots of Fig. 17.13.
Solution of Eq. (17.42) for the required section 1 characteristic impedance that leads to a
peak output impedance of 3 Ω with n = 0.5 leads to

Zo mm 3Ω
R0 f 1 = √ = √ = 2.12 Ω (17.52)
2n(1 + 2n) 2(0.5)(1 + 2(0.5))
The filter inductance and capacitance values are therefore
R0 f 1
L1 = = 31.2 μH (17.53)
2π f f 1
1
C1 = = 6.9 μF
2π f f 1 R0 f 1

The section 1 damping network inductance is

n1 L1 = 15.6 μH (17.54)

The section 1 damping resistance is found from Eq. (17.39):


n(3 + 4n)(1 + 2n)
R1 = Qopt R0 f 1 = R0 f 1 = 1.9 Ω (17.55)
2(1 + 4n)

The peak output impedance will occur at the frequency given by Eq. (17.41), 15.3 kHz. The
quantities ZN1 ( jω) and ZD1 ( jω) for filter section 1 can now be constructed analytically or
plotted by computer simulation. ZN1 ( jω) is the section 1 input impedance Zi1 with the output
of section 1 shorted, and is given by the parallel combination of the sL1 and the (R1 + sn1 L1 )
branches. ZD1 ( jω) is the section 1 input impedance Zi1 with the output of section 1 open-
circuited, and is given by the series combination of ZN1 (s) with the capacitor impedance 1/sC1 .
Figure 17.29 contains plots of ZN1 ( jω) and ZD1 ( jω) for filter section 1, generated using
Spice.
702 17 Input Filter Design

20 dB || ZD1 ||

0 dB
|| ZN1 ||

|| Za ||

90
ZN1
45

0 Za

ZD1

1 kHz 10 kHz 100 kHz 1 MHz

Fig. 17.29 Bode plot of ZN1 and ZN2 for filter section 1. Also shown is the Bode plot for the output
impedance Za of filter section 2

One way to approach design of filter section 2 is as follows. To avoid significantly mod-
ifying the overall filter output impedance Zo , the section 2 output impedance ||Za ( jω)|| must
be sufficiently less than ||ZN1 ( jω)|| and ||ZD1 ( jω)||. It can be seen from Fig. 17.29 that, with
respect to ZD1 ( jω)||, this is most difficult to accomplish when the peak frequencies of sections
1 and 2 coincide. It is most difficult to satisfy the ||ZN1 ( jω)|| design criterion when the peak
frequency of sections 2 is lower than the peak frequency of section 1. Therefore, the best choice
is to stagger-tune the filter sections, with the resonant frequency of section 1 being lower than
the peak frequency of section 2. This implies that section 1 will produce more high-frequency
attenuation than section 2. For this reason, we have chosen to achieve 45 dB of attenuation with
section 1, and 35 dB of attenuation from section 2.
The section 2 undamped resonant frequency f f 2 should be chosen in the same manner used
in Eq. (17.51) for section 1. We have chosen to select n2 = n = Lb /L f = 0.5 for section 2; this
again means that the R f –Lb damping network will degrade the high-frequency attenuation by
a factor of (1 + 1/n) = 3, or 9.5 dB. Hence, the section 2 undamped resonant frequency f f 2
should be chosen to yield 35 dB + 9.5 dB = 44.5 dB ⇒ 169 of attenuation at 250 kHz. Since
section 2 exhibits a two-pole (−40 dB/decade) roll-off at high frequencies, f f 2 should be chosen
as follows:
(250 kHz)
ff2 = √ = 19.25kHz (17.56)
169
The output impedance of section 2 will peak at the frequency 27.2 kHz, as given by Eq. (17.41).
Hence, the peak frequencies of sections 1 and 2 differ by almost a factor of 2.
 17.4 Design of a Damped Input Filter 703

Figure 17.29 shows that, at 27.2 kHz, ZD1 ( jω) has a magnitude of roughly 3 dBΩ, and
that ZN1 ( jω) is approximately 7 dBΩ. Hence, let us design section 2 to have a peak output
impedance of 0 dBΩ ⇒ 1 Ω. Solution of Eq. (17.42) for the required section 2 characteristic
impedance leads to

Za mm 1Ω
R0 f 2 = √ = √ = 0.71 Ω (17.57)
2n(1 + 2n) 2(0.5)(1 + 2(0.5))
The section 2 element values are therefore
R0 f 2
L2 = = 5.8 μH
2π f f 2
1
C2 = = 11.7 μF (17.58)
2π f f 2 R0 f 2
n2 L2 = 2.9 μH

n(3 + 4n)(1 + 2n)
R2 = Qopt R0 f 2 = R0 f 2 = 0.65 Ω
2(1 + 4n)

A Bode plot of the resulting Za is overlaid on Fig. 17.29. It can be seen that Za ( jω) is less
than, but very close to, ZD1 ( jω) between the peak frequencies of 15 kHz and 27 kHz. The
impedance inequalities (17.50) are satisfied somewhat better below 15 kHz, and are satisfied
very well at high frequency.
The resulting filter output impedance Zo ( jω) is plotted in Fig. 17.30, for section 1 alone
and for the complete cascaded two-section filter. It can be seen that the peak output impedance

30 dB
|| ZD ||
|| ZN ||
20 dB
fo
Cascaded
sections 1 and 2
10 dB
Section 1
alone
0 dB

-10 dB

-20 dB
1 kHz 10 kHz 100 kHz

Fig. 17.30 Comparison of the impedance design criteria ZN ( jω) and ZD ( jω), Eq. (17.19), with the
filter output impedance Zo ( jω). Solid line: Zo ( jω) of cascaded design. Dashed line: Zo ( jω) of section
1 alone
704 17 Input Filter Design

20 dB
|| H ||
0 dB

-20 dB

-40 dB

-60 dB

-80 dB
at 250 kHz
-100 dB

-120 dB
1 kHz 10 kHz 100 kHz 1 MHz
f

Fig. 17.31 Input filter transfer function, cascaded two-section design

is approximately 10 dBΩ, or roughly 3 Ω. The impedance design criteria (17.19) are also shown,
and it can be seen that the filter meets these design criteria. Note the absence of resonances in
Zo ( jω)||.
The effect of stage 2 on Zo ( jω) is very small above 40 kHz (where inequalities (17.50) are
very well satisfied), and has moderate-to-small effect at lower frequencies. It is interesting that,
above approximately 12 kHz, the addition of stage 2 actually decreases ||Zo ( jω)||. The reason
for this can be seen from Fig. 16.8: when the phase difference between ∠Za ( jω) and ∠ZD1 ( jω)
is not too large (≤ 90◦ ), then the 1/(1 + Za /ZD1 ) term decreases the magnitude of the resulting
Zo ( jω). As can be seen from the phase plot of Fig. 17.29, this is indeed what happens. So
allowing Za ( jω) to be similar in magnitude to ZD1 ( jω) above 12 kHz was an acceptable
design choice.
The resulting filter transfer function is illustrated in Fig. 17.31. It can be seen that it does
indeed attain the goal of 80 dB attenuation at 250 kHz.
Figure 17.32 compares the single-stage design of Sect. 17.4.1 to the two-stage design of this
section. Both designs attain 80 dB attenuation at 250 kHz, and both designs meet the impedance
design criteria of Eq. (17.19). However, the single-stage approach requires much larger filter
elements.

17.5 Stability Criteria

In the previous sections, Middlebrook’s Extra Element Theorem has been employed to gain
insight into how the addition of an input filter changes the transfer functions of a converter.
Impedance inequalities such as those discussed in Sect. 17.2.3 yield insight into how to shape
the filter output impedance so that addition of the input filter does not substantially change the
converter transfer functions Gvd (s), Gvg (s), and Zout (s). Hence we expect that addition of an
 17.5 Stability Criteria 705

(a) Lf

330 μH Rf
Cf 0.67
vg +
470 μF Cb
1200 μF

(b) R2 n2L2 R1 n1L1

0.65 2.9 μH 1.9 15.6 μH

L2 5.8 μH L1 31.2 μH
C2 C1
vg +
11.7 μF 6.9 μF

Fig. 17.32 Comparison of single-section (a) and two-section (b) input filter designs. Both designs meet
the design criteria (17.19), and both exhibit 80 dB of attenuation at 250 kHz

input filter meeting the impedance inequalities will not change the stability of a well-designed
switching regulator. In this sense, the impedance inequalities can be viewed as design criteria
that may be conservative.
By themselves, the impedance inequalities of Sect. 17.2.3 do not define the stability bound-
ary of a closed-loop system, because these inequalities do not depend on the actual loop gain
T (s). So far, we have applied the Extra Element Theorem only to the open-loop transfer func-
tions such as Gvd (s). To determine the stability of a closed-loop switching regulator with input
filter, we need to further investigate how alteration of the transfer functions of the converter
power stage affects the stability and phase margin of the loop gain T (s).
One straightforward approach is to plot the modified loop gain including the modified Gvd (s)
of Eq. (17.4), and then apply the usual stability tests such as the phase margin test to the result.
The modified Gvg (s) and Zout (s) can be plotted as well, to check whether these quantities con-
tinue to meet the design goals. This approach is discussed in Sect. 17.5.1.
A second approach is based on comparison of the input filter source impedance Zo (s) with
the converter closed-loop input impedance Zi (s) [151]. This approach expresses the stability
boundary directly in terms of Zo (s). The loading of the input filter by Zi (s) leads to a voltage
divider term
Zi
(17.59)
Zi + Zo
that can contain RHP poles, and is the origin of the stability problem. Section 17.5.2 contains a
derivation and an example. The approaches of Sects. 17.5.1 and 17.5.2 give identical predictions
of the stability boundary.
706 17 Input Filter Design

17.5.1 Modified Phase Margin

Let us consider again the buck converter example of Sect. 17.3. The effect of the addition of
an undamped L–C input filter on the control-to-output transfer function Gvd (s) is illustrated in
Fig. 17.18, repeated in Fig. 17.33. It can be seen that Gvd is substantially unchanged below the
input filter resonance at 400 Hz, but Gvd contains an additional 360◦ of phase lag above 400 Hz.
The undamped input filter violates the inequalities of Eq. (17.19) in the vicinity of 400 Hz.

40 dB
|| Gvd || Gvd
|| Gvd ||
30 dB

20 dB

10 dB
Gvd
0 dB 0

100 Hz 1 kHz 10 kHz

f

Fig. 17.33 Effect of undamped input filter on the control-to-output transfer function Gvd (s) of the buck
converter example. Dashed lines: without input filter. Solid lines: with undamped input filter

If this converter and input filter are employed in a closed-loop regulator system having a
loop crossover frequency fc well below the input filter resonance at 400 Hz, then the phase
margin of the loop gain T (s) will be essentially unchanged by the input filter and the loop
will be stable. Violation of the impedance inequalities is irrelevant because the violation occurs
outside the bandwidth of the loop. Conversely, if the loop crossover frequency fc is near to or
greater than 400 Hz, then addition of the undamped input filter will decrease the phase margin
of the loop gain T (s) by as much as −360◦ , which would lead to a negative phase margin and
instability.
Hence, one approach to determination of the stability boundary is to employ the modified
Gvd (s) to plot the modified loop gain and find its phase margin. As an example, let us consider
the closed-loop buck regulator with PID compensator designed in Sect. 9.5.4. Figure 17.34
illustrates this closed-loop system, with an added single-section input filter and R f –Cb damping
network.
Figure 17.35 contains a plot of the magnitude of the input filter source (output) impedance
Zo , along with the impedances ZN , ZD , and Ze from Table 17.1, using the numerical values
specified in Fig. 17.34. It can be observed that Zo  is indeed less than ZN , ZD , and Ze  at
 17.5 Stability Criteria 707

Lf
L

31 ! H 50 ! H
Rf
1.7 Ω C R1
28 V + Cf R
500 ! F 1Ω 11 kΩ
47 ! F Cb
29 ! F
R2
85 kΩ
C2
T 1.1 nF
R3 C3
d 2.7 nF
120 kΩ

PWM
+

VM = 4 V R4
vref + 47 kΩ
5V

Fig. 17.34 Closed-loop buck regulator with PID compensator, Sect. 9.5.4, with a damped input filter

40

30

20
Magnitude, dB

10

-10 Zo
ZN
-20
ZD
-30 Ze

-40
101 102 103 104
Frequency, Hz

Fig. 17.35 Impedance inequalities for the regulator of Fig. 17.34

all frequencies, although the impedances are close in magnitude in the vicinity of the resonances
of the input filter (approximately 4 kHz) and the converter output filter (1 kHz).
The original and modified loop gains are plotted in Fig. 17.36. It can be observed that the ef-
fect of the input filter on the loop gain is moderate, and the loop continues to be stable. Nonethe-
less, changes are observed at frequencies where Zo  approaches ZN  or ZD . At or above the 1
708 17 Input Filter Design

60

40
Magnitude, dB
20

-20
Modified T
Original T
-40
101 102 103 104
Frequency, Hz
0

-45
Phase, degrees

-90

-135

-180

-225 Modified T
Original T
-270
101 102 103 104
Frequency, Hz

Fig. 17.36 Modification of the loop gain magnitude and phase by the input filter, for the buck regulator
of Fig. 17.34

kHz resonant frequency of the buck output filter, the magnitude and phase of the loop gain T (s)
are somewhat reduced. Resonant (LHP) zeroes are introduced into T (s) at the approximately 4
kHz resonance of the input filter, which cause the loop to exhibit three crossover frequencies.
The loop also contains a pair of damped poles near 4 kHz. The phase margin is reduced, but is
still positive, and the loop continues to be stable.
Again, it should be noted that Zo  < ZN  is not the stability condition, but rather stability
is deduced from the loop gain plot.
Figure 17.37 illustrates modification of the input filter damping network, such that the peak
Zo  is increased. The impedance magnitudes for this case are plotted in Fig. 17.38. It can be
seen that the input filter Zo  now significantly exceeds ZN  and ZD  at the input filter resonant
 17.5 Stability Criteria 709

Lf
L

31 ! H 50 ! H
Rf
5.2 Ω C R1
28 V + Cf R
500 ! F 1Ω 11 kΩ
47 ! F Cb
8!F
R2
85 kΩ
C2
T 1.1 nF
R3 C3
d 2.7 nF
120 kΩ

PWM
+

VM = 4 V R4
vref + 47 kΩ
5V

Fig. 17.37 Modification of the input filter of Fig. 17.34 to reduce its damping

40

30

20
Magnitude, dB

10

-10 Zo
ZN
-20
ZD
-30 Ze

-40
101 102 103 104
Frequency, Hz

Fig. 17.38 Impedance inequalities for the regulator of Fig. 17.37

frequency of 4 kHz. The resulting loop gain magnitude and phase is plotted in Fig. 17.39. The
correction factor in Eq. (17.4) introduces resonant RHP zeroes and resonant poles into T (s),
at the input filter resonant frequency. This adds an additional 360◦ of phase lag at frequencies
above 4 kHz. At the loop crossover frequency of 7 kHz, the phase margin is negative. Hence,
the converter feedback loop is unstable.
710 17 Input Filter Design

60

40
Magnitude, dB
20

–20
Modified T
Original T
–40
101 102 103 104
Frequency, Hz
0
–45
–90
–135
Phase, degrees

–180
–225
–270
–315
–360
–405
–450 Modified T
–495 Original T
–540
101 102 103 104
Frequency, Hz

Fig. 17.39 Modification of the loop gain magnitude and phase by the input filter, for the buck regulator
of Fig. 17.37

In summary, the impedance inequalities of Sect. 17.2.3 provide conditions that guarantee
that the loop gain and other important quantities are unchanged by addition of an input filter. The
actual stability boundary is determined by plotting the modified loop gain, and then applying the
usual stability tests such as the phase margin test. In the examples of this section, the correction
factor (Eq. (17.18)) leads to decrease of the magnitude and phase of the loop gain in the vicinity
of the crossover frequency. In the example in which damping of the input filter was inadequate,
this led to a negative phase margin and instability.
 17.5 Stability Criteria 711

17.5.2 Closed-Loop Input Impedance

Another useful approach for determination of the exact stability boundary is based on the load-
ing of the input filter by the closed-loop converter input impedance Zi (s). This loading leads to
a voltage divider term
Zi (s) 1
= (17.60)
Zi (s) + Zo (s) Zo (s)
1+
Zi (s)
that introduces new poles into the closed-loop transfer functions of the system [151]. It is pos-
sible that these new poles lie in the right half-plane, and this can be viewed as the mechanism
by which addition of an input filter destabilizes the regulator. In this section, the Extra Ele-
ment Theorem is employed to derive how the input filter adds the additional term (17.60) to a
closed-loop transfer function of the system; the closed-loop audiosusceptibility v̂/v̂g is used as
an example but all closed-loop transfer functions of the network contain the same poles. Second,
the Feedback Theorem is employed to find an expression for the closed-loop input impedance
Zi (s). Finally, the stability of Eq. (17.60) is examined by treating T m (s) = Zo (s)/Zi (s) as a minor
loop gain whose stability can be determined using conventional techniques such as the Nyquist
stability theorem and the phase margin test.

Effect of input filter on closed-loop transfer functions

Figure 17.40 illustrates the small-signal model of a system composed of a CCM switching
converter, its feedback system, and an input filter. A Thevenin-equivalent circuit models the
output port of the input filter, having output impedance Zo . The transfer function of the unloaded
input filter is Hi (s), and the voltage applied to the input port of the input filter is vg . The converter
power stage is modeled using the canonical model of Sect. 7.4. The compensator and PWM
transfer functions are combined into gain block A(s).

Fig. 17.40 Small-signal model of a closed-loop converter system with input filter
712 17 Input Filter Design

In the case of no input filter, Zo (s) = 0 and Hi (s) = 1. Under these conditions, the “original”
closed-loop transfer functions can be found using the Feedback Theorem, in a manner similar
to that employed in Sect. 13.4. The “original” loop gain is found to be

T (s) = A(s)e(s)MHe (s)H(s) (17.61)

The “original” audiosusceptibility is

MHe (s)
Gvg (s) = (17.62)
1 + T (s)
This coincides with the result of Eq. (13.103). In the presence of the input filter, the Extra
Element Theorem predicts that the audiosusceptibility becomes
Zo
1+
ZNg
G vg (s) = Hi (s)Gvg (s) (17.63)
Zo
1+
ZDg
Figure 17.41 illustrates use of the Extra Element Theorem to find the modified audiosuscepti-
bility G vg (s). The Thevenin impedance Zo (s) is treated as the extra element, and current ît is
injected at the Zo port.
The impedance ZNg is the impedance seen at the injection port, when ît and v̂in are adjusted
such that the output voltage v̂ is nulled. The reference variation v̂re f is also set to zero:

v̂t 
ZNg = v̂→ 0 (17.64)
ît  null
v̂re f =0

Fig. 17.41 Use of the Extra Element Theorem to find the modified G vg (s)
 17.5 Stability Criteria 713

When v̂ is nulled, with v̂re f set to zero, the duty-cycle variation d̂ also becomes zero. Hence, the
e(s)d̂ and j(s)d̂ sources are zero. Additionally, the null condition of v̂ causes zero-current varia-
tion in the load and in the C and Le elements, so that there is no voltage across the transformer
windings and no current through the transformer windings. Hence the null condition implies
that ît = 0 and v̂t = −Hi v̂in . Therefore ZNg is
−Hi v̂in
ZNg = =∞ (17.65)
0
ZNg is an open circuit, and the numerator term of the correction factor (17.63) equals (1 + 0) = 1.
The impedance ZDg is the impedance seen at the injection port, when v̂in and v̂re f are set to
zero: 
v̂t 
ZDg =  (17.66)
ît v̂in =0
v̂re f =0

The quantity ZDg is seen to be the closed-loop input impedance Zi of the regulator. Hence, the
closed-loop audiosusceptibility in Eq. (17.63) is
1
G vg (s) = Hi (s)Gvg (s)
 (17.67)
Zo
1+
Zi
A similar analysis can show that the modified closed-loop output impedance contains the same
correction factor denominator term [151].
How can addition of an input filter to a stable closed-loop regulator lead to instability, i.e.,
closed-loop transfer function poles in the right half of the complex plane? In Eq. (17.67), the
quantity Gvg (s) is the closed-loop audiosusceptibility of the original regulator; we assume that
the original regulator was correctly designed so that Gvg (s) is stable and contains no right half-
plane poles. The quantity Hi is the unloaded transfer function of the filter, which we also assume
contains no right half-plane poles since the filter is a passive network. Hence the only term that
can lead to instability is the denominator correction factor term
1 1

= (17.68)
Zo (1 + T m )
1+
Zi
The term in Eq. (17.68) is the origin of potential instability caused by addition of the input
filter. The denominator correction factor term assumes the same mathematical form as a closed-
loop transfer function, effectively with “minor loop gain” T m = Zo /Zi , and it is possible for the
(1+T m ) term to contain right half-plane roots. Hence the usual stability tests such as the Nyquist
stability criterion or phase margin tests can be applied to T m .

Finding the closed-loop input admittance Yi = 1/Z Dg

We can apply the Feedback Theorem of Chap. 13 as illustrated in Fig. 17.42. A test source v̂t is
injected at the power input port of the small-signal model, and the converter input current ît is
measured. The input admittance is the transfer function from v̂t to ît :
ît
Yi = (17.69)
v̂t
714 17 Input Filter Design

Fig. 17.42 Use of the Feedback Theorem to find the closed-loop input admittance Yi = 1/ZDg

To determine the closed-loop Yi , source v̂z is injected after the summing node, and the Feedback
Theorem is applied to express Yi as
T 1
Yi = Yi∞ + Yi0 (17.70)
1+T 1+T
The gain Yi∞ is given by 
ît (s) 
Yi∞ (s) =  (17.71)
v̂t (s)  v̂re f =0
v̂y → 0
null

The loop reference variation v̂re f is set to zero. In the presence of the test source v̂t , the signal v̂z
is adjusted to null v̂y . Figure 17.43 illustrates solution of the model under these conditions.
With the reference v̂re f set to zero, the nulling of v̂y implies that the output voltage v̂ is also
nulled. Hence the current through the load resistance R is nulled. Hence the currents in the effec-
tive filter elements are nulled, and there must be zero voltage across the transformer secondary.
This implies that there is zero voltage across the transformer primary, and zero current through
the e(s)d̂ source. So under the null conditions, the test voltage must be v̂t = −e(s)d̂, and the test
current must be ît = j(s)d̂. This leads to the result

j(s)d̂ j(s)
Yi∞ = =− (17.72)
−e(s)d̂ e(s)

For the buck converter, this expression reduces to

M2
Yi∞ = − (17.73)
R
 17.5 Stability Criteria 715

Fig. 17.43 Determination of Yi∞

At frequencies where the loop gain T is large in magnitude, the converter closed-loop incremen-
tal input admittance Yi is negative. The quantity 1/Yi∞ coincides with the ZN listed in Table 17.1;
when the loop gain is large then the converter closed-loop input impedance follows ZN .
The gain Yi0 is given by 
ît (s) 
Yi0 (s) =  (17.74)
v̂t (s)  v̂re f =0
v̂ x → 0
null

The loop reference variation v̂re f is set to zero. In the presence of the test source v̂t , the signal
v̂z is adjusted such that v̂ x is nulled. Figure 17.44 illustrates solution of the model under these
conditions.
With v̂ x equal to zero, the duty-cycle variation d̂ is zero. Hence the canonical model sources
e(s)d̂ and j(s)d̂ become zero. The converter input admittance Yi0 is then the effective filter input
admittance 1/Zei (s), reflected through the transformer turns ratio M 2 :
M2
Yi0 (s) = (17.75)
Zei (s)
At frequencies where the loop gain T is small in magnitude, then the converter closed-loop
incremental input admittance Yi follows the open-loop value M 2 /Zei . This quantity is a passive
admittance, having phase in the range −90◦ ≤ ∠Yi ≤ +90◦ . The quantity 1/Yi0 coincides with
the ZD listed in Table 17.1; when the loop gain is small then the converter closed-loop input
impedance follows ZD .
The loop gain T (s) of Eq. (17.70) is given by

v̂y (s) 
T (s) =  (17.76)
v̂ x (s)  v̂re f =0
v̂t =0
This is the loop gain of the original closed-loop regulator, before addition of the input filter.
716 17 Input Filter Design

Fig. 17.44 Determination of Yi0

Construction of Z i

Construction of the closed-loop input impedance Zi = 1/Yi based on the results of

Eqs. (17.70), (17.73), and (17.75). Graphical construction of Zi is illustrated in Fig. 17.45 for a
simple buck converter example. Figure 17.45a contains magnitude asymptotes of T , T/(1 + T ),
and 1/(1 + T ), constructed as described in Sect. 9.3. The loop gain for this simple example in-
cludes the resonant poles of the converter L–C filter at frequency fo , plus a high-frequency zero.
The loop crossover frequency is fc , and the phase margin of T leads to peaking with closed-loop
Q-factor Qc as described in Sect. 9.4.3.
Figure 17.45b illustrates construction of the admittance terms of Eq. (17.70). The ZN and
ZD terms of Table 17.1 are inverted to obtain their admittances, and then are multiplied by the
T/(1 + T ) and 1/(1 + T ) plots of Fig. 17.45a. Figure 17.45c contains plots of the magnitude and
phase of the converter closed-loop input impedance Zi , derived from Fig. 17.45b according to
Eq. (17.70).
At frequencies well below the original loop crossover frequency fc where the loop gain T
is large in magnitude, then T/(1 + T ) ≈ 1 and 1/(1 + T ) is small. Hence, Yi ≈ Yi∞ and Zi ≈ ZN .
As illustrated in Fig. 17.45c, Zi follows −R/M 2 and has phase −180◦ at low frequency.
At frequencies well above fc where T   1, then T/(1 + T )  1 and1/(1 + T ) ≈ 1.
Hence Yi ≈ Yi0 and the closed-loop input impedance Zi follows ZD . For the example asymptotes
of Fig. 17.45, Zi follows the inductor asymptote sL/ M 2 at high frequency, with a phase of +90◦ .
In the vicinity of the original loop crossover frequency fc , the impedance Zi transitions
between ZN and ZD . In general, the ZN and ZD asymptotes can differ at the loop crossover
frequency, and hence this transition will contain new asymptotes that are not present in ZN and
ZD alone. Depending on the phase margin of the original loop gain T , the T/(1+T ) and 1/(1+T )
terms of Eq. (17.70) may contain resonant poles and peaking in the vicinity of fc . This leads to
 17.5 Stability Criteria 717

Fig. 17.45 Steps in the construction of the asymptotes of the closed-loop converter input impedance
Zi (s): (a) converter loop gain T and the closed-loop quantities T/(1 + T ) and 1/(1 + T ); (b) the admittance
terms of Eq. (17.70); (c) the resulting magnitude and phase asymptotes of Zi (s)
718 17 Input Filter Design

resonant zeroes in Zi = 1/Yi ; therefore it is possible that Zi  is smaller than ZN  and ZD  in
the vicinity of fc . Additionally, Zi contains a RHP pole at frequency fnd ; at frequencies greater
than fnd , the negative sign of ZN is cancelled by the negative sign of the RHP pole, and Zi reverts
to a passive open-loop impedance. It should be noted that the RHP pole of Zi does not directly
lead to instability: when the converter is driven by a voltage source vg , the current is given by
the transfer function ig = vg /Zi . This transfer function contains a RHP zero at fnd , and exhibits
no RHP poles.

Determination of stability

Next, we can construct the minor loop gain T m = Zo /Zi of Eq. (17.68). In Fig. 17.46, an input
filter impedance Zo is overlayed on the Zi impedance of Fig. 17.45c. As illustrated in Fig. 17.46,
the magnitude of T m can be found by subtracting the magnitude Zi dB from Zo dB . At the fre-
quency or frequencies where Zi  = Zo , the minor loop gain T m exhibits a crossover frequency.
The phase of T m at a given frequency also can be found by subtracting: ∠T m = ∠Zo − ∠Zi .
The Bode plot of the minor loop gain T m is constructed in Fig. 17.47, based on the
impedance asymptotes of Fig. 17.46. To conform with the conventional appearance of loop gain
phase, the phase asymptotes of T m have been shifted by −360◦ ; this corresponds to multiplying
◦
T m by e− j360 = 1, and does not change the result. For the specific case sketched in Fig. 17.46,
the input filter impedance Zo  is greater than the converter closed-loop input impedance Zi 
over the frequency range from fmc1 to fmc2 . As illustrated in Fig. 17.47, the minor loop gain
T m exhibits crossover frequencies at fmc1 and fmc2 , and reaches a peak magnitude of R f M 2 /R
at the filter resonant frequency f f . The phase of T m at frequency fmc1 is approximately −90◦ ,
corresponding to a phase margin of +90◦ . The phase of T m is approximately −270◦ at fmc2 , cor-

Fig. 17.46 Superimposing the input filter impedance asymptotes Zo on the converter closed-loop input
impedance asymptotes Zi to determine the minor loop gain T m
 17.5 Stability Criteria 719

Fig. 17.47 Bode plot of minor loop gain T m for the example of Fig. 17.46

Im[Tm(jω)]
f = fmc2
f = ff

f→∞
–Rf
f=0 +1 Re[T (jω)]
R/M 2 m

f = fmc1

Fig. 17.48 Nyquist plot of minor loop gain T m for the example of Fig. 17.46. Crosshatching denotes the
region to the right of the contour; the −1 point is enclosed

responding to a phase margin of −90◦ . The minor loop gain T m contains resonant poles at the
original loop crossover frequency fc and a right half-plane zero at frequency fnd .
With multiple crossover frequencies, determination of stability should be resolved by use
of the Nyquist plot. The positive-frequency portion of the Nyquist plot of the minor loop gain
T m (s) is illustrated in Fig. 17.48. The minor loop gain has magnitude zero at dc. As frequency
increases, T m increases in magnitude with approximate phase −90◦ , until it reaches unity mag-
nitude at f = fmc1 . In the vicinity of f = f f , T m has magnitude greater than 1, with phase
decreasing from −90◦ towards −270◦ . At frequencies greater than fmc2 , T m exhibits magnitude
less than 1. It can be seen that the −1 point is encircled once by the positive-frequency portion
720 17 Input Filter Design

of the Nyquist plot sketched in Fig. 17.48. The negative-frequency portion of the Nyquist plot,
which is the complex conjugate (not shown in Fig. 17.48), also encircles the −1 point once.
Consequently, the closed-loop term
1 Zi
= (17.77)
1 + T m Zo + Zi
contains two right half-plane poles, and is unstable. The regulator closed-loop transfer functions
such as Eq. (17.67) will also exhibit these two right half-plane poles.
It can be observed from Fig. 17.48 that the encirclements of the −1 point could be eliminated
by reducing the magnitude of the quantity R f /(R/M 2 ) to be less than unity. Then the Nyquist
plot no longer would encircle the −1 point, and the minor loop T m would no longer introduce
RHP poles. This coincides with the earlier conclusion that adequate damping of the input filter
can stabilize the system.

17.5.3 Discussion

Section 17.5 describes two distinct approaches to derivation of the exact stability boundary of a
switching regulator with addition of an input filter. In Sect. 17.5.1, the Extra Element Theorem
is employed to determine the modified loop gain T (s). The usual gain and phase margin tests
can then be employed to ascertain the stability of the modified regulator system. By contrast,
the approach of Sect. 17.5.2 employs the Feedback Theorem to find the new closed-loop poles
induced by addition of the input filter. These poles are ascribed to a voltage divider term that
accounts for the loading of the input filter impedance Zo (s) by the closed-loop converter input
impedance Zi (s). This voltage divider term can be viewed as having an effective minor loop gain
T m (s) = Zo (s)/Zi (s), whose stability can be ascertained using the usual techniques including
phase and gain margins and the Nyquist stability tests.
Thus, we have two distinct approaches to determination of the stability boundary of the reg-
ulator when modified by addition of an input filter. It can be verified that identical closed-loop
poles and characteristic equations are predicted by the two approaches. Hence, provided that the
original unmodified system is stable, the two approaches predict identical stability boundaries.
Finally, it should be emphasized that Sects. 17.1 to 17.4 are concerned with design of an
input filter that does not disrupt the important transfer functions of the closed-loop regulator,
while Sect. 17.5 is concerned with determination of the formal stability boundary. While these
are very different goals, it is revealing that all approaches rely on the impedances ZN and ZD
of Table 17.1, albeit in different ways. Ultimately, the impedance inequalities of Eq. (17.19) are
the governing design criteria, with the issue only being how conservative should the design be.
The engineer can employ modern tools to plot the relevant equations of all sections and produce
an informed and optimized design.

17.6 Summary of Key Points

1. Switching converters usually require input filters, to reduce conducted electromagnetic in-
terference and possibly also to meet requirements concerning conducted susceptibility.
2. Addition of an input filter to a converter alters the control-to-output and other transfer func-
tions of the converter. Design of the converter control system must account for the effects
of the input filter.
 17.6 Summary of Key Points 721

3. If the input filter is not damped, then it typically introduces complex poles and RHP zeroes
into the converter control-to-output transfer function, at the resonant frequencies of the
input filter. If these resonant frequencies are lower than the crossover frequency of the
controller loop gain, then the phase margin will become negative and the regulator will be
unstable.
4. The input filter can be designed so that it does not significantly change the converter control-
to-output and other transfer functions. Impedance inequalities (17.19) give simple design
criteria that guarantee this. To meet these design criteria, the resonances of the input filter
must be sufficiently damped.
5. Optimization of the damping networks of single-section filters can yield significant savings
in filter element size. Equations for optimizing three different filter sections are listed.
6. Substantial savings in filter element size can be realized via cascading filter sections. The
design of noninteracting cascaded filter sections can be achieved by an approach similar to
the original input filter design method. Impedance inequalities (17.50) give design criteria
that guarantee that interactions are not substantial.
7. Another useful approach for determination of the exact stability boundary is based on the
loading of the input filter, whose output impedance is Zo (s), by the closed-loop converter
input impedance Zi (s). The stability is examined by treating T m (s) = Zo (s)/Zi (s) as a minor
loop gain using conventional techniques such as the Nyquist stability theorem and the phase
margin test.

Problems
17.1 It is required to design an input filter for the flyback converter of Fig. 17.49. The max-
imum allowed amplitude of switching harmonics of iin (t) is 10 μA rms. Calculate the
required attenuation of the filter at the switching frequency.

iin(t) ig(t) n = 0.5

+
1:n D1
Input Lp C R
filter v
Vg 250 μH
+ 100 μF 5

48 V
Q1

D = 0.3
fs = 200 kHz

Fig. 17.49 Flyback converter, Problems 17.1, 17.4, 17.6, 17.8, and 17.10

17.2 In the boost converter of Fig. 17.50, the input filter is designed so that the maximum am-
plitude of switching harmonics of iin (t) is not greater than 10 μA rms. Find the required
attenuation of the filter at the switching frequency.
722 17 Input Filter Design

iin(t) ig(t) L
+
Input 100 μH
filter
vg
+ C v R
48 V 12
33 ! F

D = 0.6
fs = 200 kHz

Fig. 17.50 Boost converter, Problems 17.2, 17.5, 17.7, and 17.9

17.3 Derive the expressions for ZN and ZD in Table 17.1.

17.4 The input filter for the flyback converter of Fig. 17.49 is designed using a single L f –C f
section. The filter is damped using a resistor R f in series with a very large blocking
capacitor Cb .
(a) Sketch a small-signal model of the flyback converter. Derive expressions for ZN (s)
and ZD (s) using your model. Sketch the magnitude Bode plots of ZN and ZD , and
label all salient features.
(b) Design the input filter, i.e., select the values of L f , C f , and R f , so that: (i) the filter
attenuation at the switching frequency is at least 100 dB, and (ii) the magnitude of
the filter output impedance Zo (s) satisfies the conditions || Zo ( jω) || < 0.3 || ZD ( jω) ||
and || Zo ( jω) || < 0.3 || ZN ( jω) ||, for all frequencies.
(c) Use Spice simulations to verify that the filter designed in part (b) meets the specifi-
cations.
(d) Using Spice simulations, plot the converter control-to-output magnitude and phase
responses without the input filter, and with the filter designed in part (b). Comment
on the changes introduced by the filter.
17.5 It is required to design the input filter for the boost converter of Fig. 17.50 using a sin-
gle L f –C f section. The filter is damped using a resistor R f in series with a very large
blocking capacitor Cb .
(a) Sketch the magnitude Bode plots of ZN (s) and ZD (s) for the boost converter, and
label all salient features.
(b) Design the input filter, i.e., select the values of L f , C f , and R f , so that: (i) the
filter attenuation at the switching frequency is at least 80 dB, and (ii) the mag-
nitude of the filter output impedance Zo (s) satisfies the conditions || Zo ( jω) || <
0.2 || ZD ( jω) ||, || Zo (ω) || < 0.2 || ZN (ω) ||, for all frequencies.
(c) Use Spice simulations to verify that the filter designed in part (b) meets the specifi-
cations.
(d) Using Spice simulations, plot the converter control-to-output magnitude and phase
responses without the input filter, and with the filter designed in part (b). Comment
on the changes in the control-to-output responses introduced by the filter.
17.6 Repeat the filter design of Problem 17.4 using the optimum filter damping approach de-
scribed in Sect. 17.4.1. Find the values of L f , C f , R f , and Cb .
 17.6 Summary of Key Points 723

17.7 Repeat the filter design of Problem 17.5 using the optimum filter damping approach of
Sect. 17.4.1. Find the values of L f , C f , R f , and Cb .
17.8 Repeat the filter design of Problem 17.4 using the optimum R f –Lb parallel damping ap-
proach described in Sect. 17.4.2. Find the values of L f , C f , R f , and Lb .
17.9 Repeat the filter design of Problem 17.5 using the optimum R f –Lb parallel damping ap-
proach described in Sect. 17.4.2. Find the values of L f , C f , R f , and Lb .
17.10 It is required to design the input filter for the flyback converter of Fig. 17.32 using two
filter sections. Each filter section is damped using a resistor in series with a blocking
capacitor.
(a) Design the input filter, i.e., select values of all circuit parameters, so that (i) the filter
attenuation at the switching frequency is at least 100 dB, and (ii) the magnitude of
the filter output impedance Zo (s) satisfies the conditions || Zo ( jω)  < 0.3 || ZD ( jω) ||
and || Zo ( jω) || < 0.3 || ZN (ω) ||, for all frequencies.
(b) Use Spice simulations to verify that the filter designed in part (a) meets the specifi-
cations.
(c) Using Spice simulations, plot the converter control-to-output magnitude and phase
responses without the input filter, and with the filter designed in part (b). Comment
on the changes introduced by the filter.
17.11 Consider the boost voltage regulator of Problem 9.3. It is required to design an input filter
for this voltage regulator. The filter should have a single L f –C f section with optimum
damping using a resistor R f in series with a capacitor Cb .
(a) Design the input filter, i.e., select values of all circuit parameters, so that (i) the
filter attenuation at the switching frequency f s = 200 kHz is equal to at least 80 dB,
and (ii) the magnitude of the filter output impedance Zo (s) satisfies the conditions
|| Zo ( jω)  ≤ 0.4 || ZD ( jω) || and || Zo ( jω) || ≤ 0.4 || ZN (ω) ||, for all frequencies.
(b) Determine the closed-loop input impedance Zi (s) of the regulator in Problem 9.3.
Examine stability of the closed-loop system by analysis of the minor loop gain
T m (s) = Zo (s)/Zi (s), where Zo (s) is the output impedance of the input filter designed
in part (a).