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Fundamentals of Microelectronics II

The document describes chapters 9 and 10 from the textbook "Fundamentals of Microelectronics II". Chapter 9 discusses cascode stages and current mirrors. It examines how cascode configurations can boost output impedance and voltage gain in both bipolar and MOS amplifiers. Chapter 9 also covers current mirrors, which are used to sense and duplicate a "golden current" at different locations in a circuit. Chapter 10 will cover differential amplifiers and their frequency response.

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Abrham Gojjam
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0% found this document useful (0 votes)
191 views44 pages

Fundamentals of Microelectronics II

The document describes chapters 9 and 10 from the textbook "Fundamentals of Microelectronics II". Chapter 9 discusses cascode stages and current mirrors. It examines how cascode configurations can boost output impedance and voltage gain in both bipolar and MOS amplifiers. Chapter 9 also covers current mirrors, which are used to sense and duplicate a "golden current" at different locations in a circuit. Chapter 10 will cover differential amplifiers and their frequency response.

Uploaded by

Abrham Gojjam
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Fundamentals of Microelectronics II

 CH9 Cascode Stages and Current Mirrors


 CH10 Differential Amplifiers
 CH11 Frequency Response
 CH12 Feedback

1
Chapter 9 Cascode Stages and Current Mirrors

 9.1 Cascode Stage

 9.2 Current Mirrors

2
Boosted Output Impedances

Rout1  1  g m  RE || r rO  RE || r
Rout 2  1  g m RS rO  RS

CH 9 Cascode Stages and Current Mirrors 3


Bipolar Cascode Stage

Rout  [1  g m (rO 2 || r 1 )]rO1  rO 2 || r 1


Rout  g m1rO1 rO 2 || r 1 
CH 9 Cascode Stages and Current Mirrors 4
Maximum Bipolar Cascode Output Impedance

Rout, max  g m1rO1r 1


Rout, max  1rO1

 The maximum output impedance of a bipolar cascode is


bounded by the ever-present r between emitter and ground
of Q1.
CH 9 Cascode Stages and Current Mirrors 5
Example: Output Impedance

2rO 2 r 1
RoutA 
r 1  rO 2

 Typically r is smaller than rO, so in general it is impossible


to double the output impedance by degenerating Q2 with a
resistor.
CH 9 Cascode Stages and Current Mirrors 6
PNP Cascode Stage

Rout  [1  g m (rO 2 || r 1 )]rO1  rO 2 || r 1


Rout  g m1rO1 rO 2 || r 1 
CH 9 Cascode Stages and Current Mirrors 7
Another Interpretation of Bipolar Cascode

 Instead of treating cascode as Q2 degenerating Q1, we can


also think of it as Q1 stacking on top of Q2 (current source)
to boost Q2’s output impedance.
CH 9 Cascode Stages and Current Mirrors 8
False Cascodes

  1  1
Rout  1  g m1  || rO 2 || r 1  rO1  || rO 2 || r 1
  g m2  g m2
 g m1  1
Rout  1  rO1   2rO1
 g m2  g m2
 When the emitter of Q1 is connected to the emitter of Q2, it’s
no longer a cascode since Q2 becomes a diode-connected
device instead of a current source.
CH 9 Cascode Stages and Current Mirrors 9
MOS Cascode Stage

Rout  1  g m1rO 2 rO1  rO 2


Rout  g m1rO1rO 2
CH 9 Cascode Stages and Current Mirrors 10
Another Interpretation of MOS Cascode

 Similar to its bipolar counterpart, MOS cascode can be


thought of as stacking a transistor on top of a current
source.
 Unlike bipolar cascode, the output impedance is not limited
by .
CH 9 Cascode Stages and Current Mirrors 11
PMOS Cascode Stage

Rout  1  g m1rO 2 rO1  rO 2


Rout  g m1rO1rO 2
CH 9 Cascode Stages and Current Mirrors 12
Example: Parasitic Resistance

Rout  (1  g m1rO 2 )( rO1 || RP )  rO 2

 RP will lower the output impedance, since its parallel


combination with rO1 will always be lower than rO1.
CH 9 Cascode Stages and Current Mirrors 13
Short-Circuit Transconductance

iout
Gm 
vin vout  0

 The short-circuit transconductance of a circuit measures its


strength in converting input voltage to output current.
CH 9 Cascode Stages and Current Mirrors 14
Transconductance Example

Gm  g m1
CH 9 Cascode Stages and Current Mirrors 15
Derivation of Voltage Gain

vout  iout Rout  Gm vin Rout


vout vin  Gm Rout

 By representing a linear circuit with its Norton equivalent,


the relationship between Vout and Vin can be expressed by
the product of Gm and Rout.
CH 9 Cascode Stages and Current Mirrors 16
Example: Voltage Gain

Av   g m1rO1

CH 9 Cascode Stages and Current Mirrors 17


Comparison between Bipolar Cascode and CE Stage

 Since the output impedance of bipolar cascode is higher


than that of the CE stage, we would expect its voltage gain
to be higher as well.
CH 9 Cascode Stages and Current Mirrors 18
Voltage Gain of Bipolar Cascode Amplifier

Gm  g m1
Av   g m1rO1 g m1 (rO1 || r 2 )

 Since rO is much larger than 1/gm, most of IC,Q1 flows into the
diode-connected Q2. Using Rout as before, AV is easily
calculated.
CH 9 Cascode Stages and Current Mirrors 19
Alternate View of Cascode Amplifier

 A bipolar cascode amplifier is also a CE stage in series with


a CB stage.
CH 9 Cascode Stages and Current Mirrors 20
Practical Cascode Stage

Rout  rO 3 || g m 2 rO 2 (rO1 || r 2 )
 Since no current source can be ideal, the output impedance
drops.
CH 9 Cascode Stages and Current Mirrors 21
Improved Cascode Stage

Rout  g m3 rO 3 (rO 4 || r 3 ) || g m 2 rO 2 (rO1 || r 2 )

 In order to preserve the high output impedance, a cascode


PNP current source is used.

CH 9 Cascode Stages and Current Mirrors 22


MOS Cascode Amplifier

Av  Gm Rout
Av   g m1 (1  g m 2 rO 2 )rO1  rO 2 
Av   g m1rO1 g m 2 rO 2

CH 9 Cascode Stages and Current Mirrors 23


Improved MOS Cascode Amplifier

Ron  g m 2 rO 2 rO1
Rop  g m 3 rO 3 rO 4
Rout  Ron || Rop

 Similar to its bipolar counterpart, the output impedance of a


MOS cascode amplifier can be improved by using a PMOS
cascode current source.
CH 9 Cascode Stages and Current Mirrors 24
Temperature and Supply Dependence of Bias
Current

R2V CC ( R1  R2 )  VT ln( I1 I S )
2
1 W  R2 
I1   n C ox  VDD  VTH 
2 L  R1  R2 

 Since VT, IS, n, and VTH all depend on temperature, I1 for
both bipolar and MOS depends on temperature and supply.
CH 9 Cascode Stages and Current Mirrors 25
Concept of Current Mirror

 The motivation behind a current mirror is to sense the


current from a “golden current source” and duplicate this
“golden current” to other locations.
CH 9 Cascode Stages and Current Mirrors 26
Bipolar Current Mirror Circuitry

I S1
I copy  I REF
I S , REF

 The diode-connected QREF produces an output voltage V1


that forces Icopy1 = IREF, if Q1 = QREF.
CH 9 Cascode Stages and Current Mirrors 27
Bad Current Mirror Example I

 Without shorting the collector and base of QREF together,


there will not be a path for the base currents to flow,
therefore, Icopy is zero.
CH 9 Cascode Stages and Current Mirrors 28
Bad Current Mirror Example II

 Although a path for base currents exists, this technique of


biasing is no better than resistive divider.

CH 9 Cascode Stages and Current Mirrors 29


Multiple Copies of IREF

IS, j
I copy, j  I REF
I S , REF
 Multiple copies of IREF can be generated at different
locations by simply applying the idea of current mirror to
more transistors.
CH 9 Cascode Stages and Current Mirrors 30
Current Scaling

I copy, j  nI REF

 By scaling the emitter area of Qj n times with respect to


QREF, Icopy,j is also n times larger than IREF. This is equivalent
to placing n unit-size transistors in parallel.
CH 9 Cascode Stages and Current Mirrors 31
Example: Scaled Current

CH 9 Cascode Stages and Current Mirrors 32


Fractional Scaling

1
I copy  I REF
3
 A fraction of IREF can be created on Q1 by scaling up the
emitter area of QREF.
CH 9 Cascode Stages and Current Mirrors 33
Example: Different Mirroring Ratio

 Using the idea of current scaling and fractional scaling,


Icopy2 is 0.5mA and Icopy1 is 0.05mA respectively. All coming
from a source of 0.2mA.
CH 9 Cascode Stages and Current Mirrors 34
Mirroring Error Due to Base Currents

nI REF
I copy 
1
1  n  1

CH 9 Cascode Stages and Current Mirrors 35
Improved Mirroring Accuracy

nI REF
I copy 
1
1  2 n  1

 Because of QF, the base currents of QREF and Q1 are mostly


supplied by QF rather than IREF. Mirroring error is reduced 
times.
CH 9 Cascode Stages and Current Mirrors 36
Example: Different Mirroring Ratio Accuracy

I REF
I copy1 
15
4 2

10 I REF
I copy 2 
15
4 2

CH 9 Cascode Stages and Current Mirrors 37


PNP Current Mirror

 PNP current mirror is used as a current source load to an


NPN amplifier stage.

CH 9 Cascode Stages and Current Mirrors 38


Generation of IREF for PNP Current Mirror

CH 9 Cascode Stages and Current Mirrors 39


Example: Current Mirror with Discrete Devices

 Let QREF and Q1 be discrete NPN devices. IREF and Icopy1 can
vary in large magnitude due to IS mismatch.

CH 9 Cascode Stages and Current Mirrors 40


MOS Current Mirror

 The same concept of current mirror can be applied to MOS


transistors as well.

CH 9 Cascode Stages and Current Mirrors 41


Bad MOS Current Mirror Example

 This is not a current mirror since the relationship between


VX and IREF is not clearly defined.
 The only way to clearly define VX with IREF is to use a diode-
connected MOS since it provides square-law I-V
relationship.
CH 9 Cascode Stages and Current Mirrors 42
Example: Current Scaling

 Similar to their bipolar counterpart, MOS current mirrors


can also scale IREF up or down (I1 = 0.2mA, I2 = 0.5mA).
CH 9 Cascode Stages and Current Mirrors 43
CMOS Current Mirror

 The idea of combining NMOS and PMOS to produce CMOS


current mirror is shown above.
CH 9 Cascode Stages and Current Mirrors 44

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