Offset-Compensated Switched-Capacitor Integrators

Wing-Hung Ki and Gabor C. Temes

Integrated Circuits and Systems Laboratory, Electrical Engineering Department
University of California, Los Angeles, CA 90024, U.S.A.
Let the op-amp DC gain be A = Up, the gain of the
Abstract integrator be k , and the op-amp unity-gain bandwidth f, be
In the first part of this paper, the performances of infinite. The output can be obtained during both phases,
several switched-capacitor (SC) integrators are compared. To with different aPy values. In general, the output samples in
facilitate the comparison, a novel description: the aPy both phases are offset - compensated, moreover, for the same
representation is introduced. Next, novel offset-compensated integrator, the magnitude error is smaller if the input and
(OC) circuits which reduce the capacitance spread in very output are sampled in the same phase (Table 1). One
large time-constant (VLT) SC integrators are presented. For interesting case is the Ki-89 integrator, which is structurally
all SC circuits, the theoretical equations are derived, and are the same as Nagaraj-86, but its magnitude error is smaller.
then confirmed by simulations. The output is sampled in Cpl, and k' = C I / C 2 has to be set
to 1; otherwise, as analysis shows, v,(n) will depends on
I) The a p y representation vifl(n-l) as well as vin(n). The parameters aPy of the
For an ideal delay-free inverting SC integrator, the out- integrators are tabulated in Table 1. Simplified expressions,
put v,(n) in the time domain can be expressed as obtained by expansion, are also shown. The entries show
that for each offset - compensated integrator, the output vol-
v o ( n ) = -kvifl(n) + v,(n-1) , (1)
tage has a very small dependence on the op-amp input offset
where k is the gain of the integrator, while the index n voltage Vos, since y is proportional to p = 1IA.
specifies the period nT 5 t < (n+1/2)T. In the non-ideal
As Table 1 shows, the Temes-89 integrator with its out-
case, the above equation will be modified by the finite gain
put sampled in $1 has the smallest magnitude error which
and offset voltage of the op-amp. The resulting relation is
does not depends on the integrator gain k , i.e.,
v,(n) = -kavifl(n) + pv,(n-1) + yVos . (2) m ( w ) = A a z -p,
€{ere, a modifies the gain of the non-ideal integrator; p is In filtering applications, integrators with very small phase
the new pole location; while y is the suppression factor of error are desirable. From Table 1, it is shown that the error
the offset voltage Vas. In the ideal case, a = p = 1, while in the pole location AP is proportional to p2 for all offset -
y = 0. The deviation from these values gives a measure of compensated integrator. Hence, as eqn.(4) shows, a very
performance of the integrator. This will be called the apy small phase error can be obtained.
representation. Let the magnitude error m ( w ) , and the phase If the op-amps are assumed to have infinite DC gains, it
error e(w) of the integrator be defined as in 111. If can be shown, either by analysis or by simulation, that the
a = l+Aa and p = 1+Ap such that Aa , @ Q: 1, and both phase error is zero for any op-amp unity-gain bandwidth f , .
are independent of frequency, then Although the op-amp gains are infinite, the relative integrator
m ( w ) z A a - AP/2 (3) gain I1 + m (w)I is not equal to 1 because of incomplete
charging due to the finite f , T product.
for all w, and it can be shown that the magnitude error is a Table 2 compares the time constants valid in each phase
weak function of frequency. Moreover, for all OC integra-
of each integrator. The clock period is T, so the duration of
tors to be compared, < Aa (as shown in Section 11), and
hence the magnitude errOr is further simplified to each phase is T/2. k t the output v,(n) be initially equal to
1, while the ideal output at (n+l)T be v,(n+l) = 0. Dom-
m ( w ) = Aa. The phase error is given by
inant pole approximation for the op-amp shows that the
tano(w) = - 1-P cotan(--)UT = - 3
cotan(--)COT . (4) dynamic of the integrator is of first order, with different time
l+P 2 2 2 constants for each phase, Z1 during Q1 = 1, and 22 during
For Ap <c wT 1 , @(a)= AP/wT. Clearly, it is solely AP $2 = 1. The final error is thus given by E = , with
that determines the phase error e(w). l/'teq = l/zl + 1/z2. For the SC integrators mentioned
The analysis of the non-inverting integrator is identical above, the final values for the two phases are different if
to the one given above, except that the first term in (2) is Vos is not zero. Then, the above expression is not directly
now replaced by +k avi, (n -1). applicable. Nevertheless, the time constants z1 and 22 govern
the speed of the integrators.
11) Comparison of offset-compensated SC integrators Table 2 also compares the complexities of the SC
Several offset-compensated SC inverting integrators are integrators. Besides component count and area requirement,
compared next. For each integrator, the name of the first the type of input signal needed is also an important factor in
author is assigned to the circuit, along with the year of pub- determining the complexity of the system containing the
lication. The basic stray-insensitive integrator (basic-79) [2- integrator. For the basic-79, Temes-84, Nagaraj-86, and Ki-
41, although not offset-compensated, is included to serve as a 89 integrators, the input signal is read during only one of the
reference for comparison (Figla). The SC inverting integra- clock phases, and hence an input track-and-hold (T/H) circuit
tors being compared are : Temes-84 [SI, Nagaraj-86 [6], is sufficient. In fact, if the output is sampled in the same
Larson-87 [ 7 ] , and two novel circuits, Temes-89, and Ki-89. phase as the input is read, no T/H is necessary. Also, a
Figs.lb to If show the above circuits. second integrator is directly cascadable to form a biquad.
CH2868-8/90/oooO-B29$1.000 1990 IEEE
For the Larson-87 and Temes-89 integrators, the input signal Acknowledgements
is read during both clock phases, so an input sample-and-hold
This research was supported in part by the National
is needed. If a second integrator needs to be cascaded to Aeronautics and Space Administration under Grant NCC 2-374,
the first, a 3-phase clock is required. and by the Rockwell International and the State of California
under MICRO Grant 88-046.
HI) Comparison of OC VLT SC integrators
In filtering applications, the gain of the integrator is usu-
ally very small, i.e. k < 1, and l/k also determines the time
constant of the circuit. In a conventional implementation, the
capacitance ratio CmaxlCminis then Ilk. It is often desirable References
to reduce this ratio. Many SC circuits have been developed Haug, K., Maloberti, F., and Temes, G. C. : "Switched-
to address this problem [8-141. Published and novel VLT capacitor integrators with low finite-gain sensitivity", Elec-
integrators are compared next. The nomenclature used for tron. Lett., v01.21, Nov., 1985, pp.1156-1157.
the integrators is the same as in Section 11. The Hui-80 [8] Martin, K., and Sedra, S., : "Strays-insensitive switched-
is a modification of the basic-79 integrator; Van Peteghem-83 capacitors filters based on bilinear z-transform", Electron.
[9] is that of Gregorian's integrator [15]; Ki-89#1 (Fig.2a) is Lett., vo1.19, June, 1979, pp.365-366.
that of the Temes-84 integrator [5]; Ki-89#2 (Fig.2b) is that Gregorian, R., and Nicholson, W. : "MOS switched-
of the Nagaraj-86 integrator [6]; and Ki-89#3 (Fig.2~)is that capacitor filters for a PCM voice codec", IEEE J. Solid-
of the Nagaraj-88 integrator [ 111. States Circuits, vol.SC-14, Dec., 1979, pp.970-980.
Two general methods can be identified for a 2-phase White, B. J., Jacobs, G. M., and Landsburg, G. F. : "A
VLT system : the capacitive T-cell approach, and the double monolithic dualtone multifrequency receiver", IEEE J.
integration approach. Solid-States Circuits, vol.SC-14, Dec., 1979, pp.991-997.
In the capacitive T-cell approach [8-IO], a T-cell acting Temes, G. C., and Haug, K. : "Improved offset-
as a voltage divider is used in the input branch of the SC compensated schemes for switched-capacitor circuits", Elec-
integrator. The input charge is attenuated by the T-cell tron. Lett., v01.20, June, 1984, pp.508-509.
before it is injected into the integrating capacitor, and
Nagaraj, K., Vlach, J., Viswanathan, T. R., and Singhal, K.
k = (Cmin/Cmax)2is achieved. The T-cell integrators com-
: "Switched- capacitor integrator with reduced sensitivity to
pared here are the Hui-80, Van Peteghem-83, Ki-89#1, and
amplifier gain", Electron. Lett., v01.22, 1986, pp.1103-1105.
Ki-89#2. Note that the T-cell is inherently parasitic sensitive,
since the value of the parasitic capacitor Cp enters all terms Larson, L. E., and Temes, G. C. : "Switched-capacitor
involving cb. Nevertheless, by carefully laying out the T- building-blocks with reduced sensitivity to finite amplifier
cell, the effect of Cp can often be made negligible [16]. gain, bandwidth, and offset voltage", ISCAS, 1987, pp.334-
338.
Since the capacitive T-cell is inherently parasitic sensi-
tive, alternate circuits have been developed to overcome this Hui, T., and Allstot, J. : "MOS switched-capacitor
problem [ll-131. The idea is to carry out the integration in highpasshotch ladder filters", ISCAS, 1980, pp.309-3 12.
two steps : first, the charge of a small input capacitor is Van Peteghem, P., and Sansen, W. : "T-cell SC integrator
injected into two capacitors in parallel, one large and one synthesises very large capacitance ratios", Electron. Lett.,
small; then, during the next phase, the charge in the large vo1.19, 1983, pp.541-543.
one is either cancelled [ll], or discharged [13], and the [lo] Sansen, W., and Van Peteghem, P. : "An area-efficient
charge in the small capacitor is used for the final integration. approach to the design of very-large time constants in
Nagaraj-88 [ l l ] is a VLT integrator using such approach. switched-capacitor integrators", IEEE J. of Solid-States
Analysis shows that this circuit is not offset compensated. Circ., VO~.SC-19, NO.5, Oct., 1984.
By adding an offset-storing capacitor C, the Ki-89#3 (Fig.2~)
[ l l ] Nagaraj, K. : "A novel parasitic insensitive switched-
is obtained. Huang-89 [13] applies a principle similar to the capacitor technique for realizing very large time constants",
Nagaraj-88 VLT integrator, and suffers from the same prob- IEEE 1988 Custom Int. Circ. Conf., 1988, pp.12.4.1-12.4.3.
lem. Again, C, can be introduced, but the circuit is then
Espinosa Flores-Verdad, G., and Montecchi, F. : "SC circuit
too complex to be useful.
for very large and accurate time constant integrators with
In most cases, in order to ensure optimal matching accu- low capacitance ratios", Electron. Lett., vo1.24, 1988,
racy, the number of different capacitor sizes should be pp. 1025-1026.
reduced to a minimum. Hence, for all the circuits mentioned
Huang, Q. : "A novel technique for the reduction of capaci-
above, we set cb=C&,=c, and all other capacitors equal
tance spread in high-Q SC circuits", IEEE Trans. on Circ.
to aC, a < 1. For the Huang-89, we set D l = D 2 = 1,
& SYS.,CAS-36, No.1, Jan., 1989, pp.121-126.
and G = a (refer to eqn.(6) of [13]). Also, we assumed the op-
amp bandwidth to be infinite. Table 3 summarizes the crpy Nagaraj, K. : "A parasitic-insensitive area-efficeint approach
parameters of all OC VLT inverting integrators mentioned under to realizing very large time constants in switched-capacitor
these conditions. circuits", IEEE Trans. on Circ. & Sys., vol.CAS-36, No.9,
Sept., 1989, pp.1210-1216.
It should be noted that the three novel integrators : Ki-89#1,
Ki-89#2, and Ki-89#3 have exceptionally small Ap values, which Gregorian, R. : "High resolution switched-capacitor D/A
indicate that a very small phase error is achieved. converter", Microelectron. J., no.12, 1981, pp.10-13.
Kaneshiro, R. T. et a1 : "High frequency switched-capacitor
filtering technique", ISCAS, 1983, pp.797-802.
2830
 Fig .1a Basic -79 Integrator Flg .1 b Temes -84 Integrator

F-hJ
41 i 7
41 \ 91 \ cl-cf-k

F i g . 1 ~ Nagaraj -86 Integrator

I
Fig .Id
i
Larson -87 Integrator
e2 c4
C1 =C3

111 $1
%=%=k
c2 c4
Ci=Cq

Fig.le Temes -89 Integrator Fig . I f Ki -89 Integrator

Fig.1 Offset-compensated SC integrators

Table 1 :Comparison of SC integrators using the ffPy criteria

Circuit a = l +Aa B = 1 +AB Y

basic79 -
1 =l-(l+k)p A zz 1-kp
k
=k
1+(I +k )M l+(l+k)u l+(l+k )u
1 kp
Temes84$1 ~

I+( 1+k)M
= 1-kp' =k p
(1+2u)(l+(l+k)u)
1
Temes84" = 1-(2+k)p as above as above
[1+2~][l$+k)p]
1 1 1 2+k kp
Ki89
1+( l+k)u = 1-(l+k)P ,~+~J;,l;l+;;~l
= l-kpZ I1+2ulll+(l+k )ul
=k p

Nagaraj86 l+p = l-(l+k+K)p 1+(2+k+k')p+(l+k'+kk')p' = l-kp2 kF

=k p
II +(l+k )wIIl+( 1+K)u1 I1+(l+k)ulI I H l +K )ul Il+(l+k)ulll+(l+K)ul
1+(2+3k)p+( l + k ) t Z k(l+k)p
Larson87$, 1
l+(l+k)u
= l-(l+k)p
Il+(l+k)ulIl+(l+2k)ul
= 1-k(l+k)p2
rl+(l+k)ulr 1+(1+2k)ul
= k(l+k)p
l+kp
Larson87 q2
I1+(l+k )ul I1+(I +2k )ul
= 1-2(l+k)p as above as above

1+2( l+k)p [ 1+p][ 1+2(l+k)pJ k(l+k)p

Temes89 9,
Il+(l+k)ulIl+(2+k )U
= 1-p l-k(l+k)p' = k(l+k)p
Il+ll+k)l,u 1+(2+k)yl Il+(l+k)ull1+(2+k~ul
Temes69h - 1 = 1-(2+k)p as above as above
1+(2+k )U

* $I or e2 indicates when the outpul is sampled

2831
 Table 2 :Comparison of the speed and complexity d the SC integrators

Circuit zl* z2 # of caps #of switches area of caps C,/C, input stage needed
basic-79 l+k 1 2 4 l+k k TM
Temes-84 l+k 2 3 5 1+2k k TM
Nagaraj-86 l+k l+k' 3 5 l+k+k' k T/H
Larson-87 l+k 1+2k 4 7 2+2k k S/H
Temes-89 l+k 2+k 4 5 l+2k+k2 k2 SIH
Ki-89 l+k 2 3 5 2+k k T/H

$1 iII%"
& c & & c,=c,=c,=c
Fig.2a Ki#1-89 Integrator Fig .2b Ki#2-89 Integrator
(phases m blankets for non-inverting integrator)

Fig.2 Offset-compensated very large

time-constant SC integrators

-- $2

CI = aC
- vo

Fig2c Ki #3-89 Integrator

Table 3 : Comparison of Very Large Time-Constant SC integrators

2832