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Implement 2:4 Decoder Using Pseudo NMOS Logic and Verify: Expt 8

A 2:4 decoder circuit was implemented using pseudo NMOS logic. The circuit was simulated and the outputs were verified for all possible input combinations. The circuit file includes 16 PMOS and NMOS transistors arranged to decode the two inputs A and B and drive the four outputs Y0, Y1, Y2 and Y3 as specified in the truth table. The circuit was simulated over 800 microseconds to verify the output behavior for different input patterns.

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182 views4 pages

Implement 2:4 Decoder Using Pseudo NMOS Logic and Verify: Expt 8

A 2:4 decoder circuit was implemented using pseudo NMOS logic. The circuit was simulated and the outputs were verified for all possible input combinations. The circuit file includes 16 PMOS and NMOS transistors arranged to decode the two inputs A and B and drive the four outputs Y0, Y1, Y2 and Y3 as specified in the truth table. The circuit was simulated over 800 microseconds to verify the output behavior for different input patterns.

Uploaded by

Purva
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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EXPT 8

Implement 2:4 Decoder using pseudo NMOS Logic and verify

Inputs Outputs
A B Y0 Y1 Y2 Y3
0 0 0 1 1 1
0 1 1 0 1 1
1 0 1 1 0 1
1 1 1 1 1 0
Circuit file:

*Decoder (2:4) using pseudo NMOS


.include "E:\VLSI_ July_Nov_2021\Lab_Work\EXPT 8\mosmodel.txt
VDD 1 0 DC 1.8V

VA 2 0 PULSE(0 1.8V 0 1N 1N 40U 80U)


VB 3 0 PULSE(0 1.8V 0 1N 1N 80U 160U)

M1 6 0 1 1 CMOSP L=0.18U W=0.36U


M2 6 4 7 0 CMOSN L=0.18U W=0.36U
M3 7 5 0 0 CMOSN L=0.18U W=0.36U

M4 8 0 1 1 CMOSP L=0.18U W=0.18U


M5 8 4 9 0 CMOSN L=0.18U W=0.36U
M6 9 3 0 0 CMOSN L=0.18U W=0.36U

M7 10 0 1 1 CMOSP L=0.18U W=0.36U


M8 10 2 11 0 CMOSN L=0.18U W=0.36U
M9 11 5 0 0 CMOSN L=0.18U W=0.36U

M10 12 0 1 1 CMOSP L=0.18U W=0.36U


M11 12 2 13 0 CMOSN L=0.18U W=0.36U
M12 13 3 0 0 CMOSN L=0.18U W=0.36U

M13 4 2 1 1 CMOSP L=0.18U W=0.72U


M14 4 2 0 0 CMOSN L=0.18U W=0.36U

M15 5 3 1 1 CMOSP L=0.18U W=0.72U


M16 5 3 0 0 CMOSN L=0.18U W=0.36U

.TRAN 0 800U

.END

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