ECE 636: Advanced Analog Integrated Circuits (Fall 2021)
Course Content: This course covers the design of complementary metal-oxide-semiconductor (CMOS) analog
integrated circuits at the transistor level, with an emphasis on the analysis and design of single-stage and multi-
stage amplifiers. Related topics including device modeling, biasing, stability, and noise will be presented. In
addition, an introduction to higher-level analog and mixed analog/digital systems, such as switched-capacitor
circuits, will be covered. Computer-aided design (CAD) software for circuit simulation will also be used.
Instructor:
Peter M. Levine, Ph.D., P.Eng.
Associate Professor, Department of Electrical and Computer Engineering
Office: E5 4012
Tel: 519-888-4567 ext. 31414
Email: [email protected]
Lecture Delivery Format and Schedule:
• Lectures will be delivered synchronously (live) online every Wednesday and Thursday at
11:30 AM-12:50 PM EDT starting Sept. 8, 2021.
• Lectures will be recorded.
• Asynchronous (pre-recorded) lectures may be provided in place of live lectures from time to time.
Instructor Office Hours:
• Office hours will be offered online starting the week of Sept. 13. The schedule for these will be established
during the first or second week of class. Attendance is optional and office hours will not be recorded.
• You can also email the instructor with your questions, but please allow 24-48 hours for a response.
Course Topics (may not be presented in the order shown):
• MOSFET physical characteristics, operating regions, and performance limits
• Systematic design of single-stage and two-stage amplifiers
• Biasing and reference circuits
• Feedback, stability, and settling
• Distortion
• Fully-differential amplifiers and common-mode feedback (CMFB) circuits
• Noise modeling and analysis
• Mismatch analysis
• Introduction to switched-capacitor (SC) circuits
Additional Course Topics (as time permits):
• Layout (physical design) of analog circuits
• Design of three-stage amplifiers
• Amplifier output stages (power amplifiers)
• Introduction to analog-to-digital converters (ADCs)
Background and Pre-requisites:
• Required: One of ECE 242, ECE 340, NE 344, BME 489, or equivalent. These undergraduate courses cover
cascode amplifiers, current mirrors, MOS/BJT differential and multi-stage amplifiers, frequency response,
feedback, etc. See chapters 8–11 of Sedra and Smith, 8th ed. for a complete list of topics.
• Required: An undergraduate-level course in (1) signals and systems and (2) linear control systems.
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Evaluation:
Review Problem Set: 5%
Mini-Projects: 15% (all equally weighted)
Project: 15%
Midterm exam: 15%
Final exam: 50%
Mini-Projects and Graded Review Problem Set: There will be three graded mini-projects which will normally
include circuit design problems and involve the use of CAD software. There will also be one graded problem set
meant as a review of your pre-requisite knowledge. Students will complete all mini-projects and the graded problem
set individually. Partial solutions to some problems may be released.
Non-graded Problem Sets: Pencil-and-paper-style problem sets will be made available periodically. These
problem sets are not graded and do not have to be submitted. Partial solutions to some problems in each set may be
released.
Project: The project will be assigned by the instructor and will involve transistor-level schematic design and
simulation of an analog system (e.g., first stage of a pipelined ADC, sample and hold amplifier, etc.) with various
performance specifications. Students will complete the project individually.
Midterm Exam: A timed online midterm exam will be given in weeks 6−8 of the term (to be determined). The
exam will be a pencil-and-paper-style exam and will be administered through the Crowdmark website. During the
midterm, you will be given a series of problems to solve and, after working them out, you will submit your scanned
or photographed solutions (or those written on a tablet computer) to the Crowdmark website. Exam conditions will
be provided at a later time.
Final Exam: There will be a final exam given during the regular Fall-term exam period. The final exam will be in
the same style as the midterm exam. Exam conditions will be provided at a later time. You will be responsible for
all material covered in the course.
CAD Software: You will use industry-standard circuit simulation software from Cadence (Virtuoso and Spectre)
and/or LTspice to complete the mini-projects and final project. No prior experience with these CAD tools is
required. However, it is expected that you are familiar with mathematical software such as MATLAB or Excel.
Note that you can obtain MATLAB, Excel, and other software from the Information Systems and Technology
website (https://uwaterloo.ca/information-systems-technology/).
Course Website:
• All relevant course materials will be posted on the ECE 636 course website on Learn
(https://learn.uwaterloo.ca).
• Course announcements will also be posted on Learn; please check Learn regularly for these.
Linux Support:
• For any issues related to Linux accounts, licensing, VPN access, etc., contact Eric Praetzel, ECE Lab
Instructor/Hardware Specialist (email: [email protected]).
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Reference Texts:
• P. R. Gray, P. J. Hurst, S. H. Lewis, and R. G. Meyer, Analysis and Design of Analog Integrated Circuits,
5th ed., Hoboken, NJ: Wiley, 2009.
• B. Razavi, Design of Analog CMOS Integrated Circuits, New York: McGraw-Hill, 2001 (1st ed.) or 2016
(2nd ed.).
• T. Chan Carusone, D. A. Johns, and K. W. Martin, Analog Integrated Circuit Design, 2nd ed., Hoboken,
NJ: Wiley, 2012.
• R. J. Baker, CMOS: Circuit Design, Layout, and Simulation, 3rd ed., Hoboken, NJ: Wiley, 2010. (Second
edition available online through University of Waterloo Libraries website.)
• W. M. C. Sansen, Analog Design Essentials, Dordrecht, The Netherlands: Springer, 2006 (Available online
through University of Waterloo Libraries website.)
• A. S. Sedra and K. C. Smith, Microelectronic Circuits, 6th ed. or later, New York: Oxford University Press.
Academic Integrity: In order to maintain a culture of academic integrity, members of the University of Waterloo
community are expected to promote honesty, trust, fairness, respect and responsibility. [Check
www.uwaterloo.ca/academicintegrity/ for more information.]
Plagiarism: For all mini-projects, final project, and the graded problem set, students are welcome to consult with
others. However, the material submitted by each student for evaluation must be the student’s own work. This means
that text, equations, analysis, diagrams, figures, graphs, tables, CAD files, simulation results, etc. must be the
student’s own and not copied from other sources. Students will be severely penalized if they are found to have
plagiarized submitted work.
Grievance: A student who believes that a decision affecting some aspect of his/her university life has been unfair
or unreasonable may have grounds for initiating a grievance. Read Policy 70, Student Petitions and Grievances,
Section 4, www.adm.uwaterloo.ca/infosec/Policies/policy70.htm. When in doubt please be certain to contact the
department’s administrative assistant who will provide further assistance.
Discipline: A student is expected to know what constitutes academic integrity [check
www.uwaterloo.ca/academicintegrity/] to avoid committing an academic offense, and to take responsibility for
his/her actions. A student who is unsure whether an action constitutes an offence, or who needs help in learning
how to avoid offences (e.g., plagiarism, cheating) or about “rules” for group work/collaboration should seek
guidance from the course instructor, academic advisor, or the undergraduate Associate Dean. For information on
categories of offences and types of penalties, students should refer to Policy 71, Student Discipline,
www.adm.uwaterloo.ca/infosec/Policies/policy71.htm. For typical penalties check Guidelines for the Assessment
of Penalties, www.adm.uwaterloo.ca/infosec/guidelines/penaltyguidelines.htm.
Appeals: A decision made or penalty imposed under Policy 70 (Student Petitions and Grievances) (other than a
petition) or Policy 71 (Student Discipline) may be appealed if there is a ground. A student who believes he/she has
a ground for an appeal should refer to Policy 72 (Student Appeals)
www.adm.uwaterloo.ca/infosec/Policies/policy72.htm.
Note for Students with Disabilities: AccessAbility Services, located in Needles Hall, Room 1401, collaborates
with all academic departments to arrange appropriate accommodations for students with disabilities without
compromising the academic integrity of the curriculum. If you require academic accommodations to lessen the
impact of your disability, please register with the AccessAbility Services at the beginning of each academic term.
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