Xtensa® SystemC® (XTSC)

Reference Manual

For Xtensa® Tools Version 12.0.9

Cadence Design Systems, Inc.

2655 Seely Ave.
San Jose, CA 95134
www.cadence.com
Copyright ©2006-2018 Cadence Design Systems, Inc.
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Issue Date: 04/2018

RG-2018.9

Cadence Design Systems, Inc.

2655 Seely Ave.
San Jose, CA 95134
www.cadence.com
 CONTENTS

Contents

Changes vii

1 Introduction 1
1.1 The XTSC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Using the XTSC Documentation . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.3 Changes from the Previous Version . . . . . . . . . . . . . . . . . . . . . . . 7

2 Namespace Index 19
2.1 Namespace List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3 Class Index 21
3.1 Class Hierarchy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

4 Class Index 27
4.1 Class List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5 File Index 33
5.1 File List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

6 Namespace Documentation 35
6.1 xtsc Namespace Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
6.2 xtsc_component Namespace Reference . . . . . . . . . . . . . . . . . . . . . 100

7 Class Documentation 107

7.1 address_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . 107
7.2 address_range Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 109
7.3 address_range Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 110
7.4 bit_field_info Struct Reference . . . . . . . . . . . . . . . . . . . . . . . . . . 111
7.5 input_definition Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 112
7.6 input_definition Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 114

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7.7 iterator_definition Class Reference . . . . . . . . . . . . . . . . . . . . . . . . 117

7.8 line_info Struct Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
7.9 nb_mm Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
7.10 output_definition Class Reference . . . . . . . . . . . . . . . . . . . . . . . . 121
7.11 output_definition Class Reference . . . . . . . . . . . . . . . . . . . . . . . . 123
7.12 output_definition Class Reference . . . . . . . . . . . . . . . . . . . . . . . . 126
7.13 output_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
7.14 pif_req_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
7.15 port_policy_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 131
7.16 register_definition Class Reference . . . . . . . . . . . . . . . . . . . . . . . . 132
7.17 req_cntl Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
7.18 req_rsp_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
7.19 req_rsp_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
7.20 request_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
7.21 request_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
7.22 request_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
7.23 request_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
7.24 resp_cntl Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
7.25 response_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . 151
7.26 response_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . 153
7.27 response_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . 155
7.28 response_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . 157
7.29 sc_unwind_exception Class Reference . . . . . . . . . . . . . . . . . . . . . . 159
7.30 statistic_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
7.31 stream_dumper Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 162
7.32 stream_dumper Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 163
7.33 subbank_activity Class Reference . . . . . . . . . . . . . . . . . . . . . . . . 164
7.34 tlm_bw_transport_if_impl Class Reference . . . . . . . . . . . . . . . . . . . 165
7.35 tlm_bw_transport_if_impl Class Reference . . . . . . . . . . . . . . . . . . . 167
7.36 tlm_fw_transport_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . 169
7.37 tlm_fw_transport_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . 171

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7.38 transaction_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 173

7.39 transaction_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 175
7.40 transaction_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 177
7.41 udma_descriptor Struct Reference . . . . . . . . . . . . . . . . . . . . . . . . 179
7.42 watchfilter_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 181
7.43 watchfilter_info Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 182
7.44 xtsc_address_range_entry Class Reference . . . . . . . . . . . . . . . . . . . 183
7.45 xtsc_arbiter Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 185
7.46 xtsc_arbiter_parms Class Reference . . . . . . . . . . . . . . . . . . . . . . . 206
7.47 xtsc_cache Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 218
7.48 xtsc_cache_parms Class Reference . . . . . . . . . . . . . . . . . . . . . . . 231
7.49 xtsc_command_handler_interface Class Reference . . . . . . . . . . . . . . . 235
7.50 xtsc_connection_interface Class Reference . . . . . . . . . . . . . . . . . . . 240
7.51 xtsc_core Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251
7.52 xtsc_core_parms Class Reference . . . . . . . . . . . . . . . . . . . . . . . . 376
7.53 xtsc_debug_if Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . 394
7.54 xtsc_debug_if_cap Class Reference . . . . . . . . . . . . . . . . . . . . . . . 399
7.55 xtsc_debug_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . . . 402
7.56 xtsc_debug_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . . . 405
7.57 xtsc_dma_descriptor Struct Reference . . . . . . . . . . . . . . . . . . . . . . 409
7.58 xtsc_dma_engine Class Reference . . . . . . . . . . . . . . . . . . . . . . . . 411
7.59 xtsc_dma_engine_parms Class Reference . . . . . . . . . . . . . . . . . . . 423
7.60 xtsc_dma_request Struct Reference . . . . . . . . . . . . . . . . . . . . . . . 428
7.61 xtsc_exception Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 430
7.62 xtsc_fast_access_block Class Reference . . . . . . . . . . . . . . . . . . . . 431
7.63 xtsc_fast_access_if Class Reference . . . . . . . . . . . . . . . . . . . . . . . 435
7.64 xtsc_fast_access_request Class Reference . . . . . . . . . . . . . . . . . . . 437
7.65 xtsc_fast_access_revocation_if Class Reference . . . . . . . . . . . . . . . . 450
7.66 xtsc_filter Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . 451
7.67 xtsc_initialize_parms Class Reference . . . . . . . . . . . . . . . . . . . . . . 458
7.68 xtsc_lookup Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 468

Xtensa SystemC (XTSC) Reference Manual v

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7.69 xtsc_lookup_driver Class Reference . . . . . . . . . . . . . . . . . . . . . . . 481

7.70 xtsc_lookup_driver_parms Class Reference . . . . . . . . . . . . . . . . . . . 490
7.71 xtsc_lookup_if Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . 495
7.72 xtsc_lookup_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . . . 499
7.73 xtsc_lookup_parms Class Reference . . . . . . . . . . . . . . . . . . . . . . . 502
7.74 xtsc_lookup_pin Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 511
7.75 xtsc_lookup_pin_parms Class Reference . . . . . . . . . . . . . . . . . . . . 518
7.76 xtsc_master Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 523
7.77 xtsc_master_parms Class Reference . . . . . . . . . . . . . . . . . . . . . . . 537
7.78 xtsc_master_tlm2 Class Reference . . . . . . . . . . . . . . . . . . . . . . . . 546
7.79 xtsc_master_tlm2_parms Class Reference . . . . . . . . . . . . . . . . . . . 555
7.80 xtsc_memory Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . 560
7.81 xtsc_memory_b Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 589
7.82 xtsc_memory_base Class Reference . . . . . . . . . . . . . . . . . . . . . . . 597
7.83 xtsc_memory_parms Class Reference . . . . . . . . . . . . . . . . . . . . . . 599
7.84 xtsc_memory_pin Class Reference . . . . . . . . . . . . . . . . . . . . . . . . 616
7.85 xtsc_memory_pin_parms Class Reference . . . . . . . . . . . . . . . . . . . 638
7.86 xtsc_memory_tlm2 Class Reference . . . . . . . . . . . . . . . . . . . . . . . 648
7.87 xtsc_memory_tlm2_parms Class Reference . . . . . . . . . . . . . . . . . . . 661
7.88 xtsc_memory_trace Class Reference . . . . . . . . . . . . . . . . . . . . . . . 668
7.89 xtsc_memory_trace_parms Class Reference . . . . . . . . . . . . . . . . . . 686
7.90 xtsc_mmio Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . 690
7.91 xtsc_mmio_parms Class Reference . . . . . . . . . . . . . . . . . . . . . . . 706
7.92 xtsc_mode_switch_if Class Reference . . . . . . . . . . . . . . . . . . . . . . 710
7.93 xtsc_module Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 714
7.94 xtsc_module_pin_base Class Reference . . . . . . . . . . . . . . . . . . . . . 718
7.95 xtsc_parms Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 733
7.96 xtsc_pif_respond_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . 759
7.97 xtsc_pin2tlm_lookup_transactor Class Reference . . . . . . . . . . . . . . . . 761
7.98 xtsc_pin2tlm_lookup_transactor_parms Class Reference . . . . . . . . . . . 766
7.99 xtsc_pin2tlm_memory_transactor Class Reference . . . . . . . . . . . . . . . 769

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7.100xtsc_pin2tlm_memory_transactor_parms Class Reference . . . . . . . . . . . 789

7.101xtsc_pin2tlm_wire_transactor< W, T > Class Template Reference . . . . . . 797
7.102xtsc_plugin_interface Class Reference . . . . . . . . . . . . . . . . . . . . . . 799
7.103xtsc_queue Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 803
7.104xtsc_queue_consumer Class Reference . . . . . . . . . . . . . . . . . . . . . 818
7.105xtsc_queue_consumer_parms Class Reference . . . . . . . . . . . . . . . . . 827
7.106xtsc_queue_parms Class Reference . . . . . . . . . . . . . . . . . . . . . . . 831
7.107xtsc_queue_pin Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 836
7.108xtsc_queue_pin_parms Class Reference . . . . . . . . . . . . . . . . . . . . 843
7.109xtsc_queue_pop_if Class Reference . . . . . . . . . . . . . . . . . . . . . . . 847
7.110xtsc_queue_pop_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . 850
7.111xtsc_queue_pop_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . 853
7.112xtsc_queue_pop_if_multi_impl Class Reference . . . . . . . . . . . . . . . . . 856
7.113xtsc_queue_producer Class Reference . . . . . . . . . . . . . . . . . . . . . 859
7.114xtsc_queue_producer_parms Class Reference . . . . . . . . . . . . . . . . . 870
7.115xtsc_queue_push_if Class Reference . . . . . . . . . . . . . . . . . . . . . . 875
7.116xtsc_queue_push_if_impl Class Reference . . . . . . . . . . . . . . . . . . . 879
7.117xtsc_queue_push_if_impl Class Reference . . . . . . . . . . . . . . . . . . . 882
7.118xtsc_queue_push_if_multi_impl Class Reference . . . . . . . . . . . . . . . . 885
7.119xtsc_ram_respond_if_impl Class Reference . . . . . . . . . . . . . . . . . . . 888
7.120xtsc_request Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 890
7.121xtsc_request_if Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 922
7.122xtsc_request_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . . 927
7.123xtsc_request_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . . 932
7.124xtsc_request_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . . 936
7.125xtsc_request_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . . 940
7.126xtsc_request_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . . 944
7.127xtsc_request_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . . 948
7.128xtsc_request_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . . 953
7.129xtsc_rer_lookup_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . 959
7.130xtsc_resettable Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 962

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7.131xtsc_respond_if Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 966

7.132xtsc_respond_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . . 969
7.133xtsc_respond_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . . 971
7.134xtsc_respond_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . . 974
7.135xtsc_respond_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . . 978
7.136xtsc_respond_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . . 980
7.137xtsc_respond_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . . 983
7.138xtsc_respond_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . . 985
7.139xtsc_response Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . 987
7.140xtsc_router Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 1004
7.141xtsc_router_parms Class Reference . . . . . . . . . . . . . . . . . . . . . . . 1026
7.142xtsc_sc_in_sc_bv_base_adapter< W, T > Class Template Reference . . . . 1038
7.143xtsc_sc_in_sc_bv_base_adapter_base< W, T > Class Template Reference . 1039
7.144xtsc_sc_in_sc_uint_base_adapter< W, T > Class Template Reference . . . . 1041
7.145xtsc_sc_in_sc_uint_base_adapter_base< W, T > Class Template Reference 1042
7.146xtsc_sc_out_sc_bv_base_adapter< W, T > Class Template Reference . . . . 1044
7.147xtsc_sc_out_sc_bv_base_adapter_base< W, T > Class Template Reference 1046
7.148xtsc_sc_out_sc_uint_base_adapter< W, T > Class Template Reference . . . 1048
7.149xtsc_sc_out_sc_uint_base_adapter_base< W, T > Class Template Reference1050
7.150xtsc_script_file Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 1052
7.151xtsc_signal_sc_bv_base Class Reference . . . . . . . . . . . . . . . . . . . . 1064
7.152xtsc_signal_sc_bv_base_floating Class Reference . . . . . . . . . . . . . . . 1066
7.153xtsc_signal_sc_uint_base Class Reference . . . . . . . . . . . . . . . . . . . 1068
7.154xtsc_slave Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1069
7.155xtsc_slave_parms Class Reference . . . . . . . . . . . . . . . . . . . . . . . . 1077
7.156xtsc_switch_registration Class Reference . . . . . . . . . . . . . . . . . . . . 1081
7.157xtsc_tlm22xttlm_transactor Class Reference . . . . . . . . . . . . . . . . . . . 1083
7.158xtsc_tlm22xttlm_transactor_parms Class Reference . . . . . . . . . . . . . . 1094
7.159xtsc_tlm2pin_memory_transactor Class Reference . . . . . . . . . . . . . . . 1097
7.160xtsc_tlm2pin_memory_transactor_parms Class Reference . . . . . . . . . . . 1122
7.161xtsc_tlm2pin_wire_transactor< W, T > Class Template Reference . . . . . . 1133

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7.162xtsc_tlm2pin_wire_transactor_base< W, T > Class Template Reference . . . 1135

7.163xtsc_tx_loader Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . 1138
7.164xtsc_tx_loader_parms Class Reference . . . . . . . . . . . . . . . . . . . . . 1150
7.165xtsc_tx_xfer Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 1153
7.166xtsc_tx_xfer_if Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . 1160
7.167xtsc_tx_xfer_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . . . 1162
7.168xtsc_udma Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1165
7.169xtsc_udma_parms Class Reference . . . . . . . . . . . . . . . . . . . . . . . 1182
7.170XTSC_VERSION_INFO_STRING Class Reference . . . . . . . . . . . . . . . 1187
7.171xtsc_wer_lookup_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . 1188
7.172xtsc_wire Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1191
7.173xtsc_wire_logic Class Reference . . . . . . . . . . . . . . . . . . . . . . . . . 1200
7.174xtsc_wire_logic_parms Class Reference . . . . . . . . . . . . . . . . . . . . . 1213
7.175xtsc_wire_parms Class Reference . . . . . . . . . . . . . . . . . . . . . . . . 1219
7.176xtsc_wire_read_if Class Reference . . . . . . . . . . . . . . . . . . . . . . . . 1224
7.177xtsc_wire_source Class Reference . . . . . . . . . . . . . . . . . . . . . . . . 1226
7.178xtsc_wire_source_parms Class Reference . . . . . . . . . . . . . . . . . . . . 1237
7.179xtsc_wire_write_if Class Reference . . . . . . . . . . . . . . . . . . . . . . . . 1242
7.180xtsc_wire_write_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . 1244
7.181xtsc_wire_write_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . 1247
7.182xtsc_wire_write_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . 1250
7.183xtsc_wire_write_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . 1253
7.184xtsc_wire_write_if_impl Class Reference . . . . . . . . . . . . . . . . . . . . . 1256
7.185xtsc_xttlm2tlm2_transactor Class Reference . . . . . . . . . . . . . . . . . . . 1259
7.186xtsc_xttlm2tlm2_transactor_parms Class Reference . . . . . . . . . . . . . . 1276

8 File Documentation 1283

8.1 documentation.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . 1283
8.2 xtsc.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1284
8.3 xtsc_address_range_entry.h File Reference . . . . . . . . . . . . . . . . . . . 1307
8.4 xtsc_arbiter.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 1309

Xtensa SystemC (XTSC) Reference Manual ix

CONTENTS

8.5 xtsc_cache.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 1311

8.6 xtsc_core.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1313
8.7 xtsc_dma_engine.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . 1315
8.8 xtsc_dma_request.h File Reference . . . . . . . . . . . . . . . . . . . . . . . 1317
8.9 xtsc_exception.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . 1318
8.10 xtsc_fast_access.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . 1319
8.11 xtsc_lookup.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 1321
8.12 xtsc_lookup_driver.h File Reference . . . . . . . . . . . . . . . . . . . . . . . 1323
8.13 xtsc_lookup_if.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . 1325
8.14 xtsc_lookup_pin.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . 1327
8.15 xtsc_master.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 1328
8.16 xtsc_master_tlm2.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . 1330
8.17 xtsc_memory.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . 1332
8.18 xtsc_memory_b.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . 1334
8.19 xtsc_memory_pin.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . 1336
8.20 xtsc_memory_tlm2.h File Reference . . . . . . . . . . . . . . . . . . . . . . . 1338
8.21 xtsc_memory_trace.h File Reference . . . . . . . . . . . . . . . . . . . . . . . 1340
8.22 xtsc_mmio.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1342
8.23 xtsc_mode_switch_if.h File Reference . . . . . . . . . . . . . . . . . . . . . . 1344
8.24 xtsc_module_pin_base.h File Reference . . . . . . . . . . . . . . . . . . . . . 1346
8.25 xtsc_parms.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 1348
8.26 xtsc_pin2tlm_lookup_transactor.h File Reference . . . . . . . . . . . . . . . . 1350
8.27 xtsc_pin2tlm_memory_transactor.h File Reference . . . . . . . . . . . . . . . 1351
8.28 xtsc_queue.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 1353
8.29 xtsc_queue_consumer.h File Reference . . . . . . . . . . . . . . . . . . . . . 1355
8.30 xtsc_queue_pin.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . 1357
8.31 xtsc_queue_pop_if.h File Reference . . . . . . . . . . . . . . . . . . . . . . . 1358
8.32 xtsc_queue_producer.h File Reference . . . . . . . . . . . . . . . . . . . . . . 1360
8.33 xtsc_queue_push_if.h File Reference . . . . . . . . . . . . . . . . . . . . . . 1362
8.34 xtsc_request.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 1364
8.35 xtsc_request_if.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . 1366

x Xtensa SystemC (XTSC) Reference Manual

 CONTENTS

8.36 xtsc_respond_if.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . 1368

8.37 xtsc_response.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . 1369
8.38 xtsc_router.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1371
8.39 xtsc_slave.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1373
8.40 xtsc_tlm22xttlm_transactor.h File Reference . . . . . . . . . . . . . . . . . . . 1375
8.41 xtsc_tlm2pin_memory_transactor.h File Reference . . . . . . . . . . . . . . . 1377
8.42 xtsc_tx_loader.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . 1379
8.43 xtsc_tx_xfer.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . 1381
8.44 xtsc_tx_xfer_if.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . 1383
8.45 xtsc_types.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1385
8.46 xtsc_udma.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1387
8.47 xtsc_wire.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1389
8.48 xtsc_wire_logic.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . . 1391
8.49 xtsc_wire_read_if.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . 1393
8.50 xtsc_wire_source.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . 1395
8.51 xtsc_wire_write_if.h File Reference . . . . . . . . . . . . . . . . . . . . . . . . 1397
8.52 xtsc_xttlm2tlm2_transactor.h File Reference . . . . . . . . . . . . . . . . . . . 1398

Xtensa SystemC (XTSC) Reference Manual xi

CONTENTS

xii Xtensa SystemC (XTSC) Reference Manual

 LIST OF FIGURES

List of Figures

7.1 xtsc_arbiter Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199

7.2 xtsc_core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279
7.3 xtsc_dma_engine Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . 420
7.4 xtsc_lookup Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 476
7.5 xtsc_lookup_driver Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . 487
7.6 xtsc_lookup_pin Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 517
7.7 xtsc_master Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 531
7.8 xtsc_tlm22xttlm_transactor Example . . . . . . . . . . . . . . . . . . . . . . . 552
7.9 hello_world Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 577
7.10 xtsc_tlm2pin_memory_transactor Example . . . . . . . . . . . . . . . . . . . 633
7.11 xtsc_xttlm2tlm2_transactor Example . . . . . . . . . . . . . . . . . . . . . . . 655
7.12 xtsc_memory_trace Example . . . . . . . . . . . . . . . . . . . . . . . . . . . 675
7.13 xtsc_mmio Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 698
7.14 xtsc_pin2tlm_memory_transactor Example . . . . . . . . . . . . . . . . . . . 785
7.15 xtsc_queue Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 813
7.16 xtsc_queue_consumer Example . . . . . . . . . . . . . . . . . . . . . . . . . 823
7.17 xtsc_queue_pin Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 842
7.18 xtsc_queue_consumer Example . . . . . . . . . . . . . . . . . . . . . . . . . 865
7.19 xtsc_router Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1018
7.20 xtsc_slave Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1074
7.21 xtsc_tlm22xttlm_transactor Example . . . . . . . . . . . . . . . . . . . . . . . 1090
7.22 xtsc_tlm2pin_memory_transactor Example . . . . . . . . . . . . . . . . . . . 1116
7.23 xtsc_tx_loader Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1148
7.24 xtsc_wire Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1196
7.25 xtsc_wire_logic Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1207
7.26 xtsc_wire_source Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1232
7.27 xtsc_xttlm2tlm2_transactor Example . . . . . . . . . . . . . . . . . . . . . . . 1271

Xtensa SystemC (XTSC) Reference Manual xiii

LIST OF FIGURES

xiv Xtensa SystemC (XTSC) Reference Manual

 Chapter 0. Changes

0. Changes from the Previous Version

For changes, see section 1.3 on page 7.

Xtensa SystemC (XTSC) Reference Manual xv

Chapter 0. Changes

xvi Xtensa SystemC (XTSC) Reference Manual

 Chapter 1. Introduction

1. Introduction

1.1 The XTSC Package

The Xtensa SystemC package (XTSC) supports both transaction-level modeling (TLM) and
pin-level modeling of Xtensa cores in a system-on-a-chip (SOC) SystemC simulation envi-
ronment.
Note: Transaction level modeling is a general concept that makes use of function calls to
simulate inter-module communication instead of toggling signals as is done in a pin-level
interface. Xtensa TLM, OSCI TLM1, and OSCI TLM2 are specific implementations of this
general concept. Although Xtensa TLM makes use of the general SystemC TLM mech-
anisms (sc_interface, sc_export, and sc_port) and can coexist with either OSCI TLM1 or
OSCI TLM2, it is important to point out that Xtensa TLM is not OSCI TLM1 nor OSCI
TLM2. Although Xtensa TLM is distinct from OSCI TLM1/TLM2, the XTSC packages in-
cludes transactor modules for converting memory interfaces between Xtensa TLM and
OSCI TLM2.
The XTSC package includes the following items:

1. The XTSC core library and the associated header files needed to use it. Among
other things, this library gives access to the Xtensa Instruction Set Simulator (ISS) in
the form of a SystemC module (sc_module) and to the Xtensa TLM interface classes
used for transaction-level intermodule communication.
2. The XTSC example component library and all source and header files needed to use
or re-build it. This library contains a set of configurable SOC example components in
the form of SystemC modules. These components include Xtensa TLM memory, ar-
biter, router, queue, and lookup modules; pin-level memory, queue, and lookup mod-
ules; transactors to convert memory interfaces between Xtensa TLM and pin-level;
and transactors to convert between Xtensa TLM and OSCI TLM2. The component
library also includes a set of testbench modules that drive a Xtensa TLM or pin-level
interface based on a script file. These testbench modules provide a convenient and
powerful means to perform system and module bring-up.
3. A set of example projects illustrating each of the Xtensa core and SOC component
modules.
4. The xtsc-run program to quickly build and simulate simple to complex systems com-
prised of XTSC components, to generated an sc_main.cpp file for later customization
by the user, or to generate the files necessary to co-simulate an arbitrary XTSC sys-
tem with user-provided Verilog modules. The xtsc-run program includes the --load_-
library command to support 3rd party plugin modules.

The XTSC core and component libraries are documented in this reference manaul.

Xtensa SystemC (XTSC) Reference Manual 1

Chapter 1. Introduction

1.1.1 XTSC Core Library

The XTSC core library contains objects in the xtsc namespace. This includes:

1. The xtsc::xtsc_core class that wraps an Xtensa ISS.

2. The xtsc::xtsc_udma class for modeling the external micro-DMA engine IP from Ca-
dence Tensilica.
3. The Xtensa TLM interface classes used for transaction-level intermodule communi-
cation.
4. A set of additional core classes that play a supporting role in XTSC.
5. A set of non-member functions used to setup and control the simulation run or per-
form various utility operations.

The static version of the XTSC core library is called libxtsc.a on Linux platforms and
xtsc.lib (for release builds) and xtscd.lib (for debug builds) on MS Windows platforms (the
shared/dynamic versions have a "_sh" suffix).

1.1.1.1 The xtsc_core Class

The xtsc_core class wraps an Xtensa Instruction Set Simulator in a SystemC module. It
includes methods to allow Xtensa TLM port binding to all the local memory ports, the
Xtensa Local Memory Interface (XLMI) port, the processor interface (PIF) port, all user-
defined Tensilica Instruction Extension (TIE) interfaces, and certain system-level input and
output ports. The TIE interfaces include output queues, input queues, lookups, export
states, and import wires. In addition, it supports pin-level ports for each of its TIE and
system-level ports.
The xtsc_core class also includes methods for loading the core’s program, loading simu-
lation clients, stepping the core, probing the core’s state, querying the core’s construction
parameters, and setting up the core for debugger control.

1.1.1.2 The Xtensa TLM Interface Classes

The Xtensa TLM interface classes play the major role in defining the transaction-level com-
munication between Xtensa cores and various SOC component modules. An arbitrary
TLM module can be connected to an xtsc_core module only if it is using the Xtensa TLM
interface classes.
The Xtensa TLM interface classes are:

Class Name Description

--------------------- -----------------------------------------------

2 Xtensa SystemC (XTSC) Reference Manual

 Chapter 1. Introduction

xtsc_request_if Defines methods used to send a request to a

memory bus slave.
xtsc_respond_if Defines the method used to send a response to a
memory bus master.
xtsc_queue_push_if Defines methods used to add an element to a
queue.
xtsc_queue_pop_if Defines methods used to remove an element from
a queue.
xtsc_lookup_if Defines methods used to look up a data value
using an address.
xtsc_wire_write_if Defines methods used to write a value to a
wire.
xtsc_wire_read_if Defines methods used to read a value from a
wire.

1.1.1.3 Core Library Non-member Functions

The XTSC core library includes many non-member functions and macros, such as:

1. Functions to configure simulation timing

2. Functions to initialize and finalize simulation
3. Functions and macros to configure and perform text logging
4. Utility functions to dump a byte array, perform string-to-variable conversion, and safely
copy and delete c-strings and c-string arrays

1.1.1.4 Additional Core Library Classes

In addition to the Xtensa TLM interface classes and the xtsc_core class, the XTSC core
library includes the following classes:

Class Name Description

------------------------------ ------------------------------------------------------------
xtsc_command_handler_interface C++ interface class to support the XTSC command facility.
xtsc_connection_interface C++ interface class to support generic connection.
xtsc_exception The class of exceptions thrown by the XTSC core and
component libraries.
xtsc_filter Container of key-value pairs supporting the watchfilter
concept.
xtsc_parms Base class used to define the construction parameters for
each of the XTSC core and SOC components.
xtsc_plugin_interface C++ interface class to support adding module plugins to
xtsc-run.
xtsc_request Encapsulates a PIF, XLMI, or local memory request.
xtsc_response Encapsulates a PIF, XLMI, or local memory response.
xtsc_script_file Utility class used to make it easy to process a script file
and to allow the user to have comments and to use
preprocessor constructs (such as #ifdef, #define, etc) in the
many script files used by XTSC components.

Xtensa SystemC (XTSC) Reference Manual 3

Chapter 1. Introduction

1.1.2 Example Component Library

The XTSC example component library contains objects in the xtsc_component namespace.
The XTSC component library module classes can be divided into three categories, de-
pending upon whether they are meant to model components of an SOC, are transactors for
converting from one communication abstraction to another, or whether they are test bench
components used to test core or SOC components.
The XTSC component library SOC modules are modeled at a more abstract level than
xtsc_core (which models the Xtensa processor to a high degree of accuracy). Because of
this abstraction, the modules may not exactly correspond to any real hardware implemen-
tation. However, the XTSC component library modules are highly configurable and if the
desired behavior is not available, you can modify the XTSC component library module or
write a new module to have the desired behavior.
The following list shows the SOC module names and a brief description:

Class Name Description

--------------------- -----------------------------------------------
xtsc_arbiter Configurable Xtensa TLM memory network arbiter.
It can also serve as an address translator.
xtsc_cache Configurable Xtensa TLM cache model.
xtsc_dma_engine Device to move memory-mapped data around the
system without tying up a processor.
xtsc_lookup Configurable device to look up a data value
given an address suitable for connection to a
TIE lookup interface of xtsc_core. This device
models a ROM-based lookup table or a custom
RAM.
xtsc_lookup_pin Configurable pin-level lookup.
xtsc_memory Configurable Xtensa TLM memory suitable for
connection to the PIF, XLMI, or local memory
interfaces of xtsc_core.
xtsc_memory_pin Configurable pin-level memory.
xtsc_memory_tlm2 Configurable OSCI TLM2 memory.
xtsc_mmio Configurable set of memory-mapped registers
that connect to general-purpose I/O ports.
xtsc_queue Configurable queue suitable for connection to a
TIE output queue interface and/or a TIE input
queue interface of xtsc_core.
xtsc_queue_pin Configurable pin-level queue.
xtsc_router Configurable Xtensa TLM memory network router.
It can also serve as an address translator.
xtsc_wire Configurable wire suitable for connection to a
TIE export state interface, a TIE import wire
interface, or a system output port interface
of xtsc_core.
xtsc_wire_logic Device to perform arbitrary logic using the
xtsc_write_write_if.

The following list shows the transactor module names and a brief description:

Class Name Description

4 Xtensa SystemC (XTSC) Reference Manual

 Chapter 1. Introduction

--------------------- -----------------------------------------------
xtsc_pin2tlm_memory_transactor
A transactor for converting any Xtensa
memory interface from pin-level to Xtensa TLM.
xtsc_tlm2pin_memory_transactor
A transactor for converting any Xtensa
memory interface from Xtensa TLM to pin-level.
xtsc_tlm22xttlm_transactor
A transactor for converting an OSCI TLM2
memory interface master to an Xtensa TLM memory
interface master.
xtsc_xttlm2tlm2_transactor
A transactor for converting an Xtensa TLM memory
interface master to an OSCI TLM2 memory
interface master.

The following list shows the test bench module names and a brief description:

Class Name Description

--------------------- -----------------------------------------------
xtsc_lookup_driver Configurable lookup driver that calls
nb_lookup() based on a script file.
Alternatively, this module can be configured to
drive pin-level interfaces by setting its
"pin_level" parameter to true.
xtsc_master Configurable Xtensa TLM memory interface master
that calls nb_request() based on a script file.
xtsc_master_tlm2 Configurable OSCI TLM2 memory interface master
that calls b_transport() based on a script file.
xtsc_memory_trace Device to generate a VCD file for waveform
tracing of the Xtensa TLM requests/responses.
xtsc_queue_consumer Configurable queue consumer that calls nb_pop()
based on a script file.
Alternatively, this module can be configured to
drive pin-level interfaces by setting its
"pin_level" parameter to true.
xtsc_queue_producer Configurable queue producer that calls
nb_push() based on a script file.
Alternatively, this module can be configured to
drive pin-level interfaces by setting its
"pin_level" parameter to true.
xtsc_slave Configurable memory interface slave that calls
nb_respond() based on a script file.
xtsc_wire_source Configurable wire source that calls nb_write()
based on a script file.
Alternatively, this module can be configured to
drive pin-level interfaces by setting its
"pin_level" parameter to true.

The static version of the XTSC component library is called libxtsc_comp.a on Linux plat-
forms, and xtsc_comp.lib (for release builds) and xtsc_compd.lib (for debug builds) on MS
Windows platforms (the shared/dynamic versions have a "_sh" suffix). The installation in-
cludes all header files needed to use the library as installed, and all implementation files,
header files, and make or project files needed to modify and re-build the library.

Xtensa SystemC (XTSC) Reference Manual 5

Chapter 1. Introduction

1.2 Using the XTSC Documentation

The XTSC documentation comes in four parts.

1. The Xtensa SystemC (XTSC) Reference Manual (this document)

2. The Xtensa SystemC (XTSC) User’s Guide (xtsc_ug.pdf)
3. The XTSC Examples
4. The xtsc-run reference manual (from xtsc-run --manual)

1.2.1 The Xtensa SystemC (XTSC) Reference Manual

The reference manual (this document) is distributed in three forms:

1. As a PDF file (xtsc_rm.pdf).

2. As HTML in a zipped file (XTSC_RM.zip).
3. As C++ header files.

The PDF and HTML forms of this document can be found in your Xtensa Xplorer installation
under (for example): .../XtDevTools/downloads/RG-2018.9/docs
The C++ headers files an be found at (for example): .../XtDevTools/install/tools/RG-2018.9-
linux/XtensaTools/include/xtsc ...-2018.9-win32
The PDF and HTML forms of this document are generated from the C++ header files using
the doxygen system (available from http://sourceforge.net/projects/doxygen).
The XTSC documentation is extensively cross-referenced and we find it easiest to use the
documentation on-line because the printed form loses the convenience of the hyper-linked
cross-references.
When viewing the PDF version of the reference manual using Adobe Reader, we find it
convenient to expand the "Class Documentation" bookmark so that all the classes are
listed along the left-hand side.
When viewing the HTML version using a browser that supports frames, the same thing can
be accomplished by expanding the "Class List" bookmark.

1.2.2 The Xtensa SystemC (XTSC) User’s Guide (xtsc_ug.pdf)

The user’s guide provides an introduction to the XTSC package, gets you going with the
XTSC examples, and tells you how the various pieces of XTSC tie together. In addition, it
includes a tutorial that uses the xtsc-run program as a vehicle to introduce the user to the
XTSC package.

6 Xtensa SystemC (XTSC) Reference Manual

 Chapter 1. Introduction

1.2.3 The XTSC Examples

The XTSC examples are installed with each Xtensa processor configuration. They are
meant to illustrate each of the XTSC modules as well as help jump-start custom mod-
ule development. The XTSC examples are documented in the "Xtensa SystemC (XTSC)
User’s Guide".

1.2.4 The xtsc-run reference manual

The xtsc-run reference manual is generated by xtsc-run itself. Because the output is quite
long you may wish to redirect it to a file. For Example:

xtsc-run --manual > xtsc-run.man

Please see the "Xtensa SystemC (XTSC) User’s Guide" for further documentation of the
xtsc-run program and for the xtsc-run tutorial.

1.2.5 Documentation Usage Guideline

The purpose of this reference manual is to document each class, each data member, each
method, and each parameter. Because of this it is painful to read straight through and
doing so is not the recommended way to gain an understanding of the XTSC package. The
user’s guide is meant to serve that purpose. On the other hand, the user’s guide does not
attempt to completely document any of the classes, members, etc. Its main purpose is to
orient you to the XTSC package, tell you how things tie together, and provide a roadmap of
where to go in the reference manual for complete information or which examples to look at
for concrete code.
In short, when using XTSC, Cadence recommends you keep all four parts of the docu-
mentation handy, use the tutorial in the user’s guide as the starting point, and refer to
the reference manuals and examples as required. For further guidelines, please consult
Chapter 1 of the user’s guide.

1.3 Changes from the Previous Version

The following changes were made to this document for the Xtensa Tools version 12.0.9
released with the Cadence Tensilica RG-2018.9 release.

• Allow loading the memories of an xtsc_core instance using a text file.

– See xtsc::xtsc_core::load_file().
– See the "load_file" command in xtsc::xtsc_core::execute().

Xtensa SystemC (XTSC) Reference Manual 7

Chapter 1. Introduction

– See the "SimLoadFile" parameter in xtsc::xtsc_core_parms.

• Optionally support extended PIF burst transactions of from 2 to 16 beats on the iDMA
port of LX configs.

– See the "iDMAPIFBurst" parameter in xtsc::xtsc_core_parms.

– See "iDMAPIFBurst" comments in xtsc::xtsc_core::Information_on_memory_-
interface_protocols.
– See "max_burst_beats" in xtsc_component::xtsc_xttlm2tlm2_transactor_parms.
– See "max_burst_beats" in xtsc_component::xtsc_tlm22xttlm_transactor_parms.

• Throw an exception in xtsc_component::xtsc_dma_engine if a descriptor of size 0

is encountered. See xtsc_component::xtsc_dma_engine_parms parameter "allow_-
size_zero" to override this behavior.

• Added new methods and commands to xtsc_component::xtsc_master to support in-

specting responses at run time:

– See "response_history_depth" in xtsc_component::xtsc_master_parms.

– See xtsc_component::xtsc_master::dump_response_history().
– See xtsc_component::xtsc_master::get_response().
– See xtsc_component::xtsc_master::get_response_history_count().
– See xtsc_component::xtsc_master::get_response_history_depth().
– See xtsc_component::xtsc_master::set_response_history_depth().
– See xtsc_component::xtsc_master::execute().

• Added new methods and commands to xtsc_component::xtsc_lookup to better con-

trol the device’s ready status:

– See "Deprecation Notice" in xtsc_component::xtsc_lookup_parms.

– See xtsc_component::xtsc_lookup::set_ready_enable().
– See xtsc_component::xtsc_lookup::get_ready_enable().
– See xtsc_component::xtsc_lookup::execute().

The following changes were made to this document for the Xtensa Tools version 12.0.8
released with the Cadence Tensilica RG-2017.8 release.

• Added ability to peek/poke a specific memory port without going through ISS decoder
logic:

– See commands "nb_peek" and "nb_poke" under xtsc::xtsc_core::execute().

• Added an example to show how to take an existing XTSC component library model
and modify it as a first step of custom model development.

8 Xtensa SystemC (XTSC) Reference Manual

 Chapter 1. Introduction

– See xtsc::xtsc_plugin_interface
– See the <xtsc_examples_root>/xtsc.component.plugin example in the installa-
tion of any config.

The following changes were made to this document for the Xtensa Tools version 12.0.7
released with the Cadence Tensilica RG-2017.7 release.

• Support having a single line Lua snippet using the "#lua" construct in xtsc::xtsc_-
script_file.
• Added support to xtsc_component::xtsc_dma_engine to allow overlapped reads and
writes, to allow overlapped descriptors, to allow unused descriptors to be pro-
grammed while the DMA engine is running, and to reuse the read request tag on
the corresponding write request for easier matching in the xtsc.log file:
– See "max_reads", "max_writes", "overlapped_descriptors", "start_at_index_1",
and "reuse_tag" in xtsc_component::xtsc_dma_engine_parms.
– See "start_at_index_1" and done_descriptor under xtsc_component::xtsc_-
dma_request and xtsc_component::xtsc_dma_request::done_descriptor.
• Added commands and methods to xtsc_component::xtsc_dma_engine to allow
dumping a descriptor or a range of descriptors:
– See the "dump_descriptor" and "dump_descriptors" commands under xtsc_-
component::xtsc_dma_engine::execute().
– See xtsc_component::xtsc_dma_engine::dump_descriptor().
– See xtsc_component::xtsc_dma_engine::dump_descriptors().
• Improved latency and lifetime tracking in xtsc_component::xtsc_memory_trace:
– See new parameters "allow_tracing" and "num_transfers" in xtsc_-
component::xtsc_memory_trace_parms.
– See xtsc_component::xtsc_memory_trace::dump_statistic_info().
– See xtsc_component::xtsc_memory_trace::dump_latency_histogram().
– See xtsc_component::xtsc_memory_trace::dump_lifetime_histogram().
– See xtsc_component::xtsc_memory_trace::get_counter().
• Allow parameter "num_ports" to be 0 in xtsc_component::xtsc_memory_parms.
• Allow subtracting out pin-level interfaces using a minus sign. See "SimPinLevelInter-
faces" in xtsc::xtsc_core_parms.
• Added ability to xtsc::xtsc_core to turn logging of disassembly on or off during simu-
lation:
– See command "log_disassembly" under xtsc::xtsc_core::execute().

Xtensa SystemC (XTSC) Reference Manual 9

Chapter 1. Introduction

– See xtsc::xtsc_core::log_disassembly().

• Improved ability to determine the clock factor and clock period factor during simula-
tion:

– See commands "get_clock_factor" and "get_clock_period_factor" under

xtsc::xtsc_core::execute().
– See xtsc::xtsc_core::get_clock_factor().
– See xtsc::xtsc_core::get_clock_period_factor().

• Added parameter "request_phase" to xtsc_component::xtsc_queue_producer_-

parms.

• Added commands "can_push", "get_push_ticket", "push", and "reset" to xtsc_-

component::xtsc_queue_producer::execute().

• Added commands "can_pop" and "pop" to xtsc_component::xtsc_queue_-

consumer::execute().

• Added new methods to xtsc_component::xtsc_queue:

– See xtsc_component::xtsc_queue::peek().
– See xtsc_component::xtsc_queue::poke().
– See xtsc_component::xtsc_queue::num_available().
– See xtsc_component::xtsc_queue::num_free().

• Added new commands "get_bit_width" and "get_ticket" to xtsc_component::xtsc_-

queue::execute().

• Added new method xtsc::xtsc_strtostrvector().

• Added new method xtsc::xtsc_request::get_type().

The following changes were made to this document for the Xtensa Tools version 12.0.5
released with the Cadence Tensilica RG-2017.5 release.

• Note: Users building the simulator using OSCI/ASC XTSC libraries on MS Windows
now need to add advapi32.lib to the link line.

• Note: Users building the simulator using OSCI/ASC XTSC libraries on Linux now
need to link with the realtime library (-l rt).

• Added support for using host OS shared memory in XTSC:

– Note: An introduction and centralized cross-reference to host OS shared mem-

ory support in XTSC is available in the XTSC User’s Guide (xtsc_ug.pdf) in Sec-
tion 6.8 "Host OS Shared Memory in XTSC".

10 Xtensa SystemC (XTSC) Reference Manual

 Chapter 1. Introduction

– See "host_shared_memory" and "shared_memory_name" in xtsc_-

component::xtsc_memory_parms, xtsc_component::xtsc_memory_tlm2_-
parms, xtsc_component::xtsc_queue_parms, and xtsc_component::xtsc_wire_-
parms.
– See commands "shmem_get", "shmem_list", "shmem_dump", "shmem_peek",
and "shmem_poke" under xtsc::xtsc_command_handler_commands.
– Added new method xtsc::xtsc_get_shared_memory().
– Added new method xtsc::xtsc_byte_array_to_sc_unsigned().
– Added new method xtsc::xtsc_sc_unsigned_to_byte_array().
• Note: A problem with logging wall time to millisecond accuracy on MS Windows has
been fixed in the log4xtensa library. See <xtsc_examples_root>/TextLogger.txt for
how to do this.
• Added xtsc::xtsc_command_handler_interface support to xtsc_component::xtsc_-
queue_consumer. See xtsc_component::xtsc_queue_consumer::execute().
• Added xtsc::xtsc_command_handler_interface support to xtsc_component::xtsc_-
wire. See xtsc_component::xtsc_wire::execute().
• Added "peek" and "poke" commands to xtsc_component::xtsc_memory_-
tlm2::execute().
• Added new method xtsc::xtsc_host_milliseconds() to get the current time in millisec-
onds since an unspecified start time.
– See "xtsc_host_milliseconds" under xtsc::xtsc_command_handler_commands.
• Added new method xtsc::xtsc_host_sleep() to do an OS-level sleep for a specified
number of milliseconds.
– See "xtsc_host_sleep" under xtsc::xtsc_command_handler_commands.
• Added new command "whoami" to allow the same file to be used as the "script_file" in
multiple testbench module instances. See xtsc::xtsc_command_handler_commands.
• Added new command "xtsc_get_system_clock_factor". See xtsc::xtsc_command_-
handler_commands.
• Added an optional kind pattern to the xtsc::xtsc_dump_systemc_objects() method
and command.
• Added new predefined macro XTSC_SCRIPT_FILE_PATH_ESC to xtsc::xtsc_-
script_file.
• Added new method xtsc::xtsc_core::is_fast_functional_mode() and command with
the same name. See xtsc::xtsc_core::execute().
• Added experimental support for using host OS mutexes in XTSC.

Xtensa SystemC (XTSC) Reference Manual 11

Chapter 1. Introduction

– See "host_mutex" in xtsc_component::xtsc_memory_parms.

– See xtsc::xtsc_host_mutex_open().
– See xtsc::xtsc_host_mutex_lock().
– See xtsc::xtsc_host_mutex_try_lock().
– See xtsc::xtsc_host_mutex_unlock().
– See xtsc::xtsc_host_mutex_close().
– See similarly named commands plus the "xtsc_host_mutex_dump" command
under xtsc::xtsc_command_handler_commands.

• Added support for routing base based on transaction priority to xtsc_-

component::xtsc_router. See "route_by_priority" in xtsc_component::xtsc_router_-
parms. When used in conjunction with "arbitration_policy" in xtsc_component::xtsc_-
arbiter_parms this effectively adds the ability to arbitrate based on transaction priority.

• Added watchfilter support to xtsc_component::xtsc_memory

– New method xtsc_component::xtsc_memory::man()

– New method xtsc_component::xtsc_memory::watchfilter_add()
– New method xtsc_component::xtsc_memory::watchfilter_dump()
– New method xtsc_component::xtsc_memory::watchfilter_remove()
– New XTSC command facility commands. See xtsc_component::xtsc_-
memory::execute():
* dump_filtered_request
* dump_filtered_response
* watchfilter_add <FilterName> <EventName>
* watchfilter_dump
* watchfilter_remove <Watchfilter> | ∗

• Enhanced ability to use Lua in XTSC:

– Added new function xtsc::xtsc_add_lua_script_file() and new xtsc-run command

-add_lua_script_file=<LuaScriptFile>
– Added new method xtsc::xtsc_script_file::evaluate_lua_expression() which re-
turns the result of evaluating a Lua expression.
– Added ability to xtsc::xtsc_core for a Lua function to be used to service an ISS
user simcall or for a Lua function to be called when a breakpoint occurs in Xtensa
target code.
* See the "lua_function" entries under "SimScriptFile" in xtsc::xtsc_core_-
parms.
– Added ability to xtsc_component::xtsc_memory for a Lua function to be called
when an xtsc::xtsc_request is received matching specified criteria.

12 Xtensa SystemC (XTSC) Reference Manual

 Chapter 1. Introduction

* See "LUA_FUNCTION luaFunction" and "Example 6" under "script_file" in

xtsc_component::xtsc_memory_parms.
– Added ability to xtsc_component::xtsc_router for Lua functions to be used during
simulation to get the outgoing port and translated address given the incoming
address.
* See "lua_function" under "routing_table" in xtsc_component::xtsc_router_-
parms.
– Added ability to xtsc_component::xtsc_lookup for Lua functions to be used dur-
ing simulation to get the lookup data and delay given the lookup address.
* See "lua_function" under "lookup_table" in xtsc_component::xtsc_lookup_-
parms.
– Added ability to xtsc_component::xtsc_wire_logic for Lua functions to be used
to compute outputs based on inputs.
* See "lua_function" under "definition_file" in xtsc_component::xtsc_wire_-
logic_parms.
• Enhanced access to XTSC from Lua code:
– Lua function xtsc.user_state_set() will call C++ function xtsc::xtsc_user_state_-
set()
– Lua function xtsc.user_state_get() will call C++ function xtsc::xtsc_user_state_-
get()
– Lua function xtsc.throw() will do a C++ throw of xtsc::xtsc_exception
– Lua functions for accessing XTSC peek/poke data payload strings:
PokeBytes = xtsc.num_to_poke_bytes(Number, NumBytes)
Number = xtsc.peek_bytes_to_num(PeekBytes, NumBytes)
– New C++ functions
int xtsc_num_to_poke_bytes(lua_State *L);
int xtsc_peek_bytes_to_num(lua_State *L);

• Added support for nb_transport in xtsc_component::xtsc_xttlm2tlm2_transactor:

– Added new xtsc_component::xtsc_xttlm2tlm2_transactor_parms parameters:
"use_nb_transport", "turbo_switch", and "revoke_on_dmi_hint".
– Enhanced xtsc_component::xtsc_memory_tlm2 to help test nb_transport:
* Added new xtsc_component::xtsc_memory_tlm2_parms parameters: "nb_-
transport_delay", "test_tlm_accepted", and "test_end_req_phase".
* Added new commands to xtsc_component::xtsc_memory_tlm2::execute():
"allow_dmi", "invalidate_direct_mem_ptr", "nb_transport_delay", "test_-
end_req_phase", "test_tlm_accepted", and "tlm_response_status".

The following changes were made to this document for the Xtensa Tools version 12.0.4
released with the Cadence Tensilica RG-2016.4 release.

Xtensa SystemC (XTSC) Reference Manual 13

Chapter 1. Introduction

• Note: XTSC libraries for co-simulation with 32-bit releases of Mentor Graphics Ques-
taSim and Synopsys VCS are deprecated in this release. Libraries for 64-bit simula-
tors will continue to be supported, but 32-bit libraries will be discontinued in a future
release.
• Added support for creating multiple XTSC log files in the same directory at the same
time. With this release, a TextLogger.txt entry of

log4xtensa.appender.file.File=xtsc$(XTSC_LOG_UNIQUIFIER).log

will be translated like the following depending on the value of environment variable
XTSC_LOG_UNIQUIFIER:

XTSC_LOG_UNIQUIFIER XTSC Log File Name

------------------- ------------------
"ProgA" xtscProgA.log
".ProgA" xtsc.ProgA.log
"" xtsc.log
Not Defined xtsc-NNNNN.log (where NNNNN is the process ID, i.e. the PID)

• Added xtsc::xtsc_core_parms parameter "SimTargetProgramReload" which defaults

to true for SystemC-Verilog cosimulation builds and false for other builds. When
true, any target program(s) specified by the "SimTargetProgram" parameter will be
re-loaded 1 SystemC time resolution after xtsc::xtsc_core::reset() is called.
• Added support for the new 32-bit system-level input to xtsc::xtsc_core called AltRe-
setVec.
– The input defaults to TLM but can be set to pin-level using the xtsc::xtsc_core_-
parms parameter "SimPinLevelInterfaces".
– If the TLM input is unconnected its initial value will be as set by the xtsc::xtsc_-
core_parms parameter also called "AltResetVec".
* The default value of this parameter is the same as the default value of the
"StaticVectorBase1" parameter.
– If desired, the TLM input can be left unconnected and its value set by a method:
* See void xtsc::xtsc_core::set_alt_reset_vec(xtsc::xtsc_address address)
– If desired, the TLM input can be left unconnected and its value set by an XTSC
command facility command:
* See set_alt_reset_vec under xtsc::xtsc_core::execute
– Regardless of whether or not the input is connected, its value can be obtained
by method or command:
* See xtsc::xtsc_address xtsc::xtsc_core::get_alt_reset_vec()
* See get_alt_reset_vec under xtsc::xtsc_core::execute
• Moved functionality of xtsc_component::xtsc_memory_base to xtsc::xtsc_memory_b
so it could be used from the XTSC core library.

14 Xtensa SystemC (XTSC) Reference Manual

 Chapter 1. Introduction

– Deprecated interface of xtsc_component::xtsc_memory_base left in place for

backward compatibility.

The following changes were made to this document for the Xtensa Tools version 12.0.3
released with the Cadence Tensilica RG-2016.3 release.

• The port-binding informatation in xtsc_core was updated to reflect the use of the
xtsc_connect() method.
– See xtsc::xtsc_core::How_to_do_port_binding
– See xtsc::xtsc_core::How_to_do_memory_port_binding
– See xtsc::xtsc_core::How_to_do_tie_lookup_binding
– See xtsc::xtsc_core::How_to_do_tie_queue_binding
– See xtsc::xtsc_core::How_to_do_tie_import_wire_binding
– See xtsc::xtsc_core::How_to_do_tie_export_state_binding
– See xtsc::xtsc_core::How_to_do_system_input_wire_binding
– See xtsc::xtsc_core::How_to_do_system_output_wire_binding
– See xtsc::xtsc_core::How_to_do_output_pin_binding;
– See xtsc::xtsc_core::How_to_do_input_pin_binding;
• Added support to xtsc_component::xtsc_pin2tlm_memory_transactor for scenarios
where the master device is only allowed to have 1 request outstanding at a time.
– See the "one_at_a_time" parameter of xtsc_component::xtsc_pin2tlm_-
memory_transactor_parms.
• Exposed xtsc::xtsc_dump_systemc_objects as an XTSC command and added sup-
port for an optional pattern.
• Improved documentation of xtsc::xtsc_reset().
• Log PIF request priority xtsc::xtsc_request::dump() so it is visible in the xtsc.log file.

The following changes were made to this document for the Xtensa Tools version 12.0.1
released with the Cadence Tensilica RG-2015.1 release.

• To satisfy the Xtensa ISS requirement to always get PIF/iDMA write responses, the
xtsc::xtsc_core model will now generate fake write responses by default on configs
which do not have write responses configured. See "SimPIFFakeWriteResponses"
in xtsc::xtsc_core_parms and "write_responses" in xtsc_component::xtsc_memory_-
parms.
• XTSC now supports DataRAM subbanks:
– See "DataRAMSubbanks" in xtsc::xtsc_core_parms.

Xtensa SystemC (XTSC) Reference Manual 15

Chapter 1. Introduction

– See "num_subbanks" in xtsc_component::xtsc_tlm2pin_memory_transactor_-

parms.
– See "num_subbanks" in xtsc_component::xtsc_memory_pin_parms.
– See xtsc::xtsc_core::is_subbanked_dram().
– See xtsc::xtsc_core::is_subbanked_dram0().
– See xtsc::xtsc_core::is_subbanked_dram1().
– See xtsc::xtsc_core::memory_port.
– See xtsc::xtsc_core::MEM_DRAM0B0S00, xtsc::xtsc_core::MEM_-
DRAM0B0S01, ..., xtsc::xtsc_core::MEM_DRAM0B3S15.
– See xtsc::xtsc_core::MEM_DRAM1B0S00, xtsc::xtsc_core::MEM_-
DRAM1B0S01, ..., xtsc::xtsc_core::MEM_DRAM1B3S15.
– See xtsc::xtsc_core::How_to_do_memory_port_binding entries "dram0bs" and
"dram0b0s00", "dram0b0s01", ..., "dram0b3s15".
– See xtsc::xtsc_core::How_to_do_memory_port_binding entries "dram1bs" and
"dram1b0s00", "dram1b0s01", ..., "dram1b3s15".
• XTSC now has improved reset support using SystemC 2.3 thread process reset
mechanisms.
– See xtsc::xtsc_resettable.
– See xtsc::xtsc_reset().
– See xtsc::xtsc_reset_processes().
• The xtsc-run program can now be used to dump the contents of an xtsc::xtsc_script_-
file with all preprocessing applied. For example:

xtsc-run -dump_script_file=my_script_file.vec

• The XTSC command facility has been enhanced to allow querying and setting log
levels. You can get more information using xtsc-run:

xtsc-run -cmd
cmd: man *log*

The following changes were made to this document for the Xtensa Tools version 12.0.0
released with the Cadence Tensilica RG-2015.0 release.

• Added support for the internal DMA (iDMA) interfaces to xtsc::xtsc_core. This in-
cludes the iDMA memory interface, the "TrigIn_iDMA" system-level input, and the
"TrigOut_iDMA" system-level output. Xtensa TLM and pin-level are supported in
XTSC.
– See the "iDMACount" and "SimPinLevelInterfaces" parameters of xtsc::xtsc_-
core_parms.

16 Xtensa SystemC (XTSC) Reference Manual

 Chapter 1. Introduction

– See MEM_IDMA0 in enum xtsc::xtsc_core::memory_port.

– See xtsc::xtsc_core::set_trigin_idma().
– See xtsc::xtsc_core::get_trigin_idma().
– See the "set_trigin_idma" and "get_trigin_idma" commands in xtsc::xtsc_-
core::execute().
– See xtsc::xtsc_core::get_system_input_wire().
– See xtsc::xtsc_core::get_system_output_wire().
– See the <xtsc_examples_root>/xtsc_core.idma example in the installation of
your iDMA-capable config.
• Added Xtensa TLM and pin-level support for the PArithmeticException interface to
xtsc::xtsc_core.
– See the "HasArithmeticException" and "SimPinLevelInterfaces" parameters of
xtsc::xtsc_core_parms.
– See xtsc::xtsc_core::get_system_output_wire().
• Added Xtensa TLM and pin-level support for POReqDomain and POReqDomain_-
iDMA to XTSC.
– See the "HasPIFReqDomain" parameter of xtsc::xtsc_core_parms.
– See xtsc::xtsc_request::m_pif_req_domain.
– See xtsc::xtsc_request::get_pif_req_domain().
– See xtsc::xtsc_request::set_pif_req_domain().
– See xtsc::xtsc_request::dump().
– See the "PIF_DOMAIN" entry of the "script_file" parameter of xtsc_-
component::xtsc_master_parms.
– See the "has_pif_req_domain" entry in xtsc_component::xtsc_tlm2pin_-
memory_transactor_parms, xtsc_component::xtsc_memory_pin_parms, and
xtsc_component::xtsc_pin2tlm_memory_transactor_parms.
• Support exclusive load/store in XTSC.
– See the "MasterExclAccess" and "SlaveExclAccess" parameters of xtsc::xtsc_-
core_parms.
– An xtsc::xtsc_request object has a flag to indicate if it is an exclu-
sive request. See xtsc::xtsc_request::m_exclusive, xtsc::xtsc_request::get_-
exclusive(), xtsc::xtsc_request::set_exclusive(), and xtsc::xtsc_request::dump().
– An xtsc::xtsc_response object has a flag to indicate if it is from an ex-
clusive request and if exclusive access was successful. See xtsc::xtsc_-
response::m_exclusive_req, xtsc::xtsc_response::m_exclusive_ok, xtsc::xtsc_-
response::get_exclusive_req(), xtsc::xtsc_response::get_exclusive_ok(),
xtsc::xtsc_response::set_exclusive_ok(), and xtsc::xtsc_response::dump().

Xtensa SystemC (XTSC) Reference Manual 17

Chapter 1. Introduction

– The xtsc_component::xtsc_memory class can be enabled to support exclusive

access. See the "support_exclusive" and "exclusive_script_file" parameters
of xtsc_component::xtsc_memory_parms and the "dump_exclusive_monitors",
"get_exclusive_monitors_count", "get_total_exclusive_monitors_created", and
"support_exclusive" commands in xtsc_component::xtsc_memory::execute().
Note: At the end of simulation, the xtsc_component::xtsc_memory class logs
the total number of exclusive monitors created (if any) and the number of exclu-
sive monitors currently active (if any) to the xtsc.log file.
– The xtsc_component::xtsc_master class can generate exclusive requests. See
"EXCLUSIVE" under "script_file" in xtsc_component::xtsc_master_parms.
– The xtsc::xtsc_filter class supports filtering requests and responses based on
exclusive.
– See "AXIExclID" in xtsc_component::xtsc_pin2tlm_memory_transactor.
– See the "axi_exclusive" and "axi_exclusive_id" parameters of xtsc_-
component::xtsc_pin2tlm_memory_transactor_parms.

• Added support for PIF Attributes to xtsc_component::xtsc_cache.

– See the "use_pif_attributes" parameter of xtsc_component::xtsc_cache_parms.
• Add named events "m_write_event" and "m_poke_event" to xtsc_component::xtsc_-
mmio.

• Add commands "peek" and "poke" to xtsc_component::xtsc_mmio. See xtsc_-

component::xtsc_mmio::execute.
• Honor the "memory_fill_byte" setting in xtsc_component::xtsc_memory::reset(true)
and xtsc_component::xtsc_memory_tlm::reset(true).
– See the "memory_fill_byte" parameter of xtsc_component::xtsc_memory_-
parms and xtsc_component::xtsc_memory_tlm2_parms.
• Note: The name of the Lua library was changed from lua to xtlua.
• Note: Support has been added for issuing XTSC commands from xt-gdb through the
ISS cmdloop using "iss xtsc ...". For example:

(xt-gdb) iss help xtsc

(xt-gdb) iss xtsc help
(xt-gdb) iss xtsc sc sc_time_stamp

18 Xtensa SystemC (XTSC) Reference Manual

 Chapter 2. Namespace Index

2. Namespace Index

2.1 Namespace List

Here is a list of all documented namespaces with brief descriptions:

xtsc (All xtsc library objects (non-member functions, non-member data, and
classes including xtsc_core) and their associated typedef and enum
types are in the xtsc namespace ) . . . . . . . . . . . . . . . . . . . . . . 35
xtsc_component (All XTSC component library objects are in the xtsc_component
namespace ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

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Chapter 2. Namespace Index

20 Xtensa SystemC (XTSC) Reference Manual

 Chapter 3. Class Index

3. Class Index

3.1 Class Hierarchy

This inheritance list is sorted roughly, but not completely, alphabetically:

address_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
address_range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
address_range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
bit_field_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
input_definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
input_definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
iterator_definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
line_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
nb_mm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
output_definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
output_definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
output_definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
output_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
pif_req_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
port_policy_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
register_definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
req_cntl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
req_rsp_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
req_rsp_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
request_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
request_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
request_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
request_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
resp_cntl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
response_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
response_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
response_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
response_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
sc_unwind_exception . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
statistic_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
stream_dumper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
stream_dumper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
subbank_activity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
tlm_bw_transport_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
tlm_bw_transport_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
tlm_fw_transport_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
tlm_fw_transport_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171

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Chapter 3. Class Index

transaction_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173
transaction_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
transaction_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
udma_descriptor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179
watchfilter_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
watchfilter_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182
xtsc_address_range_entry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183
xtsc_command_handler_interface . . . . . . . . . . . . . . . . . . . . . . . . . . . 235
xtsc_core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251
xtsc_udma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1165
xtsc_arbiter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185
xtsc_lookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 468
xtsc_master . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 523
xtsc_master_tlm2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 546
xtsc_memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 560
xtsc_cache . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218
xtsc_dma_engine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 411
xtsc_memory_tlm2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 648
xtsc_memory_trace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 668
xtsc_mmio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 690
xtsc_queue . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 803
xtsc_queue_consumer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 818
xtsc_queue_producer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 859
xtsc_router . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1004
xtsc_tlm22xttlm_transactor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1083
xtsc_tlm2pin_memory_transactor . . . . . . . . . . . . . . . . . . . . . . . . . . 1097
xtsc_wire . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1191
xtsc_wire_logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1200
xtsc_xttlm2tlm2_transactor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1259
xtsc_connection_interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240
xtsc_module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 714
xtsc_core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251
xtsc_tx_loader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1138
xtsc_udma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1165
xtsc_arbiter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185
xtsc_lookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 468
xtsc_lookup_driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 481
xtsc_lookup_pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 511
xtsc_master . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 523
xtsc_master_tlm2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 546
xtsc_memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 560
xtsc_memory_pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 616
xtsc_memory_tlm2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 648
xtsc_memory_trace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 668

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xtsc_mmio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 690
xtsc_pin2tlm_lookup_transactor . . . . . . . . . . . . . . . . . . . . . . . . 761
xtsc_pin2tlm_memory_transactor . . . . . . . . . . . . . . . . . . . . . . . . 769
xtsc_queue . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 803
xtsc_queue_consumer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 818
xtsc_queue_pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 836
xtsc_queue_producer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 859
xtsc_router . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1004
xtsc_slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1069
xtsc_tlm22xttlm_transactor . . . . . . . . . . . . . . . . . . . . . . . . . . . 1083
xtsc_tlm2pin_memory_transactor . . . . . . . . . . . . . . . . . . . . . . . . 1097
xtsc_wire . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1191
xtsc_wire_logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1200
xtsc_wire_source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1226
xtsc_xttlm2tlm2_transactor . . . . . . . . . . . . . . . . . . . . . . . . . . . 1259
xtsc_debug_if . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 394
xtsc_request_if . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 922
xtsc_request_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 948
xtsc_request_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 932
xtsc_request_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 953
xtsc_request_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 936
xtsc_request_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 944
xtsc_slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1069
xtsc_request_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 927
xtsc_request_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 940
xtsc_debug_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 402
xtsc_debug_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 405
xtsc_debug_if_cap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 399
xtsc_dma_descriptor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 409
xtsc_dma_request . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 428
xtsc_exception . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 430
xtsc_fast_access_block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 431
xtsc_fast_access_if . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 435
xtsc_fast_access_request . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 437
xtsc_fast_access_revocation_if . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450
xtsc_filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 451
xtsc_lookup_if . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 495
xtsc_rer_lookup_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 959
xtsc_wer_lookup_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1188
xtsc_lookup_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 499
xtsc_lookup_driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 481
xtsc_memory_b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 589
xtsc_memory_base . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 597
xtsc_mode_switch_if . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 710

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xtsc_udma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1165
xtsc_xttlm2tlm2_transactor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1259
xtsc_module_pin_base . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 718
xtsc_memory_pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 616
xtsc_pin2tlm_memory_transactor . . . . . . . . . . . . . . . . . . . . . . . . . . 769
xtsc_tlm2pin_memory_transactor . . . . . . . . . . . . . . . . . . . . . . . . . . 1097
xtsc_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 733
xtsc_core_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 376
xtsc_initialize_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 458
xtsc_tx_loader_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1150
xtsc_udma_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1182
xtsc_arbiter_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206
xtsc_lookup_driver_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 490
xtsc_lookup_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 502
xtsc_lookup_pin_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 518
xtsc_master_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 537
xtsc_master_tlm2_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 555
xtsc_memory_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 599
xtsc_cache_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231
xtsc_dma_engine_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 423
xtsc_memory_pin_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 638
xtsc_memory_tlm2_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 661
xtsc_memory_trace_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 686
xtsc_mmio_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 706
xtsc_pin2tlm_lookup_transactor_parms . . . . . . . . . . . . . . . . . . . . . . 766
xtsc_pin2tlm_memory_transactor_parms . . . . . . . . . . . . . . . . . . . . . 789
xtsc_queue_consumer_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . 827
xtsc_queue_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 831
xtsc_queue_pin_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 843
xtsc_queue_producer_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 870
xtsc_router_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1026
xtsc_slave_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1077
xtsc_tlm22xttlm_transactor_parms . . . . . . . . . . . . . . . . . . . . . . . . . 1094
xtsc_tlm2pin_memory_transactor_parms . . . . . . . . . . . . . . . . . . . . . 1122
xtsc_wire_logic_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1213
xtsc_wire_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1219
xtsc_wire_source_parms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1237
xtsc_xttlm2tlm2_transactor_parms . . . . . . . . . . . . . . . . . . . . . . . . . 1276
xtsc_pin2tlm_wire_transactor< W, T > . . . . . . . . . . . . . . . . . . . . . . . . . 797
xtsc_plugin_interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 799
xtsc_queue_pop_if . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 847
xtsc_queue_pop_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 850
xtsc_queue_pop_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 853
xtsc_queue_pop_if_multi_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . 856

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xtsc_queue_consumer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 818
xtsc_queue_push_if . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 875
xtsc_queue_push_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 879
xtsc_queue_push_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 882
xtsc_queue_push_if_multi_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . 885
xtsc_queue_producer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 859
xtsc_request . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 890
xtsc_resettable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 962
xtsc_module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 714
xtsc_respond_if . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 966
xtsc_pif_respond_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 759
xtsc_ram_respond_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 888
xtsc_respond_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 978
xtsc_respond_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 983
xtsc_respond_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 985
xtsc_master . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 523
xtsc_respond_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 974
xtsc_respond_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 980
xtsc_respond_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 971
xtsc_respond_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 969
xtsc_response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 987
xtsc_sc_in_sc_bv_base_adapter< W, T > . . . . . . . . . . . . . . . . . . . . . . . 1038
xtsc_sc_in_sc_bv_base_adapter_base< W, T > . . . . . . . . . . . . . . . . . . . 1039
xtsc_sc_in_sc_uint_base_adapter< W, T > . . . . . . . . . . . . . . . . . . . . . . 1041
xtsc_sc_in_sc_uint_base_adapter_base< W, T > . . . . . . . . . . . . . . . . . . 1042
xtsc_sc_out_sc_bv_base_adapter< W, T > . . . . . . . . . . . . . . . . . . . . . . 1044
xtsc_sc_out_sc_bv_base_adapter_base< W, T > . . . . . . . . . . . . . . . . . . 1046
xtsc_sc_out_sc_uint_base_adapter< W, T > . . . . . . . . . . . . . . . . . . . . . 1048
xtsc_sc_out_sc_uint_base_adapter_base< W, T > . . . . . . . . . . . . . . . . . . 1050
xtsc_script_file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1052
xtsc_signal_sc_bv_base . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1064
xtsc_signal_sc_bv_base_floating . . . . . . . . . . . . . . . . . . . . . . . . . . 1066
xtsc_signal_sc_uint_base . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1068
xtsc_switch_registration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1081
xtsc_tlm2pin_wire_transactor< W, T > . . . . . . . . . . . . . . . . . . . . . . . . . 1133
xtsc_tx_xfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1153
xtsc_tx_xfer_if . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1160
xtsc_tx_xfer_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1162
XTSC_VERSION_INFO_STRING . . . . . . . . . . . . . . . . . . . . . . . . . . . 1187
xtsc_wire_read_if . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1224
xtsc_wire . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1191
xtsc_wire_write_if . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1242
xtsc_tlm2pin_wire_transactor_base< W, T > . . . . . . . . . . . . . . . . . . . 1135

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Chapter 3. Class Index

xtsc_wire_write_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1256
xtsc_wire_write_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1253
xtsc_wire_write_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1244
xtsc_wire . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1191
xtsc_wire_write_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1247
xtsc_wire_source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1226
xtsc_wire_write_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1250

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 Chapter 4. Class Index

4. Class Index

4.1 Class List

Here are the classes, structs, unions and interfaces with brief descriptions:
address_info (POD class to help keep track of information related to a special
address or address range ) . . . . . . . . . . . . . . . . . . . . . . . . . . 107
address_range (Class to keep track of address ranges and what DMI access has
been granted/invalidated ) . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
address_range (Class to keep track of address ranges and what DMI access has
been granted/invalidated ) . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
bit_field_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
input_definition (Input definition and sc_export ) . . . . . . . . . . . . . . . . . . . 112
input_definition (Input definition and sc_export ) . . . . . . . . . . . . . . . . . . . 114
iterator_definition (Iterator definition ) . . . . . . . . . . . . . . . . . . . . . . . . . . 117
line_info (Cache line data structure ) . . . . . . . . . . . . . . . . . . . . . . . . . . 119
nb_mm (Class for tlm_mm_interface for nb_transport ) . . . . . . . . . . . . . . . . 120
output_definition (Output definition and sc_port ) . . . . . . . . . . . . . . . . . . . 121
output_definition (Output definition and sc_port ) . . . . . . . . . . . . . . . . . . . 123
output_definition (Output definition and sc_port ) . . . . . . . . . . . . . . . . . . . 126
output_info (Information about a delayed output value ) . . . . . . . . . . . . . . . 128
pif_req_info (Information about each request ) . . . . . . . . . . . . . . . . . . . . 129
port_policy_info (Information from "arbitration_policy" for arbitrate_policy() ) . . . . 131
register_definition (Register definition and value ) . . . . . . . . . . . . . . . . . . . 132
req_cntl (Class to manage the bits of POReqCntl/PIReqCntl ) . . . . . . . . . . . . 134
req_rsp_info (Information for PIF width converter (PWC) mode ) . . . . . . . . . . 137
req_rsp_info (Information for PIF width converter (PWC) mode ) . . . . . . . . . . 139
request_info (Information about each request ) . . . . . . . . . . . . . . . . . . . . 141
request_info (Information about each request ) . . . . . . . . . . . . . . . . . . . . 144
request_info (Information about each request ) . . . . . . . . . . . . . . . . . . . . 146
request_info (Information about each request ) . . . . . . . . . . . . . . . . . . . . 147
resp_cntl (Class to manage the bits of PORespCntl/PIRespCntl/SnoopRespCntl ) 149
response_info (Information about each response ) . . . . . . . . . . . . . . . . . . 151
response_info (Information about each response ) . . . . . . . . . . . . . . . . . . 153
response_info (This class helps keep track of a response and when it is due ) . . . 155
response_info (Information about each response ) . . . . . . . . . . . . . . . . . . 157
sc_unwind_exception . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
statistic_info (This class is used to keep track of transaction statistics ) . . . . . . . 160
stream_dumper (Helper class to make it easy to dump xtsc_response to an os-
tream with or without data values ) . . . . . . . . . . . . . . . . . . . . . . 162
stream_dumper (Helper class to make it easy to dump xtsc_request to an ostream
with or without data values ) . . . . . . . . . . . . . . . . . . . . . . . . . . 163

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subbank_activity (Keep track of subbank activity to a given given bank to ensure

all responses are consistent (all RSP_OK or all RSP_NACC) ) . . . . . . 164
tlm_bw_transport_if_impl (Implementation of tlm_bw_transport_if ) . . . . . . . . . 165
tlm_bw_transport_if_impl (Implementation of tlm_bw_transport_if ) . . . . . . . . . 167
tlm_fw_transport_if_impl (Implementation of tlm_fw_transport_if<> ) . . . . . . . 169
tlm_fw_transport_if_impl (Implementation of tlm_fw_transport_if<> ) . . . . . . . 171
transaction_info (This class is used to keep track of 4 key times during each trans-
action’s lifecycle in order to compute transaciton lifetime and latency ) . . 173
transaction_info (Information about each transaction ) . . . . . . . . . . . . . . . . 175
transaction_info (Class to keep track of xtsc_request, tlm_generic_payload, and
xtsc_response when using nb_transport ) . . . . . . . . . . . . . . . . . . 177
udma_descriptor (Data structure used to store a uDMA descriptor ) . . . . . . . . 179
watchfilter_info (Information about each watchfilter ) . . . . . . . . . . . . . . . . . 181
watchfilter_info (Information about each watchfilter ) . . . . . . . . . . . . . . . . . 182
xtsc_address_range_entry (Address-range to port-number association (for exam-
ple, a routing table entry) ) . . . . . . . . . . . . . . . . . . . . . . . . . . . 183
xtsc_arbiter (A memory interface arbiter and/or address translator ) . . . . . . . . . 185
xtsc_arbiter_parms (Constructor parameters for a xtsc_arbiter object ) . . . . . . . 206
xtsc_cache (This class implements an XTSC model of a typical cache module ) . . 218
xtsc_cache_parms (Constructor parameters for an xtsc_cache object ) . . . . . . 231
xtsc_command_handler_interface (Interface to be called by xtsc_dispatch_-
command() ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235
xtsc_connection_interface (This is the generic connection interface used to sup-
port plugin modules and the --connect command in xtsc-run as well as
the xtsc_connect() method in the XTSC core library ) . . . . . . . . . . . . 240
xtsc_core (A Tensilica core Instruction Set Simulator (ISS) ) . . . . . . . . . . . . . 251
xtsc_core_parms (Constructor parameters for a xtsc_core object ) . . . . . . . . . 376
xtsc_debug_if (Interface for non-hardware communication from a memory inter-
face master to a memory interface slave ) . . . . . . . . . . . . . . . . . . 394
xtsc_debug_if_cap (To cap an unconnected m_debug_ports port when the user
can’t bind anything to it ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 399
xtsc_debug_if_impl (Implementation of xtsc_debug_if ) . . . . . . . . . . . . . . . 402
xtsc_debug_if_impl (Implementation of xtsc_debug_if ) . . . . . . . . . . . . . . . 405
xtsc_dma_descriptor (This struct is plain old data (POD) used to define each de-
scriptor of a DMA request ) . . . . . . . . . . . . . . . . . . . . . . . . . . 409
xtsc_dma_engine (An example DMA engine implementation ) . . . . . . . . . . . . 411
xtsc_dma_engine_parms (Constructor parameters for a xtsc_dma_engine object ) 423
xtsc_dma_request (This struct is plain old data (POD) used to define a DMA re-
quest ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 428
xtsc_exception (Base class for all XTSC exceptions ) . . . . . . . . . . . . . . . . . 430
xtsc_fast_access_block (Value class for a block that surrounds a request address ) 431
xtsc_fast_access_if (Interface for fast access (turbo mode) ) . . . . . . . . . . . . . 435
xtsc_fast_access_request (Class to hold request and response information to set
up fast access data transfers ) . . . . . . . . . . . . . . . . . . . . . . . . 437

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xtsc_fast_access_revocation_if (Interface to be implemented by memory-interface

masters that wish to support revocation of previously-granted fast access
requests ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450
xtsc_filter (The xtsc_filter class, in conjunction with the xtsc_filter_XXX() and
xtsc_event_XXX() methods and the XTSC command facility, help sup-
port the system control and debug framework in XTSC ) . . . . . . . . . . 451
xtsc_initialize_parms (Configuration parameters for the call to xtsc_initialize() ) . . 458
xtsc_lookup (An TIE lookup implementation that connects using TLM-level ports ) 468
xtsc_lookup_driver (A scripted driver for a lookup ) . . . . . . . . . . . . . . . . . . 481
xtsc_lookup_driver_parms (Constructor parameters for a xtsc_lookup_driver ob-
ject ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 490
xtsc_lookup_if (Interface for connecting a TIE lookup client to an implementation ) 495
xtsc_lookup_if_impl (Implementation of xtsc_lookup_if ) . . . . . . . . . . . . . . . 499
xtsc_lookup_parms (Constructor parameters for a xtsc_lookup object ) . . . . . . 502
xtsc_lookup_pin (A TIE lookup implementation using the pin-level interface ) . . . 511
xtsc_lookup_pin_parms (Constructor parameters for a xtsc_lookup_pin object ) . . 518
xtsc_master (A scripted memory interface master ) . . . . . . . . . . . . . . . . . . 523
xtsc_master_parms (Constructor parameters for a xtsc_master object ) . . . . . . 537
xtsc_master_tlm2 (A scripted OSCI TLM2 memory interface master ) . . . . . . . 546
xtsc_master_tlm2_parms (Constructor parameters for a xtsc_master_tlm2 object ) 555
xtsc_memory (A PIF, XLMI, or local memory ) . . . . . . . . . . . . . . . . . . . . . 560
xtsc_memory_b (Class for a memory model ) . . . . . . . . . . . . . . . . . . . . . 589
xtsc_memory_base . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 597
xtsc_memory_parms (Constructor parameters for a xtsc_memory object ) . . . . . 599
xtsc_memory_pin (This device implements a pin-level memory model ) . . . . . . 616
xtsc_memory_pin_parms (Constructor parameters for a xtsc_memory_pin object ) 638
xtsc_memory_tlm2 (A PIF, XLMI, or local memory which uses OSCI TLM2 ) . . . . 648
xtsc_memory_tlm2_parms (Constructor parameters for a xtsc_memory_tlm2 ob-
ject ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 661
xtsc_memory_trace (Example XTSC model which generates a value-change
dump (VCD) file of the data members of each xtsc::xtsc_request and
xtsc::xtsc_response that passes through it ("allow_tracing" true) and/or
which tracks the lifetime, latency, and counters of each transaction by
request type and by port number ("track_latency" true) ) . . . . . . . . . . 668
xtsc_memory_trace_parms (Constructor parameters for a xtsc_memory_trace
object ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 686
xtsc_mmio (A general-purpose memory-mapped input/output (MMIO) register de-
vice ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 690
xtsc_mmio_parms (Constructor parameters for a xtsc_mmio object ) . . . . . . . . 706
xtsc_mode_switch_if (Interface for dynamic simulation mode switching between
fast-functional and cycle-accurate modes ) . . . . . . . . . . . . . . . . . . 710
xtsc_module (This composite interface combines the xtsc_connection_interface
and xtsc_resettable interfaces ) . . . . . . . . . . . . . . . . . . . . . . . . 714
xtsc_module_pin_base (This is a base class for modules implementing pin-level
interfaces, especially pin-level memory interfaces ) . . . . . . . . . . . . . 718

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Chapter 4. Class Index

xtsc_parms (Base class for core and component module construction parameters ) 733
xtsc_pif_respond_if_impl (Implementation of xtsc_respond_if for system RAM
port ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 759
xtsc_pin2tlm_lookup_transactor (A transactor to convert a pin-level TIE lookup
interface to Xtensa TLM ) . . . . . . . . . . . . . . . . . . . . . . . . . . . 761
xtsc_pin2tlm_lookup_transactor_parms (Constructor parameters for a xtsc_-
pin2tlm_lookup_transactor object ) . . . . . . . . . . . . . . . . . . . . . . 766
xtsc_pin2tlm_memory_transactor (This device converts memory transactions
from pin level to transaction level ) . . . . . . . . . . . . . . . . . . . . . . 769
xtsc_pin2tlm_memory_transactor_parms (Constructor parameters for a xtsc_-
pin2tlm_memory_transactor transactor object ) . . . . . . . . . . . . . . . 789
xtsc_pin2tlm_wire_transactor< W, T > (User interface class for connecting an
sc_in<T> or an sc_signal<T> to an sc_export<xtsc_wire_write_if> ) . . 797
xtsc_plugin_interface (This interface is used to add plugin modules to an XTSC
simulation ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 799
xtsc_queue (A queue implementation that connects using TLM-level ports ) . . . . 803
xtsc_queue_consumer (A scripted consumer to drain a queue ) . . . . . . . . . . . 818
xtsc_queue_consumer_parms (Constructor parameters for a xtsc_queue_-
consumer object ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 827
xtsc_queue_parms (Constructor parameters for an xtsc_queue object ) . . . . . . 831
xtsc_queue_pin (A TIE queue implementation using the pin-level interface ) . . . . 836
xtsc_queue_pin_parms (Constructor parameters for a xtsc_queue_pin object ) . . 843
xtsc_queue_pop_if (This interface is for connecting between a consumer and a
queue ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 847
xtsc_queue_pop_if_impl (Implementation of xtsc_queue_pop_if ) . . . . . . . . . . 850
xtsc_queue_pop_if_impl (Implementation of xtsc_queue_pop_if for single con-
sumer ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 853
xtsc_queue_pop_if_multi_impl (Implementation of xtsc_queue_pop_if for multi-
client queue (either m_num_producers or m_num_consumers > 1) ) . . . 856
xtsc_queue_producer (A scripted producer to supply a queue ) . . . . . . . . . . . 859
xtsc_queue_producer_parms (Constructor parameters for a xtsc_queue_-
producer object ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 870
xtsc_queue_push_if (Interface for connecting between a producer and a queue ) . 875
xtsc_queue_push_if_impl (Implementation of xtsc_queue_push_if ) . . . . . . . . 879
xtsc_queue_push_if_impl (Implementation of xtsc_queue_push_if for single pro-
ducer ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 882
xtsc_queue_push_if_multi_impl (Implementation of xtsc_queue_push_if for multi-
client queue (either m_num_producers or m_num_consumers > 1) ) . . . 885
xtsc_ram_respond_if_impl (Implementation of xtsc_respond_if for local RAM port ) 888
xtsc_request (Class representing a PIF, XLMI, local memory, snoop, or inbound
PIF request transfer ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 890
xtsc_request_if (Interface for sending requests from a memory interface master to
a memory interface slave ) . . . . . . . . . . . . . . . . . . . . . . . . . . . 922
xtsc_request_if_impl (Implementation of xtsc_request_if ) . . . . . . . . . . . . . . 927
xtsc_request_if_impl (Implementation of xtsc_request_if ) . . . . . . . . . . . . . . 932

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 Chapter 4. Class Index

xtsc_request_if_impl (Implementation of xtsc_request_if ) . . . . . . . . . . . . . . 936

xtsc_request_if_impl (Implementation of xtsc_request_if ) . . . . . . . . . . . . . . 940
xtsc_request_if_impl (Implementation of xtsc_request_if ) . . . . . . . . . . . . . . 944
xtsc_request_if_impl (Implementation of xtsc_request_if ) . . . . . . . . . . . . . . 948
xtsc_request_if_impl (Implementation of xtsc_request_if ) . . . . . . . . . . . . . . 953
xtsc_rer_lookup_if_impl (Implementation of xtsc_lookup_if for RER port ) . . . . . 959
xtsc_resettable (Interface for objects which can be reset ) . . . . . . . . . . . . . . 962
xtsc_respond_if (Interface for sending responses from a memory interface slave
back to the requesting memory interface master ) . . . . . . . . . . . . . . 966
xtsc_respond_if_impl (Implementation of xtsc_respond_if ) . . . . . . . . . . . . . 969
xtsc_respond_if_impl (Implementation of xtsc_respond_if ) . . . . . . . . . . . . . 971
xtsc_respond_if_impl (Implementation of xtsc_respond_if ) . . . . . . . . . . . . . 974
xtsc_respond_if_impl (Implementation of xtsc_respond_if ) . . . . . . . . . . . . . 978
xtsc_respond_if_impl (Implementation of xtsc_respond_if ) . . . . . . . . . . . . . 980
xtsc_respond_if_impl (Implementation of xtsc_respond_if ) . . . . . . . . . . . . . 983
xtsc_respond_if_impl (Implementation of xtsc_respond_if ) . . . . . . . . . . . . . 985
xtsc_response (Class representing a PIF, XLMI, local memory, or inbound PIF
response transfer ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 987
xtsc_router (Example XTSC module implementing a router on a PIF network or
local memory interconnect ) . . . . . . . . . . . . . . . . . . . . . . . . . . 1004
xtsc_router_parms (Constructor parameters for a xtsc_router object ) . . . . . . . 1026
xtsc_sc_in_sc_bv_base_adapter< W, T > (User interface class for converting an
sc_in<T> to an sc_in<sc_bv_base> ) . . . . . . . . . . . . . . . . . . . . 1038
xtsc_sc_in_sc_bv_base_adapter_base< W, T > (Base class for converting an
sc_in<T> to an sc_in<sc_bv_base> ) . . . . . . . . . . . . . . . . . . . . 1039
xtsc_sc_in_sc_uint_base_adapter< W, T > (User interface class for converting
an sc_in<T> to an sc_in<sc_uint_base> ) . . . . . . . . . . . . . . . . . 1041
xtsc_sc_in_sc_uint_base_adapter_base< W, T > (Base class for converting an
sc_in<T> to an sc_in<sc_uint_base> ) . . . . . . . . . . . . . . . . . . . 1042
xtsc_sc_out_sc_bv_base_adapter< W, T > (User interface class for converting
an sc_out<sc_bv_base> to sc_out<T> ) . . . . . . . . . . . . . . . . . . 1044
xtsc_sc_out_sc_bv_base_adapter_base< W, T > (Base class for converting an
sc_out<sc_bv_base> to sc_out<T> ) . . . . . . . . . . . . . . . . . . . . 1046
xtsc_sc_out_sc_uint_base_adapter< W, T > (User interface class for converting
an sc_out<sc_uint_base> to sc_out<T> ) . . . . . . . . . . . . . . . . . 1048
xtsc_sc_out_sc_uint_base_adapter_base< W, T > (Base class for converting an
sc_out<sc_uint_base> to sc_out<T> ) . . . . . . . . . . . . . . . . . . . 1050
xtsc_script_file (Utility class for handling a script-style file ) . . . . . . . . . . . . . 1052
xtsc_signal_sc_bv_base (Pin-level signal for connecting to a TIE export state, TIE
import wire, or system-level I/O of xtsc_core ) . . . . . . . . . . . . . . . . 1064
xtsc_signal_sc_bv_base_floating (Floating signal for a capped (unused) TIE ex-
port state or import wire ) . . . . . . . . . . . . . . . . . . . . . . . . . . . 1066
xtsc_signal_sc_uint_base (Pin-level signal for connecting certain pin-level mem-
ory ports ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1068
xtsc_slave (A scripted memory interface slave ) . . . . . . . . . . . . . . . . . . . . 1069

Xtensa SystemC (XTSC) Reference Manual 31

Chapter 4. Class Index

xtsc_slave_parms (Constructor parameters for a xtsc_slave object ) . . . . . . . . 1077

xtsc_switch_registration (Class for registering TurboXim simulation mode switch-
ing interfaces ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1081
xtsc_tlm22xttlm_transactor (Example module implementing an OSCI TLM2 to
Xtensa TLM (xttlm) transactor ) . . . . . . . . . . . . . . . . . . . . . . . . 1083
xtsc_tlm22xttlm_transactor_parms (Constructor parameters for a xtsc_-
tlm22xttlm_transactor object ) . . . . . . . . . . . . . . . . . . . . . . . . . 1094
xtsc_tlm2pin_memory_transactor (This transactor converts memory transactions
from transaction level (TLM) to pin level ) . . . . . . . . . . . . . . . . . . 1097
xtsc_tlm2pin_memory_transactor_parms (Constructor parameters for a xtsc_-
tlm2pin_memory_transactor transactor object ) . . . . . . . . . . . . . . . 1122
xtsc_tlm2pin_wire_transactor< W, T > (User interface class for connecting an
sc_port<xtsc_wire_write_if> to an sc_out<T> or an sc_signal<T> ) . . 1133
xtsc_tlm2pin_wire_transactor_base< W, T > (Base class for converting an sc_-
out<xtsc_wire_write_if> to sc_out<T> ) . . . . . . . . . . . . . . . . . . . 1135
xtsc_tx_loader (XTSC module to model a boot loader for a TX Xtensa chain ) . . . 1138
xtsc_tx_loader_parms (Constructor parameters for a xtsc_tx_loader object ) . . . 1150
xtsc_tx_xfer (This class carries the information of a TLM transaction on the TX
Xtensa XFER (boot loader) interface ) . . . . . . . . . . . . . . . . . . . . 1153
xtsc_tx_xfer_if (Interface for sending TLM TX XFER interface transactions ) . . . . 1160
xtsc_tx_xfer_if_impl (Implementation of xtsc_tx_xfer_if ) . . . . . . . . . . . . . . . 1162
xtsc_udma (XTSC model of Cadence/Tensilica’s micro-DMA engine (uDMA) ) . . . 1165
xtsc_udma_parms (Constructor parameters for an xtsc_udma object ) . . . . . . . 1182
XTSC_VERSION_INFO_STRING . . . . . . . . . . . . . . . . . . . . . . . . . . . 1187
xtsc_wer_lookup_if_impl (Implementation of xtsc_lookup_if for WER port ) . . . . 1188
xtsc_wire (A wire implementation that connects using TLM-level ports ) . . . . . . 1191
xtsc_wire_logic (A general-purpose glue logic device for the xtsc::xtsc_wire_-
write_if ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1200
xtsc_wire_logic_parms (Constructor parameters for a xtsc_wire_logic object ) . . . 1213
xtsc_wire_parms (Constructor parameters for a xtsc_wire object ) . . . . . . . . . 1219
xtsc_wire_read_if (Interface for reading (sinking) a wire ) . . . . . . . . . . . . . . . 1224
xtsc_wire_source (A scripted xtsc::xtsc_wire_write_if or pin-level source ) . . . . . 1226
xtsc_wire_source_parms (Constructor parameters for a xtsc_wire_source object ) 1237
xtsc_wire_write_if (Interface for writing (driving/sourcing) a wire ) . . . . . . . . . . 1242
xtsc_wire_write_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1244
xtsc_wire_write_if_impl (Implementation of xtsc_wire_write_if ) . . . . . . . . . . . 1247
xtsc_wire_write_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1250
xtsc_wire_write_if_impl (Implementation of xtsc_wire_write_if ) . . . . . . . . . . . 1253
xtsc_wire_write_if_impl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1256
xtsc_xttlm2tlm2_transactor (Example module implementing an Xtensa TLM (xt-
tlm) to OSCI TLM2 transactor ) . . . . . . . . . . . . . . . . . . . . . . . . 1259
xtsc_xttlm2tlm2_transactor_parms (Constructor parameters for a xtsc_-
xttlm2tlm2_transactor object ) . . . . . . . . . . . . . . . . . . . . . . . . . 1276

32 Xtensa SystemC (XTSC) Reference Manual

 Chapter 5. File Index

5. File Index

5.1 File List

Here is a list of all documented files with brief descriptions:

documentation.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1283
xtsc.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1284
xtsc_address_range_entry.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1307
xtsc_arbiter.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1309
xtsc_cache.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1311
xtsc_core.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1313
xtsc_dma_engine.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1315
xtsc_dma_request.h (Structures for defining DMA Programming Registers ) . . . . 1317
xtsc_exception.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1318
xtsc_fast_access.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1319
xtsc_lookup.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1321
xtsc_lookup_driver.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1323
xtsc_lookup_if.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1325
xtsc_lookup_pin.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1327
xtsc_master.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1328
xtsc_master_tlm2.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1330
xtsc_memory.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1332
xtsc_memory_b.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1334
xtsc_memory_base.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ??
xtsc_memory_pin.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1336
xtsc_memory_tlm2.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1338
xtsc_memory_trace.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1340
xtsc_mmio.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1342
xtsc_mode_switch_if.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1344
xtsc_module_pin_base.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1346
xtsc_parms.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1348
xtsc_pin2tlm_lookup_transactor.h . . . . . . . . . . . . . . . . . . . . . . . . . . . 1350
xtsc_pin2tlm_memory_transactor.h . . . . . . . . . . . . . . . . . . . . . . . . . . 1351
xtsc_queue.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1353
xtsc_queue_consumer.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1355
xtsc_queue_pin.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1357
xtsc_queue_pop_if.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1358
xtsc_queue_producer.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1360
xtsc_queue_push_if.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1362
xtsc_request.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1364
xtsc_request_if.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1366
xtsc_respond_if.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1368

Xtensa SystemC (XTSC) Reference Manual 33

Chapter 5. File Index

xtsc_response.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1369
xtsc_router.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1371
xtsc_slave.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1373
xtsc_tlm22xttlm_transactor.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1375
xtsc_tlm2pin_memory_transactor.h . . . . . . . . . . . . . . . . . . . . . . . . . . 1377
xtsc_tx_loader.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1379
xtsc_tx_xfer.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1381
xtsc_tx_xfer_if.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1383
xtsc_types.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1385
xtsc_udma.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1387
xtsc_wire.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1389
xtsc_wire_logic.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1391
xtsc_wire_read_if.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1393
xtsc_wire_source.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1395
xtsc_wire_write_if.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1397
xtsc_xttlm2tlm2_transactor.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1398

34 Xtensa SystemC (XTSC) Reference Manual

 Chapter 6. Namespace Documentation

6. Namespace Documentation

6.1 xtsc Namespace Reference

All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

Classes
• class xtsc_initialize_parms
Configuration parameters for the call to xtsc_initialize().

• class xtsc_switch_registration
Class for registering TurboXim simulation mode switching interfaces.

• class xtsc_signal_sc_bv_base
Pin-level signal for connecting to a TIE export state, TIE import wire, or system-level I/O of
xtsc_core.

• class xtsc_signal_sc_bv_base_floating
Floating signal for a capped (unused) TIE export state or import wire.

• class xtsc_signal_sc_uint_base
Pin-level signal for connecting certain pin-level memory ports.

• class xtsc_sc_out_sc_bv_base_adapter_base
Base class for converting an sc_out<sc_bv_base> to sc_out<T>.

• class xtsc_sc_out_sc_bv_base_adapter
User interface class for converting an sc_out<sc_bv_base> to sc_out<T>.

• class xtsc_sc_in_sc_bv_base_adapter_base
Base class for converting an sc_in<T> to an sc_in<sc_bv_base>.

• class xtsc_sc_in_sc_bv_base_adapter
User interface class for converting an sc_in<T> to an sc_in<sc_bv_base>.

• class xtsc_sc_out_sc_uint_base_adapter_base
Base class for converting an sc_out<sc_uint_base> to sc_out<T>.

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Chapter 6. Namespace Documentation

• class xtsc_sc_out_sc_uint_base_adapter
User interface class for converting an sc_out<sc_uint_base> to sc_out<T>.

• class xtsc_sc_in_sc_uint_base_adapter_base
Base class for converting an sc_in<T> to an sc_in<sc_uint_base>.

• class xtsc_sc_in_sc_uint_base_adapter
User interface class for converting an sc_in<T> to an sc_in<sc_uint_base>.

• class xtsc_tlm2pin_wire_transactor_base
Base class for converting an sc_out<xtsc_wire_write_if> to sc_out<T>.

• class xtsc_tlm2pin_wire_transactor
User interface class for connecting an sc_port<xtsc_wire_write_if> to an sc_out<T> or
an sc_signal<T>.

• class xtsc_pin2tlm_wire_transactor
User interface class for connecting an sc_in<T> or an sc_signal<T> to an sc_-
export<xtsc_wire_write_if>.

• class xtsc_script_file
Utility class for handling a script-style file.

• class xtsc_command_handler_interface
Interface to be called by xtsc_dispatch_command().

• class xtsc_filter
The xtsc_filter class, in conjunction with the xtsc_filter_XXX() and xtsc_event_XXX() meth-
ods and the XTSC command facility, help support the system control and debug framework
in XTSC.

• class xtsc_resettable
Interface for objects which can be reset.

• class xtsc_connection_interface
This is the generic connection interface used to support plugin modules and the --connect
command in xtsc-run as well as the xtsc_connect() method in the XTSC core library.

• class xtsc_module
This composite interface combines the xtsc_connection_interface and xtsc_resettable in-
terfaces.

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 Chapter 6. Namespace Documentation

• class xtsc_plugin_interface
This interface is used to add plugin modules to an XTSC simulation.

• class XTSC_VERSION_INFO_STRING
• class xtsc_core_parms
Constructor parameters for a xtsc_core object.

• class xtsc_core
A Tensilica core Instruction Set Simulator (ISS).

• class xtsc_parms
Base class for core and component module construction parameters.

• class xtsc_debug_if
Interface for non-hardware communication from a memory interface master to a memory
interface slave.

• class xtsc_request_if
Interface for sending requests from a memory interface master to a memory interface slave.

• class xtsc_respond_if
Interface for sending responses from a memory interface slave back to the requesting mem-
ory interface master.

• class xtsc_exception
Base class for all XTSC exceptions.

• class xtsc_fast_access_if
Interface for fast access (turbo mode).

• class xtsc_fast_access_block
Value class for a block that surrounds a request address.

• class xtsc_fast_access_revocation_if
Interface to be implemented by memory-interface masters that wish to support revocation
of previously-granted fast access requests.

• class xtsc_fast_access_request
Class to hold request and response information to set up fast access data transfers.

• class xtsc_wire_write_if
Interface for writing (driving/sourcing) a wire.

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Chapter 6. Namespace Documentation

• class xtsc_wire_read_if
Interface for reading (sinking) a wire.

• class xtsc_lookup_if
Interface for connecting a TIE lookup client to an implementation.

• class xtsc_queue_push_if
Interface for connecting between a producer and a queue.

• class xtsc_queue_pop_if
This interface is for connecting between a consumer and a queue.

• class xtsc_tx_xfer_if
Interface for sending TLM TX XFER interface transactions.

• class xtsc_request
Class representing a PIF, XLMI, local memory, snoop, or inbound PIF request transfer.

• class xtsc_response
Class representing a PIF, XLMI, local memory, or inbound PIF response transfer.

• class xtsc_tx_xfer
This class carries the information of a TLM transaction on the TX Xtensa XFER (boot
loader) interface.

• class xtsc_mode_switch_if
Interface for dynamic simulation mode switching between fast-functional and cycle-accurate
modes.

• class xtsc_address_range_entry
Address-range to port-number association (for example, a routing table entry).

• class xtsc_memory_b
Class for a memory model.

• class xtsc_tx_loader_parms
Constructor parameters for a xtsc_tx_loader object.

• class xtsc_tx_loader
XTSC module to model a boot loader for a TX Xtensa chain.

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 Chapter 6. Namespace Documentation

• class xtsc_udma_parms
Constructor parameters for an xtsc_udma object.

• class xtsc_udma
The xtsc_udma class provides an XTSC model of Cadence/Tensilica’s micro-DMA engine
(uDMA).

Typedefs

• typedef int Readme

typedef to indicate a dummy variable used to anchor doxygen documentation comments.

• typedef std::vector< std::pair< std::string, std::string > > xtsc_filter_table

Vector of key,value pairs constituting the main content of an xtsc_filter.

• typedef std::map< std::string, xtsc_port_type > xtsc_port_type_map

Map port names to their xtsc_port_type.

• typedef std::vector< std::string > xtsc_port_table

A table of port names.

• typedef xtsc_plugin_interface &(∗ xtsc_get_plugin_interface_t )()

The type of the method used by XTSC to get the plugin interface from the shared library.

• typedef unsigned long long u64

64-bit unsigned number.

• typedef unsigned int u32

32-bit unsigned number.

• typedef unsigned short u16

• typedef unsigned char u8
8-bit unsigned number.

• typedef signed long long i64

• typedef signed int i32
• typedef signed short i16
• typedef signed char i8
• typedef i32 word
Host word size - signed.

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Chapter 6. Namespace Documentation

• typedef u32 uword

Host word size - unsigned.

• typedef unsigned int xtsc_address

Xtensa address.

• typedef u64 xtsc_byte_enables

Byte enables.

• typedef enum xtsc::xtsc_sim_mode xtsc_sim_mode

Type used to identify simulation modes.

Enumerations
• enum xtsc_port_type {
USER_DEFINED_PORT = 0,
DEBUG_PORT = 1,
REQUEST_PORT = 2,
RESPOND_PORT = 3,
LOOKUP_PORT = 4,
QUEUE_PUSH_PORT = 5,
QUEUE_POP_PORT = 6,
WIRE_WRITE_PORT = 7,
WIRE_READ_PORT = 8,
TX_XFER_PORT = 9,
USER_DEFINED_OUTPUT = 16,
BOOL_OUTPUT = 17,
UINT_OUTPUT = 18,
WIDE_OUTPUT = 19,
USER_DEFINED_INITIATOR = 32,
INITIATOR_SOCKET_4 = 33,
INITIATOR_SOCKET_8 = 34,
INITIATOR_SOCKET_16 = 35,
INITIATOR_SOCKET_32 = 36,
INITIATOR_SOCKET_64 = 37,

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 Chapter 6. Namespace Documentation

conjugate_delta = 128,
USER_DEFINED_EXPORT = 128,
DEBUG_EXPORT = 129,
REQUEST_EXPORT = 130,
RESPOND_EXPORT = 131,
LOOKUP_EXPORT = 132,
QUEUE_PUSH_EXPORT = 133,
QUEUE_POP_EXPORT = 134,
WIRE_WRITE_EXPORT = 135,
WIRE_READ_EXPORT = 136,
TX_XFER_EXPORT = 137,
USER_DEFINED_INPUT = 144,
BOOL_INPUT = 145,
UINT_INPUT = 146,
WIDE_INPUT = 147,
USER_DEFINED_TARGET = 160,
TARGET_SOCKET_4 = 161,
TARGET_SOCKET_8 = 162,
TARGET_SOCKET_16 = 163,
TARGET_SOCKET_32 = 164,
TARGET_SOCKET_64 = 165,
PORT_TABLE = 255 }
This enum specifies the conjugate port pairs that are supported by the generic connection
API (xtsc_connection_interface) and the generic connection method, xtsc_connect().

• enum xtsc_sim_mode {
XTSC_CYCLE_ACCURATE = 0,
XTSC_FUNCTIONAL }
Type used to identify simulation modes.

Functions
• XTSC_API bool xtsc_is_logging_configured ()
Return true if the logging facility (log4xtensa) has been configured.

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Chapter 6. Namespace Documentation

• XTSC_API bool xtsc_pattern_match (const std::string &pattern, const std::string

&str)
Conveniece method to determine if a string matches a pattern.

• XTSC_API std::string xtsc_version ()

Return a string showing version information for the XTSC core library.

• XTSC_API void xtsc_set_system_clock_factor (u32 clock_factor, u32 posedge_-

factor=0)
Method to set the XTSC system clock period (SCP).

• XTSC_API u32 xtsc_get_system_clock_factor ()

This method returns the factor by which the SystemC time resolution is multiplied to deter-
mine the system clock period.

• XTSC_API void xtsc_initialize (const xtsc_initialize_parms &init_parms)

Initialize XTSC simulation.

• XTSC_API void xtsc_initialize (const char ∗text_logging_config_file=NULL, const

char ∗binary_logging_config_file=NULL)
Initialize XTSC simulation.

• XTSC_API xtsc_initialize_parms xtsc_get_xtsc_initialize_parms ()

Return a copy of the xtsc_initialize_parms used to initialize XTSC.

• XTSC_API bool xtsc_is_initialized ()

Return true if xtsc_initialize has been called, else return false.

• XTSC_API void xtsc_finalize ()

This function should be called when simulation is over to ensure all resources are properly
released and all clients are properly finalized.

• XTSC_API void xtsc_reset_processes (std::vector< sc_core::sc_process_handle >

&process_handles)
This function can be called to reset each sc_process_handle in a vector.

• XTSC_API bool xtsc_set_call_sc_stop (bool call_sc_stop)

Set the flag that determines whether sc_stop() will be called when xtsc_finalize() is called.

• XTSC_API sc_core::sc_time xtsc_get_system_clock_period ()

This method returns the period of the conceptual system clock.

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• XTSC_API sc_core::sc_time xtsc_get_system_clock_posedge_offset ()

Get the posedge offset of the conceptual system clock.

• XTSC_API void xtsc_wait (u32 num_periods=1)

This method waits the specified number of system clock periods.

• XTSC_API bool xtsc_is_big_endian_host ()

This method returns true if host processor is big endian, otherwise returns false.

• XTSC_API u64 xtsc_create_queue_ticket ()

This function returns a unique 64-bit number that can be associate with a new element
when it is added to a queue.

• XTSC_API void xtsc_fire_turboxim_event_id (u32 turboxim_event_id)

Fire (that is, signal or notify) the specified TurboXim event id.

• XTSC_API void xtsc_set_relaxed_simulation_barrier (const sc_core::sc_time

&delta)
This method is used to set an absolute time barrier for use by modules operating in fast
functional mode.

• XTSC_API sc_core::sc_time xtsc_get_relaxed_simulation_barrier ()

This method returns the absolute simulation time barrier beyond which modules should
cease running ahead of the current SystemC simulation time when in fast functional mode.

• XTSC_API void xtsc_set_relaxed_simulation_interval (const sc_core::sc_time &inter-

val)
Set the amount of "equivalent time" that a module is allowed to run ahead of the actual
SystemC simulation time when operating in fast functional mode.

• XTSC_API sc_core::sc_time xtsc_get_relaxed_simulation_interval (void)

Get the amount of "equivalent time" that a module is allowed to run ahead of the actual
SystemC simulation time when operating in fast functional mode as set by the xtsc_set_-
relaxed_simulation_interval() method.

• XTSC_API sc_core::sc_time xtsc_get_remaining_relaxed_simulation_time (void)

This method returns the maximum amount of time that a module may run ahead of the
current SystemC simulation time.

• XTSC_API void xtsc_user_state_dump (std::ostream &os, const std::string &pat-

tern="")
Dump the name-value pairs (optionally limited to pattern) in the user-defined state map to
the specified ostream object.

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• XTSC_API std::string xtsc_user_state_get (const std::string &name)

Get the value associated with the specified name in the user-defined state map.

• XTSC_API void xtsc_user_state_set (const std::string &name, const std::string

&value)
Add or replace a name-value pair in the user-defined state map.

• XTSC_API bool xtsc_trap_port_binding_failures (bool trap)

This is needed for when XTSC is being used with some commercial SystemC simulators.

• XTSC_API log4xtensa::LogLevel xtsc_set_constructor_log_level

(log4xtensa::LogLevel log_level)
This method sets the log level for constructor logging.

• XTSC_API log4xtensa::LogLevel xtsc_get_constructor_log_level ()

Get the current log level for constructor logging.

• XTSC_API bool xtsc_is_text_logging_enabled ()

Return value set by xtsc_enable_text_logging().

• XTSC_API bool xtsc_enable_text_logging (bool enable_logging=true)

Turn text logging on or off for XTSC_INFO and lower.

• XTSC_API void xtsc_set_text_logging_time_precision (u32 num_decimal_digits)

Set number of digits after decimal point used when logging simulation time.

• XTSC_API u32 xtsc_get_text_logging_time_precision ()

Get number of digits after decimal point used when logging simulation time.

• XTSC_API void xtsc_set_text_logging_time_width (u32 num_characters)

Set total number of characters used when logging simulation time.

• XTSC_API u32 xtsc_get_text_logging_time_width ()

Get total number of characters used when logging simulation time.

• XTSC_API void xtsc_set_text_logging_delta_cycle_digits (u32 num_digits)

Set the number of least-significant decimal digits of the delta cycle count to be displayed
when logging.

• XTSC_API u32 xtsc_get_text_logging_delta_cycle_digits ()

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Get the number of least-significant decimal digits of the delta cycle count to be displayed
when logging.

• XTSC_API std::string & xtsc_log_delta_cycle (std::string &buf)

Put the formatted delta cycle count into string reference buf and return it.

• XTSC_API void xtsc_dump_text_loggers (std::ostream &os=std::cout)

Dump currently registered text loggers.

• XTSC_API bool xtsc_set_hex_dump_left_to_right (bool left_to_right)

This method sets the flag that determines the order in which data is dumped by the xtsc_-
hex_dump(u32, const u8 ∗, ostream&) method.

• XTSC_API bool xtsc_get_hex_dump_left_to_right ()

This method returns the flag that determines the order in which data is dumped by the
xtsc_hex_dump(u32, const u8 ∗, ostream&) method.

• XTSC_API void xtsc_hex_dump (u32 size8, const u8 ∗buffer, std::ostream

&os=std::cout)
This method dumps the specified number of bytes from the data buffer in hex format (two
hex nibbles and a space for each byte in the buffer).

• XTSC_API void xtsc_hex_dump (bool left_to_right, u32 size8, const u8 ∗buffer,

std::ostream &os=std::cout, u32 bytes_per_line=0, bool show_address=false,
u32 start_byte_address=0x0, bool show_hex_values=true, bool do_column_-
heading=false, bool show_ascii_values=false, u32 initial_skipped_bytes=0)
This method dumps the specified number of bytes from the data buffer.

• XTSC_API void xtsc_strtostrvector (const std::string &str, std::vector< std::string >

&vec, char sep= ’,’, const std::string &whitespace=" \t")
Utility method to convert a string of comma-separated values to a vector<string> with
leading/trailing whitespace removed.

• XTSC_API void xtsc_strtou32vector (const std::string &str, std::vector< u32 > &vec)

Utility method to convert a string of comma-separated values to a vector<u32> (or throw

xtsc_exception).

• XTSC_API u32 xtsc_strtou32 (const std::string &str)

Utility method to convert a string to a u32 (or throw xtsc_exception).

• XTSC_API u64 xtsc_strtou64 (const std::string &str)

Utility method to convert a string to a u64 (or throw xtsc_exception).

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• XTSC_API i32 xtsc_strtoi32 (const std::string &str)

Utility method to convert a string to a i32 (or throw xtsc_exception).

• XTSC_API double xtsc_strtod (const std::string &str)

Utility method to convert a string to a double (or throw xtsc_exception).

• XTSC_API u32 xtsc_ceiling_log2 (u32 value)

Utility method to find log2 of a value rounded up.

• XTSC_API std::string xtsc_zero_extend_array_indices (const std::string &str)

Utility method to return a string which matches the input string except that bracketed array
indices containing less then 10 decimal digits, if any, will be zero-extended to 10 digits so
as to be suitable for sorting in a situation where it is desired that, for example, "foo[10]’
comes after "foo[9]" instead of after "foo[1].

• XTSC_API void xtsc_add_lua_script_file (const std::string &lua_script_file)

Run the specified Lua script file in its own SystemC thread process.

• XTSC_API std::string xtsc_get_user_name (const std::string &name, const std::string

&kind, const std::string &unknown="UNKNOWN_COWBOY")
Utility method to get the current user name.

• XTSC_API u8 ∗ xtsc_get_shared_memory (const std::string &sm_name, u64 num_-

bytes, const std::string &name, const std::string &kind, xtsc_address base_-
address=0x00000000)
Utility method to get a pointer to host OS shared memory.

• XTSC_API void xtsc_byte_array_to_sc_unsigned (const xtsc::u8 ∗buf, sc_dt::sc_-

unsigned &value)
Utility method to convert a raw byte array to an existing sc_unsigned.

• XTSC_API void xtsc_sc_unsigned_to_byte_array (const sc_dt::sc_unsigned &value,

xtsc::u8 ∗buf)
Utility method to convert an sc_unsigned to an existing raw byte array.

• XTSC_API void xtsc_register_mode_switch_interface (const xtsc::xtsc_switch_-

registration &registration)
Registration function for registering TurboXim simulation mode switching interfaces.

• XTSC_API void xtsc_get_registered_mode_switch_interfaces (std::vector<

xtsc::xtsc_switch_registration > &ifs)
Fill a vector will all of the registered switch groups.

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• XTSC_API void xtsc_switch_sim_mode (xtsc::xtsc_sim_mode mode)

Switch all modules in all switch groups that have registered a simulation mode switching
interface.

• XTSC_API bool xtsc_prepare_to_switch_sim_mode (xtsc::xtsc_sim_mode mode)

Polling-based dynamic simulation switching preparation.

• XTSC_API u32 xtsc_compute_fast_access_swizzle (const u32 ∗buf)

Compute the swizzle value from memory storage.

• XTSC_API char ∗ xtsc_dirname (char ∗path)

Get the portion of the path before the last path separator.

• XTSC_API char ∗ xtsc_basename (char ∗path)

Get the portion of the path after the last path separator.

• XTSC_API std::string xtsc_get_absolute_directory (const std::string &directory)

Utility function to get the absolute path of an existing directory.

• XTSC_API std::string xtsc_get_absolute_path (const std::string &file_name)

Utility function to get the absolute path of the directory containing an existing file.

• XTSC_API std::string xtsc_get_absolute_path_and_name (const std::string &file_-

name)
Utility function to get the absolute path and file name of an existing file.

• XTSC_API void ∗ xtsc_load_library (const std::string &library_name, bool add_-

library_extension, const std::string &symbol_name)
Utility function to load a shared library (Linux shared object, MS Windows DLL) and then
get and return the address of a symbol in the library.

• XTSC_API void xtsc_log_multiline (log4xtensa::TextLogger &logger,

log4xtensa::LogLevel log_level, const std::string &msg, u32 indent=0)
This function splits up a multi-line message into multiple calls to the TextLogger::log()
method (one call per line).

• XTSC_API bool xtsc_parse_port_name (const std::string &full_name, std::string

&port_name, u32 &port_index)
This utility function parses a optionally-indexed port name into a name portion and and
index.

• XTSC_API bool xtsc_is_valid_identifier (const std::string &name)

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This utility function can be used to determine if a string is a valid C/C++ identifier.

• XTSC_API char ∗ xtsc_copy_c_str (const char ∗str)

This utility function safely copies a c-string (char ∗).

• XTSC_API char ∗∗ xtsc_copy_c_str_array (const char ∗const ∗str_array)

This utility function safely copies an array of c-strings (char ∗∗).

• XTSC_API void xtsc_delete_c_str (char ∗&str)

This utility function deletes a c-string and then sets the pointer to NULL.

• XTSC_API void xtsc_delete_c_str_array (char ∗∗&str_array)

This utility function deletes an array of c-strings (char ∗∗).

• XTSC_API void xtsc_dump_systemc_objects (std::ostream &os=std::cout, const

std::string &name_pattern="∗", const std::string &kind_pattern="∗")
Dump a list of SystemC objects.

• XTSC_API void xtsc_register_command (sc_core::sc_object &object, xtsc_-

command_handler_interface &handler, const std::string &cmd, xtsc::u32 min_args,
xtsc::u32 max_args, const std::string &format, const std::string &man)
Method to register a command with the XTSC command facility.

• XTSC_API void xtsc_unregister_command (sc_core::sc_object &object, const

std::string &cmd)
Method to unregister a command with the XTSC command facility.

• XTSC_API bool xtsc_dispatch_command (const std::string &cmd_line, std::ostream

&result=std::cout, bool echo_comment=true, const std::string &format_msg="", const
std::string &post_help="", const std::string &post_man="")
Method to dispatch an XTSC command line.

• XTSC_API bool xtsc_command_argtobool (const std::string &cmd_line, const

std::vector< std::string > &words, xtsc::u32 argument)
This convenience method is for use by the xtsc_command_handler_interface::execute()
method to make it easy to convert an argument to a bool value or to throw a meaningful
exception if this cannot be done.

• XTSC_API xtsc::i32 xtsc_command_argtoi32 (const std::string &cmd_line, const

std::vector< std::string > &words, xtsc::u32 argument)
This convenience method is for use by the xtsc_command_handler_interface::execute()
method to make it easy to convert an argument to a i32 value or to throw a meaningful
exception if this cannot be done.

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• XTSC_API xtsc::u32 xtsc_command_argtou32 (const std::string &cmd_line, const

std::vector< std::string > &words, xtsc::u32 argument)
This convenience method is for use by the xtsc_command_handler_interface::execute()
method to make it easy to convert an argument to a u32 value or to throw a meaningful
exception if this cannot be done.

• XTSC_API xtsc::u64 xtsc_command_argtou64 (const std::string &cmd_line, const

std::vector< std::string > &words, xtsc::u32 argument)
This convenience method is for use by the xtsc_command_handler_interface::execute()
method to make it easy to convert an argument to a u64 value or to throw a meaningful
exception if this cannot be done.

• XTSC_API double xtsc_command_argtod (const std::string &cmd_line, const

std::vector< std::string > &words, xtsc::u32 argument)
This convenience method is for use by the xtsc_command_handler_interface::execute()
method to make it easy to convert an argument to a double value or to throw a meaningful
exception if this cannot be done.

• XTSC_API std::string xtsc_command_remainder (const std::string &cmd_line,

xtsc::u32 word)
This convenience method is for use by the xtsc_command_handler_interface::execute()
method to make it easy to get the remainder of the command line after and including the
specified word.

• XTSC_API void xtsc_command_throw (const std::string &cmd_line, const std::string

&error_msg)
This convenience method is for use by the xtsc_command_handler_interface::execute()
method to make it slightly easier to throw a meaningful exception.

• XTSC_API std::string xtsc_event_register (sc_core::sc_event &event, const

std::string &base_name, sc_core::sc_object ∗p_object=NULL)
Register an sc_event with XTSC and give it a name in SystemC 2.2.

• XTSC_API bool xtsc_event_exists (const std::string &event_name)

This method returns true if the named sc_event was registered with XTSC (SystemC 2.2)
or if it exists as a hierarchically-named event (SystemC 2.3).

• XTSC_API sc_core::sc_event & xtsc_event_get (const std::string &event_name)

This method returns the named sc_event.

• XTSC_API void xtsc_event_dump (std::ostream &os=std::cout, const std::string

&pattern="∗")

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This method dumps a list of all events registered with XTSC (SystemC 2.2) or that are
hierarchically-named events (SystemC 2.3).

• XTSC_API xtsc_host_mutex ∗ xtsc_host_mutex_open (const std::string &name)

This method opens a named, recursive mutex and returns a handle to it.

• XTSC_API void xtsc_host_mutex_lock (xtsc_host_mutex ∗p_mutex)

This method does a recursive lock on the specified mutex.

• XTSC_API bool xtsc_host_mutex_try_lock (xtsc_host_mutex ∗p_mutex, u64 millisec-

onds=0)
This method attempts a recursive lock with a timeout as specified in milliseconds on the
specified mutex.

• XTSC_API void xtsc_host_mutex_unlock (xtsc_host_mutex ∗p_mutex)

This method does a recursive unlock on the specified mutex.

• XTSC_API void xtsc_host_mutex_close (xtsc_host_mutex ∗p_mutex)

This method closes the specified mutex.

• XTSC_API u64 xtsc_host_milliseconds ()

This method returns the number of milliseconds of wall time since some unspecified begin-
ning time.

• XTSC_API void xtsc_host_sleep (u64 milliseconds=0)

This method causes a host OS sleep for the specified number of milliseconds.

• XTSC_API u32 xtsc_get_next_watchfilter_number ()

Return a unique 32-bit number suitable for use as watchfilter number.

• XTSC_API void xtsc_filter_kind_register (const std::string &kind, const std::set<

std::string > &keys, const std::set< std::string > &range_keys)
Method to register a new xtsc_filter kind.

• XTSC_API void xtsc_filter_kind_dump (const std::string &kind="", std::ostream

&os=std::cout)
Method to dump the list of keys of a specific xtsc_filter kind or to dump a list of all registered
xtsc_filter kinds.

• XTSC_API bool xtsc_filter_exists (const std::string &name)

Method to determine if an xtsc_filter of a given name exists.

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• XTSC_API const xtsc_filter & xtsc_filter_create (const std::string &kind, const

std::string &name, const xtsc_filter_table &key_value_pairs)
Method to create an xtsc_filter of the specified kind with the specified name.

• XTSC_API void xtsc_filter_dump (const std::string &kind="", const std::string

&name="", std::ostream &os=std::cout)
Method to dump a list of filters of the specified kind or to dump the key-value pairs of a
specific named xtsc_filter.

• XTSC_API const xtsc_filter & xtsc_filter_get (const std::string &name)

Method to get a reference to the xtsc_filter object specified by name.

• XTSC_API bool xtsc_filter_apply_xtsc_peek (const std::string &name, xtsc::u32 port,

xtsc::xtsc_address address, xtsc::u32 size, const xtsc::u8 ∗buffer)
Convenience method to a apply an xtsc_filter of kind xtsc_peek to an nb_peek payload.

• XTSC_API bool xtsc_filter_apply_xtsc_poke (const std::string &name, xtsc::u32 port,

xtsc::xtsc_address address, xtsc::u32 size, const xtsc::u8 ∗buffer)
Convenience method to a apply an xtsc_filter of kind xtsc_poke to an nb_poke payload.

• XTSC_API bool xtsc_filter_apply_xtsc_request (const std::string &name, xtsc::u32

port, const xtsc_request &request)
Convenience method to apply an xtsc_filter of kind xtsc_request to an nb_request payload.

• XTSC_API bool xtsc_filter_apply_xtsc_response (const std::string &name, xtsc::u32

port, const xtsc_response &response)
Convenience method to a apply an xtsc_filter of kind xtsc_response to an nb_respond
payload.

• XTSC_API u32 xtsc_reset (bool hard_reset)

This method calls xtsc_resettable::reset(hard_reset) on all objects of type xtsc_resettable.

• XTSC_API std::string xtsc_get_port_type_name (xtsc_port_type port_type, bool

bare=false)
Return a string showing the C++ type of the port.

• XTSC_API bool xtsc_are_conjugate_port_types (xtsc_port_type type1, xtsc_port_-

type type2)
Returns true if the two xtsc_port_type values correspond to conjugate port pairs.

• XTSC_API bool xtsc_is_user_defined_port_type (xtsc_port_type port_type)

Returns true if the specified port type is a user-defined type.

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• XTSC_API bool xtsc_is_xttlm_port_type (xtsc_port_type port_type)

Returns true if the interface associated with the specified port type is an Xtensa TLM inter-
face.

• XTSC_API bool xtsc_is_tlm2_port_type (xtsc_port_type port_type)

Returns true if the interface associated with the specified port type is an OSCI TLM2 inter-
face.

• XTSC_API bool xtsc_is_pin_level_port_type (xtsc_port_type port_type)

Returns true if the specified port type is a pin-level port type (sc_out<> or sc_in<>).

• XTSC_API void xtsc_confirm_conjugate_user_defined_port_types (xtsc_-

connection_interface &instance_a, const std::string &port_a, const std::string
&port_b, xtsc_connection_interface &instance_b)
This method will throw an exception if the two specified ports are not conjugate user-defined
port types.

• XTSC_API bool xtsc_port_type_check (xtsc_port_type port_type, sc_core::sc_object

∗p_port)
Determine if the specified sc_object is of the specified xtsc_port_type.

• XTSC_API xtsc::u32 xtsc_connect (xtsc_connection_interface &instance_a, const

std::string &port_a, const std::string &port_b, xtsc_connection_interface &instance_-
b)
This method can be used to connect two modules using named ports (or port tables) from
each module.

• XTSC_API xtsc_core::memory_port & operator++ (xtsc_core::memory_port &port)

Prefix operator++ used to iterate memory_port.

• XTSC_API xtsc_core::memory_port & operator++ (xtsc_core::memory_port &port,

int)
Postfix operator++ used to iterate memory_port.

• XTSC_API xtsc_core::memory_port & operator+= (xtsc_core::memory_port &port,

int i)
Operator += for memory_port.

• XTSC_API xtsc_core::memory_port operator+ (xtsc_core::memory_port &port, int i)

Operator + for memory_port.

• XTSC_API std::ostream & operator<< (std::ostream &os, const xtsc_request &re-

quest)

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Dump an xtsc_request object.

• XTSC_API std::ostream & operator<< (std::ostream &os, const xtsc_-

request::stream_dumper &dumper)
Dump an xtsc_request object.

• XTSC_API std::ostream & operator<< (std::ostream &os, const xtsc_response &re-

sponse)
Dump an xtsc_response object.

• XTSC_API std::ostream & operator<< (std::ostream &os, const xtsc_-

response::stream_dumper &dumper)
Dump an xtsc_response object.

• XTSC_API std::ostream & operator<< (std::ostream &os, const xtsc_tx_xfer &xfer)

Dump an xtsc_tx_xfer object.

• XTSC_API std::ostream & operator<< (std::ostream &os, const xtsc_address_-

range_entry &entry)

Variables

• Readme xtsc_text_logging_macros
Summary of macros to disable or to do text logging.

• Readme sc_command_handler_commands
The following commands are supported by the global XTSC command handler called sc.

• Readme xtsc_command_handler_commands
The following commands are supported by the global XTSC command handler called xtsc.

6.1.1 Detailed Description

All xtsc library objects (non-member functions, non-member data, and classes includ-
ing xtsc_core) and their associated typedef and enum types are in the xtsc names-
pace. The xtsc_comp library objects (xtsc_arbiter, xtsc_dma_engine, xtsc_lookup, xtsc_-
lookup_driver, xtsc_lookup_pin, xtsc_master, xtsc_memory, xtsc_memory_pin, xtsc_-
memory_tlm2, xtsc_memory_trace, xtsc_mmio, xtsc_pin2tlm_memory_transactor, xtsc_-
queue, xtsc_queue_consumer, xtsc_queue_pin, xtsc_queue_producer, xtsc_router, xtsc_-
slave, xtsc_tlm2pin_memory_transactor, xtsc_tlm22xttlm_transactor, xtsc_wire, xtsc_-

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wire_logic, xtsc_wire_source, and xtsc_xttlm2tlm2_transactor) are in the xtsc_component

namespace.

6.1.2 Typedef Documentation

6.1.2.1 typedef xtsc_plugin_interface&(∗ xtsc_get_plugin_interface_t)()

The type of the method used by XTSC to get the plugin interface from the shared library.
The shared library (Linux shared object or MS Windows DLL) must implement and export
a method with the type defined by xtsc_get_plugin_interface_t. Typically, this method is
called xtsc_get_plugin_interface(); however, if you also intend to make a static version of
the library available (for example, for SystemC-Verilog co-simulation), then you may wish
to use a unique name to avoid a name clash with other linkedin models.
The following code snippet shows how to declare this method in a manner that works on
both Linux and MS Windows:

extern "C"
#if defined(_WIN32)
__declspec(dllexport)
#endif
xtsc_plugin_interface& xtsc_get_plugin_interface() { ... }

See also:
xtsc_plugin_interface

Definition at line 5814 of file xtsc.h.

6.1.3 Enumeration Type Documentation

6.1.3.1 enum xtsc_port_type

This enum specifies the conjugate port pairs that are supported by the generic connection
API (xtsc_connection_interface) and the generic connection method, xtsc_connect(). The
conjugate port pairs are separated by half of the enum range (128 = 256/2) which has the
special enum name of conjugate_delta.
Loosely speaking, two port types are "conjugate pairs" if they can be bound to each other.
For example, a LOOKUP_PORT (sc_port<xtsc_lookup_if>) has enum value 4 and it can
be bound to a LOOKUP_EXPORT (sc_export<xtsc_lookup_if) which has enum 132 (= 4 +
128), thus LOOKUP_PORT and LOOKUP_EXPORT are a conjugate pair.
As another example, an INITIATOR_SOCKET_4 (tlm_initiator_socket<32>) has enum
value 33 and it can be bound to a TARGET_SOCKET_4 (tlm_target_socket<32>) which

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has enum 161 (= 33 + 128), thus INITIATOR_SOCKET_4 and TARGET_SOCKET_4 are a

conjugate pair.
The pin-level ports work nearly the same way. A BOOL_OUTPUT (sc_out<bool>) has
enum value 17 and its conjugate is BOOL_INPUT (sc_in<bool>) which has enum value
145 (= 17 + 128). Although BOOL_OUTPUT cannot be bound directly to BOOL_INPUT, the
two can be connected together using an sc_signal<bool> and thus, for our purposes, are
considered a conjugate pair. Note: The xtsc_connect() method will take care of creating
the required sc_signal<T> when connecting the pin-level types.
A special exception to the conjugate pair rule is PORT_TABLE which has enum value 255
(and which has no conjugate enum). This port type is used to designate a named and
ordered list (vector<string>) of ports. If two module instances have PORT_TABLE entries
of the same size and each port in one list of ports is the conjugate of the corresponding
port in the other list, then the two port tables are said to form a conjugate pair and they can
be connected together. That is, their constituent ports can be connected together by just
specifying the two tables to the xtsc_connect() method or to the generic connect command
in xtsc-run (i.e. --connect=...).
A PORT_TABLE entry can also be used to create an alias for a given port.
Note: Using a PORT_TABLE is the recommended mechanism for creating aliases rather
then having multiple non-PORT_TABLE entries for the same port. Using a PORT_TABLE
to define aliases makes it clearer to the user what ports are available because each non-
PORT_TABLE entry identifies a separate real port.
The sc_port<> entries are shown here without template parameters values for int N and
sc_port_policy P which might seem to imply they are only good for the default values of N=1
and P=SC_ONE_OR_MORE_BOUND (see the declaration of the sc_port template in the
SystemC header file sc_port.h). In fact, the entry is good for any value of N or P; however,
if N is greater then 4 then you should set the "xtsc_port_type_check_bypass" parameter
in xtsc_initialize_parms to true. This applies to xtsc_port_type values from DEBUG_PORT
through TX_XFER_PORT.
For xtsc_port_type values from DEBUG_EXPORT through TX_XFER_EXPORT, the sc_-
object returned by the xtsc_connection_interface::get_port() method may be an sc_-
export<T> or simply a T.

See also:
xtsc_connection_interface
xtsc_connect

Enumerator:
USER_DEFINED_PORT sc_port <T> where T is a user-defined sc_interface
DEBUG_PORT sc_port <xtsc_debug_if>
REQUEST_PORT sc_port <xtsc_request_if>
RESPOND_PORT sc_port <xtsc_respond_if>

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LOOKUP_PORT sc_port <xtsc_lookup_if>

QUEUE_PUSH_PORT sc_port <xtsc_queue_push_if>
QUEUE_POP_PORT sc_port <xtsc_queue_pop_if>
WIRE_WRITE_PORT sc_port <xtsc_wire_write_if>
WIRE_READ_PORT sc_port <xtsc_wire_read_if>
TX_XFER_PORT sc_port <xtsc_tx_xfer_if>
USER_DEFINED_OUTPUT sc_out<T > where T is a user-defined type
BOOL_OUTPUT sc_out<bool >
UINT_OUTPUT sc_out<sc_uint_base>
WIDE_OUTPUT sc_out<sc_bv_base >
USER_DEFINED_INITIATOR tlm_initiator_socket< BW> where BW is a user-
defined bit width
INITIATOR_SOCKET_4 tlm_initiator_socket< 32>
INITIATOR_SOCKET_8 tlm_initiator_socket< 64>
INITIATOR_SOCKET_16 tlm_initiator_socket<128>
INITIATOR_SOCKET_32 tlm_initiator_socket<256>
INITIATOR_SOCKET_64 tlm_initiator_socket<512>
conjugate_delta Begin conjugate pair.
USER_DEFINED_EXPORT sc_export<T > where T is a user-defined sc_interface
DEBUG_EXPORT sc_export<xtsc_debug_if >
REQUEST_EXPORT sc_export<xtsc_request_if >
RESPOND_EXPORT sc_export<xtsc_respond_if >
LOOKUP_EXPORT sc_export<xtsc_lookup_if >
QUEUE_PUSH_EXPORT sc_export<xtsc_queue_push_if>
QUEUE_POP_EXPORT sc_export<xtsc_queue_pop_if >
WIRE_WRITE_EXPORT sc_export<xtsc_wire_write_if>
WIRE_READ_EXPORT sc_export<xtsc_wire_read_if >
TX_XFER_EXPORT sc_export<xtsc_tx_xfer_if >
USER_DEFINED_INPUT sc_in <T> where T is a user-defined type
BOOL_INPUT sc_in <bool>
UINT_INPUT sc_in <sc_uint_base>
WIDE_INPUT sc_in <sc_bv_base>
USER_DEFINED_TARGET tlm_target_socket < BW> where BW is a user-defined
bit width
TARGET_SOCKET_4 tlm_target_socket < 32>

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TARGET_SOCKET_8 tlm_target_socket < 64>

TARGET_SOCKET_16 tlm_target_socket <128>
TARGET_SOCKET_32 tlm_target_socket <256>
TARGET_SOCKET_64 tlm_target_socket <512>
PORT_TABLE A named and ordered table of ports.

Definition at line 5132 of file xtsc.h.

6.1.4 Function Documentation

6.1.4.1 XTSC_API bool xtsc::xtsc_pattern_match (const std::string & pattern,

const std::string & str)

Conveniece method to determine if a string matches a pattern. This method returns true if
str matches pattern, otherwise it returns false.

Parameters:
pattern Pattern to match str against. Any asterisk (∗) found in the pattern is treated
as a wildcard which matches any number of any characters in any combination.
str The string being checked for a match.

6.1.4.2 XTSC_API void xtsc::xtsc_set_system_clock_factor (u32 clock_factor, u32

posedge_factor = 0)

Method to set the XTSC system clock period (SCP). Although XTSC does not instantiate
any sc_clock objects, it still has the concept of a system clock period. This method is used
to set the XTSC system clock period as a multiple of the SystemC time resolution (which
can be accessed using the SystemC methods sc_set_time_resolution() and sc_get_time_-
resolution()). By default (i.e. if this method is never called), XTSC uses a factor of 1000.
So, if neither the sc_set_time_resolution() method nor the xtsc_set_system_clock_factor()
method are called then the XTSC system clock period will be 1 nanosecond (which is 1000
times the default SystemC time resolution of 1 picosecond).
XTSC also has the concept of clock phase. By default, the first posedge clock conceptu-
ally occurs at time 0, the second one occurs one system clock period later, and so on. If
desired, the posedge_factor argument can be set to a value other than 0 (but strictly less
than the clock_factor argument) to delay the first conceptual posedge clock (and all subse-
quent ones, too). Many of the XTSC components have parameters that make reference to
such things as "clock phase", "posedge clock", and "negedge clock". All these parameters

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are in reference to the clock phase concept explained here and their effect is adjusted in
accordance with any change to the posedge_factor argument.
When this method is called the the clock phase delta factors are also recalibrated. If you
don’t want the recalibrated values then you may subsequently changed them using the
xtsc_core::set_clock_phase_delta_factors() method.
This method must not be called after xtsc_get_system_clock_period() has been called.
The xtsc_initialize() method internally calls xtsc_get_system_clock_period, so xtsc_set_-
system_clock_factor() must not be called after xtsc_initialize() is called.
Technique #1: Using the logging configuration file form of the xtsc_initialize() function. The
general sequence (most likely in sc_main) is:

sc_set_time_resolution(...); // Optional
xtsc_set_system_clock_factor(...); // Optional
xtsc_initialize(logging_config_file);
// Now construct any desired XTSC modules (xtsc_core, xtsc_memory, etc)

Technique #2: Using the xtsc_initialize_parms form of the xtsc_initialize() function. The
general sequence (most likely in sc_main) is:

sc_set_time_resolution(...); // Optional
xtsc_initialize_parms init_parms(...);
init_parms.set("system_clock_factor", ...); // Optional
init_parms.set("posedge_offset_factor", ...); // Optional
init_parms.extract_parms(argc, argv, "xtsc"); // Optional
xtsc_initialize(init_parms);
// Now construct any desired XTSC modules (xtsc_core, xtsc_memory, etc)

See also:
xtsc_initialize_parms
xtsc_get_system_clock_period.
xtsc_wait.
xtsc_core::set_clock_phase_delta_factors

6.1.4.3 XTSC_API u32 xtsc::xtsc_get_system_clock_factor ()

This method returns the factor by which the SystemC time resolution is multiplied to deter-
mine the system clock period.

See also:
xtsc_set_system_clock_factor.

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6.1.4.4 XTSC_API void xtsc::xtsc_initialize (const xtsc_initialize_parms &

init_parms)

Initialize XTSC simulation. This function should be called before constructing any XTSC
modules and before generating any logging messages. Generally this function should be
called from sc_main before constructing any XTSC modules. If you have any global ob-
jects then those objects should not generate logging messages in their constructor or they
should call this method prior to generating any logging messages.

Parameters:
init_parms The parameters used to configure XTSC.

See also:
xtsc_initialize_parms

6.1.4.5 XTSC_API void xtsc::xtsc_initialize (const char ∗ text_logging_config_file =

NULL, const char ∗ binary_logging_config_file = NULL)

Initialize XTSC simulation. This function should be called before constructing any XTSC
modules and before generating any logging messages. This function constructs a default
xtsc_initialize_parms object. Sets the "text_logging_config_file" parameter according to the
text_logging_config_file value passed in to this function, and then calls xtsc_initialize with
the xtsc_initialize_parms object.

Parameters:
text_logging_config_file Value to set the "text_logging_config_file" parameter of the
xtsc_initialize_parms object to.
binary_logging_config_file The configuration file for binary logging. If NULL (the
default), then binary loggers are disabled for this simulation run.

NOTE: Binary logging is not supported in Xtensa Tools 7.0.

See also:
xtsc_initialize_parms

6.1.4.6 XTSC_API void xtsc::xtsc_finalize ()

This function should be called when simulation is over to ensure all resources are properly
released and all clients are properly finalized. Not calling this method can result in, for
example, no profile client output being generated.

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6.1.4.7 XTSC_API void xtsc::xtsc_reset_processes (std::vector<

sc_core::sc_process_handle > & process_handles)

This function can be called to reset each sc_process_handle in a vector. In SystemC

versions prior to 2.3.0 this function does nothing. If simulation is not running (that is,
if sc_is_running() returns false) then this function just returns. Typically, a module cre-
ates a vector of process handes in its constructor and calls this function with that vector
in its reset() method. For an example, see xtsc_component::xtsc_memory::m_process_-
handles, xtsc_component::xtsc_memory::reset(), and the usage of m_process_handles in
xtsc_memory.cpp.

See also:
xtsc_reset()
xtsc_resettable

6.1.4.8 XTSC_API bool xtsc::xtsc_set_call_sc_stop (bool call_sc_stop)

Set the flag that determines whether sc_stop() will be called when xtsc_finalize() is called.
The default value of the flag is true. That is, if this method is never called then sc_stop()
will be called when xtsc_finalize() is called.
Note: Calling sc_stop causes failure during the elaboration phase for some Cadence
versions (for example, IUS 10.2 s010/s012; but not s017). Message is: ncverilog:
∗E,ELBERR: Error during elaboration (status 250), exiting

Parameters:
call_sc_stop If true, sc_stop() will be called from xtsc_finalize().

Returns:
the previous value of the flag

6.1.4.9 XTSC_API sc_core::sc_time xtsc::xtsc_get_system_clock_period ()

This method returns the period of the conceptual system clock.

See also:
xtsc_set_system_clock_factor.

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6.1.4.10 XTSC_API sc_core::sc_time xtsc::xtsc_get_system_clock_posedge_-

offset ()

Get the posedge offset of the conceptual system clock. This methods returns the amount
of time by which the first posedge of the conceptual system clock is offset from time 0.
It is computed by multiplying the value of the "posedge_offset_factor" parameter of xtsc_-
initialize_parms by the SystemC time resolution. This method must not be called before
xtsc_initialize() is called.

See also:
xtsc_initialize_parms.

6.1.4.11 XTSC_API void xtsc::xtsc_wait (u32 num_periods = 1)

This method waits the specified number of system clock periods. This is just a convenience
method that calls sc_core::wait() with an sc_time object equal to num_periods times the
system clock period.

Parameters:
num_periods The number of system clock periods to wait.

See also:
xtsc_set_system_clock_factor.
xtsc_get_system_clock_period.

6.1.4.12 XTSC_API u64 xtsc::xtsc_create_queue_ticket ()

This function returns a unique 64-bit number that can be associate with a new element
when it is added to a queue. This function is meant for use by queue implementations. It is
the queue implementation’s job to maintain the ticket-to-element association and to return
and/or log the ticket with its associated element is popped from the queue.

Returns:
a unique 64-bit number.

See also:
xtsc_queue_push_if
xtsc_queue_pop_if

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6.1.4.13 XTSC_API void xtsc::xtsc_fire_turboxim_event_id (u32

turboxim_event_id)

Fire (that is, signal or notify) the specified TurboXim event id. This function has no effect if
called when operating in cycle-accurate (non-TurboXim) mode.
When you use the TurboXim simulation engine, you can significantly improve performance
by allowing each core to run a large number of instructions at a time. In this relaxed simu-
lation mode, you may want to programmatically control when a core should yield control to
allow other cores and other SystemC processes to execute. To force a core to wait for an
event when running in the fast functional simulation mode (TurboXim), you should call the
following function from your Xtensa target program:
void xt_iss_event_wait(unsigned eventId);
You can fire the event on which a core is waiting by calling xtsc_fire_turboxim_event_id()
from the host program and passing the same event ID as was passed in the xt_iss_event_-
wait() call. This might be done, for example, from sc_main() or, more typically, from a thread
or method process of a SystemC module.
Alternatively, the event on which a core is waiting can be fired by calling
void xt_iss_event_fire(unsigned eventId);
from the target program running on another core and passing the same eventId number.
Prototypes for both target functions are provided in the <xtensa/sim.h> header file.

6.1.4.14 XTSC_API void xtsc::xtsc_set_relaxed_simulation_barrier (const

sc_core::sc_time & delta)

This method is used to set an absolute time barrier for use by modules operating in fast
functional mode. When the current SystemC simulation time equals or exceeds this barrier,
then modules should not run ahead of the current SystemC simulation time.
If this method is not called then there is effectively no absolute time barrier.
This function is commonly called before calling sc_start() when sampled simulation is to be
used.

Parameters:
delta This time is added to the current SystemC time to compute the absolute time
barrier.

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6.1.4.15 XTSC_API sc_core::sc_time xtsc::xtsc_get_relaxed_simulation_barrier ()

This method returns the absolute simulation time barrier beyond which modules should
cease running ahead of the current SystemC simulation time when in fast functional mode.
This is the absolute simulation time when relaxed simulation (i.e. "running ahead") should
cease.
If the xtsc_set_relaxed_simulation_barrier() method is never called, then this method will
return the maximum possible SystemC simulation time less one SystemC time resolution,
that is ((2∧ 64) - 1) times the SystemC time resolution.

6.1.4.16 XTSC_API void xtsc::xtsc_set_relaxed_simulation_interval (const

sc_core::sc_time & interval)

Set the amount of "equivalent time" that a module is allowed to run ahead of the actual
SystemC simulation time when operating in fast functional mode. This method should be
called before simulation begins or should be left at its default value of SC_ZERO_TIME.
When this interval is SC_ZERO_TIME, then cores and other modules should not run ahead
of the current SystemC simulation time.

Parameters:
interval Maximum amount of "equivalent time" that a module may run ahead of the
current SystemC simulation time.

6.1.4.17 XTSC_API sc_core::sc_time xtsc::xtsc_get_relaxed_simulation_interval

(void)

Get the amount of "equivalent time" that a module is allowed to run ahead of the actual
SystemC simulation time when operating in fast functional mode as set by the xtsc_set_-
relaxed_simulation_interval() method. This method does not take the absolute simulation
time barrier into account. Use xtsc_get_remaining_relaxed_simulation_time() to get the
max duration that a module should use.

6.1.4.18 XTSC_API sc_core::sc_time xtsc::xtsc_get_remaining_relaxed_-

simulation_time (void)

This method returns the maximum amount of time that a module may run ahead of the
current SystemC simulation time. When a system is executing in fast functional mode,
cores and other modules are allowed to run ahead of the current simulation time. The
amount of "equivalent time" that a module is allowed to run ahead of the actual SystemC
simulation time is limited by two things:

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First, a module must not run ahead of the current simulation time by an amount greater
then the interval specified by the xtsc_set_relaxed_simulation_interval() method.
Second, a module should not run ahead when the current SystemC simulation time equals
or exceeds the absolute simulation time barrier as set by the xtsc_set_relaxed_simulation_-
barrier() method.
If the xtsc_set_relaxed_simulation_interval() method has not been called (or if it was called
with an argument of SC_ZERO_TIME) or if the absolute simulation time barrier as set by
the xtsc_set_relaxed_simulation_barrier() method has already arrived or passed, then this
method returns SC_ZERO_TIME. Otherwise, this method returns the smaller of the interval
set by the xtsc_set_relaxed_simulation_interval() method and the difference between the
current SystemC simulation time and the absolute simulation time barrier as set by the
xtsc_set_relaxed_simulation_barrier() method.

6.1.4.19 XTSC_API void xtsc::xtsc_user_state_dump (std::ostream & os, const

std::string & pattern = "")

Dump the name-value pairs (optionally limited to pattern) in the user-defined state map to
the specified ostream object.

Parameters:
os The ostream object to which the user-defined state map should be dumped.
pattern Optional pattern of names to match. Any asterisk (∗) found in the pattern
is treated as a wildcard which matches any number of any characters in any
combination. If pattern is the empty string then all name-value pairs are dumped.

See also:
xtsc_user_state_set
xtsc_user_state_get
xtsc_pattern_match

6.1.4.20 XTSC_API std::string xtsc::xtsc_user_state_get (const std::string &

name)

Get the value associated with the specified name in the user-defined state map.

Parameters:
name The state name. May only contain non-space, printable characters. If this name
is not found in the user-defined state table then the empty string will be returned.

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See also:
xtsc_user_state_set
xtsc_user_state_dump

6.1.4.21 XTSC_API void xtsc::xtsc_user_state_set (const std::string & name,

const std::string & value)

Add or replace a name-value pair in the user-defined state map. XTSC maintains a map of
name-value pairs in which users may store arbitrary state. This can be used, for example, to
allow different parts of the simulator (e.g. Lua scripts, the XTSC or lua command prompts,
an xtsc-run include script, and target programs using simcalls) to communicate with each
other.

Parameters:
name The state name. May only contain non-space, printable characters.
value The desired state value.

Note: The xtsc-run program supports the following command to allow setting user-defined
state:

--user_state=<Name>=<Value>

Note: Lua code on a lua line or inside a lua_beg/lua_end block of an xtsc_script_file can
access user-defined state using Lua functions in the xtsc table (this is the only way that
Lua code in an xtsc-run script file can read user-defined state). For example:

#lua_beg
MyList = xtsc.user_state_get("MyList")
xtsc.user_state_set("MyList", MyList .. "AnotherItem,")
#lua_end

See also:
xtsc_user_state_get
xtsc_user_state_dump

6.1.4.22 XTSC_API log4xtensa::LogLevel xtsc::xtsc_set_constructor_log_level

(log4xtensa::LogLevel log_level)

This method sets the log level for constructor logging. Normally, the XTSC module con-
structors (xtsc_core, xtsc_memory, xtsc_queue, etc) will log certain construction informa-
tion and parameters at INFO_LOG_LEVEL. This method can be called to change that to a
different log level.

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Parameters:
log_level The new log level for XTSC module constructor logging.

Returns:
previous value

6.1.4.23 XTSC_API bool xtsc::xtsc_enable_text_logging (bool enable_logging =

true)

Turn text logging on or off for XTSC_INFO and lower. This method enables or disables text
logging for XTSC_INFO and lower. If text logging is disabled, the XTSC_INFO and lower
macros do not generate logging messages, but XTSC_NOTE and higher macros still work
as usual. Calling this method with enable_logging set to false results in near zero logging
facility overhead within the XTSC libraries. Initial setting is true.

Parameters:
enable_logging If true, the default, text logging is enabled as normal. Otherwise,
text logging is disabled for XTSC_INFO, XTSC_VERBOSE, XTSC_DEBUG, and
XTSC_TRACE macros.

Note: If logging is not configured for INFO|VERBOSE|DEBUG|TRACE then calling this

method with enable_logging=true is largely pointless and will result in a one-time warning
being issued.

Returns:
previous value

6.1.4.24 XTSC_API std::string& xtsc::xtsc_log_delta_cycle (std::string & buf)

Put the formatted delta cycle count into string reference buf and return it. Note: This
function was changed with the RD-2011.1 release to require the user to provide a non-
const string buffer. The caller should create a string on the stack and pass it to this function.
This is needed for multi-thread safety. Although SystemC is single-thread, XTSC will create
other OS-level threads if an xtsc_core has debugging enabled for its target program. For
an example usage, see the XTSC_INFO macro.

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6.1.4.25 XTSC_API bool xtsc::xtsc_set_hex_dump_left_to_right (bool left_to_right)

This method sets the flag that determines the order in which data is dumped by the xtsc_-
hex_dump(u32, const u8 ∗, ostream&) method. The initial (default) value of this flag is
true.

Parameters:
left_to_right If true, data is dumped in the order: buffer[0], buffer[1], ..., buffer[size8-
1]. If false, data is dumped in the order: buffer[size8-1], buffer[size8-2], ...,
buffer[0].

Returns:
the old (previous) value of the flag.

6.1.4.26 XTSC_API bool xtsc::xtsc_get_hex_dump_left_to_right ()

This method returns the flag that determines the order in which data is dumped by the
xtsc_hex_dump(u32, const u8 ∗, ostream&) method.

Returns:
If true, data is dumped in the order: buffer[0], buffer[1], ..., buffer[size8-1]. If false, data
is dumped in the order: buffer[size8-1], buffer[size8-2], ..., buffer[0].

6.1.4.27 XTSC_API void xtsc::xtsc_hex_dump (u32 size8, const u8 ∗ buffer,

std::ostream & os = std::cout)

This method dumps the specified number of bytes from the data buffer in hex format (two
hex nibbles and a space for each byte in the buffer). The data is dumped in the order
specified by the xtsc_get_hex_dump_left_to_right() method.

Parameters:
size8 The number of bytes of data to dump.
buffer The buffer of data.
os The ostream object to which the data is to be dumped.

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6.1.4.28 XTSC_API void xtsc::xtsc_hex_dump (bool left_to_right, u32 size8,

const u8 ∗ buffer, std::ostream & os = std::cout, u32 bytes_per_line
= 0, bool show_address = false, u32 start_byte_address = 0x0, bool
show_hex_values = true, bool do_column_heading = false, bool
show_ascii_values = false, u32 initial_skipped_bytes = 0)

This method dumps the specified number of bytes from the data buffer. Each line of output
is divided into three columnar sections, each of which is optional. The first section contains
an address. The second section contains a hex dump of some (possibly all) of the data
(two hex nibbles and a space for each byte from the buffer). The third section contains an
ASCII dump of the same data.

Parameters:
left_to_right If true, the data is dumped in the order: buffer[0], buffer[1], ...,
buffer[bytes_per_line-1]. If false, the data is dumped in the order: buffer[bytes_-
per_line-1], buffer[bytes_per_line-2], ..., buffer[0].
size8 The number of bytes of data to dump.
buffer The buffer of data.
os The ostream object to which the data is to be dumped.
bytes_per_line The number of bytes to dump on each line of output. If bytes_per_line
is 0 (the default) then all size8 bytes are dumped on a single line with no newline
at the end. If bytes_per_line is non-zero, then all lines of output end in newline.
show_address If true, the first columnar section contains an address printed as an
8-hex-digit number with a 0x prefix. If false, the first columnar section is null and
takes no space in the output.
start_byte_address If show_address is true, the first line of output starts with start_-
byte_address, the second line of output starts with start_byte_address+bytes_-
per_line, and so on. If show_address is false, this parameter is ignored.
show_hex_values If true, the second (middle) columnar section of hex data values
is printed. If false, the second columnar section is null and takes no space in the
output.
do_column_heading If true, print byte position column headings over the hex val-
ues section. If false, no column headings are printed. If show_hex_values is
false, then the do_column_heading value is ignored and no column headings are
printed.
show_ascii_values If true, the third (last) columnar section of ASCII data values is
printed (if an ASCII value is a non-printable character a period is printed). If
show_ascii_values is false, the third columnar section is null and takes no space
in the output.
initial_skipped_bytes Skip initial_skipped_bytes bytes on the first line in the second
(hex) and third (ASCII) columnar sections.

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6.1.4.29 XTSC_API std::string xtsc::xtsc_zero_extend_array_indices (const

std::string & str)

Utility method to return a string which matches the input string except that bracketed array
indices containing less then 10 decimal digits, if any, will be zero-extended to 10 digits so
as to be suitable for sorting in a situation where it is desired that, for example, "foo[10]’
comes after "foo[9]" instead of after "foo[1]. For example:

Input (str) Returns

--------------- -----------------------------
"foo" "foo"
"foo[42]bar" "foo[0000000042]bar"
"[42]foo" "[0000000042]foo"
"foo[7][103]" "foo[0000000007][0000000103]"
"foo[0x42]" "foo[0x42]"

6.1.4.30 XTSC_API void xtsc::xtsc_add_lua_script_file (const std::string &

lua_script_file)

Run the specified Lua script file in its own SystemC thread process. This function may only
be called prior to the SystemC before_end_of_elaboration() callback.

Parameters:
lua_script_file The name of the Lua script file to run in its own SystemC thread.

6.1.4.31 XTSC_API std::string xtsc::xtsc_get_user_name (const std::string

& name, const std::string & kind, const std::string & unknown =
"UNKNOWN_COWBOY")

Utility method to get the current user name.

Parameters:
name The instance name of the sc_module requesting the current user name (used
for error reporting).
kind The kind of sc_module requesting the current user name (used for error report-
ing).
unknown On Linux, the user name to be returned if the OS is unable to provide a
user name. This parameter is ignored on MS Windows.

Returns:
the current user name.

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6.1.4.32 XTSC_API u8∗ xtsc::xtsc_get_shared_memory (const std::string &

sm_name, u64 num_bytes, const std::string & name, const std::string &
kind, xtsc_address base_address = 0x00000000)

Utility method to get a pointer to host OS shared memory.

Parameters:
sm_name The name of the shared memory.
num_bytes The number of bytes in the shared memory.
name The instance name of the sc_module requesting the shared memory (used for
error reporting).
kind The kind of sc_module requesting the shared memory (used for error reporting).
base_address The optional target physical starting byte address of the memory mod-
elled by this shared memory.

Returns:
a pointer to the shared memory.

6.1.4.33 XTSC_API void xtsc::xtsc_byte_array_to_sc_unsigned (const xtsc::u8 ∗

buf, sc_dt::sc_unsigned & value)

Utility method to convert a raw byte array to an existing sc_unsigned.

Parameters:
buf Pointer to a byte array whose size is at least (L+7)/8 bytes (where L =
value.length()).
value A reference to an existing sc_unsigned value.

6.1.4.34 XTSC_API void xtsc::xtsc_sc_unsigned_to_byte_array (const

sc_dt::sc_unsigned & value, xtsc::u8 ∗ buf)

Utility method to convert an sc_unsigned to an existing raw byte array.

Parameters:
value A reference to an existing sc_unsigned value.
buf Pointer to a byte array whose size is at least (L+7)/8 bytes (where L =
value.length()).

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6.1.4.35 XTSC_API void xtsc::xtsc_register_mode_switch_interface (const

xtsc::xtsc_switch_registration & registration)

Registration function for registering TurboXim simulation mode switching interfaces.

Parameters:
registration a module name, interface, switching group name triplet to register.

6.1.4.36 XTSC_API void xtsc::xtsc_switch_sim_mode (xtsc::xtsc_sim_mode

mode)

Switch all modules in all switch groups that have registered a simulation mode switching
interface. This function will throw an exception if one or more of the modules was unable
to switch. It should always be valid to switch mode before simulation starts. After simula-
tion starts, use the mode-switching protocol to relax the transactions in the system before
invoking this function. Throws an exception if any of the registered modules cannot switch.

Parameters:
mode If mode is XTSC_CYCLE_ACCURATE, then switch to cycle-accurate (non-
TurboXim for cores) mode. If mode is XTSC_FUNCTIONAL, then switch to func-
tional mode (TurboXim for cores).

6.1.4.37 XTSC_API bool xtsc::xtsc_prepare_to_switch_sim_mode

(xtsc::xtsc_sim_mode mode)

Polling-based dynamic simulation switching preparation. This function should be used prior
to switching the simulation mode as part of the mode-switching protocol to remove or drain
transactions from the system.
Prepare to switch all modules in all switch groups that have registered a simulation mode
switching interface. This function will return true if all modules are ready to switch. Other-
wise, it will return false. If it returns false, the switcher should wait at least a cycle before
trying again. Once all modules are ready, there may still be transactions in passive mod-
ules. The user should wait enough cycles for all passive modules to propagate transactions
through the system, try one more time, and switch if all modules are still ready.

Parameters:
mode If mode is XTSC_CYCLE_ACCURATE, then switch to cycle-accurate (non-
TurboXim for cores) mode. If mode is XTSC_FUNCTIONAL, then switch to func-
tional mode (TurboXim for cores).

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6.1.4.38 XTSC_API u32 xtsc::xtsc_compute_fast_access_swizzle (const u32 ∗ buf)

Compute the swizzle value from memory storage.

Parameters:
buf the pointer to memory storage

Returns:
the swizzle value to use in xtsc_fast_access_request::allow_raw_access() or 0xffffffff
if no swizzle matches.

6.1.4.39 XTSC_API char∗ xtsc::xtsc_dirname (char ∗ path)

Get the portion of the path before the last path separator. On Linux this method just returns
dirname(path).

6.1.4.40 XTSC_API char∗ xtsc::xtsc_basename (char ∗ path)

Get the portion of the path after the last path separator. On Linux this method just returns
basename(path).

6.1.4.41 XTSC_API std::string xtsc::xtsc_get_absolute_directory (const std::string

& directory)

Utility function to get the absolute path of an existing directory.

Parameters:
directory The directory whose absolute path is desired. directory may be an absolute
or relative path.

Returns:
the absolute path of the directory containing directory

6.1.4.42 XTSC_API std::string xtsc::xtsc_get_absolute_path (const std::string &

file_name)

Utility function to get the absolute path of the directory containing an existing file.

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Parameters:
file_name The file whose absolute path is desired. file_name may include an absolute
or relative path.

Returns:
the absolute path of the directory containing file_name

6.1.4.43 XTSC_API std::string xtsc::xtsc_get_absolute_path_and_name (const

std::string & file_name)

Utility function to get the absolute path and file name of an existing file.

Parameters:
file_name The file whose absolute path is desired. file_name may include an absolute
or relative path.

Returns:
the absolute path to file_name

6.1.4.44 XTSC_API void∗ xtsc::xtsc_load_library (const std::string & library_name,

bool add_library_extension, const std::string & symbol_name)

Utility function to load a shared library (Linux shared object, MS Windows DLL) and then
get and return the address of a symbol in the library. An xtsc_exception is thrown if the
library cannot be loaded or if the symbol is not found in the library.

Parameters:
library_name The library to be loaded.
add_library_extension If true, up to two attempts will be made to find the library. For
the first attempt an extension of ".so", ".dll", or "d.dll" will be added to library_-
name depending upon whether the environment is Linux, MS Windows Release
build, or MS Windows Debug build (respectively). If no such library is found, then
a second attempt will be made after adding an extension of "_sh.so", "_sh.dll", or
"_shd.dll" to library_name depending on the environment (as above). In addition,
if the environement is Linux and if library_name contains no directory delimiter (no
forward slash), then a prefix of "lib" will be added to library_name. This second
attempt matches the name format used by the standard XTSC plugins installed
in XtensaTools. As an example, if this parameter is true, and library_name is
"xtsc_widget", then the call to dlopen (Linux) or LoadLibrary (MS Windows) will
use:

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Environment First Attempt Second Attempt

------------------ ---------------- --------------------
Linux xtsc_widget.so libxtsc_widget_sh.so
MS Windows Release xtsc_widget.dll xtsc_widget_sh.dll
MS Windows Debug xtsc_widgetd.dll xtsc_widget_shd.dll

symbol_name The symbol to be found in the library.

Returns:
the address of symbol_name.

6.1.4.45 XTSC_API void xtsc::xtsc_log_multiline (log4xtensa::TextLogger &

logger, log4xtensa::LogLevel log_level, const std::string & msg, u32
indent = 0)

This function splits up a multi-line message into multiple calls to the TextLogger::log()
method (one call per line).

Parameters:
logger The TextLogger object.
log_level The log level of this message.
msg The message to log.
indent The number of spaces to indent all lines except the first one.

6.1.4.46 XTSC_API bool xtsc::xtsc_parse_port_name (const std::string &

full_name, std::string & port_name, u32 & port_index)

This utility function parses a optionally-indexed port name into a name portion and and
index. For example if full_name is foobar[7] then port_name will be set to foobar, port_-
index will be set to 7, and the function will return true. An exception will be thrown if
full_name is not of the form PortName or PortName[N].

Parameters:
full_name The full name including the optional index inclosed in brackets.
port_name A reference to a string in which to return the name portion (without index)
port_index A reference to a u32 in which to return the index. If full_name has no
index the port_index will be set to 0.

Returns:
true if the full_name included an index.

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6.1.4.47 XTSC_API bool xtsc::xtsc_is_valid_identifier (const std::string & name)

This utility function can be used to determine if a string is a valid C/C++ identifier.

Parameters:
name The string to be tested.

Returns:
true if name is a valid C/C++ identifier, otherwise return false.

6.1.4.48 XTSC_API char∗ xtsc::xtsc_copy_c_str (const char ∗ str)

This utility function safely copies a c-string (char ∗). It throws an exception if memory for
the new c-string cannot be allocated.

Parameters:
str The c-string to be copied. It can be NULL.

Returns:
a new copy of the str (or NULL if str is NULL).

6.1.4.49 XTSC_API char∗∗ xtsc::xtsc_copy_c_str_array (const char ∗const ∗

str_array)

This utility function safely copies an array of c-strings (char ∗∗). It throws an exception if
memory for the new c-string array or the contained c-strings cannot be allocated.

Parameters:
str_array The c-string array to be copied. The last entry in the array must be NULL.
str_array itself can be NULL.

Returns:
a new copy of the str_array (or NULL if str_array is NULL) with each array entry itself
a new copy .

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6.1.4.50 XTSC_API void xtsc::xtsc_delete_c_str (char ∗& str)

This utility function deletes a c-string and then sets the pointer to NULL.

Parameters:
str The c-string to be deleted. It can be NULL.

6.1.4.51 XTSC_API void xtsc::xtsc_delete_c_str_array (char ∗∗& str_array)

This utility function deletes an array of c-strings (char ∗∗).

Parameters:
str_array The c-string array to be deleted. The last entry in the array must be NULL.
str_array itself can be NULL.

6.1.4.52 XTSC_API void xtsc::xtsc_dump_systemc_objects (std::ostream & os =

std::cout, const std::string & name_pattern = "∗", const std::string &
kind_pattern = "∗")

Dump a list of SystemC objects. This utility method dumps a list of all existing SystemC
objects (sc_object) to the specified ostream object. Optional name and kind patterns may
be specified. If both patterns are specified then both must match for the object to be listed.

Parameters:
os The ostream object to dump the object list to.
name_pattern Optional pattern to match object names against. The pattern may con-
tain 1 or more asterisks (∗) as wildcards. Each ∗ matches 0 or more characters
in any combination.
kind_pattern Optional pattern to match object kind against. The pattern may contain
1 or more asterisks (∗) as wildcards. Each ∗ matches 0 or more characters in any
combination.

6.1.4.53 XTSC_API void xtsc::xtsc_register_command (sc_core::sc_object &

object, xtsc_command_handler_interface & handler, const std::string
& cmd, xtsc::u32 min_args, xtsc::u32 max_args, const std::string &
format, const std::string & man)

Method to register a command with the XTSC command facility. The xtsc_dispatch_-
command() method will call the handler’s execute() method for handling its commands.

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That call is guaranteed to be for a command that was registered via this method and the
command is guaranteed to have a number of arguments within the range [min_args, max_-
args].

Parameters:
object The sc_object supporting the command. Its name() method will be used to
determine the hierarchical name of the command handler.
handler The xtsc_command_handler_interface instance supporting the command.
cmd The command name.
min_args The minimum number of arguments the command requires. Should be 0 if
the command accepts no arguments.
max_args The maximum number of arguments the command will accept. Should be
0 if the command accepts no arguments. Use -1 (0xFFFFFFFF) to specify no
upper limit.
format The command format. The beginning of the format string must be identical to
the cmd argument. If any arguments are supported by the command then they
should also be shown. This string will be presented to the user in response to the
"help" command.
man A one line description of what the command does. This line will be presented to
the user in response to the "man" command.

See also:
xtsc_command_handler_interface
xtsc_dispatch_command

6.1.4.54 XTSC_API void xtsc::xtsc_unregister_command (sc_core::sc_object &

object, const std::string & cmd)

Method to unregister a command with the XTSC command facility. This method allows a
subclass to modify or to disable a command entirely. To do so, the derived class should
call xtsc_unregister_command() on the old version of the command prior to calling xtsc_-
register_command() for the new version.

Parameters:
object The sc_object supporting the command. Its name() method will be used to
determine the hierarchical name of the command handler.
cmd The command name.

See also:
xtsc_register_command

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6.1.4.55 XTSC_API bool xtsc::xtsc_dispatch_command (const std::string &

cmd_line, std::ostream & result = std::cout, bool echo_comment = true,
const std::string & format_msg = "", const std::string & post_help = "",
const std::string & post_man = "")

Method to dispatch an XTSC command line. This method is called by the lua and XTSC
command prompts to dispatch XTSC commands. It may also be called from a SystemC
thread executing a script file specified by the "lua_script_files" parameter or the Lua code
snippet specified on a lua line or inside a "#lua_beg"/"#lua_end" block in an xtsc_script_-
file. In addition, it may be called from a script file running during a SystemC callback and
specified by one of the "lua_script_file_XXX" parameters.

Parameters:
cmd_line The command line to be dispatched. It should include the handler name
followed by the command itself followed by any arguments. A cmd_line starting
with "#" is treated as a comment which is displayed on the console but otherwise
ignored.
result An ostream object in which any non-error result will be stored. Note: If an error
occurs an exception will be thrown.
echo_comment True if comment (#) lines should be echoed to result.
format_msg General command format message to be output if handler cannot be
found or if there is no command. The default message (when format_msg is "") is
appropriate for the XTSC command prompt.
post_help Additional information to be the final output if a user enters a "help" com-
mand with no arguments.
post_man Additional information to be the final output if a user enters a "man" com-
mand with no arguments.

Returns:
false for a cmd_line of "c" (continue), otherwise returns true.

See also:
xtsc_command_handler_interface
xtsc_register_command
xtsc_initialize_parms "lua_command_prompt"
xtsc_initialize_parms "lua_script_files"
xtsc_initialize_parms "lua_script_file_beoe"
xtsc_initialize_parms "lua_script_file_eoe"
xtsc_initialize_parms "lua_script_file_sos"
xtsc_initialize_parms "lua_script_file_eos"
xtsc_initialize_parms "xtsc_command_prompt"

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6.1.4.56 XTSC_API bool xtsc::xtsc_command_argtobool (const std::string &

cmd_line, const std::vector< std::string > & words, xtsc::u32 argument)

This convenience method is for use by the xtsc_command_handler_interface::execute()

method to make it easy to convert an argument to a bool value or to throw a meaningful
exception if this cannot be done.

Parameters:
line Same as passed to the execute() method.
words Same as passed to the execute() method.
argument Which argument to convert to bool. The arguments are numbered starting
at 1 (so words[0] is the command, words[1] is the first argument, words[2] is the
second argument, and so on).

See also:
xtsc_command_handler_interface::execute

6.1.4.57 XTSC_API xtsc::i32 xtsc::xtsc_command_argtoi32 (const std::string &

cmd_line, const std::vector< std::string > & words, xtsc::u32 argument)

This convenience method is for use by the xtsc_command_handler_interface::execute()

method to make it easy to convert an argument to a i32 value or to throw a meaningful
exception if this cannot be done.

Parameters:
line Same as passed to the execute() method.
words Same as passed to the execute() method.
argument Which argument to convert to i32. The arguments are numbered starting
at 1 (so words[0] is the command, words[1] is the first argument, words[2] is the
second argument, and so on).

See also:
xtsc_command_handler_interface::execute

6.1.4.58 XTSC_API xtsc::u32 xtsc::xtsc_command_argtou32 (const std::string &

cmd_line, const std::vector< std::string > & words, xtsc::u32 argument)

This convenience method is for use by the xtsc_command_handler_interface::execute()

method to make it easy to convert an argument to a u32 value or to throw a meaningful
exception if this cannot be done.

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Parameters:
line Same as passed to the execute() method.
words Same as passed to the execute() method.
argument Which argument to convert to u32. The arguments are numbered starting
at 1 (so words[0] is the command, words[1] is the first argument, words[2] is the
second argument, and so on).

See also:
xtsc_command_handler_interface::execute

6.1.4.59 XTSC_API xtsc::u64 xtsc::xtsc_command_argtou64 (const std::string &

cmd_line, const std::vector< std::string > & words, xtsc::u32 argument)

This convenience method is for use by the xtsc_command_handler_interface::execute()

method to make it easy to convert an argument to a u64 value or to throw a meaningful
exception if this cannot be done.

Parameters:
line Same as passed to the execute() method.
words Same as passed to the execute() method.
argument Which argument to convert to u64. The arguments are numbered starting
at 1 (so words[0] is the command, words[1] is the first argument, words[2] is the
second argument, and so on).

See also:
xtsc_command_handler_interface::execute

6.1.4.60 XTSC_API double xtsc::xtsc_command_argtod (const std::string &

cmd_line, const std::vector< std::string > & words, xtsc::u32 argument)

This convenience method is for use by the xtsc_command_handler_interface::execute()

method to make it easy to convert an argument to a double value or to throw a meaningful
exception if this cannot be done.

Parameters:
line Same as passed to the execute() method.
words Same as passed to the execute() method.

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argument Which argument to convert to double. The arguments are numbered start-
ing at 1 (so words[0] is the command, words[1] is the first argument, words[2] is
the second argument, and so on).

See also:
xtsc_command_handler_interface::execute

6.1.4.61 XTSC_API std::string xtsc::xtsc_command_remainder (const std::string

& cmd_line, xtsc::u32 word)

This convenience method is for use by the xtsc_command_handler_interface::execute()

method to make it easy to get the remainder of the command line after and including the
specified word.

Parameters:
line Same as passed to the execute() method.
word The first word to include in the remainder. The words are numbered starting
at 0 (so words[0] is the command, words[1] is the first argument, words[2] is the
second argument, and so on). The <HandlerName> portion of cmd_line is never
returned by this method.

See also:
xtsc_command_handler_interface::execute

6.1.4.62 XTSC_API void xtsc::xtsc_command_throw (const std::string & cmd_line,

const std::string & error_msg)

This convenience method is for use by the xtsc_command_handler_interface::execute()

method to make it slightly easier to throw a meaningful exception.

Parameters:
line Same as passed to the execute() method.
error_msg The basic error message. The command line and the error message will
be concatenated to form the full exception message.

See also:
xtsc_command_handler_interface::execute

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6.1.4.63 XTSC_API std::string xtsc::xtsc_event_register (sc_core::sc_event &

event, const std::string & base_name, sc_core::sc_object ∗ p_object =
NULL)

Register an sc_event with XTSC and give it a name in SystemC 2.2. In SystemC 2.3, this
method just returns the full-hierarchical name from sc_event::name().
The xtsc_event_XXX API’s allow the XTSC command facility to work with SystemC events.

Parameters:
event The sc_event to be registered with XTSC.
base_name The base (non-hierarchical) name of the sc_event. The full hierarchical
name will be formed like this: module.name() + "." + base_name
object A pointer to the sc_object associated with the event or NULL to indicate a
top-level event.

Returns:
the full hierarchical name of the event

6.1.4.64 XTSC_API bool xtsc::xtsc_event_exists (const std::string & event_name)

This method returns true if the named sc_event was registered with XTSC (SystemC 2.2)
or if it exists as a hierarchically-named event (SystemC 2.3). The xtsc_event_XXX API’s
allow the XTSC command facility to work with SystemC events.

Parameters:
event_name The hierarchical name of the sc_event.

See also:
xtsc_event_register

6.1.4.65 XTSC_API sc_core::sc_event& xtsc::xtsc_event_get (const std::string &

event_name)

This method returns the named sc_event. In SystemC 2.2, the event must have been
registered with XTSC via xtsc_event_register().
The xtsc_event_XXX API’s allow the XTSC command facility to work with SystemC events.

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Parameters:
event_name The full hierarchical name of the sc_event.

See also:
xtsc_event_register

6.1.4.66 XTSC_API void xtsc::xtsc_event_dump (std::ostream & os = std::cout,

const std::string & pattern = "∗")

This method dumps a list of all events registered with XTSC (SystemC 2.2) or that are
hierarchically-named events (SystemC 2.3). The xtsc_event_XXX API’s allow the XTSC
command facility to work with SystemC events.

Parameters:
os The ostream object to dump the event list to.
pattern Optional pattern to match events against. The pattern may contain 1 or more
asterisks (∗) as wildcards. Each ∗ matches 0 or more characters in any combina-
tion.

See also:
xtsc_event_register

6.1.4.67 XTSC_API xtsc_host_mutex∗ xtsc::xtsc_host_mutex_open (const

std::string & name)

This method opens a named, recursive mutex and returns a handle to it. If the mutex
already exists, its handle is returned.

Parameters:
name The name of the mutex.

Note: Host mutex support in XTSC is an experimental feature.

See also:
xtsc_host_mutex_lock
xtsc_host_mutex_try_lock
xtsc_host_mutex_unlock
xtsc_host_mutex_close

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6.1.4.68 XTSC_API void xtsc::xtsc_host_mutex_lock (xtsc_host_mutex ∗ p_mutex)

This method does a recursive lock on the specified mutex.

Parameters:
p_mutex The mutex handle as returned by the xtsc_host_mutex_open method.

Note: Host mutex support in XTSC is an experimental feature.

See also:
xtsc_host_mutex_open
xtsc_host_mutex_try_lock
xtsc_host_mutex_unlock
xtsc_host_mutex_close

6.1.4.69 XTSC_API bool xtsc::xtsc_host_mutex_try_lock (xtsc_host_mutex ∗

p_mutex, u64 milliseconds = 0)

This method attempts a recursive lock with a timeout as specified in milliseconds on the
specified mutex.

Parameters:
p_mutex The mutex handle as returned by the xtsc_host_mutex_open method.
milliseconds The maximum number of milliseconds to wait for the lock to succeeded.

Returns:
true if the lock attempt succeeded, false if the lock attempt timeout out (implying the
lock is currently held by some other host process).

Note: Host mutex support in XTSC is an experimental feature.

See also:
xtsc_host_mutex_open
xtsc_host_mutex_lock
xtsc_host_mutex_unlock
xtsc_host_mutex_close

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6.1.4.70 XTSC_API void xtsc::xtsc_host_mutex_unlock (xtsc_host_mutex ∗

p_mutex)

This method does a recursive unlock on the specified mutex. The unlock is recursive in
that the mutex is not actually unlocked until this method is called a number of times equal
to the total of the number of times that xtsc_host_mutex_lock() was called plus the number
of times that xtsc_host_mutex_try_lock() was called and returned true.

Parameters:
p_mutex The mutex handle as returned by the xtsc_host_mutex_open method.

Note: Host mutex support in XTSC is an experimental feature.

See also:
xtsc_host_mutex_open
xtsc_host_mutex_lock
xtsc_host_mutex_try_lock
xtsc_host_mutex_close

6.1.4.71 XTSC_API void xtsc::xtsc_host_mutex_close (xtsc_host_mutex ∗

p_mutex)

This method closes the specified mutex. If the mutex is currently locked by this OS process,
then xtsc_host_mutex_unlock() is called as many times as necessary to unlock it.

Parameters:
p_mutex The mutex handle as returned by the xtsc_host_mutex_open method.

Note: Host mutex support in XTSC is an experimental feature.

See also:
xtsc_host_mutex_open
xtsc_host_mutex_lock
xtsc_host_mutex_try_lock
xtsc_host_mutex_unlock

6.1.4.72 XTSC_API u64 xtsc::xtsc_host_milliseconds ()

This method returns the number of milliseconds of wall time since some unspecified be-
ginning time. This method uses clock_gettime() on Linux and GetTickCount64() on MS
Windows.

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6.1.4.73 XTSC_API void xtsc::xtsc_host_sleep (u64 milliseconds = 0)

This method causes a host OS sleep for the specified number of milliseconds. This method
uses nanosleep() on Linux and Sleep() on MS Windows.

Parameters:
milliseconds The number of milliseconds to sleep.

6.1.4.74 XTSC_API u32 xtsc::xtsc_get_next_watchfilter_number ()

Return a unique 32-bit number suitable for use as watchfilter number.

See also:
xtsc_filter

6.1.4.75 XTSC_API void xtsc::xtsc_filter_kind_register (const std::string & kind,

const std::set< std::string > & keys, const std::set< std::string > &
range_keys)

Method to register a new xtsc_filter kind. The XTSC libraries currently define xtsc_filter
kinds of "xtsc_request", "xtsc_response", "xtsc_peek", and "xtsc_poke". The xtsc_filter_-
kind_register() method will throw an exception if kind has already been registered.
Note: Filter kinds starting with "xtsc" are reserved to the XTSC libraries.

Parameters:
kind The filter kind which must not already be registered.
keys The names of the allowed keys in an xtsc_filter of this kind.
range_keys The names of the keys which may have ranges specified for their value.
All entries in range_keys set must also be in the keys set.

See also:
xtsc_filter
xtsc_filter_kind_dump

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6.1.4.76 XTSC_API void xtsc::xtsc_filter_kind_dump (const std::string & kind = "",

std::ostream & os = std::cout)

Method to dump the list of keys of a specific xtsc_filter kind or to dump a list of all registered
xtsc_filter kinds. The xtsc_filter_kind_dump() method dumps a list of the allowed keys of the
specified xtsc_filter kind to the specified ostream. The key name is followed by an asterisk
if the key value is allowed to have a range of values specified. If kind is not specified, then
this method dumps a list of all xtsc_filter kinds.

Parameters:
kind The desired filter kind or empty to get a list of all registerd filter kinds.
os The ostream object to which the list is to be dumped.

See also:
xtsc_filter
xtsc_filter_kind_register

6.1.4.77 XTSC_API bool xtsc::xtsc_filter_exists (const std::string & name)

Method to determine if an xtsc_filter of a given name exists. This method returns true if an
xtsc_filter of the specified name exists. Otherwise it returns false.

Parameters:
name The xtsc_filter name of interest.

See also:
xtsc_filter
xtsc_filter_create
xtsc_filter_dump
xtsc_filter_get

6.1.4.78 XTSC_API const xtsc_filter& xtsc::xtsc_filter_create (const std::string &

kind, const std::string & name, const xtsc_filter_table & key_value_pairs)

Method to create an xtsc_filter of the specified kind with the specified name. This method
creates and returns an xtsc_filter of the specified kind and with the specified name and
key-value pairs. An exception is thrown if kind is not registered, if name already exists,
or if key_value_pair contains a key which was not specified when the xtsc_filter kind was
registered.

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Parameters:
kind The kind of the xtsc_filter object. This kind must have already been registered
with XTSC.
name The name of the xtsc_filter object. No other xtsc_filter (even of a different kind)
may have this same name. Filter names may be formed using the same character
requirements as C/C++ identifiers.
key_value_pairs The table (vector) of key-value pairs. Both keys and values are
strings.

See also:
xtsc_filter_kind_register
xtsc_filter
xtsc_filter_dump
xtsc_filter_exists
xtsc_filter_get

6.1.4.79 XTSC_API void xtsc::xtsc_filter_dump (const std::string & kind = "",

const std::string & name = "", std::ostream & os = std::cout)

Method to dump a list of filters of the specified kind or to dump the key-value pairs of a
specific named xtsc_filter. This method dumps a list of xtsc_filter names of the specified
kind or it dumps a list of the key-value pairs of the named xtsc_filter. It both kind and name
are specified, name is ignored. If neither kind nor name are specified, a list of the names
of all xtsc_filter objects and their associated filter kind is dumped.

Parameters:
kind The kind of xtsc_filter objects to list.
name The name of a specific xtsc_filter whose key-value pairs are to be dumped.
os The ostream object to which the list is to be dumped.

See also:
xtsc_filter_kind_register
xtsc_filter
xtsc_filter_create
xtsc_filter_exists
xtsc_filter_get

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6.1.4.80 XTSC_API const xtsc_filter& xtsc::xtsc_filter_get (const std::string &

name)

Method to get a reference to the xtsc_filter object specified by name. This method throws
an exception if the named xtsc_filter does not exist.

Parameters:
name The name of a the desired xtsc_filter.

See also:
xtsc_filter
xtsc_filter_create
xtsc_filter_exists
xtsc_filter_dump

6.1.4.81 XTSC_API bool xtsc::xtsc_filter_apply_xtsc_peek (const std::string &

name, xtsc::u32 port, xtsc::xtsc_address address, xtsc::u32 size, const
xtsc::u8 ∗ buffer)

Convenience method to a apply an xtsc_filter of kind xtsc_peek to an nb_peek payload.

This method returns true if the payload passes the filter, otherwise it returns false. This
method should only be called after the buffer is populated.

Parameters:
name The name of the desired xtsc_filter.
port The port the nb_peek call came in on. Ports are numbered starting at 0.
address The address specified in the nb_peek call.
size The size specified in the nb_peek call.
buffer The buffer specified in the nb_peek call.

See also:
xtsc_filter

6.1.4.82 XTSC_API bool xtsc::xtsc_filter_apply_xtsc_poke (const std::string &

name, xtsc::u32 port, xtsc::xtsc_address address, xtsc::u32 size, const
xtsc::u8 ∗ buffer)

Convenience method to a apply an xtsc_filter of kind xtsc_poke to an nb_poke payload.

This method returns true if the payload passes the filter, otherwise it returns false.

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Parameters:
name The name of the desired xtsc_filter.
port The port the nb_poke call came in on. Ports are numbered starting at 0.
address The address specified in the nb_poke call.
size The size specified in the nb_poke call.
buffer The buffer specified in the nb_poke call.

See also:
xtsc_filter

6.1.4.83 XTSC_API bool xtsc::xtsc_filter_apply_xtsc_request (const std::string &

name, xtsc::u32 port, const xtsc_request & request)

Convenience method to apply an xtsc_filter of kind xtsc_request to an nb_request payload.

This method returns true if the payload passes the filter, otherwise it returns false.

Parameters:
name The name of the desired xtsc_filter.
port The port the nb_request call came in on. Ports are numbered starting at 0.
request The xtsc_request specified in the nb_request call.

See also:
xtsc_filter

6.1.4.84 XTSC_API bool xtsc::xtsc_filter_apply_xtsc_response (const std::string &

name, xtsc::u32 port, const xtsc_response & response)

Convenience method to a apply an xtsc_filter of kind xtsc_response to an nb_respond

payload. This method returns true if the payload passes the filter, otherwise it returns false.

Parameters:
name The name of the desired xtsc_filter.
port The port the nb_respond call came in on. Ports are numbered starting at 0.
response The xtsc_response specified in the nb_respond call.

See also:
xtsc_filter

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6.1.4.85 XTSC_API u32 xtsc::xtsc_reset (bool hard_reset)

This method calls xtsc_resettable::reset(hard_reset) on all objects of type xtsc_resettable.

Note: Most XTSC models ignore the hard_reset argument. Those that do use it (for exam-
ple, xtsc_component::xtsc_memory and xtsc_component::xtsc_lookup), tend to use hard_-
reset of true to indicate that memory contents should be restored to its initial value.
Note: After calling this method, you will typically need to reload the target program of any
xtsc_core instances in your system.

Returns:
the number of xtsc_resettable objects.

6.1.4.86 XTSC_API std::string xtsc::xtsc_get_port_type_name (xtsc_port_type

port_type, bool bare = false)

Return a string showing the C++ type of the port.

Parameters:
bare If true, return the Xtensa TLM interface type as a string (port_type must refer
to an sc_export of one of the Xtensa TLM interfaces; that is DEBUG_EXPORT
<= port_type <= TX_XFER_EXPORT). For example, if port_type is WIRE_-
WRITE_EXPORT, then this method will return "sc_export<xtsc_wire_write_if>"
when bare is false and "xtsc_wire_write_if" when bare is true.

See also:
xtsc_port_type_check

6.1.4.87 XTSC_API bool xtsc::xtsc_is_user_defined_port_type (xtsc_port_type

port_type)

Returns true if the specified port type is a user-defined type. The user-defined port types
are: USER_DEFINED_PORT USER_DEFINED_EXPORT USER_DEFINED_INITIATOR
USER_DEFINED_TARGET USER_DEFINED_OUTPUT USER_DEFINED_INPUT

See also:
xtsc_connection_interface::get_user_defined_port_type

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6.1.4.88 XTSC_API bool xtsc::xtsc_is_xttlm_port_type (xtsc_port_type port_type)

Returns true if the interface associated with the specified port type is an Xtensa TLM in-
terface. Note: Returns false for USER_DEFINED_PORT and USER_DEFINED_EXPORT.

6.1.4.89 XTSC_API bool xtsc::xtsc_is_tlm2_port_type (xtsc_port_type port_type)

Returns true if the interface associated with the specified port type is an OSCI TLM2 inter-
face. Note: Returns true for USER_DEFINED_INITIATOR and USER_DEFINED_TARGET.

6.1.4.90 XTSC_API bool xtsc::xtsc_is_pin_level_port_type (xtsc_port_type

port_type)

Returns true if the specified port type is a pin-level port type (sc_out<> or sc_in<>). Note:
Returns true for USER_DEFINED_OUTPUT and USER_DEFINED_INPUT.

6.1.4.91 XTSC_API void xtsc::xtsc_confirm_conjugate_user_defined_port_types

(xtsc_connection_interface & instance_a, const std::string & port_a,
const std::string & port_b, xtsc_connection_interface & instance_b)

This method will throw an exception if the two specified ports are not conjugate user-defined
port types.

See also:
xtsc_connection_interface::get_user_defined_port_type

6.1.4.92 XTSC_API bool xtsc::xtsc_port_type_check (xtsc_port_type port_type,

sc_core::sc_object ∗ p_port)

Determine if the specified sc_object is of the specified xtsc_port_type. If the sc_object

pointed to by p_port is not of the xtsc_port_type specified by port_type, then this method
will either throw an exception (if the "xtsc_port_type_check_bypass" xtsc_initialize_parms
parameter is false) or log an INFO_LOG_LEVEL message and return (if the "xtsc_port_-
type_check_bypass" parameter is true).
If this method does not throw an exception then it normally returns false; however, if port_-
type refers to an sc_export of one of the Xtensa TLM interfaces (DEBUG_EXPORT <=
port_type <= TX_XFER_EXPORT) and p_port points directly to an implementation of that

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interface instead of pointing to an sc_export of that interface, then this method will return
true.

See also:
xtsc_initialize_parms
xtsc_port_type
xtsc_get_port_type_name

6.1.4.93 XTSC_API xtsc::u32 xtsc::xtsc_connect (xtsc_connection_interface &

instance_a, const std::string & port_a, const std::string & port_b,
xtsc_connection_interface & instance_b)

This method can be used to connect two modules using named ports (or port tables) from
each module. Each named port must appear as an entry in its respective xtsc_connection_-
interface::m_port_types map. In addition, the two named ports must be conjugates of each
other.
Note: Port names are case-sensitive.

Returns:
The number of elementary port pairs connected. Note: For an N-ported Xtensa TLM
memory interface, this method will return 2∗N (1 for the request channel and 1 for the
response channel).

See also:
xtsc_port_type
xtsc_connection_interface
xtsc_connection_interface::m_port_types
xtsc_core::How_to_do_port_binding;

6.1.4.94 XTSC_API xtsc_core::memory_port& xtsc::operator++

(xtsc_core::memory_port & port)

Prefix operator++ used to iterate memory_port. For example,

xtsc_core::memory_port p;
for (p=xtsc_core::MEM_FIRST; p<=xtsc_core::MEM_LAST; ++p) {
...
}

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6.1.4.95 XTSC_API std::ostream& xtsc::operator<< (std::ostream & os, const

xtsc_request & request)

Dump an xtsc_request object. This operator dumps an xtsc_request object using the xtsc_-
request::dump() method.

6.1.4.96 XTSC_API std::ostream& xtsc::operator<< (std::ostream & os, const

xtsc_request::stream_dumper & dumper)

Dump an xtsc_request object. This operator dumps an xtsc_request object using the xtsc_-
request::stream_dumper::dump() method.

6.1.4.97 XTSC_API std::ostream& xtsc::operator<< (std::ostream & os, const

xtsc_response & response)

Dump an xtsc_response object. This operator dumps an xtsc_response object using the
xtsc_response::dump() method.

6.1.4.98 XTSC_API std::ostream& xtsc::operator<< (std::ostream & os, const

xtsc_response::stream_dumper & dumper)

Dump an xtsc_response object. This operator dumps an xtsc_response object using the
xtsc_response::stream_dumper::dump() method.

6.1.4.99 XTSC_API std::ostream& xtsc::operator<< (std::ostream & os, const

xtsc_tx_xfer & xfer)

Dump an xtsc_tx_xfer object. This operator dumps an xtsc_tx_xfer object using the xtsc_-
tx_xfer::dump() method.

6.1.5 Variable Documentation

6.1.5.1 Readme xtsc_text_logging_macros

Summary of macros to disable or to do text logging. The following macros may be passed
to the compiler to disable text logging at compile time.

XTSC_DISABLE_LOGGING Disable all text and binary logging (FATAL, ERROR

and WARN text messages will be sent to stderr).
XTSC_DISABLE_FATAL_LOGGING Disable all text logging (FATAL, ERROR, and WARN

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messages will be sent to stderr).

XTSC_DISABLE_ERROR_LOGGING Disable all text logging at ERROR level and below
(ERROR and WARN messages will be sent to stderr).
XTSC_DISABLE_WARN_LOGGING Disable all text logging at WARN level and below
(WARN messages will be sent to stderr).
XTSC_DISABLE_NOTE_LOGGING Disable all text logging at NOTE level and below.
XTSC_DISABLE_INFO_LOGGING Disable all text logging at INFO level and below.
XTSC_DISABLE_VERBOSE_LOGGING Disable all text logging at VERBOSE level and below.
XTSC_DISABLE_DEBUG_LOGGING Disable all text logging at DEBUG level and below.
XTSC_DISABLE_TRACE_LOGGING Disable all text logging at TRACE level and below.

Unless compiled out using the above macros, the following macros may be used in source
code to do text logging at the specified level.

XTSC_FATAL(logger, msg)
XTSC_ERROR(logger, msg)
XTSC_WARN(logger, msg)
XTSC_NOTE(logger, msg)
XTSC_INFO(logger, msg)
XTSC_VERBOSE(logger, msg)
XTSC_DEBUG(logger, msg)
XTSC_TRACE(logger, msg)

See also:
XTSC_FATAL
XTSC_ERROR
XTSC_WARN
XTSC_NOTE
XTSC_INFO
XTSC_VERBOSE
XTSC_DEBUG
XTSC_TRACE

6.1.5.2 Readme sc_command_handler_commands

The following commands are supported by the global XTSC command handler called sc.

sc_delta_count
Return sc_core::sc_delta_count() (the total delta cycles in the simulation so
far).

sc_get_time_resolution
Return sc_core::sc_get_time_resolution().to_string().

sc_stop
Call sc_core::sc_stop().

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sc_time_stamp
Return sc_core::sc_time_stamp().value() (the current simulation time in units of
the SystemC time resolution).

sc_version
Return sc_core::sc_version().

wait [<NumCycles> | <EventName> ...]

Call sc_module::wait(<NumCycles> * xtsc::xtsc_get_system_clock_period()) or
sc_module::wait(<EventOrList>). <NumCycles> can be a non-integer. An
<EventName> can be - to mean last event from xtsc_event_create. <EventOrList>
is formed from all <EventName> arguments. Returns the logging system timestamp.

waitall <EventName> ...

Call sc_module::wait(<EventAndList>). <EventAndList> is formed from all
<EventName> arguments. Returns the logging system timestamp.

See also:
xtsc_command_handler_interface

6.1.5.3 Readme xtsc_command_handler_commands

The following commands are supported by the global XTSC command handler called xtsc.

dump_status
Call xtsc_core::dump_status() for all cores in the simulation.

dump_log_levels
Dump a list of the named log levels and their numeric value.

dump_loggers [<Pattern>]
Dump a list of all logger names (or optionally only those matching <Pattern>).

get_log_level <Logger>
Return the numeric log level of <Logger>.

have_all_cores_exited
Return xtsc_core::have_all_cores_exited() for all cores in the simulation.

info <Message>
Log entire command line (xtsc info <Message>) at INFO_LOG_LEVEL

is_debugging_synchronized
Return xtsc_core::is_debugging_synchronized() (applies to all debug-enabled
cores in the simulation).

note <Message>
Log entire command line (xtsc note <Message>) at NOTE_LOG_LEVEL

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set_log_level <Logger> <LogLevel>

Set log level of <Logger> to <LogLevel> (numeric). Return previous numeric log
level.

shmem_list
List all shared memories from calls to xtsc_get_shared_memory().

shmem_get <Name> <BaseAddress> <Size>

Call xtsc_get_shared_memory(<Name>, <Size>, "shmem_get", "XTSC command", <BaseAddress>).

shmem_dump <Name> <Address> <NumBytes>

Dump <NumBytes> bytes from <Address> of shared memory <Name> using xtsc_hex_dump().

shmem_peek <Name> <StartAddress> <NumBytes>

Peek <NumBytes> bytes from <StartAddress> of shared memory <Name>.

shmem_poke <Name> <StartAddress> <NumBytes> <Byte1> <Byte2> . . . <ByteN>

Poke <NumBytes> (=N) starting at <StartAddress> to shared memory <Name>.

warn <Message>
Log entire command line (xtsc warn <Message>) at WARN_LOG_LEVEL

whoami
Return the instance name of the sc_module running this thread.

xtsc_dump_systemc_objects [<Pattern>]
Return os buffer from calling xtsc_dump_systemc_objects(os, <Pattern>).

xtsc_enable_text_logging <Enable>
Call xtsc_enable_text_logging(<Enable>). <Enable> may be 0|1.

xtsc_event_create <EventName>
Create a new sc_event and return its hierarchical name (which may differ between
SystemC 2.2 and 2.3).

xtsc_event_dump [<Pattern>] ...

Return os buffer from calling xtsc_event_dump(os, <Pattern>) repeatedly for each
<Pattern>.

xtsc_event_exists <EventName>
Return xtsc_event_exists(<EventName>).

xtsc_event_notify <EventName> [<NumCycles>]

Call xtsc_event_get(<EventName>).(<NumCycles> *
xtsc::xtsc_get_system_clock_period()) or xtsc_event_get(<EventName>).() if
<NumCycles> is unspecified.

xtsc_filter_create <FilterKind> <FilterName> [<Key>=<Value>] ...

Call xtsc_filter_create(<FilterKind>, <FilterName>, Pairs) where Pairs is a
table containing all the <Key>=<Value> arguments.

xtsc_filter_dump [<FilterKindOrName>]
Call xtsc_filter_dump(<FilterKindOrName>, <FilterKindOrName>).

xtsc_filter_exists <FilterName>
Return xtsc_filter_exists(<FilterName>).

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xtsc_filter_kind_dump [<FilterKind>]
Call xtsc_filter_kind_dump(<FilterKind>).

xtsc_get_relaxed_simulation_interval
Return xtsc::xtsc_get_relaxed_simulation_interval() /
xtsc::xtsc_get_system_clock_period().

xtsc_get_system_clock_factor
Return xtsc::xtsc_get_system_clock_factor().

xtsc_is_text_logging_enabled
Return xtsc::xtsc_is_text_logging_enabled().

xtsc_host_milliseconds
Return xtsc::xtsc_host_milliseconds().

xtsc_host_mutex_close <MutexName>
Call xtsc_host_mutex_close(Mutex(<MutexName>)).

xtsc_host_mutex_dump [<Pattern>]
Dump list of xtsc_host_mutex names, lock counts, and current state for names matching <Pattern> (defaul

xtsc_host_mutex_lock <MutexName>
Call xtsc_host_mutex_lock(Mutex(<MutexName>)).

xtsc_host_mutex_open <MutexName>
Call xtsc_host_mutex_open(<MutexName>).

xtsc_host_mutex_try_lock <MutexName> [<Milliseconds>]

Call xtsc_host_mutex_try_lock(Mutex(<MutexName>), <Milliseconds>).

xtsc_host_mutex_unlock <MutexName>
Call xtsc_host_mutex_unlock(Mutex(<MutexName>)).

xtsc_host_sleep [<Milliseconds>]
Call xtsc_host_sleep(<Milliseconds>).

xtsc_pattern_match <Pattern> <Str>

Return xtsc::xtsc_pattern_match(<Pattern>, <Str>).

xtsc_prepare_to_switch_sim_mode <Turbo>
Call xtsc::xtsc_prepare_to_switch_sim_mode(<Turbo>). Returns 1 if ready, else
returns 0. <Turbo> may be 0|1 (0=>Cycle-Accurate 1=>TurboXim)

xtsc_reset <HardReset>
Return xtsc::xtsc_reset(<HardReset>).

xtsc_set_relaxed_simulation_interval <NumCycles>
Call xtsc::xtsc_set_relaxed_simulation_interval(<NumCycles> *
xtsc::xtsc_get_system_clock_period()).

xtsc_switch_sim_mode <Turbo>
Call xtsc::xtsc_switch_sim_mode(<Turbo>). See xtsc_prepare_to_switch_sim_mode
which must return 1 before xtsc_switch_sim_mode is called.

xtsc_user_state_dump [<Pattern>]
Return the buffer from calling xtsc_user_state_dump(<Pattern>)

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xtsc_user_state_get <Name>
Return xtsc_user_state_get(<Name>)

xtsc_user_state_set <Name> [<Value>]

Call xtsc_user_state_set(<Name>, <Value>)

xtsc_version
Return xtsc::xtsc_version().

See also:
xtsc_command_handler_interface

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6.2 xtsc_component Namespace Reference

All XTSC component library objects are in the xtsc_component namespace.

Classes
• class xtsc_cache_parms
Constructor parameters for an xtsc_cache object.

• class xtsc_cache
This class implements an XTSC model of a typical cache module.

• class xtsc_arbiter_parms
Constructor parameters for a xtsc_arbiter object.

• class xtsc_arbiter
A memory interface arbiter and/or address translator.

• class xtsc_dma_engine_parms
Constructor parameters for a xtsc_dma_engine object.

• class xtsc_dma_engine
An example DMA engine implementation.

• struct xtsc_dma_request
This struct is plain old data (POD) used to define a DMA request.

• struct xtsc_dma_descriptor
This struct is plain old data (POD) used to define each descriptor of a DMA request.

• class xtsc_lookup_parms
Constructor parameters for a xtsc_lookup object.

• class xtsc_lookup
An TIE lookup implementation that connects using TLM-level ports.

• class xtsc_lookup_driver_parms
Constructor parameters for a xtsc_lookup_driver object.

• class xtsc_lookup_driver
A scripted driver for a lookup.

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• class xtsc_master_parms
Constructor parameters for a xtsc_master object.

• class xtsc_master
A scripted memory interface master.

• class xtsc_master_tlm2_parms
Constructor parameters for a xtsc_master_tlm2 object.

• class xtsc_master_tlm2
A scripted OSCI TLM2 memory interface master.

• class xtsc_memory_parms
Constructor parameters for a xtsc_memory object.

• class xtsc_memory
A PIF, XLMI, or local memory.

• class xtsc_memory_tlm2_parms
Constructor parameters for a xtsc_memory_tlm2 object.

• class xtsc_memory_tlm2
A PIF, XLMI, or local memory which uses OSCI TLM2.

• class xtsc_mmio_parms
Constructor parameters for a xtsc_mmio object.

• class xtsc_mmio
A general-purpose memory-mapped input/output (MMIO) register device.

• class xtsc_queue_parms
Constructor parameters for an xtsc_queue object.

• class xtsc_queue
A queue implementation that connects using TLM-level ports.

• class xtsc_queue_consumer_parms
Constructor parameters for a xtsc_queue_consumer object.

• class xtsc_queue_consumer
A scripted consumer to drain a queue.

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• class xtsc_queue_producer_parms
Constructor parameters for a xtsc_queue_producer object.

• class xtsc_queue_producer
A scripted producer to supply a queue.

• class xtsc_router_parms
Constructor parameters for a xtsc_router object.

• class xtsc_router
Example XTSC module implementing a router on a PIF network or local memory intercon-
nect.

• class xtsc_slave_parms
Constructor parameters for a xtsc_slave object.

• class xtsc_slave
A scripted memory interface slave.

• class xtsc_wire_parms
Constructor parameters for a xtsc_wire object.

• class xtsc_wire
A wire implementation that connects using TLM-level ports.

• class xtsc_wire_source_parms
Constructor parameters for a xtsc_wire_source object.

• class xtsc_wire_source
A scripted xtsc::xtsc_wire_write_if or pin-level source.

• class xtsc_lookup_pin_parms
Constructor parameters for a xtsc_lookup_pin object.

• class xtsc_lookup_pin
A TIE lookup implementation using the pin-level interface.

• class xtsc_memory_base
• class xtsc_memory_pin_parms
Constructor parameters for a xtsc_memory_pin object.

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• class xtsc_memory_pin
This device implements a pin-level memory model.

• class xtsc_memory_trace_parms
Constructor parameters for a xtsc_memory_trace object.

• class xtsc_memory_trace
Example XTSC model which generates a value-change dump (VCD) file of the data mem-
bers of each xtsc::xtsc_request and xtsc::xtsc_response that passes through it ("allow_-
tracing" true) and/or which tracks the lifetime, latency, and counters of each transaction by
request type and by port number ("track_latency" true).

• class xtsc_module_pin_base
This is a base class for modules implementing pin-level interfaces, especially pin-level
memory interfaces.

• class xtsc_pin2tlm_lookup_transactor_parms
Constructor parameters for a xtsc_pin2tlm_lookup_transactor object.

• class xtsc_pin2tlm_lookup_transactor
A transactor to convert a pin-level TIE lookup interface to Xtensa TLM.

• class xtsc_pin2tlm_memory_transactor_parms
Constructor parameters for a xtsc_pin2tlm_memory_transactor transactor object.

• class xtsc_pin2tlm_memory_transactor
This device converts memory transactions from pin level to transaction level.

• class xtsc_queue_pin_parms
Constructor parameters for a xtsc_queue_pin object.

• class xtsc_queue_pin
A TIE queue implementation using the pin-level interface.

• class xtsc_tlm2pin_memory_transactor_parms
Constructor parameters for a xtsc_tlm2pin_memory_transactor transactor object.

• class xtsc_tlm2pin_memory_transactor
This transactor converts memory transactions from transaction level (TLM) to pin level.

• class xtsc_tlm22xttlm_transactor_parms
Constructor parameters for a xtsc_tlm22xttlm_transactor object.

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• class xtsc_tlm22xttlm_transactor
Example module implementing an OSCI TLM2 to Xtensa TLM (xttlm) transactor.

• class xtsc_wire_logic_parms
Constructor parameters for a xtsc_wire_logic object.

• class xtsc_wire_logic
A general-purpose glue logic device for the xtsc::xtsc_wire_write_if.

• class xtsc_xttlm2tlm2_transactor_parms
Constructor parameters for a xtsc_xttlm2tlm2_transactor object.

• class xtsc_xttlm2tlm2_transactor
Example module implementing an Xtensa TLM (xttlm) to OSCI TLM2 transactor.

Typedefs

• typedef struct xtsc_dma_request xtsc_dma_request

• typedef struct xtsc_dma_descriptor xtsc_dma_descriptor

Functions

• XTSC_COMP_API std::ostream & operator<< (std::ostream &os, const xtsc_-

memory::address_info &info)
• std::ostream & operator<< (std::ostream &os, const xtsc_mmio::register_definition
&reg)
• std::ostream & operator<< (std::ostream &os, const xtsc_mmio::output_definition
&output)
• std::ostream & operator<< (std::ostream &os, const xtsc_mmio::input_definition
&input)
• std::ostream & operator<< (std::ostream &os, const xtsc_wire_logic::output_-
definition &output)
• std::ostream & operator<< (std::ostream &os, const xtsc_wire_logic::input_-
definition &input)
• std::ostream & operator<< (std::ostream &os, const xtsc_wire_logic::iterator_-
definition &iterator)

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6.2.1 Detailed Description

All XTSC component library objects are in the xtsc_component namespace. Note: this
does not include xtsc_core which is in the xtsc namespace.

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7. Class Documentation

7.1 address_info Class Reference

POD class to help keep track of information related to a special address or address range.
#include <xtsc/xtsc_memory.h>

Public Types

• typedef xtsc::xtsc_response::status_t status_t

• typedef xtsc::xtsc_address xtsc_address
• typedef xtsc::u32 u32

Public Member Functions

• address_info (xtsc_address low_address, xtsc_address high_address, bool is_-

range, u32 port_num, u32 num_ports, u32 type, status_t status, bool list, u32 limit)

• void dump (std::ostream &os=std::cout) const

• bool used ()
Increments m_count, adjusts m_finished if required, returns m_finished.

Public Attributes

• xtsc_address m_low_address
Single address or low address of address range.

• xtsc_address m_high_address
High address of address range.

• bool m_is_range
True if this is an address range.

• u32 m_port_num
0-m_num_ports: If m_port_num==m_num_ports it means port number is don’t care.

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• u32 m_num_ports
Number of ports that the memory has.

• u32 m_type
0-7: where 0=READ, 1=BLOCK_READ, 2=RCW, 3=WRITE, 4=BLOCK_WRITE, 5=don’t
care 6=BURST_READ 7=BURST_WRITE

• status_t m_status
The response status to be given (when m_list is false).

• bool m_list
True if the response status should be taken from the response status list.

• u32 m_limit
How many times this address/range should get the specified response (0=no limit).

• u32 m_count
How many times this address/range has gotten the specified response.

• bool m_finished
True when m_limit has been reached.

7.1.1 Detailed Description

POD class to help keep track of information related to a special address or address range.
Definition at line 1559 of file xtsc_memory.h.
The documentation for this class was generated from the following file:

• xtsc_memory.h

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7.2 address_range Class Reference

Class to keep track of address ranges and what DMI access has been granted/invalidated.

Public Member Functions

• address_range (xtsc::xtsc_address beg_range, xtsc::xtsc_address end_range)

Public Attributes
• xtsc::xtsc_address m_beg_range
Beginning address of the range.

• xtsc::xtsc_address m_end_range
End address of the range.

7.2.1 Detailed Description

Class to keep track of address ranges and what DMI access has been granted/invalidated.
Definition at line 505 of file xtsc_tlm22xttlm_transactor.h.
The documentation for this class was generated from the following file:

• xtsc_tlm22xttlm_transactor.h

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7.3 address_range Class Reference

Class to keep track of address ranges and what DMI access has been granted/invalidated.

Public Member Functions

• address_range (xtsc::xtsc_address beg_range, xtsc::xtsc_address end_range)

Public Attributes
• xtsc::xtsc_address m_beg_range
Beginning address of the range.

• xtsc::xtsc_address m_end_range
End address of the range.

7.3.1 Detailed Description

Class to keep track of address ranges and what DMI access has been granted/invalidated.
Definition at line 750 of file xtsc_xttlm2tlm2_transactor.h.
The documentation for this class was generated from the following file:

• xtsc_xttlm2tlm2_transactor.h

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7.4 bit_field_info Struct Reference

Public Member Functions

• bit_field_info (xtsc::u32 pre_shift, xtsc::u32 mask, xtsc::u32 post_shift)

Public Attributes
• xtsc::u32 m_pre_shift
Amount to right shift the address by before masking.

• xtsc::u32 m_mask
Mask to extract bits to be used in routing.

• xtsc::u32 m_post_shift
Amount to left shift the masked value by.

7.4.1 Detailed Description

Definition at line 1126 of file xtsc_router.h.

The documentation for this struct was generated from the following file:

• xtsc_router.h

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7.5 input_definition Class Reference

Input definition and sc_export.

#include <xtsc/xtsc_mmio.h>Collaboration diagram for input_definition:

xtsc_script_file
m_p_definition_file
m_mmio
m_p_wire_write_impl
xtsc_parms xtsc_mmio_parms m_p_register_definition input_definition
m_mmio_parms
m_input_definition xtsc_wire_write_if_impl
m_mmio register_definition
xtsc_resettable xtsc_module xtsc_mmio
m_mmio xtsc_wire_write_if

m_active_request m_request_impl
xtsc_connection_interface xtsc_command_handler_interface
xtsc_request_if_impl

xtsc_debug_if xtsc_request_if

xtsc_request m_p_request
stream_dumper
m_stream_dumper

Classes
• class xtsc_wire_write_if_impl
Implementation of xtsc_wire_write_if.

Public Member Functions

• input_definition (xtsc_mmio &mmio)
Constructor.

• void dump (std::ostream &os=std::cout) const

Dump.

Public Attributes
• xtsc_mmio & m_mmio
Our xtsc_mmio object.

• std::string m_name
Input port name.

• register_definition ∗ m_p_register_definition
Our associated register_definition.

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• xtsc::u32 m_high_bit
High bit of register.

• xtsc::u32 m_low_bit
Low bit of register.

• xtsc_wire_write_if_impl ∗ m_p_wire_write_impl
m_p_wire_write_export binds to this

• wire_write_export ∗ m_p_wire_write_export
sc_export for this input

7.5.1 Detailed Description

Input definition and sc_export.

Definition at line 822 of file xtsc_mmio.h.
The documentation for this class was generated from the following file:

• xtsc_mmio.h

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7.6 input_definition Class Reference

Input definition and sc_export.

#include <xtsc/xtsc_wire_logic.h>Collaboration diagram for input_definition:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface xtsc_script_file

m_p_definition_file

xtsc_wire_logic

m_logic

xtsc_wire_write_if input_definition

m_input_definition m_p_wire_write_impl

xtsc_wire_write_if_impl

Classes

• class xtsc_wire_write_if_impl
Implementation of xtsc_wire_write_if.

Public Member Functions

• input_definition (xtsc_wire_logic &logic, const std::string &name, xtsc::u32 index,

xtsc::u32 bit_width, const std::string &initial_value)
Constructor.

• void reset ()
• void dump (std::ostream &os=std::cout) const

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Dump.

Public Attributes

• xtsc_wire_logic & m_logic

Our xtsc_wire_logic object.

• std::string m_name
Input port name.

• xtsc::u32 m_index
Our index in xtsc_wire_logic::m_inputs.

• xtsc::u32 m_bit_width
Port width in bits.

• sc_dt::sc_unsigned m_value
Latest received value of input.

• std::string m_initial_value
From <InitialValue> in definition_file.

• bool m_detect_value_change
True if any dependent output has a <WritePolicy> of change.

• assignment_table m_assignments
Vector of RPN assignments; 1 for each output bit touched by this input.

• output_set m_lua_function_outputs
Set of all lua_function outputs that depend on this input.

• output_set m_outputs
Set of all outputs that depend on this input.

• xtsc_wire_write_if_impl ∗ m_p_wire_write_impl
m_p_wire_write_export binds to this

• wire_write_export ∗ m_p_wire_write_export
sc_export for this input

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7.6.1 Detailed Description

Input definition and sc_export.

Definition at line 814 of file xtsc_wire_logic.h.
The documentation for this class was generated from the following file:

• xtsc_wire_logic.h

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7.7 iterator_definition Class Reference

Iterator definition.
#include <xtsc/xtsc_wire_logic.h>

Public Member Functions

• iterator_definition (std::string &name, xtsc::u32 index, xtsc::u32 start, xtsc::u32 stop,
xtsc::i32 step)
Constructor.

• void dump (std::ostream &os=std::cout) const

Dump.

• xtsc::u32 range ()
Return the number of values the iterator ranges over.

• void init ()
Initialize the iterator to its starting value.

• xtsc::u32 value ()
Return the iterators current value.

• void step ()
Step the iterator to its next value.

Public Attributes
• std::string m_name
Iterator name.

• xtsc::u32 m_index
Index in.

• xtsc::u32 m_start
First value iterator is to assume.

• xtsc::u32 m_stop
Iterator limit.

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• xtsc::i32 m_step
Step size (can be negative).

• xtsc::u32 m_value
The current value of the iterator.

7.7.1 Detailed Description

Iterator definition.
Definition at line 891 of file xtsc_wire_logic.h.
The documentation for this class was generated from the following file:

• xtsc_wire_logic.h

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7.8 line_info Struct Reference

Cache line data structure.

#include <xtsc/xtsc_cache.h>

Public Attributes
• xtsc::xtsc_address tag
Address tag.

• bool valid
Valid bit.

• bool dirty
Dirty bit.

• bool lrf
LRF (least recently filled) bit.

7.8.1 Detailed Description

Cache line data structure.

Definition at line 331 of file xtsc_cache.h.
The documentation for this struct was generated from the following file:

• xtsc_cache.h

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7.9 nb_mm Class Reference

Class for tlm_mm_interface for nb_transport. Collaboration diagram for nb_mm:

xtsc_mode_switch_if

m_tlm_bw_transport_if_impl
xtsc_command_handler_interface tlm_bw_transport_if_impl
m_transactor
xtsc_connection_interface
xtsc_module xtsc_xttlm2tlm2_transactor
m_nb_mm m_transactor
xtsc_resettable

nb_mm m_transactor m_request_impl

xtsc_request_if_impl
m_request
xtsc_debug_if xtsc_request_if

xtsc_request m_p_request
stream_dumper
m_stream_dumper

Public Member Functions

• nb_mm (xtsc_xttlm2tlm2_transactor &transactor)
• virtual void free (tlm::tlm_generic_payload ∗p_trans)

Public Attributes
• xtsc_xttlm2tlm2_transactor & m_transactor
Our xtsc_xttlm2tlm2_transactor object.

7.9.1 Detailed Description

Class for tlm_mm_interface for nb_transport.

Definition at line 763 of file xtsc_xttlm2tlm2_transactor.h.
The documentation for this class was generated from the following file:

• xtsc_xttlm2tlm2_transactor.h

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7.10 output_definition Class Reference

Output definition and sc_port.

#include <xtsc/xtsc_mmio.h>Collaboration diagram for output_definition:

xtsc_debug_if xtsc_request_if

xtsc_parms xtsc_mmio_parms
m_mmio_parms
m_mmio xtsc_request_if_impl
xtsc_connection_interface xtsc_module
m_request_impl

xtsc_resettable xtsc_command_handler_interface xtsc_mmio

m_p_definition_file m_mmio
output_definition

xtsc_script_file m_active_request

xtsc_request m_p_request
stream_dumper
m_stream_dumper

Public Member Functions

• output_definition (xtsc_mmio &mmio)

Constructor.

• void dump (std::ostream &os=std::cout) const

Dump.

Public Attributes

• xtsc_mmio & m_mmio

Our xtsc_mmio object.

• std::string m_name
Port name.

• std::string m_reg_name
Name or our associated register.

• xtsc::u32 m_high_bit
High bit of register.

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• xtsc::u32 m_low_bit
Low bit of register.

• wire_write_port ∗ m_p_wire_write_port
sc_port for this output

7.10.1 Detailed Description

Output definition and sc_port.

Definition at line 799 of file xtsc_mmio.h.
The documentation for this class was generated from the following file:

• xtsc_mmio.h

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7.11 output_definition Class Reference

Output definition and sc_port.

#include <xtsc/xtsc_wire_logic.h>Collaboration diagram for output_definition:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface xtsc_script_file

m_p_definition_file

xtsc_wire_logic

m_logic

output_definition

Public Member Functions

• output_definition (xtsc_wire_logic &logic, const std::string &name, xtsc::u32 index,

xtsc::u32 bit_width, const std::string &initial_value, bool always_write, bool delay_-
output, sc_core::sc_time delay_time)
Constructor.

• void reset ()
Reset and drive the output.

• void dump (std::ostream &os=std::cout) const

Dump.

• output_info ∗ new_output_info ()
Get a new output_info object from the pool.

• void delete_output_info (output_info ∗&p_output_info)

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Public Attributes
• xtsc_wire_logic & m_logic
Our xtsc_wire_logic object.

• std::string m_name
Port name.

• xtsc::u32 m_index
Our index in xtsc_wire_logic::m_outputs.

• xtsc::u32 m_bit_width
Port width in bits.

• sc_dt::sc_unsigned m_value
Latest computed value of output.

• sc_dt::sc_unsigned m_value_prev
Previous computed value of output.

• sc_dt::sc_unsigned m_bit_assigned
bit is 1 if that bit position has an assign statement in definition_file

• std::string m_initial_value
From <InitialValue> in definition_file.

• std::string m_lua_function_name
From <LuaFunctionName> of lua_function line in definition_file.

• std::vector< xtsc::u32 > m_lua_function_inputs

From <InputName> entries of lua_function line in definition_file.

• bool m_lua_function
True if this output appears in a lua_function statement in definition_file.

• bool m_assign
True if this output appears in an assign statement in definition_file.

• bool m_always_write
Write port even if value hasn’t changed.

• bool m_delay_output

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True if output is delayed.

• sc_core::sc_time m_delay_time
Amount of delay.

• sc_core::sc_event m_event
Event to notify for delayed output.

• std::vector< output_info ∗ > m_output_info_pool

Maintain a pool of output_info objects to improve performance.

• std::deque< output_info ∗ > m_output_info_deque

The deque of output_info objects waiting to be output.

• wire_write_port ∗ m_p_wire_write_port
sc_port for this output

7.11.1 Detailed Description

Output definition and sc_port.

Definition at line 738 of file xtsc_wire_logic.h.
The documentation for this class was generated from the following file:

• xtsc_wire_logic.h

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7.12 output_definition Class Reference

Output definition and sc_port.

#include <xtsc/xtsc_wire_source.h>Collaboration diagram for output_definition:

xtsc_wire_write_if

m_source xtsc_wire_write_if_impl

xtsc_connection_interface xtsc_script_file m_p_test_vector_stream

m_p_write_impl
xtsc_wire_source

xtsc_resettable xtsc_module m_pin_floating m_source

output_definition

xtsc_signal_sc_bv_base xtsc_signal_sc_bv_base_floating

Public Member Functions

• output_definition (xtsc_wire_source &source, const std::string &name, xtsc::u32 bit_-

width, const std::string &initial_value, tlm_port ∗p_tlm_port, pin_port ∗p_pin_port)
Constructor.

• void reset ()
Reset and drive the output.

• void drive (const std::string &value)

Drive the output.

• void complement_output ()
Drive bit-wise complement of the previous value driven.

Public Attributes

• xtsc_wire_source & m_source

Our xtsc_wire_source object.

• std::string m_name
Port name.

• xtsc::u32 m_index
Our output index.

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• xtsc::u32 m_bit_width
Port width in bits.

• bool m_pin_level
True output port is pin-level.

• sc_dt::sc_unsigned m_value
Latest value of output.

• sc_dt::sc_bv_base m_value_bv
Current value from "script_file" (for pin-level).

• std::string m_initial_value
From <InitialValue> in definition_file.

• tlm_port ∗ m_p_tlm_port
output port for TLM

• pin_port ∗ m_p_pin_port
output port for pin-level

7.12.1 Detailed Description

Output definition and sc_port.

Definition at line 544 of file xtsc_wire_source.h.
The documentation for this class was generated from the following file:

• xtsc_wire_source.h

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7.13 output_info Class Reference

Information about a delayed output value.

#include <xtsc/xtsc_wire_logic.h>

Public Member Functions

• output_info (xtsc::u32 bit_width)

Public Attributes
• sc_dt::sc_unsigned m_value
The value to be output.

• sc_core::sc_time m_output_time
The time to output it.

• xtsc::u64 m_delta_cycle
The delta cycle when output was queued.

7.13.1 Detailed Description

Information about a delayed output value.

Definition at line 725 of file xtsc_wire_logic.h.
The documentation for this class was generated from the following file:

• xtsc_wire_logic.h

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7.14 pif_req_info Class Reference

Information about each request.

#include <xtsc/xtsc_memory_pin.h>Collaboration diagram for pif_req_info:

xtsc_connection_interface xtsc_resettable xtsc_script_file

m_p_initial_value_file

xtsc_module xtsc_module_pin_base xtsc_memory_b

m_p_memory

xtsc_debug_if xtsc_memory_pin

m_memory_pin m_debug_impl m_memory

xtsc_debug_if_impl pif_req_info

Public Member Functions

• pif_req_info (const xtsc_memory_pin &memory, xtsc::u32 port)

Constructor for a new pif_req_info.

• void init (xtsc::u32 port)

Initialize an already existing pif_req_info object.

• void dump (std::ostream &os) const

Dump a pif_req_info object.

Public Attributes

• const xtsc_memory_pin & m_memory

A reference to the owning xtsc_memory_pin.

• xtsc::u32 m_port

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The memory port this request was received on.

• sc_core::sc_time m_time_stamp
Time when request was received.

• req_cntl m_req_cntl
POReqCntl.

• xtsc::xtsc_address m_address
POReqAdrs.

• sc_dt::sc_bv_base m_data
POReqData.

• xtsc::xtsc_byte_enables m_byte_enables
POReqDataBE.

• sc_dt::sc_uint_base m_id
POReqId.

• sc_dt::sc_uint_base m_priority
POReqPriority.

• sc_dt::sc_uint_base m_route_id
POReqRouteId.

• xtsc::xtsc_byte_enables m_fixed_byte_enables
POReqDataBE swizzled if m_big_endian.

7.14.1 Detailed Description

Information about each request. Constructor and init() populate data members by reading
the input pin values.
Definition at line 967 of file xtsc_memory_pin.h.
The documentation for this class was generated from the following file:

• xtsc_memory_pin.h

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 Chapter 7. Class Documentation

7.15 port_policy_info Class Reference

Information from "arbitration_policy" for arbitrate_policy().

#include <xtsc/xtsc_arbiter.h>

Public Attributes
• xtsc::u32 m_start_priority
From <StartPriority> in <PortNPolicy> in "arbitration_policy".

• xtsc::u32 m_end_priority
From <EndPriority> in <PortNPolicy> in "arbitration_policy".

• xtsc::u32 m_decrement
From <Decrement> in <PortNPolicy> in "arbitration_policy".

• xtsc::u32 m_current_priority
The current priority of this port.

7.15.1 Detailed Description

Information from "arbitration_policy" for arbitrate_policy().

Definition at line 1279 of file xtsc_arbiter.h.
The documentation for this class was generated from the following file:

• xtsc_arbiter.h

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Chapter 7. Class Documentation

7.16 register_definition Class Reference

Register definition and value.

#include <xtsc/xtsc_mmio.h>Collaboration diagram for register_definition:

xtsc_debug_if xtsc_request_if

xtsc_parms xtsc_mmio_parms
m_mmio_parms
m_mmio xtsc_request_if_impl
xtsc_connection_interface xtsc_module
m_request_impl

xtsc_resettable xtsc_command_handler_interface xtsc_mmio

m_p_definition_file m_mmio
register_definition

xtsc_script_file m_active_request

xtsc_request m_p_request
stream_dumper
m_stream_dumper

Public Member Functions

• register_definition (xtsc_mmio &mmio)

Constructor.

• void dump (std::ostream &os=std::cout) const

Dump.

• void reset ()
Reset the register.

• void write_outputs (bool always_write=true)

Write the outputs of this register.

Public Attributes

• xtsc_mmio & m_mmio

Our xtsc_mmio object.

• std::string m_name
Register name.

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• xtsc::xtsc_address m_address
Lowest address of register.

• xtsc::u32 m_bit_width
Number of bits in register.

• sc_dt::sc_unsigned ∗ m_p_initial_value
Initial value of register.

• sc_dt::sc_unsigned ∗ m_p_previous_value
Previous value of register.

• sc_dt::sc_unsigned ∗ m_p_current_value
Current value of register.

• output_set m_output_set
Set of output_definition’s.

• input_set m_input_set
Set of input_definition’s.

7.16.1 Detailed Description

Register definition and value.

Definition at line 761 of file xtsc_mmio.h.

7.16.2 Member Function Documentation

7.16.2.1 void write_outputs (bool always_write = true)

Write the outputs of this register.

Parameters:
always_write If true, write all outputs. If false, only write outputs that have changed
since the last call to write_outputs().

The documentation for this class was generated from the following file:

• xtsc_mmio.h

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7.17 req_cntl Class Reference

Class to manage the bits of POReqCntl/PIReqCntl.

#include <xtsc/xtsc_module_pin_base.h>

Public Types
• typedef sc_dt::sc_uint_base sc_uint_base
• typedef xtsc::xtsc_request::type_t type_t
• typedef xtsc::u32 u32
• typedef xtsc::xtsc_request xtsc_request
• typedef xtsc::xtsc_exception xtsc_exception

Public Member Functions

• req_cntl (const xtsc_request &request)
Construct a req_cntl given an xtsc_request.

• req_cntl (u32 value, bool exclusive=false)

Construct a req_cntl given a u32.

• req_cntl (const sc_uint_base &value, bool exclusive=false)

Construct a req_cntl given a sc_uint_base (from the pin-level signal).

• const sc_uint_base & init (const xtsc_request &request)

Initialize a req_cntl given an xtsc_request. Return the 8-bit ReqCntl value.

• const sc_uint_base & init (u32 value)

Initialize a req_cntl given a u32.

• void set_value (u32 value)

Set the value given a u32.

• const sc_uint_base & get_value () const

Return the 8-bit ReqCntl value.

• bool get_last_transfer () const

Return true if the last transfer bit is set.

• u32 get_num_transfers () const

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Return the number of transfers.

• type_t get_request_type () const

Return the xtsc_request type_t (READ|BLOCK_READ|BURST_-
READ|RCW|WRITE|BLOCK_WRITE|BURST_WRITE|SNOOP).

• u32 get_type () const

Return the request type as u32.

• bool is_exclusive () const

Return true if this is an exclusive request.

• void dump (std::ostream &os) const

Dump contents.

Static Public Attributes

• static const u32 READ = 0x00

• static const u32 WRITE = 0x80
• static const u32 BLOCK_READ = 0x10
• static const u32 BLOCK_WRITE = 0x90
• static const u32 BURST_READ = 0x30
• static const u32 BURST_WRITE = 0xB0
• static const u32 RCW = 0x50
• static const u32 SNOOP = 0x60
• static const u32 m_type_mask = 0xF0
• static const u32 m_type_mask_excl = 0x90
• static const u32 m_excl_mask = 0x60
• static const u32 m_bl_num_transfers_mask = 0x06
• static const u32 m_bu_num_transfers_mask = 0x0E
• static const u32 m_num_transfers_shift = 1
• static const u32 m_last_mask = 0x01

Private Attributes

• sc_uint_base m_value
• bool m_exclusive
True if exclusive encodings should be used for request type.

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7.17.1 Detailed Description

Class to manage the bits of POReqCntl/PIReqCntl.

Definition at line 370 of file xtsc_module_pin_base.h.

7.17.2 Member Function Documentation

7.17.2.1 u32 get_num_transfers () const [inline]

Return the number of transfers.

READ|WRITE|SNOOP 1
RCW 2
BLOCK_READ|BLOCK_WRITE 2|4|8|16
BURST_READ|BURST_WRITE 2|3|4|5|6|7|8

Definition at line 447 of file xtsc_module_pin_base.h.

The documentation for this class was generated from the following file:

• xtsc_module_pin_base.h

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 Chapter 7. Class Documentation

7.18 req_rsp_info Class Reference

Information for PIF width converter (PWC) mode.

#include <xtsc/xtsc_router.h>Collaboration diagram for req_rsp_info:

xtsc_response

m_response m_p_response m_stream_dumper

stream_dumper

response_info m_stream_dumper

xtsc_request

m_p_nascent_response m_request

request_info

m_p_nascent_request
m_p_first_request_info

req_rsp_info

Public Attributes

• request_info ∗ m_p_first_request_info
To create the responses for sending upstream.

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• xtsc::u32 m_num_rsp_received
To place the data in the upstream response buffer.

• xtsc::u32 m_num_last_xfer_rsp_expected
To determine when the final downstream response has been received.

• xtsc::u32 m_num_last_xfer_rsp_received
To determine when the final downstream response has been received.

• xtsc::u32 m_num_block_write_requests
To determine last_transfer flag of multi-sets and also data offset.

• xtsc::xtsc_address m_block_write_address
To determine address for multi-sets (slave width < master width).

• xtsc::u8 m_slot
Entry in m_req_rsp_table.

• bool m_responses_sent
To detect conflicting error responses from multi-sets.

• bool m_single_rsp_error_received
True if RSP_ADDRESS_ERROR|RSP_ADDRESS_DATA_ERROR received.

• request_info ∗ m_p_nascent_request
Hold the downstream request being built from multiple BLOCK_WRITE.

• response_info ∗ m_p_nascent_response
Hold the upstrearm response being built.

7.18.1 Detailed Description

Information for PIF width converter (PWC) mode.

Definition at line 1276 of file xtsc_router.h.
The documentation for this class was generated from the following file:

• xtsc_router.h

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7.19 req_rsp_info Class Reference

Information for PIF width converter (PWC) mode.

#include <xtsc/xtsc_arbiter.h>Collaboration diagram for req_rsp_info:

xtsc_response

m_response m_p_response m_stream_dumper

stream_dumper

response_info m_stream_dumper

xtsc_request

m_p_nascent_response m_request

request_info

m_p_nascent_request
m_p_first_request_info

req_rsp_info

Public Attributes

• request_info ∗ m_p_first_request_info
To create the responses for sending upstream.

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• xtsc::u32 m_num_rsp_received
To place the data in the upstream response buffer.

• xtsc::u32 m_num_last_xfer_rsp_expected
To determine when the final downstream response has been received.

• xtsc::u32 m_num_last_xfer_rsp_received
To determine when the final downstream response has been received.

• xtsc::u32 m_num_block_write_requests
To determine last_transfer flag of multi-sets and also data offset.

• xtsc::xtsc_address m_block_write_address
Keep track of next address to be used for downstream requests.

• xtsc::u8 m_slot
Entry in m_req_rsp_table.

• bool m_responses_sent
To detect conflicting error responses from multi-sets.

• bool m_single_rsp_error_received
True if RSP_ADDRESS_ERROR|RSP_ADDRESS_DATA_ERROR received.

• request_info ∗ m_p_nascent_request
Hold the downstream request being built from multiple BLOCK_WRITE.

• response_info ∗ m_p_nascent_response
Hold the upstrearm response being built.

7.19.1 Detailed Description

Information for PIF width converter (PWC) mode.

Definition at line 1261 of file xtsc_arbiter.h.
The documentation for this class was generated from the following file:

• xtsc_arbiter.h

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7.20 request_info Class Reference

Information about each request.

#include <xtsc/xtsc_pin2tlm_memory_transactor.h>Collaboration diagram for
request_info:

xtsc_debug_if

m_pin2tlm xtsc_debug_if_impl
xtsc_connection_interface
xtsc_module m_debug_impl

xtsc_resettable
xtsc_module_pin_base xtsc_pin2tlm_memory_transactor m_pin2tlm
m_subbank_activity
m_respond_impl
subbank_activity xtsc_respond_if_impl
m_pin2tlm

xtsc_respond_if request_info

m_request

xtsc_request m_stream_dumper

m_p_request stream_dumper

Public Member Functions

• request_info (const xtsc_pin2tlm_memory_transactor &pin2tlm, xtsc::u32 port)
Constructor for a new request_info.

• void init (xtsc::u32 port)

Initialize an already existing request_info object.

• void dump (std::ostream &os) const

Dump a request_info object.

Public Attributes
• const xtsc_pin2tlm_memory_transactor & m_pin2tlm
A reference to the owning xtsc_pin2tlm_memory_transactor.

• req_cntl m_req_cntl
POReqCntl/SnoopReqCntl.

• xtsc::xtsc_address m_address

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POReqAdrs.

• sc_dt::sc_bv_base m_data
POReqData.

• xtsc::xtsc_byte_enables m_byte_enables
POReqDataBE.

• sc_dt::sc_uint_base m_id
POReqId.

• sc_dt::sc_uint_base m_priority
POReqPriority.

• sc_dt::sc_uint_base m_route_id
POReqRouteId.

• sc_dt::sc_uint_base m_req_attribute
POReqAttribute.

• sc_dt::sc_uint_base m_req_domain
POReqDomain.

• sc_dt::sc_uint_base m_vadrs
POReqCohVAdrsIndex/SnoopReqCohVAdrsIndex.

• sc_dt::sc_uint_base m_coherence
POReqCohCntl/SnoopReqCohCntl.

• xtsc::xtsc_byte_enables m_fixed_byte_enables
POReqDataBE swizzled if m_big_endian.

• xtsc::xtsc_address m_fixed_address
POReqAdrs fixed for xtsc_request.

• xtsc::xtsc_request m_request
The TLM request.

• xtsc::u64 m_cycle_num
Only if subbanked: Cycle number of request.

• xtsc::u32 m_cycle_index
Only if subbanked: Cycle index of request.

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7.20.1 Detailed Description

Information about each request. Constructor and init() populate data members by reading
the input pin values.
Definition at line 841 of file xtsc_pin2tlm_memory_transactor.h.
The documentation for this class was generated from the following file:

• xtsc_pin2tlm_memory_transactor.h

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7.21 request_info Class Reference

Information about each request.

#include <xtsc/xtsc_memory.h>Collaboration diagram for request_info:

xtsc_request

m_request m_p_request m_stream_dumper

request_info stream_dumper

Public Member Functions

• request_info (const xtsc::xtsc_request &request, xtsc::xtsc_response::status_t sta-

tus, bool list)
Constructor.

• void init (const xtsc::xtsc_request &request, xtsc::xtsc_response::status_t status,

bool list)

Public Attributes

• xtsc::xtsc_request m_request
Our copy of the request.

• sc_core::sc_time m_time_stamp
Timestamp when received.

• xtsc::xtsc_response::status_t m_status
Response status from "script_file" when m_list is false.

• bool m_list
True if the response status should be taken from the response status list.

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7.21.1 Detailed Description

Information about each request.

Definition at line 1666 of file xtsc_memory.h.
The documentation for this class was generated from the following file:

• xtsc_memory.h

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7.22 request_info Class Reference

Information about each request.

#include <xtsc/xtsc_router.h>Collaboration diagram for request_info:

xtsc_request

m_request m_p_request m_stream_dumper

request_info stream_dumper

Public Member Functions

• request_info (const xtsc::xtsc_request &request)
Constructor.

Public Attributes
• xtsc::xtsc_request m_request
Our copy of the request.

• sc_core::sc_time m_time_stamp
Timestamp when received.

7.22.1 Detailed Description

Information about each request.

Definition at line 1245 of file xtsc_router.h.
The documentation for this class was generated from the following file:

• xtsc_router.h

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7.23 request_info Class Reference

Information about each request.

#include <xtsc/xtsc_arbiter.h>Collaboration diagram for request_info:

xtsc_request

m_request m_p_request m_stream_dumper

request_info stream_dumper

Public Member Functions

• request_info (const xtsc::xtsc_request &request, xtsc::u32 port_num)
Constructor.

Public Attributes
• xtsc::xtsc_request m_request
Our copy of the request.

• xtsc::u32 m_port_num
Port request came in on.

• sc_core::sc_time m_time_stamp
Timestamp when received.

7.23.1 Detailed Description

Information about each request.

Definition at line 1229 of file xtsc_arbiter.h.
The documentation for this class was generated from the following file:

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Chapter 7. Class Documentation

• xtsc_arbiter.h

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 Chapter 7. Class Documentation

7.24 resp_cntl Class Reference

Class to manage the bits of PORespCntl/PIRespCntl/SnoopRespCntl.

#include <xtsc/xtsc_module_pin_base.h>

Public Types
• typedef sc_dt::sc_uint_base sc_uint_base
• typedef xtsc::xtsc_response::status_t status_t
• typedef xtsc::u32 u32
• typedef xtsc::xtsc_response xtsc_response
• typedef xtsc::xtsc_exception xtsc_exception

Public Member Functions

• resp_cntl (u32 status, bool last)
Construct a resp_cntl given a status and a last transfer.

• resp_cntl (u32 value)

Construct a resp_cntl given a u32.

• resp_cntl (const sc_uint_base &value)

Construct a resp_cntl given a sc_uint_base (from the pin-level signal).

• sc_uint_base init (u32 value)

Initialize a resp_cntl given a u32.

• sc_uint_base init (u32 status, bool last, bool exclusive_req=false, bool exclusive_-
ok=false)
Initialize a resp_cntl given a status and a last transfer.

• sc_uint_base get_value () const

Return the 8-bit ReqCntl value.

• void set_last_transfer (bool last)

Set last transfer bit.

• bool get_last_transfer () const

Return true if the last transfer bit is set.

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• status_t get_status () const

Return the status type (RSP_OK|RSP_ADDRESS_ERROR|RSP_DATA_ERROR|RSP_-
ADDRESS_DATA_ERROR).

• void dump (std::ostream &os) const

Dump contents.

Static Public Attributes

• static const u32 OK = 0x0
• static const u32 AErr = 0x1
• static const u32 DErr = 0x2
• static const u32 ADErr = 0x3
• static const u32 m_status_mask = 0x06
• static const u32 m_status_shift = 1
• static const u32 m_last_mask = 0x01
• static const u32 m_last_transfer_bit = 0
• static const u32 m_exclusive_req_mask = 0x80
• static const u32 m_exclusive_ok_mask = 0x40

Private Attributes
• sc_uint_base m_value

7.24.1 Detailed Description

Class to manage the bits of PORespCntl/PIRespCntl/SnoopRespCntl.

Definition at line 526 of file xtsc_module_pin_base.h.
The documentation for this class was generated from the following file:

• xtsc_module_pin_base.h

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7.25 response_info Class Reference

Information about each response.

#include <xtsc/xtsc_tlm2pin_memory_transactor.h>Collaboration diagram for
response_info:

xtsc_response

m_p_response m_p_response m_stream_dumper

response_info stream_dumper

Public Member Functions

• response_info (xtsc::xtsc_response ∗p_response, xtsc::u32 bus_addr_bits, xtsc::u32

size, bool is_read, xtsc::u32 id, xtsc::u32 route_id)
Constructor.

Public Attributes

• xtsc::xtsc_response ∗ m_p_response
The response.

• xtsc::u32 m_bus_addr_bits
Bits of xtsc_request address that identify byte lanes.

• xtsc::u32 m_size
Size from xtsc_request.

• xtsc::u32 m_id
Transfer ID from xtsc_request.

• xtsc::u32 m_route_id
Route ID from xtsc_request.

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• bool m_is_read
Expect read data in response.

• bool m_copy_data
True if data needs to be copied from m_buffer to response.

• xtsc::u32 m_status
Response status.

• bool m_last
True if actual response has last_transfer bit set.

• xtsc::u8 m_buffer [xtsc::xtsc_max_bus_width8]

Buffer for non-last BLOCK_READ read data.

7.25.1 Detailed Description

Information about each response.

Definition at line 982 of file xtsc_tlm2pin_memory_transactor.h.
The documentation for this class was generated from the following file:

• xtsc_tlm2pin_memory_transactor.h

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7.26 response_info Class Reference

Information about each response.

#include <xtsc/xtsc_router.h>Collaboration diagram for response_info:

xtsc_response

m_response m_p_response m_stream_dumper

response_info stream_dumper

Public Member Functions

• response_info (const xtsc::xtsc_response &response)
Constructor.

• response_info (const xtsc::xtsc_request &request)

Constructor for PWC.

Public Attributes
• xtsc::xtsc_response m_response
Our copy of the response.

• sc_core::sc_time m_time_stamp
Timestamp when received.

7.26.1 Detailed Description

Information about each response.

Definition at line 1258 of file xtsc_router.h.
The documentation for this class was generated from the following file:

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Chapter 7. Class Documentation

• xtsc_router.h

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7.27 response_info Class Reference

This class helps keep track of a response and when it is due.

#include <xtsc/xtsc_slave.h>Collaboration diagram for response_info:

xtsc_response

m_p_response m_p_response m_stream_dumper

response_info stream_dumper

Public Member Functions

• response_info (xtsc::xtsc_response ∗p_response, bool respond_now, bool cont,

const sc_core::sc_time &delay)
Constructor.

Public Attributes

• xtsc::xtsc_response ∗ m_p_response
The xtsc_response to respond with.

• bool m_respond_now
The response line had delay of "now".

• bool m_cont
The response line had CONT.

• sc_core::sc_time m_delay
How long to delay.

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7.27.1 Detailed Description

This class helps keep track of a response and when it is due.

Definition at line 239 of file xtsc_slave.h.
The documentation for this class was generated from the following file:

• xtsc_slave.h

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7.28 response_info Class Reference

Information about each response.

#include <xtsc/xtsc_arbiter.h>Collaboration diagram for response_info:

xtsc_response

m_response m_p_response m_stream_dumper

response_info stream_dumper

Public Member Functions

• response_info (const xtsc::xtsc_response &response)
Constructor.

• response_info (const xtsc::xtsc_request &request)

Constructor for PWC.

Public Attributes
• xtsc::xtsc_response m_response
Our copy of the response.

• sc_core::sc_time m_time_stamp
Timestamp when received.

7.28.1 Detailed Description

Information about each response.

Definition at line 1244 of file xtsc_arbiter.h.
The documentation for this class was generated from the following file:

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• xtsc_arbiter.h

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7.29 sc_unwind_exception Class Reference

7.29.1 Detailed Description

Definition at line 47 of file xtsc.h.

The documentation for this class was generated from the following file:

• xtsc.h

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Chapter 7. Class Documentation

7.30 statistic_info Class Reference

This class is used to keep track of transaction statistics.

#include <xtsc/xtsc_memory_trace.h>

Public Member Functions

• bool dump (std::ostream &os=std::cout, const std::string &prefix="")

Public Attributes

• xtsc::u64 m_max_latency
Maximum latency.

• xtsc::u64 m_max_lifetime
Maximum lifetime.

• xtsc::u64 m_max_latency_tag
Transaction tag with maximum latency.

• xtsc::u64 m_max_lifetime_tag
Transaction tag with maximum lifetime.

• xtsc::u64 m_cntrs [cntr_count]

Array of counters.

• std::map< u64, u64 > m_latency_histogram

Map latency (first) to count (second).

• std::map< u64, u64 > m_lifetime_histogram

Map lifetime (first) to count (second).

7.30.1 Detailed Description

This class is used to keep track of transaction statistics. The xtsc_memory_trace class
uses m_statistics_maps which has one map for each port. Each map maps from an xtsc_-
request::type_t to a statistic_info object used to keep track of statistics for that request type.

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See also:
m_statistics_maps
transaction_info

Definition at line 840 of file xtsc_memory_trace.h.

The documentation for this class was generated from the following file:

• xtsc_memory_trace.h

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Chapter 7. Class Documentation

7.31 stream_dumper Class Reference

Helper class to make it easy to dump xtsc_response to an ostream with or without data
values.
#include <xtsc/xtsc_response.h>Collaboration diagram for stream_dumper:

stream_dumper

m_stream_dumper m_p_response

xtsc_response

Public Member Functions

• void dump (std::ostream &os) const

Static Public Attributes

• static const xtsc_response ∗ m_p_response
• static bool m_show_data

7.31.1 Detailed Description

Helper class to make it easy to dump xtsc_response to an ostream with or without data
values.

See also:
show_data

Definition at line 504 of file xtsc_response.h.

The documentation for this class was generated from the following file:

• xtsc_response.h

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7.32 stream_dumper Class Reference

Helper class to make it easy to dump xtsc_request to an ostream with or without data
values.
#include <xtsc/xtsc_request.h>Collaboration diagram for stream_dumper:

stream_dumper

m_stream_dumper m_p_request

xtsc_request

Public Member Functions

• void dump (std::ostream &os) const

Static Public Attributes

• static const xtsc_request ∗ m_p_request
• static bool m_show_data

7.32.1 Detailed Description

Helper class to make it easy to dump xtsc_request to an ostream with or without data
values.

See also:
show_data

Definition at line 1060 of file xtsc_request.h.

The documentation for this class was generated from the following file:

• xtsc_request.h

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7.33 subbank_activity Class Reference

Keep track of subbank activity to a given given bank to ensure all responses are consistent
(all RSP_OK or all RSP_NACC).
#include <xtsc/xtsc_pin2tlm_memory_transactor.h>

Public Attributes
• xtsc::u64 m_cycle_num
Cycle number of requests.

• xtsc::u32 m_num_req
Number of subbank requests to this bank this cycle.

• xtsc::u32 m_num_rsp_ok
Number of RSP_OK responses received.

• xtsc::u32 m_num_rsp_nacc
Number of RSP_NACC responses received.

7.33.1 Detailed Description

Keep track of subbank activity to a given given bank to ensure all responses are consistent
(all RSP_OK or all RSP_NACC). Only used for DRAM0BS|DRAM1BS and then only if
"has_busy" is true.
Definition at line 896 of file xtsc_pin2tlm_memory_transactor.h.
The documentation for this class was generated from the following file:

• xtsc_pin2tlm_memory_transactor.h

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 Chapter 7. Class Documentation

7.34 tlm_bw_transport_if_impl Class Reference

Implementation of tlm_bw_transport_if.
#include <xtsc/xtsc_master_tlm2.h>Collaboration diagram for tlm_bw_transport_if_-
impl:

xtsc_connection_interface xtsc_resettable

tlm_bw_transport_if_impl xtsc_module xtsc_command_handler_interface xtsc_script_file

m_tlm_bw_transport_if_impl m_master m_script_file_stream

xtsc_master_tlm2

Public Member Functions

• tlm_bw_transport_if_impl (const char ∗object_name, xtsc_master_tlm2 &master)
Constructor.

• virtual tlm::tlm_sync_enum nb_transport_bw (tlm::tlm_generic_payload &trans,

tlm::tlm_phase &phase, sc_core::sc_time &time)
Send responses.

• virtual void invalidate_direct_mem_ptr (sc_dt::uint64 start_range, sc_dt::uint64 end_-

range)
Invalidate DMI.

Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to us.

Protected Attributes
• xtsc_master_tlm2 & m_master

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Our xtsc_master_tlm2 object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.34.1 Detailed Description

Implementation of tlm_bw_transport_if.
Definition at line 391 of file xtsc_master_tlm2.h.
The documentation for this class was generated from the following file:

• xtsc_master_tlm2.h

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 Chapter 7. Class Documentation

7.35 tlm_bw_transport_if_impl Class Reference

Implementation of tlm_bw_transport_if. Collaboration diagram for tlm_bw_transport_if_-

impl:

xtsc_mode_switch_if

m_nb_mm
xtsc_command_handler_interface nb_mm
m_transactor
xtsc_connection_interface
xtsc_module xtsc_xttlm2tlm2_transactor
m_tlm_bw_transport_if_impl m_transactor
xtsc_resettable

tlm_bw_transport_if_impl m_transactor m_request_impl

xtsc_request_if_impl
m_request
xtsc_debug_if xtsc_request_if

xtsc_request m_p_request
stream_dumper
m_stream_dumper

Public Member Functions

• tlm_bw_transport_if_impl (const char ∗object_name, xtsc_xttlm2tlm2_transactor
&transactor, xtsc::u32 port_num)
Constructor.

• virtual tlm::tlm_sync_enum nb_transport_bw (tlm::tlm_generic_payload &trans,

tlm::tlm_phase &phase, sc_core::sc_time &time)
Send responses.

• virtual void invalidate_direct_mem_ptr (sc_dt::uint64 start_range, sc_dt::uint64 end_-

range)
Invalidate DMI.

Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to us.

Protected Attributes
• xtsc_xttlm2tlm2_transactor & m_transactor

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Our xtsc_xttlm2tlm2_transactor object.

• xtsc::u32 m_port_num
Our port number.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.35.1 Detailed Description

Implementation of tlm_bw_transport_if.
Definition at line 720 of file xtsc_xttlm2tlm2_transactor.h.
The documentation for this class was generated from the following file:

• xtsc_xttlm2tlm2_transactor.h

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 Chapter 7. Class Documentation

7.36 tlm_fw_transport_if_impl Class Reference

Implementation of tlm_fw_transport_if<>. Collaboration diagram for tlm_fw_transport_if_-

impl:

xtsc_connection_interface xtsc_resettable

tlm_fw_transport_if_impl xtsc_module xtsc_command_handler_interface

m_tlm_fw_transport_if_impl m_transactor

xtsc_tlm22xttlm_transactor xtsc_respond_if

m_transactor m_id_to_transaction_info_tab m_transactor m_xtsc_respond_if_impl

transaction_info xtsc_respond_if_impl

Public Member Functions

• tlm_fw_transport_if_impl (const char ∗object_name, xtsc_tlm22xttlm_transactor

&transactor, xtsc::u32 port_num)
Constructor.

• virtual tlm::tlm_sync_enum nb_transport_fw (tlm::tlm_generic_payload &trans,

tlm::tlm_phase &phase, sc_core::sc_time &t)
• virtual void b_transport (tlm::tlm_generic_payload &trans, sc_core::sc_time &t)
• virtual bool get_direct_mem_ptr (tlm::tlm_generic_payload &trans, tlm::tlm_dmi
&dmi_data)
• virtual xtsc::u32 transport_dbg (tlm::tlm_generic_payload &trans)
• bool is_connected ()
Return true if a port has bound to this implementation.

Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

SystemC callback when something binds to us.

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Protected Attributes
• xtsc_tlm22xttlm_transactor & m_transactor
Our xtsc_tlm22xttlm_transactor object.

• xtsc::u32 m_width8
The bus width in bytes. See "byte_width".

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

• xtsc::u32 m_port_num
Our port number.

7.36.1 Detailed Description

Implementation of tlm_fw_transport_if<>.
Definition at line 464 of file xtsc_tlm22xttlm_transactor.h.

7.36.2 Constructor & Destructor Documentation

7.36.2.1 tlm_fw_transport_if_impl (const char ∗ object_name,

xtsc_tlm22xttlm_transactor & transactor, xtsc::u32 port_num) [inline]

Constructor.

Parameters:
transactor A reference to the owning xtsc_tlm22xttlm_transactor object.
port_num The port number that this object serves.

Definition at line 472 of file xtsc_tlm22xttlm_transactor.h.

The documentation for this class was generated from the following file:

• xtsc_tlm22xttlm_transactor.h

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 Chapter 7. Class Documentation

7.37 tlm_fw_transport_if_impl Class Reference

Implementation of tlm_fw_transport_if<>.
#include <xtsc/xtsc_memory_tlm2.h>Collaboration diagram for tlm_fw_transport_if_-
impl:

xtsc_connection_interface xtsc_resettable xtsc_parms xtsc_script_file

m_p_initial_value_file

tlm_fw_transport_if_impl xtsc_module xtsc_command_handler_interface xtsc_memory_tlm2_parms xtsc_memory_b

m_tlm_fw_transport_if_impl m_memory m_memory_parms m_p_memory

xtsc_memory_tlm2

Public Member Functions

• tlm_fw_transport_if_impl (const char ∗object_name, xtsc_memory_tlm2 &memory,
xtsc::u32 port_num)
Constructor.

• virtual tlm::tlm_sync_enum nb_transport_fw (tlm::tlm_generic_payload &trans,

tlm::tlm_phase &phase, sc_core::sc_time &t)
• virtual void b_transport (tlm::tlm_generic_payload &trans, sc_core::sc_time &t)
• virtual bool get_direct_mem_ptr (tlm::tlm_generic_payload &trans, tlm::tlm_dmi
&dmi_data)
• virtual xtsc::u32 transport_dbg (tlm::tlm_generic_payload &trans)
• bool is_connected ()
Return true if a port has bound to this implementation.

Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to us.

Protected Attributes
• xtsc_memory_tlm2 & m_memory

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Our xtsc_memory_tlm2 object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

• xtsc::u32 m_port_num
Our port number.

• bool m_busy
Only allow one request at a time.

7.37.1 Detailed Description

Implementation of tlm_fw_transport_if<>.
Definition at line 706 of file xtsc_memory_tlm2.h.

7.37.2 Constructor & Destructor Documentation

7.37.2.1 tlm_fw_transport_if_impl (const char ∗ object_name, xtsc_memory_tlm2

& memory, xtsc::u32 port_num) [inline]

Constructor.

Parameters:
memory A reference to the owning xtsc_memory_tlm2 object.
port_num The port number that this object serves.

Definition at line 714 of file xtsc_memory_tlm2.h.

The documentation for this class was generated from the following file:

• xtsc_memory_tlm2.h

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 Chapter 7. Class Documentation

7.38 transaction_info Class Reference

This class is used to keep track of 4 key times during each transaction’s lifecycle in order
to compute transaciton lifetime and latency.
#include <xtsc/xtsc_memory_trace.h>

Public Member Functions

• transaction_info (sc_core::sc_time timestamp, type_t type)

Constructor.

Public Attributes

• sc_core::sc_time m_time_req_beg
Transaction request begin time.

• sc_core::sc_time m_time_req_end
Transaction request end time.

• sc_core::sc_time m_time_rsp_beg
Transaction response begin time.

• sc_core::sc_time m_time_rsp_end
Transaction response end time.

• type_t m_type
Transaction request type.

7.38.1 Detailed Description

This class is used to keep track of 4 key times during each transaction’s lifecycle in order to
compute transaciton lifetime and latency. When the transaction is complete, these 4 times
and the XTSC System Clock Period (SCP) are used to calculate the transaction’s lifetime
and latency like this:

lifetime = (m_time_rsp_end - m_time_req_beg + SCP/2) / SCP

latency = (m_time_rsp_beg - m_time_req_end + SCP/2) / SCP

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Definition at line 786 of file xtsc_memory_trace.h.

The documentation for this class was generated from the following file:

• xtsc_memory_trace.h

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 Chapter 7. Class Documentation

7.39 transaction_info Class Reference

Information about each transaction. Collaboration diagram for transaction_info:

m_id_to_transaction_info_tab m_tlm_fw_transport_if_impl
transaction_info tlm_fw_transport_if_impl
m_transactor m_transactor
xtsc_connection_interface
xtsc_tlm22xttlm_transactor
xtsc_module m_transactor
xtsc_resettable
xtsc_command_handler_interface m_xtsc_respond_if_impl
xtsc_respond_if_impl

xtsc_respond_if

Public Member Functions

• transaction_info (xtsc_tlm22xttlm_transactor &transactor, tlm::tlm_generic_payload

∗p_gp, const std::string &done_event_name)
Constructor for a new transaction_info.

• void init (tlm::tlm_generic_payload ∗p_gp)

Initialize an already existing transaction_info object.

• void fini ()
Finialize a transaction_info object.

Public Attributes

• std::string m_done_event_name
Unique name for m_done_event.

• sc_core::sc_event m_done_event
Signal nb_transport all xtsc_request’s sent & xtsc_response’s rec’d.

• xtsc_tlm22xttlm_transactor & m_transactor

Our xtsc_tlm22xttlm_transactor object.

• tlm::tlm_generic_payload ∗ m_p_gp
The original TLM2 transaction.

• std::vector< xtsc::xtsc_request ∗ > m_requests

The sequence of xtsc_request objects corresponding to the TLM2 trans.

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• std::vector< xtsc::u32 > m_read_data_offsets

Offset where read data of corresponding request should be copied to (byte enables from
m_p_gp must still be applied).

• std::vector< xtsc::u32 > m_read_data_sizes

Number of bytes each response to corresponding request should have.

• xtsc::u32 m_pending_last_rsps
Number of last_transfer responses still outstanding.

• bool m_all_requests_sent
Set to true when all xtsc_request’s have been sent and accepted.

7.39.1 Detailed Description

Information about each transaction.

Definition at line 382 of file xtsc_tlm22xttlm_transactor.h.
The documentation for this class was generated from the following file:

• xtsc_tlm22xttlm_transactor.h

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 Chapter 7. Class Documentation

7.40 transaction_info Class Reference

Class to keep track of xtsc_request, tlm_generic_payload, and xtsc_response when using

nb_transport. Collaboration diagram for transaction_info:

xtsc_request

m_p_request m_stream_dumper

stream_dumper

m_p_request m_stream_dumper

xtsc_response

m_p_response

transaction_info

Public Attributes

• xtsc::xtsc_request ∗ m_p_request
xtsc_request for this transaction

• tlm::tlm_phase m_phase
TLM2 phase this transaction is in.

• tlm::tlm_generic_payload ∗ m_p_trans
tlm_generic_payload for this transaction

• xtsc::xtsc_response ∗ m_p_response

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Chapter 7. Class Documentation

xtsc_response for this transaction

• bool m_last_tlm2_beat
True if last TLM2 transaction for a given request (needed for BLOCK_READ|BURST_-
READ).

7.40.1 Detailed Description

Class to keep track of xtsc_request, tlm_generic_payload, and xtsc_response when using

nb_transport.
Definition at line 772 of file xtsc_xttlm2tlm2_transactor.h.
The documentation for this class was generated from the following file:

• xtsc_xttlm2tlm2_transactor.h

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 Chapter 7. Class Documentation

7.41 udma_descriptor Struct Reference

Data structure used to store a uDMA descriptor.

#include <xtsc/xtsc_udma.h>

Public Attributes
• u32 source_address
Source address.

• u32 destination_address
Destination address.

• u32 source_pitch
Source pitch.

• u32 destination_pitch
Destination pitch.

• u16 num_rows
Number of rows to transfer.

• u16 num_bytes
Number of bytes per row to transfer.

• u16 max_block_transfers
Maximum block size for DMA (valid values are 2|4|8|16 transfers).

• u16 max_num_out
Maximum number of outstanding requests with a range of 1-16.

• bool sync_intr_enabled
Enable Sync interrupt on successful completion of descriptor.

7.41.1 Detailed Description

Data structure used to store a uDMA descriptor.

Definition at line 545 of file xtsc_udma.h.
The documentation for this struct was generated from the following file:

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Chapter 7. Class Documentation

• xtsc_udma.h

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 Chapter 7. Class Documentation

7.42 watchfilter_info Class Reference

Information about each watchfilter.

#include <xtsc/xtsc_memory.h>

Public Member Functions

• watchfilter_info (const std::string &filter_kind, const std::string &filter_name, sc_-
core::sc_event &event)
Constructor.

Public Attributes
• std::string m_filter_kind
The xtsc_filter kind.

• std::string m_filter_name
The xtsc_filter name.

• sc_core::sc_event & m_event

The sc_event to notify when the filter specification passes.

• xtsc::u32 m_watchfilter
The assigned watchfilter number.

7.42.1 Detailed Description

Information about each watchfilter.

Definition at line 1686 of file xtsc_memory.h.
The documentation for this class was generated from the following file:

• xtsc_memory.h

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Chapter 7. Class Documentation

7.43 watchfilter_info Class Reference

Information about each watchfilter.

#include <xtsc/xtsc_router.h>

Public Member Functions

• watchfilter_info (const std::string &filter_kind, const std::string &filter_name, sc_-
core::sc_event &event)
Constructor.

Public Attributes
• std::string m_filter_kind
The xtsc_filter kind.

• std::string m_filter_name
The xtsc_filter name.

• sc_core::sc_event & m_event

The sc_event to notify when the filter specification passes.

• xtsc::u32 m_watchfilter
The assigned watchfilter number.

7.43.1 Detailed Description

Information about each watchfilter.

Definition at line 1294 of file xtsc_router.h.
The documentation for this class was generated from the following file:

• xtsc_router.h

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 Chapter 7. Class Documentation

7.44 xtsc_address_range_entry Class Reference

Address-range to port-number association (for example, a routing table entry).

#include <xtsc/xtsc_address_range_entry.h>

Public Types

• typedef xtsc::xtsc_address xtsc_address

• typedef xtsc::u32 u32

Public Member Functions

• xtsc_address_range_entry (xtsc_address start_address8, xtsc_address end_-

address8, u32 port_num, u32 delta=0)
Constructor.

• void dump (std::ostream &os) const

Public Attributes

• xtsc_address m_start_address8
• xtsc_address m_end_address8
• u32 m_port_num
• u32 m_delta

7.44.1 Detailed Description

Address-range to port-number association (for example, a routing table entry). This class
represents an address-range-to-port-number association such as might constitute a single
entry in a routing table or address translation table. It is a plain old data (or POD) class,
whose members are meant to be directly read or written; however, in normal usage, the
data members would be written just once (at construction time).

See also:
xtsc_component::xtsc_router
xtsc_component::xtsc_arbiter

Definition at line 33 of file xtsc_address_range_entry.h.

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7.44.2 Constructor & Destructor Documentation

7.44.2.1 xtsc_address_range_entry (xtsc_address start_address8, xtsc_address

end_address8, u32 port_num, u32 delta = 0) [inline]

Constructor.

Parameters:
start_address8 The lowest byte address in the memory range.
end_address8 The highest byte address in the memory range.
port_num The port number to associate with the given address range.
delta The address translation to apply. This amount should be added to the address
of each request.

Definition at line 49 of file xtsc_address_range_entry.h.

The documentation for this class was generated from the following file:

• xtsc_address_range_entry.h

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 Chapter 7. Class Documentation

7.45 xtsc_arbiter Class Reference

A memory interface arbiter and/or address translator.

#include <xtsc/xtsc_arbiter.h>Inheritance diagram for xtsc_arbiter:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface

xtsc_arbiter

Collaboration diagram for xtsc_arbiter:

xtsc_parms xtsc_arbiter_parms
m_arbiter_parms

xtsc_connection_interface xtsc_module
xtsc_respond_if

xtsc_resettable xtsc_command_handler_interface
m_arbiter xtsc_respond_if_impl

m_responses m_respond_impl
xtsc_arbiter

m_p_response m_response m_req_rsp_table m_request_impl

xtsc_response response_info m_p_nascent_response

m_stream_dumper m_p_nascent_request req_rsp_info

stream_dumper
m_p_first_request_info m_arbiter
m_stream_dumper m_requests xtsc_request_if_impl
m_request
xtsc_request request_info

xtsc_request_if
xtsc_debug_if

Classes

• class port_policy_info
Information from "arbitration_policy" for arbitrate_policy().

• class req_rsp_info
Information for PIF width converter (PWC) mode.

• class request_info
Information about each request.

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Chapter 7. Class Documentation

• class response_info
Information about each response.

• class xtsc_request_if_impl
Implementation of xtsc_request_if.

• class xtsc_respond_if_impl
Implementation of xtsc_respond_if.

Public Member Functions

• SC_HAS_PROCESS (xtsc_arbiter)
• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

• xtsc_arbiter (sc_core::sc_module_name module_name, const xtsc_arbiter_parms

&arbiter_parms)
Constructor for an xtsc_arbiter.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• xtsc::u32 get_num_masters ()
Get the number of memory interface masters that can be connected with this xtsc_arbiter
(this is the number of memory interface slave port pairs that this xtsc_arbiter has).

• virtual void reset (bool hard_reset=false)

Reset the xtsc_arbiter.

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• virtual bool arbitrate (xtsc::u32 &port_num)

In most configurations, this method does the actual arbitration but may be overridden by a
sub-class (see Exceptions below).

• virtual bool arbitrate_policy (xtsc::u32 &port_num)

This method does the actual arbitration when "arbitration_policy" is specified.

• void setup_random_rsp_nacc_responses (xtsc::u32 port_mask, xtsc::u32 fail_-

percentage)
This method can be used to control the sending of randomly generated RSP_NACC re-
sponses (for example, to test the upstream memory interface master device’s handling of
them).

• void change_clock_period (xtsc::u32 clock_period_factor, xtsc::u32 arbitration_-

phase_factor)
Method to change the clock period.

• virtual void execute (const std::string &cmd_line, const std::vector< std::string >
&words, const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

• void dump_profile_results (std::ostream &os=std::cout)

Dump maximmum used buffers for request and response fifos.

• void end_of_simulation ()
• void connect (xtsc_arbiter &arbiter, xtsc::u32 port_num)
Connect an upstream xtsc_arbiter with this xtsc_arbiter.

• void connect (xtsc::xtsc_core &core, const char ∗memory_port_name, xtsc::u32

port_num=0xFFFFFFFF)
Connect with an upstream or downstream (inbound pif) xtsc_core.

• void connect (xtsc_dma_engine &dma_engine, xtsc::u32 port_num)

Connect an upstream xtsc_dma_engine with this xtsc_arbiter.

• void connect (xtsc_master &master, xtsc::u32 port_num)

Connect an upstream xtsc_master with this xtsc_arbiter.

• void connect (xtsc_memory_trace &memory_trace, xtsc::u32 trace_port, xtsc::u32

arbiter_port)
Connect an upstream xtsc_memory_trace with this xtsc_arbiter.

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Chapter 7. Class Documentation

• void connect (xtsc_pin2tlm_memory_transactor &pin2tlm, xtsc::u32 tran_port,

xtsc::u32 arbiter_port)
Connect an upstream xtsc_pin2tlm_memory_transactor with this xtsc_arbiter.

• void connect (xtsc_router &router, xtsc::u32 router_port, xtsc::u32 arbiter_port)

Connect an upstream xtsc_router with this xtsc_arbiter.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

• log4xtensa::BinaryLogger & get_binary_logger ()

Get the BinaryLogger for this component (e.g. to adjust its log level).

Public Attributes
• sc_core::sc_export< xtsc::xtsc_request_if > ∗∗ m_request_exports
Masters bind to these.

• sc_core::sc_port< xtsc::xtsc_request_if > m_request_port

Bind to single slave.

• sc_core::sc_export< xtsc::xtsc_respond_if > m_respond_export

Single slave binds to this.

• sc_core::sc_port< xtsc::xtsc_respond_if > ∗∗ m_respond_ports

Bind to masters.

Protected Member Functions

• void compute_let_through ()
Translate fail_percentage into terms of maximum random value.

• xtsc::u32 random ()
Compute a pseudo-random sequence based on George Marsaglia’s multiply-with-carry
method.

• xtsc::u8 get_empty_slot ()
Get the next empty Request ID slot.

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• xtsc::u32 get_available_route_id ()
Get the next available route ID.

• void convert_request (request_info ∗&p_request_info, xtsc::u32 master_byte_width,

xtsc::u32 port_num)
PWC: Convert a request as required for a narrow/wider downstream PIF.

• bool convert_response (response_info ∗&p_response_info, xtsc::u32 master_byte_-

width, req_rsp_info ∗&p_req_rsp_info)
PWC: Convert a response as required for a narrow/wider upstream PIF.

• void confirm_alignment (xtsc::u32 total_bytes, xtsc::xtsc_address address8,

xtsc::xtsc_request &request)
PWC: Throw an exception if unaligned BLOCK_READ request is received (CWF).

• void do_request_immediate_timing (xtsc::u32 port_num, const xtsc::xtsc_request

&request)
nb_request helper when m_immediate_timing is true

• void do_request (xtsc::u32 port_num, const xtsc::xtsc_request &request)

nb_request helper when m_immediate_timing is false

• void handle_request (request_info ∗&p_active_request_info, xtsc::u32 port_num,

const char ∗caller)
Handle request.

• void nacc_remaining_requests ()
Common routine to nacc all remaining requests when operating with m_one_at_a_time
true.

• void arbiter_thread (void)

Handle incoming requests from multiple masters at the correct time.

• virtual void arbiter_pwc_thread (void)

PWC: Handle incoming requests from multiple masters at the correct time.

• void arbiter_special_thread (void)

• void align_request_phase_thread (void)
Align clock phase that the request is sent downstream to the clock phase when it was
received.

• void response_thread (void)

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Handle responses from single slave at the correct time.

• void response_pwc_thread (void)

PWC: Handle responses from single slave at the correct time.

• xtsc::u32 get_port_from_response (xtsc::xtsc_response &response)

Given a response transaction, this method determines which port to use to forward the
response back to the upstream module that sent the original request.

• void add_route_id_bits (xtsc::xtsc_request &request, xtsc::u32 port_num)

This method updates the route ID in the request with the bits of the specified port number so
the the response derived from the request will be able to get back to the upstream module
that sent xtsc_arbiter this request.

• request_info ∗ new_request_info (xtsc::u32 port_num, const xtsc::xtsc_request &re-

quest)
Get a new request_info (from the pool).

• request_info ∗ copy_request_info (const request_info &info)

Copy a new request_info (using the pool).

• void delete_request_info (request_info ∗&p_request_info)

Delete an request_info (return it to the pool).

• response_info ∗ new_response_info (const xtsc::xtsc_response &response)

Get a new response_info (from the pool).

• response_info ∗ new_response_info (const xtsc::xtsc_request &request)

Get a new response_info (from the pool).

• void delete_response_info (response_info ∗&p_response_info)

Delete an response_info (return it to the pool).

• xtsc::xtsc_address translate (xtsc::u32 port_num, xtsc::xtsc_address address8)

Apply address translation if applicable.

• req_rsp_info ∗ new_req_rsp_info (request_info ∗first_request_info)

Get a new req_rsp_info (from the pool).

• void delete_req_rsp_info (req_rsp_info ∗&p_req_rsp_info)

Delete an req_rsp_info (return it to the pool).

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• void compute_delays ()
Common method to compute/re-compute time delays.

• void reset_fifos ()
Reset internal fifos.

Protected Attributes
• xtsc_request_if_impl ∗∗ m_request_impl
m_request_exports bind to these

• xtsc_respond_if_impl m_respond_impl
m_respond_export binds to this

• std::deque< request_info ∗ > ∗∗ m_request_deques

Buffer requests from multiple masters in peekable deque’s.

• sc_core::sc_fifo< int > ∗∗ m_request_fifos

Use sc_fifo to ensure determinancy.

• sc_core::sc_fifo< response_info ∗ > m_response_fifo

Buffer responses from single slave.

• sc_core::sc_fifo< request_info ∗ > ∗ m_phase_delay_fifo

Buffer requests being delayed to align their phase.

• xtsc_arbiter_parms m_arbiter_parms
Copy of xtsc_arbiter_parms.

• bool m_is_pwc
True if acting as a PIF width converter.

• bool m_use_block_requests
PWC: From "use_block_requests" parameter.

• std::vector< xtsc::u32 > m_master_byte_widths

PWC: From "master_byte_widths" parameter.

• xtsc::u32 m_slave_byte_width
PWC: From "slave_byte_width" parameter.

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• xtsc::u8 m_next_slot
PWC: Next slot to test for availability.

• xtsc::u8 m_pending_request_id
PWC: New ID of pending multi-request (when != m_num_slots).

• xtsc::u8 m_active_block_read_id
PWC: ID of BLOCK_READ request while responses are active.

• req_rsp_info ∗ m_req_rsp_table [m_num_slots]

PWC: Table of outstanding requests indexed by request ID.

• request_info ∗ m_requests [4]

PWC: List of requests to be sent downstream.

• response_info ∗ m_responses [4]

PWC: List of responses to be sent back upstream.

• xtsc::u32 m_num_masters
The number of slave port pairs for masters to connect to.

• bool m_one_at_a_time
True if arbiter will only accept one request at a time.

• bool m_align_request_phase
See "align_request_phase" parameter.

• bool m_check_route_id_bits
See "check_route_id_bits" parameter.

• xtsc::u32 m_route_id_bits_mask
Our bit-field in the request route ID.

• xtsc::u32 m_route_id_bits_clear
All bits 1 except our bit-field in the request route ID.

• xtsc::u32 m_route_id_bits_shift
Offset to our bit-field in request route ID.

• xtsc::u32 m_num_route_ids
See "num_route_ids" in xtsc_arbiter_parms.

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• xtsc::u32 m_route_ids_used
Keep track of how many route ID’s are in use.

• xtsc::u32 m_next_route_id
Next free entry in m_routing_table (or 0xFFFFFFFF if none).

• xtsc::u32(∗ m_routing_table )[2]

[i][0]=>port, [i][1]=>Upstream route ID

• xtsc::u32 ∗ m_downstream_route_id
Keep track for multi-xfer reqs: RCW|BLOCK_WRITE|BURST_WRITE.

• bool m_do_translation
Indicates address translations may apply.

• bool m_waiting_for_nacc
True if waiting for RSP_NACC from slave.

• bool m_request_got_nacc
True if active request got RSP_NACC from slave.

• xtsc::u32 m_token
The port number which has the token.

• bool m_lock
Lock if non-last_transfer.

• bool m_read_only
From "read_only" parameter.

• bool m_write_only
From "write_only" parameter.

• bool m_log_peek_poke
From "log_peek_poke" parameter.

• sc_core::sc_time m_clock_period
This arbiter’s clock period.

• sc_core::sc_time m_arbitration_phase
Clock phase arbitration occurs.

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• sc_core::sc_time m_arbitration_phase_plus_one
Clock phase arbitration occurs plus one clock period.

• sc_core::sc_time m_time_resolution
SystemC time resolution.

• xtsc::u64 m_clock_period_value
Clock period as u64.

• bool m_has_posedge_offset
True if m_posedge_offset is non-zero.

• sc_core::sc_time m_posedge_offset
From "posedge_offset" parameter.

• xtsc::u64 m_posedge_offset_value
m_posedge_offset as u64

• bool m_dram_lock
See "dram_lock" in xtsc_arbiter_parms.

• std::vector< bool > m_dram_locks

Current value from nb_lock(). Reset to false.

• bool m_external_cbox
See "external_cbox" in xtsc_arbiter_parms.

• xtsc::u32 m_xfer_en_port
See "xfer_en_port" in xtsc_arbiter_parms.

• bool m_delay_from_receipt
True if delay starts upon request receipt.

• bool m_immediate_timing
True if no delay (not even a delta cycle).

• sc_core::sc_time m_last_request_time_stamp
Time last request was sent out.

• sc_core::sc_time m_last_response_time_stamp
Time last response was sent out.

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• sc_core::sc_time m_recovery_time
See "recovery_time" in xtsc_arbiter_parms.

• sc_core::sc_time m_request_delay
See "request_delay" in xtsc_arbiter_parms.

• sc_core::sc_time m_nacc_wait_time
See "nacc_wait_time" in xtsc_arbiter_parms.

• sc_core::sc_time m_response_delay
See "response_delay" in xtsc_arbiter_parms.

• sc_core::sc_time m_response_repeat
See "response_repeat" in xtsc_arbiter_parms.

• xtsc::u32 m_fail_port_mask
See "fail_port_mask" in xtsc_arbiter_parms.

• xtsc::u32 m_fail_percentage
See "fail_percentage" in xtsc_arbiter_parms.

• xtsc::u32 m_fail_seed
See "fail_seed" in xtsc_arbiter_parms.

• xtsc::u32 m_z
For Marsaglia’s multipy-with-carry PRNG.

• xtsc::u32 m_w
For Marsaglia’s multipy-with-carry PRNG.

• xtsc::u32 m_let_through
Random number gating threshold based on fail percentage.

• std::string m_arbitration_policy
See "arbitration_policy" in xtsc_arbiter_parms.

• std::vector< port_policy_info ∗ > m_port_policy_table

From parsing "arbitration_policy".

• xtsc::u32 ∗ m_ports_with_requests
For arbitrate_policy() method.

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• std::string m_lock_port_groups
See "lock_port_groups" in xtsc_arbiter_parms.

• bool m_use_lock_port_groups
True if "lock_port_groups" was specified.

• std::vector< std::vector< xtsc::u32 > ∗ > m_lock_port_group_table

Lock port group each port belongs to.

• sc_core::sc_event m_arbiter_thread_event
To notify arbiter_thread.

• sc_core::sc_event m_response_thread_event
To notify response_thread.

• sc_core::sc_event m_align_request_phase_thread_event
To notify align_request_phase_thread.

• std::vector< req_rsp_info ∗ > m_req_rsp_info_pool

Maintain a pool of req_rsp_info to improve performance.

• std::vector< request_info ∗ > m_request_pool

Maintain a pool of requests to improve performance.

• std::vector< response_info ∗ > m_response_pool

Maintain a pool of responses to improve performance.

• std::vector< std::vector< xtsc::xtsc_address_range_entry ∗ > ∗ > m_translation_-

tables
One table of address translations for each master.

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

• bool m_profile_buffers
See "profile_buffers" in xtsc_arbiter_parms.

• xtsc::u32 ∗ m_max_num_requests
The maximum available items in request_fifos.

• sc_core::sc_time ∗ m_max_num_requests_timestamp

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Time when the max request buffer happened.

• xtsc::u64 ∗ m_max_num_requests_tag
Tag of max buffered items in request_fifos.

• xtsc::u32 m_max_num_responses
The maximum available items in response_fifo.

• sc_core::sc_time m_max_num_responses_timestamp
Time when the max response buffer happened.

• xtsc::u64 m_max_num_responses_tag
Tag of max buffered items in response_fifo.

• log4xtensa::TextLogger & m_text

Text logger.

• log4xtensa::BinaryLogger & m_binary

Binary logger.

• bool m_log_data_binary
True if transaction data should be logged by m_binary.

Static Protected Attributes

• static const xtsc::u8 m_num_slots = 64

PWC: Number of Request ID’s (2∧ 6=64).

7.45.1 Detailed Description

A memory interface arbiter and/or address translator. Example XTSC module implementing
an arbiter that allows a memory interface slave module (e.g. xtsc_memory or xtsc_mmio)
to be accessed by multiple memory interface master modules (e.g. xtsc_core and/or xtsc_-
master). All modules involved communicate via the xtsc::xtsc_request_if and xtsc::xtsc_-
respond_if interfaces.
By default, this module supports PIF interconnect but it can also be configured for some
types of local memory interconnect. See "dram_lock", "external_cbox", and "xfer_en_port".

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This module can also be used to provided address translations. Each memory interface
master can have a different set of address translations applied. See "translation_file" in
xtsc_arbiter_parms.
By default, this module does arbitration on a fair, round-robin basis and ignores the priority
field in the xtsc::xtsc_request and xtsc::xtsc_response objects (other than to forward them
on). If a different arbitration policy is desired, there are several options available:

• Use the "arbitration_policy" parameter to specify a custom arbitration policy.

• Use the "external_cbox" parameter to prioritize reads over writes.

• Use the "xfer_en_port" parameter (TX Xtensa only).

• Subclass xtsc_arbiter and override the virtual arbitrate() method.

• Create a modified arbiter starting with the xtsc_arbiter.h and xtsc_arbiter.cpp source
code.

• Write a custom arbiter from scratch.

If desired this arbiter can be used as a PIF width converter (PWC) by setting the "master_-
byte_widths" parameter to indicate the byte width of each upstream PIF master and by
setting the "slave_byte_width" parameter to indicate the byte width of the downstream PIF
slave.
Limitations of PIF Width Convertor:

• Critical word first BLOCK_READ transactions are not supported (i.e. for BLOCK_-
READ requests, the start address must be aligned to the total transfer size, not just
the bus width).

• PIF 4 interleaved responses are not supported and result in undefined behavior.

• When going from a wide master to a narrow slave if an incoming BLOCK_READ re-
quest requires multiple outgoing BLOCK_READ requests then the downstream sys-
tem must return all the BLOCK_READ responses in the order the requests were sent
out and without any intervening responses to other requests.

When not configured as a PWC, this module supports all memory interface data bus widths
and so does not need to be configured for any particular data bus width.
Warning: Special care must be taken by the system builder with respect to routing and
timing when multiple arbiters are used on a single communications path between an initiator
and a target. For routing considerations, see the documentation for the "route_id_lsb"
parameter in xtsc_arbiter_parms. For timing considerations, see the documentation for the
"arbitration_phase" parameter in xtsc_arbiter_parms.

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Note: The "fail_port_mask" parameter can be used to test the ability of upstream memory
interface masters to handle RSP_NACC from this arbiter model rather then depending on
a chance conflict to cause RSP_NACC which may not happen until long into the simulation
or not at all.
Here is a block diagram of the system used in the xtsc_arbiter example:

(*arbiter.m_request_exports[0])

(*arbiter.m_respond_ports[0])

arbiter.m_respond_export
arbiter.m_request_port

nb_respond()

(*shr_mem.m_respond_port[0])
xtsc_core core0 nb_request()
(core0.out)

nb_request() xtsc_memory
xtsc_arbiter arbiter
shr_mem

xtsc_core core1 nb_request() address_translations.

(core1.out) txt

nb_respond()
nb_respond()

(*arbiter.m_respond_ports[1])
core1.get_request_port("pif")
(*shr_mem.m_request_export[0])

(*arbiter.m_request_exports[1])

(core1.get_respond_export("pif"))

Figure 7.1: xtsc_arbiter Example

Here is the code to connect the system using the xtsc::xtsc_connect() method:

xtsc_connect(arbiter, "master_port", "", shr_mem);

xtsc_connect(core0, "pif", "slave_port[0]", arbiter);
xtsc_connect(core1, "pif", "slave_port[1]", arbiter);

And here is the code to connect the system using manual SystemC port binding:

arbiter.m_request_port(*shr_mem.m_request_exports[0]);
(*shr_mem.m_respond_ports[0])(arbiter.m_respond_export);
core0.get_request_port("pif")(*arbiter.m_request_exports[0]);
(*arbiter.m_respond_ports[0])(core0.get_respond_export("pif"));
core1.get_request_port("pif")(*arbiter.m_request_exports[1]);
(*arbiter.m_respond_ports[1])(core1.get_respond_export("pif"));

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See also:
xtsc::xtsc_request_if
xtsc::xtsc_respond_if
xtsc_arbiter_parms
xtsc::xtsc_core::How_to_do_port_binding

Definition at line 754 of file xtsc_arbiter.h.

7.45.2 Constructor & Destructor Documentation

7.45.2.1 xtsc_arbiter (sc_core::sc_module_name module_name, const

xtsc_arbiter_parms & arbiter_parms)

Constructor for an xtsc_arbiter.

Parameters:
module_name Name of the xtsc_arbiter sc_module.
arbiter_parms The remaining parameters for construction.

See also:
xtsc_arbiter_parms

7.45.3 Member Function Documentation

7.45.3.1 virtual bool arbitrate (xtsc::u32 & port_num) [virtual]

In most configurations, this method does the actual arbitration but may be overridden by a
sub-class (see Exceptions below).

Parameters:
port_num On entry this specifies the port which most recently received a granted. If
this method returns true, then it must set port_num to the port receiving the grant.

Returns:
true if a grant is given this round, otherwise returns false.

Note: If a sub-class overrides this method then the override must consider, but must not
adjust, m_lock. See this class’s implementation of arbitrate() for an example of how to do
arbitration.
Note: Exceptions: This method is not used if "external_cbox", "xfer_en_port", "arbitration_-
policy", or "immediate_timing" are set (not left at their default value).

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7.45.3.2 virtual bool arbitrate_policy (xtsc::u32 & port_num) [virtual]

This method does the actual arbitration when "arbitration_policy" is specified.

Parameters:
port_num On entry this specifies the port which most recently received a granted. If
this method returns true, then it must set port_num to the port receiving the grant.

Returns:
true if a grant is given this round, otherwise returns false.

7.45.3.3 void setup_random_rsp_nacc_responses (xtsc::u32 port_mask,

xtsc::u32 fail_percentage)

This method can be used to control the sending of randomly generated RSP_NACC re-
sponses (for example, to test the upstream memory interface master device’s handling of
them).

Parameters:
port_mask See "fail_port_mask" in xtsc_arbiter_parms.
fail_percentage See "fail_percentage" in xtsc_arbiter_parms.

7.45.3.4 void change_clock_period (xtsc::u32 clock_period_factor, xtsc::u32

arbitration_phase_factor)

Method to change the clock period.

Parameters:
clock_period_factor Specifies the new length of this device’s clock period expressed
in terms of the SystemC time resolution (from sc_get_time_resolution()).
arbitration_phase_factor Specifies the phase of the clock at which arbitration is per-
formed expressed in terms of the SystemC time resolution (from sc_get_time_-
resolution()). This value must be strictly less then clock_period_factor.

7.45.3.5 virtual void execute (const std::string & cmd_line, const std::vector<
std::string > & words, const std::vector< std::string > & words_lc,
std::ostream & result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:

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change_clock_period <ClockPeriodFactor>
Call xtsc_arbiter::change_clock_period(<ClockPeriodFactor>). Return previous
<ClockPeriodFactor> for this device.

dump_profile_results
Dump max used buffers for request and response fifos.

reset
Call xtsc_arbiter::reset().

Implements xtsc_command_handler_interface.

7.45.3.6 void dump_profile_results (std::ostream & os = std::cout)

Dump maximmum used buffers for request and response fifos.

Parameters:
os The ostream object to which the profile results should be dumped.

7.45.3.7 void connect (xtsc_arbiter & arbiter, xtsc::u32 port_num)

Connect an upstream xtsc_arbiter with this xtsc_arbiter. This method connects the single
master port pair of the specified upstream xtsc_arbiter with the specified slave port pair of
this xtsc_arbiter.

Parameters:
arbiter The upstream xtsc_arbiter to be connected with this xtsc_arbiter.
port_num This specifies the slave port pair of this xtsc_arbiter that the single master
port pair of the upstream xtsc_arbiter is to be connected with. port_num must be
in the range of 0 to this xtsc_arbiter’s "num_masters" parameter minus 1.

7.45.3.8 void connect (xtsc::xtsc_core & core, const char ∗ memory_port_name,

xtsc::u32 port_num = 0xFFFFFFFF)

Connect with an upstream or downstream (inbound pif) xtsc_core. This method connects
this xtsc_arbiter with the memory interface specified by memory_port_name of the xtsc_-
core specified by core. If memory_port_name is "inbound_pif" or "snoop" then the master
port pair of this xtsc_arbiter is connected with the inbound pif or snoop slave port pair of
core. If memory_port_name is neither "inbound_pif" nor "snoop" then the memory interface
master port pair specified by memory_port_name of core is connected with the slave port
pair specified by port_num of this xtsc_arbiter.

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Parameters:
core The xtsc_core to connect with.
memory_port_name The memory interface name to connect with. Case-insensitive.
port_num If memory_port_name is neither "inbound_pif" nor "snoop", then the mem-
ory interface of core specified by memory_port_name will be connected with the
slave port pair of this xtsc_arbiter specified by this parameter. In this case, this
parameter must be explicitly set and must be in the range of 0 to this xtsc_arbiter’s
"num_masters" parameter minus 1. This parameter is ignored if memory_port_-
name is "inbound_pif" or "snoop".

See also:
xtsc::xtsc_core::How_to_do_memory_port_binding for a list of valid memory_port_-
name values.

Note: The snoop port is reserved for future use.

7.45.3.9 void connect (xtsc_dma_engine & dma_engine, xtsc::u32 port_num)

Connect an upstream xtsc_dma_engine with this xtsc_arbiter. This method connects the
master port pair of the specified xtsc_dma_engine with the specified slave port pair of this
xtsc_arbiter.

Parameters:
dma_engine The xtsc_dma_engine to connect with this xtsc_arbiter.
port_num This specifies the slave port pair of this xtsc_arbiter that the specified xtsc_-
dma_engine will be connected with. port_num must be in the range of 0 to this
xtsc_arbiter’s "num_masters" parameter minus 1.

7.45.3.10 void connect (xtsc_master & master, xtsc::u32 port_num)

Connect an upstream xtsc_master with this xtsc_arbiter. This method connects the master
port pair of the specified xtsc_master with the specified slave port pair of this xtsc_arbiter.

Parameters:
master The xtsc_master to connect with this xtsc_arbiter.
port_num This specifies the slave port pair of this xtsc_arbiter that the specified xtsc_-
master will be connected with. port_num must be in the range of 0 to this xtsc_-
arbiter’s "num_masters" parameter minus 1.

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7.45.3.11 void connect (xtsc_memory_trace & memory_trace, xtsc::u32

trace_port, xtsc::u32 arbiter_port)

Connect an upstream xtsc_memory_trace with this xtsc_arbiter. This method connects the
specified master port pair of the specified upstream xtsc_memory_trace with the specified
slave port pair of this xtsc_arbiter.

Parameters:
memory_trace The upstream xtsc_memory_trace to connect with.
trace_port The master port pair of the upstream xtsc_memory_trace to connect with
this xtsc_arbiter. trace_port must be in the range of 0 to the upstream xtsc_-
memory_trace’s "num_ports" parameter minus 1.
arbiter_port The slave port pair of this xtsc_arbiter to connect the xtsc_memory_trace
with. arbiter_port must be in the range of 0 to this xtsc_arbiter’s "num_masters"
parameter minus 1.

7.45.3.12 void connect (xtsc_pin2tlm_memory_transactor & pin2tlm, xtsc::u32

tran_port, xtsc::u32 arbiter_port)

Connect an upstream xtsc_pin2tlm_memory_transactor with this xtsc_arbiter. This method

connects the specified master port pair of the specified upstream xtsc_pin2tlm_memory_-
transactor with the specified slave port pair of this xtsc_arbiter.

Parameters:
pin2tlm The upstream xtsc_pin2tlm_memory_transactor to connect with this xtsc_-
arbiter.
tran_port The xtsc_pin2tlm_memory_transactor master port pair to connect with this
xtsc_arbiter. tran_port must be in the range of 0 to the xtsc_pin2tlm_memory_-
transactor’s "num_ports" parameter minus 1.
arbiter_port The slave port pair of this xtsc_arbiter to connect with the xtsc_pin2tlm_-
memory_transactor. arbiter_port must be in the range of 0 to this xtsc_arbiter’s
"num_masters" parameter minus 1.

7.45.3.13 void connect (xtsc_router & router, xtsc::u32 router_port, xtsc::u32

arbiter_port)

Connect an upstream xtsc_router with this xtsc_arbiter. This method connects the specified
master port pair of the specified upstream xtsc_router with the specified slave port pair of
this xtsc_arbiter.

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Parameters:
router The upstream xtsc_router to connect with this xtsc_arbiter.
router_port The master port pair of the upstream xtsc_router to connect with this
xtsc_arbiter. router_port must be in the range of 0 to the upstream xtsc_router’s
"num_slaves" parameter minus 1.
arbiter_port The slave port pair of this xtsc_arbiter to connect the xtsc_router with.
arbiter_port must be in the range of 0 to this xtsc_arbiter’s "num_masters" param-
eter minus 1.

7.45.3.14 bool convert_response (response_info ∗& p_response_info, xtsc::u32

master_byte_width, req_rsp_info ∗& p_req_rsp_info) [protected]

PWC: Convert a response as required for a narrow/wider upstream PIF.

Returns:
true if this was final last transfer.

The documentation for this class was generated from the following file:

• xtsc_arbiter.h

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7.46 xtsc_arbiter_parms Class Reference

Constructor parameters for a xtsc_arbiter object.

#include <xtsc/xtsc_arbiter.h>Inheritance diagram for xtsc_arbiter_parms:

xtsc_parms

xtsc_arbiter_parms

Collaboration diagram for xtsc_arbiter_parms:

xtsc_parms

xtsc_arbiter_parms

Public Member Functions

• xtsc_arbiter_parms (xtsc::u32 num_masters=1, xtsc::u32 route_id_lsb=0, bool one_-

at_a_time=true)
Constructor for an xtsc_arbiter_parms object.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

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7.46.1 Detailed Description

Constructor parameters for a xtsc_arbiter object. This class contains the constructor pa-
rameters for a xtsc_arbiter object.

Name Type Description

------------------ ---- --------------------------------------------------

"num_masters" u32 The number of memory interface masters competing

for the memory interface slave. The arbiter will
have this number of memory interface slave port pairs
(one for each master to connect with).

"master_byte_widths" vector<u32> The byte width of the data interface of each PIF
master. Typically, this and the "slave_byte_width"
parameters are left unset and xtsc_arbiter does not
concern itself with the byte width of the data interface
(it just forwards requests and responses and leaves it
to the upstream masters and downstream slave to have
matching data interface byte widths). If desired when
modeling a PIF interface, this parameter can be set to
indicate the byte widths of each PIF master (in this
case the "slave_byte_width" parameter must also be set
to indicate the byte width of the downstream PIF slave)
and the xtsc_arbiter will act as a PIF width convertor
(PWC) to ensure that each request sent out on the
request port has the byte width to match the downstream
slave and that each response sent out on a response port
has a byte width to match the upstream master. If this
parameter is set then "immediate_timing",
"arbitration_policy", "external_cbox", and
"xfer_en_port" must be left at their default values.
If this parameter is set then it must contain exactly
"num_masters" entries.
Valid entry values are 4|8|16.
Default (unset).

"slave_byte_width" u32 The PIF data interface byte width of the downstream
slave. Typically, this parameter should be left at
its default value of 0; however, if the
"master_byte_widths" parameter is set then this
parameter must be set to a non-zero value to indicate
the byte width of the downstream PIF slave.
Value non-default values are 4|8|16.
Default = 0.

"use_block_requests" bool This parameter is only used when acting as a PIF width
converter (i.e. when the "master_byte_widths" parameter
is set). By default, the downstream request type is the
same as the upstream request type. If this parameter is
set to true when acting as a PIF width converter, then
an upstream WRITE|READ request which has all byte lanes
enabled and which is larger then the downstream PIF
width will be converted into BLOCK_WRITE|BLOCK_READ
request(s).
Default = false.

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"route_id_lsb" u32 Each xtsc_request and xtsc_response object contains a

route ID data member (accessed using the get_route_id()
and set_route_id() methods) that can be used by arbiters
(and arbiter-like devices) in the system to enable them
to route responses back to the originating master. The
xtsc_arbiter model supports two different modes or
methods for using the route ID. The system designer
should ensure all arbiters in the system use the same
method.
Method #1 - System Designer Specified Routing
Each arbiter in a communication path is assigned a bit
field in route ID by the system designer. This bit field
is assigned by specifying its least significat bit
position in the route ID using this parameter
("route_id_lsb"). When a request is received, the
arbiter fills in its assigned bit field in route ID with
the port number that the request arrived on. When a
response comes back, the arbiter uses its bit field in
route ID to determine which port to forward the reply
out on.
Note: The arbiter will use ceil(log2(num_masters))
bits in route ID.
Warning: The system designer must ensure that all
arbiter-like devices in a communication path
(such as xtsc_arbiter) use non-overlapping bit
fields in route ID. The simulator is not able
to reliably detect overlapping bit fields in
route ID and they will probably result in
communication failure.
Method #2 - Autonomous Routing
The second method is to set this parameter to 0xFFFFFFFF
to indicate that the xtsc_arbiter instance "owns" the
whole route ID field but is responsible for ensuring
that the route ID of each response sent back upstream
matches the route ID contained in the original incoming
request. This means the xtsc_arbiter instance must
maintain a table of original route ID and incoming port
number which is indexed by the outgoing route ID. The
size of this table is specified by the "num_route_ids"
parameter.

"check_route_id_bits" bool If true and "route_id_lsb" is not 0xFFFFFFFF (Method #1

above), then a check will be performed on each incoming
request to ensure the route ID has no bits set in this
arbiters route ID bit field (this check is not
fool-proof). If "route_id_lsb" is 0xFFFFFFFF (Method #2
above), then this parameter is ignored.
Default = true.

"num_route_ids" u32 If "route_id_lsb" is 0xFFFFFFFF, then this parameter

specifies how big this arbiters routing table is.
Note: While the routing table is full, all incoming
requests will be rejected with RSP_NACC.
Default = 16.

"translation_file" char* The name of a script file providing an address

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translation table for each of the memory interface slave

port pairs. If "translation_file" is NULL or empty,
then no address translation is performed.
Default = NULL.

If "translation_file" is neither NULL nor empty, then

it must name a script file containing lines in the
following format:

<PortNum> <LowAddr> [<HighAddr>] <NewBaseAddr>

1. The numbers can be in decimal or hexadecimal (with

'0x' prefix) format.
2. <PortNum> is the memory interface slave port pair
number.
3. <LowAddr> is the low address of an address
range that is to be translated.
4. The optional <HighAddr> is the high address of
the address range that is to be translated. If
<HighAddr> is not present, it defaults to
0xFFFFFFFF.
5. <NewBaseAddr> specifies a new base address for
address translation using the formula:

NewAddr = OldAddr + <NewBaseAddr> - <LowAddr>

6. The same <PortNum> can appear more than once;

however, address ranges for a given <PortNum>
cannot overlap.
7. Comments, extra whitespace, and blank lines are
ignored. See xtsc_script_file for a complete list
of pseudo-preprocessor commands.

"dram_lock" bool This parameter can be used to support DRamNLock

functionality. If this parameter is left at its default
value of false, then the last transfer flag in
xtsc::xtsc_request is used to control locking. This
models arbitration on PIF interconnet and nb_lock()
calls would typically not be expected to occur (if they
do they will simply be passed downstream). This
parameter can be set to true to model DataRAM interconnect
and xtsc::xtsc_request_if::nb_lock() in conjunction with
xtsc::xtsc_request_if::nb_request() will be used to lock
the arbiter to the port getting the grant (see
"lock_port_groups" for a way to lock the arbiter to
multiple ports). If "dram_lock" is true then
"immediate_timing" and "master_byte_widths" must be left
at their default values.
Note: "dram_lock" should be false for system-level
interconnect such as PIF and AXI.
Default = false.

"lock_port_groups" char* When "dram_lock" is true, this parameter allows grouping

ports together such that if the arbiter is locked to a
port then requests from that port or any other port in
that port's group will be allowed through. This
parameter can be used to support the S32C1I instruction

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targeting a split Rd/Wr DataRAM interface or an inbound

PIF RCW transaction targeting a split Rd/Wr DataRAM
interface.
Syntax:
<LockPortGroups> := <LockPortGroup>[;<LockPortGroup>]...
Where:
<LockPortGroup> := <Port>[,<Port>]...
Rules:
- <Port> must be in the range from 0 to "num_masters"
minus 1.
- A given port number (<Port>) can appear at most one
time (in at most one <LockPortGroup>).
- Any port number not specified in a <LockPortGroup> is
in its own lock port group containing itself as the
group's only member.
- If "lock_port_groups" is specified then "dram_lock"
must be true and "arbitration_policy" must be set.
Default = NULL.
Note: When specifying "lock_port_groups" on the Linux
command line, any semi-colon will require escaping or
quoting. For example:
./xtsc_arbiter -dram_lock=true -lock_port_groups="0,1;2,3;4,5"

"arbitration_policy" char* By default, xtsc_arbiter uses a fair, round-robin

arbitration policy. This parameter can be used to
instead specify a custom arbitration policy.
Syntax:
<ArbitrationPolicy> := <Port0Policy>[;<Port1Policy>]...
Where:
<PortNPolicy> := <StartPriority>,<EndPriority>,<Decrement>
The full arbitration policy is specified by specifying a
port policy for each port. Each port policy is
separated from its predecessor with a semi-colon. If
there are fewer port policies specified then the number
of ports (from the "num_masters" parameter) then the
last port policy specified applies to all remaining
ports. Each port policy is specified using three comma-
separated numbers which specify the start priority, the
end priority, and the decrement. For priorities,
smaller numbers mean higher priority, so 0 is the
highest priority and <EndPriority> must be less than or
equal to <StartPriority>. If <StartPriority> and
<EndPriority> are equal then <Decrement> must be 0. At
the beginning of simulation and after reset(), the
current priority of each port is set to its
<StartPriority>. After winning a round of arbitration
(each cycle on which a port has a request which is
passed downstream), the current priority of that port is
reset to its <StartPriority>. After losing a round of
arbitration due to priority (but not due to simple round
robin), the current priority of a port is decremented by
its <Decrement>, but never below its <EndPriority>.
For a given round of arbitration, the current priority
of all ports with an active request is checked to find
the highest priority (smallest current priority value).
Only ports with an active request whose current priority
is equal to the smallest current priority value are

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consider for that round. In this set of candidate

ports, the grant is given to the next port in round
robin sequence to the port which most recently received
a grant. If "arbitration_policy" is set then
"immediate_timing", "external_cbox", "xfer_en_port",
and "master_byte_widths" must be left at their default
values.
Default = NULL
Examples:
<ArbitrationPolicy> Description
-------------------- -----------------------------------------------------
0,0,0 Fair round robin (FRR).
0,0,0;1,1,0 Port 0 has permanent high priority, all others FRR.
0,0,0;3,0,1 Port 0 has a priority over other ports until they have
been RSP_NACC'd 3 times.
Note: When specifying "arbitration_policy" on the Linux
command line, any semi-colon will require escaping or
quoting. For example:
./xtsc_arbiter -arbitration_policy="0,0,0;3,0,1"
Note: If it is desired to assign different priorities to
different request types (e.g. to prioritize reads over
writes), an upstream xtsc_router can be used to first
send the different request types to different ports (see
"route_by_type" in xtsc_router_parms).
Note: If it is desired to assign arbitration priorities
based on the transaction priority value obtained from
xtsc::xtsc_request::get_priority(), then an upstream
xtsc_router can be used to first send transactions with
different priority values to different ports (see
"route_by_priority" in xtsc_router_parms).

"external_cbox" bool By default, xtsc_arbiter uses a fair, round-robin

arbitration policy. If you want to use xtsc_arbiter as
a type of external CBox to connect dual load/store units
of an Xtensa to a single local memory, then this
parameter can be set to true to cause xtsc_arbiter to
modify the arbitration policy such that if there is a
pending READ request on one port and a pending WRITE
request to the same address on the other port then the
READ will always get priority (this is to support the
dual load/store unit requirement that a simultaneous
read and write to the same address return old data for
the read). If "external_cbox" is true then
"immediate_timing", "master_byte_widths", and
"arbitration_policy" must be left at their default
values, and "num_masters" must be 2.
Default = false.

"xfer_en_port" u32 By default, xtsc_arbiter uses a fair, round-robin

arbitration policy. If you want to use xtsc_arbiter on
a local memory interface with busy of a TX Xtensa core
which also has a boot loader interface, then set this
parameter to the slave port the TX is connected to to
cause xtsc_arbiter to modify the arbitration policy such
that a request received on this port whose get_xfer_en()
method returns true will get priority over all other
requests. If "xfer_en_port" is set then

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"external_cbox", "immediate_timing",
"master_byte_widths", and "arbitration_policy" must
be left at their default values.
Default = 0xFFFFFFFF (no special xfer_en handling).

"immediate_timing" bool If true, the following timing parameters are ignored and
the arbiter module forwards all requests and responses
immediately (without any delay--not even a delta cycle).
In this case, there is no arbitration, because the
arbiter forwards all requests immediately. If false,
the following parameters are used to determine arbiter
timing. This parameter must be false when the arbiter
is being used as a PIF width converter.
If "immediate_timing" is true then "dram_lock",
"external_cbox", "xfer_en_port",
"master_byte_widths", and "arbitration_policy" must
be left at their default values.
Default = false.

"request_fifo_depth" u32 The depth of the request fifos (each memory interface
master has its own request fifo).
Default = 2.

"request_fifo_depths" vector<u32> The depth of each request fifo. Each memory

interface master has its own request fifo. If this
parameter is set it must contain "num_masters" number
of values (all non-zero) which will be used to define
the individual request fifo depths in port number order.
If this parameter is not set then "request_fifo_depth"
(without the trailing s) will define the depth of all
the request fifos. If this parameter is set then
"one_at_a_time" should typically be changed to false.
Default: no entries.

"response_fifo_depth" u32 The depth of the single response fifo.

Default = 2.

"read_only" bool By default, this arbiter supports all transaction types.

Set this parameter to true to model a modified PIF
interconnect that does not have ReqData pins. If this
parameter is true an exception will be thrown if any of
the following types of requests are received (nb_poke
calls will still be supported):
WRITE, BLOCK_WRITE, RCW, BURST_WRITE
Default: false

"write_only" bool By default, this arbiter supports all transaction types.

Set this parameter to true to model a modified PIF
interconnect that does not have RespData pins. If this
parameter is true an exception will be thrown if any of
the following types of requests are received (nb_peek
calls will still be supported):
READ, BLOCK_READ, RCW, BURST_READ
Default: false

"log_peek_poke" bool By default, xtsc_arbiter does not log calls to its

peek/poke methods. Set this parameter to true to cause

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xtsc_arbiter to log them at VERBOSE_LOG_LEVEL.

Default = false.

"clock_period" u32 This is the length of this arbiter's clock period

expressed in terms of the SystemC time resolution
(from sc_get_time_resolution()). A value of
0xFFFFFFFF means to use the XTSC system clock
period (from xtsc_get_system_clock_period()).
A value of 0 means one delta cycle.
Default = 0xFFFFFFFF (i.e. use the system clock
period).

"posedge_offset" u32 This specifies the time at which the first posedge of
this device's clock conceptually occurs. It is
expressed in units of the SystemC time resolution and
the value implied by it must be strictly less than the
value implied by the "clock_period" parameter. A value
of 0xFFFFFFFF means to use the same posedge offset as
the system clock (from
xtsc_get_system_clock_posedge_offset()).
Default = 0xFFFFFFFF.

"arbitration_phase" u32 The phase of the clock at which arbitration is performed

expressed in terms of the SystemC time resolution (from
sc_get_time_resolution()). A value of 0 means to
arbitrate at posedge clock as specified by
"posedge_offset". A value of 0xFFFFFFFF means to use a
phase of one-half of this arbiter's clock period which
corresponds to arbitrating at negedge clock. The
arbitration phase must be strictly less than the
arbiter's clock period.
Warning: When there are multiple arbiters on a single
communications path between an initiator and a target,
they should NOT use the same arbitration phase because
this will result in communication failure if the
downstream arbiter rejects a request (sends an RSP_NACC
to the upstream arbiter) and the SystemC kernel has
already run the upstream arbiter for that simulation
cycle (in this case the upstream arbiter will throw an
exception because the RSP_NACC is received after the
deadline). To represent multiple contiguous arbiters in
a communications path as combinatorial logic, assign
strictly increasing arbitration phases to them as you
move along the communications path from initiator to
target. As an example for three arbiters in the default
situation of a 1 ps SystemC time resolution and a 1 ns
clock period (1000 ps), one could assign the first
arbiter an "arbitration_phase" of 400 (i.e. 400 ps), the
second arbiter 450, and the third arbiter 500 (which
corresponds to negedge clock). In this case, each
arbiter performs its arbitration and forwards the
winning request downstream in time for that request to
be considered by the downstream arbiter when it performs
its arbitration for that clock period. To represent
multiple contiguous arbiters in a communications path as
synchronous logic such that each request spends a clock
period in each arbiter in sequence, assign strictly

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decreasing arbitration phases to each arbiter as you

move along the communications path from initiator to
target. For the three arbiter case as above, one could
assign the first arbiter an "arbitration_phase" of 500,
the second arbiter 450, and the third arbiter 400. In
this case, when the first arbiter performs its
arbitration and forwards the winning request downstream
it arrives after the second arbiter has performed its
arbitration for that clock period and so is not
considered until the next clock period. In interconnect
situations involving multiple arbiters and routers, it
is possible to have a given arbiter that is upstream
from a second arbiter on one communications path but
downstream from that same arbiter on another
communications path. In this situation it is not
possible to model the whole interconnect as
combinatorial logic because this would imply a
combinational loop in the hardware.
Default = 0xFFFFFFFF (arbitrate at negedge clock).

"nacc_wait_time" u32 This parameter, expressed in terms of the SystemC time

resolution, specifies how long to wait after sending a
request downstream to see if it was rejected by
RSP_NACC. This value must not exceed this arbiter's
clock period. A value of 0 means one delta cycle. A
value of 0xFFFFFFFF means to wait for a period equal to
this arbiter's clock period. CAUTION: A value of 0 can
cause an infinite loop in the simulation if the
downstream module requires a non-zero time to become
available.
Default = 0xFFFFFFFF (arbiter's clock period).

"one_at_a_time" bool If true only one request will be accepted by the arbiter
at a time (i.e. one for all memory interface masters put
together). If false, each master can have one or more
requests pending at one time with the limit on the
number of pending requests from each master being
determined by the "request_fifo_depth" or
"request_fifo_depths" parameters. If this parameter is
true, then "request_delay" and "recovery_time" as it
applies to requests are ignored.
Default = true.

"delay_from_receipt" bool If false, the following delay parameters apply from

the start of processing of the request or response (i.e.
after all previous requests or all previous responses,
as appropriate, have been forwarded). This models a
arbiter that can only service one request at a time
and one response at a time. If true, the following
delay parameters apply from the time of receipt of
the request or response. This models an arbiter with
pipelining.
Default = true.

"request_delay" u32 When "one_at_a_time" is false, this parameter specifies

the minimum number of clock periods it takes to forward
a request. If "delay_from_receipt" is true, timing

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starts when the request is received by the arbiter. If

"delay_from_receipt" is false, timing starts at the
later of when the request is received and when the
previous request was forwarded. A value of 0 means one
delta cycle. If "one_at_a_time" is true, then this
parameter is ignored.
Default = 1.

"response_delay" u32 The minimum number of clock periods it takes to forward

a response. If "delay_from_receipt" is true, timing
starts when the response is received by the arbiter. If
"delay_from_receipt" is false, timing starts at the
later of when the response is received and when the
previous response was forwarded. A value of 0 means one
delta cycle.
Default = 1.

"response_repeat" u32 The number of clock periods after a response is sent and
rejected before the response will be resent. A value of
0 means one delta cycle.
Default = 1.

"recovery_time" u32 If "delay_from_receipt" is true, this specifies two

things. First, the minimum number of clock periods
after a request is forwarded before the next request
will be forwarded (this doesn't apply if "one_at_a_time"
is true). Second, the minimum number of clock periods
after a response is forwarded before the next response
will be forwarded. If "delay_from_receipt" is false,
this parameter is ignored.
Default = 1.

"align_request_phase" bool If true a delay will be introduced as required to cause

the downstream request to go out on the same phase of
the clock that the request originally came in on. If
false, then requests go out on the clock phase specified
by "arbitration_phase" (plus, when "one_at_a_time" is
false, any delay implied by "delay_from_receipt,
"request_delay", and "recovery_time").
Default = false.

Note: The following 3 parameters can be used to test an upstream memory interface
master's ability to handle RSP_NACC responses early in a simulation run.
Also see setup_random_rsp_nacc_responses().

"fail_port_mask" u32 Each bit of this mask determines whether a random

RSP_NACC response may be generated for the corresponding
port. If a bit is set (i.e. 1), then the corresponding
port is a candidate for randomly-generated RSP_NACC
responses. If the bit is clear (i.e. 0), then the
corresponding port will not be given any
randomly-generated RSP_NACC responses. If all bits are
0 then no RSP_NACC responses will be randomly generated.
If all bits are 1, then all ports are candidates for a
random error response.
Default = 0x00000000 (i.e. no random RSP_NACC).

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"fail_percentage" u32 This parameter specifies the probability of a random

RSP_NACC response being generated when a request is
received on a port whose corresponding bit in
"fail_port_mask" is set. A value of 100 causes all
requests received on ports whose corresponding bit in
"fail_port_mask" is set to receive a RSP_NACC response
(i.e. all requests on those ports receive a RSP_NACC
responses). A value of 1 will result in a random
RSP_NACC response being sent approximately 1% of the
time. Valid values are 1 to 100.
Default = 100.

"fail_seed" u32 This parameter is used to seed the psuedo-random number

generator. Each xtsc_arbiter instance has its own
random sequence based on its "fail_seed" value. If this
parameter is set to 0 then the "random" numbers
generated by the sequence will all be 0.
Default = 1.

"profile_buffers" bool If true, the xtsc_arbiter class keeps the track of used
buffers for its internal request and response fifos. At
the end of the simulation, the maximum used buffer and
the first time that the max buffer has been reached are
printed in the output log file at NOTE level. This
information is printed for each request and response fifo
separately.
Default = false.

See also:
xtsc_arbiter
xtsc::xtsc_parms
xtsc::xtsc_script_file

Definition at line 596 of file xtsc_arbiter.h.

7.46.2 Constructor & Destructor Documentation

7.46.2.1 xtsc_arbiter_parms (xtsc::u32 num_masters = 1, xtsc::u32 route_id_lsb =

0, bool one_at_a_time = true) [inline]

Constructor for an xtsc_arbiter_parms object.

Parameters:
num_masters The number of memory interface masters competing for the memory
interface slave. A value of 1 (the default) can be used to cause the arbiter to act
like a simple pass-through delay and/or address-translation device. The arbiter

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will have this number of memory interface slave port pairs (one for each master
to connect with).
route_id_lsb The least significant bit position of this arbiters route_id bit field.
one_at_a_time If true, the default, only one request will be accepted by the arbiter
at a time (i.e. one for all memory interface masters put together). If false, each
master can have one or more requests pending at one time with the number of
pending requests for each master being determined by the "request_fifo_depth"
parameter.

Note: The arbiter will use ceil(log2(num_masters)) bits in the route_id.

Definition at line 621 of file xtsc_arbiter.h.
The documentation for this class was generated from the following file:

• xtsc_arbiter.h

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7.47 xtsc_cache Class Reference

This class implements an XTSC model of a typical cache module.

#include <xtsc/xtsc_cache.h>Inheritance diagram for xtsc_cache:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface

xtsc_memory

xtsc_cache

Collaboration diagram for xtsc_cache:

xtsc_debug_if

xtsc_memory_b xtsc_request_if
m_p_memory
m_p_initial_value_file
m_p_exclusive_script_stream
m_p_script_stream
xtsc_script_file

xtsc_resettable
xtsc_module

xtsc_connection_interface
xtsc_command_handler_interface xtsc_request_if_impl
m_request_impl

m_filtered_request xtsc_memory m_memory

m_p_active_request_info

request_info
m_memory_parms
m_request
xtsc_respond_if
xtsc_parms xtsc_memory_parms m_fast_access_object xtsc_cache_parms
m_cache_parms
xtsc_request m_stream_dumper xtsc_respond_if_impl
m_respond_impl
xtsc_fast_access_if m_lines
m_p_request line_info xtsc_cache m_cache
stream_dumper m_stream_dumper m_filtered_response
m_p_active_response m_p_block_read_response
xtsc_response m_p_single_response
m_p_block_write_response

m_request

Classes

• struct line_info

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Cache line data structure.

• class xtsc_respond_if_impl
Implementation of xtsc_respond_if.

Public Types
• enum replacement_policy_t {
REPL_RANDOM = 0,
REPL_RR = 1,
REPL_LRU = 2 }
• typedef enum xtsc_component::xtsc_cache::replacement_policy_t replacement_-
policy_t

Public Member Functions

• SC_HAS_PROCESS (xtsc_cache)
• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

• xtsc_cache (sc_core::sc_module_name module_name, const xtsc_cache_parms

&cache_parms)
Constructor for an xtsc_cache class.

• virtual ∼xtsc_cache (void)

Destructor.

• void end_of_simulation ()
SystemC calls this method at the end of simulation.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

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• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• void clear_profile_results ()
Clear cache profile results.

• void dump_config (std::ostream &os=std::cout) const

Dump the cache configuration.

• void dump_profile_results (std::ostream &os=std::cout) const

Dump profile results.

• void flush ()
Flush dirty lines to the lower-level memory, invalid the entire cache.

• xtsc::u32 flush_dirty_lines ()
Flush dirty lines to the lower-level memory, return the number of flushed lines.

• virtual void reset (bool hard_reset=false)

Reset the device.

• void set_profile_cache (bool enable=true)

Set the value of "m_profile_cache" parameter.

• virtual void execute (const std::string &cmd_line, const std::vector< std::string >
&words, const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

Public Attributes

• sc_core::sc_port< xtsc::xtsc_request_if > m_request_port

Binds to the lower-level memory.

• sc_core::sc_export< xtsc::xtsc_respond_if > m_respond_export

The lower-level memory binds to this.

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Protected Types

• enum pif_attribute_bits {
BUFFERABLE = 0x10,
CACHEABLE = 0x20,
WRITE_BACK = 0x40,
READ_ALLOCATE = 0x80,
WRITE_ALLOCATE = 0x100 }
PIF attribute bits.

Protected Member Functions

• void check_memory_parms (const xtsc_cache_parms &cache_parms)

Check xtsc_memory_parms values.

• virtual void compute_delays ()

We override this method from the xtsc_memory class.

• void configure ()
Configure the cache.

• void initialize ()
Initialize the cache.

• virtual void do_bypass (xtsc::u32 port_num)

Bypass the cache model.

• virtual void do_block_read (xtsc::u32 port_num)

We override this method from the xtsc_memory class.

• virtual void do_block_write (xtsc::u32 port_num)

We override this method from the xtsc_memory class.

• virtual void do_burst_read (xtsc::u32 port_num)

We override this method from the xtsc_memory class.

• virtual void do_burst_write (xtsc::u32 port_num)

We override this method from the xtsc_memory class.

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• virtual void do_rcw (xtsc::u32 port_num)

We override this method from the xtsc_memory class.

• virtual void do_read (xtsc::u32 port_num)

We override this method from the xtsc_memory class.

• virtual void do_write (xtsc::u32 port_num)

We override this method from the xtsc_memory class.

• virtual void worker_thread (void)

We override this method from the xtsc_memory class.

• void ext_mem_block_read (xtsc::xtsc_address src_mem_addr, xtsc::u32 size,

xtsc::u8 ∗dst_data, bool first_transfer_only=false, xtsc::u32 port_num=0)
Send a BLOCK_READ request to the lower-level memory.

• void ext_mem_block_read (xtsc::u32 port_num)

Bypass the cache on BLOCK_READ requests.

• void ext_mem_block_write (xtsc::xtsc_address dst_mem_addr, xtsc::u32 size, const

xtsc::u8 ∗src_data, xtsc::u32 port_num=0)
Send a BLOCK_WRITE request to the lower-level memory.

• void ext_mem_block_write (xtsc::u32 port_num, bool cache_bypass=true)

Bypass the cache model on BLOCK_WRITE requests if cache_bypass is true, otherwise
send a copy of input request to the lower-level memory.

• void ext_mem_read (xtsc::xtsc_address src_mem_addr, xtsc::u32 size, xtsc::xtsc_-

byte_enables byte_enables, xtsc::u8 ∗dst_data, xtsc::u32 port_num=0)
Send a READ request to the lower-level memory.

• void ext_mem_read (xtsc::u32 port_num)

Bypass the cache model on READ requests.

• void ext_mem_rcw (xtsc::u32 port_num)

Bypass the cache model on RCW requests.

• void ext_mem_write (xtsc::xtsc_address dst_mem_addr, xtsc::u32 size, xtsc::xtsc_-

byte_enables byte_enables, const xtsc::u8 ∗src_data, xtsc::u32 port_num=0)
Send a WRITE request to the lower-level memory.

• void ext_mem_write (xtsc::u32 port_num)

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Bypass the cache model on WRITE requests.

• xtsc::u32 find_hit (xtsc::xtsc_address address_tag, xtsc::u32 set_num)

Return the matched way number if it is a hit, otherwise return "m_num_ways".

• xtsc::u32 find_replace_line (xtsc::u32 set_num)

Return the replaced way number on a conflict cache miss.

• xtsc::u32 find_replace_lru (xtsc::u32 set_num)

Return the replaced way number based on the LRU policy.

• xtsc::u32 find_replace_random (xtsc::u32 set_num)

Return the replaced way number based on the Random policy.

• xtsc::u32 find_replace_rr (xtsc::u32 set_num)

Return the replaced way number based on the RR policy.

• virtual void peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗buffer)

We override this method from the xtsc_memory class.

• virtual void poke (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8

∗buffer)
We override this method from the xtsc_memory class.

• void update_line (xtsc::xtsc_address memory_address, xtsc::u32 set_num, xtsc::u32

way_num, bool critical_word_only=false)
Update a cache line’s data from the lower-level memory.

• void clear_dirty (xtsc::u32 set_num, xtsc::u32 way_num)

Clear a cache line’s dirty bit.

• void clear_valid (xtsc::u32 set_num, xtsc::u32 way_num)

Clear a cache line’s valid bit.

• xtsc::xtsc_address get_tag (xtsc::xtsc_address address) const

Return the tag of the address.

• xtsc::xtsc_address get_tag (xtsc::u32 set_num, xtsc::u32 way_num) const

Return the tag of a cache line.

• bool get_lrf (xtsc::u32 set_num, xtsc::u32 way_num) const

Return the LRF bit of a cache line.

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• xtsc::u32 get_set (xtsc::xtsc_address address) const

Return the set number of the address.

• bool is_bufferable (xtsc::u32 pif_attribute) const

Return true, if the current request is cacheable based on its PIF attribute.

• bool is_cacheable (xtsc::u32 pif_attribute) const

Return true, if the current request is cacheable based on its PIF attribute.

• bool is_dirty (xtsc::u32 set_num, xtsc::u32 way_num) const

Check if the cache line is dirty.

• bool is_read_allocate (xtsc::u32 pif_attribute) const

Return true, if the current cache access is write-allocate based on its PIF attribute.

• bool is_valid (xtsc::u32 set_num, xtsc::u32 way_num) const

Check if the cache line is valid.

• bool is_write_allocate (xtsc::u32 pif_attribute) const

Return true, if the current cache access is write-allocate based on its PIF attribute.

• bool is_write_back (xtsc::u32 pif_attribute) const

Return true, if the current cache access is write-back based on its PIF attribute.

• void set_tag (xtsc::xtsc_address tag, xtsc::u32 set_num, xtsc::u32 way_num)

Set a cache line’s tag bits.

• void set_dirty (xtsc::u32 set_num, xtsc::u32 way_num)

Set a cache line’s dirty bit.

• void set_valid (xtsc::u32 set_num, xtsc::u32 way_num)

Set a cache line’s valid bit.

• void update_lrf (xtsc::u32 set_num, xtsc::u32 way_num)

Update the LRF bit of a cache line.

• void update_lru (xtsc::u32 set_num, xtsc::u32 ref)

Update the LRU bits of a cache line.

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Protected Attributes
• xtsc_respond_if_impl m_respond_impl
m_respond_export binds to this

• xtsc::xtsc_request m_request
For sending system memory requests.

• const xtsc::xtsc_response ∗ m_p_single_response

Current rsp to READ, WRITE, or RCW request.

• sc_core::sc_event m_single_response_available_event
Notified when READ, WRITE, or RCW rsp is received.

• const xtsc::xtsc_response ∗ m_p_block_read_response [16]

Maintain our copy of BLOCK_READ responses.

• sc_core::sc_event m_block_read_response_available_event
Notified when a BLOCK_READ rsp is received.

• const xtsc::xtsc_response ∗ m_p_block_write_response

Current BLOCK_WRITE response.

• sc_core::sc_event m_block_write_response_available_event
Notified when a BLOCK_WRITE rsp is received.

• xtsc::u32 m_num_block_transfers
Number of BLOCK_READ/BLOCK_WRITE transfers.

• xtsc::u32 m_block_read_response_count
Number of BLOCK_READ responses received so far.

• xtsc_cache_parms m_cache_parms
Copy of xtsc_cache_parms.

• xtsc::u32 m_cache_byte_size
See "cache_byte_size".

• xtsc::u32 m_line_byte_width
See "line_byte_width".

• xtsc::u32 m_num_ways

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See "num_ways".

• xtsc::u32 m_replacement_policy
See "replacement_policy".

• bool m_read_allocate
See "read_allocate".

• bool m_write_allocate
See "write_allocate".

• bool m_write_back
See "write_back".

• xtsc::u8 m_read_priority
See "read_priority".

• xtsc::u8 m_write_priority
See "write_priority".

• bool m_profile_cache
See "profile_cache".

• bool m_use_pif_attribute
See "use_pif_attribute".

• sc_core::sc_time m_bypass_delay
See "bypass_delay".

• struct line_info ∗∗ m_lines

Cache lines, includes the address tag and status bits.

• xtsc::u32 ∗∗ m_lru
Least-recently used (LRU) counters.

• bool m_lru_selected
Indicates if LRU policy is selected.

• xtsc::u32 m_access_byte_width
A copy of "byte_width".

• xtsc::u32 m_num_lines

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Total number of cache lines.

• xtsc::u32 m_num_sets
Total number of cache sets.

• xtsc::u32 m_line_access_ratio
The number of access words in a cache line.

• xtsc::u32 m_set_byte_size
Total number of bytes in a set.

• xtsc::u32 m_num_sets_log2
Log2 of m_num_sets.

• xtsc::u32 m_line_byte_width_log2
Log2 of m_line_byte_width.

• xtsc::u32 m_tag_shift
Shift value to calculate address tag.

• xtsc::u32 m_set_shift
Shift value to calculate set index.

• xtsc::u32 m_set_mask
Set’s index mask.

• xtsc::u8 ∗ m_line_buffer
Internal buffer for updating cache lines.

• xtsc::u32 m_line_buffer_index
Index of cache line buffer.

• bool m_cacheable
Indicate if the current request is cacheable.

• bool m_bufferable
Indicate if the current request is bufferable.

• xtsc::u64 m_read_count
Number of READ accesses.

• xtsc::u64 m_read_miss_count

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Number of READ misses.

• xtsc::u64 m_block_read_count
Number of BLOCK_READ accesses.

• xtsc::u64 m_block_read_miss_count
Number of BLOCK_READ misses.

• xtsc::u64 m_write_count
Number of WRITE accesses.

• xtsc::u64 m_write_miss_count
Number of WRITE misses.

• xtsc::u64 m_block_write_count
Number of BLOCK_WRITE accesses.

• xtsc::u64 m_block_write_miss_count
Number of BLOCK_WRITE misses.

Static Protected Attributes

• static const xtsc::u8 m_read_id = 0x3

xtsc_request::m_id for READ

• static const xtsc::u8 m_write_id = 0x5

xtsc_request::m_id for WRITE

• static const xtsc::u8 m_block_read_id = 0x7

xtsc_request::m_id for BLOCK_READ

• static const xtsc::u8 m_block_write_id = 0x9

xtsc_request::m_id for BLOCK_WRITE

• static const xtsc::u8 m_rcw_id = 0xb

xtsc_request::m_id for RCW

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7.47.1 Detailed Description

This class implements an XTSC model of a typical cache module. The xtsc_cache class
can be used as an L2 cache, which sits between a core’s PIF port and the system memory.

See also:
xtsc_cache_parms
xtsc_memory

Definition at line 208 of file xtsc_cache.h.

7.47.2 Constructor & Destructor Documentation

7.47.2.1 xtsc_cache (sc_core::sc_module_name module_name, const

xtsc_cache_parms & cache_parms)

Constructor for an xtsc_cache class.

Parameters:
module_name The SystemC module name.
cache_parms The xtsc_cache and xtsc_memory construction parameters.

See also:
xtsc_cache_parms
xtsc_memory_parms

7.47.3 Member Function Documentation

7.47.3.1 virtual void execute (const std::string & cmd_line, const std::vector<
std::string > & words, const std::vector< std::string > & words_lc,
std::ostream & result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands in addition to the xtsc_memory commands:

clear_profile_results
Call xtsc_cache::clear_profile_results().

dump_config
Call xtsc_cache::dump_config(). Dump cache configuration.

dump_profile_results

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Call xtsc_cache::dump_profile_results(). Dump cache accesses profile results.

flush
Call xtsc_cache::flush(). Flush the entire cache.

flush_dirty_lines
Call xtsc_cache::flush_dirty_lines(). Flush dirty lines only.

reset [<Hard>]
Call xtsc_cache::reset(<Hard>). Where <Hard> is 0|1 (default 0).

set_profile_cache <Enable>
Call xtsc_cache::set_profile_cache(<Enable>). Where <Enable> is true|false.
Set the value of "m_profile_cache" parameter.

Reimplemented from xtsc_memory.

The documentation for this class was generated from the following file:

• xtsc_cache.h

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7.48 xtsc_cache_parms Class Reference

Constructor parameters for an xtsc_cache object.

#include <xtsc/xtsc_cache.h>Inheritance diagram for xtsc_cache_parms:

xtsc_parms

xtsc_memory_parms

xtsc_cache_parms

Collaboration diagram for xtsc_cache_parms:

xtsc_parms

xtsc_memory_parms

xtsc_cache_parms

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Public Member Functions

• xtsc_cache_parms (xtsc::u32 byte_width=4, xtsc::u32 line_byte_width=8, xtsc::u32
hit_delay=1, xtsc::u32 byte_size=0x1000)
Constructor for an xtsc_cache_parms object.

• const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

7.48.1 Detailed Description

Constructor parameters for an xtsc_cache object. This class has the same contructor
parameters as an xtsc_memory_parms object plus the following additional ones.

Name Type Description

------------------ ---- ------------------------------------------------------
"cache_byte_size" u32 The total byte size of this cache. The cache byte size
should meet the following restrictions: (a) number of
sets(= "cache_byte_size" / "line_byte_width"x"num_ways")
must be a power of 2, (b) cache byte size must be an
integer multiple of the set byte size, and (c) minimum
value of cache size is "line_byte_width"x"num_ways".
Default = 0x1000 (4K Bytes).

"line_byte_width" u32 The byte size of cache lines. Note: this parameter
must be an integer multiple of "byte_width".
Valid values for the ratio of "line_byte_width" to
"byte_width" are 1|2|4|8|16.
Default = 8.

"num_ways" u32 The set associativity size. If 0, this class models

a fully-associative cache. If 1, this class models
a direct-mapped cache. Otherwise, it models a typical
"num_ways"-way set associative cache.
Default = 2 (i.e. a 2-way set associative cache).

"replacement_policy" char* This parameter defines the strategy for selecting a

line to replace. Valid values are RANDOM for random,
RR for round-robin, and LRU for least-recently used
replacement policies. Note: RANDOM policy is generally
used for internal tests only.
Default = RR.

"read_allocate" bool If true, the cache line is allocated on a read miss.

Default = true.

"write_allocate" bool If true, the cache line is allocated on a write miss,

i.e. write misses act like read misses. If false, the
data is only modified in the lower-level memory, i.e.
write miss do not modify the cache.

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Default = false.

"write_back" bool This parameter defines cache write policy. If true,

data is written only to the cache. The modified
line is written to the lower-level memory only
when it is replaced. If false, the data is written
to both cache and lower-level memory.
Default = true.

"read_priority" u32 Priority for the lower-level memory READ/BLOCK_READ

requests. Valid values are 0|1|2|3.
Default = 3 (i.e. the highest priority).

"write_priority" u32 Priority for the lower-level memory WRITE/BLOCK_WRITE

requests. Valid values are 0|1|2|3.
Default = 3 (i.e. the highest priority).

"profile_cache" bool If true, the xtsc_cache class keeps the track of read/
write misses. At the end of the simulation, miss rates
on read, write, and all accesses are printed in the
output log file at INFO level.
Default = false.

"use_pif_attribute" bool If true, the xtsc_cache class uses the PIF attribute
of input requests to determine cache behavior. This
specifies bufferable, cacheable, allocate, and write
policy attributes. If false, the xtsc_cache class
ignores PIF attributes and works based on the
xtsc_cache's parameters.
Default = false (i.e. ignore the PIF attribute).

"bypass_delay" u32 Number of clock periods takes to bypass the xtsc_cache

model for non-cacheable PIF requests.
Default = 1.

The following parameters of the xtsc_memory_parms class are initialized by the xtsc_-
cache class internally and changing their values will cause an exception.

Name Value
------------------ -----------
"num_ports" 1
"start_byte_address" 0x00000000
"memory_byte_size" 0
"use_raw_access" false

Note: The xtsc_cache class does not support raw access. By default, normal
nb_peek/nb_poke through all upstream devices is used for fast access.
For other fast access methods, set at most one of "use_callback_access",
"use_custom_access", and "use_interface_access" to true.

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The following parameters of the xtsc_memory_parms class are not supported by the xtsc_-
cache module. Note that changing their default values may cause an exception.

Name
--------------------
"burst_read_delay"
"burst_read_repeat"
"burst_write_delay"
"burst_write_repeat"
"burst_write_response"
"initial_value_file"
"memory_fill_byte"
"read_only"
"script_file"
"wraparound"
"fail_status"
"fail_request_mask"
"fail_percentage"
"fail_seed"

See also:
xtsc_memory_parms
xtsc_cache

Definition at line 148 of file xtsc_cache.h.

The documentation for this class was generated from the following file:

• xtsc_cache.h

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7.49 xtsc_command_handler_interface Class Reference

Interface to be called by xtsc_dispatch_command().

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#include <xtsc/xtsc.h>Inheritance diagram for xtsc_command_handler_interface:

xtsc_core

xtsc_udma

xtsc_arbiter

xtsc_lookup

xtsc_master

xtsc_master_tlm2

xtsc_cache
xtsc_memory

xtsc_dma_engine

xtsc_memory_tlm2

xtsc_memory_trace

xtsc_command_handler_interface xtsc_mmio

xtsc_queue

xtsc_queue_consumer

xtsc_queue_producer

xtsc_router

xtsc_tlm22xttlm_transactor

xtsc_tlm2pin_memory_transactor

xtsc_wire

xtsc_wire_logic

xtsc_xttlm2tlm2_transactor

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Public Member Functions

• virtual void execute (const std::string &line, const std::vector< std::string > &words,
const std::vector< std::string > &words_lc, std::ostream &result)=0
The method to be called when a command is to be executed.

• virtual void man (std::ostream &os)

If the user enters a "man" command, this optional method will be called just before the man
lines for the individual commands of this handler are output.

7.49.1 Detailed Description

Interface to be called by xtsc_dispatch_command(). This interface must be implemented

by any class wishing to provide commands to the XTSC command facility. The class
must implement this interface and then call xtsc_register_command() for each command
that it wishes to support. Typically, a class implementing this interface would be an sc_-
module but all that is actually required is that an sc_object instance be provided in the
xtsc_register_command() call. The name of the command handler is as returned by the
sc_object::name() method.
The XTSC core library includes several methods that the execute() method can use to
make parsing the command line easier. See the xtsc_command_∗ methods below.
For working examples which illustrate implementing this interface please see the xtsc_-
component::xtsc_memory source code in:

• $XTENSA_SW_TOOLS/src/xtsc/xtsc_memory.cpp

• $XTENSA_SW_TOOLS/src/xtsc/xtsc/xtsc_memory.h

For user examples of invoking commands, see "lua_command_prompt" and "xtsc_-

command_prompt" in xtsc_initialize_parms.

See also:
xtsc_dispatch_command
xtsc_register_command
xtsc_command_argtobool
xtsc_command_argtoi32
xtsc_command_argtou32
xtsc_command_argtou64
xtsc_command_argtod
xtsc_command_throw
xtsc_initialize_parms "lua_command_prompt"

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Chapter 7. Class Documentation

xtsc_initialize_parms "xtsc_command_prompt"
sc_command_handler_commands
xtsc_command_handler_commands
xtsc::xtsc_core::execute()
xtsc_component::xtsc_arbiter::execute()
xtsc_component::xtsc_lookup::execute()
xtsc_component::xtsc_memory::execute()
xtsc_component::xtsc_memory_tlm2::execute()
xtsc_component::xtsc_mmio::execute()
xtsc_component::xtsc_queue::execute()
xtsc_component::xtsc_router::execute()
xtsc_component::xtsc_tlm22xttlm_transactor::execute()
xtsc_component::xtsc_wire_logic::execute()
xtsc_component::xtsc_xttlm2tlm2_transactor::execute()

Definition at line 3798 of file xtsc.h.

7.49.2 Member Function Documentation

7.49.2.1 virtual void execute (const std::string & line, const std::vector<
std::string > & words, const std::vector< std::string > & words_lc,
std::ostream & result) [pure virtual]

The method to be called when a command is to be executed. The xtsc_dispatch_-

command() method will call this method for handling the command which is guaranteed to
be a command that was registered via xtsc_register_command() and guaranteed to have
a number of arguments within the range [min_args, max_args].

Parameters:
line The command line as entered by the user (including the handler name).
words The tokenized words of the command line excluding the handler name. So
the command is in words[0]; the first argument, if any, is in words[1]; the second
argument, if any, is in words[2], and so on.
words_lc Same as words except all characters are shifted to lower-case to make
parsing easier.
result The ostream object to output the result to. This result must not be an error.
If an error is detected, the execute() method should throw a std::exception (e.g.
xtsc_exception) with a meaningful message.

Implemented in xtsc_cache, xtsc_core, xtsc_arbiter, xtsc_dma_engine, xtsc_lookup, xtsc_-

master, xtsc_master_tlm2, xtsc_memory, xtsc_memory_tlm2, xtsc_mmio, xtsc_queue,

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xtsc_queue_consumer, xtsc_queue_producer, xtsc_router, xtsc_wire, xtsc_memory_-

trace, xtsc_tlm2pin_memory_transactor, xtsc_tlm22xttlm_transactor, xtsc_udma, xtsc_-
wire_logic, and xtsc_xttlm2tlm2_transactor.

7.49.2.2 virtual void man (std::ostream & os) [inline, virtual]

If the user enters a "man" command, this optional method will be called just before the man
lines for the individual commands of this handler are output. This can be used, for example,
to display help information pertaining to the handler as a whole or to all commands rather
than to one particular command.

Parameters:
os The ostream object to output overall information to.

Reimplemented in xtsc_memory, xtsc_queue, and xtsc_router.

Definition at line 3838 of file xtsc.h.
The documentation for this class was generated from the following file:

• xtsc.h

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7.50 xtsc_connection_interface Class Reference

This is the generic connection interface used to support plugin modules and the --connect
command in xtsc-run as well as the xtsc_connect() method in the XTSC core library.

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 Chapter 7. Class Documentation

#include <xtsc/xtsc.h>Inheritance diagram for xtsc_connection_interface:

xtsc_core

xtsc_tx_loader

xtsc_udma

xtsc_arbiter

xtsc_lookup

xtsc_lookup_driver

xtsc_lookup_pin

xtsc_master

xtsc_master_tlm2
xtsc_cache

xtsc_memory
xtsc_dma_engine

xtsc_memory_pin

xtsc_memory_tlm2

xtsc_memory_trace

xtsc_mmio
xtsc_connection_interface xtsc_module

xtsc_pin2tlm_lookup_transactor

xtsc_pin2tlm_memory_transactor

xtsc_queue

xtsc_queue_consumer

xtsc_queue_pin

xtsc_queue_producer

xtsc_router

xtsc_slave
Xtensa SystemC (XTSC) Reference Manual 241
xtsc_tlm22xttlm_transactor
Chapter 7. Class Documentation

Public Member Functions

• xtsc_connection_interface (sc_core::sc_object &module)

Constructor for an xtsc_connection_interface.

• virtual ∼xtsc_connection_interface ()
Destructor.

• sc_core::sc_object & get_object ()

Get a reference to the sc_object (sc_module or sc_prim_channel) that this xtsc_-
connection_interface is associated with.

• xtsc::xtsc_port_type_map get_port_type_map ()
Get a copy of m_port_types, the xtsc_port_type_map which enumerates all module ports
and their associated xtsc_port_type.

• bool has_port (const std::string &port_name) const

Return true if the module instance has the specified port.

• xtsc_port_type get_port_type (const std::string &port_name) const

Return the xtsc_port_type of the specified port.

• virtual u32 get_bit_width (const std::string &port_name, u32 interface_num=0) const

=0
Get the bit-width of the specified port.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)=0

Get a pointer to the specified port.

• virtual std::string get_default_port_name () const

Return a string specifying the name of the default port.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
Return an ordered list (vector<string>) of port names comprising the named PORT_TABLE
specified by port_table_name.

• virtual std::string get_user_defined_port_type (const std::string &port_name) const

Return a string, T, identifying the user-defined type.

• virtual void connect_user_defined_port_type (const std::string &port_name, sc_-

core::sc_object ∗p_object, const std::string &signal_name)

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Perform port-binding between the locally-known port specified by port_name and the for-
eign port pointed to by p_object.

• xtsc::xtsc_port_table get_resolved_port_table (const std::string &port_name) const

This is a convenience method that returns an ordered list (vector<string>) of port names
comprising the port or port table specified by port_name and with all port table entries
resolved to their constituent ports.

• void dump_ports_and_tables (std::ostream &os=std::cout, xtsc::u32 ns=35, bool ver-

bose=false) const
This convenience method dumps a list of the elementary ports (Part 1), port table names
(Part 2), and port table definitions (Part 3) that this connection interface has.

Protected Attributes
• sc_core::sc_object & m_object
Must be an sc_module or sc_prim_channel subclass.

• xtsc::xtsc_port_type_map m_port_types
Derived classes must populate this table in their constructor See xtsc_connect().

Private Member Functions

• xtsc_connection_interface (const xtsc_connection_interface &)
• xtsc_connection_interface & operator= (const xtsc_connection_interface &)

Private Attributes
• std::set< std::string > m_port_table_resolution_set

7.50.1 Detailed Description

This is the generic connection interface used to support plugin modules and the --connect
command in xtsc-run as well as the xtsc_connect() method in the XTSC core library. Note:
Derived classes must:

• Populate m_port_types in their constructor (taking into consideration any construction

parameters which affect what ports the module instance has).

Xtensa SystemC (XTSC) Reference Manual 243

Chapter 7. Class Documentation

• Implement the get_bit_width() method.

• Implement the get_port() method.

• Implement the get_default_port_name() method if desired to have a default port.

• Implement the get_port_table() method if m_port_types contains any port of xtsc_-

port_type PORT_TABLE.

• Implement the get_user_defined_port_type() method if m_port_types contains any

port whose xtsc_port_type is one of the user-defined port types (that is, any port for
which xtsc_is_user_defined_port_type() returns true).

• Implement the connect_user_defined_port_type() method if m_port_types contains

any port of type USER_DEFINED_PORT, USER_DEFINED_OUTPUT, or USER_-
DEFINED_INITIATOR.

For working examples which illustrate implementing this interface please see the simple_-
memory.plugin and pif2sb_bridge.plugin sub-directories of the XTSC examples directory
installed with each Tensilica core config in:

• <xtsc_examples_root>/simple_memory.plugin

• <xtsc_examples_root>/pif2sb_bridge.plugin

Note: Port names in m_port_types are case-sensitive.

See also:
xtsc_port_type
xtsc_connect
xtsc_plugin_interface

Definition at line 5303 of file xtsc.h.

7.50.2 Constructor & Destructor Documentation

7.50.2.1 xtsc_connection_interface (sc_core::sc_object & module)

Constructor for an xtsc_connection_interface.

Parameters:
module A reference to the associated sc_module or sc_prim_channel subclass.

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7.50.3 Member Function Documentation

7.50.3.1 sc_core::sc_object& get_object () [inline]

Get a reference to the sc_object (sc_module or sc_prim_channel) that this xtsc_-

connection_interface is associated with. Note: Derived classes should NOT implement
this method.
Definition at line 5325 of file xtsc.h.

7.50.3.2 xtsc::xtsc_port_type_map get_port_type_map () [inline]

Get a copy of m_port_types, the xtsc_port_type_map which enumerates all module ports
and their associated xtsc_port_type. Note: Derived classes must populate m_port_types
in their constructor.
Note: Derived classes should NOT implement this method.
Definition at line 5336 of file xtsc.h.

7.50.3.3 bool has_port (const std::string & port_name) const

Return true if the module instance has the specified port.

Parameters:
port_name The port name of interest.

Note: Derived classes should NOT implement this method.

7.50.3.4 xtsc_port_type get_port_type (const std::string & port_name) const

Return the xtsc_port_type of the specified port. An exception is thrown if m_port_types has
no such port.

Parameters:
port_name The port name of interest from m_port_types.

Note: Derived classes should NOT implement this method.

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Chapter 7. Class Documentation

7.50.3.5 virtual u32 get_bit_width (const std::string & port_name, u32

interface_num = 0) const [pure virtual]

Get the bit-width of the specified port. The non-pin-level interfaces may return 0 to indicate
that bit-width is a don’t care (for example, an xtsc_router that does not consider the data
width of the xtsc_request/xtsc_respond objects).

Parameters:
port_name A port name from m_port_types whose xtsc_port_type is not PORT_-
TABLE.
interface_num Typically 0. Can be set to 1 if port_name names a port of xtsc_port_-
type LOOKUP_PORT or LOOKUP_EXPORT to obtain the bit width of the lookup
address (for these two port types, interface_num of 0 refers to the lookup data
interface bit width).

Note: Derived classes must implement this method.

Implemented in xtsc_cache, xtsc_core, xtsc_arbiter, xtsc_dma_engine, xtsc_lookup, xtsc_-
lookup_driver, xtsc_master, xtsc_master_tlm2, xtsc_memory, xtsc_memory_tlm2, xtsc_-
mmio, xtsc_queue, xtsc_queue_consumer, xtsc_queue_producer, xtsc_router, xtsc_-
slave, xtsc_wire, xtsc_wire_source, xtsc_lookup_pin, xtsc_memory_pin, xtsc_memory_-
trace, xtsc_pin2tlm_lookup_transactor, xtsc_pin2tlm_memory_transactor, xtsc_queue_-
pin, xtsc_tlm2pin_memory_transactor, xtsc_tlm22xttlm_transactor, xtsc_tx_loader, xtsc_-
udma, xtsc_wire_logic, and xtsc_xttlm2tlm2_transactor.

7.50.3.6 virtual sc_core::sc_object∗ get_port (const std::string & port_name)

[pure virtual]

Get a pointer to the specified port.

Parameters:
port_name A port name from m_port_types whose xtsc_port_type is not PORT_-
TABLE.

Note: Derived classes must implement this method.

Implemented in xtsc_cache, xtsc_core, xtsc_arbiter, xtsc_dma_engine, xtsc_lookup, xtsc_-
lookup_driver, xtsc_master, xtsc_master_tlm2, xtsc_memory, xtsc_memory_tlm2, xtsc_-
mmio, xtsc_queue, xtsc_queue_consumer, xtsc_queue_producer, xtsc_router, xtsc_-
slave, xtsc_wire, xtsc_wire_source, xtsc_lookup_pin, xtsc_memory_pin, xtsc_memory_-
trace, xtsc_pin2tlm_lookup_transactor, xtsc_pin2tlm_memory_transactor, xtsc_queue_-
pin, xtsc_tlm2pin_memory_transactor, xtsc_tlm22xttlm_transactor, xtsc_tx_loader, xtsc_-
udma, xtsc_wire_logic, and xtsc_xttlm2tlm2_transactor.

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 Chapter 7. Class Documentation

7.50.3.7 virtual std::string get_default_port_name () const [inline, virtual]

Return a string specifying the name of the default port. The name returned by this method
must either be the empty string ("") or it must be a named port from the m_port_types table.
Note: This is an optional method. Derived classes need implement this method only if they
wish to define a default port.
Reimplemented in xtsc_cache, xtsc_core, xtsc_arbiter, xtsc_dma_engine, xtsc_lookup,
xtsc_lookup_driver, xtsc_master, xtsc_master_tlm2, xtsc_memory, xtsc_memory_tlm2,
xtsc_mmio, xtsc_queue_consumer, xtsc_queue_producer, xtsc_router, xtsc_slave, xtsc_-
wire_source, xtsc_lookup_pin, xtsc_memory_pin, xtsc_pin2tlm_lookup_transactor, and
xtsc_udma.
Definition at line 5399 of file xtsc.h.

7.50.3.8 virtual xtsc::xtsc_port_table get_port_table (const std::string &

port_table_name) const [virtual]

Return an ordered list (vector<string>) of port names comprising the named PORT_-
TABLE specified by port_table_name.

Parameters:
port_table_name A named port of xtsc_port_type PORT_TABLE from m_port_types.

Note: Derived classes must implement this method only if m_port_types contains a port of
xtsc_port_type PORT_TABLE.
Note: Port tables can be nested. That is, one or more of the port names in the xtsc_port_-
table returned by this method may themselves be of xtsc_port_type PORT_TABLE.

See also:
get_resolved_port_table()

Reimplemented in xtsc_cache, xtsc_core, xtsc_arbiter, xtsc_dma_engine, xtsc_lookup,

xtsc_lookup_driver, xtsc_master, xtsc_master_tlm2, xtsc_memory, xtsc_memory_tlm2,
xtsc_mmio, xtsc_queue, xtsc_queue_consumer, xtsc_queue_producer, xtsc_router, xtsc_-
slave, xtsc_wire_source, xtsc_lookup_pin, xtsc_memory_pin, xtsc_memory_trace, xtsc_-
pin2tlm_lookup_transactor, xtsc_pin2tlm_memory_transactor, xtsc_queue_pin, xtsc_-
tlm2pin_memory_transactor, xtsc_tlm22xttlm_transactor, xtsc_tx_loader, xtsc_udma,
xtsc_wire_logic, and xtsc_xttlm2tlm2_transactor.

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Chapter 7. Class Documentation

7.50.3.9 virtual std::string get_user_defined_port_type (const std::string &

port_name) const [virtual]

Return a string, T, identifying the user-defined type. Two ports will be considered to be a
conjugate pair if their T, as returned by this method, is the same and one of the following
three two-part statements is true:

• one port is a USER_DEFINED_PORT and the other port is a USER_DEFINED_-

EXPORT

• one port is a USER_DEFINED_OUTPUT and the other port is a USER_DEFINED_-

INPUT

• one port is a USER_DEFINED_INITIATOR and the other port is a USER_DEFINED_-

TARGET

The string contents returned by this method are recommended to be the user-defined T
from the following table:

xtsc_port_type How T is construed

---------------------- ----------------------------------------------------------

USER_DEFINED_PORT sc_port <T> where T is a user-defined sc_interface

USER_DEFINED_EXPORT sc_export<T> where T is a user-defined sc_interface

USER_DEFINED_OUTPUT sc_out<T> where T is a user-defined type

USER_DEFINED_INPUT sc_in <T> where T is a user-defined type

USER_DEFINED_INITIATOR T="tlm_socket<BW>" where BW is a user-defined bit width

USER_DEFINED_TARGET T="tlm_socket<BW>" where BW is a user-defined bit width

Parameters:
port_name A named port from m_port_types for which the xtsc_is_user_defined_-
port_type() returns true.

Note: Derived classes must implement this method only if their m_port_types contains a
port for which xtsc_is_user_defined_port_type() returns true.

See also:
xtsc_is_user_defined_port_type()

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 Chapter 7. Class Documentation

7.50.3.10 virtual void connect_user_defined_port_type (const std::string &

port_name, sc_core::sc_object ∗ p_object, const std::string &
signal_name) [virtual]

Perform port-binding between the locally-known port specified by port_name and the for-
eign port pointed to by p_object. This method is responsible for confirming that p_object
is of the correct type. If the locally-known port is an sc_out<T> then this method is also
responsible for creating the sc_signal<T> object necessary to connect an sc_out<T> to
an sc_in<T>.

Parameters:
port_name A named port from m_port_types for which the xtsc_is_user_defined_-
port_type() returns true.
p_object A pointer to an sc_object whose type is the conjugate of port_name.
signal_name The name to give to the signal that this method must create if the locally-
known port is an sc_out<T>.

Note: Derived classes must implement this method only if m_port_types contains a
port of type USER_DEFINED_PORT, USER_DEFINED_OUTPUT, or USER_DEFINED_-
INITIATOR.

See also:
xtsc_is_user_defined_port_type()

7.50.3.11 xtsc::xtsc_port_table get_resolved_port_table (const std::string &

port_name) const

This is a convenience method that returns an ordered list (vector<string>) of port names
comprising the port or port table specified by port_name and with all port table entries
resolved to their constituent ports. If port_name is not of xtsc_port_type PORT_TABLE,
then the list will contain a single entry equal to port_name. If port_name is of xtsc_port_-
type PORT_TABLE, then the list will be the same as that returned by the get_port_table()
method except that any names in that table which are of xtsc_port_type PORT_TABLE will
also be replaced by their constituent ports and so on recursively.
Note: Derived classes should NOT implement this method.

Parameters:
port_name A named port from m_port_types.

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Chapter 7. Class Documentation

7.50.3.12 void dump_ports_and_tables (std::ostream & os = std::cout, xtsc::u32

ns = 35, bool verbose = false) const

This convenience method dumps a list of the elementary ports (Part 1), port table names
(Part 2), and port table definitions (Part 3) that this connection interface has. Note: Derived
classes should NOT implement this method.
Example usage:

xtsc_core core0("core0", core_parms);

core0.dump_ports_and_tables();

Parameters:
os The ostream object to dump the port list to.
ns The number of spaces to allow for the first column of output.
verbose If true, include bit width of interface in Parts 1 and 3.

The documentation for this class was generated from the following file:

• xtsc.h

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 Chapter 7. Class Documentation

7.51 xtsc_core Class Reference

A Tensilica core Instruction Set Simulator (ISS).

#include <xtsc/xtsc_core.h>Inheritance diagram for xtsc_core:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface

xtsc_core

Collaboration diagram for xtsc_core:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface

xtsc_core

Public Types

• enum memory_port {
MEM_DRAM0P0 = 0,
MEM_DRAM0P1,
MEM_DRAM0P2,

Xtensa SystemC (XTSC) Reference Manual 251

Chapter 7. Class Documentation

MEM_DRAM0P3,
MEM_DRAM0LS0RD,
MEM_DRAM0LS1RD,
MEM_DRAM0LS2RD,
MEM_DRAM0DMARD,
MEM_DRAM0LS0WR,
MEM_DRAM0LS1WR,
MEM_DRAM0LS2WR,
MEM_DRAM0DMAWR,
MEM_DRAM0B0S00,
MEM_DRAM0B0S01,
MEM_DRAM0B0S02,
MEM_DRAM0B0S03,
MEM_DRAM0B0S04,
MEM_DRAM0B0S05,
MEM_DRAM0B0S06,
MEM_DRAM0B0S07,
MEM_DRAM0B0S08,
MEM_DRAM0B0S09,
MEM_DRAM0B0S10,
MEM_DRAM0B0S11,
MEM_DRAM0B0S12,
MEM_DRAM0B0S13,
MEM_DRAM0B0S14,
MEM_DRAM0B0S15,
MEM_DRAM0B1S00,
MEM_DRAM0B1S01,
MEM_DRAM0B1S02,
MEM_DRAM0B1S03,
MEM_DRAM0B1S04,
MEM_DRAM0B1S05,
MEM_DRAM0B1S06,
MEM_DRAM0B1S07,
MEM_DRAM0B1S08,

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MEM_DRAM0B1S09,
MEM_DRAM0B1S10,
MEM_DRAM0B1S11,
MEM_DRAM0B1S12,
MEM_DRAM0B1S13,
MEM_DRAM0B1S14,
MEM_DRAM0B1S15,
MEM_DRAM0B2S00,
MEM_DRAM0B2S01,
MEM_DRAM0B2S02,
MEM_DRAM0B2S03,
MEM_DRAM0B2S04,
MEM_DRAM0B2S05,
MEM_DRAM0B2S06,
MEM_DRAM0B2S07,
MEM_DRAM0B2S08,
MEM_DRAM0B2S09,
MEM_DRAM0B2S10,
MEM_DRAM0B2S11,
MEM_DRAM0B2S12,
MEM_DRAM0B2S13,
MEM_DRAM0B2S14,
MEM_DRAM0B2S15,
MEM_DRAM0B3S00,
MEM_DRAM0B3S01,
MEM_DRAM0B3S02,
MEM_DRAM0B3S03,
MEM_DRAM0B3S04,
MEM_DRAM0B3S05,
MEM_DRAM0B3S06,
MEM_DRAM0B3S07,
MEM_DRAM0B3S08,
MEM_DRAM0B3S09,
MEM_DRAM0B3S10,

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MEM_DRAM0B3S11,
MEM_DRAM0B3S12,
MEM_DRAM0B3S13,
MEM_DRAM0B3S14,
MEM_DRAM0B3S15,
MEM_DRAM1P0,
MEM_DRAM1P1,
MEM_DRAM1P2,
MEM_DRAM1P3,
MEM_DRAM1LS0RD,
MEM_DRAM1LS1RD,
MEM_DRAM1LS2RD,
MEM_DRAM1DMARD,
MEM_DRAM1LS0WR,
MEM_DRAM1LS1WR,
MEM_DRAM1LS2WR,
MEM_DRAM1DMAWR,
MEM_DRAM1B0S00,
MEM_DRAM1B0S01,
MEM_DRAM1B0S02,
MEM_DRAM1B0S03,
MEM_DRAM1B0S04,
MEM_DRAM1B0S05,
MEM_DRAM1B0S06,
MEM_DRAM1B0S07,
MEM_DRAM1B0S08,
MEM_DRAM1B0S09,
MEM_DRAM1B0S10,
MEM_DRAM1B0S11,
MEM_DRAM1B0S12,
MEM_DRAM1B0S13,
MEM_DRAM1B0S14,
MEM_DRAM1B0S15,
MEM_DRAM1B1S00,

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MEM_DRAM1B1S01,
MEM_DRAM1B1S02,
MEM_DRAM1B1S03,
MEM_DRAM1B1S04,
MEM_DRAM1B1S05,
MEM_DRAM1B1S06,
MEM_DRAM1B1S07,
MEM_DRAM1B1S08,
MEM_DRAM1B1S09,
MEM_DRAM1B1S10,
MEM_DRAM1B1S11,
MEM_DRAM1B1S12,
MEM_DRAM1B1S13,
MEM_DRAM1B1S14,
MEM_DRAM1B1S15,
MEM_DRAM1B2S00,
MEM_DRAM1B2S01,
MEM_DRAM1B2S02,
MEM_DRAM1B2S03,
MEM_DRAM1B2S04,
MEM_DRAM1B2S05,
MEM_DRAM1B2S06,
MEM_DRAM1B2S07,
MEM_DRAM1B2S08,
MEM_DRAM1B2S09,
MEM_DRAM1B2S10,
MEM_DRAM1B2S11,
MEM_DRAM1B2S12,
MEM_DRAM1B2S13,
MEM_DRAM1B2S14,
MEM_DRAM1B2S15,
MEM_DRAM1B3S00,
MEM_DRAM1B3S01,
MEM_DRAM1B3S02,

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MEM_DRAM1B3S03,
MEM_DRAM1B3S04,
MEM_DRAM1B3S05,
MEM_DRAM1B3S06,
MEM_DRAM1B3S07,
MEM_DRAM1B3S08,
MEM_DRAM1B3S09,
MEM_DRAM1B3S10,
MEM_DRAM1B3S11,
MEM_DRAM1B3S12,
MEM_DRAM1B3S13,
MEM_DRAM1B3S14,
MEM_DRAM1B3S15,
MEM_DROM0P0,
MEM_DROM0P1,
MEM_DROM0P2,
MEM_DROM0P3,
MEM_IRAM0,
MEM_IRAM1,
MEM_IROM0,
MEM_URAM0,
MEM_XLMI0P0,
MEM_XLMI0P1,
MEM_PIF,
MEM_IDMA0,
MEM_COUNT,
MEM_FIRST = 0,
MEM_LAST = MEM_COUNT - 1,
MEM_DRAM0_LAST_SB = MEM_DRAM0B3S15,
MEM_DRAM1_LAST_SB = MEM_DRAM1B3S15,
MEM_UNDEFINED = 0xFFFFFFFF,
MEM_DRAM0LS0 = MEM_DRAM0P0,
MEM_DRAM0LS1 = MEM_DRAM0P1,
MEM_DRAM1LS0 = MEM_DRAM1P0,

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MEM_DRAM1LS1 = MEM_DRAM1P1,
MEM_DROM0LS0 = MEM_DROM0P0,
MEM_DROM0LS1 = MEM_DROM0P1,
MEM_XLMI0LS0 = MEM_XLMI0P0,
MEM_XLMI0LS1 = MEM_XLMI0P1 }
Type used to identify a memory port on the Xtensa core.

• enum xtsc_sb_state {
XTSC_SB_PENDING = 0,
XTSC_SB_DISPATCHING = 2,
XTSC_SB_DISPATCHED = 1 }
Store buffer entry state (for internal/future use).

• typedef int(∗ simcall_callback )(xtsc_core &core, void ∗callback_arg, int arg1, int arg2,
int arg3, int arg4, int arg5, int arg6)
Simcall callback function type.

• typedef bool(∗ sim_mode_switch_callback )(xtsc_sim_mode sim_mode, void

∗callback_arg)
Simulation mode switch callback function type.

• typedef void(∗ debugger_callback )(void ∗)

Debugger callback.

Public Member Functions

• sc_core::sc_port< xtsc_request_if, NSPP > & get_request_port (const char
∗memory_port_name) const
Method to get the sc_port for binding the memory request channel from this xtsc_core
memory interface master to a memory interface slave.

• sc_core::sc_export< xtsc_respond_if > & get_respond_export (const char

∗memory_port_name) const
Method to get the sc_export for binding the memory response channel from a memory
interface slave to this xtsc_core memory interface master.

• sc_core::sc_export< xtsc_request_if > & get_request_export (const char ∗memory_-

port_name="inbound_pif") const
Method to get the inbound PIF or snoop sc_export of this xtsc_core memory interface slave
for binding the memory request channel of an external memory interface master to.

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• sc_core::sc_port< xtsc_respond_if, NSPP > & get_respond_port (const char

∗memory_port_name="inbound_pif") const
Method to get the inbound PIF or snoop sc_port of this xtsc_core memory interface slave
for binding to the memory response channel of an external memory interface master.

• sc_core::sc_port< xtsc_tx_xfer_if, NSPP > & get_tx_xfer_port () const

Method to get the sc_port for binding the output xtsc_tx_xfer_if of this xtsc_core to the
downstream xtsc_core in the TX chain or to the boot loader if this is the last/only TX in the
chain.

• sc_core::sc_export< xtsc_tx_xfer_if > & get_tx_xfer_export () const

Method to get the sc_export for binding the output xtsc_tx_xfer_if of the upstream xtsc_-
core in the TX chain or the boot loader if this is the first/only TX in the chain to the input
xtsc_tx_xfer_if of this xtsc_core.

• sc_core::sc_port< xtsc_lookup_if, NSPP > & get_lookup (const char ∗lookup_name)

const
Method to get a reference to the sc_port for the named TIE lookup.

• sc_core::sc_port< xtsc_queue_push_if, NSPP > & get_output_queue (const char

∗queue_name) const
Method to get a reference to the sc_port for the named output queue.

• sc_core::sc_port< xtsc_queue_pop_if, NSPP > & get_input_queue (const char

∗queue_name) const
Method to get a reference to the sc_port for the named input queue.

• sc_core::sc_port< xtsc_wire_read_if, NSPP > & get_import_wire (const char ∗wire_-

name) const
Method to get a reference to the sc_port for the named TIE import wire.

• sc_core::sc_port< xtsc_wire_write_if, NSPP > & get_export_state (const char

∗state_name) const
Method to get a reference to the sc_port for the named TIE export state.

• sc_core::sc_out< sc_dt::sc_bv_base > & get_output_pin (const char ∗output_pin_-

name) const
Method to get a reference to the sc_out<sc_bv_base> object for the named TIE or system
output pin.

• sc_core::sc_in< sc_dt::sc_bv_base > & get_input_pin (const char ∗input_pin_name)

const

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Method to get a reference to the sc_in<sc_bv_base> object for the named TIE or system
input pin.

• sc_core::sc_export< xtsc_wire_write_if > & get_system_input_wire (const char

∗wire_name) const
Method to get a reference to the sc_export for the named system input wire.

• sc_core::sc_port< xtsc_wire_write_if, NSPP > & get_system_output_wire (const

char ∗wire_name) const
Method to get a reference to the sc_port for the named system output wire.

• SC_HAS_PROCESS (xtsc_core)
• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

• xtsc_core (sc_core::sc_module_name module_name, const xtsc_core_parms

&core_parms)
Constructor for an xtsc_core.

• void change_clock_period (u32 clock_period_factor)

Method to change the clock period.

• u32 get_clock_period_factor () const

Method to get the clock period factor (typically 1000).

• u32 get_clock_factor () const

Method to get the clock factor (typically 1).

• virtual u32 get_bit_width (const std::string &port_name, u32 interface_num=0) const

For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

• virtual xtsc_port_table get_port_table (const std::string &port_table_name) const

For xtsc_connection_interface.

• sc_core::sc_port< xtsc_request_if, NSPP > & get_request_port (memory_port

mem_port) const

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Method to get the sc_port for binding the memory request channel from this xtsc_core
memory interface master to a memory interface slave.

• sc_core::sc_export< xtsc_respond_if > & get_respond_export (memory_port mem_-

port) const
Method to get the sc_export for binding the memory response channel from a memory
interface slave to this xtsc_core memory interface master.

• virtual void execute (const std::string &cmd_line, const std::vector< std::string >
&words, const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

• void connect (xtsc_core &core, const char ∗memory_port_name)

Connect to the inbound pif port of another xtsc_core.

• void connect (xtsc_core &core, const char ∗output_name, const char ∗input_name)
Connect an output of another xtsc_core to an input of this xtsc_core.

• void connect (xtsc_tx_loader &loader, const char ∗iface)

Connect with an upstream xtsc_tx_loader.

• void dump_filtered_request (std::ostream &os=std::cout, const std::string &memory_-

port_name="")
Dump the most recent previous xtsc_request that passed a xtsc_request watchfilter on the
specified memory_port_name (or on each memory port).

• void dump_filtered_response (std::ostream &os=std::cout, const std::string

&memory_port_name="")
Dump the most recent previous xtsc_response that passed a xtsc_response watchfilter on
the specified memory_port_name (or on each memory port).

• u32 watchfilter_add (const std::string &memory_port_name, const std::string &filter_-

name, sc_core::sc_event &event)
Add a watchfilter on peeks, pokes, requests, or responses to the specified memory port.

• void watchfilter_dump (std::ostream &os=std::cout, const std::string &memory_port_-

name="")
Dump a list of all watchfilters applied to the specified memory port (or all memory ports) of
this xtsc_core instance.

• u32 watchfilter_remove (u32 watchfilter)

Remove the specified watchfilter or all watchfilters.

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• void dump_configuration (std::ostream &os=std::cout, bool include_interfaces=true)

const
Dump a lot of information about the core configuration.

• sc_core::sc_event & get_core_exited_event () const

Get the event that will be notified when the target program of this core exits.

• sc_core::sc_event & get_breakpoint_callback_event () const

Get the event that will be notified when the target program of this core hits a breakpoint or
completes a debugger step command.

• sc_core::sc_event & get_debugger_resume_event () const

Get the event that will be notified when the attached debugger resumes execution of the
target program of this core.

• sc_core::sc_event & get_debugger_connect_event () const

Get the event that will be notified when the debugger connects to this core.

• sc_core::sc_event & get_debugger_disconnect_event () const

Get the event that will be notified when the debugger disconnects from this core.

• sc_core::sc_event & get_simcall_callback_event () const

Get the event that will be notified when the target program of this core makes a user simcall.

• int get_simcall_arg (u32 arg) const

Get the specified argument from the most recent previous user simcall.

• void set_simcall_return_value (int value)

Set the value that will be returned by the default simcall callback.

• const xtsc_core_parms & get_parms () const

This method can be used to get a constant reference to the xtsc_core_parms used to
construct this xtsc_core.

• u32 get_memory_byte_width (memory_port mem_port) const

Get data width of the specified memory interface in units of bytes.

• bool is_big_endian () const

Get whether or not core is big endian (returns false if core is little endian).

• u32 get_instantiation_number () const

Get the instantiation order number of this core.

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• simcall_callback set_simcall_callback (simcall_callback callback, void ∗callback_arg,

void ∗∗previous_arg=NULL)
Set the callback function for user simcalls.

• void set_sim_mode_switch_callback (sim_mode_switch_callback callback, void

∗callback_arg)
Set a callback function to be used when a target program requests a simulation mode
switch.

• u32 enable_debug (bool wait=true, bool synchronized=false, bool dummy=true, u32

starting_port=0)
Enable this core to be debugged by xt-gdb and Xtensa Xplorer.

• u32 setup_debug (int argc, const char ∗const ∗argv, u32 processor_-
num=0xFFFFFFFF, bool wait=true, bool synchronized=false, bool dummy=true,
u32 starting_port=0)
Setup debugging or profiling on this core based upon command line arguments.

• void set_debug_poll_interval (u32 num_cycles)

Set the debug poll interval.

• u32 get_debug_poll_interval () const

Get the debug poll interval.

• bool is_debugging_enabled () const

Returns true if debugging has been enabled on this core.

• u32 get_debugger_port () const

Get the port number that the debugger should use to communicate with this core.

• debugger_callback set_debugger_connect_callback (debugger_callback callback,

void ∗arg)
Set the callback function the simulator will call when a debugger connects to this core.

• debugger_callback set_debugger_disconnect_callback (debugger_callback callback,

void ∗arg)
Set the callback function the simulator will call when a debugger disconnects from this core.

• debugger_callback set_breakpoint_callback (debugger_callback callback, void ∗arg,

void ∗∗previous_arg=NULL)
Set the callback function the simulator will call whenever this core encounters an internal
(xt-gdb/Xtensa Xplorer) breakpoint.

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• debugger_callback set_debugger_resume_callback (debugger_callback callback,

void ∗arg)
Set the callback function the simulator will call whenever the debugger of this core starts
the core executing instructions.

• void breakpoint_interrupt ()
Cause the ISS for this core to break and pass control to its attached debugger.

• bool has_exited () const

Returns true if core program has called exit(), else returns false.

• int get_exit_code () const

Return the exit code of the core program.

• bool has_memory_port (memory_port mem_port) const

Get whether or not the specified memory port exists.

• bool has_memory_port (const char ∗memory_port_name) const

Get whether or not the named memory port exists.

• bool is_dual_ported (bool xlmi=false) const

Determine if core is dual-ported (hardware prior to RE-2012.0).

• u32 get_multi_port_count (memory_port mem_port, bool count_split_rw=true)

const
Return the number of ports the core has of the specified memory port class.

• memory_port get_nth_multi_port (memory_port mem_port, u32 n, bool interleave_-

rw=true) const
Return the memory_port enum of the nth port (0-based) of a multi-ported interface or the
only (n=0) port of a single-ported interface.

• bool has_busy (memory_port mem_port) const

Return true if the specified memory port has a busy/ready interface.

• bool get_local_memory_starting_byte_address (memory_port mem_port, xtsc_-

address &address8) const
Get whether or not the specified local memory port exists and its starting byte address.

• bool get_system_ram_starting_byte_address (xtsc_address &address8) const

Get whether or not system RAM memory exists and its starting byte address.

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• bool get_system_rom_starting_byte_address (xtsc_address &address8) const

Get whether or not system ROM memory exists and its starting byte address.

• bool get_local_memory_byte_size (memory_port mem_port, u32 &size8) const

Get whether or not the specified local memory port exists and its size in bytes.

• bool get_system_ram_byte_size (u32 &size8) const

Get whether or not system RAM memory exists and its size in bytes.

• bool get_system_rom_byte_size (u32 &size8) const

Get whether or not system ROM memory exists and its size in bytes.

• u64 get_cycle_count () const

Get the cycle count of this core’s gated clock.

• void peek_physical (xtsc_address address8, u32 size8, u8 ∗buffer)

This method is used to read memory using a physical address without disturbing the mem-
ory hardware, the processor hardware, or the bus hardware.

• void peek_virtual (xtsc_address address8, u32 size8, u8 ∗buffer)

This method is used to read memory using a virtual address without disturbing the memory
hardware, the processor hardware, or the bus hardware.

• void poke_physical (xtsc_address address8, u32 size8, const u8 ∗buffer)

This method is used to write memory using a physical address without disturbing the mem-
ory controller hardware, the processor hardware, or the bus hardware.

• void poke_virtual (xtsc_address address8, u32 size8, const u8 ∗buffer)

This method is used to write memory using a virtual address without disturbing the memory
controller hardware, the processor hardware, or the bus hardware.

• xtsc_address peek_itlb (xtsc_address address8, bool &hit)

This method peeks the ITLB to translate the virtual address to a physical address.

• xtsc_address peek_dtlb (xtsc_address address8, bool &hit)

This method peeks the DTLB to translate the virtual address to a physical address.

• xtsc_address translate_virtual (xtsc_address address8)

This method translates the specified virtual address into a physical address.

• void enable_register_tracing (bool enable)

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Assuming register tracing is setup, this method sets whether or not it is enabled.

• bool is_register_tracing_enabled () const

Return whether or not register tracing is enabled.

• void set_trigin_idma (bool high)

Assert or deassert this core’s TrigIn_iDMA signal.

• bool get_trigin_idma ()
Return whether or not this core’s TrigIn_iDMA signal is asserted.

• void set_stall (bool stall)

Set setting whether or not this core is in RunStall.

• bool get_stall ()
Return whether or not this core is in RunStall.

• void log_disassembly (bool log)

Turns logging of disassembly on or off.

• bool is_fast_functional_mode () const

Method to determine simulation mode.

• bool enable_clock (bool enable=true)

Disable or enable this core’s gated clock.

• bool is_clock_enabled ()
Returns true if this core’s gated clock is enabled; otherwise returns false.

• void step (u32 num_cycles)

Method to step one core while all other cores are disabled.

• void set_interrupt (u32 interrupt, bool set)

Set/clear the specified interrupt.

• void reset (bool hard_reset=false)

Reset the xtsc_core.

• void xfer_reset (bool reset)

Reset the XFER block of a TX core with the boot loader option.

• void revoke_fast_access ()

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Revoke all current fast access grants (TurboXim may subsequently re-request them).

• void summary (std::ostream &os=std::cout) const

Print processor execution summary.

• std::set< std::string > get_tie_interface_set () const

Get the set of TLM TIE interfaces defined for this core.

• std::set< std::string > get_lookup_set () const

Get the set of TLM TIE lookups defined for this core.

• std::set< std::string > get_input_queue_set () const

Get the set of TLM TIE input queues defined for this core.

• std::set< std::string > get_output_queue_set () const

Get the set of TLM TIE output queues defined for this core.

• std::set< std::string > get_import_wire_set () const

Get the set of TLM TIE import wires defined for this core.

• std::set< std::string > get_export_state_set () const

Get the set of TLM TIE export states defined for this core.

• std::set< std::string > get_pin_set () const

Get the set of pins defined for this core.

• std::set< std::string > get_input_pin_set () const

Get the set of input pins defined for this core.

• std::set< std::string > get_output_pin_set () const

Get the set of output pins defined for this core.

• std::set< std::string > get_pin_level_lookup_set () const

Get the set of pin-level TIE lookups defined for this core.

• std::set< std::string > get_pin_level_input_queue_set () const

Get the set of pin-level TIE input queues defined for this core.

• std::set< std::string > get_pin_level_output_queue_set () const

Get the set of pin-level TIE output queues defined for this core.

• std::set< std::string > get_pin_level_import_wire_set () const

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Get the set of pin-level TIE import wires defined for this core.

• std::set< std::string > get_pin_level_export_state_set () const

Get the set of pin-level TIE export states defined for this core.

• std::set< std::string > get_pin_level_system_input_set () const

Get the set of pin-level system inputs defined for this core.

• std::set< std::string > get_pin_level_system_output_set () const

Get the set of pin-level system outputs defined for this core.

• void dump_interface_values (const char ∗interface_name, std::ostream

&os=std::cout) const
Dump the last value (or values) crossing the named interface.

• void dump_core_interfaces_by_type (std::ostream &os=std::cout, bool include_-

memories=false) const
Dump a list of all core interfaces grouped by type.

• void dump_sysio_interfaces (std::ostream &os=std::cout) const

Dump a list of core System I/O interfaces.

• void dump_memory_interfaces (std::ostream &os=std::cout) const

Dump a list of all core memory interfaces.

• void dump_tie_interfaces (std::ostream &os=std::cout) const

Dump a list of all TLM TIE interfaces.

• void dump_tie_interfaces_by_type (std::ostream &os=std::cout) const

Dump a list of all TLM TIE interfaces grouped by type.

• void dump_lookups (std::ostream &os=std::cout) const

Dump a list of TIE lookups.

• void dump_input_queues (std::ostream &os=std::cout) const

Dump a list of TIE input queues.

• void dump_output_queues (std::ostream &os=std::cout) const

Dump a list of TIE output queues.

• void dump_import_wires (std::ostream &os=std::cout) const

Dump a list of TIE import wires.

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• void dump_export_states (std::ostream &os=std::cout) const

Dump a list of TIE export states.

• void dump_input_pins (std::ostream &os=std::cout) const

Dump a list of all input pins.

• void dump_output_pins (std::ostream &os=std::cout) const

Dump a list of all output pins.

• bool has_tie_interface (const char ∗tie_name) const

Returns true if the named TLM TIE interface exists.

• bool has_lookup (const char ∗lookup_name) const

Returns true if the named TLM TIE lookup exists.

• bool has_lookup_ready (const char ∗lookup_name) const

Returns true if the named TLM TIE lookup has a ready interface.

• bool has_input_queue (const char ∗queue_name) const

Returns true if the named TLM TIE input queue exists.

• bool has_output_queue (const char ∗queue_name) const

Returns true if the named TLM TIE output queue exists.

• bool has_import_wire (const char ∗wire_name) const

Returns true if the named TLM TIE import wire exists.

• bool has_export_state (const char ∗state_name) const

Returns true if the named TLM TIE export state exists.

• bool has_pin (const char ∗pin_name) const

Returns true if the named TIE or system input or output pin exists.

• bool has_input_pin (const char ∗input_pin_name) const

Returns true if the named TIE or system input pin exists.

• bool has_output_pin (const char ∗output_pin_name) const

Returns true if the named TIE or system output pin exists.

• u32 get_pin_bit_width (const char ∗pin_name) const

Get the width in bits of the specified pin.

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• bool has_pin_level_interface (const char ∗interface_name) const

Returns true if the named interface exists at pin-level.

• bool has_pin_level_sysio_interface (const char ∗sysio_name) const

Returns true if the named pin-level system-level input/output interface exists.

• bool has_pin_level_tie_interface (const char ∗tie_name) const

Returns true if the named pin-level TIE interface exists.

• bool has_pin_level_lookup (const char ∗lookup_name) const

Returns true if the named pin-level TIE lookup exists.

• bool has_pin_level_input_queue (const char ∗queue_name) const

Returns true if the named pin-level TIE input queue exists.

• bool has_pin_level_output_queue (const char ∗queue_name) const

Returns true if the named pin-level TIE output queue exists.

• bool has_pin_level_import_wire (const char ∗wire_name) const

Returns true if the named pin-level TIE import wire exists.

• bool has_pin_level_export_state (const char ∗state_name) const

Returns true if the named pin-level TIE export state exists.

• u32 get_tie_bit_width (const char ∗tie_name) const

Get the width in bits of the specified TLM TIE interface.

• u32 get_lookup_address_bit_width (const char ∗lookup_name) const

Get the width in bits of the specified TLM TIE lookup request address.

• u32 get_lookup_data_bit_width (const char ∗lookup_name) const

Get the width in bits of the specified TIE lookup response data.

• u32 get_lookup_latency (const char ∗lookup_name) const

Get the latency of the specified TIE lookup.

• u32 get_sysio_bit_width (const char ∗sysio_name) const

Get the width in bits of the specified system-level I/O TLM port.

• std::set< std::string > get_sysio_wire_set () const

Get the set of system-level wires defined for this core.

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• std::set< std::string > get_system_input_wire_set () const

Get the set of system-level input wires defined for this core.

• std::set< std::string > get_system_output_wire_set () const

Get the set of system-level output wires defined for this core.

• void dump_sysio_wires (std::ostream &os=std::cout) const

Dump a list of all system-level wires.

• void dump_system_input_wires (std::ostream &os=std::cout) const

Dump a list of all system-level input wires.

• void dump_system_output_wires (std::ostream &os=std::cout) const

Dump a list of all system-level output wires.

• bool has_sysio_wire (const char ∗wire_name) const

Returns true if the named system-level input or output wire exists.

• bool has_system_input_wire (const char ∗wire_name) const

Returns true if the named system-level input wire exists.

• bool has_system_output_wire (const char ∗wire_name) const

Returns true if the named system-level output wire exists.

• u64 get_summary_count (const char ∗counter_name) const

Get the value of the named ISS counter.

• u32 get_commit_stage () const

Get the number of the commit (W) stage of the pipeline.

• u32 get_last_stage () const

Get the number of the last stage of the pipeline.

• xtsc_address get_pc (u32 stage=0x80000000) const

Get the byte address of the instruction (that is, the program counter or PC) in the given
pipeline stage.

• void set_pc (xtsc_address address8)

Set the program counter (PC) to the specified address.

• u32 get_instr_width (xtsc_address pc=0xFFFFFFFF)

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Get the width (number of bytes) of the instruction pointed to by argument pc.

• u32 disassemble (std::string &buffer, xtsc_address pc=0xFFFFFFFF)

Get a disassembly of the instruction pointed to by argument pc.

• bool has_register (const std::string &register_name) const

Determine if this core has the named register.

• std::set< std::string > get_register_set () const

Get the set of names of all registers in this core (including TIE state and TIE register files
but not including the program counter).

• void get_register_value (const std::string &register_name, sc_dt::sc_unsigned

&value) const
Get the value of the named register.

• sc_dt::sc_unsigned get_register_value (const std::string &register_name) const

Get the value of the named register.

• void set_register_value (const std::string &register_name, const sc_dt::sc_unsigned

&value)
Set the value of the named register.

• std::map< std::string, sc_dt::sc_unsigned > get_all_registers () const

Get a map of all registers.

• void set_multiple_registers (const std::map< std::string, sc_dt::sc_unsigned >

&register_map)
Set multiple registers.

• void dump_all_registers (std::ostream &os=std::cout) const

Dump all registers.

• u32 get_register_bit_width (const std::string &register_name) const

Get the width in bits of the named register.

• xtsc_address get_reset_vector () const

Get the reset vector address.

• u32 get_static_vector_select () const

Get the latched value of the static vector select input.

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• void set_static_vector_select (u32 value)

Set the value of the static vector select input.

• u32 get_alt_reset_vec () const

Get the latched value of the AltResetVec input.

• void set_alt_reset_vec (xtsc_address address)

Set the value of the AltResetVec input.

• u32 get_interrupt_number (u32 binterrupt_index) const

Get the interrupt number given the BInterrupt index.

• u32 get_binterrupt_index (u32 interrupt_number) const

Get the BInterrupt index given an external interrupt number.

• void load_file (const char ∗file_name)

Load the specified file into target memory.

• void load_program (const char ∗program_name, const char ∗const

arguments[ ]=NULL)
Load the specified program into target memory.

• void load_client (const char ∗client_package)

Load the specified client to this core.

• void load_client_file (const char ∗file_name)

Load clients from a file.

• void send_client_command (const char ∗command)

Send a client command.

• u32 get_store_buffer_count (u32 ls_unit)

Get the number of committed store-buffer entries.

• bool get_store_buffer_info (u32 ls_unit, u32 sb_index, xtsc_sb_state ∗p_sb_state,

xtsc_address ∗p_address, xtsc_byte_enables ∗p_byte_enables, sc_dt::sc_unsigned
∗p_dram_attribute)
This method retrieves the information about the store-buffer entry specified by input param-
eters ls_unit and sb_index.

• bool get_stage_store_info (u32 ls_unit, u32 stage, xtsc_address ∗p_address, xtsc_-

byte_enables ∗p_byte_enables, sc_dt::sc_unsigned ∗p_dram_attribute)

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This method retrieves the information about a store operation in the pipeline specified by
input parameters ls_unit and stage.

• void set_turbo_max_relaxed_cycles (u32 cycle_limit)

Set max relaxed cycles for TurboXim.

• u32 get_turbo_max_relaxed_cycles ()
Get the max relaxed cycles for TurboXim.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

• log4xtensa::BinaryLogger & get_binary_logger ()

Get the BinaryLogger for this component (e.g. to adjust its log level).

Static Public Member Functions

• static memory_port get_memory_port (const std::string &memory_port_name)

This function returns the memory_port number corresponding to the requested memory
port name.

• static const char ∗ get_memory_port_name (memory_port port_num, bool ignore_-

multi_port=false)
This function returns a c-string name corresponding to the requested memory port type.

• static bool is_subbanked_dram0 (memory_port port_num)

Convenience method to determine whether the memory_port specified by port_num is a
subbanked DataRAM0 port type.

• static bool is_subbanked_dram1 (memory_port port_num)

Convenience method to determine whether the memory_port specified by port_num is a
subbanked DataRAM1 port type.

• static bool is_subbanked_dram (memory_port port_num)

Convenience method to determine whether the memory_port specified by port_num is a
subbanked DataRAM port type.

• static bool is_ls_dual_port (memory_port port_num, u32 ls_unit)

Convenience method to determine whether the memory_port specified by port_num is a
dual-type port served by the specified LD/ST unit.

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• static void dump_status (std::ostream &os=std::cout, const std::vector< xtsc_core ∗

> &cores=get_all_cores())
This method dumps the status of all cores in a vector of cores.

• static bool set_stop_after_all_cores_exit (bool stop)

Set the flag that determines whether similation will be stopped (via a call to the SystemC
sc_stop() method) after the target program on the last running core (that has "SimNeverEx-
its" set to false--the default) exits.

• static bool get_stop_after_all_cores_exit ()

Return the flag that determines whether similation will be stopped (via a call to the SystemC
sc_stop method) after the target program on the last running core (that has "SimNeverExits"
set to false--the default) exits.

• static sc_core::sc_event & get_all_cores_exited_event ()

Get the event that will be notified immediately after the target program on the last running
core (that has "SimNeverExits" set to false--the default) exits.

• static void enable_cores (bool enable=true, const std::vector< xtsc_core ∗ >

&cores=get_all_cores())
This method enables or disables all xtsc_core objects in the specified set of cores.

• static u32 setup_multicore_debug (int argc, const char ∗const ∗argv, u32 processor_-
num=0, bool wait=true, bool synchronized=false, bool dummy=true, u32 starting_-
port=0, std::vector< xtsc_core ∗ > cores=get_all_cores())
Setup debugging or profiling on all cores in a list based upon command line arguments.

• static bool is_debugging_synchronized ()

Returns true if synchronized debugging has been enabled.

• static bool have_all_cores_exited (const std::vector< xtsc_core ∗ > &cores=get_all_-

cores())
This method returns true if all cores in a vector of cores have exited; otherwise it returns
false.

• static bool is_xlmi (memory_port mem_port)

Return true if mem_port is MEM_XLMI0P0 or MEM_XLMI0P1.

• static bool is_split_read (memory_port mem_port)

Return true if mem_port is one of MEM_DRAM0LS0RD, MEM_DRAM0LS1RD, MEM_-
DRAM0LS2RD, MEM_DRAM0DMARD, MEM_DRAM1LS0RD, MEM_DRAM1LS1RD,
MEM_DRAM1LS2RD, or MEM_DRAM1DMARD.

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• static bool is_split_write (memory_port mem_port)

Return true if mem_port is one of MEM_DRAM0LS0WR, MEM_DRAM0LS1WR, MEM_-
DRAM0LS2WR, MEM_DRAM0DMAWR, MEM_DRAM1LS0WR, MEM_DRAM1LS1WR,
MEM_DRAM1LS2WR, or MEM_DRAM1DMAWR.

• static bool is_split_read_write (memory_port mem_port)

Return true if is_split_read() or is_split_write() is true.

• static bool is_multi_port_zero (memory_port mem_port)

Return true if mem_port is a single-ported interface or if it is the first port of a multi-ported
interface.

• static memory_port get_multi_port_zero (memory_port mem_port)

Return the zeroeth memory port of the specified memory port.

• static std::vector< xtsc_core ∗ > get_all_cores ()

Get a vector of all cores in the system.

• static void set_clock_phase_delta_factors (u32 pdf_a, u32 pdf_b, u32 pdf_c)

Set the relative timing of the 3 clock phases (A, B, and C) for all cores.

• static void get_clock_phase_delta_factors (u32 &pdf_a, u32 &pdf_b, u32 &pdf_c)

Get the relative timing of the 3 clock phases (A, B, and C) for all cores.

Public Attributes
• Readme How_to_do_port_binding
Instructions for doing port binding in XTSC.

• Readme How_to_do_memory_port_binding
Instructions for doing memory port binding.

• Readme How_to_do_tx_xfer_port_binding
Instructions for doing XFER port binding (the BootLoader interface).

• Readme How_to_do_tie_lookup_binding
Instructions for doing TIE lookup port binding.

• Readme How_to_do_tie_queue_binding
Instructions for doing TIE queue port binding.

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• Readme How_to_do_tie_import_wire_binding
Instructions for doing TIE import wire port binding.

• Readme How_to_do_tie_export_state_binding
Instructions for doing TIE export state port binding.

• Readme How_to_do_output_pin_binding
Instructions for doing output pin binding (Pin-level).

• Readme How_to_do_input_pin_binding
Instructions for doing input pin binding (Pin-level).

• Readme How_to_do_system_input_wire_binding
Instructions for doing system input wire port binding (TLM).

• Readme How_to_do_system_output_wire_binding
Instructions for doing system output wire port binding.

• Readme Information_on_memory_interface_protocols
Information on memory interface protocols.

Static Public Attributes

• static const int MEM_SPLIT_WR_DELTA = MEM_DRAM0LS0WR - MEM_-
DRAM0LS0RD
• static const int MEM_SPLIT_DMA_DELTA = MEM_DRAM0DMARD - MEM_-
DRAM0LS0RD
• static const int MEM_SUBBANK_DELTA = MEM_DRAM0B1S00 - MEM_-
DRAM0B0S00

Private Member Functions

• void inbound_pif_response_thread ()
Thread to send out inbound PIF response.

• void snoop_response_thread ()
Thread to send out snoop response [Reserved for future use].

• void exit_thread ()
Thread to detect when core program exits.

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• void before_end_of_elaboration ()
Miscellaneous housekeeping before elaboration ends.

• void end_of_elaboration ()
Miscellaneous housekeeping after elaboration ends.

• void start_of_simulation ()
Miscellaneous housekeeping before simulation starts.

Private Attributes
• log4xtensa::TextLogger & m_text
For logging text messages.

• log4xtensa::BinaryLogger & m_binary

Our logging binary messages.

• bool m_log_data_binary
True if transaction data should be logged by m_binary.

• xtsc_core_parts & m_p

Internal parts.

Friends
• class xtsc_core_intf
• class xtsc_core_parts
• class xtsc_tie_lookup_driver
• class xtsc_output_queue_driver
• class xtsc_input_queue_driver

7.51.1 Detailed Description

A Tensilica core Instruction Set Simulator (ISS). This class encapsulates an Xtensa core
Instruction Set Simulator (ISS) as a SystemC module. It can be operated in cycle-accurate
mode (the default) or in instruction- accurate (TurboXim) mode, or a combination of both. It
includes methods for such things as loading the core’s program, loading simulation clients,

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probing the core’s state, querying the core’s construction parameters, and setting up the
core for debugger control.
It also includes methods to allow TLM-level (Transaction Level Model/Modeling) port bind-
ing to take place to all the local memory ports, the PIF/iDMA, all user- defined TIE inter-
faces (lookups, input queues, output queues, import wires, and export states) and certain
system-level inputs and outputs. Due to the configurable nature of the Xtensa core inter-
face, the port binding is done somewhat differently than for a typical SystemC module. See
the documentation comments associated with the "How_to_do_..." dummy Readme vari-
ables for information on port binding with each of the various Xtensa interfaces (memory
ports, system-level I/O, and TIE interfaces).
For information pertaining to memory interface request/response protocols, see the doc-
umentation comments associated with the Information_on_memory_interface_protocols
dummy Readme variable.
Here is a block diagram of the TLM ports of an xtsc_core:

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(core.get_request_export("inbound_pif"))

xtsc_request_if
xtsc_master master

core.get_respond_port("inbound_pif")

xtsc_respond_if

core.get_request_port("pif")

xtsc_request_if
xtsc_memory mem_pif

(core.get_respond_export("pif"))

xtsc_respond_if

core.get_output_queue("OUTQ1")

xtsc_queue_push_if
xtsc_queue queue

core.get_input_queue("INQ1")

xtsc_queue_pop_if
xtsc_core core0

core.get_lookup("lut")

xtsc_lookup_if
xtsc_lookup lut

core.get_export_state("status")

xtsc_wire_write_if
xtsc_wire wire

core.get_import_wire("control")

xtsc_wire_read_if

core.get_output_wire("PWaitMode")

xtsc_wire_write_if
xtsc_wire wire

(core.get_input_wire("BReset"))

xtsc_wire_write_if
xtsc_wire_source BReset

Figure 7.2: xtsc_core

See also:
How_to_do_port_binding
Information_on_memory_interface_protocols

Definition at line 1030 of file xtsc_core.h.

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7.51.2 Member Typedef Documentation

7.51.2.1 typedef int(∗ simcall_callback)(xtsc_core &core, void ∗callback_arg, int

arg1, int arg2, int arg3, int arg4, int arg5, int arg6)

Simcall callback function type. A function of this type can be registered with the core to
receive simcall callbacks generated by the target program executing on the core.

Parameters:
core A reference to the xtsc_core whose target program executed the simcall.
callback_arg The value passed in to set_simcall_callback.
arg1 The 1st argument of the target simcall.
arg2 The 2nd argument of the target simcall.
arg3 The 3rd argument of the target simcall.
arg4 The 4th argument of the target simcall.
arg5 The 5th argument of the target simcall.
arg6 The 6th argument of the target simcall.

See also:
set_simcall_callback

Definition at line 3419 of file xtsc_core.h.

7.51.2.2 typedef bool(∗ sim_mode_switch_callback)(xtsc_sim_mode sim_mode,

void ∗callback_arg)

Simulation mode switch callback function type. A function of this type can be registered
with the core to be called whenever the target program executing on the core requests a
simulation mode switch between cycle-accurate and TurboXim fast functional.

Parameters:
sim_mode The simulation mode to switch to.
callback_arg The value passed in to set_sim_mode_switch_callback.

Returns:
true if sim_mode is the current mode, else returns false.

See also:
set_sim_mode_switch_callback

Definition at line 3486 of file xtsc_core.h.

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7.51.3 Member Enumeration Documentation

7.51.3.1 enum memory_port

Type used to identify a memory port on the Xtensa core. Note: By contract:

- LS1 ports are always 1 greater than LS0 ports.

- LS2 ports are always 1 greater than LS1 ports.
- Similarly for P3, P2, P1, and P0 ports.
- Subbanks of a bank always have consecutively numbered enum values.
- Corresponding subbanks of adjacent banks are always separated in enum value
by MEM_SUBBANK_DELTA (whose value may change in future releases).
- For split R/W ports the write port (MEM_DR*M*WR) is always
MEM_SPLIT_WR_DELTA greater then its corresponding read port (MEM_DR*M*RD).

Enumerator:
MEM_DRAM0P0 Data RAM 0 Bank 0 or L/S 0.
MEM_DRAM0P1 Data RAM 0 Bank 1 or L/S 1.
MEM_DRAM0P2 Data RAM 0 Bank 2.
MEM_DRAM0P3 Data RAM 0 Bank 3.
MEM_DRAM0LS0RD Data RAM 0 L/S 0 Read port.
MEM_DRAM0LS1RD Data RAM 0 L/S 1 Read port.
MEM_DRAM0LS2RD Data RAM 0 L/S 2 Read port.
MEM_DRAM0DMARD Data RAM 0 DMA Read port.
MEM_DRAM0LS0WR Data RAM 0 L/S 0 Write port.
MEM_DRAM0LS1WR Data RAM 0 L/S 1 Write port.
MEM_DRAM0LS2WR Data RAM 0 L/S 2 Write port.
MEM_DRAM0DMAWR Data RAM 0 DMA Write port.
MEM_DRAM0B0S00 Data RAM 0 Bank 0 SubBank 0.
MEM_DRAM0B0S01 Data RAM 0 Bank 0 SubBank 1.
MEM_DRAM0B0S02 Data RAM 0 Bank 0 SubBank 2.
MEM_DRAM0B0S03 Data RAM 0 Bank 0 SubBank 3.
MEM_DRAM0B0S04 Data RAM 0 Bank 0 SubBank 4.
MEM_DRAM0B0S05 Data RAM 0 Bank 0 SubBank 5.
MEM_DRAM0B0S06 Data RAM 0 Bank 0 SubBank 6.
MEM_DRAM0B0S07 Data RAM 0 Bank 0 SubBank 7.
MEM_DRAM0B0S08 Data RAM 0 Bank 0 SubBank 8.
MEM_DRAM0B0S09 Data RAM 0 Bank 0 SubBank 9.

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MEM_DRAM0B0S10 Data RAM 0 Bank 0 SubBank 10.

MEM_DRAM0B0S11 Data RAM 0 Bank 0 SubBank 11.
MEM_DRAM0B0S12 Data RAM 0 Bank 0 SubBank 12.
MEM_DRAM0B0S13 Data RAM 0 Bank 0 SubBank 13.
MEM_DRAM0B0S14 Data RAM 0 Bank 0 SubBank 14.
MEM_DRAM0B0S15 Data RAM 0 Bank 0 SubBank 15.
MEM_DRAM0B1S00 Data RAM 0 Bank 1 SubBank 0.
MEM_DRAM0B1S01 Data RAM 0 Bank 1 SubBank 1.
MEM_DRAM0B1S02 Data RAM 0 Bank 1 SubBank 2.
MEM_DRAM0B1S03 Data RAM 0 Bank 1 SubBank 3.
MEM_DRAM0B1S04 Data RAM 0 Bank 1 SubBank 4.
MEM_DRAM0B1S05 Data RAM 0 Bank 1 SubBank 5.
MEM_DRAM0B1S06 Data RAM 0 Bank 1 SubBank 6.
MEM_DRAM0B1S07 Data RAM 0 Bank 1 SubBank 7.
MEM_DRAM0B1S08 Data RAM 0 Bank 1 SubBank 8.
MEM_DRAM0B1S09 Data RAM 0 Bank 1 SubBank 9.
MEM_DRAM0B1S10 Data RAM 0 Bank 1 SubBank 10.
MEM_DRAM0B1S11 Data RAM 0 Bank 1 SubBank 11.
MEM_DRAM0B1S12 Data RAM 0 Bank 1 SubBank 12.
MEM_DRAM0B1S13 Data RAM 0 Bank 1 SubBank 13.
MEM_DRAM0B1S14 Data RAM 0 Bank 1 SubBank 14.
MEM_DRAM0B1S15 Data RAM 0 Bank 1 SubBank 15.
MEM_DRAM0B2S00 Data RAM 0 Bank 2 SubBank 0.
MEM_DRAM0B2S01 Data RAM 0 Bank 2 SubBank 1.
MEM_DRAM0B2S02 Data RAM 0 Bank 2 SubBank 2.
MEM_DRAM0B2S03 Data RAM 0 Bank 2 SubBank 3.
MEM_DRAM0B2S04 Data RAM 0 Bank 2 SubBank 4.
MEM_DRAM0B2S05 Data RAM 0 Bank 2 SubBank 5.
MEM_DRAM0B2S06 Data RAM 0 Bank 2 SubBank 6.
MEM_DRAM0B2S07 Data RAM 0 Bank 2 SubBank 7.
MEM_DRAM0B2S08 Data RAM 0 Bank 2 SubBank 8.
MEM_DRAM0B2S09 Data RAM 0 Bank 2 SubBank 9.
MEM_DRAM0B2S10 Data RAM 0 Bank 2 SubBank 10.
MEM_DRAM0B2S11 Data RAM 0 Bank 2 SubBank 11.

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MEM_DRAM0B2S12 Data RAM 0 Bank 2 SubBank 12.

MEM_DRAM0B2S13 Data RAM 0 Bank 2 SubBank 13.
MEM_DRAM0B2S14 Data RAM 0 Bank 2 SubBank 14.
MEM_DRAM0B2S15 Data RAM 0 Bank 2 SubBank 15.
MEM_DRAM0B3S00 Data RAM 0 Bank 3 SubBank 0.
MEM_DRAM0B3S01 Data RAM 0 Bank 3 SubBank 1.
MEM_DRAM0B3S02 Data RAM 0 Bank 3 SubBank 2.
MEM_DRAM0B3S03 Data RAM 0 Bank 3 SubBank 3.
MEM_DRAM0B3S04 Data RAM 0 Bank 3 SubBank 4.
MEM_DRAM0B3S05 Data RAM 0 Bank 3 SubBank 5.
MEM_DRAM0B3S06 Data RAM 0 Bank 3 SubBank 6.
MEM_DRAM0B3S07 Data RAM 0 Bank 3 SubBank 7.
MEM_DRAM0B3S08 Data RAM 0 Bank 3 SubBank 8.
MEM_DRAM0B3S09 Data RAM 0 Bank 3 SubBank 9.
MEM_DRAM0B3S10 Data RAM 0 Bank 3 SubBank 10.
MEM_DRAM0B3S11 Data RAM 0 Bank 3 SubBank 11.
MEM_DRAM0B3S12 Data RAM 0 Bank 3 SubBank 12.
MEM_DRAM0B3S13 Data RAM 0 Bank 3 SubBank 13.
MEM_DRAM0B3S14 Data RAM 0 Bank 3 SubBank 14.
MEM_DRAM0B3S15 Data RAM 0 Bank 3 SubBank 15.
MEM_DRAM1P0 Data RAM 1 Bank 0 or L/S 0.
MEM_DRAM1P1 Data RAM 1 Bank 1 or L/S 1.
MEM_DRAM1P2 Data RAM 1 Bank 2.
MEM_DRAM1P3 Data RAM 1 Bank 3.
MEM_DRAM1LS0RD Data RAM 1 L/S 0 Read port.
MEM_DRAM1LS1RD Data RAM 1 L/S 1 Read port.
MEM_DRAM1LS2RD Data RAM 1 L/S 2 Read port.
MEM_DRAM1DMARD Data RAM 1 DMA Read port.
MEM_DRAM1LS0WR Data RAM 1 L/S 0 Write port.
MEM_DRAM1LS1WR Data RAM 1 L/S 1 Write port.
MEM_DRAM1LS2WR Data RAM 1 L/S 2 Write port.
MEM_DRAM1DMAWR Data RAM 1 DMA Write port.
MEM_DRAM1B0S00 Data RAM 1 Bank 0 SubBank 0.
MEM_DRAM1B0S01 Data RAM 1 Bank 0 SubBank 1.

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MEM_DRAM1B0S02 Data RAM 1 Bank 0 SubBank 2.

MEM_DRAM1B0S03 Data RAM 1 Bank 0 SubBank 3.
MEM_DRAM1B0S04 Data RAM 1 Bank 0 SubBank 4.
MEM_DRAM1B0S05 Data RAM 1 Bank 0 SubBank 5.
MEM_DRAM1B0S06 Data RAM 1 Bank 0 SubBank 6.
MEM_DRAM1B0S07 Data RAM 1 Bank 0 SubBank 7.
MEM_DRAM1B0S08 Data RAM 1 Bank 0 SubBank 8.
MEM_DRAM1B0S09 Data RAM 1 Bank 0 SubBank 9.
MEM_DRAM1B0S10 Data RAM 1 Bank 0 SubBank 10.
MEM_DRAM1B0S11 Data RAM 1 Bank 0 SubBank 11.
MEM_DRAM1B0S12 Data RAM 1 Bank 0 SubBank 12.
MEM_DRAM1B0S13 Data RAM 1 Bank 0 SubBank 13.
MEM_DRAM1B0S14 Data RAM 1 Bank 0 SubBank 14.
MEM_DRAM1B0S15 Data RAM 1 Bank 0 SubBank 15.
MEM_DRAM1B1S00 Data RAM 1 Bank 1 SubBank 0.
MEM_DRAM1B1S01 Data RAM 1 Bank 1 SubBank 1.
MEM_DRAM1B1S02 Data RAM 1 Bank 1 SubBank 2.
MEM_DRAM1B1S03 Data RAM 1 Bank 1 SubBank 3.
MEM_DRAM1B1S04 Data RAM 1 Bank 1 SubBank 4.
MEM_DRAM1B1S05 Data RAM 1 Bank 1 SubBank 5.
MEM_DRAM1B1S06 Data RAM 1 Bank 1 SubBank 6.
MEM_DRAM1B1S07 Data RAM 1 Bank 1 SubBank 7.
MEM_DRAM1B1S08 Data RAM 1 Bank 1 SubBank 8.
MEM_DRAM1B1S09 Data RAM 1 Bank 1 SubBank 9.
MEM_DRAM1B1S10 Data RAM 1 Bank 1 SubBank 10.
MEM_DRAM1B1S11 Data RAM 1 Bank 1 SubBank 11.
MEM_DRAM1B1S12 Data RAM 1 Bank 1 SubBank 12.
MEM_DRAM1B1S13 Data RAM 1 Bank 1 SubBank 13.
MEM_DRAM1B1S14 Data RAM 1 Bank 1 SubBank 14.
MEM_DRAM1B1S15 Data RAM 1 Bank 1 SubBank 15.
MEM_DRAM1B2S00 Data RAM 1 Bank 2 SubBank 0.
MEM_DRAM1B2S01 Data RAM 1 Bank 2 SubBank 1.
MEM_DRAM1B2S02 Data RAM 1 Bank 2 SubBank 2.
MEM_DRAM1B2S03 Data RAM 1 Bank 2 SubBank 3.

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MEM_DRAM1B2S04 Data RAM 1 Bank 2 SubBank 4.

MEM_DRAM1B2S05 Data RAM 1 Bank 2 SubBank 5.
MEM_DRAM1B2S06 Data RAM 1 Bank 2 SubBank 6.
MEM_DRAM1B2S07 Data RAM 1 Bank 2 SubBank 7.
MEM_DRAM1B2S08 Data RAM 1 Bank 2 SubBank 8.
MEM_DRAM1B2S09 Data RAM 1 Bank 2 SubBank 9.
MEM_DRAM1B2S10 Data RAM 1 Bank 2 SubBank 10.
MEM_DRAM1B2S11 Data RAM 1 Bank 2 SubBank 11.
MEM_DRAM1B2S12 Data RAM 1 Bank 2 SubBank 12.
MEM_DRAM1B2S13 Data RAM 1 Bank 2 SubBank 13.
MEM_DRAM1B2S14 Data RAM 1 Bank 2 SubBank 14.
MEM_DRAM1B2S15 Data RAM 1 Bank 2 SubBank 15.
MEM_DRAM1B3S00 Data RAM 1 Bank 3 SubBank 0.
MEM_DRAM1B3S01 Data RAM 1 Bank 3 SubBank 1.
MEM_DRAM1B3S02 Data RAM 1 Bank 3 SubBank 2.
MEM_DRAM1B3S03 Data RAM 1 Bank 3 SubBank 3.
MEM_DRAM1B3S04 Data RAM 1 Bank 3 SubBank 4.
MEM_DRAM1B3S05 Data RAM 1 Bank 3 SubBank 5.
MEM_DRAM1B3S06 Data RAM 1 Bank 3 SubBank 6.
MEM_DRAM1B3S07 Data RAM 1 Bank 3 SubBank 7.
MEM_DRAM1B3S08 Data RAM 1 Bank 3 SubBank 8.
MEM_DRAM1B3S09 Data RAM 1 Bank 3 SubBank 9.
MEM_DRAM1B3S10 Data RAM 1 Bank 3 SubBank 10.
MEM_DRAM1B3S11 Data RAM 1 Bank 3 SubBank 11.
MEM_DRAM1B3S12 Data RAM 1 Bank 3 SubBank 12.
MEM_DRAM1B3S13 Data RAM 1 Bank 3 SubBank 13.
MEM_DRAM1B3S14 Data RAM 1 Bank 3 SubBank 14.
MEM_DRAM1B3S15 Data RAM 1 Bank 3 SubBank 15.
MEM_DROM0P0 Data ROM Bank 0 or L/S 0.
MEM_DROM0P1 Data ROM Bank 1 or L/S 1.
MEM_DROM0P2 Data ROM Bank 2 or L/S 2.
MEM_DROM0P3 Data ROM Bank 3.
MEM_IRAM0 Instruction RAM 0.
MEM_IRAM1 Instruction RAM 1.

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MEM_IROM0 Instruction ROM.

MEM_URAM0 Unified RAM.
MEM_XLMI0P0 XLMI memory/device L/S 0.
MEM_XLMI0P1 XLMI memory/device L/S 1.
MEM_PIF PIF.
MEM_IDMA0 iDMA

Definition at line 2480 of file xtsc_core.h.

7.51.3.2 enum xtsc_sb_state

Store buffer entry state (for internal/future use).

Enumerator:
XTSC_SB_PENDING Store buffer entry pending.
XTSC_SB_DISPATCHING Store buffer entry dispatching.
XTSC_SB_DISPATCHED Store buffer entry dispatched.

Definition at line 5650 of file xtsc_core.h.

7.51.4 Constructor & Destructor Documentation

7.51.4.1 xtsc_core (sc_core::sc_module_name module_name, const

xtsc_core_parms & core_parms)

Constructor for an xtsc_core.

Parameters:
module_name Name of the xtsc_core sc_module.
core_parms The configuration parameters.

See also:
xtsc_core_parms

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7.51.5 Member Function Documentation

7.51.5.1 sc_core::sc_port<xtsc_request_if, NSPP>& get_request_port (const char

∗ memory_port_name) const

Method to get the sc_port for binding the memory request channel from this xtsc_core
memory interface master to a memory interface slave.

Parameters:
memory_port_name The memory port name (case-insensitive).

See also:
How_to_do_memory_port_binding for more information and for a list of valid memory
port names.

7.51.5.2 sc_core::sc_export<xtsc_respond_if>& get_respond_export (const char

∗ memory_port_name) const

Method to get the sc_export for binding the memory response channel from a memory
interface slave to this xtsc_core memory interface master.

Parameters:
memory_port_name The memory port name (case-insensitive).

See also:
How_to_do_memory_port_binding for more information and for a list of valid memory
port names.

7.51.5.3 sc_core::sc_export<xtsc_request_if>& get_request_export (const char ∗

memory_port_name = "inbound_pif") const

Method to get the inbound PIF or snoop sc_export of this xtsc_core memory interface slave
for binding the memory request channel of an external memory interface master to.

Parameters:
memory_port_name One of "inbound_pif" or "snoop".

Note: The snoop port reserved for future use.

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See also:
How_to_do_memory_port_binding

7.51.5.4 sc_core::sc_port<xtsc_respond_if, NSPP>& get_respond_port (const

char ∗ memory_port_name = "inbound_pif") const

Method to get the inbound PIF or snoop sc_port of this xtsc_core memory interface slave
for binding to the memory response channel of an external memory interface master.

Parameters:
memory_port_name One of "inbound_pif" or "snoop".

Note: The snoop port reserved for future use.

See also:
How_to_do_memory_port_binding

7.51.5.5 sc_core::sc_port<xtsc_tx_xfer_if, NSPP>& get_tx_xfer_port () const

Method to get the sc_port for binding the output xtsc_tx_xfer_if of this xtsc_core to the
downstream xtsc_core in the TX chain or to the boot loader if this is the last/only TX in the
chain.

Exceptions:

xtsc_exception if xtsc_core_parms "BootLoader" is false

See also:
How_to_do_tx_xfer_port_binding

7.51.5.6 sc_core::sc_export<xtsc_tx_xfer_if>& get_tx_xfer_export () const

Method to get the sc_export for binding the output xtsc_tx_xfer_if of the upstream xtsc_-
core in the TX chain or the boot loader if this is the first/only TX in the chain to the input
xtsc_tx_xfer_if of this xtsc_core.

Exceptions:

xtsc_exception if xtsc_core_parms "BootLoader" is false

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See also:
How_to_do_tx_xfer_port_binding

7.51.5.7 sc_core::sc_port<xtsc_lookup_if, NSPP>& get_lookup (const char ∗

lookup_name) const

Method to get a reference to the sc_port for the named TIE lookup.

Parameters:
lookup_name The lookup name should be the name provided after the "lookup" key-
word of the user TIE file. Specifically, lookup_name should not include the "TIE_"
prefix or any of the suffixes ("_Out", "_In", "_Out_Req", or "_Rdy").

See also:
How_to_do_tie_lookup_binding

7.51.5.8 sc_core::sc_port<xtsc_queue_push_if, NSPP>& get_output_queue

(const char ∗ queue_name) const

Method to get a reference to the sc_port for the named output queue.

Parameters:
queue_name The queue_name should be the base queue name as provided after
the "queue" keyword of the user TIE file. Specifically, queue_name should not
include the "TIE_" prefix or any of the suffixes ("_Empty", "_PopReq", "_Full", or
"_PushReq").

See also:
How_to_do_tie_queue_binding

7.51.5.9 sc_core::sc_port<xtsc_queue_pop_if, NSPP>& get_input_queue (const

char ∗ queue_name) const

Method to get a reference to the sc_port for the named input queue.

Parameters:
queue_name The queue_name should be the base queue name as provided after
the "queue" keyword of the user TIE file. Specifically, queue_name should not

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include the "TIE_" prefix or any of the suffixes ("_Empty", "_PopReq", "_Full", or
"_PushReq").

See also:
How_to_do_tie_queue_binding

7.51.5.10 sc_core::sc_port<xtsc_wire_read_if, NSPP>& get_import_wire (const

char ∗ wire_name) const

Method to get a reference to the sc_port for the named TIE import wire.

Parameters:
wire_name The base import wire name as provided after the "import_wire" keyword
of the user TIE file. Specifically, wire_name should not include the "TIE_" prefix.

See also:
How_to_do_tie_import_wire_binding

7.51.5.11 sc_core::sc_port<xtsc_wire_write_if, NSPP>& get_export_state (const

char ∗ state_name) const

Method to get a reference to the sc_port for the named TIE export state.

Parameters:
state_name The base state name as provided after the "state" keyword of the user
TIE file. Specifically, state_name should not include the "TIE_" prefix.

See also:
How_to_do_tie_export_state_binding

7.51.5.12 sc_core::sc_out<sc_dt::sc_bv_base>& get_output_pin (const char ∗

output_pin_name) const

Method to get a reference to the sc_out<sc_bv_base> object for the named TIE or system
output pin.

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Parameters:
output_pin_name For TIE output pins, this is the Verilog name as generated by the
TIE compiler. This name always begins with the "TIE_" prefix and, for TIE lookups
and queues, has the suffixes specified in the TIE Reference Manual. For sys-
tem output pins, this is the name as specified in the Xtensa microprocessor data
book. The TIE construct name (the name without the "TIE_" prefix and without
the signal-specific suffix) or the system output name must have been specified in
the xtsc_core_parms "SimPinLevelInterfaces" parameters.

See also:
How_to_do_output_pin_binding;

7.51.5.13 sc_core::sc_in<sc_dt::sc_bv_base>& get_input_pin (const char ∗

input_pin_name) const

Method to get a reference to the sc_in<sc_bv_base> object for the named TIE or system
input pin.

Parameters:
input_pin_name For TIE input pins, this is the Verilog name as generated by the TIE
compiler. This name always begins with the "TIE_" prefix and, for TIE lookups and
queues, has the suffixes specified in the TIE Reference Manual. For system input
pins, this is the name as specified in the Xtensa microprocessor data book. The
TIE construct name (the name without the "TIE_" prefix and without the signal-
specific suffix) or the system input name must have been specified in the xtsc_-
core_parms "SimPinLevelInterfaces" parameters.

See also:
How_to_do_input_pin_binding;

7.51.5.14 sc_core::sc_export<xtsc_wire_write_if>& get_system_input_wire

(const char ∗ wire_name) const

Method to get a reference to the sc_export for the named system input wire.

Parameters:
wire_name The system input name as it appears in the Xtensa microprocessor data
book. The possible input wire names are:

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"AltResetVec"
"BInterrupt"
"BReset"
"PRID"
"RunStall"
"StatVectorSel"
"TrigIn_iDMA"
"XferReset"

Note: The initial value of the PRID register can be set using the "ProcessorID" parameter
of xtsc_core_parms.
Note: In addition to the composite "BInterrupt" wire, the interrupt wires are available indi-
vidually as "BInterrupt00", "BInterrupt01", and so on (the last 2 digits of the name are the
decimal value of the BInterrupt index).

See also:
How_to_do_system_input_wire_binding

7.51.5.15 sc_core::sc_port<xtsc_wire_write_if, NSPP>& get_system_output_wire

(const char ∗ wire_name) const

Method to get a reference to the sc_port for the named system output wire.

Parameters:
wire_name The system output wire name as it appears in the Xtensa microprocessor
data book. The possible system output wire names are:
"CoreStatus" (TX only)
"CoreHalted" (TX only)
"DmaHighPriority"
"PArithmeticException"
"PWaitMode"
"TrigOut_iDMA"

Note: The DmaHighPriority output exists but is never driven as a TLM output. Instead, for
TLM modelling use xtsc::xtsc_request::get_priority(). The output is driven, however, when
modelled at pin-level (see "SimPinLevelInterfaces" in xtsc_core_parms).

See also:
How_to_do_system_output_wire_binding

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7.51.5.16 void change_clock_period (u32 clock_period_factor)

Method to change the clock period.

Parameters:
clock_period_factor Specifies the new length of this core’s clock period expressed
in terms of the SystemC time resolution (from sc_get_time_resolution()). The
clock_period_factor must be an integer multiple of the XTSC system clock factor
so that the resulting clock period will be an integer multiple of the XTSC system
clock period.

Note: Changing the clock period of a module should generally only be attempted when
that module is quiescent (for example, when a core is in waiti). Changing the clock period
while a core has a TIE lookup pending or is receiving a sequence of either BLOCK_-
READ responses on its PIF/iDMA interface or BLOCK_WRITE requests on its inbound PIF
interface can potentially cause simulation failures.
Note: Changing the clock period is not supported for SystemC-Verilog cosimulation.
Note: Because of these issues, changing the clock period is a feature which must be ex-
plicitly enabled by setting the "enable_dynamic_clock_period" parameter of xtsc_initialize_-
parms to true.

See also:
xtsc_get_system_clock_factor
xtsc_get_system_clock_period
the xtsc_initialize_parms parameter "enable_dynamic_clock_period"

7.51.5.17 u32 get_clock_period_factor () const

Method to get the clock period factor (typically 1000). If change_clock_period() has been
called, then this method returns the value of the argument of the most recent previous call
to change_clock_period(). Otherwise, it returns a value equal to the value set by xtsc_-
core_parms "SimClockFactor" multiplied by the value returned by the xtsc_get_system_-
clock_factor() function.

See also:
change_clock_period
get_clock_factor
xtsc_get_system_clock_factor

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7.51.5.18 u32 get_clock_factor () const

Method to get the clock factor (typically 1). If change_clock_period() has been called,
then this method returns a value equal to the argument of the most recent previous call
to change_clock_period() divided by the value returned by the xtsc_get_system_clock_-
factor() function. Otherwise, it returns the value set by xtsc_core_parms "SimClockFactor".

See also:
change_clock_period
get_clock_period_factor
xtsc_get_system_clock_factor

7.51.5.19 static memory_port get_memory_port (const std::string &

memory_port_name) [static]

This function returns the memory_port number corresponding to the requested memory
port name.

Parameters:
memory_port_name The name of the memory port.

See also:
How_to_do_memory_port_binding for a list of valid names.

7.51.5.20 static const char∗ get_memory_port_name (memory_port port_num,

bool ignore_multi_port = false) [static]

This function returns a c-string name corresponding to the requested memory port type.

Parameters:
port_num The port number whose name is desired.
ignore_multi_port If false the LD/ST unit or bank (and subbank), if any, are included
as part of the returned name (e.g. "dram0p0" or "dram0ls0rd" or "dram0b0s00").
If true, the LD/ST unit or bank (and subbank) do not appear in the returned name
(e.g. "dram0" or "dram0rw" or "dram0bs", respectively).

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7.51.5.21 static bool is_subbanked_dram0 (memory_port port_num) [static]

Convenience method to determine whether the memory_port specified by port_num is a

subbanked DataRAM0 port type.

Parameters:
port_num The memory_port number of interest

Returns:
true if (port_num is between MEM_DRAM0B0S00 and MEM_DRAM0B3S15 inclusive)
otherwise returns false.

7.51.5.22 static bool is_subbanked_dram1 (memory_port port_num) [static]

Convenience method to determine whether the memory_port specified by port_num is a

subbanked DataRAM1 port type.

Parameters:
port_num The memory_port number of interest

Returns:
true if (port_num is between MEM_DRAM1B0S00 and MEM_DRAM1B3S15 inclusive)
otherwise returns false.

7.51.5.23 static bool is_subbanked_dram (memory_port port_num) [static]

Convenience method to determine whether the memory_port specified by port_num is a

subbanked DataRAM port type.

Parameters:
port_num The memory_port number of interest

Returns:
true if (port_num is between MEM_DRAM0B0S00 and MEM_DRAM0B3S15 inclusive)
OR if (port_num is between MEM_DRAM1B0S00 and MEM_DRAM1B3S15 inclusive)
otherwise returns false.

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7.51.5.24 static bool is_ls_dual_port (memory_port port_num, u32 ls_unit)

[static]

Convenience method to determine whether the memory_port specified by port_num is a

dual-type port served by the specified LD/ST unit.
Parameters:
port_num The memory_port number of interest
ls_unit The LD/ST unit of interest.

Returns:
true if (ls_unit is 0 AND port_num is MEM_DRAM0LS0 | MEM_DRAM1LS0 | MEM_-
DROM0LS0 | MEM_XLMI0LS0) OR if (ls_unit is 1 AND port_num is MEM_DRAM0LS1
| MEM_DRAM1LS1 | MEM_DROM0LS1 | MEM_XLMI0LS1) otherwise returns false.

Note: This method is deprecated in favor of is_multi_port_zero(). In some cases the non-
static get_multi_port_count() method may also be needed.

7.51.5.25 sc_core::sc_port<xtsc_request_if, NSPP>& get_request_port

(memory_port mem_port) const

Method to get the sc_port for binding the memory request channel from this xtsc_core
memory interface master to a memory interface slave.
Parameters:
mem_port The desired memory port.

See also:
How_to_do_memory_port_binding for more information.

7.51.5.26 sc_core::sc_export<xtsc_respond_if>& get_respond_export

(memory_port mem_port) const

Method to get the sc_export for binding the memory response channel from a memory
interface slave to this xtsc_core memory interface master.
Parameters:
mem_port The desired memory port.

See also:
How_to_do_memory_port_binding for more information.

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7.51.5.27 virtual void execute (const std::string & cmd_line, const std::vector<
std::string > & words, const std::vector< std::string > & words_lc,
std::ostream & result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:
breakpoint_interrupt
Call xtsc_core::breakpoint_interrupt() for this core.

change_clock_period <ClockPeriodFactor>
Call xtsc_core::change_clock_period(<ClockPeriodFactor>). Return previous
<ClockPeriodFactor> for this core.

dasm [<PC> [<NumInstructions>]]

Return address and disassembly of <NumInstructions> instructions (default 1)
starting at <PC>. If <PC> is omitted or is 'pc', then current PC address is
used. If <PC> is 'next' then disassembly continues where it left off before.

disassemble [<PC>]
Return buffer from calling xtsc_core::disassemble(buffer, <PC>) for this core.
If <PC> is omitted, then current PC address is used.

dump_counters
Call xtsc_core::get_summary_count() for each counter of this core.

dump_filtered_request [<MemoryPortName>]
Return the buffer from calling xtsc_core::dump_filtered_request(<MemoryPortName>).

dump_filtered_response [<MemoryPortName>]
Return the buffer from calling xtsc_core::dump_filtered_response(<MemoryPortName>).

dump_interface_values <InterfaceName> ...

Return buffer from calling xtsc_core::dump_interface_values(<InterfaceName>)
repeatedly for each <InterfaceName> for this core.

dump_memory_interfaces
Return buffer from calling xtsc_core::dump_memory_interfaces() for this core.

dump_parameters
Return buffer from calling xtsc_parms::dump() for the xtsc_core_parms used to
construct this core.

dump_registers
Return buffer from calling xtsc_core::dump_all_registers() for this core.

dump_core_interfaces_by_type
Return buffer from calling xtsc_core::dump_core_interfaces_by_type() for this
core (includes memories).

dump_tie_interfaces
Return buffer from calling xtsc_core::dump_tie_interfaces() for this core.

dump_tie_interfaces_by_type
Return buffer from calling xtsc_core::dump_tie_interfaces_by_type() for this
core.

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enable_clock 0|1
Call xtsc_core::enable_clock(0|1). Return previous setting for this core.

enable_debug [<Wait> [<Sync> [<StartPort>]]]

Returns xtsc_core::enable_debug(<Wait>, <Sync>, true, <StartPort>). <Wait>
and <Sync> can be 0|1 (default is 0).

get_alt_reset_vec
Return xtsc_core::get_alt_reset_vec() for this core.

get_clock_factor
Return xtsc_core::get_clock_factor() for this core.

get_clock_period_factor
Return xtsc_core::get_clock_period_factor() for this core.

get_commit_stage
Return xtsc_core::get_commit_stage() for this core.

get_cycle_count
Return xtsc_core::get_cycle_count() for this core.

get_debug_poll_interval
Return xtsc_core::get_debug_poll_interval() for this core.

get_debugger_port
Return xtsc_core::get_debugger_port() for this core.

get_exit_code
Return xtsc_core::get_exit_code() for this core.

get_instr_width [<PC>]
Return xtsc_core::get_instr_width(<PC>) for this core. If <PC> is omitted,
then current PC address is used.

get_last_stage
Return xtsc_core::get_last_stage() for this core.

get_parameter_exists <ParameterName>
Return xtsc_parms::exists(<ParameterName>) for the xtsc_core_parms used to
construct this core.

get_parameter_value <ParameterName>
Return xtsc_parms::dump_value(<ParameterName>) for the xtsc_core_parms used to
construct this core.

get_pc [<Stage>]
Return xtsc_core::get_pc(<Stage>) for this core. If <Stage> is omitted, then
search backward from W stage for a meaningful PC.

get_register_bit_width <RegisterName>
Return xtsc_core::get_register_bit_width(<RegisterName>) for this core.

get_register_value <RegisterName>
Return xtsc_core::get_register_value(<RegisterName>) for this core.

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get_reset_vector
Return xtsc_core::get_reset_vector() for this core.

get_simcall_arg <Arg>
Return xtsc_core::get_simcall_arg(<Arg>) for this core.

get_stall
Return xtsc_core::get_stall() for this core.

get_static_vector_select
Return xtsc_core::get_static_vector_select() for this core.

get_summary_count <CounterName>
Return xtsc_core::get_summary_count(<CounterName>) for this core.

get_trigin_idma
Return xtsc_core::get_trigin_idma() for this core.

get_turbo_max_relaxed_cycles
Return xtsc_core::get_turbo_max_relaxed_cycles() for this core.

has_exited
Return xtsc_core::has_exited() for this core.

has_register <RegisterName>
Return xtsc_core::has_register(<RegisterName>) for this core.

is_clock_enabled
Return xtsc_core::is_clock_enabled() for this core.

is_debugging_enabled
Return xtsc_core::is_debugging_enabled() for this core.

is_fast_functional_mode
Return xtsc_core::is_fast_functional_mode() for this core.

load_client <ClientPackage>
Call xtsc_core::load_client(<ClientPackage>) for this core. <ClientPackage>
is everything after 'load_client '.

load_file <FileName>
Call xtsc_core::load_file(<FileName>) for this core.

load_program <ProgramName> [<arg>]...

Call xtsc_core::load_program(<ProgramName>, <Arguments>) for this core.
<Arguments> is a NULL-terminated c-str array from [<arg>]...).

log_disassembly 0|1
Call xtsc_core::log_disassembly(0|1) for this core.

nb_peek <MemoryPortName> <StartAddress> <NumBytes>

Call nb_peek(<StartAddress>, <NumBytes>, buffer) on the port specfied by
<MemoryPortName> and display buffer.

nb_poke <MemoryPortName> <StartAddress> <NumBytes> <Byte1> <Byte2> ... <ByteN>

Call nb_poke(<StartAddress>, <NumBytes>, buffer) on the port specfied by
<MemoryPortName> after putting <Byte1> ... <ByteN> in buffer.

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peek_physical <StartAddress> <NumBytes>

Peek <NumBytes> of memory starting at <StartAddress> (a physical address).

peek_virtual <StartAddress> <NumBytes>

Peek <NumBytes> of memory starting at <StartAddress> (a virtual address).

poke_physical <StartAddress> <NumBytes> <Byte1> <Byte2> ... <ByteN>

Poke <NumBytes> (=N) of memory starting at <StartAddress> (a physical
address).

poke_virtual <StartAddress> <NumBytes> <Byte1> <Byte2> ... <ByteN>

Poke <NumBytes> (=N) of memory starting at <StartAddress> (a virtual address).

reset
Call xtsc_core::reset() for this core.

revoke_fast_access
Call xtsc_core::revoke_fast_access() for this core.

send_client_command <Command>
Call xtsc_core::send_client_command(<Command>) for this core. <Command> is
everything after 'send_client_command '.

set_debug_poll_interval <PollInterval>
Call xtsc_core::set_debug_poll_interval(<PollInterval>) for this core.

set_alt_reset_vec <Address>
Call xtsc_core::set_alt_reset_vec(<Address>) for this core.

set_interrupt <Interrupt> <Set>

Call xtsc_core::set_interrupt(<Interrupt>, <Set>) for this core. <Set> may be
0|1.

set_pc <PC>
Call xtsc_core::set_pc(<PC>) for this core.

set_register_value <RegisterName> <Value>

Call xtsc_core::set_register_value(<RegisterName>, <Value>) for this core.

set_simcall_return_value <Value>
Call xtsc_core::set_simcall_return_value(<Value>) for this core.

set_stall <Stall>
Call xtsc_core::set_stall(<Stall>) for this core. Return the previous value.
<Stall> may be 0|1.

set_static_vector_select <Value>
Call xtsc_core::set_static_vector_select(<Value>) for this core. <Value> may
be 0|1.

set_trigin_idma <High>
Call xtsc_core::set_trigin_idma(<High>) for this core. Return the previous
value. <High> may be 0|1.

set_turbo_max_relaxed_cycles <Value>
Call xtsc_core::set_turbo_max_relaxed_cycles(<Value>) for this core.

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summary
Call xtsc_core::summary() for this core.

translate_virtual <VirtualAddress>
Return xtsc_core::translate_virtual(<VirtualAddress>) for this core.

watchfilter_add <MemoryPortName> <FilterName> <EventName>

Calls xtsc_core::watchfilter_add(<MemoryPortName>, <FilterName>, <Event>) and
returns the watchfilter number. <EventName> can be a hyphen (-) to mean the
last event created by the xtsc_event_create command.

watchfilter_dump [<MemoryPortName>]
Return buffer from calling xtsc_core::watchfilter_dump(<MemoryPortName>).

watchfilter_remove <Watchfilter> | *
Return xtsc_core::watchfilter_remove(<Watchfilter>). An * removes all
watchfilters.

Implements xtsc_command_handler_interface.

7.51.5.28 void connect (xtsc_core & core, const char ∗ memory_port_name)

Connect to the inbound pif port of another xtsc_core. This method connects the specified
memory port of this xtsc_core to the inbound pif port of the xtsc_core specified by core.

Parameters:
core The xtsc_core whose inbound pif port is to be connected to.
memory_port_name The memory port name of this xtsc_core that is to be connected
to the inbound pif port of core.

See also:
How_to_do_memory_port_binding for a list of valid names.

7.51.5.29 void connect (xtsc_core & core, const char ∗ output_name, const char ∗
input_name)

Connect an output of another xtsc_core to an input of this xtsc_core. This method connects
a system output wire or TIE export state of another xtsc_core to a system input wire of this
xtsc_core. This method may also be used to chain TX Xtensa cores together.

Parameters:
core The other xtsc_core.

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output_name The system output wire or TIE export state of the other xtsc_core. If
chaining TX cores, then this argument must be "tx_xfer_out" and core is the up-
stream TX in the chain..
input_name The system input wire of this xtsc_core. If chaining TX cores, then this
argument must be "tx_xfer_in" and this xtsc_core is the downstream TX in the
chain.

7.51.5.30 void connect (xtsc_tx_loader & loader, const char ∗ iface)

Connect with an upstream xtsc_tx_loader. This method connects this core with the speci-
fied upstream xtsc_tx_loader. Which interfaces are connected depends on the iface argu-
ment.

Parameters:
loader The xtsc_tx_loader to connect with.
iface If iface is "tx_xfer_in", then the output XFER interface of loader will be connected
to the input XFER interface of this core (so this core will be the first TX in the
chain). If iface is not "tx_xfer_in", then the \"pin_level\" parameter of loader must
be false and iface must name a 32-bit TLM TIE input queue interface of this core,
which will be connected to the TLM queue pop interface (m_consumer) of loader.

7.51.5.31 void dump_filtered_request (std::ostream & os = std::cout, const

std::string & memory_port_name = "")

Dump the most recent previous xtsc_request that passed a xtsc_request watchfilter on the
specified memory_port_name (or on each memory port).

Parameters:
os The ostream object to which the watchfilters should be dumped.
memory_port_name The memory port name. If empty then the most recent previous
request passed on each memory port is dumped.

See also:
watchfilter_add
xtsc_filter

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7.51.5.32 void dump_filtered_response (std::ostream & os = std::cout, const

std::string & memory_port_name = "")

Dump the most recent previous xtsc_response that passed a xtsc_response watchfilter on
the specified memory_port_name (or on each memory port).

Parameters:
os The ostream object to which the watchfilters should be dumped.
memory_port_name The memory port name. If empty then the most recent previous
response passed on each memory port is dumped.

See also:
watchfilter_add
xtsc_filter

7.51.5.33 u32 watchfilter_add (const std::string & memory_port_name, const

std::string & filter_name, sc_core::sc_event & event)

Add a watchfilter on peeks, pokes, requests, or responses to the specified memory port.

Parameters:
memory_port_name The memory port name.
filter_name The filter instance name. The actual xtsc_filter object will be obtained
via a call to xtsc_filter_get. Its kind must be one of "xtsc_peek", "xtsc_poke",
"xtsc_request", or "xtsc_response".
event The sc_event to notify when a nb_peek, nb_poke, nb_request, or nb_response
(as appropriate) occurs whose payload passes the filter.

Returns:
the watchfilter number (use to remove the watchfilter).

See also:
watchfilter_remove
xtsc_filter
xtsc_filter_get

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7.51.5.34 void watchfilter_dump (std::ostream & os = std::cout, const std::string

& memory_port_name = "")

Dump a list of all watchfilters applied to the specified memory port (or all memory ports) of
this xtsc_core instance.

Parameters:
os The ostream object to which the watchfilters should be dumped.
memory_port_name The memory port name. If empty then watchfilters for all mem-
ory ports are dumped.

See also:
watchfilter_add
xtsc_filter

7.51.5.35 u32 watchfilter_remove (u32 watchfilter)

Remove the specified watchfilter or all watchfilters.

Parameters:
watchfilter The number returned from a previous call to watchfilter_add. A -1
(0xFFFFFFFF) means to remove all watchfilters on this xtsc_core instance.

Returns:
the number (count) of watchfilters removed.

See also:
watchfilter_add
xtsc::xtsc_filter

7.51.5.36 void dump_configuration (std::ostream & os = std::cout, bool

include_interfaces = true) const

Dump a lot of information about the core configuration. Dump the set of core configuration
parameters and core interfaces to the specified ostream.

Parameters:
os The ostream operator to dump the information to.
include_interfaces If false, do not include core interfaces.

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7.51.5.37 static void dump_status (std::ostream & os = std::cout, const

std::vector< xtsc_core ∗ > & cores = get_all_cores()) [static]

This method dumps the status of all cores in a vector of cores. Dumps status information
(pc and enabled|disabled|exited) for each core in a vector of cores. Enabled and disabled
refer to the gated clock.

Parameters:
os The ostream object to which the output is sent. The default is cout.
cores The set of cores of interest. The default is all cores in the system.

See also:
is_clock_enabled()
has_exited()

7.51.5.38 static bool set_stop_after_all_cores_exit (bool stop) [static]

Set the flag that determines whether similation will be stopped (via a call to the SystemC
sc_stop() method) after the target program on the last running core (that has "SimNeverEx-
its" set to false--the default) exits. The default value of the flag is true. That is, if this method
is never called then sc_stop() will be called after the target program on the last running core
(that has "SimNeverExits" set to false) exits.

Parameters:
stop If true, sc_stop will be called as soon as the target program on the last running
core (that has "SimNeverExits" set to false) exits. If false, sc_stop will not be
called.

Returns:
the previous value of the flag

See also:
xtsc_core_parms "SimNeverExits"
xtsc_core_parms "SimStopOnExit"

7.51.5.39 static bool get_stop_after_all_cores_exit () [static]

Return the flag that determines whether similation will be stopped (via a call to the SystemC
sc_stop method) after the target program on the last running core (that has "SimNeverExits"
set to false--the default) exits.

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Returns:
the value of the flag.

See also:
xtsc_core_parms "SimNeverExits"
xtsc_core_parms "SimStopOnExit"

7.51.5.40 static sc_core::sc_event& get_all_cores_exited_event () [static]

Get the event that will be notified immediately after the target program on the last running
core (that has "SimNeverExits" set to false--the default) exits.

See also:
xtsc_core_parms "SimNeverExits"
xtsc_core_parms "SimStopOnExit"

7.51.5.41 sc_core::sc_event& get_simcall_callback_event () const

Get the event that will be notified when the target program of this core makes a user simcall.

See also:
set_simcall_callback

7.51.5.42 int get_simcall_arg (u32 arg) const

Get the specified argument from the most recent previous user simcall.

Parameters:
arg The argument number to return. Valid range is 1-6 (to return arg1-arg6).

See also:
simcall_callback
set_simcall_callback

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7.51.5.43 void set_simcall_return_value (int value)

Set the value that will be returned by the default simcall callback.

Parameters:
value The value that will be returned by the default simcall callback.

7.51.5.44 static void enable_cores (bool enable = true, const std::vector<

xtsc_core ∗ > & cores = get_all_cores()) [static]

This method enables or disables all xtsc_core objects in the specified set of cores. A core
is enabled by turning its gated clock on and is disabled by turning its gated clock off (using
the enable_clock() method).

Parameters:
enable If true (the default) all specified cores are enabled. If false all specified cores
are disabled.
cores The set of cores to enable or disable. The default is all cores in the system.

See also:
enable_clock()

7.51.5.45 const xtsc_core_parms& get_parms () const

This method can be used to get a constant reference to the xtsc_core_parms used to
construct this xtsc_core. This xtsc_core_parms object can be queried for construction
parameter values; however, these values should not be changed.

See also:
xtsc_core_parms
xtsc_parms

7.51.5.46 u32 get_instantiation_number () const

Get the instantiation order number of this core. Get the zero-based number indicating the
instantiation order for this core. The first core instantiated has an instantiation order number
of 0, the second core instantiated has an instantiation order number of 1, and so on.

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7.51.5.47 simcall_callback set_simcall_callback (simcall_callback callback, void ∗

callback_arg, void ∗∗ previous_arg = NULL)

Set the callback function for user simcalls. This method is called to register a callback func-
tion with the ISS that will be called whenever the target program executes a user simcall.
Steps to using user simcalls:

A. In your host (simulator/sc_main) program:

1. Write the callback function in your host program. Its signature must
match the simcall_callback typedef.
2. Register you callback function using this method.
B. In your target (Xtensa) program:
1. Include the following file:
#include <xtensa/sim.h>
2. Call the xt_iss_simcall() function and pass it 6 arguments. If you
need fewer arguments, you can pass dummy values (e.g. 0) for the extra
arguments to make a total of 6. For example:
xt_iss_simcall(value1, value2, 0, 0, 0, 0);

Parameters:
callback The callback function to be called.
callback_arg Any desired value. This value will be passed as the second argument
to the callback function.
previous_arg Pointer to a void∗ pointer in which to return the previously registered
callback argument.

Clients calling this method should record the simcall_callback and previous_arg returned
by this method and chain a call to them in the registered callback.

See also:
simcall_callback

Note: See "lua_function simcall" under the "SimScriptFile" parameter in xtsc_core_parms

for a way to service user simcalls using a Lua function instead of providing a C/C++ callback
function using this method.
Note: See the "simcall_csv_file" parameter in xtsc_initialize_parms for an automatic way
to record simcall values into a comma-separated value (CSV) file using a built-in callback
function.

Returns:
the previous callback function.

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7.51.5.48 void set_sim_mode_switch_callback (sim_mode_switch_callback

callback, void ∗ callback_arg)

Set a callback function to be used when a target program requests a simulation mode
switch. This method is called to register a callback function with the ISS that will be called
whenever the target program executing on this core requests a simulation mode switch.
This callback will not be called if the requested mode is already the current mode.
Note: XTSC includes a built-in callback for switching. Using this method overrides XTSC’s
built-in callback.
Note: In a multi-core simulation, the behavior is unspecified if multiple cores attempt a
simulation mode switch during overlapping simulation time intervals.
Steps to using a custom simulation mode switch callback:

A. In your host (simulator/sc_main) program:

1. Write the callback function in your host program. Its signature must
match the sim_mode_switch_callback typedef.
2. Register you callback function using this method.
B. In your target (Xtensa) program:
1. Include the following file:
#include <xtensa/sim.h>
2. Call the xt_iss_switch_mode(int mode) function with a mode of
XT_ISS_FUNCTIONAL or XT_ISS_CYCLE_ACCURATE until it returns 0.
For example:
while (xt_iss_switch_mode(XT_ISS_FUNCTIONAL));

Parameters:
callback The callback function to be called.
callback_arg Any desired value. This value will be passed as the second argument
to the callback function.

See also:
sim_mode_switch_callback

7.51.5.49 u32 enable_debug (bool wait = true, bool synchronized = false, bool
dummy = true, u32 starting_port = 0)

Enable this core to be debugged by xt-gdb and Xtensa Xplorer.

Parameters:
wait If true (the default), the ISS will wait for a debugger to attach before releasing this
processor core from reset. If false, this core will be released from reset as soon
as sc_start() is called.

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synchronized If enable_debug() is called one or more times with this flag set to true,
then all cores in the system run in lock step so that if any one of them is waiting
for the debugger to attach or waiting at a breakpoint, then all other cores will stall.
If you do not want to have synchronized simulation then this flag must be set to
false (the default) on every call to enable_debug(). This parameter is ignored after
the first call to sc_start().

Note: Starting with RC-2009, operating in synchronized mode stops SystemC simulation
time from advancing (but delta cycles will occur) while any core is waiting for a debugger to
attach or waiting at a breakpoint.

Parameters:
dummy This parameter is ignored (in previous releases it was the enable_xplorer
parameter, but enabling of Xtensa Xplorer is handled automatically now).
starting_port xtsc_core needs a free port number to listen to while waiting for xt-gdb
to connect. This specifies the starting port number when looking for a free port. It
is recommended you use a public port number (i.e. 1024 or greater) or use 0 (the
default) which tells xtsc_core to pick a port number for you.

Returns:
the actual port number.

Exceptions:

xtsc_exception if a port could not be opened.

See also:
setup_debug()
setup_multicore_debug()

7.51.5.50 u32 setup_debug (int argc, const char ∗const ∗ argv, u32
processor_num = 0xFFFFFFFF, bool wait = true, bool synchronized =
false, bool dummy = true, u32 starting_port = 0)

Setup debugging or profiling on this core based upon command line arguments. This is a
convenience method to make it easy to enable debugging or profiling on this core based
upon command line arguments. This method scans argv looking for strings in the following
format:

1. --xxdebug or -xxdebug
2. --xxdebug=<ProcNum> or -xxdebug=<ProcNum>

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3. --xxdebug=sync or -xxdebug=sync
4. --xxprofile or -xxprofile
5. --xxprofile=<ProcNum> or -xxprofile=<ProcNum>

If the first format is found, then enable_debug() is called for this core. If the second format
is found and if <ProcNum> matches processor_num, then enable_debug() is called for this
core. If the third format is found then enable_debug() is called for this core with the synchro-
nized argument set to true (regardless of the value of synchronized passed to this function).
If the fourth format is found, then load_client("profile --all") is called for this core. If the fifth
format is found and if <ProcNum> matches processor_num, then load_client("profile --all")
is called for this core.

Parameters:
argc The size of argv. Typically, this is just the first argument passed into sc_main.
argv An array of c-strings. Typically, this is just the second argument passed into
sc_main.
processor_num The processor number to compare with the <ProcNum> number
from the --xxdebug=<ProcNum> argv argument. Two values of processor_num
have special meaning. If processor_num is 0xFFFFFFFF (the default) it means
to use the instantiation order number of this xtsc_core (see get_instantiation_-
number) to compare with <ProcNum>. If processor_num is 0xFFFFFFFE it
means to use the xtsc_core_parms value from "ProcessorID" to compare with
<ProcNum>.
wait See enable_debug().
synchronized See enable_debug().
dummy Ignored, see enable_debug().
starting_port See enable_debug().

Returns:
1 if enable_debug was called for this core, otherwise returns 0.

Note: Enabling both debugging and profiling in the same simulation run is not recom-
mended because the timing and pipeline changes introduced by the debugging operation
may invalidate the profiling data.

See also:
enable_debug().
load_client().
setup_multicore_debug()
get_instantiation_number.

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7.51.5.51 static u32 setup_multicore_debug (int argc, const char ∗const ∗ argv,
u32 processor_num = 0, bool wait = true, bool synchronized = false,
bool dummy = true, u32 starting_port = 0, std::vector< xtsc_core ∗ >
cores = get_all_cores()) [static]

Setup debugging or profiling on all cores in a list based upon command line arguments.
This is a convenience method to make it easy to enable debugging or profiling on all cores
in a list based upon command line arguments. This method calls the setup_debug() method
for each core in the cores vector.

Parameters:
argc See setup_debug().
argv See setup_debug().
processor_num See setup_debug(). If processor_num is 0xFFFFFFFF or
0xFFFFFFFE then it is passed along unchanged to setup_debug(). If processor_-
num is any other value, then the index in the cores vector is passed to setup_-
debug as its processor_num argument.
wait See enable_debug().
synchronized See enable_debug().
dummy Ignored, see enable_debug().
starting_port See enable_debug().
cores The vector of xtsc_core pointers that you want setup_debug() called for. The
default is all currently existing xtsc_core objects.

Returns:
the number of cores for which enable_debug was called.

See also:
setup_debug().
enable_debug().
get_all_cores().

7.51.5.52 void set_debug_poll_interval (u32 num_cycles)

Set the debug poll interval. This is the number of instruction cycles that the ISS will execute
before checking to see if the debugger has attached or is trying to interrupt the simulator.

Parameters:
num_cycles The number of instruction cycles between polls.

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See also:
the "SimDebugPollInterval" parameter

7.51.5.53 u32 get_debug_poll_interval () const

Get the debug poll interval.

Returns:
the number of instruction cycles between polls.

See also:
set_debug_poll_interval()

7.51.5.54 debugger_callback set_debugger_connect_callback (debugger_callback

callback, void ∗ arg)

Set the callback function the simulator will call when a debugger connects to this core.

Parameters:
callback The callback function.
arg Argument to be passed to the callback function.

Warning: The callback occurs in the context of ipc_thread, a separate OS-level thread used
to communicate with the debugger. This OS-level thread runs independent of the OS-level
thread in which the SystemC kernel runs and it is NOT safe to modify SystemC kernel
state and most module state from the callback function. In lieu of using a callback function,
Cadence recommends that the get_debugger_connect_event() method be used to get an
sc_event that will be safely notified when the debugger connects.

Returns:
the previous callback function.

7.51.5.55 debugger_callback set_debugger_disconnect_callback

(debugger_callback callback, void ∗ arg)

Set the callback function the simulator will call when a debugger disconnects from this core.

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Parameters:
callback The callback function.
arg Argument to be passed to the callback function.

Warning: The callback occurs in the context of ipc_thread, a separate OS-level thread used
to communicate with the debugger. This OS-level thread runs independent of the OS-level
thread in which the SystemC kernel runs and it is NOT safe to modify SystemC kernel
state and most module state from the callback function. In lieu of using a callback function,
Cadence recommends that the get_debugger_disconnect_event() method be used to get
an sc_event that will be safely notified when the debugger disconnects.

Returns:
the previous callback function.

7.51.5.56 debugger_callback set_breakpoint_callback (debugger_callback

callback, void ∗ arg, void ∗∗ previous_arg = NULL)

Set the callback function the simulator will call whenever this core encounters an internal
(xt-gdb/Xtensa Xplorer) breakpoint.

Parameters:
callback The callback function.
arg Argument to be passed to the callback function.
previous_arg Pointer to a void∗ pointer in which to return the previously registered
callback argument.

Clients calling this method should record the debugger_callback and previous_arg returned
by this method and chain a call to them in the registered callback.
Note: Unlike the debugger resume callback, the callback function specfied here is called in
the context of the OS-level thread of the SystemC kernel so SystemC and module methods
and state can be safely accessed.
Note: See "lua_function breakpoint" under the "SimScriptFile" parameter in xtsc_core_-
parms for a way to have a Lua function called when this core encouners an internal break-
point instead of providing a C/C++ callback function using this method.
Note: See the "breakpoint_csv_file" parameter in xtsc_initialize_parms for an automatic
way to record breakpoint information into a comma-separated value (CSV) file using a
built-in callback function.

Returns:
the previous callback function.

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7.51.5.57 debugger_callback set_debugger_resume_callback (debugger_callback

callback, void ∗ arg)

Set the callback function the simulator will call whenever the debugger of this core starts
the core executing instructions. From xt-gdb, this corresponds to the continue, step, stepi,
and stepc commands.

Parameters:
callback The callback function.
arg Argument to be passed to the callback function.

Warning: The callback occurs in the context of ipc_thread, a separate OS-level thread used
to communicate with the debugger. This OS-level thread runs independent of the OS-level
thread in which the SystemC kernel runs and it is NOT safe to modify SystemC kernel
state and most module state from the callback function. In lieu of using a callback function,
Cadence recommends that the get_debugger_resume_event() method be used to get an
sc_event that will be safely notified when the debugger resumes instruction execution.

Returns:
the previous callback function.

7.51.5.58 void breakpoint_interrupt ()

Cause the ISS for this core to break and pass control to its attached debugger. For example,
when some other core has encountered a breakpoint and its breakpoint callback function
(set using set_breakpoint_callback) has been envoked by the simulator, this method can
be used from that callback to cause this core to also break and pass control to its attached
debugger.

7.51.5.59 static bool have_all_cores_exited (const std::vector< xtsc_core ∗ > &

cores = get_all_cores()) [static]

This method returns true if all cores in a vector of cores have exited; otherwise it returns
false.
Parameters:
cores The set of cores of interest. The default is all cores in the system.

See also:
has_exited()

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7.51.5.60 bool has_memory_port (memory_port mem_port) const

Get whether or not the specified memory port exists.

Parameters:
mem_port The desired local memory port.

Returns:
true if the memory exists, otherwise returns false.

See also:
memory_port

7.51.5.61 bool has_memory_port (const char ∗ memory_port_name) const

Get whether or not the named memory port exists.

Parameters:
memory_port_name The memory port name.

Returns:
true if the memory port exists, otherwise returns false.

See also:
How_to_do_memory_port_binding for a list of valid names.

7.51.5.62 bool is_dual_ported (bool xlmi = false) const

Determine if core is dual-ported (hardware prior to RE-2012.0). If xlmi is false, this method
returns true if the core has 2 LD/ST units and no CBox. If xlmi is true, this method returns
true if the core has 2 LD/ST units.
Note: This method always returns false on RE-2012.0 or later hardware configs ("HWMi-
croArchLatest" is 250000 or greater).
Note: This method is deprecated in favor of the get_multi_port_count() method.

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7.51.5.63 static bool is_multi_port_zero (memory_port mem_port) [static]

Return true if mem_port is a single-ported interface or if it is the first port of a multi-ported

interface.
Parameters:
mem_port The desired memory port.

7.51.5.64 static memory_port get_multi_port_zero (memory_port mem_port)

[static]

Return the zeroeth memory port of the specified memory port.

Parameters:
mem_port The memory port whose zeroeth memory port is desired.

7.51.5.65 u32 get_multi_port_count (memory_port mem_port, bool count_split_rw

= true) const

Return the number of ports the core has of the specified memory port class. For ex-
ample, for a non-subbanked, non-split RW interface, calling this method with mem_-
port of MEM_DRAM0P0, MEM_DRAM0P1, MEM_DRAM0P2, or MEM_DRAM0P3 will re-
turn the number of ports that the DataRAM0 interface has and calling this method with
mem_port of MEM_DRAM0LS0RD, MEM_DRAM0LS0WR, MEM_DRAM0LS1RD, MEM_-
DRAM0LS1WR, etc, or with a mem_port of MEM_DRAM0B0S00, MEM_DRAM0B0S01,
etc, will return 0.
For an interface with subbanks, calling this method with mem_port of MEM_DRAM0P0,
MEM_DRAM0P1, MEM_DRAM0P2, or MEM_DRAM0P3 will return 0 while calling this
method with mem_port of MEM_DRAM0B0S00, MEM_DRAM0B0S01, etc, (and so on for
banks 1, 2, and 3) will return the number of banks times the number of subbanks per bank
that the DataRAM0 interface has.
For a split RW interface, calling this method with mem_port of MEM_DRAM0P0, MEM_-
DRAM0P1, MEM_DRAM0P2, or MEM_DRAM0P3 will return 0 while calling this method
with mem_port of MEM_DRAM0LS0RD, MEM_DRAM0LS0WR, MEM_DRAM0LS1RD,
MEM_DRAM0LS1WR, etc, will return the number of RD ports (equals number of WR ports)
that the DataRAM0 interface has (if count_split_rw is false) or it will return the sum of the
RD ports and WR ports (if count_split_rw is true). If the core does not have a DataRAM0
interface then calling this method with any of the above values of mem_port will return 0.

Parameters:
mem_port A memory port of the desired memory port class.

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count_split_rw For split R/W ports, this method returns the number of RD ports or
the number of WR ports (the two numbers are always equal) if count_split_rw is
false. If count_split_rw is true, the sum of the RD and WR port counts is returned.

7.51.5.66 memory_port get_nth_multi_port (memory_port mem_port, u32 n, bool

interleave_rw = true) const

Return the memory_port enum of the nth port (0-based) of a multi-ported interface or the
only (n=0) port of a single-ported interface. This convenience method makes it easier to
get each of the subbanked or split R/W DataRAM0 or DataRAM1 ports that the config has
when, for subbanked interfaces, it may have less than the maximum number of subbanks
and for split R/W interfaces it may have less than 3 LD/ST units and may or may not have
inbound PIF (DMA).
For example, here is what this method will return when called with the values shown on a
config with 2 banks each with 4 subbanks on DataRAM0 (for a total of 8 multi-ports).

mem_port n return
-------------- - --------------
MEM_DRAM0B0S00 0 MEM_DRAM0B0S00
MEM_DRAM0B0S00 1 MEM_DRAM0B0S01
MEM_DRAM0B0S00 2 MEM_DRAM0B0S02
MEM_DRAM0B0S00 3 MEM_DRAM0B0S03
MEM_DRAM0B0S00 4 MEM_DRAM0B1S00
MEM_DRAM0B0S00 5 MEM_DRAM0B1S01
MEM_DRAM0B0S00 6 MEM_DRAM0B1S02
MEM_DRAM0B0S00 7 MEM_DRAM0B1S03

MEM_PIF 0 MEM_PIF
MEM_IDMA0 0 MEM_IDMA0

As another example, here is what this method will return when called with the values shown
on a config with split R/W ports, 2 LD/ST units, and inbound PIF to DataRAM0 (for a total
of 6 multi-ports) and with interleave_rw true.

mem_port n return
-------------- - --------------
MEM_DRAM0LS0RD 0 MEM_DRAM0LS0RD
MEM_DRAM0LS0RD 1 MEM_DRAM0LS0WR
MEM_DRAM0LS0RD 2 MEM_DRAM0LS1RD
MEM_DRAM0LS0RD 3 MEM_DRAM0LS1WR
MEM_DRAM0LS0RD 4 MEM_DRAM0DMARD
MEM_DRAM0LS0RD 5 MEM_DRAM0DMAWR

MEM_PIF 0 MEM_PIF

And here is what this method will return when called with the values shown on the same
config as above but with interleave_rw false.

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mem_port n return
-------------- - --------------
MEM_DRAM0LS0RD 0 MEM_DRAM0LS0RD
MEM_DRAM0LS0RD 1 MEM_DRAM0LS1RD
MEM_DRAM0LS0RD 2 MEM_DRAM0DMARD
MEM_DRAM0LS0RD 3 MEM_DRAM0LS0WR
MEM_DRAM0LS0RD 4 MEM_DRAM0LS1WR
MEM_DRAM0LS0RD 5 MEM_DRAM0DMAWR

Parameters:
mem_port The enum of the first port (port 0) of the desired multi-port or the enum of
a single-ported interface.
n The desired nth port. If mem_port is a single-ported interface then n must be 0. The
valid range for n is 0 to one less than the value returned by calling get_multi_-
port_count(mem_port, true).
interleave_rw Specifies whether each WR port of a split RW interface should imme-
diately follow its corresponding RD port (interleave_rw true) or if they should all
follow after the last RD port (interleave_rw false). For example, if interleave_rw is
true, MEM_DRAM0LS0RD is followed by MEM_DRAM0LS0WR. If interleave_rw
is false (and assuming at least 2 LD/ST units), MEM_DRAM0LS0RD is followed
by MEM_DRAM0LS1RD. Similarly for DataRAM1. This parameter only applies if
mem_port is a split RW Data RAM.

Note: 3 LD/ST units is reserved for future use.

Exceptions:

xtsc_exception if this core does not have the specified nth memory port.

7.51.5.67 bool has_busy (memory_port mem_port) const

Return true if the specified memory port has a busy/ready interface.

Parameters:
mem_port The desired memory port.

Exceptions:

xtsc_exception if this core does not have the specified memory port.

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7.51.5.68 bool get_local_memory_starting_byte_address (memory_port

mem_port, xtsc_address & address8) const

Get whether or not the specified local memory port exists and its starting byte address.

Parameters:
mem_port The desired local memory port.
address8 A reference in which to return the starting byte address.

Returns:
true if the local memory exists, otherwise returns false.

See also:
memory_port

7.51.5.69 bool get_system_ram_starting_byte_address (xtsc_address & address8)

const

Get whether or not system RAM memory exists and its starting byte address.

Parameters:
address8 A reference in which to return the starting byte address.

Returns:
true if system RAM memory exists, otherwise returns false.

7.51.5.70 bool get_system_rom_starting_byte_address (xtsc_address & address8)

const

Get whether or not system ROM memory exists and its starting byte address.

Parameters:
address8 A reference in which to return the starting byte address.

Returns:
true if system ROM memory exists, otherwise returns false.

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7.51.5.71 bool get_local_memory_byte_size (memory_port mem_port, u32 &

size8) const

Get whether or not the specified local memory port exists and its size in bytes.

Parameters:
mem_port The desired local memory port.
size8 A reference in which to return the memory byte size.

Returns:
true if the local memory port exists, otherwise returns false.

See also:
memory_port

7.51.5.72 bool get_system_ram_byte_size (u32 & size8) const

Get whether or not system RAM memory exists and its size in bytes.

Parameters:
size8 A reference in which to return the memory byte size.

Returns:
true if system RAM memory exists, otherwise returns false.

7.51.5.73 bool get_system_rom_byte_size (u32 & size8) const

Get whether or not system ROM memory exists and its size in bytes.

Parameters:
size8 A reference in which to return the memory byte size.

Returns:
true if system ROM memory exists, otherwise returns false.

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7.51.5.74 void peek_physical (xtsc_address address8, u32 size8, u8 ∗ buffer)

This method is used to read memory using a physical address without disturbing the mem-
ory hardware, the processor hardware, or the bus hardware.

Parameters:
address8 The byte address of the first byte to be peeked.
size8 The number of bytes to peek. Can be any number of bytes as long as the
address range from address8 to address8+size8-1 maps to the same physical
memory.
buffer The byte array in which to return the peeked data. The byte at address8 is
returned in buffer[0], the byte at address8+1 is returned in buffer[1], and so on up
to the byte at address8+size8-1 is returned in buffer[size8-1]. This format applies
regardless of host and core endianess. The caller is responsible for allocating this
buffer.

7.51.5.75 void peek_virtual (xtsc_address address8, u32 size8, u8 ∗ buffer)

This method is used to read memory using a virtual address without disturbing the memory
hardware, the processor hardware, or the bus hardware.

Parameters:
address8 The byte address of the first byte to be peeked.
size8 The number of bytes to peek. Can be any number of bytes as long as the
address range from address8 to address8+size8-1 maps to the same physical
memory.
buffer The byte array in which to return the peeked data. The byte at address8 is
returned in buffer[0], the byte at address8+1 is returned in buffer[1], and so on up
to the byte at address8+size8-1 is returned in buffer[size8-1]. This format applies
regardless of host and core endianess. The caller is responsible for allocating this
buffer.

7.51.5.76 void poke_physical (xtsc_address address8, u32 size8, const u8 ∗

buffer)

This method is used to write memory using a physical address without disturbing the mem-
ory controller hardware, the processor hardware, or the bus hardware.

Parameters:
address8 The byte address of the first byte to be poked.

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size8 The number of bytes to poke. Can be any number of bytes as long as the
address range from address8 to address8+size8-1 maps to the same physical
memory.
buffer The byte array in which to obtain the poked data. The byte in buffer[0] is
poked into memory at address8, the byte in buffer[1] is poked into memory at
address8+1, and so on up to the byte in buffer[size8-1] is poked into memory at
address8+size8-1. This format applies regardless of host and core endianess.

7.51.5.77 void poke_virtual (xtsc_address address8, u32 size8, const u8 ∗ buffer)

This method is used to write memory using a virtual address without disturbing the memory
controller hardware, the processor hardware, or the bus hardware.

Parameters:
address8 The byte address of the first byte to be poked.
size8 The number of bytes to poke. Can be any number of bytes as long as the
address range from address8 to address8+size8-1 maps to the same physical
memory.
buffer The byte array in which to obtain the poked data. The byte in buffer[0] is
poked into memory at address8, the byte in buffer[1] is poked into memory at
address8+1, and so on up to the byte in buffer[size8-1] is poked into memory at
address8+size8-1. This format applies regardless of host and core endianess.

7.51.5.78 xtsc_address peek_itlb (xtsc_address address8, bool & hit)

This method peeks the ITLB to translate the virtual address to a physical address. If the
core does not have a ITLB, then hit will be set to true and address8 will be returned. If
address8 is not in the ITLB, then hit will be set to false and address8 will be returned. Oth-
erwise, hit will be set to true and the translated (that is, physical) address will be returned.

Parameters:
address8 The virtual byte address to be translated.
hit Set to true if the core does not have a ITLB or if the ITLB contained a translation
for address8.

7.51.5.79 xtsc_address peek_dtlb (xtsc_address address8, bool & hit)

This method peeks the DTLB to translate the virtual address to a physical address. If the
core does not have a DTLB, then hit will be set to true and address8 will be returned. If

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address8 is not in the DTLB, then hit will be set to false and address8 will be returned. Oth-
erwise, hit will be set to true and the translated (that is, physical) address will be returned.

Parameters:
address8 The virtual byte address to be translated.
hit Set to true if the core does not have a DTLB or if the DTLB contained a translation
for address8.

7.51.5.80 xtsc_address translate_virtual (xtsc_address address8)

This method translates the specified virtual address into a physical address. This conve-
nience method first tries peek_itlb() and, if that misses, it then tries peek_dtlb() and, if that
misses, it returns address8.

Parameters:
address8 The virtual byte address to be translated.

7.51.5.81 void enable_register_tracing (bool enable)

Assuming register tracing is setup, this method sets whether or not it is enabled. When
register tracing is setup it is also automatically enabled from the start of simulation. If this
is not desired, call this method with enable=false, prior to starting simulation.
Register tracing is setup by setting the "SimVcdHandle" and "SimTraceRegisters" parame-
ters.

Parameters:
enable If true, register tracing, if setup, is enabled. If false, register tracing is disabled.

Exceptions:

xtsc_exception if called with enable=true and register tracing has not be setup.

See also:
is_register_tracing_enabled()

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7.51.5.82 bool is_register_tracing_enabled () const

Return whether or not register tracing is enabled.

See also:
enable_register_tracing()

7.51.5.83 void set_trigin_idma (bool high)

Assert or deassert this core’s TrigIn_iDMA signal.

Parameters:
high If true, the TrigIn_iDMA signal is asserted. If false, it is deasserted.

Exceptions:

xtsc_exception if called on a config without iDMA.

See also:
get_trigin_idma()

7.51.5.84 bool get_trigin_idma ()

Return whether or not this core’s TrigIn_iDMA signal is asserted.

Returns:
true if signal is asserted, return false if signal is deasserted.

Exceptions:

xtsc_exception if called on a config without iDMA.

See also:
set_trigin_idma()

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7.51.5.85 void set_stall (bool stall)

Set setting whether or not this core is in RunStall. This method allows stalling or releasing
this core’s pipeline in the same manner as the RunStall system-level input.

Parameters:
stall If true, causes the pipeline to stall after it advances at the beginning of the next
cycle. The pipeline will advance no further until the stall is released by calling this
method with a value of false.

See also:
the "SimRunStall" parameter
get_stall()

7.51.5.86 bool get_stall ()

Return whether or not this core is in RunStall.

Returns:
true if core is stalled, return false if core is not stalled.

See also:
set_stall()

7.51.5.87 void log_disassembly (bool log)

Turns logging of disassembly on or off. If true, as each instruction commits, its program
counter, machine code, and disassembly will be logged at INFO_LOG_LEVEL. If false, this
logging will be turned off.

Parameters:
log If true, logging of disassembly is turned on. If false, logging of disassembly is
turned off.

See also:
"SimLogDisassembly" in xtsc_core_parms

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7.51.5.88 bool is_fast_functional_mode () const

Method to determine simulation mode.

Returns:
true if this core is currently in fast functional mode (TurboXim), else returns false to
indicate core is currently in cycle-accurate mode.

7.51.5.89 bool enable_clock (bool enable = true)

Disable or enable this core’s gated clock.

Parameters:
enable If true (the default), this core’s gated clock is enabled. If false, this core’s gated
clock is disabled.

Returns:
true if this core’s gated clock was previously (prior to this API call) enabled, otherwise
return false.

See also:
is_clock_enabled()

7.51.5.90 bool is_clock_enabled ()

Returns true if this core’s gated clock is enabled; otherwise returns false.

See also:
enable_clock()

7.51.5.91 void step (u32 num_cycles)

Method to step one core while all other cores are disabled. This method disables the gated
clock of all other core’s in the system, enables this core’s gated clock, calls sc_start for the
specified number of clock cycles, then restores the gated clocks of all cores to the state
they were in when this method was called.
Note: This method should only be called from places you can call sc_start (i.e. from sc_-
main, either directly or indirectly).

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Parameters:
num_cycles The number of clock cycles to step this core.

See also:
enable_clock

7.51.5.92 void set_interrupt (u32 interrupt, bool set)

Set/clear the specified interrupt.

Parameters:
interrupt The number of the desired interrupt.
set If true, interrupt is set. If false, interrupt is cleared.

7.51.5.93 void xfer_reset (bool reset)

Reset the XFER block of a TX core with the boot loader option.

Parameters:
reset If true, XferReset is asserted. If false, XferReset is de-asserted.

Exceptions:

xtsc_exception if xtsc_core_parms "BootLoader" is false

7.51.5.94 void summary (std::ostream & os = std::cout) const

Print processor execution summary.

Parameters:
os The ostream object on which to print the summary.

Note: Also see the summary client under the load_client() method.

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7.51.5.95 std::set<std::string> get_tie_interface_set () const

Get the set of TLM TIE interfaces defined for this core. Get the set of TLM TIE interfaces
(lookups, input queues, output queues, import wires, and export states) defined for this
core.
The TLM TIE names are as written in the user’s TIE code and will never have the "TIE_"
prefix.

7.51.5.96 std::set<std::string> get_pin_set () const

Get the set of pins defined for this core. Get the set of TIE and system input and output
pins defined for this core. The pin-level TIE names always start with the "TIE_" prefix and
the system input and output names will never start with this prefix.

7.51.5.97 std::set<std::string> get_input_pin_set () const

Get the set of input pins defined for this core. Get the set of TIE and system input pins
defined for this core. The pin-level TIE names always start with the "TIE_" prefix and the
system input names will never start with this prefix.

7.51.5.98 std::set<std::string> get_output_pin_set () const

Get the set of output pins defined for this core. Get the set of TIE and system output pins
defined for this core. The pin-level TIE names always start with the "TIE_" prefix and the
system output names will never start with this prefix.

7.51.5.99 void dump_interface_values (const char ∗ interface_name, std::ostream

& os = std::cout) const

Dump the last value (or values) crossing the named interface. For TLM TIE interfaces, the
values dump are:

Tie Lookup (<rdy> only if defined):

<address> <value> <rdy>

Tie Input Queue:

<data> <empty> <ticket>

Tie Output Queue:

<data> <full> <ticket>

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Parameters:
interface_name The name of the TIE or system-level I/O TLM or pin interface as
shown in the output of dump_core_interfaces_by_type().
os The ostream operator to which the interface values should be dumped.

Note: You can arrange for an sc_event to be notified so you know when to call this method
using the "SimMonitorInterfaces" parameter.

See also:
dump_core_interfaces_by_type()
xtsc_core_parms "SimMonitorInterfaces"

7.51.5.100 void dump_core_interfaces_by_type (std::ostream & os = std::cout,

bool include_memories = false) const

Dump a list of all core interfaces grouped by type. Dump a list of all TLM and pin-level core
interfaces grouped by type (lookups, input queues, output queues, import wires, export
states, system input wires, system output wires, TIE/system input pins, and TIE/system
output pins) to the specified ostream object. If include_memories is set to true, then the
dump will also include memory interfaces.
The TIE pin-level names always have the "TIE_" prefix. The TLM TIE names are as written
in the user’s TIE code and never have the "TIE_" prefix. In addition, no system-level I/O
name starts with "TIE_".

Parameters:
os The ostream operator to which the interfaces should be dumped.
include_memories If true, memory interfaces are included in the dump; otherwise,
they are not included.

7.51.5.101 void dump_sysio_interfaces (std::ostream & os = std::cout) const

Dump a list of core System I/O interfaces. Dump a list of all TLM and pin-level core System
I/O interfaces to the specified ostream object.

Parameters:
os The ostream operator to which the interfaces should be dumped.

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7.51.5.102 void dump_memory_interfaces (std::ostream & os = std::cout) const

Dump a list of all core memory interfaces. Dump a list of all core memory interfaces includ-
ing their starting and ending physical address.

Parameters:
os The ostream operator to which the interfaces should be dumped.

7.51.5.103 void dump_tie_interfaces (std::ostream & os = std::cout) const

Dump a list of all TLM TIE interfaces. Dump a list of all TLM TIE interfaces to the specified
ostream object.
The TLM TIE names are as written in the user’s TIE code and will never have the "TIE_"
prefix.

7.51.5.104 void dump_tie_interfaces_by_type (std::ostream & os = std::cout)

const

Dump a list of all TLM TIE interfaces grouped by type. Dump a list of all TLM TIE interfaces
(lookups, input queues, output queues, import wires, and export states) grouped by type to
the specified ostream object.
The TLM TIE names are as written in the user’s TIE code and will never have the "TIE_"
prefix.

7.51.5.105 void dump_lookups (std::ostream & os = std::cout) const

Dump a list of TIE lookups. Dump a list of TIE lookups showing width of lookup result
in bits, name of lookup, width of lookup argument in bits, and whether there is a ready
interface to the specified ostream object.

7.51.5.106 void dump_input_queues (std::ostream & os = std::cout) const

Dump a list of TIE input queues. Dump a list of TIE input queues showing name (as it
appears in the user’s TIE code) and width in bits to the specified ostream object.

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7.51.5.107 void dump_output_queues (std::ostream & os = std::cout) const

Dump a list of TIE output queues. Dump a list of TIE output queues showing name (as it
appears in the user’s TIE code) and width in bits to the specified ostream object.

7.51.5.108 void dump_import_wires (std::ostream & os = std::cout) const

Dump a list of TIE import wires. Dump a list of TIE import wires showing name (as it
appears in the user’s TIE code) and width in bits to the specified ostream object.

7.51.5.109 void dump_export_states (std::ostream & os = std::cout) const

Dump a list of TIE export states. Dump a list of TIE export states showing name (as it
appears in the user’s TIE code) and width in bits to the specified ostream object.

7.51.5.110 void dump_input_pins (std::ostream & os = std::cout) const

Dump a list of all input pins. Dump a list of all TIE and system input pins showing name
and width in bits to the specified ostream object.
The pin-level TIE names always have the "TIE_" prefix and the system input pins will never
have this prefix.

7.51.5.111 void dump_output_pins (std::ostream & os = std::cout) const

Dump a list of all output pins. Dump a list of all TIE and system output pins showing name
and width in bits to the specified ostream object.
The pin-level TIE names always have the "TIE_" prefix and the system input pins will never
have this prefix.

7.51.5.112 bool has_tie_interface (const char ∗ tie_name) const

Returns true if the named TLM TIE interface exists. Returns true if the named TLM TIE
interface (lookup, input queue, output queue, import wire, or export state) exists.

Parameters:
tie_name This is the name as it appears in the user’s TIE code after the lookup,
queue, import_wire, or state keyword. This name should not begin with the "TIE_"
prefix.

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7.51.5.113 bool has_lookup (const char ∗ lookup_name) const

Returns true if the named TLM TIE lookup exists.

Parameters:
lookup_name Port name as it appears in the user’s TIE code after the lookup key-
word. This name should not begin with the "TIE_" prefix.

7.51.5.114 bool has_lookup_ready (const char ∗ lookup_name) const

Returns true if the named TLM TIE lookup has a ready interface. This method returns true
if the named TIE lookup has a ready interface. A TIE lookup has a ready interface if the rdy
keyword was specified in the lookup section of the user’s TIE code.

Parameters:
lookup_name Port name as it appears in the user’s TIE code after the lookup key-
word. This name should not begin with the "TIE_" prefix.

xtsc_exception if lookup_name is not found.

7.51.5.115 bool has_input_queue (const char ∗ queue_name) const

Returns true if the named TLM TIE input queue exists.

Parameters:
queue_name Port name as it appears in the user’s TIE code after the queue keyword.
This name should not begin with the "TIE_" prefix.

7.51.5.116 bool has_output_queue (const char ∗ queue_name) const

Returns true if the named TLM TIE output queue exists.

Parameters:
queue_name Port name as it appears in the user’s TIE code after the queue keyword.
This name should not begin with the "TIE_" prefix.

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7.51.5.117 bool has_import_wire (const char ∗ wire_name) const

Returns true if the named TLM TIE import wire exists.

Parameters:
wire_name Port name as it appears in the user’s TIE code after the import_wire key-
word. This name should not begin with the "TIE_" prefix.

7.51.5.118 bool has_export_state (const char ∗ state_name) const

Returns true if the named TLM TIE export state exists.

Parameters:
state_name Port name as it appears in the user’s TIE code after the state keyword.
This name should not begin with the "TIE_" prefix.

7.51.5.119 bool has_pin (const char ∗ pin_name) const

Returns true if the named TIE or system input or output pin exists.

Parameters:
pin_name For TIE pins, this is the pin name as generated by the TIE compiler which
will always begin with the "TIE_" prefix. For system-level pins, this is the pin name
as specified in the Xtensa microprocessor data book.

7.51.5.120 bool has_input_pin (const char ∗ input_pin_name) const

Returns true if the named TIE or system input pin exists.

Parameters:
input_pin_name For TIE input pins, this is the pin name as generated by the TIE
compiler which will always begin with the "TIE_" prefix. For system-level input
pins, this is the pin name as specified in the Xtensa microprocessor data book.

7.51.5.121 bool has_output_pin (const char ∗ output_pin_name) const

Returns true if the named TIE or system output pin exists.

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Parameters:
output_pin_name For TIE output pins, this is the pin name as generated by the TIE
compiler which will always begin with the "TIE_" prefix. For system-level output
pins, this is the pin name as specified in the Xtensa microprocessor data book.

7.51.5.122 u32 get_pin_bit_width (const char ∗ pin_name) const

Get the width in bits of the specified pin. Get the width in bits of the specified TIE or system
I/O pin.

Parameters:
pin_name For TIE pins, this is the Verilog name as generated by the TIE compiler.
This name always begins with the "TIE_" prefix and, for TIE lookups and queues,
has the suffixes specified in the TIE Reference Manual. For system I/O pins, this
is the name as specified in the Xtensa microprocessor data book.

See also:
get_sysio_bit_width for obtaining the width of system I/O TLM ports.
get_tie_bit_width for obtaining the width of TIE TLM ports.

xtsc_exception if pin_name is not found.

7.51.5.123 bool has_pin_level_interface (const char ∗ interface_name) const

Returns true if the named interface exists at pin-level. Returns true if the named interface
(lookup, input queue, output queue, import wire, export state, or system-level input/output)
exists at the pin-level.

Parameters:
interface_name This is either the TIE name as it appears in the user’s TIE code after
the lookup, queue, import_wire, or state keyword (this name should not begin with
the "TIE_" prefix) or it is the system-level input or output name as specified in the
Xtensa microprocessor data book.

7.51.5.124 bool has_pin_level_sysio_interface (const char ∗ sysio_name) const

Returns true if the named pin-level system-level input/output interface exists.

Parameters:
sysio_name This is the name as specified in the Xtensa microprocessor data book.

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7.51.5.125 bool has_pin_level_tie_interface (const char ∗ tie_name) const

Returns true if the named pin-level TIE interface exists. Returns true if the named pin-level
TIE interface (lookup, input queue, output queue, import wire, or export state) exists.

Parameters:
tie_name This is the name as it appears in the user’s TIE code after the lookup,
queue, import_wire, or state keyword. This name should not begin with the "TIE_"
prefix.

7.51.5.126 bool has_pin_level_lookup (const char ∗ lookup_name) const

Returns true if the named pin-level TIE lookup exists.

Parameters:
lookup_name Port name as it appears in the user’s TIE code after the lookup key-
word. This name should not begin with the "TIE_" prefix.

7.51.5.127 bool has_pin_level_input_queue (const char ∗ queue_name) const

Returns true if the named pin-level TIE input queue exists.

Parameters:
queue_name Port name as it appears in the user’s TIE code after the queue keyword.
This name should not begin with the "TIE_" prefix.

7.51.5.128 bool has_pin_level_output_queue (const char ∗ queue_name) const

Returns true if the named pin-level TIE output queue exists.

Parameters:
queue_name Port name as it appears in the user’s TIE code after the queue keyword.
This name should not begin with the "TIE_" prefix.

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7.51.5.129 bool has_pin_level_import_wire (const char ∗ wire_name) const

Returns true if the named pin-level TIE import wire exists.

Parameters:
wire_name Port name as it appears in the user’s TIE code after the import_wire key-
word. This name should not begin with the "TIE_" prefix.

7.51.5.130 bool has_pin_level_export_state (const char ∗ state_name) const

Returns true if the named pin-level TIE export state exists.

Parameters:
state_name Port name as it appears in the user’s TIE code after the state keyword.
This name should not begin with the "TIE_" prefix.

7.51.5.131 u32 get_tie_bit_width (const char ∗ tie_name) const

Get the width in bits of the specified TLM TIE interface. Get the width in bits of the specified
TLM TIE interface (lookup, input queue, output queue, import wire, or export state).
Note: For TIE lookups, the width returned is the width of the lookup response data (cor-
responding to the TIE_xxx_In Verilog port). See get_lookup_address_bit_width and get_-
lookup_data_bit_width.

Parameters:
tie_name This is the name as it appears in the user’s TIE code after the state, import_-
wire, queue, or lookup keyword. This name should not begin with the "TIE_"
prefix.

See also:
get_sysio_bit_width for obtaining the width of system I/O TLM ports.
get_pin_bit_width for obtaining the width of input/output pins.

xtsc_exception if tie_name is not found.

7.51.5.132 u32 get_lookup_address_bit_width (const char ∗ lookup_name) const

Get the width in bits of the specified TLM TIE lookup request address. Get the width in
bits of the specified TLM TIE lookup request address (corresponding to the width of the
TIE_xxx_Out Verilog port, where xxx = lookup_name).

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Parameters:
lookup_name Port name as it appears in the user’s TIE code after the lookup key-
word. This name should not begin with the "TIE_" prefix.

xtsc_exception if lookup_name is not found.

7.51.5.133 u32 get_lookup_data_bit_width (const char ∗ lookup_name) const

Get the width in bits of the specified TIE lookup response data. Get the width in bits of the
specified TIE lookup response data (corresponding to the width of the TIE_xxx_In Verilog
port, where xxx = lookup_name).

Parameters:
lookup_name Port name as it appears in the user’s TIE code after the lookup key-
word. This name should not begin with the "TIE_" prefix.

xtsc_exception if lookup_name is not found.

7.51.5.134 u32 get_lookup_latency (const char ∗ lookup_name) const

Get the latency of the specified TIE lookup. Get the latency of the specified TIE lookup.
Latency is defined as def_stage minus use_stage (where def_stage and use_stage are
specified in the TIE lookup section).

Parameters:
lookup_name Port name as it appears in the user’s TIE code after the lookup key-
word. This name should not begin with the "TIE_" prefix.

xtsc_exception if lookup_name is not found.

7.51.5.135 u32 get_sysio_bit_width (const char ∗ sysio_name) const

Get the width in bits of the specified system-level I/O TLM port. Get the width in bits of the
specified system-level input or output TLM port.

Parameters:
sysio_name This is the system-level input or output name as it appears in the Xtensa
microprocessor data book. sysio_name must refer to a TLM port.

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See also:
get_system_input_wire for a list of valid input names.
get_system_output_wire for a list of valid output names.
get_tie_bit_width for obtaining the width of TIE TLM ports.
get_pin_bit_width for obtaining the width of input/output pins.

xtsc_exception if sysio_name is not found.

7.51.5.136 void dump_sysio_wires (std::ostream & os = std::cout) const

Dump a list of all system-level wires. Dump a list of all system-level wires showing name
and width in bits to the specified ostream object.

7.51.5.137 void dump_system_input_wires (std::ostream & os = std::cout) const

Dump a list of all system-level input wires. Dump a list of all system-level input wires
showing name and width in bits to the specified ostream object.

7.51.5.138 void dump_system_output_wires (std::ostream & os = std::cout) const

Dump a list of all system-level output wires. Dump a list of all system-level output wires
showing name and width in bits to the specified ostream object.

7.51.5.139 bool has_sysio_wire (const char ∗ wire_name) const

Returns true if the named system-level input or output wire exists.

Parameters:
wire_name This is the system-level input or output wire name as it appears in the
Xtensa microprocessor data book.

7.51.5.140 bool has_system_input_wire (const char ∗ wire_name) const

Returns true if the named system-level input wire exists.

Parameters:
wire_name This is the system-level input wire name as it appears in the Xtensa mi-
croprocessor data book.

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7.51.5.141 bool has_system_output_wire (const char ∗ wire_name) const

Returns true if the named system-level output wire exists.

Parameters:
wire_name This is the system-level output wire name as it appears in the Xtensa
microprocessor data book.

7.51.5.142 u64 get_summary_count (const char ∗ counter_name) const

Get the value of the named ISS counter. If the named counter is not used on this core then
a value of 0 is returned. If an unrecognized counter name is passed in, an exception is
thrown.

Parameters:
counter_name The name of the counter whose value is desired.

Counter names include:

"Instructions"
"TakenBranches"
"ICacheReads"
"ICacheRefills"
"DCacheReads"
"DCacheWrites"
"DCacheRefills"
"DCacheCastouts"

7.51.5.143 u32 get_commit_stage () const

Get the number of the commit (W) stage of the pipeline. Pipeline stages are numbered as
follows:

Stage number: 0 1 2 3 4
5-stage pipeline: P I R E M W
7-stage pipeline: P H I R E L M W

(Stages before R are not numbered. P is not counted as a stage.)

P = Prefetch (not counted)

H = (letter before I)
I = Instruction fetch
R = Register access
E = Execute

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L = (letter before M)
M = Memory access
W = register Writeback (aka commit)

7.51.5.144 u32 get_last_stage () const

Get the number of the last stage of the pipeline.

See also:
get_commit_stage

7.51.5.145 xtsc_address get_pc (u32 stage = 0x80000000) const

Get the byte address of the instruction (that is, the program counter or PC) in the given
pipeline stage.

Parameters:
stage The pipeline stage containing the instruction whose address is desired. If the
special stage value of 0x80000000 is passed in then all stages are checked in re-
verse order starting with the W (commit) stage and going to the I stage (Inst Fetch
= 0xFFFFFFFF) until a stage without a bubble and without an invalid instruction
is found. If no such stage is found, then 0xFFFFFFFF is returned.

Returns:
The byte address of the instruction in the given stage (if the given stage contains a
bubble or an invalid instruction, 0xFFFFFFFF is returned).

See also:
get_commit_stage

7.51.5.146 void set_pc (xtsc_address address8)

Set the program counter (PC) to the specified address.

Parameters:
address8 The byte address to change the PC to.

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7.51.5.147 u32 get_instr_width (xtsc_address pc = 0xFFFFFFFF)

Get the width (number of bytes) of the instruction pointed to by argument pc.

Parameters:
pc The address of the instruction whose width is desired. Default = 0xFFFFFFFF
which means to use the current PC.

7.51.5.148 u32 disassemble (std::string & buffer, xtsc_address pc = 0xFFFFFFFF)

Get a disassembly of the instruction pointed to by argument pc.

Parameters:
buffer A reference to the string buffer in which to return the disassembly.
pc The address of the instruction to be disassembled. Default = 0xFFFFFFFF which
means to use the current PC.
Returns:
the width (number of bytes) of the instruction

7.51.5.149 bool has_register (const std::string & register_name) const

Determine if this core has the named register.

Parameters:
register_name The name of the register.

Returns:
true if the core has the named register, else return false.

7.51.5.150 void get_register_value (const std::string & register_name,

sc_dt::sc_unsigned & value) const

Get the value of the named register.

Parameters:
register_name The name of the desired register.
value A reference to an sc_unsigned object in which to put the register value.

xtsc_exception if register_name is not found.

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7.51.5.151 sc_dt::sc_unsigned get_register_value (const std::string &

register_name) const

Get the value of the named register.

Parameters:
register_name The name of the desired register.

xtsc_exception if register_name is not found.

Returns:
the value in the register.

7.51.5.152 void set_register_value (const std::string & register_name, const

sc_dt::sc_unsigned & value)

Set the value of the named register.

Parameters:
register_name The name of the desired register.
value The new value of the register.

xtsc_exception if register_name is not found.

7.51.5.153 std::map<std::string, sc_dt::sc_unsigned> get_all_registers () const

Get a map of all registers. Get a map of name-value pairs for all registers in this core
(including TIE state and TIE register files). The first item of the map pair is the name of the
register. The second item of the map pair is the value of the register as an sc_unsigned
object.

7.51.5.154 void set_multiple_registers (const std::map< std::string,

sc_dt::sc_unsigned > & register_map)

Set multiple registers. Use a map of name-value pairs to set multiple registers in this core
(including TIE state and TIE register files).

Parameters:
register_map A map of name-value pairs. The first item of the map pair is the name
of the register. The second item of the map pair is the value of the register as an
sc_unsigned object.

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xtsc_exception if any name in the map is not a valid register name for this core.

7.51.5.155 void dump_all_registers (std::ostream & os = std::cout) const

Dump all registers. Dump information about all registers in this core (including TIE state
and TIE register files) to the specified ostream object.

Parameters:
os The ostream object.

7.51.5.156 u32 get_register_bit_width (const std::string & register_name) const

Get the width in bits of the named register.

Parameters:
register_name The name of the desired register.

xtsc_exception if register_name is not found.

7.51.5.157 u32 get_static_vector_select () const

Get the latched value of the static vector select input. xtsc_exception if config does not
have the relocatable vectors option.

Returns:
the latched value of the static vector select input.

7.51.5.158 void set_static_vector_select (u32 value)

Set the value of the static vector select input.

Parameters:
value The new value of the static vector select input. If the core is already running this
value will not take effect until the core next comes out of reset.

xtsc_exception if config does not have the relocatable vectors option.

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7.51.5.159 u32 get_alt_reset_vec () const

Get the latched value of the AltResetVec input. xtsc_exception if config does not have the
AltResetVec input.

Returns:
the latched value of the AltResetVec input.

7.51.5.160 void set_alt_reset_vec (xtsc_address address)

Set the value of the AltResetVec input.

Parameters:
address The new value of the AltResetVec input. If the core is already running this
value will not take effect until the core next comes out of reset.

xtsc_exception if config does not have the AltResetVec input.

7.51.5.161 u32 get_interrupt_number (u32 binterrupt_index) const

Get the interrupt number given the BInterrupt index.

Parameters:
binterrupt_index The BInterrupt index of the pin whose corresponding interrupt num-
ber is desired.

xtsc_exception if binterrupt_index is out of range.

7.51.5.162 u32 get_binterrupt_index (u32 interrupt_number) const

Get the BInterrupt index given an external interrupt number.

Parameters:
interrupt_number The external interrupt number whose corresponding BInterrupt in-
dex is desired.

xtsc_exception if interrupt_number is out of range or corresponds to an internal interrupt.

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7.51.5.163 void load_file (const char ∗ file_name)

Load the specified file into target memory. Load bytes read from the specified text file
into target memory using calls to poke_physical(). The text file should contain lines in the
following format:

([@<Address>] <Byte>*)*

1. Numbers (<Address> or <Byte>) can be in decimal or hexadecimal. Hexadecimal

is specified using the C/C++ style '0x' prefix.
2. <Byte> cannot exceed 255 (0xFF).
3. If a <Byte> entry is not immediately preceeded in the file by an @<Address>
entry, then its address is one greater than the preceeding <Byte> entry.
4. If the first <Byte> entry in the file is not preceeded by an @<Address> entry,
then its address is zero.
5. Comments, extra whitespace, and blank lines are ignored. See xtsc_script_file.

Example text file contents:

@0x3ffe0000
0x00 0x01 0x02 0x03 // Poke 0 to 0x3ffe0000, 1 to 0x3ffe0001, etc.
0x09 0x05 0x06 0x07 // Poke 9 to 0x3ffe0004, 5 to 0x3ffe0005, etc.
@0x3fff0000 0x10 0x11 // Poke 16 to 0x3fff0000, 17 to 0x3fff0001

The file can be created by hand or by passing the --xtsc option to xt-dumpelf. For example:
xt-dumpelf --xtsc --width=32 a.out > loadfile.txt
If this method is called before simulation starts, then file_name is saved for later loading
during the SystemC start_of_simulation() callback.

Parameters:
file_name The path and name of file to be loaded. If desired multiple files can be
specfied by separating them with a comma.

See also:
xtsc_core_parms "SimLoadFile"
poke_physical

7.51.5.164 void load_program (const char ∗ program_name, const char ∗const

arguments[ ] = NULL)

Load the specified program into target memory. When this method is called, if sc_start()
has not yet been called (i.e. during elaboration), the program name and arguments are
saved for later loading during the SystemC end_of_elaboration() callback. If sc_start() has
been called (i.e. after elaboration), then the program is loaded during the load_program
call.

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Parameters:
program_name The path and name of the Xtensa executable to be loaded. If desired
multiple files to be loaded can be specfied by separating them with a comma.
arguments A pointer to a NULL-terminated array of c-strings. Each array entry except
the last is an additional command- line argument to be passed to the target pro-
gram’s main function as part of argv[]: int main(int argc, char ∗argv[]) The last ar-
ray entry must be NULL. If desired, arguments itself can be NULL, in which case
no additional command-line arguments will be passed to the target program’s
main() function (i.e. argc will be 1 and argv[0] will be the program name). Note:
The program name is always passed into main in argv[0] and should NOT be in-
cluded in arguments[]. Note: The "SimTargetProgram" parameter, if not NULL,
overrides any call to this method that occurs prior to the first call to sc_start().

7.51.5.165 void load_client (const char ∗ client_package)

Load the specified client to this core. See Chapter 5, Client Packages, of the Xtensa ISS
UG.

Parameters:
client_package The client package to load.

Client packages include:

"cycle_trace [<Arguments>] [<FileName>]"

Valid <Arguments> include:
--level 0|1|2
--start <StartCycle>
--stop <StopCycle>
"ferret [--cmdfile=<FileName>]"
"isa_profile [<Arguments>] [<FileName>]"
Valid <Arguments> include:
--disable
--progname
--formats
--no-formats
--slots
--no-slots
--unused-opcodes
"loadbin <FileName>@<Address>"
"pchistory <N>"
"profile [<Arguments> ...] [<FileName>]"
Valid <Arguments> include:
--all
--all-instructions
--basic-blocks
--branch-delay
--combined

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--cycles
--dcmiss
--dcmiss-cycles
--disable
--force-suffix
--icmiss
--icmiss-cycles
--instructions
--interlock
--uncached-ifetch
--uncached-load
"stackuse"
"summary [--disable] [<FileName>]"
"trace [<Arguments>] [<FileName>]"
Valid <Arguments> include:
--level 0|1|2|3|4|5|6
--nopeek
--peek
--short
--start <InstructionNumber>
--stop <InstructionNumber>
--tieprint
--wtime

See also:
xtsc_core_parms "SimClients" parameter
setup_debug() for information on using --xxprofile as a command line argument to
cause this method to be called for the "profile --all" client.

7.51.5.166 void load_client_file (const char ∗ file_name)

Load clients from a file. Load all clients in the specified file to this core. See Chapter 5,
Client Packages, of the Xtensa ISS UG.

Parameters:
file_name The name of a file containing a list of clients (one per line) to load to this
core.

See also:
load_client
xtsc_core_parms "SimClientFile" parameter

7.51.5.167 void send_client_command (const char ∗ command)

Send a client command. See Chapter 5, Client Packages, of the Xtensa ISS UG.

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Parameters:
command The client command to send.

Client commands include:

"isa_profile <DynamicCommand>"
Where <DynamicCommand> can be:
enable
disable
report <FileName>
reset
"pchistory state"
"profile <DynamicCommand>"
Where <DynamicCommand> can be:
enable
disable
pcsamples <FileName>
"stackuse state"
"trace <DynamicCommand>"
Where <DynamicCommand> can be:
level 0|1|2|3|4|5|6
start <InstructionNumber>
stop <InstructionNumber>

7.51.5.168 u32 get_store_buffer_count (u32 ls_unit)

Get the number of committed store-buffer entries. This method returns the number of
committed store-buffer entries in the specified load/store unit (cycle-accurate simulation
mode only).

Parameters:
ls_unit Zero-based index of the load/store unit of interest.

Note: This method is for internal/future use and may change without notice.

Returns:
the number of committed store-buffer entries.

7.51.5.169 bool get_store_buffer_info (u32 ls_unit, u32 sb_index, xtsc_sb_state

∗ p_sb_state, xtsc_address ∗ p_address, xtsc_byte_enables ∗
p_byte_enables, sc_dt::sc_unsigned ∗ p_dram_attribute)

This method retrieves the information about the store-buffer entry specified by input pa-
rameters ls_unit and sb_index. The information is returned through output parameters
p_sb_state, p_address, p_byte_enables, and p_dram_attribute.

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Parameters:
ls_unit Zero-based index of the load/store unit of interest.
sb_index Zero-based index of the store-buffer entry of interest. Must be less than the
value returned by get_store_buffer_count(ls_unit).
p_sb_state If non-NULL, upon return will be set to indicate the state of the specified
store-buffer entry:
• XTSC_SB_PENDING
• XTSC_SB_DISPATCHING
• XTSC_SB_DISPATCHED
p_address If non-NULL, upon return will be set to indicate the address for the speci-
fied store-buffer entry. The address is aligned to the load/store access width.
p_byte_enables If non-NULL, upon return will be set to indicate the byte enables for
the specified store-buffer entry.
p_dram_attribute If non-NULL, must point to a user-constructed sc_unsigned of
length 160 bits which upon return will be set to indicate the DRamWrAttr inter-
face value for the specified store-buffer entry.

Note: This method is for internal/future use and may change without notice.

Returns:
true on success (output parameters are set), false on failure (output parameters are
not set).

7.51.5.170 bool get_stage_store_info (u32 ls_unit, u32 stage, xtsc_address ∗

p_address, xtsc_byte_enables ∗ p_byte_enables, sc_dt::sc_unsigned
∗ p_dram_attribute)

This method retrieves the information about a store operation in the pipeline specified by
input parameters ls_unit and stage. The information is returned through output parameters
p_address, p_byte_enables, and p_dram_attribute.

Parameters:
ls_unit Zero-based index of the load/store unit of interest.
stage The number of the pipeline stage of interest. Must be 1 (E), 2 (L), or 3 (M) for
the 7-stage pipe;
p_address If non-NULL, upon return will be set to indicate the address for the spec-
ified pipeline store operation. The address is aligned to the load/store access
width.

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p_byte_enables If non-NULL, upon return will be set to indicate the byte enables for
the specified pipeline store operation.
p_dram_attribute If non-NULL, must point to a user-constructed sc_unsigned of
length 160 bits which upon return will be set to indicate the DRamWrAttr inter-
face value for the specified pipeline store operation.

Note: This method is for internal/future use and may change without notice.

Returns:
true if a valid store operation is found, false otherwise. Output parameters are set only
when the return value is true.

7.51.5.171 static std::vector<xtsc_core ∗> get_all_cores () [static]

Get a vector of all cores in the system. The cores appear in the vector in order of construc-
tion.

7.51.5.172 static void set_clock_phase_delta_factors (u32 pdf_a, u32 pdf_b, u32

pdf_c) [static]

Set the relative timing of the 3 clock phases (A, B, and C) for all cores. If the default
phase timing is not desired, this method can be used to set when the 3 clock phases (A,
B, and C) occur during a system clock period (the clock period can be obtained using the
xtsc_get_system_clock_period() method). The first posedge of system clock occurs at the
time specified by the "posedge_offset_factor" parameter of xtsc_initialize_parms and each
subsequent posedge clock occurs one system clock period later.
The phases, relative to the posedge of the system clock, are set by specifying what we will
call a "phase delta factor" or PDF.
The "phase delta" for a particular phase is defined as the time from the previous phase (or
posedge system clock in the case of phase A) to this phase.

posedge posedge
system clock system clock
N Phase Phase Phase N+1
| A B C |
| 0.2 0.3 0.9 |
| | | | |
<==============================================================================>
| | | |
| Phase | Phase | Phase |
| Delta | Delta | Delta |

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| A | B | C |
|<------------->|<----->|<------------------------------------->|

The "phase delta factor" for a particular phase is defined as the number to multiply the
SystemC time resolution by to get the "phase delta".
The "SystemC time resolution" is a SystemC concept. It can be obtained by calling sc_-
get_time_resolution().
The sum of the 3 "phase deltas" may not exceed the system clock period.
The system clock is a conceptual thing, not an actual sc_clock. Given the system clock
period (from xtsc_get_system_clock_period()) and the system clock posedge offset (from
xtsc_get_system_clock_posedge_offset()), one can compute what phase of which system
clock period any given SystemC simulation time (from sc_time_stamp()) corresponds to.
The events and deadlines that occur in each of the three phases are shown below (the
ordering is only BETWEEN clock phases--no ordering is implied WITHIN a clock phase):

Phase A: Deadline for nb_respond() calls (see xtsc_core::nb_respond).

xtsc_core internally handles responses obtained from nb_respond() calls.
nb_respond() for non-RSP_NACC responses to inbound PIF requests
nb_lock() to DRAM (for inbound PIF RCW)

Phase B: nb_request() to memories

nb_pop() to TIE input queues
nb_can_push() to TIE output queues
nb_push() to TIE output queues
nb_write() to TIE export states
nb_send_address() to TIE lookups
nb_get_data() to TIE lookups
TIE_xxx_Out_Req Pin-level TIE lookup request driven
TIE_xxx_Out Pin-level TIE lookup address driven
TIE_xxx_In Pin-level TIE lookup response data sampled
TIE_xxx_PopReq Pin-level TIE input queue pop request driven
TIE_xxx Pin-level TIE output queue push data driven
TIE_xxx_PushReq Pin-level TIE output queue push request driven
TIE_xxx_Full Pin-level TIE output queue full signal sampled
TIE_xxx Pin-level TIE export state driven

Phase C: Deadline for inbound PIF nb_request() calls.

nb_respond() for RSP_NACC responses to inbound PIF requests
nb_can_pop() to TIE input queues
nb_read() to TIE import wires
nb_is_ready() to TIE lookups
TIE_xxx_Rdy Pin-level TIE lookup ready signal sampled
TIE_xxx_Empty Pin-level TIE input queue empty signal sampled
TIE_xxx Pin-level TIE input queue data sampled
TIE_xxx Pin-level TIE import wire sampled

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Parameters:
pdf_a The "phase delta factor" for phase A.
pdf_b The "phase delta factor" for phase B.
pdf_c The "phase delta factor" for phase C.

Note: The above discussion assumes the core’s clock period is the same as the system
clock period, that is, that "SimClockFactor" is 1. For a core whose "SimClockFactor" is
greater than 1, the core’s phase A and phase B take place during the first system clock
period of the core’s clock period and the core’s phase C takes place during the last system
clock period of the core’s clock period. As an example, consider a core whose "SimClock-
Factor" is 3 running in a simulation with the system clock period equal to 1000 ps and with
default clock phase delta factors. In this case, the core’s first clock cycle is from 0 ps to
3000 ps and its phase A, phase B, and phase C for its first clock cycle occur at 200 ps, 300
ps, and 2900 ps respectively. The core’s second clock cycle is from 3000 to 6000 ps and
its phase A, phase B, and phase C for its second clock cycle occur at 3200 ps, 3300 ps,
and 5900 ps respectively. And so on. This assumes the "posedge_offset_factor" value of
xtsc_initialize_parms is 0 (the default). If a non-zero value for this parameter is specified
then all the times would be increased by an amount equal to the "posedge_offset_factor"
multiplied by the SystemC time resolution.

See also:
xtsc_initialize_parms
xtsc_respond_if::nb_respond
xtsc_set_system_clock_factor
xtsc_get_system_clock_factor
xtsc_get_system_clock_period
get_clock_phase_delta_factors
Information_on_memory_interface_protocols

7.51.5.173 static void get_clock_phase_delta_factors (u32 & pdf_a, u32 & pdf_b,
u32 & pdf_c) [static]

Get the relative timing of the 3 clock phases (A, B, and C) for all cores. This method gets
when the 3 clock phases (A, B, and C) occur during a system clock cycle.

Parameters:
pdf_a A reference to the object in which to return the "phase delta factor" for phase A.
pdf_b A reference to the object in which to return the "phase delta factor" for phase B.
pdf_c A reference to the object in which to return the "phase delta factor" for phase C.

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See also:
set_clock_phase_delta_factors

7.51.5.174 void set_turbo_max_relaxed_cycles (u32 cycle_limit)

Set max relaxed cycles for TurboXim. Sets this core’s relaxed cycle limit.

Parameters:
cycle_limit The max relaxed cycles expressed in terms of system clock periods.

7.51.5.175 u32 get_turbo_max_relaxed_cycles ()

Get the max relaxed cycles for TurboXim.

Returns:
This core’s max relaxed cycles in terms of system clock periods.

7.51.6 Member Data Documentation

7.51.6.1 Readme How_to_do_port_binding

Instructions for doing port binding in XTSC. The XTSC generic connection mechanism,
when available, is the recommended approach to perform port binding in XTSC. This
approach is available as long as both modules implement the xtsc_connection_interface
(which all modules in the XTSC core and component libraries do). The XTSC generic con-
nection mechanism is primarily documented under xtsc_connect(), xtsc::xtsc_port_type,
and xtsc_connection_interface; however, a brief summary with some tips, examples, and
links is given here.
A typical invocation of the xtsc_connect() method looks like this:

xtsc_connect(core0, "dram0", "slave_ports", mem_dram0);

Where core0 and mem_dram0 are instances of xtsc_core and xtsc_component::xtsc_-

memory, respectively, and where "dram0" and "slave_ports" are port tables of core0 and
mem_dram0, respectively. A port table is a list of one or more elementary ports. The port
tables passed to xtsc_connect() must be "conjugate pairs" (that is, each elementary port in
one port table must be capable of being connected to the corresponding elementary port
in the other port table).

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You can access the xtsc_connect() method from xtsc-run using the --connect command.
For example:

xtsc-run ... --connect=core0,dram0,slave_ports,mem_dram0 ...

Regardless of whether you are building your system using xtsc-run or sc_main, the xtsc-
run program can be used to get a list of port tables and elementary ports that an XTSC
module has once an instance of that module is created. Here are some examples:

xtsc-run -memory_port=dram0 -create_memory -show_ports -quit

xtsc-run -set_arbiter_parm=num_masters=2 -create_arbiter -show_ports -quit
xtsc-run -set_router_parm=num_slaves=2 -create_router -show_ports -quit
xtsc-run -create_queue -show_ports -quit
xtsc-run -create_xtsc_udma -show_ports -quit
xtsc-run -create_xtsc_cache -show_ports -quit
xtsc-run -create_wire -show_ports -quit
xtsc-run -set_lookup_parm=address_bit_width=1 -set_lookup_parm=data_bit_width=1 \
-create_lookup=lut -show_ports -quit

You can get more information about xtsc-run from the XTSC User’s Guide (xtsc_ug.pdf) or
from xtsc-run itself using the --man command. For example:

xtsc-run --man | less

Many examples of using xtsc_connect() and xtsc-run --connect can be found in the sc_-
main.cpp files (for xtsc_connect()) and in the ∗.inc files (for xtsc-run) in the XTSC examples
of your config installation. Here is an example location on Linux for the sample_config:

/xplorer/RF-2015.2/XtDevTools/install/builds/RF-2015.2-linux/sample_config/examples/XTSC

And here is an example location on MS Windows:

C:\xplorer\RF-2015.2\XtDevTools\install\builds\RF-2015.2-win32\sample_config\examples\XTSC

When xtsc_connect() and the xtsc-run --connect command are not available (because one
or both of the modules does not implement the xtsc_connection_interface), then manual
SystemC port binding must be done (typically in your sc_main.cpp code); however, this is
complicated somewhat by the fact that the ports (sc_port<T> and sc_export<T> objects)
are not named members of xtsc_core. Because of this, you must use an xtsc_core member
function to get each desired port object so that port binding can be done. Which member
function is used depends upon which Xtensa interface type is involved. See the applicable
How_to_do_XXX_binding links below.

See also:
How_to_do_memory_port_binding

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Chapter 7. Class Documentation

How_to_do_tx_xfer_port_binding
How_to_do_tie_lookup_binding
How_to_do_tie_queue_binding
How_to_do_tie_import_wire_binding
How_to_do_tie_export_state_binding
How_to_do_system_input_wire_binding
How_to_do_system_output_wire_binding
How_to_do_output_pin_binding;
How_to_do_input_pin_binding;
xtsc_connect()
xtsc_port_type
xtsc_connection_interface

Definition at line 1120 of file xtsc_core.h.

7.51.6.2 Readme How_to_do_memory_port_binding

Instructions for doing memory port binding. The XTSC generic connection mechanism,
when available, is the recommended approach to perform port binding in XTSC. This ap-
proach is available as long as both modules implement the xtsc_connection_interface. The
XTSC generic connection mechanism is primarily documented under xtsc_core::How_to_-
do_port_binding, xtsc_connect(), xtsc::xtsc_port_type, and xtsc_connection_interface and
is only briefly mentioned here.
Port binding of non-cache memory ports (both local memories and PIF/iDMA) can also be
accomplished by calling the get_request_port() and get_respond_export() methods to get
references to the appropriate sc_port and sc_export objects and then using these refer-
ences to do port binding in the callee’s code.
There are two versions of each of these latter two methods. The primary version takes a
memory port name and the secondary version takes a xtsc_core::memory_port enum.
The following table shows the legal memory port names. Although only lower-case names
are shown, the memory port name arguments in XTSC methods are case-insensitive.
Important Exception: the xtsc_connection_interface and related methods, most impor-
tantly, the xtsc_connect() method, are all case-sensitive,
When using the following table for the get_request_port() and get_respond_export() meth-
ods, each row represents one memory port. Multiple names on a single row are aliases for
the same memory port. For example, "dram" refers to the same memory port as "dram0".
When using the following table for the xtsc_connect() method (or the xtsc-run --connect
command) only the Second Column and last column are used (where the last column is
determined with respect to the row whose Second Column is being used). The Second Col-
umn shows the top-level port table name used to refer to all ports of that memory interface
and the last column shows the port table names of the memory ports that memory inter-
face potentially has (it may have fewer ports). For example, if the following xtsc_connect()

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 Chapter 7. Class Documentation

call is made and core0 has a dual-ported DataRAM0 interface and mem_dram0 has been
properly constructed to also be dual-ported, then the xtsc_connect() method will connect
both the "dram0p0" and "dram0p1" ports.

xtsc_connect(core0, "dram0", "slave_ports", mem_dram0);

The xtsc-run --connect command has the same arguments and order as the xtsc_connect()
method except that quotation marks and spaces are not used. For example:

xtsc-run ... --connect=core0,dram0,slave_ports,mem_dram0 ...

Table of port table names and memory port names (Second Column and last
column):

Second
Column
---------
"dram" "dram0" "dramls0" "dram0ls0" "dram0b0" "dram0p0"
"dramls1" "dram0ls1" "dram0b1" "dram0p1"
"dram0b2" "dram0p2"
"dram0b3" "dram0p3"
"dram0rw" "dram0ls0rd"
"dram0ls0wr"
"dram0ls1rd"
"dram0ls1wr"
"dram0ls2rd"
"dram0ls2wr"
"dram0dmard"
"dram0dmawr"
"dram0bs" "dram0b0s00"
"dram0b0s01"
"dram0b0s02"
"dram0b0s03"
"dram0b0s04"
"dram0b0s05"
"dram0b0s06"
"dram0b0s07"
"dram0b0s08"
"dram0b0s09"
"dram0b0s10"
"dram0b0s11"
"dram0b0s12"
"dram0b0s13"
"dram0b0s14"
"dram0b0s15"
"dram0b1s00"
"dram0b1s01"
"dram0b1s02"
"dram0b1s03"
"dram0b1s04"
"dram0b1s05"
"dram0b1s06"

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Chapter 7. Class Documentation

"dram0b1s07"
"dram0b1s08"
"dram0b1s09"
"dram0b1s10"
"dram0b1s11"
"dram0b1s12"
"dram0b1s13"
"dram0b1s14"
"dram0b1s15"
"dram0b2s00"
"dram0b2s01"
"dram0b2s02"
"dram0b2s03"
"dram0b2s04"
"dram0b2s05"
"dram0b2s06"
"dram0b2s07"
"dram0b2s08"
"dram0b2s09"
"dram0b2s10"
"dram0b2s11"
"dram0b2s12"
"dram0b2s13"
"dram0b2s14"
"dram0b2s15"
"dram0b3s00"
"dram0b3s01"
"dram0b3s02"
"dram0b3s03"
"dram0b3s04"
"dram0b3s05"
"dram0b3s06"
"dram0b3s07"
"dram0b3s08"
"dram0b3s09"
"dram0b3s10"
"dram0b3s11"
"dram0b3s12"
"dram0b3s13"
"dram0b3s14"
"dram0b3s15"

"dram1" "dram1ls0" "dram1b0" "dram1p0"

"dram1ls1" "dram1b1" "dram1p1"
"dram1b2" "dram1p2"
"dram1b3" "dram1p3"
"dram1rw" "dram1ls0rd"
"dram1ls0wr"
"dram1ls1rd"
"dram1ls1wr"
"dram1ls2rd"
"dram1ls2wr"
"dram1dmard"
"dram1dmawr"
"dram1bs" "dram1b0s00"
"dram1b0s01"
"dram1b0s02"

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 Chapter 7. Class Documentation

"dram1b0s03"
"dram1b0s04"
"dram1b0s05"
"dram1b0s06"
"dram1b0s07"
"dram1b0s08"
"dram1b0s09"
"dram1b0s10"
"dram1b0s11"
"dram1b0s12"
"dram1b0s13"
"dram1b0s14"
"dram1b0s15"
"dram1b1s00"
"dram1b1s01"
"dram1b1s02"
"dram1b1s03"
"dram1b1s04"
"dram1b1s05"
"dram1b1s06"
"dram1b1s07"
"dram1b1s08"
"dram1b1s09"
"dram1b1s10"
"dram1b1s11"
"dram1b1s12"
"dram1b1s13"
"dram1b1s14"
"dram1b1s15"
"dram1b2s00"
"dram1b2s01"
"dram1b2s02"
"dram1b2s03"
"dram1b2s04"
"dram1b2s05"
"dram1b2s06"
"dram1b2s07"
"dram1b2s08"
"dram1b2s09"
"dram1b2s10"
"dram1b2s11"
"dram1b2s12"
"dram1b2s13"
"dram1b2s14"
"dram1b2s15"
"dram1b3s00"
"dram1b3s01"
"dram1b3s02"
"dram1b3s03"
"dram1b3s04"
"dram1b3s05"
"dram1b3s06"
"dram1b3s07"
"dram1b3s08"
"dram1b3s09"
"dram1b3s10"
"dram1b3s11"

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Chapter 7. Class Documentation

"dram1b3s12"
"dram1b3s13"
"dram1b3s14"
"dram1b3s15"

"drom" "drom0" "dromls0" "drom0ls0" "drom0b0" "drom0p0"

"dromls1" "drom0ls1" "drom0b1" "drom0p1"
"drom0b2" "drom0p2"
"drom0b3" "drom0p3"

"iram" "iram0"

"iram1"

"irom" "irom0"

"uram" "uram0"

"xlmi" "xlmi0" "xlmils0" "xlmi0ls0" "xlmi0p0"

"xlmils1" "xlmi0ls1" "xlmi0p1"

"pif" "pif"

"idma0"

"sys" "pif"
"idma0"

In the special case of inbound PIF, the get_request_export() and get_respond_port() meth-
ods are used to get references to the appropriate sc_export and sc_port objects.
Here is a diagram showing the connections of an example system with two xtsc_core ob-
jects with PIF interfaces and two xtsc_component::xtsc_memory objects (each of which
is single-ported) followed by the port-binding code using the get_request_port() and get_-
respond_export() methods:

RSP
+<---------------------------------------------------+
| |
| +----------+ +----------+ |
| +--| |--+ +--| |--+ |
| | | | | REQ | | | | |
+-->| | core0 | |-------->| | memory0 | |--->+
| | | | | | | |
+--| |--+ +--| |--+
+----------+ +----------+

+----------+ +----------+
+--| |--+ +--| |--+
| | | | REQ | | | |
+-->| | core1 | |-------->| | memory1 | |--->+
| | | | | | | | | |
| +--| |--+ +--| |--+ |
| +----------+ +----------+ |

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 Chapter 7. Class Documentation

| |
| RSP |
+<---------------------------------------------------+

core0.get_request_port("pif")(*memory0.m_request_exports[0]);
core1.get_request_port("pif")(*memory1.m_request_exports[0]);
(*memory0.m_respond_ports[0])(core0.get_respond_export("pif"));
(*memory1.m_respond_ports[0])(core1.get_respond_export("pif"));

Using the recommended XTSC generic connection mechanism, the above 4-line code snip-
pet would be replaced with the following 2 calls to xtsc_connect():

xtsc_connect(core0, "pif", "slave_ports", memory0);

xtsc_connect(core1, "pif", "slave_ports", memory1);

Note: If a local memory port is left unbound, then the Xtensa ISS will use an internal model
for that memory. If the PIF is left unbound, then any attempt by the Xtensa program to
access this memory will result in a simulator (not Xtensa) exception being thrown.
Note: The Xtensa ISS uses an internal model for instruction and data caches. Connecting
external models to the instruction and data cache interfaces is not supported.

See also:
How_to_do_port_binding
xtsc_request_if
xtsc_respond_if
get_request_port
get_respond_export
get_request_export
get_respond_port
xtsc_connect()
xtsc_port_type
xtsc_connection_interface
Information_on_memory_interface_protocols

Definition at line 1427 of file xtsc_core.h.

7.51.6.3 Readme How_to_do_tx_xfer_port_binding

Instructions for doing XFER port binding (the BootLoader interface). Port binding of XFER
ports can be accomplished by calling the get_tx_xfer_port() method of the upstream TX
core and the get_tx_xfer_export() method of the downstream TX core to get references to
the appropriate sc_port and sc_export objects and then using these references to do port
binding in the callee’s code (typically, sc_main).

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Chapter 7. Class Documentation

To start the chain, the m_tx_xfer_port of an xtsc_tx_loader should be bound to the export
returned by the get_tx_xfer_export() method of the first TX in the chain.
To terminate the chain the port returned by the get_tx_xfer_port() of the last TX in the chain
should be bound to the m_tx_xfer_export of the xtsc_tx_loader.
Here is some example port-binding code for binding an xtsc_tx_loader, bootloader, to the
upstream TX, core0, thence to the downstream TX, core1, then terminating back at boot-
loader (this is shown here for documentation purposes; the recommended technique is to
use the appropriate connect() method):

bootloader.m_tx_xfer_port(core0.get_tx_xfer_export());
core0.get_tx_xfer_port()(core1.get_tx_xfer_export());
core1.get_tx_xfer_port()(bootloader.m_tx_xfer_export);

See also:
How_to_do_port_binding
xtsc_tx_xfer_if
get_tx_xfer_port
get_tx_xfer_export
xtsc_tx_loader

Definition at line 1518 of file xtsc_core.h.

7.51.6.4 Readme How_to_do_tie_lookup_binding

Instructions for doing TIE lookup port binding. The XTSC generic connection mechanism,
when available, is the recommended approach to perform port binding in XTSC. This ap-
proach is available as long as both modules implement the xtsc_connection_interface. The
XTSC generic connection mechanism is primarily documented under xtsc_core::How_to_-
do_port_binding, xtsc_connect(), xtsc::xtsc_port_type, and xtsc_connection_interface and
is only briefly mentioned here.
Port binding of TIE lookups can also be accomplished by calling the get_lookup() method
with the lookup name to get a reference to the appropriate sc_port and then using it to do
port binding in the callee’s code.
Here is a code snippet showing the instantiation of an xtsc_component::xtsc_lookup and
connecting it to the TIE lookup named "lut" of an xtsc_core object named core0 (it assumes
there is a lookup table file named "lut.rom"):

// Get the address and data bit widths and whether the lookup has a ready
u32 address_width = core0.get_lookup_address_bit_width("lut");
u32 data_width = core0.get_lookup_data_bit_width("lut");
u32 latency = core0.get_lookup_latency("lut");
bool has_ready = core0.has_lookup_ready("lut");

// Create the parameters for an xtsc_lookup

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xtsc_lookup_parms lookup_parms(address_width,
data_width,
has_ready,
"lut.rom",
"0xDEADBEEF");
lookup_parms.set("latency", latency);

// Instantiate the xtsc_lookup

xtsc_lookup lookup_table("lut", lookup_parms);

// Connect the xtsc_lookup to the xtsc_core

core0.get_lookup("lut")(lookup_table.m_lookup);

Using the recommended XTSC generic connection mechanism, the last line above would
be replaced by:

xtsc_connect(core0, "lut", "", lookup_table);

In the above call to xtsc_connect(), the third parameter is the empty string which means to
use the default port (which in this case is "lookup").
The xtsc_lookup_parms class has a convenience constructor that takes a reference to an
xtsc_core object and the name of a TIE lookup and uses them to find the address and
data bit widths, the latency, and whether or not the lookup has a ready interface. See
xtsc_component::xtsc_lookup_parms::xtsc_lookup_parms.

See also:
How_to_do_port_binding
xtsc_lookup_if
get_lookup
xtsc_component::xtsc_lookup_parms
xtsc_component::xtsc_lookup
has_lookup
has_lookup_ready
get_lookup_address_bit_width
get_lookup_data_bit_width
xtsc_connect()
xtsc_port_type
xtsc_connection_interface

Definition at line 1609 of file xtsc_core.h.

7.51.6.5 Readme How_to_do_tie_queue_binding

Instructions for doing TIE queue port binding. The XTSC generic connection mechanism,
when available, is the recommended approach to perform port binding in XTSC. This ap-

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Chapter 7. Class Documentation

proach is available as long as both modules implement the xtsc_connection_interface. The

XTSC generic connection mechanism is primarily documented under xtsc_core::How_to_-
do_port_binding, xtsc_connect(), xtsc::xtsc_port_type, and xtsc_connection_interface and
is only briefly mentioned here.
Port binding of TIE input or output queues can also be accomplished by calling the ap-
propriate get_output_queue() or get_input_queue() method with the queue_name to get
a reference to the appropriate sc_port and then using it to do port binding in the callee’s
code.
Here is a code snippet showing the instantiation of an xtsc_component::xtsc_queue named
queue_0_1 and connecting it to the sc_port of a TIE ouput queue named "OUTQ1" of an
xtsc_core object named core0 and to the sc_port of a TIE input queue named "INQ1" of an
xtsc_core object named core1:

// Get queue bit width

u32 bit_width = core0.get_tie_bit_width("OUTQ1");

// Configuration parameters for an xtsc_queue

xtsc_queue_parms queue_parms(bit_width, 2);

// Construct the queue

xtsc_queue queue_0_1("queue_0_1", queue_parms);

// Connect the queue to the xtsc_core objects

core0.get_output_queue("OUTQ1")(queue_0_1.m_producer);
core1.get_input_queue ("INQ1" )(queue_0_1.m_consumer);

Using the recommended XTSC generic connection mechanism, the last 2 lines above
would be replaced with the following 2 calls to xtsc_connect():

xtsc_connect(core0, "OUTQ1", "queue_push", queue_0_1);

xtsc_connect(core1, "INQ1", "queue_pop", queue_0_1);

The xtsc_queue_parms class has a convenience constructor that takes a reference to an

xtsc_core object and the name of a TIE queue and uses them to find the queue bit width.
See xtsc_component::xtsc_queue_parms::xtsc_queue_parms().

See also:
How_to_do_port_binding
xtsc_queue_push_if
xtsc_queue_pop_if
get_output_queue
get_input_queue
xtsc_component::xtsc_queue_parms::xtsc_queue_parms()
xtsc_component::xtsc_queue
xtsc_connect()
xtsc_port_type

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xtsc_connection_interface

Definition at line 1682 of file xtsc_core.h.

7.51.6.6 Readme How_to_do_tie_import_wire_binding

Instructions for doing TIE import wire port binding. The XTSC generic connection mech-
anism, when available, is the recommended approach to perform port binding in XTSC.
This approach is available as long as both modules implement the xtsc_connection_-
interface. The XTSC generic connection mechanism is primarily documented un-
der xtsc_core::How_to_do_port_binding, xtsc_connect(), xtsc::xtsc_port_type, and xtsc_-
connection_interface and is only briefly mentioned here.
As an alternative approach, the get_import_wire() method can be called by the user to get
a reference to the sc_port<xtsc_wire_read_if, NSPP> object that is the xtsc_core’s input
port for the import wire specified by wire_name.
One technique would be for the user’s code to instantiate an xtsc_component::xtsc_wire
object of the appropriate size, call get_import_wire(), and then bind the returned sc_-
port<xtsc_wire_read_if, NSPP> to the xtsc_component::xtsc_wire channel using normal
SystemC port binding.

See also:
How_to_do_port_binding
xtsc_wire_read_if
get_import_wire
get_export_state
xtsc_component::xtsc_wire
How_to_do_tie_export_state_binding for a code example.
xtsc_connect()
xtsc_port_type
xtsc_connection_interface

Definition at line 1744 of file xtsc_core.h.

7.51.6.7 Readme How_to_do_tie_export_state_binding

Instructions for doing TIE export state port binding. The XTSC generic connection mech-
anism, when available, is the recommended approach to perform port binding in XTSC.
This approach is available as long as both modules implement the xtsc_connection_-
interface. The XTSC generic connection mechanism is primarily documented un-
der xtsc_core::How_to_do_port_binding, xtsc_connect(), xtsc::xtsc_port_type, and xtsc_-
connection_interface and is only briefly mentioned here.

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As an alternative approach, the get_export_state() method can be called by the user to get
a reference to the sc_port<xtsc_wire_write_if, NSPP> object that is the xtsc_core’s output
port for the export state specified by state_name.
One technique would be for the user’s code to instantiate an xtsc_component::xtsc_wire
object of the appropriate size, call get_export_state(), and then bind the returned sc_-
port<xtsc_wire_write_if, NSPP> to the xtsc_component::xtsc_wire channel using normal
SystemC port binding. For example, the following code snippet connects a 50-bit xtsc_-
component::xtsc_wire from the "status" export state of core0 to the "control" import wire of
core1.

// Configuration parameters for an xtsc_wire

xtsc_wire_parms wire_parms(50);

// Construct the wire

xtsc_wire core0_to_core1("core0_to_core1", wire_parms);

// Connect the wire

core0.get_export_state("status" )(core0_to_core1);
core1.get_import_wire ("control")(core0_to_core1);

Using the recommended XTSC generic connection mechanism, the last 2 lines above
would be replaced with the following 2 calls to xtsc_connect():

xtsc_connect(core0, "status", "wire_write", core0_to_core1);

xtsc_connect(core1, "control", "wire_read", core0_to_core1);

The xtsc_wire_parms class has a convenience constructor that takes a reference to an

xtsc_core object and the name of a TIE export state or import wire or system-level output
and uses them to find the wire bit width. See xtsc_component::xtsc_wire_parms::xtsc_-
wire_parms().

See also:
How_to_do_port_binding
xtsc_wire_write_if
get_export_state
get_import_wire
xtsc_component::xtsc_wire_parms::xtsc_wire_parms()
xtsc_component::xtsc_wire
xtsc_connect()
xtsc_port_type
xtsc_connection_interface

Definition at line 1815 of file xtsc_core.h.

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7.51.6.8 Readme How_to_do_output_pin_binding

Instructions for doing output pin binding (Pin-level). The XTSC generic connection mech-
anism, when available, is the recommended approach to perform port binding in XTSC.
This approach is available as long as both modules implement the xtsc_connection_-
interface. The XTSC generic connection mechanism is primarily documented un-
der xtsc_core::How_to_do_port_binding, xtsc_connect(), xtsc::xtsc_port_type, and xtsc_-
connection_interface and is only briefly mentioned here.
As an alternative approach, the get_output_pin() method can be called by the user to get
a reference to the sc_out<sc_bv_base> object that is the xtsc_core’s pin-level output port
for the TIE or system output pin specified by output_pin_name.
Here are some of the things a system output pin can be connected to using an instance of
sc_signal<sc_bv_base> or the xtsc_signal_sc_bv_base convenience class:

• A Verilog module

• A pin-level import wire of an xtsc_core

• A system input pin of an xtsc_core

Here is an example code snippet showing how to connect a pin-level output of an xtsc_core
(PWaitMode) to an sc_signal<sc_bv_base>:

char *pins[] = { "PWaitMode", NULL };

core_parms.set("SimPinLevelInterfaces", pins);
xtsc_core core("core", core_parms);
sc_length_context lc(1);
sc_signal<sc_bv_base> PWaitMode("PWaitMode");
core.get_output_pin("PWaitMode")(PWaitMode);

See also:
How_to_do_port_binding
get_pin_bit_width
get_output_pin
xtsc_signal_sc_bv_base
xtsc_component::xtsc_wire_source
How_to_do_input_pin_binding;
xtsc_connect()
xtsc_port_type
xtsc_connection_interface

Definition at line 1871 of file xtsc_core.h.

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7.51.6.9 Readme How_to_do_input_pin_binding

Instructions for doing input pin binding (Pin-level). The XTSC generic connection mech-
anism, when available, is the recommended approach to perform port binding in XTSC.
This approach is available as long as both modules implement the xtsc_connection_-
interface. The XTSC generic connection mechanism is primarily documented un-
der xtsc_core::How_to_do_port_binding, xtsc_connect(), xtsc::xtsc_port_type, and xtsc_-
connection_interface and is only briefly mentioned here.
As an alternative approach, the get_input_pin() method can be called by the user to get a
reference to the sc_in<sc_bv_base> object that is the xtsc_core’s pin-level input port for
the TIE or system input pin specified by input_pin_name.
Here are some of the things a system input pin can be connected to using an instance of
sc_signal<sc_bv_base> or the xtsc_signal_sc_bv_base convenience class:

• A Verilog module
• An xtsc_wire_source pin-level output port
• A pin-level export state of an xtsc_core
• A system output pin of an xtsc_core

Here is an example code snippet showing how to connect a pin-level output of an xtsc_-
wire_source to a pin-level input (BInterrupt) of an xtsc_core using the xtsc_signal_sc_bv_-
base convenience class:

char *pins[] = { "BInterrupt", NULL };

core_parms.set("SimPinLevelInterfaces", pins);
xtsc_core core("core", core_parms);

u32 num_bits = core.get_pin_bit_width("BInterrupt");

source_parms.set("bit_width", num_bits);
source_parms.set("pin_level", true);
xtsc_wire_source source("source", source_parms);

xtsc_signal_sc_bv_base BInterrupt("BInterrupt", num_bits);

source.get_output_pin("m_pin")(BInterrupt);
core.get_input_pin("BInterrupt")(BInterrupt);

See also:
How_to_do_port_binding
get_pin_bit_width
get_input_pin
xtsc_signal_sc_bv_base
xtsc_component::xtsc_wire_source

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How_to_do_output_pin_binding;
xtsc_connect()
xtsc_port_type
xtsc_connection_interface

Definition at line 1947 of file xtsc_core.h.

7.51.6.10 Readme How_to_do_system_input_wire_binding

Instructions for doing system input wire port binding (TLM). The XTSC generic con-
nection mechanism, when available, is the recommended approach to perform port
binding in XTSC. This approach is available as long as both modules implement the
xtsc_connection_interface. The XTSC generic connection mechanism is primarily docu-
mented under xtsc_core::How_to_do_port_binding, xtsc_connect(), xtsc::xtsc_port_type,
and xtsc_connection_interface and is only briefly mentioned here.
As an alternative approach, the get_system_input_wire() method can be called by the user
to get a reference to the sc_export<xtsc_wire_write_if> object that is the xtsc_core’s TLM
input port for the system input wire specified by wire_name.
Some of the things a system input wire can be bound to are:

• An xtsc_component::xtsc_mmio output port

• An xtsc_component::xtsc_wire_logic output port

• An xtsc_component::xtsc_wire_source output port

• An export state of an xtsc_core

• A system output wire of an xtsc_core

One example usage would be for the user’s code to instantiate an xtsc_component::xtsc_-
wire_source object of the appropriate size, call get_system_input_wire(), and then bind the
returned sc_export<xtsc_wire_write_if> with the xtsc_component::xtsc_wire_source::m_-
write member (which is of type sc_port<xtsc_wire_write_if, NSPP>) using normal Sys-
temC port binding as illustrated below:

xtsc_core core("core", core_parms);

u32 num_bits = core.get_sysio_bit_width("BInterrupt");
xtsc_wire_source_parms source_parms(num_bits, "int_driver.vec");
xtsc_wire_source int_driver("int_driver", source_parms);
int_driver.m_write(core.get_system_input_wire("BInterrupt"));

Using the recommended XTSC generic connection mechanism, the last line above would
be replaced with the following call to xtsc_connect():

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xtsc_connect(int_driver, "m_write", "BInterrupt", core);

See also:
How_to_do_port_binding
xtsc_wire_write_if
get_sysio_bit_width
get_system_input_wire
get_system_output_wire
xtsc_component::xtsc_mmio
xtsc_component::xtsc_wire_logic
xtsc_component::xtsc_wire_source
xtsc_connect()
xtsc_port_type
xtsc_connection_interface

Definition at line 2024 of file xtsc_core.h.

7.51.6.11 Readme How_to_do_system_output_wire_binding

Instructions for doing system output wire port binding. The XTSC generic connec-
tion mechanism, when available, is the recommended approach to perform port bind-
ing in XTSC. This approach is available as long as both modules implement the xtsc_-
connection_interface. The XTSC generic connection mechanism is primarily docu-
mented under xtsc_core::How_to_do_port_binding, xtsc_connect(), xtsc::xtsc_port_type,
and xtsc_connection_interface and is only briefly mentioned here.
As an alternative approach, the get_system_output_wire() method can be called by the
user to get a reference to the sc_port<xtsc_wire_write_if, NSPP> object that is the xtsc_-
core’s output port for the system output wire specified by wire_name.
Some of the things a system output wire can be bound to are:

• An xtsc_component::xtsc_wire

• An xtsc_component::xtsc_mmio input port

• An xtsc_component::xtsc_wire_logic input port

• A system input wire of an xtsc_core

One example would be for the user’s code to instantiate an xtsc_component::xtsc_wire

object of the appropriate size, call get_system_output_wire(), and then bind the returned
sc_port<xtsc_wire_write_if, NSPP> to the xtsc_component::xtsc_wire channel using nor-
mal SystemC port binding:

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// Configuration parameters for an xtsc_wire

xtsc_wire_parms wire_parms(1);

// Construct the wire

xtsc_wire PWaitMode("PWaitMode", wire_parms);

// Connect the wire

core.get_system_output_wire("PWaitMode")(PWaitMode);

Using the recommended XTSC generic connection mechanism, the last line above would
be replaced with the following call to xtsc_connect():

xtsc_connect(core, "PWaitMode", "wire_write", PWaitMode);

See xtsc_core::How_to_do_tie_export_state_binding for ways to simplify the above code

using the convenience xtsc_component::xtsc_wire_parms::xtsc_wire_parms() constructor.

See also:
How_to_do_port_binding
xtsc_wire_write_if
get_sysio_bit_width
get_system_output_wire
get_system_input_wire
xtsc_component::xtsc_wire_parms::xtsc_wire_parms()
xtsc_component::xtsc_wire
How_to_do_tie_export_state_binding
xtsc_connect()
xtsc_port_type
xtsc_connection_interface

Definition at line 2122 of file xtsc_core.h.

7.51.6.12 Readme Information_on_memory_interface_protocols

Information on memory interface protocols. The purpose of these comments is to describe

the protocols required when an xtsc_core is communicating through one of the memory
interfaces. This section may be of interest to the general XTSC user but is intended espe-
cially for developers of modules that will connect to one or more of the memory interfaces.
The memory interface types are:

1. Data RAM (DRAM)

2. Data ROM (DROM)

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3. Instruction RAM (IRAM)

4. Instruction ROM (IROM)

5. Unified RAM (URAM)

6. Xtensa Local Memory Interface (XLMI)

7. Processor Interface (PIF/iDMA)

8. Inbound Processor Interface (IPIF)

9. Inbound Snoop (snoop) [Reserved for future use]

The first 6 types above (DRAM, DROM, IRAM, IROM, URAM, and XLMI) are sometimes
refered to as the "local" memory interfaces.
The xtsc_core class uses the xtsc_request_if and xtsc_respond_if interfaces classes for
communications through each of the memory interfaces. The primary methods are xtsc_-
request_if::nb_request() and xtsc_respond_if::nb_respond() which move a payload object
of class xtsc_request and xtsc_response, respectively. This type of scheme is sometimes
referred to as a "split transaction" protocol because each complete transaction (for exam-
ple, a read transaction or a write transaction) is split into two phases: a request phase
(using the xtsc_request_if::nb_request() method) and a response phase (using the xtsc_-
response_if::nb_respond() method).
Note: Data object ownership: For all Xtensa TLM interface methods, the caller module
owns the data object being passed by the interface and the callee module may make no
assumptions about the data object’s validity after the callee module returns from the inter-
face method call. If the callee module will need information that is stored in the data object
after returning from the interface method call, then the callee module must make a copy
of that information prior to returning from the interface method call. As an example, if a
memory module needs access to information in the xtsc_request object passed in to it via
the xtsc_request_if::nb_request() call, then the memory module must copy that information
prior to returning from the xtsc_request_if::nb_request() call.
The xtsc_request class defines 6 request transaction types in xtsc_request::type_t that are
supported by xtsc_core. The 6 types are READ, BLOCK_READ, RCW, WRITE, BLOCK_-
WRITE, and SNOOP.
Note: Although, xtsc_core neither generates nor accepts BURST_WRITE and BURST_-
READ transactions, it does accept 16-byte WRITE transactions on the inbound PIF inter-
face with byte enables of 0x0FFF, 0xFFF0, and 0x0FF0.
The following table shows which of the 6 request transaction types supported by xtsc_core
are allowed on a particular memory interface type:

READ BLOCK_READ BURST_READ RCW WRITE BLOCK_WRITE BURST_WRITE SNOOP

DRAM Yes No No No Yes No No No
DROM Yes No No No No No No No

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IRAM Yes No No No Yes No No No

IROM Yes No No No No No No No
URAM Yes No No No Yes No No No
XLMI Yes No No No Yes No No No
PIF/iDMA Yes Yes-1,6 Yes-6 Yes-3 Yes Yes-2,6 Yes-6 No
IPIF-5 Yes Yes-4 No Yes-4 Yes Yes-4 No No
snoop No No No No No No No Yes

Footnote 1: The Xtensa core will only generate BLOCK_READ transactions for uncached
read requests when the load width is wider than the PIF data width and for cache line
misses on processor configurations which have a cache line that is wider than the PIF data
bus.
Footnote 2: The Xtensa core will only generate BLOCK_WRITE transactions for cache
castouts and this will only occur on processor configurations which have a write-back cache
whose cache line is wider than the PIF data bus.
Footnote 3: The Xtensa core will only generate RCW transactions for the S32C1I instruction
and this can only occur on processors which have the Xtensa LX synchronization option.
Footnote 4: The Xtensa core will split BLOCK_READ, RCW, and BLOCK_WRITE requests
received on the inbound PIF interface into individual READ and WRITE requests as re-
quired before re-issuing them to the appropriate IRAM, DRAM, or XLMI memory.
Footnote 5: Inbound PIF can target IRAM, DRAM, or XLMI if the processor was configured
to allow inbound PIF on that interface. Inbound PIF can never target IROM or DROM.
Footnote 6: Xtensa LX iDMA hardware prior to the RG-2017.8 release uses BLOCK_READ
and BLOCK_WRITE transactions on its iDMA PIF port; while Xtensa LX iDMA hardware
from RG-2017.8 and later uses BURST_READ and BURST_WRITE transactions on its
iDMA PIF port. Xtensa LX does not generate BURST_READ or BURST_WRITE trans-
actions on its main (non-iDMA) PIF interface. See "iDMAPIFBurst" in xtsc_core_parms.
A BURST_WRITE sequence consists of N consecutive BURST_WRITE request transfers
(2<=N<=16). A BURST_READ sequence consists of a single BURST_READ request for
N response transfers (2<=N<=16).
A BLOCK_WRITE sequence consists of 2, 4, 8, or 16 consecutive BLOCK_WRITE request
transfers.
Each request on a memory interface should occur in a different clock cycle (that is you
should not submit two requests on the same memory interface in the same clock cycle).
Each non-RSP_NACC response on a memory interface should occur in a different clock
cycle (that is you should not submit two non-RSP_NACC responses on the same memory
interface in the same clock cycle).
The xtsc_response class defines 5 response status values (in xtsc_response::status_t).
The 5 status values are RSP_OK, RSP_ADDRESS_ERROR, RSP_DATA_ERROR, RSP_-
ADDRESS_DATA_ERROR, and RSP_NACC.
The xtsc_response::RSP_OK response status is used to indicate a successfully completed

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READ, RCW, WRITE, or BLOCK_WRITE request. It is also used with each successful
BLOCK_READ response. If the response status is RSP_OK to a READ, RCW, or BLOCK_-
READ request, then the response will also contain a data payload (available using the
xtsc_response.get_buffer() method). An RSP_OK response status to an RCW request
does NOT mean that the write took place; to determine if the write took place you must
compare the data payload returned with the response to the data value sent in the first
RCW request.
Note: The Xtensa Instruction Set Simulator (ISS) requires a response after each WRITE
transaction on all memory interface and after the last transfer of a sequence of BLOCK_-
WRITE transfers on the PIF and iDMA interfaces. This rule applies even to configurations
that don’t have the write response option. The "SimPIFFakeWriteResponses" parameter
controls whether or not xtsc_core will automatically supply write responses for requests on
the PIF and iDMA interfaces on configurations without the write response option.
The xtsc_response::RSP_NACC response status models the busy interface of a local
memory interface and it models the ReqRdy interface on the PIF/iDMA and inbound PIF
interfaces, respectively. See below for special timing requirements of RSP_NACC.
An error response status (xtsc_response::RSP_ADDRESS_ERROR, xtsc_-
response::RSP_DATA_ERROR, and xtsc_response::RSP_ADDRESS_DATA_ERROR)
typically results in an exception being raised on the processor that issued the request.
The nb_respond() return value is used to model the PORespRdy/PIRespRdy interface on
the PIF and inbound PIF interfaces, respectively. For the local memory interfaces, xtsc_-
core always returns true to the nb_respond() call.
Port Associated With Each Xtensa TLM Call of xtsc_request_if and xtsc_debug_if:
The xtsc_core model always sends xtsc_request_if::nb_request() calls out the port associ-
ated with the hardware operation being modeled. For the xtsc_debug_if::nb_peek(), xtsc_-
debug_if::nb_poke, and xtsc_debug_if::nb_fast_access calls associated with multi-ported,
non-banked local data memories there is some ambiguity in which port to use because the
port is associated with the hardware origin of the call (e.g. which Ld/St unit) and there is no
fixed concept of the "hardware origin" of the xtsc_debug_if calls. In these cases, xtsc_core
sends the call out the lowest numbered port as shown here:

Memory Interface Non-Split R/W Split R/W

dram0 "dram0ls0" "dram0ls0rd"
dram1 "dram1ls0" "dram1ls0rd"
drom0 "drom0ls0"
xlmi "xlmi0ls0"

ISS Timing Requirements:

Note: In the following discussion, a deadline of Phase A means the nb_respond() call must
occur PRIOR to Phase A. See set_clock_phase_delta_factors() for more information about
clock phases.
ISS Timing Requirements for local memories: The deadline for an xtsc_response::RSP_-
OK response from a local memory for a request that was made in clock cycle N is Phase

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A of clock cycle N+1 for a 5-stage pipeline and is Phase A of clock cycle N+2 for a 7-stage
pipeline. The deadline for an xtsc_response::RSP_NACC (to model the Busy signal) for a
request that was made in clock cycle N is Phase A of clock cycle N+1 for both 5-stage and
7-stage pipelines.
ISS Timing Requirements for PIF/iDMA devices: The deadline for a xtsc_response::RSP_-
NACC from a PIF device for a request that was made in clock cycle N is Phase A of clock
cycle N+1 regardless of the number of pipeline stages. Responses with a status_t of other
than xtsc_response::RSP_NACC do not have a deadline.
The above ISS timing requirements are more lenient then the real hardware timing require-
ments in the following ways:
1. An early response is accepted by the ISS as though it occurred at the proper time. For
example, local memory hardware timing requirements for a read request which occured in
clock cycle N dictate that the response occur in clock cycle N+1 (5-stage pipeline) or clock
cycle N+2 (7-stage pipeline). However, the ISS will accept the response in clock cycle N.
Of course, the response can never precede the request.
2. Although hardware timing requirements dictate that a xtsc_response::RSP_NACC to a
PIF/iDMA request occur in the same clock cycle (say clock cycle N) as the request, the ISS
will accept a slightly late xtsc_response::RSP_NACC as long as it occurs prior to Phase A
of clock cycle N+1.

See also:
xtsc_request_if::nb_request
xtsc_respond_if::nb_respond
xtsc_request
xtsc_response
set_clock_phase_delta_factors
How_to_do_memory_port_binding

Definition at line 2362 of file xtsc_core.h.

The documentation for this class was generated from the following file:

• xtsc_core.h

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7.52 xtsc_core_parms Class Reference

Constructor parameters for a xtsc_core object.

#include <xtsc/xtsc_core.h>Inheritance diagram for xtsc_core_parms:

xtsc_parms

xtsc_core_parms

Collaboration diagram for xtsc_core_parms:

xtsc_parms

xtsc_core_parms

Public Member Functions

• xtsc_core_parms (const char ∗XTENSA_CORE=NULL, const char ∗XTENSA_-

SYSTEM=NULL, const char ∗XTENSA_PARAMS=NULL)
Constructor for an xtsc_core_parms object.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

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Private Member Functions

• void ctor_helper (const char ∗XTENSA_CORE, const char ∗XTENSA_SYSTEM,

const char ∗XTENSA_PARAMS)

7.52.1 Detailed Description

Constructor parameters for a xtsc_core object. This class contains the parameters needed
to construct an xtsc_core object. When the xtsc_core_parms constructor is called, it
populates the xtsc_core_parms object with the three parameters passed in to it (i.e.
"XTENSA_CORE, "XTENSA_SYSTEM", and "XTENSA_PARAMS) and with numerous ad-
ditional Xtensa parameters obtained from the core’s configuration database in the Xtensa
registry. All the names and values of these additional parameters can be seen using the
xtsc_parms::dump() method. For example:

xtsc_core_parms core_parms("le_32");
core_parms.dump();

Most of the parameters in the core’s configuration database are read-only in XTSC. That is,
the only way to change them for an XTSC simulation is by building a new core configuration.
Here is an alphabetical list of read-only parameters:

Name Type Description

------------------ ---- -----------------------------------------------

"AltResetVec" u32 Initial value of the AltResetVec input.

Default value is same as "StaticVectorBase1".

"BInterruptMap" u32 This value expresses the mapping between the

individual interrupt lines in the BInterrupt
input and their corresponding bit position in
the INTENABLE and INTERRUPT registers. When
expressed in binary and read from lsb to msb
each bit with a value of 1 corresponds to an
interrupt line in the BInterrupt input vector.
The first 1 bit encountered in the
"BInterruptMap" value defines the interrupt
number (index into INTENABLE and INTERRUPT) of
BInterrupt[0]. The second 1 bit encountered
defines the interrupt number of BInterrupt[1],
etc. For example, a "BInterruptMap" value of
0x1a8448b0 has the binary value shown below and
defines the mapping shown.

3 2 1
10987654321098765432109876543210 (INTENABLE/INTERRUPT index)
0x1a8448b0 = 32'b00011010100001000100100010110000
98 7 6 5 4 3 2 10 (BInterupt index)

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BInterrupt[0] <=> INTENABLE/INTERRUPT[4]

BInterrupt[1] <=> INTENABLE/INTERRUPT[5]
BInterrupt[2] <=> INTENABLE/INTERRUPT[7]
BInterrupt[3] <=> INTENABLE/INTERRUPT[11]
BInterrupt[4] <=> INTENABLE/INTERRUPT[14]
BInterrupt[5] <=> INTENABLE/INTERRUPT[18]
BInterrupt[6] <=> INTENABLE/INTERRUPT[23]
BInterrupt[7] <=> INTENABLE/INTERRUPT[25]
BInterrupt[8] <=> INTENABLE/INTERRUPT[27]
BInterrupt[9] <=> INTENABLE/INTERRUPT[28]

The mapping from BInterrupt index to interrupt

number can also be obtained from
xtsc_core::get_interrupt_number().
The mapping from interrupt number to BInterrupt
index can also be obtained from
xtsc_core::get_binterrupt_index().

"BInterruptSize" u32 The number of bits in the BInterrupt input.

"BootLoader" bool True if config is a TX Xtensa core with the

BootLoader interface.

"DataCacheIsWriteback" bool True if the data cache is a write-back cache.

"DataCacheIsCoherent" bool True if the config includes the coherent data

cache option.

"DataErrorWordWidth" u32 Granularity of ECC/parity error correction in

bytes. Parity adds 1 bit of error correction
per granule. ECC adds 5 bits per granule when
granularity is 1 byte and 7 bits per granule
when granularity is 4 bytes.

"DataRAM0BaseAddress" u32 Byte base address of DRAM0.

"DataRAM0ByteSize" u32 Size in bytes of DRAM0.

"DataRAM0HasBusy" bool True if DRAM0 has a busy interface.

"DataRAM0HasECC" bool True if DRAM0 has error correction.

"DataRAM0HasInbound" bool True if DRAM0 supports inbound PIF access.

"DataRAM0HasParity" bool True if DRAM0 has parity checking.

"DataRAM0HasRCW" bool True if architecture supports S32C1I to DRAM0.

"DataRAM1BaseAddress" u32 Byte base address of DRAM1.

"DataRAM1ByteSize" u32 Size in bytes of DRAM1.

"DataRAM1HasBusy" bool True if DRAM1 has a busy interface.

"DataRAM1HasECC" bool True if DRAM1 has error correction.

"DataRAM1HasInbound" bool True if DRAM1 supports inbound PIF access.

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"DataRAM1HasParity" bool True if DRAM1 has parity checking.

"DataRAM1HasRCW" bool True if architecture supports S32C1I to DRAM1.

"DataRAMBanks" u32 Number of banks in DataRAM0/DataRAM1 (0|1|2|4).

If "DataRAMCount" is 0, then "DataRAMBanks" will
be 0. From the programmer's view (32-bit address
space), banks are addressed using the
lowest-order address bits above the byte-lane
bits.

"DataRAMSubBanks" u32 Number of subbanks in each DataRAM0/DataRAM1

bank (0-16). If "DataRAMCount" is 0, then
"DataRAMSubBanks" will be 0. From the
programmer's view (32-bit address space),
subbanks are addressed using from 1-4 of the
high-order byte-lane bits.

"DataRAMAttributeWidth" u32 Bit width of DRAM0/DRAM1 attribute interfaces.

"DataRAMCount" u32 Number of data RAMs (0|1|2).

"DataRAMHasSplitRW" bool True if config has split read/write ports for

DRAM0/DRAM1. False if config has unified
read/write ports for DRAM0/DRAM1 or if
"DataRAMCount" is zero.

"DataROM0BaseAddress" u32 Byte base address of DROM0.

"DataROM0ByteSize" u32 Size in bytes of DROM0.

"DataROM0HasBusy" bool True if DROM0 has a busy interface.

"DataROM0HasInbound" bool True if DROM0 supports inbound PIF access.

"DataROMBanks" u32 Number of banks in DataROM0 (0|1|2|4).

If "DataROMCount" is 0, then "DataROMBanks" will
be 0. From the programmer's view (32-bit address
space), banks are addressed using the
lowest-order address bits above the byte-lane
bits.

"DataROMCount" u32 Number of data ROMs (0|1).

"HasAltResetVec" bool True if config has the AltResetVec input (from

the "External Reset Vector" option).

"HasArithmeticException" bool True if config as the PArithmeticException

interface.

"HasCBox" bool True if config has the CBox option.

"HasDataCache" bool True if config has a data cache.

"HasHaltOnException" bool True if config has Halt Exception Architecture.

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"HasInboundPIF" bool True if config has inbound PIF.

"HasInstCache" bool True if config has an instruction cache.

"HasPIF" bool True if config has a PIF.

"HasPIFReqAttribute" bool True if config has PIF with the PIF Attribute
interface.

"HasPIFReqDomain" bool True if config has PIF with the PIF Request
Domain interface.

"HasPIFWriteResponse" bool True if the config has PIF write responses

configured. Note: xtsc_core always requires
write responses regardless of the value of this
parameter.

"HasPIFCriticalWordFirst" bool True if the config has PIF critical word first
configured.

"HasPIFArbitraryByteEnables" bool True if the config has PIF arbitrary byte

enables configured.

"HasProcessorID" bool True if config has a processor ID.

"HWMicroArchLatest" u32 Hardware version number of this config.

"iDMACount" u32 Number of iDMA ports (0|1).

"InstallPrefix" char* The absolute path to the XtensaTools directory.

"InstFetchByteWidth" u32 Width in bytes of instruction fetch interface.

"InstRAM0BaseAddress" u32 Byte base address of IRAM0.

"InstRAM0ByteSize" u32 Size in bytes of IRAM0.

"InstRAM0HasBusy" bool True if IRAM0 has a busy interface.

"InstRAM0HasECC" bool True if IRAM0 has error correction.

"InstRAM0HasInbound" bool True if IRAM0 supports inbound PIF access.

"InstRAM0HasParity" bool True if IRAM0 has parity checking.

"InstRAM1BaseAddress" u32 Byte base address of IRAM1.

"InstRAM1ByteSize" u32 Size in bytes of IRAM1.

"InstRAM1HasBusy" bool True if IRAM1 has a busy interface.

"InstRAM1HasECC" bool True if IRAM1 has error correction.

"InstRAM1HasInbound" bool True if IRAM1 supports inbound PIF access.

"InstRAM1HasParity" bool True if IRAM1 has parity checking.

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"InstRAMCount" u32 Number of instruction RAMs (0|1|2).

"InstROM0BaseAddress" u32 Byte base address of IROM0.

"InstROM0ByteSize" u32 Size in bytes of IROM0.

"InstROM0HasBusy" bool True if IROM0 has a busy interface.

"InstROM0HasInbound" bool True if IROM0 supports inbound PIF access.

"InstROMCount" u32 Number of instruction ROMs (0|1).

"InterruptCount" u32 The total number of interrupts (both internal

and external).

"InterruptExtEdgeMask" u32 Each 1 bit in this mask indicates that the

corresponding bit in "BInterruptMap" represents
a edge-triggered external interrupt.

"InterruptExtLevelMask" u32 Each 1 bit in this mask indicates that the

corresponding bit in "BInterruptMap" represents
a level-sensitive external interrupt.

"InterruptNMIMask" u32 A 1 bit in this mask indicates that the

corresponding bit in "BInterruptMap" represents
a non-maskable interrupt.

"IsBigEndian" bool True if config is big endian.

"IsLittleEndian" bool True if config is little endian.

"IsPreconfiguredCore" bool True if this is a preconfigured core.

"LoadStoreByteWidth" u32 Width in bytes of load/store interface.

"LoadStoreUnitCount" u32 Number of load/store units (1|2|3).

"LocalMemoryLatency" u32 Local memory latency (1|2).

"MasterExclAccess" bool True if config supports exclusive transactions

on PIF.

"MaxInstructionSize" u32 Maximum width in bytes of any instruction.

"PIFByteWidth" u32 Width in bytes of the PIF.

"PIFInboundBufferEntries" u32 The number of entries in the PIF inbound buffer.

"RelocatableVectors" bool True if config has the relocatable vectors

option.

"ResetVectorOffset" u32 If "RelocatableVectors" is true this is the

reset vector offset to be added to
"StaticVectorBase0" or "StaticVectorBase1"
(depending upon "SimStaticVectorSelect" and
"StaticVectorSelect").
If "RelocatableVectors" is false this is the

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reset vector address.

"SlaveExclAccess" bool True if config supports exclusive transactions

on inbound PIF.

"StaticVectorBase0" u32 Static vector base 0.

"StaticVectorBase1" u32 Static vector base 1.

"StaticVectorSelect" u32 This read-only parameter shows the default value

for the hardware configuration. This value
tells the tools (linker and ISS) what value to
use by default:
A value of 0 means to use "StaticVectorBase0".
A value of 1 means to use "StaticVectorBase1".
If "SimStaticVectorSelect" is 0xFFFFFFFF, the
default, and assuming the "StatVectorSel" system
input is not being driven and the
xtsc_core::set_static_vector_select() method has
not been called, then the ISS inside xtsc_core
will use either "StaticVectorBase0" or
"StaticVectorBase1" according to the the value
shown in this read-only parameter.

"SystemRAMBaseAddress" u32 Byte base address of system RAM.

"SystemRAMByteSize" u32 Size in bytes of system RAM.

"SystemROMBaseAddress" u32 Byte base address of system ROM.

"SystemROMByteSize" u32 Size in bytes of system ROM.

"UnifiedRAM0BaseAddress" u32 Byte base address of URAM0.

"UnifiedRAM0ByteSize" u32 Size in bytes of URAM0.

"UnifiedRAM0HasBusy" bool True if URAM0 has a busy interface.

"UnifiedRAM0HasInbound" bool True if URAM0 supports inbound PIF access.

"UnifiedRAMCount" u32 Number of unitified RAMs (0|1).

"XLMI0BaseAddress" u32 Byte base address of XLMI0.

"XLMI0ByteSize" u32 Size in bytes of XLMI0.

"XLMI0HasBusy" bool True if XLMI0 has a busy interface.

"XLMI0HasInbound" bool True if XLMI0 supports inbound PIF access.

"XLMICount" u32 Number of XLMIs (0|1).

"XTENSA_CORE" char* The config name.

"XTENSA_PARAMS" char** Pointer to a c-string array of size 1 or 2.

If XTENSA_PARAMS was passed in to the
xtsc_core_parms constructor or defined in the

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environment, then the array is of size 2 and the

first entry in the array is the XTENSA_PARAMS
value and the second entry is NULL. Otherwise,
the array is of size 1 and the only entry is
NULL.

"XTENSA_SYSTEM" char** Pointer to a c-string array of size 2. The

first entry in the array is the value of
XTENSA_SYSTEM either passed in to the
xtsc_core_parms constructor or obtained
from the environment. The second entry in the
array is NULL.

The following parameters are obtained from the core’s configuration database in the Xtensa
registry, but, assuming "IsPreconfiguredCore" is false and the feature exists in the config,
the parameter values can be changed in XTSC (using the appropriate xtsc_parms::set()
method) to allow expermentation. For example:

xtsc_core_parms core_parms("le_32");
core_parms.set("DataCacheByteSize", 4096);

Warning: Changing these values in XTSC is for experimentation purposes only and will
NOT change the hardware.
Note: Except for "ProcessorID" the following parameters are not writeable for Diamond
Standard processors.

Name Type Description

------------------ ---- -----------------------------------------------

"ProcessorID" u32 The processor ID. This defines the intial

value of the PRID register. After elaboration,
the PRID register can be changed using the
"PRID" system-level input. See the
get_system_input_wire method. Also see the
setup_debug() method.

"WriteBufferEntries" u32 The number of write buffer entries.

"DataCacheByteSize" u32 The size of the data cache in bytes.

"DataCacheLineByteSize" u32 The size of a data cache line in bytes.

"DataCacheWays" u32 The number of data cache ways.

"iDMAPIFBurst" bool If true, PIF BURST_READ and BURST_WRITE will be

used for multi-transfer transactions on the PIF
iDMA interface. If false, then BLOCK_READ and
BLOCK_WRITE will be used.
Default = false.

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"InstCacheByteSize" u32 The size of the instruction cache in bytes.

"InstCacheLineByteSize" u32 The size of an instruction cache line in bytes.

"InstCacheWays" u32 The number of instruction cache ways.

The following parameters are not obtained from the core’s configuration database in the
Xtensa registry. Most of the following parameters are used to control some aspect of the
simulation and are not related to hardware.

Name Type Description

--------------------------- ------ ------------------------------------------------

"SimAllowResetStragglers" bool Starting in RG-2015.0, when xtsc_core is reset

it discards all outstanding requests and if it
later receives a response to a discarded request
it will throw an exception. If you are using
simulation memory/interconnect models that do
not fully support reset, then you may need to
set this parameter to true to prevent xtsc_core
from discarding these requests until the
response comes (at which time both the request
and response will be discarded).
Note: Setting this parameter true does not apply
to the iDMA port (if any).
Default value = false.

"SimBootLoaderArbitrationPhase" u32 The phase of the clock at which arbitration is

performed between boot loader and Xtensa access
to local memories. This parameter is ignored
unless "BootLoader" is true and it is only used
when a local memory interface has busy. It is
expressed in terms of the SystemC time
resolution (from sc_get_time_resolution()). A
value of 0xFFFFFFFF means to use a phase of
one-half of this core's clock period minus one.
This corresponds to arbitrating at one SystemC
time resolution prior to negedge clock (which
allows a potential external arbiter to operate
at the typical time of negedge clock and still
have both sets of arbitration occur in the same
clock cycle). This parameter will need to be
adjusted if the boot loader drives the Xfer
interface later then this in the clock cycle.
The arbitration phase should be strictly greater
then Phase B because the Xtensa accesses always
occur at Phase B. In addition, the arbitration
phase must be strictly less than the core's
clock period and may not fall on or between
phase A and phase B.
Default = 0xFFFFFFFF (just prior to negedge
clock).

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"SimBResetAll" bool Set this parameter to true to cause xtsc_reset()

to be called (with an argument of true) when the
BReset input goes high on this core. This
causes all XTSC components to be reset.
Default = false.

"SimClients" char** Call xtsc_core::load_client() for each char* in

the array except the last one (which must be
NULL).

"SimClientFile" char* Call xtsc_core::load_client_file() with the

named file.

"SimClockFactor" u32 The clock period of this core expressed in terms

of the system clock period (available using the
xtsc_get_system_clock_period() method). A value
of 1, the default, means this core's clock
period is equal to the system clock period. A
value of 2 means this core's clock period is
twice as long as the system clock period. And
so on.
See xtsc_core::set_clock_phase_delta_factors();
Default value = 1.
Note: Changing "SimClockFactor" can slow down
simulation and should not be done except in
the case of a multi-core system in which at
least two different core frequencies are needed.
If there is only one core or if all cores run at
the same frequency then xtsc_initialize_parms
"system_clock_factor" should be used to adjust
frequency in lieu of "SimClockFactor".

"SimDebug" bool If true, automatically enable debugging on this

core by calling the enable_debug() method with
arguments obtained from the "SimDebugWait",
"SimDebugSynchronized", and
"SimDebugStartingPort" parameters. If false, do
not automatically call enable_debug() for this
core (of course, you can still manually call
enable_debug() or one of the other debug setup
methods from your sc_main program).
Default value = false.

"SimDebugWait" bool If "SimDebug" is true, then this parameter

specifies the value to pass in as the wait
argument to the enable_debug() call.
If "SimDebug" is false, then this parameter
is ignored.
Default value = true.

"SimDebugSynchronized" bool If "SimDebug" is true, then this parameter

specifies the value to pass in as the
synchronized argument to the enable_debug()
call. If "SimDebug" is false, then this
parameter is ignored.
Default value = true (Verilog co-simulation)
Default value = false (All others)

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"SimDebugStartingPort" u32 If "SimDebug" is true, then this parameter

specifies the value to pass in as the
starting_port argument to the enable_debug()
call.
If "SimDebug" is false, then this parameter
is ignored.
Default value = 0.

"SimDebugAsynchronousIPC" bool If false, then the communication between the

target debugger (xt-gdb/Xplorer) and the ISS is
always done synchronously (as part of stepping
the ISS). This means the SystemC clock must
be ticking for any debugger-ISS communication to
take place. If true, then most debugger-ISS
communication can take place even when the
SystemC clock is stopped. Some debugger
commands cannot be handled asynchronously (e.g.
the target program cannot be halted by the
debugger unless the SystemC clock is ticking).
See "SimDebugPollInterval".
Default value = false (Verilog co-simulation)
Default value = true (All others)

"SimDebugPollInterval" u32 This specifies the interval (in units of ISS

clock cycles) between two consecutive checks for
communication from the attached target debugger
(xt-gdb/Xplorer). A value of 0 means to use the
ISS default value of 1000 cycles when
"SimDebugAsynchronousIPC" is true and to use a
value of 1 when "SimDebugAsynchronousIPC" is
false.
Default value = 0 (that is, use the ISS default
value of 1000 or a value of 1 depending on
"SimDebugAsynchronousIPC").

"SimDumpAllRegisters" bool If true, the dump_all_registers() method is

called at the end of construction.
Default = false.

"SimExitLocation" char* The optional value to pass to the ISS using the
--exit_location option. The value should be a
10 character string representing a 32-bit value
in hexadecimal (for example, 0x60000000). See
the --exit_location command-line option in the
ISS User's Guide.
Default value = NULL (do not pass
--exit_location to the ISS).

"SimFullLocalMemAddress" bool If true, use the full local memory address in

xtsc_request objects (this corresponds to a
programmer's view). If false, use a 0-based
address for each local memory except XLMI (this
corresponds to a hardware view). This parameter
does not apply to XLMI or PIF/iDMA which always
get the full memory address.
Default value = true.

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"SimLoadFile" char* Call xtsc_core::load_file() with the named file

during the start_of_simulation() callback. If
desired, multiple files to be loaded can be
specified by separating them with a comma.

"SimLogDisassembly" bool If true, log each instruction as it commits at

INFO_LOG_LEVEL. Logging can also be turned on
and off during simulation.
See xtsc_core::log_disassembly().
Default = false.

"SimLogPeekPoke" bool If false, xtsc_core does not log its calls to

the peek/poke functions of attached memories.
Set this parameter to true to cause xtsc_core to
log them at VERBOSE_LOG_LEVEL.
Default = false.

"SimScriptFile" char* Optional name of an xtsc_script_file to provide

Lua code including Lua function definitions in a
#lua_beg/#lua_end block followed by Lua function
declarations using the format shown below.
Note: The Lua code can access the XTSC command
facility using the xtsc.cmd() function; however,
SystemC time consuming commands (e.g. "sc wait"
and "sc waitall") must not be used.
Default = NULL
Format:
#lua_beg
-- Lua code goes here
#lua_end
lua_function simcall <LuaSimcallFunction>
lua_function breakpoint <LuaBreakpointFunction>
Where:
<LuaSimcallFunction> is the name of a Lua function defined in the #lua_beg/
#lua_end block which takes 7 integer arguments (the core's zero-based
instantiation number followed by the 6 simcall arguments) and returns 1
integer value.
<LuaBreakpointFunction> is the name of a Lua function defined in the #lua_beg/
#lua_end block which takes 2 integer arguments (the core's zero-based
instantiation number followed by the current PC) and returns the value 0.

"SimMonitorInterfaces" char** A NULL-terminated array of TIE and system I/O

interface names or name patterns that should
have an event notified whenever there is
activity on that interface. An interface
pattern has one or more asterisks and matching
is performed using the xtsc_pattern_match() API.
Once enabled, the event name or names can be
obtained at an XTSC command prompt like this:
cmd: xtsc xtsc_event_dump
Default value = NULL.

"SimNameForISS" char* The ISS instance name is used to identify the

core instance in Xtensa Xplorer for debugging
and profiling. By default, the ISS instance
name is formed from the xtsc_core instance base

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name (that is, without hierarchy) plus a period

and the zero-based instantiation number.
Although typically not required, this parameter
can be used to specify a different ISS instance
name; however, this is not recommended and
should only be done with caution because
duplicate or illegal ISS instance names can
cause Xtensa Xplorer debugging and profiling
to fail.
Note: ISS instance names must be legal file
system names.
Default value = NULL (use default ISS name).

"SimNeverExits" bool All XTSC simulations that include at least one

core have a SystemC thread that waits for all
cores to exit and then checks a flag to
determine if sc_stop() should be called. If
this parameter is set to true, then this core
will NOT be considered when notifing the "all
cores have exited" event.
See xtsc_core::get_all_cores_exited_event()
See xtsc_core::get_stop_after_all_cores_exit()
See "SimStopOnExit"
Default = false.

"SimNoDebugFlush" bool If true, disables flushing of the processor

pipeline when a breakpoint or a watchpoint is
encountered.
Default = false.

"SimNoZeroBSS" bool If true, disables zero initialization of the

.bss segment by the simulator during target
program loading.
Default = false.

"SimPIFFakeWriteResponses" bool The Xtensa ISS requires write responses on all

configs (even configs that don't have write
responses configured). Starting in RG-2015.0
and RF-2015.3 on configs that don't have write
responses configured, xtsc_core will by default
internally generate "fake" write responses for
PIF and iDMA requests and send them to the ISS
(in this case xtsc_core will also discard any
incoming PIF/iDMA write responses). This
parameter can be set to false to prevent
xtsc_core from generating fake write responses,
in which case the external system must send
them. This parameter applies to PIF and iDMA
(if present).
Default = true on configs without write
responses configured, otherwise false.

"SimPinLevelInterfaces" char** A NULL-terminated array of TIE and system I/O

interfaces that the user will connect to at the
pin level instead of at the transaction level
or a single asterisk to indicate that all TIE
and system I/O interfaces should be pin level.

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It is also possible to specify all interfaces of

the same kind using one (or more) of the
following:
*system_input
*system_output
*lookup
*input_queue
*output_queue
*import_wire
*export_state
TIE interfaces are identified using the name
from the TIE file (the name that comes after the
queue, lookup, import_wire, or state keyword).
System I/O interfaces are identified using the
name as it appears in the Xtensa microprocessor
data book. Connection to these pin-level
interfaces is performed using the xtsc_core
methods get_input_pin() and get_output_pin().
Any of the above interfaces and wild-cards can
appear with a minus sign in front of them to
indicate that interface or group of interfaces
should be removed from the pin-level list (i.e.
they should be transaction level). For example,
the following could be used to tell xtsc-run
that all interfaces are to be pin-level except
the system level inputs excluding RunStall:
xtsc-run -set_core_parm=SimPinLevelInterfaces=*,-*system_input,RunStall ...
Note: Depending on your shell, you may need to
escape or quote any asterisk entered on the
command line to prevent it being interpreted
as the file globbing character.
Note: xtsc_core does not directly present pin-
level memory interfaces. Instead, for local and
PIF memory interfaces, the user should use an
xtsc_component::xtsc_tlm2pin_memory_transactor
to convert the TLM memory interface presented by
xtsc_core to a pin-level interface. For the
inbound PIF interface, an
xtsc_component::xtsc_pin2tlm_memory_transactor
is used. For tracing, see the "SimVcdHandle"
parameter.
Note: Pin-level TIE lookups are not compatible
with TurboXim/fast-access mode.

"SimPrefetch" char* The optional value to pass to the ISS using the
--prefetch option. The value should be a 4
character string representing a 8-bit value in
hexadecimal (for example, 0x44). See --prefetch
command-line option in the ISS User's Guide.
Default value = NULL (do not pass --prefetch to
the ISS).

"SimReference" bool If a TIE instruction is described both in a

reference/operation section and in a semantic
section, use the reference/operation description
instead of the semantic description.
Default value = false.

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"SimRunStall" bool If true, set_stall(true) will be called during

end_of_elaboration(). This parameter is just
for convenience to allow starting a core
in the stalled state without having to hook up
something to the RunStall input or calling the
xtsc_core::set_stall() method.
Default = false.

"SimStackSize" u32 A non-zero value means to call sc_module::

set_stack_size() with the specified value for
iss_thread, the SystemC thread containing the
ISS. If 0, set_stack_size() is not called for
iss_thread.
Default = 0x40000 (256KB).

"SimStaticVectorSelect" u32 A value of 0xFFFFFFFF means to use the value

of "StaticVectorSelect" (obtained from the
hardware configuration). 0 or 1 means to use
"StaticVectorBase0" or "StaticVectorBase1",
respectively, regardless of "StaticVectorSelect".
Use of this parameter is an alternative to
driving the StatVectorSel input or manually
calling the xtsc_core::set_static_vector_select()
method. If the StatVectorSel input is being
driven then this parameter should normally be
left at its default value.
Legal values are 0|1|0xFFFFFFFF.
Default value = 0xFFFFFFFF.

"SimStopOnExit" bool If true, sc_stop() will be called by this core

when the target program running on this core
calls exit() regardless of the state of other
cores in the system.
See xtsc_core::set_stop_after_all_cores_exit()
See "SimNeverExits"
Default = false.

"SimTargetArgs" char** A NULL-terminated array of command-line

arguments to pass to the target program. If
NULL, then the xtsc_core::load_program() call,
if any, defines which arguments to pass to the
target program during the end_of_elaboration()
callback. If not NULL, then this parameter
specifies which arguments to pass to the target
program during the end_of_elaboration() callback
and overrides the target program arguments
specified in the xtsc_core::load_program() call,
if any.
Default value = NULL (use the target program
arguments from load_program()).

"SimTargetInput" char * The name of the file from which target stdin is
read. If NULL, target stdin is read from host
stdin.
Default value = NULL.

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"SimTargetOutput" char * The name of the file to which target stdout is

written. If NULL, target stdout is written to
host stdout.
Default value = NULL.

"SimTargetProgram" char * The name of the target program. If NULL, then

the xtsc_core::load_program() call, if any,
defines which target program is loaded during
the end_of_elaboration() callback. If not NULL,
then this parameter specifies the target program
to load either during the end_of_elaboration()
callback (if "SimTargetProgramDelayLoad" is
false) or during the first delta cycle of
simulation (if "SimTargetProgramDelayLoad" is
true). If not NULL, then this parameter
overrides any xtsc_core::load_program() call
made prior to the end_of_elaboration() call. If
desired, multiple files to be loaded can be
specified by separating them with a comma.
Default value = NULL (use load_program()).
Also see "SimTargetProgramReload".

"SimTargetProgramDelayLoad" bool If false, then the program specified by the

"SimTargetProgram" parameter is loaded duing the
end_of_elaboration() callback. Otherwise, the
program specified by the "SimTargetProgram"
parameter is loaded during the first delta cycle
of simulation. This parameter only applies if
"SimTargetProgram" is specified.
Default value = true (Verilog co-simulation)
Default value = false (All others)

"SimTargetProgramReload" bool If false, then the program specified by the

"SimTargetProgram" parameter is loaded only as
specified by the "SimTargetProgramDelayLoad"
parameter. If true, then the program will also
be reloaded one SystemC time resolution after
xtsc_core::reset() is called. This parameter
only applies if "SimTargetProgram" is specified.
Default value = true (Verilog co-simulation)
Default value = false (All others)

"SimVcdHandle" void * Pointer to a SystemC VCD object (sc_trace_file*)

in which to trace all registers named by the
"SimTraceRegisters" parameter. In addition, if
"SimTraceInterfaces" is true, then all pin-level
interfaces specified by "SimPinLevelInterfaces"
parameter will be traced.
Default value = NULL (no tracing).

"SimTraceInterfaces" bool If true and if "SimVcdHandle" is non-null and

non-empty then the interfaces specified by the
"SimPinLevelInterfaces" parameter will be added
to the SystemC VCD object specified by the
"SimVcdHandle" parameter.
Default true.

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"SimTraceRegisters" char** A NULL-terminated array of core registers to be

added to the SystemC VCD object specified by the
"SimVcdHandle" parameter or a single asterisk to
indicate that all core registers (from the
xtsc_core::get_register_set() method) should be
traced. When a single asterisk is used the
traced registers will include the program
counter. Alternately, "PC" can be specified as
one of the array entries to add the program
counter to the list of traced registers.
See enable_register_tracing().
Default value = NULL (no registers are traced).

"SimTurbo" bool Enable TurboXim/fast-access mode (instruction-

accurate but not cycle-accurate) from the start
of simulation. See xtsc_switch_sim_mode()
for more fine grain control of TurboXim/fast-
access mode.
Default value is as set by the "turbo"
xtsc_initialize_parms parameter.
Note: Direct setting of this parameter is
deprecated. Use the "turbo" parameter of
xtsc_initialize_parms instead.

"SimTurboCache" char* The optional name of a file which TurboXim

should use to cache simulation context for this
core. If TurboXim is allowed to cache
simulation context it can speed up subsequent
simulation runs.
Default value = NULL (simulation context is not
cached).

"SimTurboMaxRelaxedCycles" u32 This specifies the maximum total amount that

this core may run ahead of actual simulation
time without yielding to the SystemC kernel
when operating in the functional mode of
TurboXim. This amount is expressed in terms
of system clock periods.
See xtsc_get_system_clock_period().
A value of 0xFFFFFFFF means to use the global
value of "turbo_max_relaxed_cycles" parameter
as set in xtsc_initialize_parms
construction time.
Default = 0xFFFFFFFF.

"SimUsingPifMux" bool Although not recommended, you can set this

parameter to true when cosimulating with
PifMux.v to work around its violating the PIF
protocol.
Default = false.

See also:
xtsc_core

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xtsc_parms
xtsc_initialize_parms

Definition at line 946 of file xtsc_core.h.

7.52.2 Constructor & Destructor Documentation

7.52.2.1 xtsc_core_parms (const char ∗ XTENSA_CORE = NULL, const char ∗

XTENSA_SYSTEM = NULL, const char ∗ XTENSA_PARAMS = NULL)

Constructor for an xtsc_core_parms object.

Parameters:
XTENSA_CORE The name of the core configuration. If NULL (the default) or empty,
the core configuration name will be obtained from the XTENSA_CORE environ-
ment variable if it exists. If the XTENSA_CORE argument is NULL or empty and
the XTENSA_CORE environment variable does not exist, then a configuration
name of "default" will be used.
XTENSA_SYSTEM The Xtensa registry path. If NULL (the default), the registry path
will be obtained from the XTENSA_SYSTEM environment variable (which, in this
case, must exist). If desired, multiple directories may be specified using a semi-
colon separated list.
XTENSA_PARAMS The TDK directory for user TIE extensions. If NULL (the default),
the TDK directory will be obtained from the XTENSA_PARAMS environment vari-
able (if that environment variable exists). If the XTENSA_PARAMS argument is
the empty string (""), then no user TIE will be applied to this core regardless of
the contents of the XTENSA_PARAMS environment variable.

Note: XTENSA_SYSTEM here is a c-string (char ∗) but it will get stored as a c-string array
(char∗∗) in xtsc_parms::m_c_str_array_map using the name "XTENSA_SYSTEM".
The documentation for this class was generated from the following file:

• xtsc_core.h

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Chapter 7. Class Documentation

7.53 xtsc_debug_if Class Reference

Interface for non-hardware communication from a memory interface master to a memory

interface slave.
#include <xtsc/xtsc_request_if.h>Inheritance diagram for xtsc_debug_if:

xtsc_debug_if

xtsc_request_if xtsc_debug_if_impl xtsc_debug_if_cap

xtsc_request_if_impl xtsc_slave

Public Member Functions

• virtual void nb_peek (xtsc_address address8, u32 size8, u8 ∗buffer)=0
This method is used to read memory without disturbing the memory hardware, the proces-
sor hardware, or the bus hardware.

• virtual void nb_poke (xtsc_address address8, u32 size8, const u8 ∗buffer)=0

This method is used to write memory without disturbing the memory controller hardware,
the processor hardware, or the bus hardware.

• virtual bool nb_fast_access (xtsc_fast_access_request &request)=0

Get information about fast access to a given address.

• virtual bool nb_peek_coherent (xtsc_address virtual_address8, xtsc_address

physical_address8, u32 size8, u8 ∗buffer)
Peek method for use by coherence devices.

• virtual bool nb_poke_coherent (xtsc_address virtual_address8, xtsc_address

physical_address8, u32 size8, const u8 ∗buffer)
Poke method for use by coherence devices.

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7.53.1 Detailed Description

Interface for non-hardware communication from a memory interface master to a memory

interface slave. This interface is for non-hardware communication from a master module
(for example, xtsc_core) to a slave module (for example, xtsc_component::xtsc_memory or
xtsc_component::xtsc_router). It also includes the nb_fast_access() method.
The nb_peek() and nb_poke() methods are for non-hardware communication from a master
module to a slave module. For example, they are used by a non-intrusive target debugger
to read and write memory without the read/write transaction itself disturbing the hardware
state of the target processor or the memory controller. Of course, if the program executing
on the target processor depends upon memory data that is over-written by the nb_poke()
method, then processor state will change.
The nb_fast_access() method is used by TurboXim to find out what methods are available
for accessing memories in fast-functional mode.
The xtsc_request_if interface expands the xtsc_debug_if by adding the nb_request()
method which is used to model hardware communication .
Note: The methods of xtsc_debug_if are all non-blocking in the OSCI TLM sense. That is,
they must NEVER call wait() either directly or indirectly. The "nb_" method prefix stands for
Non-Blocking.

See also:
xtsc_request_if

Definition at line 53 of file xtsc_request_if.h.

7.53.2 Member Function Documentation

7.53.2.1 virtual void nb_peek (xtsc_address address8, u32 size8, u8 ∗ buffer)

[pure virtual]

This method is used to read memory without disturbing the memory hardware, the proces-
sor hardware, or the bus hardware.

Parameters:
address8 The byte address of the first byte to be peeked.
size8 The number of bytes to peek.
buffer The byte array in which to return the peeked data. The byte at address8 is
returned in buffer[0], the byte at address8+1 is returned in buffer[1], and so on up
to the byte at address8+size8-1 is returned in buffer[size8-1]. This format applies
regardless of host and memory client endianess.

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Note: The implementation should support arbitrary values for address8 and size8 as long
as all locations map to the address space of the module. If an attempt is made to access a
location outside the address space of the module, an xtsc_exception should be thrown.
This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implemented in xtsc_request_if_impl, xtsc_request_if_impl, xtsc_request_if_impl, xtsc_-
request_if_impl, xtsc_slave, xtsc_debug_if_impl, xtsc_request_if_impl, xtsc_debug_if_-
impl, xtsc_request_if_impl, xtsc_debug_if_cap, and xtsc_request_if_impl.

7.53.2.2 virtual void nb_poke (xtsc_address address8, u32 size8, const u8 ∗

buffer) [pure virtual]

This method is used to write memory without disturbing the memory controller hardware,
the processor hardware, or the bus hardware.

Parameters:
address8 The byte address of the first byte to be poked.
size8 The number of bytes to poke.
buffer The byte array in which to obtain the poked data. The byte in buffer[0] is
poked into memory at address8, the byte in buffer[1] is poked into memory at
address8+1, and so on up to the byte in buffer[size8-1] is poked into memory
at address8+size8-1. This format applies regardless of host and memory client
endianess.

Note: The implementation should support arbitrary values for address8 and size8 as long
as all locations map to the address space of the module. If an attempt is made to access a
location outside the address space of the module, an xtsc_exception should be thrown.
This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implemented in xtsc_request_if_impl, xtsc_request_if_impl, xtsc_request_if_impl, xtsc_-
request_if_impl, xtsc_slave, xtsc_debug_if_impl, xtsc_request_if_impl, xtsc_debug_if_-
impl, xtsc_request_if_impl, xtsc_debug_if_cap, and xtsc_request_if_impl.

7.53.2.3 virtual bool nb_fast_access (xtsc_fast_access_request & request) [pure

virtual]

Get information about fast access to a given address. Calls to this method are used to get
information about what fast access method, if any, is available for the address specified in
the xtsc_fast_access_request object.

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Returns:
false to indicate that fast access is not available at this point in the simulation, but may
be re-request at some later time in the simulation.

See also:
xtsc_fast_access_request

Implemented in xtsc_request_if_impl, xtsc_request_if_impl, xtsc_request_if_impl, xtsc_-

request_if_impl, xtsc_slave, xtsc_debug_if_impl, xtsc_request_if_impl, xtsc_debug_if_-
impl, xtsc_request_if_impl, xtsc_debug_if_cap, and xtsc_request_if_impl.

7.53.2.4 virtual bool nb_peek_coherent (xtsc_address virtual_address8,

xtsc_address physical_address8, u32 size8, u8 ∗ buffer) [inline,
virtual]

Peek method for use by coherence devices. Guidelines: This method is for use by cache
coherence devices (specifically xtsc_core and an external coherence controller model).
Terminal devices can just use the default implementation of this method provided here.
Network devices such as routers and arbiters should just forward the call to the appropriate
downstream device (with any required address translations).

Parameters:
virtual_address8 The virtual byte address of the first byte to be peeked.
physical_address8 The physical byte address of the first byte to be peeked.
size8 The number of bytes to peek. xtsc_core will thrown an exception if an attempt
is made to peek more then 4 bytes at a time.
buffer The byte array in which to return the peeked data. The byte at address8 is
returned in buffer[0], the byte at address8+1 is returned in buffer[1], and so on up
to the byte at address8+size8-1 is returned in buffer[size8-1]. This format applies
regardless of host and memory client endianess.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Note: This method is reserved for future use.
Reimplemented in xtsc_request_if_impl, xtsc_request_if_impl, xtsc_slave, xtsc_request_-
if_impl, and xtsc_debug_if_impl.
Definition at line 163 of file xtsc_request_if.h.

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7.53.2.5 virtual bool nb_poke_coherent (xtsc_address virtual_address8,

xtsc_address physical_address8, u32 size8, const u8 ∗ buffer) [inline,
virtual]

Poke method for use by coherence devices. Guidelines: This method is for use by cache
coherence devices (specifically xtsc_core and an external coherence controller model).
Terminal devices can just use the default implementation of this method provided here.
Network devices such as routers and arbiters should just forward the call to the appropriate
downstream device (with any required address translations).

Parameters:
virtual_address8 The virtual byte address of the first byte to be poked.
physical_address8 The physical byte address of the first byte to be poked.
size8 The number of bytes to poke. xtsc_core will thrown an exception if an attempt
is made to poke more then 4 bytes at a time.
buffer The byte array in which to obtain the poked data. The byte in buffer[0] is
poked into memory at address8, the byte in buffer[1] is poked into memory at
address8+1, and so on up to the byte in buffer[size8-1] is poked into memory
at address8+size8-1. This format applies regardless of host and memory client
endianess.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Note: This method is reserved for future use.
Reimplemented in xtsc_request_if_impl, xtsc_request_if_impl, xtsc_slave, xtsc_request_-
if_impl, and xtsc_debug_if_impl.
Definition at line 202 of file xtsc_request_if.h.
The documentation for this class was generated from the following file:

• xtsc_request_if.h

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7.54 xtsc_debug_if_cap Class Reference

To cap an unconnected m_debug_ports port when the user can’t bind anything to it.
#include <xtsc/xtsc_tlm2pin_memory_transactor.h>Inheritance diagram for xtsc_-
debug_if_cap:

xtsc_debug_if

xtsc_debug_if_cap

Collaboration diagram for xtsc_debug_if_cap:

xtsc_request_if
xtsc_debug_if
m_debug_cap
xtsc_debug_if_cap
m_transactor xtsc_request_if_impl
xtsc_connection_interface m_transactor
xtsc_module
m_request_impl
xtsc_tlm2pin_memory_transactor
xtsc_resettable
xtsc_command_handler_interface

m_p_memory
xtsc_module_pin_base

m_p_initial_value_file
xtsc_script_file xtsc_memory_b

Public Member Functions

• xtsc_debug_if_cap (xtsc_tlm2pin_memory_transactor &transactor, xtsc::u32 port_-
num)
Constructor.

• void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗buffer)

Receive peeks from the memory interface master.

• void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8 ∗buffer)

Receive pokes from the memory interface master.

• bool nb_fast_access (xtsc::xtsc_fast_access_request &request)

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Chapter 7. Class Documentation

Receive fast access requests from the memory interface master.

Protected Member Functions

• void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

SystemC callback when something binds to us.

Protected Attributes

• xtsc_tlm2pin_memory_transactor & m_transactor

Our xtsc_tlm2pin_memory_transactor object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

• xtsc::u32 m_port_num
Our port number.

7.54.1 Detailed Description

To cap an unconnected m_debug_ports port when the user can’t bind anything to it. For
example, when connecting to RTL and a DSO cannot be provided (see "dso_name").
Definition at line 1189 of file xtsc_tlm2pin_memory_transactor.h.

7.54.2 Member Function Documentation

7.54.2.1 void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗

buffer) [virtual]

Receive peeks from the memory interface master.

See also:
xtsc::xtsc_debug_if

Implements xtsc_debug_if.

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7.54.2.2 void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8, const

xtsc::u8 ∗ buffer) [virtual]

Receive pokes from the memory interface master.

See also:
xtsc::xtsc_debug_if

Implements xtsc_debug_if.

7.54.2.3 bool nb_fast_access (xtsc::xtsc_fast_access_request & request)

[virtual]

Receive fast access requests from the memory interface master.

See also:
xtsc::xtsc_debug_if

Implements xtsc_debug_if.
The documentation for this class was generated from the following file:

• xtsc_tlm2pin_memory_transactor.h

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Chapter 7. Class Documentation

7.55 xtsc_debug_if_impl Class Reference

Implementation of xtsc_debug_if.
#include <xtsc/xtsc_memory_pin.h>Inheritance diagram for xtsc_debug_if_impl:

xtsc_debug_if

xtsc_debug_if_impl

Collaboration diagram for xtsc_debug_if_impl:

xtsc_connection_interface xtsc_resettable xtsc_script_file xtsc_debug_if

m_p_initial_value_file

xtsc_module xtsc_module_pin_base xtsc_memory_b xtsc_debug_if_impl

m_p_memory m_debug_impl m_memory_pin

xtsc_memory_pin

Public Member Functions

• xtsc_debug_if_impl (const char ∗object_name, xtsc_memory_pin &memory_pin,

xtsc::u32 port_num)
Constructor.

• const char ∗ kind () const

The kind of sc_object we are.

• void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗buffer)

Receive peeks from the master.

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• void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8 ∗buffer)

Receive pokes from the master.

• bool nb_fast_access (xtsc::xtsc_fast_access_request &request)

Receive requests for fast access information from the master.

• bool is_connected ()
Return true if a port has bound to this implementation.

Protected Member Functions

• void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to us.

Protected Attributes
• xtsc_memory_pin & m_memory_pin
Our xtsc_memory_pin object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

• xtsc::u32 m_port_num
Our port number.

7.55.1 Detailed Description

Implementation of xtsc_debug_if.
Definition at line 916 of file xtsc_memory_pin.h.

7.55.2 Member Function Documentation

7.55.2.1 void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗

buffer) [virtual]

Receive peeks from the master.

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See also:
xtsc::xtsc_debug_if

Implements xtsc_debug_if.

7.55.2.2 void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8, const

xtsc::u8 ∗ buffer) [virtual]

Receive pokes from the master.

See also:
xtsc::xtsc_debug_if

Implements xtsc_debug_if.

7.55.2.3 bool nb_fast_access (xtsc::xtsc_fast_access_request & request)

[virtual]

Receive requests for fast access information from the master.

See also:
xtsc::xtsc_debug_if

Implements xtsc_debug_if.
The documentation for this class was generated from the following file:

• xtsc_memory_pin.h

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 Chapter 7. Class Documentation

7.56 xtsc_debug_if_impl Class Reference

Implementation of xtsc_debug_if.
#include <xtsc/xtsc_pin2tlm_memory_transactor.h>Inheritance diagram for xtsc_-
debug_if_impl:

xtsc_debug_if

xtsc_debug_if_impl

Collaboration diagram for xtsc_debug_if_impl:

xtsc_connection_interface xtsc_resettable xtsc_debug_if

xtsc_module xtsc_module_pin_base subbank_activity xtsc_debug_if_impl

m_subbank_activity m_debug_impl m_pin2tlm

xtsc_respond_if xtsc_pin2tlm_memory_transactor

m_pin2tlm m_respond_impl

xtsc_respond_if_impl

Public Member Functions

• xtsc_debug_if_impl (const char ∗object_name, xtsc_pin2tlm_memory_transactor

&pin2tlm, xtsc::u32 port_num)
Constructor.

• const char ∗ kind () const

The kind of sc_object we are.

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• virtual void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8

∗buffer)
Receive peeks from the memory interface master.

• virtual void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8

∗buffer)
Receive pokes from the memory interface master.

• virtual bool nb_peek_coherent (xtsc::xtsc_address virtual_address8, xtsc::xtsc_-

address physical_address8, xtsc::u32 size8, xtsc::u8 ∗buffer)
Receive coherent peeks from the memory interface master.

• virtual bool nb_poke_coherent (xtsc::xtsc_address virtual_address8, xtsc::xtsc_-

address physical_address8, xtsc::u32 size8, const xtsc::u8 ∗buffer)
Receive coherent pokes from the memory interface master.

• virtual bool nb_fast_access (xtsc::xtsc_fast_access_request &request)

Receive requests for fast access information from the memory interface master.

• bool is_connected ()
Return true if a port has been bound to this implementation.

Protected Member Functions

• void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to us.

Protected Attributes
• xtsc_pin2tlm_memory_transactor & m_pin2tlm
Our xtsc_pin2tlm_memory_transactor object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

• xtsc::u32 m_port_num
Our port number.

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7.56.1 Detailed Description

Implementation of xtsc_debug_if.
Definition at line 771 of file xtsc_pin2tlm_memory_transactor.h.

7.56.2 Member Function Documentation

7.56.2.1 virtual void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8,

xtsc::u8 ∗ buffer) [virtual]

Receive peeks from the memory interface master.

See also:
xtsc::xtsc_debug_if

Implements xtsc_debug_if.

7.56.2.2 virtual void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8,

const xtsc::u8 ∗ buffer) [virtual]

Receive pokes from the memory interface master.

See also:
xtsc::xtsc_debug_if

Implements xtsc_debug_if.

7.56.2.3 virtual bool nb_peek_coherent (xtsc::xtsc_address virtual_address8,

xtsc::xtsc_address physical_address8, xtsc::u32 size8, xtsc::u8 ∗ buffer)
[virtual]

Receive coherent peeks from the memory interface master.

See also:
xtsc::xtsc_debug_if

Reimplemented from xtsc_debug_if.

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7.56.2.4 virtual bool nb_poke_coherent (xtsc::xtsc_address virtual_address8,

xtsc::xtsc_address physical_address8, xtsc::u32 size8, const xtsc::u8 ∗
buffer) [virtual]

Receive coherent pokes from the memory interface master.

See also:
xtsc::xtsc_debug_if

Reimplemented from xtsc_debug_if.

7.56.2.5 virtual bool nb_fast_access (xtsc::xtsc_fast_access_request & request)

[virtual]

Receive requests for fast access information from the memory interface master.

See also:
xtsc::xtsc_debug_if

Implements xtsc_debug_if.
The documentation for this class was generated from the following file:

• xtsc_pin2tlm_memory_transactor.h

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7.57 xtsc_dma_descriptor Struct Reference

This struct is plain old data (POD) used to define each descriptor of a DMA request.
#include <xtsc/xtsc_dma_request.h>

Public Attributes

• unsigned int source_address8

Source starting byte address. BYTE_OFFSET=0x100∗N+0x00.

• unsigned int destination_address8

Destination starting byte address. BYTE_OFFSET=0x100∗N+0x04.

• unsigned int size8

Total number of bytes to be transferred. BYTE_OFFSET=0x100∗N+0x08.

• unsigned int num_transfers

Number of transfers in each request (1|2|4|8|16). BYTE_OFFSET=0x100∗N+0x0c.

7.57.1 Detailed Description

This struct is plain old data (POD) used to define each descriptor of a DMA request. DMA
descriptors are numbered using index N where N ranges from 1 to num_descriptors.
Each entry in this struct defines the value that should be written into its corresponding DMA
control register at the DMA registers base address plus the BYTE_OFFSET shown.
The DMA control register base address is defined by the xtsc_dma_engine_parms param-
eter "reg_base_address".
Note: If num_transfers is 1 then single READ|WRITE PIF requests are used to perform the
DMA. If num_transfers is 2|4|8|16 then BLOCK_READ|BLOCK_WRITE PIF requests are
used to perform the DMA.
Note: source_address8, destination_address8, and size8 must each be evenly divisible by
num_transfers ∗ (PIF bus width).
Note: source_address8 and destination_address8 must be physical (not virtual).
Note: Each byte address in a sequence of num_tranfers ∗ (PIF bus width) byte addresses
starting with source_address8 and ending with source_address8+size8-1 must map to the
same source device.

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Note: Each byte address in a sequence of num_tranfers ∗ (PIF bus width) byte addresses
starting with destination_address8 and ending with destination_address8+size8-1 must
map to the same destination device.

See also:
xtsc_dma_request
xtsc_dma_engine

Definition at line 123 of file xtsc_dma_request.h.

The documentation for this struct was generated from the following file:

• xtsc_dma_request.h

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7.58 xtsc_dma_engine Class Reference

An example DMA engine implementation.

#include <xtsc/xtsc_dma_engine.h>Inheritance diagram for xtsc_dma_engine:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface

xtsc_memory

xtsc_dma_engine

Collaboration diagram for xtsc_dma_engine:

xtsc_debug_if

m_p_active_request_info
request_info

m_request xtsc_request_if
xtsc_parms xtsc_memory_parms m_memory_parms

xtsc_fast_access_if
m_fast_access_object
xtsc_resettable

xtsc_module

xtsc_connection_interface
xtsc_respond_if
xtsc_command_handler_interface
xtsc_memory m_request_impl
m_p_memory
xtsc_request_if_impl
m_memory
xtsc_memory_b
m_p_initial_value_file
m_p_exclusive_script_stream
xtsc_script_file
m_p_script_stream xtsc_respond_if_impl
m_respond_impl

m_filtered_request m_dma
xtsc_dma_engine
m_p_block_read_response
m_filtered_response m_p_single_response
m_p_active_response m_p_block_write_response
xtsc_request m_p_request
m_stream_dumper
stream_dumper xtsc_response
m_stream_dumper

m_request

Classes
• class xtsc_respond_if_impl
Implementation of xtsc_respond_if.

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Public Types
• typedef xtsc::xtsc_request xtsc_request

Public Member Functions

• SC_HAS_PROCESS (xtsc_dma_engine)
• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

• xtsc_dma_engine (sc_core::sc_module_name module_name, const xtsc_dma_-

engine_parms &dma_parms)
Constructor.

• virtual ∼xtsc_dma_engine (void)

Destructor.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• void reset (bool hard_reset=false)

Reset the device.

• void dump_descriptor (xtsc::u32 idx, std::ostream &os=std::cout)

Dump descriptor to the specified ostream object.

• void dump_descriptors (xtsc::u32 start_idx=1, xtsc::u32 count=1, std::ostream

&os=std::cout)

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Dump count (max 255) descriptors starting at start_idx (wrap after 255 to 1) to the specified
ostream object.

• void execute (const std::string &cmd_line, const std::vector< std::string > &words,
const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

• void set_turbo (bool turbo)

Set whether or not nb_peek/nb_poke are used to perform the DMA data movement.

• bool get_turbo () const

Return value of m_turbo.

Public Attributes

• sc_core::sc_port< xtsc::xtsc_request_if > m_request_port

Bind to single slave.

• sc_core::sc_export< xtsc::xtsc_respond_if > m_respond_export

Single slave binds to this.

Protected Member Functions

• virtual void do_write (xtsc::u32 port_num)

We override this method so we can detect writes to the "go" byte (the num_descriptors
register).

• virtual void do_block_write (xtsc::u32 port_num)

We override this method so we can detect writes to the "go" byte (the num_descriptors
register).

• void dma_thread ()
DMA engine thread.

• void request_thread ()
Send read/write requests.

• void write_thread ()

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Move write requests from m_ready_write_deque to m_request_deque with delays to honor

"max_writes".

• void sync_to_posedge (bool always_wait)

Synchronize to this device’s clock edge.

• void check_for_go_byte (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8

∗buffer)
Check if the "go" byte was written (LSB of num_descriptors register located at "reg_base_-
address").

• void use_turbo (xtsc_dma_descriptor &dsc)

Do descriptor using turbo (nb_peek/nb_poke).

• void do_overlapped_requests (xtsc_dma_descriptor &dsc, xtsc::u32 idx)

Do descriptor using overlapped requests.

• void use_single_transfers (xtsc_dma_descriptor &dsc)

Do descriptor using non-overlapped, non-block READ/WRITE requests.

• void use_block_transfers (xtsc_dma_descriptor &dsc)

Do descriptor using non-overlapped BLOCK_READ/BLOCK_WRITE requests.

• xtsc::xtsc_response::status_t remote_read (xtsc::xtsc_address address8, xtsc::u32

size8, xtsc::xtsc_byte_enables byte_enables, xtsc::u8 ∗buffer)
Send out a READ request.

• xtsc::xtsc_response::status_t remote_write (xtsc::xtsc_address address8, xtsc::u32

size8, xtsc::xtsc_byte_enables byte_enables, xtsc::u8 ∗buffer, xtsc::u64 tag=0)
Send out a WRITE request.

• xtsc::xtsc_response::status_t remote_write_u32 (xtsc::xtsc_address address8,

xtsc::u32 data)
Send out a WRITE request of 4 bytes representing a 32-bit value (consider endianess).

• virtual void compute_delays ()

Common method to compute/re-compute time delays.

• xtsc_request ∗ new_request ()
Get a new xtsc_request (from the pool).

• void delete_request (xtsc_request ∗&p_request)

Delete an xtsc_request (return it to the pool).

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Protected Attributes
• xtsc_respond_if_impl m_respond_impl
m_respond_export binds to this

• xtsc_request m_request
For sending non-overlapped DMA requests.

• std::vector< xtsc_request ∗ > m_request_pool

Maintain a pool of requests to improve performance.

• xtsc::u32 m_reg_base_address
DMA registers base address ("reg_base_address" parameter).

• xtsc::u32 m_max_reads
See parameter "max_reads".

• xtsc::u32 m_max_writes
See parameter "max_writes".

• xtsc::u32 m_descriptor_delay
See parameter "descriptor_delay".

• xtsc::u8 m_read_priority
See parameter "read_priority".

• xtsc::u8 m_write_priority
See parameter "write_priority".

• bool m_overlap_descriptors
See parameter "overlap_descriptors".

• bool m_clear_notify_value
See parameter "clear_notify_value".

• bool m_reuse_tag
See parameter "reuse_tag".

• bool m_allow_size_zero
See parameter "allow_size_zero".

• bool m_start_at_index_1

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See parameter "start_at_index_1".

• bool m_turbo
See parameter "turbo" and method set_turbo().

• bool m_big_endian
Determined by write to "go" byte.

• xtsc::u64 m_clock_period_value
This device’s clock period as u64.

• sc_core::sc_time m_time_resolution
The SystemC time resolution.

• bool m_has_posedge_offset
True if m_posedge_offset is non-zero.

• sc_core::sc_time m_posedge_offset
From "posedge_offset" parameter.

• sc_core::sc_time m_posedge_offset_plus_one
m_posedge_offset plus m_clock_period

• xtsc::u8 m_data [xtsc::xtsc_max_bus_width8 ∗16]

Buffer read rsp data before sending out write req.

• bool m_busy
True if a DMA is in progress.

• sc_core::sc_event m_dma_thread_event
Used to notify dma_thread that "go" byte was written.

• sc_core::sc_event m_request_thread_event
Used to notify request_thread that an xtsc_request is ready to send out.

• sc_core::sc_event m_write_thread_event
Used to notify write_thread.

• sc_core::sc_event m_got_read_response_event
Notified when a read response is received.

• sc_core::sc_event m_no_reads_or_writes_event

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Notified when total reads and writes changes to 0.

• sc_core::sc_event m_single_response_available_event
Notified when READ or WRITE rsp is received (id=0x2|0x3).

• sc_core::sc_event m_block_read_response_available_event
Notified when a BLOCK_READ rsp is received (id=0x4).

• sc_core::sc_event m_block_write_response_available_event
Notified when a BLOCK_WRITE rsp is received (id=0x5).

• bool m_overlap_read_write
True if "max_reads" and "max_writes" are non-zero, else false.

• xtsc::u32 m_num_reads
Number of outstanding read transactions.

• xtsc::u32 m_num_writes
Number of outstanding write transactions.

• std::deque< xtsc_request ∗ > m_request_deque

deque of overlapped read/write requests for request_thread

• std::deque< xtsc_request ∗ > m_blank_write_deque

deque of pre-formed write request without data

• std::deque< xtsc_request ∗ > m_ready_write_deque

deque of write requests with data, ready to be moved to m_request_deque

• std::deque< xtsc::u32 > m_last_write_deque

deque of dummy tokens - one for each last transfer write request

• std::deque< xtsc::u32 > m_done_descriptor_deque

deque to track when overlapped descriptor complete.

• bool m_waiting_for_nacc
True if request_thread is waiting for RSP_NACC from downstream.

• bool m_request_got_nacc
True if request_thread request got RSP_NACC.

• const xtsc::xtsc_response ∗ m_p_single_response

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Current rsp to READ or WRITE request.

• xtsc::u32 m_num_block_transfers
Number of BLOCK_READ responses in currect descriptor.

• xtsc::u32 m_block_read_response_count
Number of BLOCK_READ responses received so far.

• sc_core::sc_time m_p_block_read_response_time [16]

Time when each BLOCK_READ rsp was received.

• const xtsc::xtsc_response ∗ m_p_block_read_response [16]

Maintain our copy of BLOCK_READ responses.

• xtsc::u32 m_block_write_sent_count
Number of BLOCK_WRITE requests sent so far.

• const xtsc::xtsc_response ∗ m_p_block_write_response

Current BLOCK_WRITE response.

• sc_core::sc_time m_nacc_wait_time
See "nacc_wait_time" in xtsc_dma_engine_parms.

Static Protected Attributes

• static const xtsc::u8 m_read_id = 0x2

xtsc_request::m_id for READ

• static const xtsc::u8 m_write_id = 0x3

xtsc_request::m_id for WRITE

• static const xtsc::u8 m_block_read_id = 0x4

xtsc_request::m_id for BLOCK_READ

• static const xtsc::u8 m_block_write_id = 0x5

xtsc_request::m_id for BLOCK_WRITE

• static const xtsc::u8 m_overlapped_read_id = 0x6

xtsc_request::m_id for overlapped READ/BLOCK_READ

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• static const xtsc::u8 m_overlapped_write_id = 0x7

xtsc_request::m_id for overlapped WRITE/BLOCK_WRITE

7.58.1 Detailed Description

An example DMA engine implementation. This implementation comprises a normal mem-

ory (xtsc_memory) that has been enhanced as a DMA engine. A block of addresses in
the xtsc_memory device’s address range is reserved as DMA control registers. The size of
this block is (Nmax+1)∗256 bytes, where Nmax is the largest value that will appear in the
num_descriptors register throughout the entire simulation (see xtsc_dma_request). Nmax
may not exceed 255.
This implementation is not meant to model any particular real RTL; however, it has several
features that enable it to approximate many modern DMA engines especially when used in
conjunction with other XTSC components:

• A single DMA request is comprised of 1 or more DMA descriptors. Multiple DMA

descriptors can be used to support scatter-gather operation. Each descriptor can
be programmed to use READ|WRITE requests or BLOCK_READ|BLOCK_WRITE
requests to perform the data movement. This module can also be configured to use
turbo- style peek/poke operations to allow the data movement to be completed in 0
SystemC simulation time. See the "turbo" parameter and the set_turbo() method.

• When a DMA request completes, a memory mapped write of a user-specified value

to a user-specified address occurs to signal the end of the DMA. If desired, an xtsc_-
mmio device can be used to converted this memory-mapped write into an interrupt
signal.

• This DMA engine module implements a single DMA channel. If multiple DMA chan-
nels are desired, then instantiate this module multiple times and use xtsc_router and
xtsc_arbiter objects to connect everything together.

• By default the DMA engine module does non-overlapped data transfers; however, the
"max_reads" and "max_writes" parameters may be set to allow multiple, overlapped
reads and writes.

• By default the DMA engine module completes one descriptor before starting the
next; however, when overlapped reads and writes are enabled then the "overlapped_-
descriptors" parameter may be set to true to allow the next descriptor to be started
as soon as all the reads are queued for the previous descriptor.

Note: The throughput of the xtsc_dma_engine model is determined not only by its own
parameters such as "max_reads", "max_writes", and "overlapped_descriptors", but also

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by the rest of the system. Some of the parameters of other XTSC models that can affect
throughput include the "∗_delay" and "request_fifo_depth" parameters of xtsc_memory and
"flexible_request_id" of xtsc_router.
Only the DMA register space is internally accessed by the xtsc_dma_engine module. If
you wish to use an xtsc_dma_engine instance to perform DMA data movements either
from or to itself, then the master port pair (m_request_port and m_respond_export) must
be externally connected to one of the slave port pairs (m_request_ports[i] and m_respond_-
exports[i], defined in the xtsc_memory base class). This can be done, for example, using
an xtsc_router at the output and an xtsc_arbiter on the input.
See xtsc_dma_request and xtsc_dma_descriptor for information on programming a DMA
request.
Here is a block diagram of an xtsc_dma_engine as it is used in the xtsc_dma_engine
example:

nb_write()
BInterrupt01

0xC0000000 req
0xC0000003 2 0 BInterrupt01

xtsc_arbiter req xtsc_mmio

mmio_arbiter mmio

0xC0000000 req mmio.def

0xC0000003 2 1

req req
pif 0x5FB80000
1
0x5FBBFFFF
0xC0001000 req xtsc_dma_engine req
0xC0001FFF 1 dma

xtsc_router xtsc_router
core0_router dma_router

xtsc_core dma_routing
core0 .tab
(main.out)

core0_routing [All other req

.tab addresses] 0 0
xtsc_arbiter req xtsc_memory
pif_arbiter pifmem

[All other req

addresses] 0 1 pifmem.dat

inbound_pif

xtsc_memory
dram0
req
dram0
ping pong

Figure 7.3: xtsc_dma_engine Example

See also:
xtsc_dma_engine_parms
xtsc_memory
xtsc_dma_request
xtsc_dma_descriptor
xtsc_arbiter
xtsc_mmio
xtsc_router

Definition at line 298 of file xtsc_dma_engine.h.

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7.58.2 Constructor & Destructor Documentation

7.58.2.1 xtsc_dma_engine (sc_core::sc_module_name module_name, const

xtsc_dma_engine_parms & dma_parms)

Constructor.
Parameters:
module_name The SystemC module name.
dma_parms The xtsc_dma_engine and xtsc_memory contruction parameters.

See also:
xtsc_dma_engine_parms
xtsc_memory_parms

7.58.3 Member Function Documentation

7.58.3.1 void execute (const std::string & cmd_line, const std::vector< std::string
> & words, const std::vector< std::string > & words_lc, std::ostream &
result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:

dump_descriptor <Index>
Call xtsc_dma_engine::dump_descriptor(<Index>).

dump_descriptors [<Start> [<Count>]]

Call xtsc_dma_engine::dump_descriptors(<Start>, <Count>). Wrap after 255 to 1.

Reimplemented from xtsc_memory.

7.58.3.2 void set_turbo (bool turbo) [inline]

Set whether or not nb_peek/nb_poke are used to perform the DMA data movement.

Parameters:
turbo If true, then nb_peek/nb_poke will be used to perform the DMA data movement.
If false, then READ|WRITE or BLOCK_READ| BLOCK_WRITE PIF requests will
be used (depending on the xtsc_dma_descriptor::num_transfers register);

Definition at line 386 of file xtsc_dma_engine.h.

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7.58.4 Member Data Documentation

7.58.4.1 std::deque<xtsc::u32> m_done_descriptor_deque [protected]

deque to track when overlapped descriptor complete. There is one zero entry for each
non-last read request of the descriptor. The entry for the last read request of the descriptor
is the descriptor index to be written to the done_descriptor field.
Definition at line 539 of file xtsc_dma_engine.h.
The documentation for this class was generated from the following file:

• xtsc_dma_engine.h

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7.59 xtsc_dma_engine_parms Class Reference

Constructor parameters for a xtsc_dma_engine object.

#include <xtsc/xtsc_dma_engine.h>Inheritance diagram for xtsc_dma_engine_parms:

xtsc_parms

xtsc_memory_parms

xtsc_dma_engine_parms

Collaboration diagram for xtsc_dma_engine_parms:

xtsc_parms

xtsc_memory_parms

xtsc_dma_engine_parms

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Public Member Functions

• xtsc_dma_engine_parms (xtsc::u32 reg_base_address=0x00000000, xtsc::u32

width8=4, xtsc::u32 delay=0, xtsc::u32 start_address8=0, xtsc::u32 size8=0)
Constructor for an xtsc_dma_engine_parms object.

• const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

7.59.1 Detailed Description

Constructor parameters for a xtsc_dma_engine object. This class has the same contructor
parameters as an xtsc_memory_parms object plus the following additional ones.

Name Type Description

------------------ ---- --------------------------------------------------------

"reg_base_address" u32 The base address of the DMA programming registers. The
BYTE_OFFSET specified in xtsc_dma_request and
xtsc_dma_descriptor documentation is refering to this
base address.

"read_priority" u32 Priority for READ|BLOCK_READ DMA requests.

Valid values are 0|1|2|3.
Default = 2.

"write_priority" u32 Priority for WRITE|BLOCK_WRITE DMA requests.

Valid values are 0|1|2|3.
Default = 2.

"clear_notify_value" bool If true, then when the DMA request completes, the
DMA request notify_address8 will be written twice in a
row. The first write will contain the value specified by
DMA request notify_value, and the second write will
contain the value 0. If false, then only the
notify_value will be written. The purpose of writing
the notify_address8 twice is to support edge-triggered
interrupts. If you are using a level-triggered
interrupt or if you are going to poll the
notify_address8 for the notify_value, then leave this
parameter at its default setting of false. If you are
using an edge-triggered interrupt, then change this
parameter to true.
Note: To support a "dma done" interrupt, an xtsc_mmio
device can be connected at the notify_address8 to
convert the memory-mapped write into an interrupt.
Caution: Use care when using interrupts to avoid a race
condition that can occur if the processor
interrupt level is not properly handled and the
target has code to check if an interrupt has

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occurred, and if not, waits on it. If the

interrupt handler sets a dma_done flag, then
target code to adjust the interrupt level
before the check for dma_done might look like:
_xtos_set_intlevel(15);
if (!dma_done) { XT_WAITI(0); }
Default = false.

"max_reads" u32 If non-zero, then this specifies the maximum number of

DMA read transactions that may be inflight (either
queued or downstream) at one time. If zero, then
"max_writes" must also be zero and all DMA transactions
are done non-overlapping (so that at most 1 request,
whether read or write, is downstream at a time).
Note: At most one read request is queued per cycle.
Note: Read requests all have the same ID and read
responses must come back in the same order as
the read requests were sent out.
Default = 0.

"max_writes" u32 If non-zero, then this specifies the maximum number of

DMA write transactions that may be inflight at one time
(a BLOCK_WRITE sequence of transfers counts as 1 write
transaction). If zero, then "max_reads" must also be
zero and all DMA transactions are done non-overlapping
(so that at most 1 request, whether read or write, is
downstream at a time).
Default = 0.

"overlap_descriptors" bool If false, then the DMA engine will wait for all data
movement to complete on one descriptor before starting
the next descriptor. If true, then the DMA engine will
move on to the next descriptor as soon as all reads for
the previous descriptor have been queued. This
parameter must be left at its default value of false if
"max_reads" and "max_writes" are 0.
Default = false.

"descriptor_delay" u32 If non-zero, then a delay for this many clock periods is
done at the start of each descriptor to model the time
it takes to retrieve the descriptor from memory. This
parameter is ignored when "turbo" is in effect.
Default = 0.

"reuse_tag" bool If true, each DMA write request will use the same tag as
its corresponding DMA read request. If false, a
different tag will be used.
Default = true.

"allow_size_zero" bool If false, the xtsc_dma_engine will throw an exception if

a descriptor with a total transfer byte size of 0 is
encountered (that is, if the xtsc_dma_descriptor size8
register contains 0). If true, a size8 value of 0 will
be allowed.
Default = false.

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"start_at_index_1" bool If this parameter is left at its default value of true,

then the index of the first descriptor of a DMA request
to be processed will be 1. This parameter can be set to
false to cause xtsc_dma_request::done_descriptor field
to be read and incremented (wrapping to 1 after 255) when
a DMA request is first started to determine the index of
the first descriptor to be processed. This allows DMA
descriptors outside the range of the current DMA to be
programmed while the current DMA is in progress. If
this parameter is true, then the done_descriptor field
must contain a value between 0 and 255 (inclusive) when
the "go" byte is written. Note: DMA descriptors may be
reprogrammed as soon as their index is written by the
DMA engine to the done_descriptor field.
Default = true.

"turbo" bool If true, then nb_peek/nb_poke will be used to perform

the DMA data movement. If false, then READ|WRITE or
BLOCK_READ|BLOCK_WRITE PIF requests will be used (as
determined by the xtsc_dma_descriptor num_transfers
register). The value set by this parameter can be
overridden using the xtsc_dma_engine::set_turbo()
method.
Default = As specified by the "turbo" parameter of
xtsc_initialize_parms.
Note: The xtsc_dma_engine module does not currently
implement true TurboXim functionality which
allows the downstream module to specify what
memory address ranges support fast access and
which fast access method to use (raw access,
peek/poke access, etc).
Note: If "turbo_min_sync" in xtsc_initialize_parms is
set and the xtsc_core programming the DMA
engine uses an edge-triggered interrupt for
DMA done notification, then under TurboXim it is
possible for the core to attempt to program
the next DMA before the current DMA is complete
resulting in an exception being thrown.

"posedge_offset" u32 This specifies the time at which the first posedge of
this device's clock conceptually occurs. It is
expressed in units of the SystemC time resolution and
the value implied by it must be strictly less than the
value implied by the "clock_period" parameter. A value
of 0xFFFFFFFF means to use the same posedge offset as
the system clock (from
xtsc_get_system_clock_posedge_offset()).
Default = 0xFFFFFFFF.

"nacc_wait_time" u32 This parameter, expressed in terms of the SystemC time

resolution, specifies how long to wait after sending a
request downstream to see if it was rejected by
RSP_NACC. This value must not exceed this device's
clock period. A value of 0 means one delta cycle. A
value of 0xFFFFFFFF means to wait for a period equal to
this device's clock period. CAUTION: A value of 0 can

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cause an infinite loop in the simulation if the

downstream module requires a non-zero time to become
available.
Default = 0xFFFFFFFF (device's clock period).

See also:
xtsc_memory_parms
xtsc_dma_request
xtsc_dma_request::notify_address8
xtsc_dma_descriptor
xtsc_dma_engine
xtsc_mmio

Definition at line 198 of file xtsc_dma_engine.h.

The documentation for this class was generated from the following file:

• xtsc_dma_engine.h

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7.60 xtsc_dma_request Struct Reference

This struct is plain old data (POD) used to define a DMA request.
#include <xtsc/xtsc_dma_request.h>

Public Attributes

• unsigned int num_descriptors

Number of dma descriptors in this dma request. BYTE_OFFSET=0x00.

• unsigned int notify_address8

Address to write to to signal dma request is done. BYTE_OFFSET=0x04.

• unsigned int notify_value

Value to write to notify_address8. BYTE_OFFSET=0x08.

• unsigned int turboxim_event_id

Optional TurboXim event ID to be notified (if non-zero). BYTE_OFFSET=0x0C.

• unsigned int done_descriptor

The index of the last completed descriptor. BYTE_OFFSET=0x10.

7.60.1 Detailed Description

This struct is plain old data (POD) used to define a DMA request. The complete DMA
is specified by one xtsc_dma_request register set and one or more xtsc_dma_descriptor
register sets (as specified by the num_descriptors register). Each entry in this struct defines
the value that should be written into its corresponding DMA control register at the DMA
registers base address plus the BYTE_OFFSET shown.
Write a 32-bit value between 1 and 255 to the num_descriptors register to start the DMA.
The DMA control register base address is defined by the xtsc_dma_engine_parms param-
eter "reg_base_address".
Note: The num_descriptors register should be written last because the DMA engine will
start running as soon as the num_descriptors register is written with a non-zero value.
Note: The num_descriptors register should be written using a 32-bit write and the value
written should be between 1 and 255. The DMA engine detects big or little endian based
on the location in the 32-bit value of the non-zero byte.

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Note: notify_address8 must be aligned to the PIF bus width.

Note: notify_address8 must be physical (not virtual).
Note: If desired, target code can wait for turboxim_event_id using the xt_iss_event_wait()
method - see xtsc::xtsc_fire_turboxim_event_id().
Note: When xtsc_dma_engine_parms "start_at_index_1" is true (the default), the DMA
engine starts a DMA request at descriptor index 1 regardless of the value in the done_-
descriptor field. If "start_at_index_1" is set false then the DMA engine will use done_-
descriptor+1 as the index of the first descriptor to process (if done_descriptor contains
either 0 or 255, then the first descriptor index to be processed with be 1).
Note: As each descriptor is completed, the DMA engine writes its index to the done_-
descriptor field (this occurs regardless of the xtsc_dma_engine_parms "start_at_index_1"
setting). A descriptor may be safely reprogrammed for a future DMA once its index is
written by the DMA engine to the done_descriptor field.

See also:
xtsc_dma_descriptor
xtsc_dma_engine
xtsc::xtsc_fire_turboxim_event_id();

Definition at line 79 of file xtsc_dma_request.h.

The documentation for this struct was generated from the following file:

• xtsc_dma_request.h

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7.61 xtsc_exception Class Reference

Base class for all XTSC exceptions.

#include <xtsc/xtsc_exception.h>

Public Member Functions

• xtsc_exception (const std::string &message)
Constructor.

7.61.1 Detailed Description

Base class for all XTSC exceptions.

Definition at line 38 of file xtsc_exception.h.
The documentation for this class was generated from the following file:

• xtsc_exception.h

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7.62 xtsc_fast_access_block Class Reference

Value class for a block that surrounds a request address.

#include <xtsc/xtsc_fast_access.h>

Public Member Functions

• xtsc_fast_access_block (xtsc_address address, xtsc_address block_address, xtsc_-
address block_end_address)
Constructor for a block that surrounds a target address This constructor will throw an ex-
ception if the target address is not contained in the block.

• xtsc_fast_access_block (xtsc_address address)

Constructor for a block that contains all of memory.

• bool remove_address_range (xtsc_address local_address, xtsc_address block_-

address, xtsc_address block_end_address)
Method to remove an address range from a block.

• bool restrict_to_block (const xtsc_fast_access_block &block)

Method to remove any addresses outside of the specified block.

• void reset_address (xtsc_address address)

Method to change the target address of a block.

• xtsc_address get_address () const

Query method to get the target address of this block.

• xtsc_address get_block_address () const

Query method to get the first address in the block.

• xtsc_address get_block_end_address () const

Query method to get the last address in the block.

Private Attributes
• xtsc_address m_address
• xtsc_address m_block_address
• xtsc_address m_block_end_address

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7.62.1 Detailed Description

Value class for a block that surrounds a request address.

Definition at line 82 of file xtsc_fast_access.h.

7.62.2 Constructor & Destructor Documentation

7.62.2.1 xtsc_fast_access_block (xtsc_address address, xtsc_address

block_address, xtsc_address block_end_address)

Constructor for a block that surrounds a target address This constructor will throw an ex-
ception if the target address is not contained in the block.

Parameters:
address target address
block_address first address in the block
block_end_address last address in the block

7.62.2.2 xtsc_fast_access_block (xtsc_address address)

Constructor for a block that contains all of memory.

Parameters:
address target address

7.62.3 Member Function Documentation

7.62.3.1 bool remove_address_range (xtsc_address local_address, xtsc_address

block_address, xtsc_address block_end_address)

Method to remove an address range from a block. This method will throw an exception if
the local address is contained in the block to be removed.

Parameters:
block_address first address in the block to be removed
block_end_address last address in the block to be removed
local_address translated block address.

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Returns:
true if any addresses were removed from the block

7.62.3.2 bool restrict_to_block (const xtsc_fast_access_block & block)

Method to remove any addresses outside of the specified block.

Parameters:
block the bounding block where the block address is the translation of this block’s
address.

Returns:
true if any addresses were removed from the block

7.62.3.3 void reset_address (xtsc_address address)

Method to change the target address of a block. The block address and block_end_address
will be moved relative to the new target address

Parameters:
address the new target address

7.62.3.4 xtsc_address get_address () const [inline]

Query method to get the target address of this block. The target address will always be
inside the block

Returns:
the target address of this block

Definition at line 145 of file xtsc_fast_access.h.

7.62.3.5 xtsc_address get_block_address () const [inline]

Query method to get the first address in the block.

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Returns:
the first address in the block

Definition at line 153 of file xtsc_fast_access.h.

7.62.3.6 xtsc_address get_block_end_address () const [inline]

Query method to get the last address in the block.

Returns:
the last address in the block

Definition at line 161 of file xtsc_fast_access.h.

The documentation for this class was generated from the following file:

• xtsc_fast_access.h

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7.63 xtsc_fast_access_if Class Reference

Interface for fast access (turbo mode).

#include <xtsc/xtsc_fast_access.h>

Public Member Functions

• virtual void nb_fast_access_read (xtsc_address address, u32 size8, u8 ∗dst)=0

Method to read bytes from a memory.

• virtual void nb_fast_access_write (xtsc_address address, u32 size8, const u8

∗src)=0
Method to write bytes to a memory.

• virtual ∼xtsc_fast_access_if ()
virtual destructor

7.63.1 Detailed Description

Interface for fast access (turbo mode). In order to use fast access with callbacks for a
memory, the user designer should implement this interface.
When the core wants access to a memory for the first time, it will make a fast_access_-
request. The memory should then return an object that implements this interface.
After the request has been granted, memory accesses to the specified block of memory
will be made as a series of nb_fast_access_read and nb_fast_access_write requests.
Definition at line 41 of file xtsc_fast_access.h.

7.63.2 Member Function Documentation

7.63.2.1 virtual void nb_fast_access_read (xtsc_address address, u32 size8, u8 ∗

dst) [pure virtual]

Method to read bytes from a memory.

Parameters:
address Local memory address

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size8 Number of bytes to read. size8 is a power 2 <= the size passed when the fast
access was requested.
dst memory to store the result. This buffer is byte-ordered.

7.63.2.2 virtual void nb_fast_access_write (xtsc_address address, u32 size8,

const u8 ∗ src) [pure virtual]

Method to write bytes to a memory.

Parameters:
address Local memory address
size8 Number of bytes to write. size8 is a power 2 <= the size passed when the fast
access request word size.
src value that should be written. This buffer is byte ordered.

The documentation for this class was generated from the following file:

• xtsc_fast_access.h

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7.64 xtsc_fast_access_request Class Reference

Class to hold request and response information to set up fast access data transfers.
#include <xtsc/xtsc_fast_access.h>Collaboration diagram for xtsc_fast_access_-
request:

xtsc_fast_access_block xtsc_fast_access_if xtsc_fast_access_revocation_if

m_response_block
m_access_if m_fast_access_revocation_if
m_result_block

xtsc_fast_access_request

Public Types

• enum access_type {
ACCESS_NONE,
ACCESS_DENY,
ACCESS_RAW,
ACCESS_CALLBACKS,
ACCESS_CUSTOM_CALLBACKS,
ACCESS_INTERFACE,
ACCESS_PEEKPOKE }
• typedef void(∗ xtsc_fast_access_read_callback )(void ∗, u32 ∗dst, xtsc_address
address, u32 size8)
• typedef void(∗ xtsc_fast_access_write_callback )(void ∗, xtsc_address address,
u32 size8, const u32 ∗src)
• typedef void(∗ xtsc_fast_access_custom_read_callback )(void ∗, u32 ∗dst, xtsc_-
address address, u32 size8, const u32 ∗custom_data)
• typedef void(∗ xtsc_fast_access_custom_write_callback )(void ∗, xtsc_address
address, u32 size8, const u32 ∗src, const u32 ∗custom_data)

Public Member Functions

• xtsc_fast_access_request (sc_core::sc_object &request_object, xtsc_address

request_address, u32 request_word_size, bool request_big_endian)

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Constructor to allow a user device to initiate a fast access request.

• ∼xtsc_fast_access_request ()
Destructor for a request object.

• sc_core::sc_object & get_request_object () const

Get the request object.

• xtsc_address get_request_address () const

Get the request address.

• u32 get_request_word_size () const

Get the request word size.

• u32 get_request_big_endian () const

Get the request endianness.

• bool fast_read (xtsc_request_if &request_if, xtsc_address address, u32 size, u8

∗dst)
Use the result of a fast access request to read data from the target.

• bool fast_write (xtsc_request_if &request_if, xtsc_address address, u32 size, const

u8 ∗src)
Use the result of a fast access request to read data from the target.

• bool translate_request_address (xtsc_address translated_address)

Method to translate a request address.

• void deny_access ()
Method to deny fast access for the request.

• void allow_raw_access (xtsc_address block_start, u32 ∗raw_data, u32 size, u32

swizzle)
Method to allow direct memory access for the request.

• void allow_interface_access (xtsc_fast_access_if ∗access_if)

Method to allow fast access through an xtsc_fast_access_if object.

• void allow_peek_poke_access ()
Method to allow fast access using the nb_peek and nb_poke methods Data transfers will
NOT bypass routers and arbitors with this method of fast access.

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• void allow_callbacks_access (void ∗callback_arg, xtsc_fast_access_read_callback

read_callback, xtsc_fast_access_write_callback write_callback)
Method to allow direct function callbacks for fast access.

• void allow_custom_callbacks_access (void ∗callback_arg, xtsc_fast_access_-

custom_read_callback custom_read_callback, xtsc_fast_access_custom_write_-
callback custom_write_callback)
Method to allow direct function callbacks for fast access with custom data.

• void deny_read_access ()
Method to deny read access. Invoke after allowing access.

• void deny_write_access ()
Method to deny write access. Invoke after allowing access.

• bool remove_address_range (xtsc_address local_address, xtsc_address start_-

address, xtsc_address end_address)
Method to remove a range of addresses from a fast address response.

• bool restrict_to_block (const xtsc_fast_access_block &min_block)

Method to remove the range of addresses from a request that are outside of the specified
block.

• access_type get_access_type () const

Get the response access type.

• const char ∗ get_access_type_c_str () const

Get the response access type as a C-string.

• bool is_writable () const

Get the response write permissions.

• bool is_readable () const

Get the response read permissions.

• xtsc_fast_access_block get_response_block () const

Get the original response block.

• xtsc_fast_access_block get_result_block () const

Get the result block.

• xtsc_fast_access_block get_local_block (xtsc_address local_address) const

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Get the result block translated to a local_address.

• xtsc_address get_translated_request_address () const

Get the translated request address.

• u32 ∗ get_raw_data () const

For raw access, get the raw pointer address associated with the first word of the result
block.

• u32 ∗ get_orig_raw_data () const

For raw access, get the raw pointer address associated with the first word of the response
block.

• u32 get_swizzle () const

For raw access, get the swizzle that defines the memory layout.

• xtsc_fast_access_if ∗ get_fast_access_if () const

For interface access, get the interface object.

• xtsc_fast_access_read_callback get_read_callback () const

For callback access, get the read callback function.

• xtsc_fast_access_write_callback get_write_callback () const

For callback access, get the write callback function.

• void ∗ get_callback_arg () const

For callback access or custom callback access, get the callback argument.

• void ∗ get_callback_data () const

Deprecated. Use get_callback_arg().

• xtsc_fast_access_custom_read_callback get_custom_read_callback () const

For custom callback access, get the custom read callback function.

• xtsc_fast_access_custom_write_callback get_custom_write_callback () const

For custom callback access, get the custom write callback function.

• void set_fast_access_revocation_if (xtsc_fast_access_revocation_if ∗p_if)

Set the interface object for revoking fast access.

• xtsc_fast_access_revocation_if ∗ get_fast_access_revocation_if () const

Return the interface object for revoking fast access (or NULL if none).

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Protected Attributes
• sc_core::sc_object ∗ m_request_object
• xtsc_address m_request_address
• u32 m_request_word_size8
• bool m_request_big_endian
• xtsc_address m_translated_request_address
• xtsc_fast_access_revocation_if ∗ m_fast_access_revocation_if
• access_type m_access_type
• xtsc_fast_access_block m_response_block
• xtsc_fast_access_block m_result_block
• bool m_is_readable
• bool m_is_writable
• xtsc_raw_block ∗ m_raw_block
• xtsc_fast_access_callbacks ∗ m_access_callbacks
• xtsc_fast_access_custom_callbacks ∗ m_access_custom_callbacks
• xtsc_fast_access_if ∗ m_access_if

Private Member Functions

• bool reset_block (const xtsc_fast_access_block &block)
• void clear_response ()
• xtsc_fast_access_request (const xtsc_fast_access_request &)
• xtsc_fast_access_request & operator= (const xtsc_fast_access_request &)

7.64.1 Detailed Description

Class to hold request and response information to set up fast access data transfers. A
fast access request is issued when a core first needs the data at a memory address. The
request includes the original request address and the endianness and word size of the
core.
Routers and arbiters will translate the request address and forward it. The translated ad-
dress can be queried with get_translated_request_address()
Terminal devices (for example, memories) should invoke one of deny_access() allow_raw_-
access() allow_callbacks_access() allow_custom_callbacks_access() allow_peek_poke_-
access() allow_interface_access()
If the permissions are only valid for a subset of the range that the device maps, use
restrict_to_block() or remove_address_range().
When allowing only read or write access use deny_read_access() and deny_write_-
access() after the appropriate allow_∗ method is invoked.

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If none of these is invoked, access is denied

Definition at line 254 of file xtsc_fast_access.h.

7.64.2 Constructor & Destructor Documentation

7.64.2.1 xtsc_fast_access_request (sc_core::sc_object & request_object,

xtsc_address request_address, u32 request_word_size, bool
request_big_endian)

Constructor to allow a user device to initiate a fast access request.

Parameters:
requestor A reference to the object that initiated this request.
request_address The original request address
request_word_size The maximum word size of a fast access data transfer resulting
from this request.
request_big_endian The endianness of the requestor.

7.64.3 Member Function Documentation

7.64.3.1 bool fast_read (xtsc_request_if & request_if, xtsc_address address, u32

size, u8 ∗ dst)

Use the result of a fast access request to read data from the target.

Parameters:
request_if the interface for issuing an nb_peek request if the peek/poke method is
used.
address the address (in the request address space) must be aligned to size.
size a power of 2 no greater than the request word size
dst a byte-ordered buffer of size bytes where the response will be written

Returns:
false if the access cannot be performed because: size is not a power of 2 size is
greater than the request word size address is not aligned to size. the target denies
read access. the address is not in the range handled by the target.

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7.64.3.2 bool fast_write (xtsc_request_if & request_if, xtsc_address address, u32

size, const u8 ∗ src)

Use the result of a fast access request to read data from the target.

Parameters:
request_if the interface for issuing an nb_poke request if the peek/poke method is
used.
address the address (in the request address space) must be aligned to size.
size a power of 2 no greater than the request word size
src a byte-ordered buffer of size bytes to write into the target.

Returns:
false if the access cannot be performed because: size is not a power of 2 size is
greater than the request word size address is not aligned to size. the target denies
write access. the address is not in the range handled by the target.

7.64.3.3 bool translate_request_address (xtsc_address translated_address)

Method to translate a request address. This should be used by a router before forwarding
a fast access request

7.64.3.4 void allow_raw_access (xtsc_address block_start, u32 ∗ raw_data, u32

size, u32 swizzle)

Method to allow direct memory access for the request. This method will throw an exception
if the difference between the original request address and the translated request address
is not divisible by 4. It will also throw an exception if (swizzle & 3) is not 0 or 3.

Parameters:
block_start The first address that is allowed fast access.
raw_data The host memory address for memory that includes the first stored word of
block_start
swizzle 0 for memories stored in byte order. See documentation for the swizzle of
more efficent orders when simulating a big endian host on a little endian target.

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7.64.3.5 void allow_interface_access (xtsc_fast_access_if ∗ access_if)

Method to allow fast access through an xtsc_fast_access_if object. Data transfers will
bypass routers and arbitors with this method of fast access.

Parameters:
access_if The object that implements nb_fast_access_read and nb_fast_access_-
write

7.64.3.6 void allow_callbacks_access (void ∗ callback_arg, xtsc_fast_access_-

read_callback read_callback, xtsc_fast_access_write_callback
write_callback)

Method to allow direct function callbacks for fast access. This can be faster than interface
access when the target and host endianness differ. However, the functions expect data in
a target-related order and must be implemented with care. The interface access uses this
method, but convert the data into a byte-ordered buffer to make it easier to use.

Parameters:
callback_arg Argument to pass to the read and write callbacks when they are in-
voked. This should be a pointer to a persistent object.
read_callback The function to invoke to read data from a memory
write_callback The function to invoke to write data to a memory.

7.64.3.7 void allow_custom_callbacks_access (void ∗ callback_arg,

xtsc_fast_access_custom_read_callback custom_read_callback,
xtsc_fast_access_custom_write_callback custom_write_callback)

Method to allow direct function callbacks for fast access with custom data.

Parameters:
callback_arg Argument to pass to the read and write custom callbacks when they are
invoked.
custom_read_callback Function to invoke to read data from a memory.
custom_write_callback Function to invoke to write data to a memory.

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7.64.3.8 bool remove_address_range (xtsc_address local_address, xtsc_address

start_address, xtsc_address end_address)

Method to remove a range of addresses from a fast address response. It may be used
when a device only allows fast access on a subset of its address space or by routers.

Parameters:
local_address translated request/response address. In the device allowing fast ac-
cess, this is translated_request_address from the request.
start_address first address to remove
end_address last address to remove

7.64.3.9 bool restrict_to_block (const xtsc_fast_access_block & min_block)

Method to remove the range of addresses from a request that are outside of the specified
block.

Parameters:
min_block block that specifies a range from block_address to block_end_address
that should not be removed from the response. The address of the min_block
is the translated_request_address from the request.

7.64.3.10 access_type get_access_type () const [inline]

Get the response access type.

Returns:
response access type.

Definition at line 462 of file xtsc_fast_access.h.

7.64.3.11 const char∗ get_access_type_c_str () const

Get the response access type as a C-string.

Returns:
response access type as a C-string.

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7.64.3.12 bool is_writable () const [inline]

Get the response write permissions.

Returns:
true if the response allows write access

Definition at line 476 of file xtsc_fast_access.h.

7.64.3.13 bool is_readable () const [inline]

Get the response read permissions.

Returns:
true if the response allows read access

Definition at line 483 of file xtsc_fast_access.h.

7.64.3.14 xtsc_fast_access_block get_response_block () const

Get the original response block. For all but the raw access, this block will contain all of
memory. For any response the target address of the block will be the translated request
address.

Returns:
block initially specified in the allow or deny method invoked on the request.

7.64.3.15 xtsc_fast_access_block get_result_block () const

Get the result block. The target address for the block is the original request address. The
block start and block end are the ones resulting after all removals and restrictions have
been applied.

Returns:
the fast access result block

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7.64.3.16 xtsc_fast_access_block get_local_block (xtsc_address local_address)

const

Get the result block translated to a local_address. The local_address will usually be the
translated_request_address when the nb_fast_access method is invoked.

Parameters:
local_address the local translation of the original request address.

Returns:
the translated fast access result block

7.64.3.17 xtsc_address get_translated_request_address () const [inline]

Get the translated request address. This is reset with translate_request_address()

Returns:
the translated request address.

Definition at line 523 of file xtsc_fast_access.h.

7.64.3.18 u32∗ get_raw_data () const

For raw access, get the raw pointer address associated with the first word of the result
block. This method will throw an exception if the access type is not ACCESS_RAW.

Returns:
the raw pointer address of the first word of the result block.

7.64.3.19 u32∗ get_orig_raw_data () const

For raw access, get the raw pointer address associated with the first word of the response
block. This method will throw an exception if the access type is not ACCESS_RAW.

Returns:
the raw pointer address of the first word of the response block.

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7.64.3.20 u32 get_swizzle () const

For raw access, get the swizzle that defines the memory layout. This method will throw an
exception if the access type is not ACCESS_RAW.

Returns:
the swizzle that defines the memory layout.

7.64.3.21 xtsc_fast_access_if∗ get_fast_access_if () const

For interface access, get the interface object. This method will throw an exception if the
access type is not ACCESS_INTERFACE.

Returns:
the interface object for INTERFACE access

7.64.3.22 xtsc_fast_access_read_callback get_read_callback () const

For callback access, get the read callback function. This method will throw an exception if
the access type is not ACCESS_CALLBACKS.

Returns:
the read callback function for CALLBACK access

7.64.3.23 xtsc_fast_access_write_callback get_write_callback () const

For callback access, get the write callback function. This method will throw an exception if
the access type is not ACCESS_CALLBACKS.

Returns:
the write callback function for CALLBACK access

7.64.3.24 void∗ get_callback_arg () const

For callback access or custom callback access, get the callback argument. This method
will throw an exception if the access type is neither ACCESS_CALLBACKS nor ACCESS_-
CUSTOM_CALLBACKS.

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Returns:
the callback argument for callback access or custom callback access.

7.64.3.25 xtsc_fast_access_custom_read_callback get_custom_read_callback ()

const

For custom callback access, get the custom read callback function. This method will throw
an exception if the access type is not ACCESS_CUSTOM_CALLBACKS.

Returns:
the custom read callback function for custom callback access

7.64.3.26 xtsc_fast_access_custom_write_callback get_custom_write_callback ()

const

For custom callback access, get the custom write callback function. This method will throw
an exception if the access type is not ACCESS_CUSTOM_CALLBACKS.

Returns:
the custom write callback function for custom callback access

The documentation for this class was generated from the following file:

• xtsc_fast_access.h

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7.65 xtsc_fast_access_revocation_if Class Reference

Interface to be implemented by memory-interface masters that wish to support revocation

of previously-granted fast access requests.
#include <xtsc/xtsc_fast_access.h>

Public Member Functions

• virtual void revoke_fast_access ()=0
This method revokes any previously-granted fast access requests.

• virtual ∼xtsc_fast_access_revocation_if ()
virtual destructor

7.65.1 Detailed Description

Interface to be implemented by memory-interface masters that wish to support revocation of

previously-granted fast access requests. A memory-interface master that requests fast ac-
cess (mainly xtsc_core) and that wishes to allow the downstream memory-interface slave to
subsequently revoke any granted fast access requests should implement this interface and
pass a pointer to the implementation to the xtsc_fast_access_request::set_fast_access_-
revocation_if method before calling nb_fast_access() with the xtsc_fast_access_request
object.
Definition at line 208 of file xtsc_fast_access.h.

7.65.2 Member Function Documentation

7.65.2.1 virtual void revoke_fast_access () [pure virtual]

This method revokes any previously-granted fast access requests. The callee is allowed to
re-request fast access by subsequently re-calling the nb_fast_access() method.
The documentation for this class was generated from the following file:

• xtsc_fast_access.h

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7.66 xtsc_filter Class Reference

The xtsc_filter class, in conjunction with the xtsc_filter_XXX() and xtsc_event_XXX() meth-
ods and the XTSC command facility, help support the system control and debug framework
in XTSC.
#include <xtsc/xtsc.h>

Public Member Functions

• const std::string & get_kind () const

Return the kind of this xtsc_filter.

• const std::string & get_name () const

Return the unique name of this xtsc_filter.

• const xtsc_filter_table & get_key_value_pairs () const

Return a reference to the key-value pairs specified by this xtsc_filter.

Private Member Functions

• xtsc_filter (const std::string &kind, const std::string &name, const xtsc_filter_table

&key_value_pairs)
Private constructor. Use xtsc_filter_create() to create an xtsc_filter instance.

Private Attributes

• std::string m_kind
The kind of xtsc_filter.

• std::string m_name
The unique name of this xtsc_filter.

• xtsc_filter_table m_key_value_pairs
The key-value pairs specified by this filter. Both keys and values are strings.

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Friends

• XTSC_API const xtsc_filter & xtsc_filter_create (const std::string &kind, const

std::string &name, const xtsc_filter_table &key_value_pairs)
Method to create an xtsc_filter of the specified kind with the specified name.

7.66.1 Detailed Description

The xtsc_filter class, in conjunction with the xtsc_filter_XXX() and xtsc_event_XXX() meth-
ods and the XTSC command facility, help support the system control and debug framework
in XTSC. Typically an xtsc_filter is used to define a pattern that is applied to the payloads
being passed by one of the Xtensa TLM interfaces method calls (for example, nb_request(),
nb_respond(), nb_peek, and nb_poke()). If a payload matches the filter then an sc_event
associated with that application of the xtsc_filter is notified.
Note: The filter does NOT determine whether of not the payload is allowed through the
interface (the payload always goes through). The filter only determines whether or not the
associated sc_event is notified.
The basic idea is that something in the simulation will be waiting on the associated sc_-
event. Usually, this would be either the XTSC command prompt, the lua command prompt,
or one of the lua script file threads, but it could also be any other SystemC thread or method
process in the simulation. If either of the command prompts is waiting on the sc_event, then
when it is notified, the user is presented with the command prompt and can then use any
of the XTSC commands to probe the system or issue a breakpoint_interrupt to the ISS to
allow probing the system from xt-gdb or Xtensa Xplorer.
The xtsc_filter class is a container for a table of key-value pairs (xtsc_filter_table). An xtsc_-
filter instance must be of a registered filter kind. The kind of filter defines what keys are
allowed. Filter kinds must be registered with XTSC using xtsc_filter_kind_register().
The xtsc_filter kinds currently supported by the XTSC libraries and their allowed keys are:

xtsc_request xtsc_response xtsc_peek xtsc_poke

----------------- ------------- ---------- ----------
address* address* address* address*
buffer buffer buffer buffer
buffer_not buffer_not buffer_not buffer_not
byte_enables*
exclusive exclusive
id* id*
instruction_fetch
last_transfer last_transfer
num_transfers*
pc* pc*
pif_attribute*
port* port* port* port*
priority* priority*

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route_id* route_id*
size* size* size* size*
status
tag* tag*
type

Note: Filter kinds starting with "xtsc" are reserved to the XTSC libraries.
In the above list an asterisk (∗) after a key indicates the key supports values with ranges.
This also indicates that the value (or value range) will be converted to a number (or a pair
of numbers) and a numeric comparision will be done with the payload item identified by the
key.
Key values are strings and the xtsc_filter kinds listed above all support the key value being
a comma-separated list of values. The comma is taken as a logical OR for all the above
keys except buffer_not where it is taken as a logical AND.
For keys listed above without an asterisk, the following special considerations or allowed
values apply:
buffer: A string comparison is done with the buffer contents as they would be shown in
the xtsc.log file. The period is a wildcard that means one don’t-care character. Each byte
of the payload buffer is specified using 3 characters (a triplet) in the buffer value. The first
character of the triplet specifies the high nibble of the payload byte, the second character of
the triplet specifies the low nibble of the payload byte, and the third character of the triplet
must always be the period wildcard. If desired either or both of the first two characters of a
triplet can also be periods. The length of the buffer value must be exactly 3 times the size
of the buffer in the payload. Multiple comma-separated buffer values are allowed and each
comma is interpreted as a logical OR. For example, to match the 1st, 2nd, and 4th byte
(and ignore the 3rd byte) of a 4 byte payload that shows in the xtsc.log file as:

00 01 02 03

The buffer value should be specified using 12 characters like this:

00.01....03.

In the context of the XTSC command prompt, it would look something like:

cmd: xtsc xtsc_filter_create xtsc_request req1_filter buffer=00.01....03.

buffer_not: Same rules as shown for buffer above except that multiple comma-separated
values imply a logical AND between them instead of a logical OR.
exclusive: 0 | 1
instruction_fetch: 0 | 1

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type: READ | BLOCK_READ | BURST_READ | RCW | WRITE | BLOCK_WRITE |

BURST_WRITE | SNOOP
last_transfer: 0 | 1
status: RSP_NACC | RSP_OK | RSP_ADDRESS_ERROR | RSP_DATA_ERROR | RSP_-
ADDRESS_DATA_ERROR
Except for buffer_not, the above keys do not have a built-in NOT EQUAL concept; however,
you can get the same effect by specifying all but the undesired value. For example:

For this Do This

-------------------- ------------------------------------------------------------
address!=0xf0000000 address=0-0xefffffff,0xf0000001-0xffffffff
size!=0 size=1-64
status!=RSP_NACC status=RSP_OK,RSP_ADDRESS_ERROR,RSP_DATA_ERROR,RSP_ADDRESS_DATA_ERROR

The watchfilter concept:

A watchfilter is analogous to a gdb breakpoint or watchpoint. The idea is that an xtsc_filter
and an sc_event are given to a model which supports watchfilters. The model returns a
watchfilter number which can be used to later remove the watchfilter. While the watchfilter
is active, the model is responsible for checking each payload against the filter and notifying
the event if there is a match.
XTSC provides the following convenience API’s to actually test a specific payload
against a specific xtsc_filter (currently xtsc_core, xtsc_component::xtsc_router, and xtsc_-
component::xtsc_memory support watchfilters using these APIs).
xtsc_filter_apply_xtsc_request()
xtsc_filter_apply_xtsc_response()
xtsc_filter_apply_xtsc_peek()
xtsc_filter_apply_xtsc_poke()
An Example:
The following transcript shows using the xtsc_router example to:
1) Create an xtsc_filter named filt1 of kind xtsc_request which contains key-value pairs
to detect any WRITE or BLOCK_WRITE to addresses in the range of 0x60000000-
0x6FFFFFFF. Note: The command is shown on two lines for printing considerations, in
fact the entire command must be entered on one line.
2) Create a watchfilter in router (an xtsc_router) using filt1 and xtsc_command_prompt_-
event. This watchfilter is assigned watchfilter number 1.
3) Continue the simulation by suspending the XTSC command prompt until its event is
notified.
4) After the XTSC command prompt returns, dump the last filtered request to see what it
was.

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5) Disassemble the current instruction of core0.

6) Enable debugging on core0. Not shown: In another window connect xt-gdb to the sim-
ulation, investigate program state, set breakpoints as desired, and continue the simulation
(from xt-gdb’s point-of-view).
7) Continue the simulation by again suspending the XTSC command prompt.
8) Tell core0 to send a breakpoint interrupt to the ISS to cause xt-gdb to return to its prompt.
9) Tell the SystemC kernel to run the simulation for 1 cycle to give the ISS a chance to act
on the breakpoint interrupt.
10) Remove all watchfilters from router.
11) Continue the simulation by again suspending the XTSC command prompt.

./xtsc_router -xtsc_command_prompt=true
1) cmd: xtsc xtsc_filter_create xtsc_request filt1 address=0x60000000-0x6FFFFFFF
type=WRITE,BLOCK_WRITE
2) cmd: router watchfilter_add filt1 xtsc_command_prompt_event
1
3) cmd: c
44708.3/623:
4) cmd: router dump_filtered_request
tag=4162 pc=0x40000101 WRITE* [0x6000a47c/4/0x000f/0/01/0x4b0]= 9c 81 00 60
5) cmd: core0 dasm pc
0x40000103: l32r a4,0x4000002c
6) cmd: core0 enable_debug 1 0
core0: SOCKET:20000
NOTE core0 - 44708.3/623: Debug info: port=20000 wait=true (target/router_test.out)
7) cmd: c
44732.3/706:
8) cmd: core0 breakpoint_interrupt
9) cmd: sc wait 1
44733.3/709:
10) cmd: router watchfilter_remove *
1
11) cmd: c

See also:
xtsc_filter_table
xtsc_filter_kind_register
xtsc_filter_kind_dump
xtsc_filter_exists
xtsc_filter_create
xtsc_filter_dump
xtsc_filter_get
xtsc_filter_apply_xtsc_peek
xtsc_filter_apply_xtsc_poke
xtsc_filter_apply_xtsc_request
xtsc_filter_apply_xtsc_response

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xtsc_get_next_watchfilter_number()
xtsc_event_register
xtsc_event_exists
xtsc_event_get
xtsc_event_dump
xtsc_component::xtsc_router::watchfilter_add
xtsc_component::xtsc_router::watchfilter_dump
xtsc_component::xtsc_router::watchfilter_remove
xtsc_component::xtsc_router::execute command dump_filtered_request
xtsc_component::xtsc_router::execute command dump_filtered_response
xtsc_initialize_parms parameter "xtsc_command_prompt"
xtsc_initialize_parms parameter "lua_command_prompt"
xtsc_initialize_parms parameter "lua_script_files"

Definition at line 4719 of file xtsc.h.

7.66.2 Friends And Related Function Documentation

7.66.2.1 XTSC_API const xtsc_filter& xtsc_filter_create (const std::string & kind,

const std::string & name, const xtsc_filter_table & key_value_pairs)
[friend]

Method to create an xtsc_filter of the specified kind with the specified name. This method
creates and returns an xtsc_filter of the specified kind and with the specified name and
key-value pairs. An exception is thrown if kind is not registered, if name already exists,
or if key_value_pair contains a key which was not specified when the xtsc_filter kind was
registered.

Parameters:
kind The kind of the xtsc_filter object. This kind must have already been registered
with XTSC.
name The name of the xtsc_filter object. No other xtsc_filter (even of a different kind)
may have this same name. Filter names may be formed using the same character
requirements as C/C++ identifiers.
key_value_pairs The table (vector) of key-value pairs. Both keys and values are
strings.

See also:
xtsc_filter_kind_register
xtsc_filter
xtsc_filter_dump
xtsc_filter_exists
xtsc_filter_get

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The documentation for this class was generated from the following file:

• xtsc.h

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7.67 xtsc_initialize_parms Class Reference

Configuration parameters for the call to xtsc_initialize().

#include <xtsc/xtsc.h>Inheritance diagram for xtsc_initialize_parms:

xtsc_parms

xtsc_initialize_parms

Collaboration diagram for xtsc_initialize_parms:

xtsc_parms

xtsc_initialize_parms

Public Member Functions

• xtsc_initialize_parms (const char ∗text_logging_config_file=NULL)
Constructor for an xtsc_initialize_parms object.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

7.67.1 Detailed Description

Configuration parameters for the call to xtsc_initialize().

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Name Type Description

----------------------------- ----------- ----------------------------------------

"systemc_time_resolution" char* This read-only parameter shows the value

returned from sc_get_time_resolution().

"system_clock_factor" u32 If this value is changed, then the

xtsc_set_system_clock_factor() method
is called during xtsc_initialize() with
the new value supplied by this parameter.
Default = as set at xtsc_initialize_parms
construction time (which, by default, is
1000).

"posedge_offset_factor" u32 This specifies the time at which the

first posedge of the system clock
conceptually occurs. It is expressed in
units of the SystemC time resolution and
must be strictly less than
"system_clock_factor".
Default = 0. The default can be
overridden by setting the environment
variable XTSC_POSEDGE_OFFSET_FACTOR
which, in turn, can be overridden by
calling xtsc_set_system_clock_factor().

"clock_phase_delta_factors" vector<u32> If any of these values are changed, then

xtsc_core::set_clock_phase_delta_factors()
is called during xtsc_initialize() with
the 3 values supplied by this parameter.
Default = as set at xtsc_initialize_parms
construction time (which, by default, is
[200, 100, 600]).

"call_sc_stop_on_finalize" bool The xtsc_set_call_sc_stop() method is

called during xtsc_initialize() with the
value supplied by this parameter. If
this parameter is set to true, then the
sc_stop() method will be called by the
xtsc_finalize() method.
Default = as set at xtsc_initialize_parms
construction time (which, by default, is
true).

"stop_after_all_cores_exit" bool xtsc_core::set_stop_after_all_cores_exit()

is called during xtsc_initialize() with the
value supplied by this parameter. If
this parameter is set to true, then the
sc_stop() method will be called when the
last running core exits.
Default = as set at xtsc_initialize_parms
construction time (which, by default, is
true).

"constructor_log_level" char* The xtsc_set_constructor_log_level()

method is called during xtsc_initialize()
with the value supplied by this parameter.

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Case-insensitive valid values are:

FATAL|ERROR|WARN|NOTE|INFO|VERBOSE|DEBUG|TRACE
Default = as set at xtsc_initialize_parms
construction time (which, by default, is
INFO).

"cycle_limit" u32 The number of system clock periods that the

simulation should be limited to.
Default = 0 (no limit).

"enable_dynamic_clock_period" bool Several models in XTSC include a method

to change their clock period after
simulation has started. In general,
changing the clock period at arbitrary
times and to arbitrary values cannot be
guaranteed to work. See the
documentation associated with the
xtsc_core::change_clock_period method
for some of the possible problems. By
default, changing the clock period
of xtsc_core is disabled. Set this
parameter to true to enable using
the xtsc_core::change_clock_period
method.
Default = false.

"full_hierarchical_names" bool During SystemC-Verilog co-simulation

with Verilog-on-top, this parameter can
be set to true to cause the
extract_parms() methods to require the
full hierarchical module instance name.
In addition, if doing waveform tracing
to a file in the current directory, the
hierarchical name (using a period as the
hierarchy separator) will be prepended
to the vcd file name. These changes are
useful when you want to instantiated the
SystemC wrapper multiple times from a
Verilog module or testbench.
Default = false.

"hex_dump_left_to_right" bool The xtsc_set_hex_dump_left_to_right()

method is called during xtsc_initialize()
with the value supplied by this parameter.
Default = as set at xtsc_initialize_parms
construction time (which, by default, is
true).

"lua_command_prompt" bool If true, then a lua command prompt will

be available at the start of simulation.
This prompt works like the lua command
processor provided with the Lua
distribution and includes an additional
Lua module called xtsc which includes
a Lua function called cmd which gives
access to the commands registered with
the XTSC command facility.

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For example using hello_world:

./hello_world -lua_command_prompt=true
Lua 5.2.3 Copyright (C) 1994-2013 Lua.org, PUC-Rio
> help
...
> ?
sc_simulation: sc
xtsc_core: core0
xtsc_memory: core0_pif
xtsc_simulation: xtsc
> =xtsc.cmd("sc wait 100")
100.0/320:
> =xtsc.cmd("core0 get_pc")
0x4000005f
> =xtsc.cmd("core0 dasm pc")
0x4000005f: movi.n a3,21
> =xtsc.cmd("core0 dasm next")
0x40000061: wsr.atomctl a3
> c
For example using xtsc-run:
xtsc-run -include=hello_world.inc -set_xtsc_parm=lua_command_prompt=true
...
You can get the lua command prompt in an
"empty" simulation which has only the
global xtsc and sc command handlers
using xtsc-run like this:
xtsc-run -set_xtsc_parm=lua_command_prompt=true
...
For more information about the Lua
language, please see www.Lua.org.
Note: If this parameter is set to true
then "xtsc_command_prompt" should be
left false.
Default = false

"lua_script_files" char** An optional comma-separated list of Lua

script files to be processed during
simulation. Each script will be
processed in its own SystemC thread.
See "lua_command_prompt" above for more
information about Lua.
Default = NULL

"lua_script_file_beoe" char* Optional name of a Lua script file to be

processed during the SystemC
before_end_of_elaboration() callback.
See "lua_command_prompt" above for more
information about Lua.
Default = NULL

"lua_script_file_eoe" char* Optional name of a Lua script file to be

processed during the SystemC
end_of_elaboration() callback.
See "lua_command_prompt" above for more
information about Lua.
Default = NULL

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"lua_script_file_sos" char* Optional name of a Lua script file to be

processed during the SystemC
start_of_simulation() callback.
See "lua_command_prompt" above for more
information about Lua.
Default = NULL

"lua_script_file_eos" char* Optional name of a Lua script file to be

processed during the SystemC
end_of_simulation() callback.
See "lua_command_prompt" above for more
information about Lua.
Default = NULL

"breakpoint_csv_file" char* Optional name of a comma-separated value

file in which to record breakpoint hits.
If desired, you can specify a single
hyphen for "breakpoint_csv_file" value
and the output will be sent to STDOUT
instead of to a disk file.
The xtsc_core::set_breakpoint_callback()
method provides a means for user code
to get a callback each time a breakpoint
is hit. If desired, you can use this
mechanism to record the breakpoint
information to a CSV file using a
built-in callback function instead of
having to write your own. To do this
simply set this parameter to the desired
name ofthe CSV file to generated. At
the start of simulation, this file will
be created and for each user breakpoint
hit in target code, a line with 9 CSV
values will be added to this file in the
following format:
SimulationTime,"CoreName",PC,CycleCount,CCOUNT
Default = NULL

"simcall_csv_file" char* Optional name of a comma-separated value

file in which to record user simcalls.
If desired, you can specify a single
hyphen for "simcall_csv_file" value and
the output will be sent to STDOUT
instead of to a disk file. In either
case, the values will also be logged
at INFO_LOG_LEVEL to the xtsc.log file.
Xtensa ISS provides a means for target
code to call a user-provided function in
the simulator and pass it up to 6 values
(see xtsc_core::set_simcall_callback).
If desired, you can use this mechanism
to record the 6 simcall arguments to a
CSV file using a built-in callback
function instead of having to write your
own. To do this simply set this
parameter to the desired name ofthe CSV
file to generated. At the start of

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simulation, this file will be created

and for each user simcall executed in
target code, a line with 10 CSV values
will be added to this file in the
following format:
SimulationTime,"CoreName",CycleCount,CCOUNT,arg1,arg2,arg3,arg4,arg5,arg6
By default, each argN value is printed
as a decimal number but this can be
changed using the "simcall_csv_format"
parameter.
Instructions:
1. Include the following file in your target (Xtensa) program:
#include <xtensa/sim.h>
2. Call the xt_iss_simcall() function and pass it 6 arguments. If you
need fewer arguments, you can pass dummy values (e.g. 0) for the extra
arguments to make a total of 6. For example:
xt_iss_simcall(arg1, arg2, 0, 0, 0, 0);
Default = NULL

"simcall_csv_format" vector<u32> Optional vector of from 0 to 6 values

used to specify the output format of the
6 simcall arguments. The first value
specifies the format for arg1, the
second for arg2, and so on (see
"simcall_csv_file"). A value of 0 means
to print the corresponding argument as a
decimal number in the CSV file. A value
of 1 means to print it as hexadecimal with
"0x" prefix. A value of 2 means to
interpret the value as a pointer to a
null-terminated C-string (char*) in the
core's address space and to print the
string. A value of 3 means to not print
the corresponding argument. If less
than 6 values are specified the missing
values default to 0.
Default (unset).

"simcall_logging" bool Enable log4xtensa on/off control via an

xt_iss_simcall() from target (Xtensa)
code. Instructions:
1. Set up logging for the simulation run (see the Logging chapter in xtsc_ug.pdf).
2. Set this parameter to true.
3. In your Xtensa code:
#include <xtensa/sim.h>
To turn logging on:
xt_iss_simcall(1, 0xFACEF00D, 0, 0, 0, 0);
To turn logging off:
xt_iss_simcall(0, 0xFACEF00D, 0, 0, 0, 0);
Note: The arg2 magic value of 0xFACEF00D
is to allow compatibility with other
simcall options like "simcall_csv_file".
Default = false.

"target_memory_limit" u32 The total limit in megabytes of target

memory space that the ISS will allocate
for local memories modelled internally.

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This limit does not apply to XTSC

memory components such as xtsc_memory.
Default = 512 megabytes (0x20000000).

"text_logging_config_file" char* The configuration file for text logging.

If NULL (the default) or empty, and the
XTSC_TEXTLOGGER_CONFIG_FILE environment
variable is defined and NOT equal to off
(case-insensitive) then the contents of
that environment variable will be taken
as the optional path and name of the
configuration file to be used. If the
configuration file named by the
XTSC_TEXTLOGGER_CONFIG_FILE environment
variable does not exists, it will be
created and initialized to contain
configuration information to send
messages at INFO_LOG_LEVEL and higher to
a file in the current working directory
called xtsc.log (or whatever is
specified by the XTSC_LOG_FILE_NAME
environment variable) and to also send
messages at NOTE_LOG_LEVEL and higher to
the console. If
"text_logging_config_file" is NULL or
empty and the
XTSC_TEXTLOGGER_CONFIG_FILE environment
variable is not defined, or is defined
and equal to off, then text logging will
be configured so that messages at
NOTE_LOG_LEVEL and higher will be sent
to the console and other messages will
be discarded. In this case if the
XTSC_TEXTLOGGER_CONFIG_FILE is equal to
off, even though the log4xtensa library
will be configured as just specified,
the xtsc_enable_text_logging() method
will be called with an argument of false
to disable all text logging at
INFO_LOG_LEVEL and below.

"text_logging_delta_cycle_digits" u32 xtsc_set_text_logging_delta_cycle_digits()

is called during xtsc_initialize() with the
value supplied by this parameter.
Default = as set at xtsc_initialize_parms
construction time (which, by default, is
1).

"text_logging_disable" bool The xtsc_enable_text_logging() method is

called during xtsc_initialize() with the
value implied by this parameter unless
"text_logging_config_file" is NULL/empty
and the XTSC_TEXTLOGGER_CONFIG_FILE
environment is defined and equal to off.
Default = as set at xtsc_initialize_parms
construction time (which, by default, is
false).

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"text_logging_time_precision" u32 The xtsc_set_text_logging_time_precision()

method is called during xtsc_initialize()
with the value supplied by this parameter.
Default = as set at xtsc_initialize_parms
construction time (which, by default, is
1).

"text_logging_time_width" u32 The xtsc_set_text_logging_time_width()

method is called during xtsc_initialize()
with the value supplied by this parameter.
Default = as set at xtsc_initialize_parms
construction time (which, by default, is
10).

"toggle_logging" vector<u32> Optional vector of delay values after

which the state of logging will be
toggled. The delays are expressed in
terms of the XTSC system clock period.
For example, using the hello_world XTSC
example the following can be used to
turn logging off after elaboration and
then back on again after 20000 clock
periods for 1000 clock periods:
xtsc-run -set_xtsc_parm=toggle_logging=0,20000,1000 -include=hello_world.inc
./hello_world -toggle_logging=0,20000,1000
Default (unset).

"turbo" bool This parameter controls the default

setting of the xtsc_core_parms parameter
"SimTurbo".
Default = false.

"turbo_max_relaxed_cycles" u32 This specifies the maximum total amount

that a device may run ahead of actual
simulation time without yielding to the
SystemC kernel when operating in the
functional mode of TurboXim. This
amount is expressed in terms of
system clock periods.
See xtsc_get_system_clock_period().
Default = 10000000.

"turbo_min_sync" bool By default, after TurboXim has run ahead

and returns control back to the SystemC
kernel, it synchronizes the SystemC time
by waiting for a number of clock periods
approximately corresponding to the
number of instructions executed. If
desired, you can limit this wait to a
single cycle by setting this parameter
to true.
Note: Setting this parameter to true
when using xtsc_dma_engine can cause
problems. See the "turbo" parameter in
xtsc_component::xtsc_dma_engine_parms.
Default = false.

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"xtsc_command_prompt" bool If true, then a XTSC command prompt will

be available at the start of simulation
that gives access to all the XTSC commands
registered via xtsc_register_command().
For example using hello_world:
./hello_world -xtsc_command_prompt=true
cmd: help
...
cmd: ?
sc_simulation: sc
xtsc_core: core0
xtsc_memory: core0_pif
xtsc_simulation: xtsc
cmd: sc wait 100
100.0/320:
cmd: core0 get_pc
0x4000005f
cmd: core0 dasm pc
0x4000005f: movi.n a3,21
cmd: core0 dasm next
0x40000061: wsr.atomctl a3
cmd: c
For example using xtsc-run:
xtsc-run -include=hello_world.inc -set_xtsc_parm=xtsc_command_prompt=true
...
You can get the XTSC command prompt in
an "empty" simulation which has only the
global xtsc and sc command handlers
using xtsc-run like this:
xtsc-run -set_xtsc_parm=xtsc_command_prompt=true
...
Note: If this parameter is set to true
then "lua_command_prompt" should be
left false.
Note: When debugging, although it is
possible to switch between the xt-gdb
prompt and the XTSC command prompt with
some effort, usually a better technique
is to issue XTSC commands directly from
the xt-gdb prompt using the ISS cmdloop
(so all XTSC commands are prefixed by
"iss xtsc"). For example:
(xt-gdb) iss help
(xt-gdb) iss help xtsc
(xt-gdb) iss xtsc help
(xt-gdb) iss xtsc help sc_time_stamp
(xt-gdb) iss xtsc sc sc_time_stamp
(xt-gdb) iss xtsc xtsc xtsc_version
Default = false

"xtsc_finalize_unwind" bool If this parameter is set to false, then

the first call to xtsc_finalize() will
finalize simulation and subsequent calls
will be ignored. If this parameter is
true, then xtsc_finalize() must be called
as many times as xtsc_initialize() has

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been called before simulation will

actually be finalized.
Note: Simulation is always initialized
upon the first call to xtsc_initialize()
and subsequent calls are tallied but
otherwise ignored.
Default = false.

"xtsc_port_type_check_bypass" bool If this parameter is set to true, then

xtsc_port_type_check() will log an INFO
level message instead of failing if the
a port's type does not match the
expected xtsc_port_type in the
xtsc_port_type_check() method.
Default = false.

See also:
xtsc_initialize
xtsc_parms
xtsc_core_parms

Definition at line 1049 of file xtsc.h.

7.67.2 Constructor & Destructor Documentation

7.67.2.1 xtsc_initialize_parms (const char ∗ text_logging_config_file = NULL)

Constructor for an xtsc_initialize_parms object.

Parameters:
text_logging_config_file The value for the "text_logging_config_file" parameter.

The documentation for this class was generated from the following file:

• xtsc.h

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7.68 xtsc_lookup Class Reference

An TIE lookup implementation that connects using TLM-level ports.

#include <xtsc/xtsc_lookup.h>Inheritance diagram for xtsc_lookup:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface

xtsc_lookup

Collaboration diagram for xtsc_lookup:

xtsc_connection_interface

xtsc_module
xtsc_lookup_if
xtsc_resettable

xtsc_command_handler_interface m_lookup xtsc_lookup_if_impl

xtsc_lookup m_lookup_impl
m_file
xtsc_script_file
m_lookup_parms

xtsc_parms xtsc_lookup_parms

Classes
• class xtsc_lookup_if_impl
Implementation of xtsc_lookup_if.

Public Member Functions

• SC_HAS_PROCESS (xtsc_lookup)
• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

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• xtsc_lookup (sc_core::sc_module_name module_name, const xtsc_lookup_parms

&lookup_parms)
Constructor for an xtsc_lookup.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• void reset (bool hard_reset=false)

Reset the xtsc_lookup.

• void change_clock_period (xtsc::u32 clock_period_factor)

Method to change the clock period.

• void set_ready_enable (bool ready_enable)

Method to set or clear the m_ready_enable flag.

• bool get_ready_enable () const

Method to get the m_ready_enable flag.

• void execute (const std::string &cmd_line, const std::vector< std::string > &words,
const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

• void connect (xtsc::xtsc_core &core, const char ∗lookup_name)

Connect to a xtsc_core.

• void connect (xtsc_lookup_driver &driver)

Connect to a xtsc_lookup_driver.

• void dump (std::ostream &os)

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Dump the connects of the xtsc_lookup to the specified ostream object.

• std::string peek (const std::string &address)

Return the value stored at the specified address.

• void poke (const std::string &address, const std::string &data)

Store the specified value at the specified address.

• void end_of_simulation ()
• log4xtensa::TextLogger & get_text_logger ()
Get the TextLogger for this component (e.g. to adjust its log level).

• log4xtensa::BinaryLogger & get_binary_logger ()

Get the BinaryLogger for this component (e.g. to adjust its log level).

Public Attributes
• sc_core::sc_export< xtsc::xtsc_lookup_if > m_lookup
Driver binds to this.

Protected Member Functions

• void validate_address (const std::string &address)
Helper method to validate a peek/poke address or throw an exception.

• void compute_delays ()
Common method to compute/re-compute time delays.

• virtual void get_data_from_address ()

Get the data given the address.

• void get_sc_unsigned (xtsc::u32 index, sc_dt::sc_unsigned &value)

Convert m_words[index] to sc_unsigned value.

• bool pipeline_full ()
Return true if the pipeline is full.

• void do_lookup ()
Do the lookup.

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• sc_dt::sc_unsigned ∗ new_sc_unsigned (const std::string &value)

Get an sc_unsigned from the pool.

• sc_dt::sc_unsigned ∗ new_sc_unsigned (const sc_dt::sc_unsigned &value)

Get an sc_unsigned from the pool.

• void delete_sc_unsigned (sc_dt::sc_unsigned ∗&p_sc_unsigned)

Return an sc_unsigned to the pool.

Protected Attributes

• xtsc_lookup_if_impl m_lookup_impl
m_lookup binds to this

• xtsc_lookup_parms m_lookup_parms
Copy of xtsc_lookup_parms.

• bool m_ram
True if lookup is a RAM, otherwise false.

• bool m_override_lookup
See the "override_lookup" parameter.

• xtsc::u32 m_address_bit_width
The lookup address bit width.

• xtsc::u32 m_ram_address_bits
The RAM address bit width (if m_ram).

• xtsc::u32 m_data_bit_width
The lookup data bit width.

• bool m_active_high_strobe
The write strobe is active high.

• xtsc::u32 m_write_strobe_bit
The bit position in the lookup address of the write strobe.

• xtsc::u32 m_ram_address_lsb

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The starting bit position in the lookup address of the RAM address.

• xtsc::u32 m_ram_address_msb
The ending bit position in the lookup address of the RAM address.

• xtsc::u32 m_write_data_lsb
The starting bit position in the lookup address of the write data.

• xtsc::u32 m_write_data_msb
The ending bit position in the lookup address of the write data.

• std::vector< xtsc::u32 > m_ram_write_enables

From "ram_write_enables" parameter.

• bool m_has_ram_write_enables
true if "ram_write_enables" is specified

• bool m_has_ready
True if lookup has a ready signal.

• xtsc::u32 m_latency
Latency from request/ready to valid data.

• xtsc::u32 m_pipeline_depth
Pipeline depth.

• bool m_enforce_latency
Check timing of nb_get_data() call.

• xtsc::u32 m_delay
Default delay from request to ready as cycles.

• xtsc::u32 m_delay_next
Delay to apply after this lookup.

• bool m_ready_enable
Enable as set by set_ready_enable(). Initially true.

• bool m_ready
The ready signal (must be AND’d with m_ready_enable).

• sc_core::sc_time m_ready_net_time

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Ready no-earlier-than (net) time.

• sc_dt::sc_unsigned m_default_data
Data to use if address is not in lookup table.

• std::string m_lookup_table
Name of "lookup_table" file.

• std::string m_lua_data_function
From <LuaDataFunction> in lua_function line of "lookup_table" file.

• std::string m_lua_delay_function
From <LuaDelayFunction> in lua_function line of "lookup_table" file.

• bool m_lua_function
True if there was a lua_function line in "lookup_table" file.

• bool m_file_logged
True if contents of m_file have been logged.

• xtsc::xtsc_script_file ∗ m_file
The lookup_file.

• std::string m_line
Current line from m_file.

• xtsc::u32 m_line_count
Current line number from m_file.

• std::vector< std::string > m_words

Current line tokenized into words.

• std::map< std::string, sc_dt::sc_unsigned ∗ > m_data_map

The lookup table.

• std::map< std::string, xtsc::u32 > m_delay_map

Delay associated with each address.

• sc_dt::sc_unsigned m_data
Current request data.

• sc_dt::sc_unsigned m_data_temp

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To hold data temporarily.

• sc_dt::sc_unsigned m_old_data
Data previously at current request address.

• sc_dt::sc_unsigned m_poke_data
Buffer for poke().

• sc_dt::sc_unsigned m_address
Current request address.

• bool m_write
True if lookup is a write, false if lookup is a read.

• sc_core::sc_event m_lookup_ready_event
Notified when lookup might be ready (i.e. "ask me again").

• std::deque< sc_dt::sc_unsigned ∗ > m_data_fifo

FIFO of lookup data values.

• std::deque< sc_dt::sc_unsigned ∗ > m_recycle_fifo

FIFO of lookup data values from LuaDataFunction that need to be recycled.

• std::deque< xtsc::u64 > m_cycle_fifo

FIFO of clock cycle to get lookup data for latency checking.

• sc_dt::sc_unsigned m_zero
Constant 0.

• sc_dt::sc_unsigned m_one
Constant 1.

• sc_core::sc_time m_time_resolution
SystemC time resolution.

• sc_core::sc_time m_clock_period
This module’s clock period.

• xtsc::u64 m_clock_period_value
Clock period as u64.

• bool m_has_posedge_offset

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True if m_posedge_offset is non-zero.

• sc_core::sc_time m_posedge_offset
From "posedge_offset" parameter.

• xtsc::u64 m_posedge_offset_value
m_posedge_offset as u64

• std::vector< sc_dt::sc_unsigned ∗ > m_sc_unsigned_pool

Maintain a pool of sc_unsigned to improve performance.

• sc_core::sc_trace_file ∗ m_p_trace_file
From "vcd_handle" parameter.

• xtsc::u32 m_nb_send_address_cnt
Count nb_send_address() calls for vcd tracing.

• xtsc::u32 m_nb_is_ready_cnt
Count nb_is_ready() calls for vcd tracing.

• xtsc::u32 m_nb_get_data_cnt
Count nb_get_data() calls for vcd tracing.

• sc_dt::sc_unsigned m_address_trace
For vcd tracing.

• sc_dt::sc_unsigned m_data_trace
For vcd tracing.

• sc_dt::sc_unsigned ∗ m_p_ram_addr
RAM address unmodified.

• sc_dt::sc_unsigned ∗ m_p_effective_ram_addr
RAM address with enable bits (if any) forced to 0.

• log4xtensa::TextLogger & m_text

The logger for text messages.

• log4xtensa::BinaryLogger & m_binary

The logger for binary logging.

• bool m_dump_after_sim
Lookup contents are dumped to log after simulation if set to True.

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7.68.1 Detailed Description

An TIE lookup implementation that connects using TLM-level ports. Example XTSC module
implementing the xtsc::xtsc_lookup_if interface. This module can be configured to function
as a ROM-based lookup table which is initialized from a file or to function as a custom RAM.
In the latter case the TIE address signal is comprised of three bit fields: the RAM address,
the write data, and a write strobe.
This module can also be used to model a computed lookup (that is, a non-ROM based
lookup) using a Lua function. When modeling a lookup device with a ready signal, each
possible lookup address can have a custom delay associated with it that specifies how
long the ready signal is deasserted after a lookup to that particular address (so the delay
potentially affects the next lookup, not the current lookup). Note: This delay behavior is a
change from the RC-2010.1 and earlier behavior.
Alternatively, this class can be sub-classes to provide an arbitrary lookup function (i.e. not
ROM based) by overriding the get_data_from_address() virtual method.
Here is a block diagram of the system used in the xtsc_lookup example (memory not
shown):

nb_send_address()
nb_is_ready()
nb_get_data()
xtsc_core core0
xtsc_lookup tbl
(lookup_test.out)
lut.rom

core0.get_lookup("lut")

(tbl.m_lookup)

Figure 7.4: xtsc_lookup Example

Here is the code to connect the system using the xtsc::xtsc_connect() method:

xtsc_connect(core0, "pif", "", core0_pif);

xtsc_connect(core0, "lut", "", tbl);

And here is the code to connect the system using manual SystemC port binding:

core0.get_request_port("pif")(*core0_pif.m_request_exports[0]);
(*core0_pif.m_respond_ports[0])(core0.get_respond_export("pif"));
core0.get_lookup("lut")(tbl.m_lookup);

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See also:
xtsc_lookup_parms
xtsc::xtsc_lookup_if
xtsc::xtsc_core::How_to_do_port_binding

Definition at line 517 of file xtsc_lookup.h.

7.68.2 Constructor & Destructor Documentation

7.68.2.1 xtsc_lookup (sc_core::sc_module_name module_name, const

xtsc_lookup_parms & lookup_parms)

Constructor for an xtsc_lookup.

Parameters:
module_name Name of the xtsc_lookup sc_module.
lookup_parms The remaining parameters for construction.

See also:
xtsc_lookup_parms

7.68.3 Member Function Documentation

7.68.3.1 void change_clock_period (xtsc::u32 clock_period_factor)

Method to change the clock period.

Parameters:
clock_period_factor Specifies the new length of this device’s clock period expressed
in terms of the SystemC time resolution (from sc_get_time_resolution()).

7.68.3.2 void set_ready_enable (bool ready_enable)

Method to set or clear the m_ready_enable flag. When the m_ready_enable flag is false,
the nb_is_ready() method will always return false. When the m_ready_enable flag is true,
the nb_is_ready() method will return true or false depending on the pipeline and on the
delay.
Warning: This method should not be called in the same cycle that nb_send_address() is
called.

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Note: The use of delay is deprecated. See the Deprecation Notice associated with "delay"
and "lookup_table" in xtsc_lookup_parms.

Parameters:
ready_enable Value of the m_ready_enable flag.

See also:
get_ready_enable().

7.68.3.3 bool get_ready_enable () const

Method to get the m_ready_enable flag.

See also:
set_ready_enable().

7.68.3.4 void execute (const std::string & cmd_line, const std::vector< std::string
> & words, const std::vector< std::string > & words_lc, std::ostream &
result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:
change_clock_period <ClockPeriodFactor>
Call xtsc_lookup::change_clock_period(<ClockPeriodFactor>). Return previous
<ClockPeriodFactor> for this lookup.

dump
Return the os buffer from calling xtsc_lookup::dump(os).

get_ready_enable
Return the value from calling xtsc_lookup::get_ready_enable().

peek <Address>
Call xtsc_lookup::peek(<Address>).

poke <Address> <Value>

Return xtsc_lookup::poke(<Address>, <Value>).

reset [<Hard>]
Call xtsc_lookup::reset(<Hard>). Where <Hard> is 0|1 (default 0).

set_ready_enable <ReadyEnable>
Call xtsc_lookup::set_ready_enable(<ReadyEnable>).

Implements xtsc_command_handler_interface.

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7.68.3.5 void connect (xtsc::xtsc_core & core, const char ∗ lookup_name)

Connect to a xtsc_core. This method connects this xtsc_lookup to the named lookup inter-
face of the specified xtsc_core.

Parameters:
core The xtsc_core to connect to.
lookup_name Lookup name as it appears in the user’s TIE code after the lookup
keyword. This name must NOT begin with the "TIE_" prefix.

7.68.3.6 void connect (xtsc_lookup_driver & driver)

Connect to a xtsc_lookup_driver. This method connects this xtsc_lookup to the specified

xtsc_lookup_driver.

Parameters:
driver The xtsc_lookup_driver to connect to.

7.68.3.7 std::string peek (const std::string & address)

Return the value stored at the specified address. If no value is stored at address, then an
empty string is returned.

Parameters:
address The address to poke. It must be in hex with a leading ’0x’ and contain
the number of nibbles implied by the "address_bit_width" and "data_bit_width"
(if "ram" is true) parameters.

7.68.3.8 void poke (const std::string & address, const std::string & data)

Store the specified value at the specified address.

Parameters:
address The address to poke. It must be in hex with a leading ’0x’ and contain
the number of nibbles implied by the "address_bit_width" and "data_bit_width"
(if "ram" is true) parameters.
value The value to store (must be convertible to an sc_unsigned).

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7.68.3.9 virtual void get_data_from_address () [protected, virtual]

Get the data given the address. Sub-classes can override this virtual method to provide
their own way of determining the data (m_data) given a address (m_address) when using
an exhaustive mapping of addresses-to-data is undesirable.
Note: The input to this method is the m_address member variable and the output of this
method is the m_data member variable.
For example, the following code implements an xtsc_lookup sub-class that computes a
data value equal to double the address:

class double_lookup : public xtsc_lookup {

public:
double_lookup(sc_module_name module_name, xtsc_lookup_parms parms) :
xtsc_lookup (module_name, parms)
{}
protected:
virtual void get_data_from_address() {
m_data = 2*m_address;
}
};

The documentation for this class was generated from the following file:

• xtsc_lookup.h

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7.69 xtsc_lookup_driver Class Reference

A scripted driver for a lookup.

#include <xtsc/xtsc_lookup_driver.h>Inheritance diagram for xtsc_lookup_driver:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_lookup_if

xtsc_lookup_driver

Collaboration diagram for xtsc_lookup_driver:

xtsc_connection_interface xtsc_resettable xtsc_signal_sc_bv_base

xtsc_module xtsc_lookup_if xtsc_script_file xtsc_signal_sc_bv_base_floating

m_ready_floating
m_data_floating
m_test_vector_stream
m_req_floating
m_address_floating

xtsc_lookup_driver

Public Member Functions

• SC_HAS_PROCESS (xtsc_lookup_driver)
• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

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• xtsc_lookup_driver (sc_core::sc_module_name module_name, const xtsc_lookup_-

driver_parms &driver_parms)
Constructor for an xtsc_lookup_driver.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• void reset (bool hard_reset=false)

Reset the xtsc_lookup_driver.

• void script_thread (void)

Thread to process commands from m_script_file.

• void sample_phase_thread (void)

Thread to sample the m_ready signal to see if lookup succeeded.

• void sample_data_thread (void)

Thread to sample the m_data signal.

• void request_thread (void)

Thread to drive the lookup request.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

Public Attributes

• sc_core::sc_out< sc_dt::sc_bv_base > m_address

pin-level address to lookup

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• sc_core::sc_out< sc_dt::sc_bv_base > m_req

pin-level request to lookup

• sc_core::sc_in< sc_dt::sc_bv_base > m_data

pin-level data signal from lookup

• sc_core::sc_in< sc_dt::sc_bv_base > m_ready

pin-level ready signal from lookup

• sc_core::sc_port< xtsc::xtsc_lookup_if > m_lookup

TLM port to the lookup.

Protected Member Functions

• xtsc::u32 get_u32 (xtsc::u32 index, const std::string &argument_name)
Extract a u32 value (named argument_name) from the word at m_words[index].

• double get_double (xtsc::u32 index, const std::string &argument_name)

Extract a double value (named argument_name) from the word at m_words[index].

• void end_of_elaboration ()
Method to check interface width.

• void nb_send_address (const sc_dt::sc_unsigned &address)

This method is called by the TIE lookup client to request that a lookup be performed using
the specified address.

• bool nb_is_ready ()
This method is called by the TIE lookup client when it needs to determine if the TIE lookup
request (sent using the nb_send_address() method) was accepted.

• sc_dt::sc_unsigned nb_get_data ()
This method is called to get the TIE lookup response data.

• xtsc::u32 nb_get_address_bit_width ()
Get the address bit width that the lookup implementation expects.

• xtsc::u32 nb_get_data_bit_width ()
Get the data bit width that the lookup implementation will return.

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Protected Attributes
• log4xtensa::TextLogger & m_text
For logging.

• bool m_has_ready
From "has_ready" paramter.

• xtsc::xtsc_script_file m_test_vector_stream
Script file from "script_file" parameter.

• std::string m_script_file
Script file name from "script_file" parameter.

• std::string m_line
Current line from "script_file".

• xtsc::u32 m_line_count
Current line number from "script_file".

• std::vector< std::string > m_words

Current line from "script_file" tokenized into words.

• sc_core::sc_time m_latency
From "latency" parameter.

• xtsc::u64 m_clock_period_value
This device’s clock period as u64.

• sc_core::sc_time m_clock_period
From "clock_period" parameter.

• sc_core::sc_time m_poll_ready_delay
From "poll_ready_delay" parameter.

• sc_core::sc_time m_delay_after_ready
m_clock_period - m_poll_ready_delay

• sc_core::sc_time m_notify_delay
m_latency - m_poll_ready_delay

• sc_core::sc_time m_time_resolution

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The SystemC time resolution.

• bool m_has_posedge_offset
True if m_posedge_offset is non-zero.

• sc_core::sc_time m_posedge_offset
From "posedge_offset" parameter.

• xtsc::u64 m_posedge_offset_value
m_posedge_offset as u64

• sc_core::sc_time m_sample_phase
From "sample_phase" parameter.

• sc_core::sc_time m_deassert_delay
From "deassert_delay" parameter.

• sc_core::sc_time m_timeout
From <timeout> in current line from "script_file".

• bool m_no_timeout
True if <timeout> was not specified in "script_file" for this lookup.

• xtsc::u32 m_address_width1
From "address_bit_width" parameter.

• xtsc::u32 m_data_width1
From "data_bit_width" parameter.

• sc_dt::sc_unsigned m_lookup_address
From <address> in current line from "script_file".

• sc_dt::sc_bv_base m_lookup_address_bv
From <address> in current line from "script_file".

• bool m_pin_level
From "pin_level" parameter.

• sc_core::sc_trace_file ∗ m_p_trace_file
From "vcd_handle" parameter.

• sc_dt::sc_unsigned m_zero

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Constant 0.

• sc_dt::sc_unsigned m_one
Constant 1.

• sc_dt::sc_bv_base m_zero_bv
Constant 0.

• sc_dt::sc_bv_base m_one_bv
Constant 1.

• sc_core::sc_event m_next_request
To notify script_thread to continue.

• sc_core::sc_event m_assert
To notify request_thread to assert lookup request.

• sc_core::sc_event m_deassert
To notify request_thread to deassert lookup request.

• sc_core::sc_event_queue m_sample_data
To notify sample_data_thread to sample the data.

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

• xtsc::xtsc_signal_sc_bv_base_floating m_address_floating
• xtsc::xtsc_signal_sc_bv_base_floating m_req_floating
• xtsc::xtsc_signal_sc_bv_base_floating m_data_floating
• xtsc::xtsc_signal_sc_bv_base_floating m_ready_floating

7.69.1 Detailed Description

A scripted driver for a lookup. This XTSC device implements a lookup driver that reads an
input file ("script_file") to determine when and what lookup requests to send to a lookup
device.
This device provides a simple means to deliver test transactions to a lookup at the TLM-
level (such as xtsc_lookup) or at the pin-level (such as xtsc_lookup_pin). To use pin-level
connections, you must set the "pin_level" parameter to true.
Here is a block diagram of an xtsc_lookup_driver as it is used in the driver example:

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nb_send_address()
nb_is_ready()
nb_get_data()
xtsc_lookup_driver driver xtsc_lookup lut

driver.vec lut.rom

driver.m_lookup lut.m_lookup

Figure 7.5: xtsc_lookup_driver Example

See also:
xtsc_lookup_driver_parms
xtsc::xtsc_lookup_if

Definition at line 276 of file xtsc_lookup_driver.h.

7.69.2 Constructor & Destructor Documentation

7.69.2.1 xtsc_lookup_driver (sc_core::sc_module_name module_name, const

xtsc_lookup_driver_parms & driver_parms)

Constructor for an xtsc_lookup_driver.

Parameters:
module_name Name of the xtsc_lookup_driver sc_module.
driver_parms The remaining parameters for construction.

See also:
xtsc_lookup_driver_parms

7.69.3 Member Function Documentation

7.69.3.1 void nb_send_address (const sc_dt::sc_unsigned & address) [inline,

protected, virtual]

This method is called by the TIE lookup client to request that a lookup be performed using
the specified address. For the typical case of an xtsc_core TIE lookup client, this method is
called on each clock cycle in which the Xtensa core is driving the TIE_xxx_Out_Req signal

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(where xxx is the lookup name in the user TIE code). If the "rdy" keyword was specified in
the user TIE code, then this method will be re-called by xtsc_core on each clock cycle after
nb_is_ready() returns false (unless the instruction performing the lookup is killed).

Parameters:
address The sc_unsigned object containing the lookup address. For an xtsc_core
TIE lookup client, this parameter corresponds to the TIE_xxx_Out signal, where
xxx is the lookup name in the user TIE code.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implements xtsc_lookup_if.
Definition at line 421 of file xtsc_lookup_driver.h.

7.69.3.2 bool nb_is_ready () [inline, protected, virtual]

This method is called by the TIE lookup client when it needs to determine if the TIE lookup
request (sent using the nb_send_address() method) was accepted. For the typical case
of an xtsc_core TIE lookup client, this method will not be called unless the lookup section
of the user TIE code specified the "rdy" keyword. If the "rdy" keyword was specified in the
user TIE code, then the TIE lookup implementation must override this virtual method.

Returns:
true if the TIE lookup request was accepted.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Reimplemented from xtsc_lookup_if.
Definition at line 422 of file xtsc_lookup_driver.h.

7.69.3.3 sc_dt::sc_unsigned nb_get_data () [inline, protected, virtual]

This method is called to get the TIE lookup response data. This method must be called
exactly one time for each nb_is_ready() call that returns true.
For hardware configurations where the nb_is_ready() call is not used (e.g. an Xtensa TIE
port defined without the "rdy" keyword), this method must be called exactly one time for
each nb_send_address() call.
For the typical case of an xtsc_core TIE lookup client, this method is called after a latency
of <use_stage> minus <def_stage> clock cycles, where <use_stage> and <def_stage>

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are the values specified in the lookup section of the user TIE code. If the "rdy" keyword
was specified in the user TIE code, then the latency starts on the clock cycle in which nb_-
is_ready() returns true. If the "rdy" keyword was not specified, then the latency starts on
the clock cycle when nb_send_address() is called.

Returns:
The sc_unsigned object containing the response data. For an xtsc_core TIE lookup
client, this data corresponds to the TIE_xxx_In signal, where xxx is the lookup name
in the user TIE code.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implements xtsc_lookup_if.
Definition at line 423 of file xtsc_lookup_driver.h.

7.69.3.4 xtsc::u32 nb_get_address_bit_width () [inline, protected, virtual]

Get the address bit width that the lookup implementation expects. This method allows the
TIE lookup client to confirm that the implementation is using the correct size for the lookup
address. For an xtsc_core TIE lookup client, the data returned should be the width of the
TIE_xxx_Out signal as specified by <output_width> in the "lookup xxx" section of the user
TIE code.
Implements xtsc_lookup_if.
Definition at line 424 of file xtsc_lookup_driver.h.

7.69.3.5 xtsc::u32 nb_get_data_bit_width () [inline, protected, virtual]

Get the data bit width that the lookup implementation will return. This method allows the TIE
lookup client to confirm that the implementation is using the correct size for the response
data. For an xtsc_core TIE lookup client, the data returned should be the width of the TIE_-
xxx_In signal as specified by <input_width> in the the "lookup xxx" section of the user TIE
code.
Implements xtsc_lookup_if.
Definition at line 425 of file xtsc_lookup_driver.h.
The documentation for this class was generated from the following file:

• xtsc_lookup_driver.h

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7.70 xtsc_lookup_driver_parms Class Reference

Constructor parameters for a xtsc_lookup_driver object.

#include <xtsc/xtsc_lookup_driver.h>Inheritance diagram for xtsc_lookup_driver_-
parms:

xtsc_parms

xtsc_lookup_driver_parms

Collaboration diagram for xtsc_lookup_driver_parms:

xtsc_parms

xtsc_lookup_driver_parms

Public Member Functions

• xtsc_lookup_driver_parms (xtsc::u32 address_bit_width=0, xtsc::u32 data_bit_-

width=0, bool has_ready=false, const char ∗script_file=0)
Constructor for an xtsc_lookup_driver_parms object.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

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7.70.1 Detailed Description

Constructor parameters for a xtsc_lookup_driver object. This class contains the constructor
parameters for a xtsc_lookup_driver object.

Name Type Description

------------------ ---- --------------------------------------------------------

"address_bit_width" u32 Width of request address in bits.

"data_bit_width" u32 Width of respone data in bits.

"has_ready" bool Specifies whether the lookup device has a ready signal.
This corresponds to the rdy keyword in the user's TIE
code for the lookup.

"latency" u32 The latency is defined by the <use_stage> and

<def_stage> values in the user TIE code defining the
TIE lookup port according to the following formula:
latency = <use_stage> - <def_stage>
If "has_ready" is true, "latency" specfies how many
clock cycles after m_ready (TIE_xxx_Rdy) is asserted
that m_data (TIE_xxx_In) is valid.
If "has_ready" is false, "latency" specfies how many
clock cycles after m_req (TIE_xxx_Out_Req) is asserted
that m_data (TIE_xxx_In) is valid. "latency" must be
greater than 0.
Default = 1.

"pin_level" bool If true, pin-level connections are used.

Default = false (TLM connections are used).

"vcd_handle" void* Pointer to SystemC VCD object (sc_trace_file *) or 0 if

tracing is not desired. This parameter is ignored if
"pin_level" is false.
Default = 0 (NULL).

"script_file" char* The file to read the test vector commands from. Each
command occupies one line in the file. Valid command
formats are shown below (the first format shows a lookup
transaction command):

<delay> <address> [<timeout>]

<delay> STOP
WAIT <duration>
SYNC <time>
NOTE message
INFO message

1. Integers can appear in decimal or hexadecimal (using

'0x' prefix) format.
2. <delay> specifies how long to wait before sending
the <address> request to the lookup or stopping
simulation. <delay> can be 0 (to mean 1 delta
cycle), or "now" to mean no delta cycle delay, or a
positive integer or floating point number to mean

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that many clock periods (see "clock_period").

3. <address> specifies the address to send into the lookup.
The <address> format is as specified by Table 3 of
Section 7.3 "String Literals" of the SystemC LRM.
Some example <address> values are:
0x1234 // Hex
0b01101110 // Binary
0d256 // Decimal
256 // Decimal
4. The <timeout> value is only used if "has_ready" is
true. It specifies how long to continue sending
the <address> request to the lookup. For a TLM-level
connection (e.g. to xtsc_lookup), <timeout>
specifies a non-zero integer number of clock
periods and the lookup request is repeated each
clock period for <timeout> number of clock periods
or until the lookup request is granted. For a
pin-level connection (e.g. to xtsc_lookup_pin),
<timeout> is multiplied by the device's clock
period (see "clock_period") to determine the
maximum amount of time the m_req signal will be
asserted before being abandoned if it has not yet
been not granted. For a pin-level connection,
<timeout> can be an integer or a floating point
number. For either a TLM-level or a pin-level
connection, a negative <timeout> value means to
keep trying the request until it is granted.
Default = -1 (keep requesting until granted).
5. The "<delay> STOP" command causes simulation to stop
via a call to the sc_stop() method after the
specified delay.
6. The "WAIT <duration>" command can be used to cause a
wait of the specified duration. <duration> can be 0
(to mean 1 delta cycle) or a positive integer or
floating point number to mean that many clock
periods.
7. The "SYNC <time>" command with <time> less than 1.0
can be used to cause a wait to the clock phase
(relative to posedge clock) specified by <time>.
Posedge clock is as specified by "posedge_offset".
For example, "sync 0.5" will cause the minimum wait
necessary to sync to negedge clock.
The "SYNC <time>" command with <time> greater than
or equal to 1.0 can be used to cause a wait until
the specified absolute simulation time.
8. The NOTE and INFO commands can be used to cause
the entire line to be logged at NOTE_LOG_LEVEL
or INFO_LOG_LEVEL, respectively.
9. Words are case insensitive.
10. Comments, extra whitespace, blank lines, and lines
between "#if 0" and "#endif" are ignored.
See xtsc_script_file for a complete list of
pseudo-preprocessor commands.

"clock_period" u32 This is the length of this device's clock period

expressed in terms of the SystemC time resolution
(from sc_get_time_resolution()). A value of

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0xFFFFFFFF means to use the XTSC system clock

period (from xtsc_get_system_clock_period()).
Default = 0xFFFFFFFF (i.e. use the system clock
period).

"poll_ready_delay" u32 This parameter is ignored if "pin_level" is true or if

"has_ready" is false. This parameter specifies how long
the driver should delay after calling nb_send_address()
before calling nb_is_ready(). It is expressed in units
of the SystemC time resolution and the value implied by
it must be strickly less than the value implied by the
"clock_period" parameter. A value of 0xFFFFFFFF means
to delay for one-half of a clock period. After the call
to nb_is_ready(), there is another delay equal to the
clock period minus this delay before repeating the call
to nb_is_ready() or continuing with the script file.
Default = 0xFFFFFFFF (i.e. one-half a clock period).

Note: The "poll_ready_delay" parameter was introduced after (not including) RC-2010.1
to allow the driver to better model xtsc_core behavior. To get the behavior of
RC-2010.1 and earlier, set "poll_ready_delay" to 0.

"posedge_offset" u32 This specifies the time at which the first posedge of
this device's clock conceptually occurs. It is
expressed in units of the SystemC time resolution and
the value implied by it must be strictly less than the
value implied by the "clock_period" parameter. A value
of 0xFFFFFFFF means to use the same posedge offset as
the system clock (from
xtsc_get_system_clock_posedge_offset()).
Default = 0xFFFFFFFF.

"sample_phase" u32 This parameter applies to pin-level connections only.

If "has_ready" is true, this parameter specifies the
point in each clock period at which the m_ready signal
is sampled. If "has_ready" is false, this parameter
specifies the point in each request clock cycle (i.e.
a clock cycle in which m_req is asserted) that the
"deassert_delay" timing starts. This parameter is
expressed in terms of the SystemC time resolution (from
sc_get_time_resolution()) and must be strictly less
than the clock period as specified by the
"clock_period" parameter. A value of 0 means sampling
occurs (or "deassert_delay" timing starts) at posedge
clock as specfied by "posedge_offset".
Default = 0.

"deassert_delay" u32 This parameter applies to pin-level connections only.

If "has_ready" is true, this parameter specifies how
long after the m_ready signal is sampled and found to
be true, that the m_req signal should be deasserted.
If "has_ready" is false, this parameter specifies
how long after the "sample_phase" time that the m_req
signal should be deasserted. This parameter is
expressed in terms of the SystemC time resolution
(from sc_get_time_resolution()) and must be strictly
less than the clock period as specified by the

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"clock_period" parameter. A value of 0 means the m_req

signal will be deasserted 1 delta cycle after the
"sample_phase" time (if m_ready is true or if
"has_ready" is false).
Default = 0.

See also:
xtsc_lookup_driver
xtsc::xtsc_parms
xtsc::xtsc_script_file

Definition at line 216 of file xtsc_lookup_driver.h.

7.70.2 Constructor & Destructor Documentation

7.70.2.1 xtsc_lookup_driver_parms (xtsc::u32 address_bit_width = 0, xtsc::u32

data_bit_width = 0, bool has_ready = false, const char ∗ script_file = 0)
[inline]

Constructor for an xtsc_lookup_driver_parms object.

Parameters:
address_bit_width Width of request address in bits.
data_bit_width Width of response data in bits.
has_ready Specifies whether or not the lookup device has a ready signal (corre-
sponds to the rdy keyword in the user’s TIE code for the lookup).
script_file The file name to read the xtsc::xtsc_request test vectors from.

Definition at line 234 of file xtsc_lookup_driver.h.

The documentation for this class was generated from the following file:

• xtsc_lookup_driver.h

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7.71 xtsc_lookup_if Class Reference

Interface for connecting a TIE lookup client to an implementation.

#include <xtsc/xtsc_lookup_if.h>Inheritance diagram for xtsc_lookup_if:

xtsc_rer_lookup_if_impl

xtsc_wer_lookup_if_impl

xtsc_lookup_if
xtsc_lookup_if_impl

xtsc_lookup_driver

Public Member Functions

• virtual void nb_send_address (const sc_dt::sc_unsigned &address)=0
This method is called by the TIE lookup client to request that a lookup be performed using
the specified address.

• virtual bool nb_is_ready ()

This method is called by the TIE lookup client when it needs to determine if the TIE lookup
request (sent using the nb_send_address() method) was accepted.

• virtual sc_dt::sc_unsigned nb_get_data ()=0

This method is called to get the TIE lookup response data.

• virtual u32 nb_get_address_bit_width ()=0

Get the address bit width that the lookup implementation expects.

• virtual u32 nb_get_data_bit_width ()=0

Get the data bit width that the lookup implementation will return.

• virtual const sc_core::sc_event & default_event () const

Return the lookup-ready event.

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7.71.1 Detailed Description

Interface for connecting a TIE lookup client to an implementation. This interface is for
connecting between a TIE lookup client (typically an xtsc_core) and a TIE lookup imple-
mentation provided by the user. The TIE lookup client has an sc_port<xtsc_lookup_if>
used to connect to the TIE lookup implementation which inherits from this interface.
Note: The methods of xtsc_lookup_if are all non-blocking in the OSCI TLM sense. That is,
they must NEVER call wait() either directly or indirectly. The "nb_" method prefix stands for
Non-Blocking.

See also:
xtsc_core::How_to_do_port_binding
xtsc_core::get_lookup
xtsc_component::xtsc_lookup

Definition at line 38 of file xtsc_lookup_if.h.

7.71.2 Member Function Documentation

7.71.2.1 virtual void nb_send_address (const sc_dt::sc_unsigned & address)

[pure virtual]

This method is called by the TIE lookup client to request that a lookup be performed using
the specified address. For the typical case of an xtsc_core TIE lookup client, this method is
called on each clock cycle in which the Xtensa core is driving the TIE_xxx_Out_Req signal
(where xxx is the lookup name in the user TIE code). If the "rdy" keyword was specified in
the user TIE code, then this method will be re-called by xtsc_core on each clock cycle after
nb_is_ready() returns false (unless the instruction performing the lookup is killed).

Parameters:
address The sc_unsigned object containing the lookup address. For an xtsc_core
TIE lookup client, this parameter corresponds to the TIE_xxx_Out signal, where
xxx is the lookup name in the user TIE code.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implemented in xtsc_lookup_if_impl, xtsc_lookup_driver, xtsc_rer_lookup_if_impl, and
xtsc_wer_lookup_if_impl.

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7.71.2.2 virtual bool nb_is_ready () [inline, virtual]

This method is called by the TIE lookup client when it needs to determine if the TIE lookup
request (sent using the nb_send_address() method) was accepted. For the typical case
of an xtsc_core TIE lookup client, this method will not be called unless the lookup section
of the user TIE code specified the "rdy" keyword. If the "rdy" keyword was specified in the
user TIE code, then the TIE lookup implementation must override this virtual method.

Returns:
true if the TIE lookup request was accepted.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Reimplemented in xtsc_lookup_if_impl, xtsc_lookup_driver, xtsc_rer_lookup_if_impl, and
xtsc_wer_lookup_if_impl.
Definition at line 81 of file xtsc_lookup_if.h.

7.71.2.3 virtual sc_dt::sc_unsigned nb_get_data () [pure virtual]

This method is called to get the TIE lookup response data. This method must be called
exactly one time for each nb_is_ready() call that returns true.
For hardware configurations where the nb_is_ready() call is not used (e.g. an Xtensa TIE
port defined without the "rdy" keyword), this method must be called exactly one time for
each nb_send_address() call.
For the typical case of an xtsc_core TIE lookup client, this method is called after a latency
of <use_stage> minus <def_stage> clock cycles, where <use_stage> and <def_stage>
are the values specified in the lookup section of the user TIE code. If the "rdy" keyword
was specified in the user TIE code, then the latency starts on the clock cycle in which nb_-
is_ready() returns true. If the "rdy" keyword was not specified, then the latency starts on
the clock cycle when nb_send_address() is called.

Returns:
The sc_unsigned object containing the response data. For an xtsc_core TIE lookup
client, this data corresponds to the TIE_xxx_In signal, where xxx is the lookup name
in the user TIE code.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implemented in xtsc_lookup_if_impl, xtsc_lookup_driver, xtsc_rer_lookup_if_impl, and
xtsc_wer_lookup_if_impl.

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7.71.2.4 virtual u32 nb_get_address_bit_width () [pure virtual]

Get the address bit width that the lookup implementation expects. This method allows the
TIE lookup client to confirm that the implementation is using the correct size for the lookup
address. For an xtsc_core TIE lookup client, the data returned should be the width of the
TIE_xxx_Out signal as specified by <output_width> in the "lookup xxx" section of the user
TIE code.
Implemented in xtsc_lookup_if_impl, xtsc_lookup_driver, xtsc_rer_lookup_if_impl, and
xtsc_wer_lookup_if_impl.

7.71.2.5 virtual u32 nb_get_data_bit_width () [pure virtual]

Get the data bit width that the lookup implementation will return. This method allows the TIE
lookup client to confirm that the implementation is using the correct size for the response
data. For an xtsc_core TIE lookup client, the data returned should be the width of the TIE_-
xxx_In signal as specified by <input_width> in the the "lookup xxx" section of the user TIE
code.
Implemented in xtsc_lookup_if_impl, xtsc_lookup_driver, xtsc_rer_lookup_if_impl, and
xtsc_wer_lookup_if_impl.

7.71.2.6 virtual const sc_core::sc_event& default_event () const [inline,

virtual]

Return the lookup-ready event. Clients can call this method to get a reference to an event
that will be notified when the lookup transitions from not-ready to ready.
Sub-classes must override this method and return their lookup-ready event. If the lookup
doesn’t have a ready then the sub-class should return an event that is never notified.
Reimplemented in xtsc_lookup_if_impl, xtsc_rer_lookup_if_impl, and xtsc_wer_lookup_if_-
impl.
Definition at line 145 of file xtsc_lookup_if.h.
The documentation for this class was generated from the following file:

• xtsc_lookup_if.h

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7.72 xtsc_lookup_if_impl Class Reference

Implementation of xtsc_lookup_if.
#include <xtsc/xtsc_lookup.h>Inheritance diagram for xtsc_lookup_if_impl:

xtsc_lookup_if

xtsc_lookup_if_impl

Collaboration diagram for xtsc_lookup_if_impl:

xtsc_connection_interface xtsc_resettable xtsc_parms xtsc_lookup_if

xtsc_module xtsc_command_handler_interface xtsc_script_file xtsc_lookup_parms xtsc_lookup_if_impl

m_file m_lookup_parms m_lookup_impl m_lookup

xtsc_lookup

Public Member Functions

• xtsc_lookup_if_impl (const char ∗object_name, xtsc_lookup &lookup)

Constructor.

• void nb_send_address (const sc_dt::sc_unsigned &address)

• bool nb_is_ready ()
• sc_dt::sc_unsigned nb_get_data ()
• xtsc::u32 nb_get_address_bit_width ()
• xtsc::u32 nb_get_data_bit_width ()
• virtual const sc_core::sc_event & default_event () const
Get the event that will be notified when the lookup data is available.

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Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

SystemC callback when something binds to us.

Protected Attributes

• xtsc_lookup & m_lookup

Our xtsc_lookup object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.72.1 Detailed Description

Implementation of xtsc_lookup_if.
Definition at line 770 of file xtsc_lookup.h.

7.72.2 Member Function Documentation

7.72.2.1 void nb_send_address (const sc_dt::sc_unsigned & address) [virtual]

See also:
xtsc::xtsc_lookup_if

Implements xtsc_lookup_if.

7.72.2.2 bool nb_is_ready () [virtual]

See also:
xtsc::xtsc_lookup_if

Reimplemented from xtsc_lookup_if.

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7.72.2.3 sc_dt::sc_unsigned nb_get_data () [virtual]

See also:
xtsc::xtsc_lookup_if

Implements xtsc_lookup_if.

7.72.2.4 xtsc::u32 nb_get_address_bit_width () [inline, virtual]

See also:
xtsc::xtsc_lookup_if

Implements xtsc_lookup_if.
Definition at line 790 of file xtsc_lookup.h.

7.72.2.5 xtsc::u32 nb_get_data_bit_width () [inline, virtual]

See also:
xtsc::xtsc_lookup_if

Implements xtsc_lookup_if.
Definition at line 793 of file xtsc_lookup.h.
The documentation for this class was generated from the following file:

• xtsc_lookup.h

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7.73 xtsc_lookup_parms Class Reference

Constructor parameters for a xtsc_lookup object.

#include <xtsc/xtsc_lookup.h>Inheritance diagram for xtsc_lookup_parms:

xtsc_parms

xtsc_lookup_parms

Collaboration diagram for xtsc_lookup_parms:

xtsc_parms

xtsc_lookup_parms

Public Member Functions

• xtsc_lookup_parms (xtsc::u32 address_bit_width=0, xtsc::u32 data_bit_width=0,

bool has_ready=false, const char ∗lookup_table=NULL, const char ∗default_-
data="0x0", bool ram=false)
Constructor for an xtsc_lookup_parms object.

• xtsc_lookup_parms (const xtsc::xtsc_core &core, const char ∗lookup_name, const

char ∗lookup_table=NULL, const char ∗default_data="0x0", bool ram=false)
Constructor for an xtsc_lookup_parms object based upon an xtsc_core object and a named
TIE lookup.

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• void init (xtsc::u32 address_bit_width, xtsc::u32 data_bit_width, bool has_ready,

const char ∗lookup_table=NULL, const char ∗default_data="0x0", bool ram=false)
Do initialization common to both constructors.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

7.73.1 Detailed Description

Constructor parameters for a xtsc_lookup object. This class contains the constructor pa-
rameters for a xtsc_lookup object.

Name Type Description

------------------ ---- -------------------------------------------------------

"ram" bool If false, the default, then this module functions as a

lookup table and the entire TIE address signal (i.e.
the address argument of the nb_send_address() method)
functions as an index into the lookup table. If true,
then this module functions as a RAM and the RAM address,
write data, and write strobe are bit-fields within the
TIE address signal. In the latter case, the RAM address
size is defined to be the following (which must be
greater than 0):
("address_bit_width" - "data_bit_width" - 1)
Default = false (function as a lookup table).

"address_bit_width" u32 The width of the TIE address signal (i.e. request
address) in bits. Maximum is 1024.

"data_bit_width" u32 The width of the response data in bits. Maximum is

1024.

"write_data_lsb" u32 If "ram" is true, this parameter specifies the bit

location in the TIE address signal of the least-
significant bit of the write data field. There are
exactly four legal values for this parameter:
0
1
"address_bit_width" - "data_bit_width" - 1
"address_bit_width" - "data_bit_width"
This parameter is ignored if "ram" is false.
Default = 0.

"write_strobe_bit" u32 If "ram" is true, this parameter specifies the bit

location in the TIE address signal of the write strobe.
A value of 0xFFFFFFFF means to use the highest bit
location within the TIE address signal that is
consistent with the "write_data_lsb" value. This
parameter is ignored if "ram" is false.
Default = 0xFFFFFFFF (use highest possible location).

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"active_high_strobe" bool If "ram" is true, this parameter specifies whether or

not the write strobe is active high. A value of true,
the default, means the strobe is active high so that
when the value of the write strobe bit is 1 then the
lookup is a write and when the value is 0 the lookup is
a read.

"ram_write_enables" vector<u32> If "ram" is true, this parameter may be used to

designate one or more bits of the RAM address as enable
bits for designated sub-fields of the write data bit
field. Each enable bit can correspond to any arbitrary
sub-field of the write data bit field; however, any
given bit in the write data bit field can be controlled
by at most one enable bit. If this parameter is used,
then it must contain a multiple of four u32 values. The
first value of the quartet specifies the zero-based
index into the full RAM address of the enable bit being
specified by the quartet. The second and third values
of the quartet specify the low and high (respectively)
bits of the sub-field in the write data bit field that
the enable bit controls. The last value of the quartet
must be either 0 or 1 to specify the enable as active
low or high (respectively). If desired, a given enable
bit may be given multiple times to allow it to control a
non-contiguous sub-field of the write data bit field.
Note: It is best if the enable bits can be placed at the
high end of the RAM address. This facilitates
specifying the addresses in the "lookup_table"
(initial value file) and reading the log file.
As an example, let's say we want a TIE lookup RAM that
is 16-bits wide and 256 entries deep. Furthermore, lets
say we wish to be able to divide each 16-bit entry into
two byte lanes that can be individually enabled for
writing so that a given lookup event with the write
strobe enabled can do any one of the following four
actions depending on two enable bits within the full RAM
address:
1) write both byte lanes
2) write the first byte lane; leave the second unchanged
3) write the second byte lane; leave the first unchanged
4) leave both bytes unchanged
Because we want to address 256 entries we need 8 bits
and when we add the 2 enable bits, we get a full RAM
address of 10 bits. Let's choose to place the write
data at the low end of the TIE lookup address, to use
the high two bits of the full RAM address as the
active-high enable bits, and to use the high bit of the
TIE lookup address as the active-high write strobe.
These choices can be realized by defining a TIE lookup
with a 27 bit output-width and a 16 bit input-width and
modelling the attached lookup RAM using an xtsc_lookup
with the following parameters and values:
"ram" = true
"address_bit_width" = 27
"data_bit_width" = 16
"write_data_lsb" = 0 (default)

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"write_strobe_bit" = 0xFFFFFFFF (default)

"active_high_strobe" = true (default)
"ram_write_enables" = 8,0,7,1,9,8,15,1
The "ram_write_enables" parameter contains 8 values
which make two quartets. The first quartet (8,0,7,1)
specifies that bit 8 of the full RAM address is an
active high-enable which controls whether or not bits
0-7 of the write data bit field are written. The second
quartet (9,8,15,1) specifies that bit 9 of the full RAM
address is an active high-enable which controls whether
or not bits 8-15 of the write data bit field are
written. So the layout of the 27-bit TIE lookup address
is:
[15: 0] - write data
[25:16] - full RAM address
[24:24] - enable for write data[ 7: 0]
[25:25] - enable for write data[15: 8]
[26:26] - write strobe
Default = empty

"has_ready" bool Specifies whether the xtsc_lookup has a ready signal.

"pipeline_depth" u32 This parameter specifies the depth of the pipeline.

When the pipeline is full and "has_ready" is true,
nb_is_ready() will return false. If "has_ready" is
false and nb_send_address() is called when the pipeline
is full, an xtsc_exception will be thrown. A value of
0 means to be fully pipelined (i.e. have a pipeline
depth equal to the latency+1). See "latency" parameter.
Default = 0 (i.e. fully pipelined).

"enforce_latency" bool If "enforce_latency" is true, checks will be performed

to ensure nb_get_data() is called during the correct
clock cycle. See "latency" parameter.
If "enforce_latency" is false, the checks will not be
performed, and nb_get_data() will simply return the
next data (from m_data_fifo).
Note: Use "enforce_latency" of false if operating in
turbo mode (regardless of the "has_ready" setting).
Default = true.

"latency" u32 The latency is defined by the <use_stage> and

<def_stage> values in the user TIE code defining the
TIE lookup interface according to the following formula:
latency = <use_stage> - <def_stage>
If "enforce_latency" is true and "has_ready" is true,
"latency" specifies the clock cycle (relative to the
nb_is_ready() call that returned true) in which
nb_get_data() can be called without an exception being
thrown.
If "enforce_latency" is true and "has_ready" is false,
"latency" specifies the clock cycle (relative to the
nb_send_address() call) in which nb_get_data() can be
called without an exception being thrown.
If "enforce_latency" is false then the latency check in
nb_get_data() will not be performed and nb_get_data()
will simply return the next data (from m_data_fifo).

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"latency" must be greater than 0.

Default = 1.

"delay" u32 If "has_ready" is true, "delay" specifies how many clock

cycles that the lookup device will not be ready for a
subsequent lookup after it is ready for the current
lookup. The "delay" timing starts on the cycle in which
the current lookup is ready. If "delay" is 0, then
nb_is_ready() will always return true (unless the
pipeline is full). The value specified by "delay" can
be overriden on a per-address basis by using the
optional @<Delay> field in the lookup table specified by
the "lookup_table" parameter. If "has_ready" is false,
"delay" must be 0.
Default = 0.

Note: The interpretation of the "delay" parameter changed after (not including)
RC-2010.1 to better model recommended TIE lookup implementation behavior.

Deprecation Notice: The use of the "delay" parameter above and the <LuaDelayFunction>
and @<Delay> constructs in the "lookup_table" below are all deprecated. The purpose
of these constructs was to allow a limited ability to model the lookup device being
busy (for example, because it is shared with another Xtensa or because it is having
its values reloaded). The recommended technique for controlling the busy status of
the lookup device is to use the set_ready_enable method and/or command.

"lookup_table" char* The name of the file containing the address-data pairs
and/or just the data (with an implied address). Each
address-data pair can also have an optional delay
specified (which is only used if "ram" is false and
"has_ready" is true). If "ram" is false and this
parameter is NULL, then all lookups will return the
"default_data" value (unless a sub-class overrides the
xtsc_lookup::get_data_from_address() method). If "ram"
is true, the file acts as an initial value file. If
"ram" is true and this parameter is NULL, then all reads
to RAM addresses that have not been written will return
the "default_data" value.

If "ram" is false then, other than a lua_function line

described below, this file may only contain lines in the
following format:

[<Address>] <Value> [@<Delay>]

1. Each line of the text file contains one or two

numbers in decimal or hexadecimal (using '0x'
prefix) format followed by an optional delay
value which must start with an @.
For example,

0x12345678 // Implied address of 0x0

0xbabeface // Implied address of 0x1
0x99 0x11111111 // Explicit address of 0x99
16 0x11111111 // Explicit address of 0x10
0x22222222 // Implied address of 0x11
18 0x33333333 @3 // Delay m_ready 3 clock cycles

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2. If a line contains two numbers (excluding the

optional delay), the first number is interpreted as
an address and the second number is interpreted as
the data corresponding to the address.
3. If a line only contains one number (excluding the
optional delay),then it is interpreted as the data
corresponding to an address which is one greater
than the address of the previous line. If the first
line of the file contains one number, then the
implied address is 0.
4. Numbers can contain up to 1024 bits (256 hex
nibbles).
5. An address can occur only once in the file (either
explicitly or implied). A data value can occur as
often as desired.
6. An optional integer delay value can be specified to
override the "delay" parameter for this lookup
address only. The @<Delay> entries only take effect
if "has_ready" is true.
7. Comments, extra whitespace, and blank lines are
ignored. See xtsc::xtsc_script_file.

If "ram" is false, this file may also contain a

lua_function line to specify a Lua function that is to
be called by the model to get the lookup data for any
lookup address that is not specified and, optionally, a
second Lua function to be called to get the lookup
delay. If lua_function is specified then the
"lookup_table" file should contain a #lua_beg/#lua_end
block containing the function definitions. The format
of the lua_function line is:

lua_function <LuaDataFunction> [<LuaDelayFunction>]

Both Lua functions take a single Lua string argument

giving the lookup address as a hexadecimal string. The
first function should return the lookup data as a Lua
whole number or a Lua string which can be converted to a
whole number. The second function should return the
delay as a Lua whole number. The values returned by the
Lua functions are not cached by the model, instead, the
functions are called each time a lookup is performed.
This provides a dynamic lookup capability. If
lua_function is specified then the "default_data"
parameter is not used.

Here is an example "lookup_table" file using both line

formats and including the required Lua snippet:
#lua_beg
function get_data(addr)
return math.floor(math.exp(tonumber(addr)))
end
#lua_end
lua_function get_data
0 1 // floor(e^0) = 1
1 2 // floor(e^1) = 2

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"default_data" char* C-string containing the default data. If "ram" is

false, this value will be returned for any lookup
address not specified (explicitly or implicitly) in
"lookup_table". If "ram" is true, this value will be
returned for any RAM address not specified in
"lookup_table" that has not been written.
Default = "0x0".

"dump_after_sim" bool If true, dumps all final address-data pairs in the

lookup after the end of simulation into the XTSC log
file.
Default = false.

"override_lookup" bool If true, then the get_data_from_address() virtual method

will be called to do the lookup. If "override_lookup"
is true then the get_data_from_address() virtual method
must be overriden by a subclass.
Default = false.

"clock_period" u32 This is the length of this module's clock period

expressed in terms of the SystemC time resolution
(from sc_get_time_resolution()). A value of
0xFFFFFFFF means to use the XTSC system clock
period (from xtsc_get_system_clock_period()).
Default = 0xFFFFFFFF (i.e. use the system clock
period).

"posedge_offset" u32 This specifies the time at which the first posedge of
this device's clock conceptually occurs. It is
expressed in units of the SystemC time resolution and
the value implied by it must be strictly less than the
value implied by the "clock_period" parameter. A value
of 0xFFFFFFFF means to use the same posedge offset as
the system clock (from
xtsc_get_system_clock_posedge_offset()).
Default = 0xFFFFFFFF.

"vcd_handle" void* Pointer to SystemC VCD object (sc_trace_file *) or 0 if

tracing is not desired.
Default = 0 (no tracing).

See also:
xtsc_lookup
xtsc::xtsc_parms

Definition at line 357 of file xtsc_lookup.h.

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7.73.2 Constructor & Destructor Documentation

7.73.2.1 xtsc_lookup_parms (xtsc::u32 address_bit_width = 0, xtsc::u32

data_bit_width = 0, bool has_ready = false, const char ∗ lookup_table =
NULL, const char ∗ default_data = "0x0", bool ram = false) [inline]

Constructor for an xtsc_lookup_parms object.

Parameters:
address_bit_width The width of the request address in bits.
data_bit_width The width of the response data in bits.
has_ready Specifies whether or not the xtsc_lookup has a ready signal (corresponds
to the rdy keyword in the user’s TIE code for the lookup).
lookup_table The name of the file containing the address-data pairs and/or just the
data (with an implied address).
default_data The data to use for addresses which aren’t in lookup_table.
ram If false, the default, this module functions as a lookup table. If true, this module
functions as a RAM with the RAM address, write data, and write strobe being bit
fields within the TIE address signal (i.e. the address argument of the nb_send_-
address() method).

Definition at line 386 of file xtsc_lookup.h.

7.73.2.2 xtsc_lookup_parms (const xtsc::xtsc_core & core, const char ∗

lookup_name, const char ∗ lookup_table = NULL, const char ∗
default_data = "0x0", bool ram = false)

Constructor for an xtsc_lookup_parms object based upon an xtsc_core object and a named
TIE lookup. This constructor will determine latency, address_bit_width, data_bit_width,
has_ready, and clock_period by querying the core object. If desired, after the xtsc_lookup_-
parms object is constructed, its data members can be changed using the appropriate
xtsc::xtsc_parms::set() method before passing it to the xtsc_lookup constructor.

Parameters:
core A reference to the xtsc_core object upon which to base the xtsc_lookup_parms.
lookup_name The name of the TIE lookup as it appears in the user’s TIE code after
the lookup keyword.
lookup_table The name of the file containing the address-data pairs and/or just the
data (with an implied address).
default_data The data to use for addresses which aren’t in lookup_table.

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ram If false, the default, this module functions as a lookup table. If true, this module
functions as a RAM with the RAM address, write data, and write strobe being bit
fields within the TIE address signal (i.e. the address argument of the nb_send_-
address() method).

The documentation for this class was generated from the following file:

• xtsc_lookup.h

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7.74 xtsc_lookup_pin Class Reference

A TIE lookup implementation using the pin-level interface.

#include <xtsc/xtsc_lookup_pin.h>Inheritance diagram for xtsc_lookup_pin:

xtsc_connection_interface xtsc_resettable

xtsc_module

xtsc_lookup_pin

Collaboration diagram for xtsc_lookup_pin:

xtsc_connection_interface xtsc_resettable xtsc_signal_sc_bv_base

xtsc_module xtsc_script_file xtsc_signal_sc_bv_base_floating

m_file m_ready_floating

xtsc_lookup_pin

Public Member Functions

• SC_HAS_PROCESS (xtsc_lookup_pin)
• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

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• xtsc_lookup_pin (sc_core::sc_module_name module_name, const xtsc_lookup_-

pin_parms &lookup_parms)
Constructor for an xtsc_lookup_pin.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• void reset (bool hard_reset=false)

Reset the xtsc_lookup_pin.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

• log4xtensa::BinaryLogger & get_binary_logger ()

Get the BinaryLogger for this component (e.g. to adjust its log level).

Public Attributes

• sc_core::sc_in< sc_dt::sc_bv_base > m_address

Address from client (TIE_xxx_Out).

• sc_core::sc_in< sc_dt::sc_bv_base > m_req

Lookup request (TIE_xxx_Out_Req).

• sc_core::sc_out< sc_dt::sc_bv_base > m_data

Value to client (TIE_xxx_In).

• sc_core::sc_out< sc_dt::sc_bv_base > m_ready

Ready to client (TIE_xxx_Rdy). Optional.

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• xtsc::xtsc_signal_sc_bv_base_floating m_ready_floating
Bind to m_ready when there is no TIE_xxx_Rdy.

Protected Member Functions

• void before_end_of_elaboration ()
• void request_thread ()
• void ready_thread ()
• void data_thread ()
• void get_sc_bv_base (xtsc::u32 index, sc_dt::sc_bv_base &value)
Convert m_words[index] to sc_bv_base value.

• bool pipeline_full ()
Return true if pipeline is full.

• void do_lookup (const sc_dt::sc_bv_base &address, const sc_core::sc_time &when)

Do the lookup and log it.

Protected Attributes

• bool m_has_ready
True if lookup has a rdy signal (from "has_ready" parameter).

• sc_core::sc_time m_time_resolution
The SystemC time resolution.

• sc_core::sc_time m_clock_period
The lookup’s clock period (from "clock_period" parameter).

• xtsc::u64 m_clock_period_value
The lookup’s clock period expressed as u64 value.

• bool m_has_posedge_offset
True if m_posedge_offset is non-zero.

• sc_core::sc_time m_posedge_offset
From "posedge_offset" parameter.

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• xtsc::u64 m_posedge_offset_value
m_posedge_offset as u64

• sc_core::sc_time m_sample_phase
Phase of clock when m_req is sampled (0 => posedge clock) (from "sample_phase").

• xtsc::u64 m_sample_phase_value
Phase of clock when m_req is sampled expressed as u64 value.

• sc_core::sc_time m_latency
From xtsc_lookup_pin_parm "latency".

• xtsc::u32 m_delay
Default delay from xtsc_lookup_pin_parm "delay".

• sc_dt::sc_bv_base m_zero
Constant 0.

• sc_dt::sc_bv_base m_one
Constant 1.

• sc_core::sc_time m_delay_timeout
Time for the ready delay to expire.

• sc_core::sc_event m_ready_event
Pipeline full/not-full, or delay.

• sc_core::sc_event m_data_event
When to drive the next data.

• sc_core::sc_event m_timeout_event
Internal state machine state timeouts.

• xtsc::u32 m_address_bit_width
From "address_bit_width" parameter.

• xtsc::u32 m_data_bit_width
From "data_bit_width" parameter.

• sc_dt::sc_unsigned m_next_address
Keep track of implied next address to use if not explicit in lookup table file.

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• sc_dt::sc_bv_base m_default_data
From "default_data" parameter.

• sc_dt::sc_bv_base m_data_registered
The registered lookup data being driven out.

• std::string m_lookup_table
The lookup table file name (from "lookup_table" parameter).

• xtsc::xtsc_script_file ∗ m_file
The lookup table file.

• std::string m_line
Current line in the lookup table.

• xtsc::u32 m_line_count
Current line number in the lookup table as it is being parsed.

• std::vector< std::string > m_words

Current line in lookup table tokenized into words.

• std::map< std::string, sc_dt::sc_bv_base ∗ > m_data_map

The address-to-data (key-to-value) map of lookup data.

• std::map< std::string, xtsc::u32 > m_delay_map

The address-to-delay map of lookup data.

• log4xtensa::TextLogger & m_text

TextLogger.

• log4xtensa::BinaryLogger & m_binary

BinaryLogger.

• sc_core::sc_trace_file ∗ m_p_trace_file
VCD trace file (see "vcd_handle" parameter).

• xtsc::u32 m_pipeline_depth
Number of slots in m_pipeline_data from "pipeline_depth" or "latency".

• xtsc::u32 m_pipeline_wp
Write pointer into m_pipeline_data fifo.

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• xtsc::u32 m_pipeline_rp

Read pointer into m_pipeline_data fifo.

• sc_dt::sc_bv_base ∗∗ m_pipeline_data

The fifo of pipeline data.

• sc_core::sc_time ∗ m_pipeline_times

The fifo of due times (when to drive the data).

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

7.74.1 Detailed Description

A TIE lookup implementation using the pin-level interface. Example XTSC lookup imple-
mentation that connects at the pin-level and that uses a ROM like lookup table which is
initialized from a file.
This module can also be used to model a non-ROM lookup (for example, a computed
lookup) as long as all possible lookups can be enumerated individually without exceeding
the host memory system. When modeling a lookup device with a ready signal, each possi-
ble lookup address can have a custom delay associated with it that specifies how long the
TIE_xxx_Rdy signal is deasserted after a lookup to that particular address (so the delay
potentially affects the next lookup, not the current lookup). Note: This is a change from the
RC-2010.1 and earlier behavior.
Here is a block diagram of an xtsc_lookup_pin as it is used in the xtsc_lookup_pin example:

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xtsc_core core0 xtsc_lookup_pin tbl

“SimPinLevelInterfaces” = “lut”
(lookup_test.out) lut.rom

core0_TIE_lut_Out_Req_m_req_tbl
TIE_lut_Out_Req m_req

core0_TIE_lut_Out_m_address_tbl 8
TIE_lut_Out / m_address

tbl_m_ready_TIE_lut_Rdy_core0
TIE_lut_Rdy m_ready

32
tbl_m_data_TIE_lut_In_core0
TIE_lut_In / m_data

Figure 7.6: xtsc_lookup_pin Example

See also:
xtsc_lookup_pin_parms

Definition at line 258 of file xtsc_lookup_pin.h.

7.74.2 Constructor & Destructor Documentation

7.74.2.1 xtsc_lookup_pin (sc_core::sc_module_name module_name, const

xtsc_lookup_pin_parms & lookup_parms)

Constructor for an xtsc_lookup_pin.

Parameters:
module_name Name of the xtsc_lookup_pin sc_module.
lookup_parms The remaining parameters for construction.

See also:
xtsc_lookup_pin_parms

The documentation for this class was generated from the following file:

• xtsc_lookup_pin.h

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7.75 xtsc_lookup_pin_parms Class Reference

Constructor parameters for a xtsc_lookup_pin object.

#include <xtsc/xtsc_lookup_pin.h>Inheritance diagram for xtsc_lookup_pin_parms:

xtsc_parms

xtsc_lookup_pin_parms

Collaboration diagram for xtsc_lookup_pin_parms:

xtsc_parms

xtsc_lookup_pin_parms

Public Member Functions

• xtsc_lookup_pin_parms (xtsc::u32 address_bit_width=0, xtsc::u32 data_bit_width=0,

bool has_ready=false, const char ∗lookup_table=NULL, const char ∗default_-
data="0x0", sc_core::sc_trace_file ∗p_trace_file=0)
Constructor for an xtsc_lookup_pin_parms object.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

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7.75.1 Detailed Description

Constructor parameters for a xtsc_lookup_pin object. This class contains the constructor
parameters for a xtsc_lookup_pin object.

Name Type Description

------------------ ---- -------------------------------------------------------

"address_bit_width" u32 The width of the request address in bits. Maximum is

1024.

"data_bit_width" u32 The width of the response data in bits. Maximum is

1024.

"has_ready" bool If true, the xtsc_lookup_pin device will drive the

ready output port (xtsc_lookup_pin::m_ready) for
connecting to the "TIE_xxx_Rdy" TIE input port. If
false, the xtsc_lookup_pin device will cap the m_ready
port and the user must not connect to it.

"pipeline_depth" u32 This parameter specifies the depth of the pipeline.

When the pipeline is full and "has_ready" is true,
the m_ready signal will be de-asserted. If "has_ready"
is false and a lookup is requested when the pipeline
is full, an xtsc_exception will be thrown. A value of
0 means to be fully pipelined (i.e. have a pipeline
depth equal to the latency).
Default = 0 (i.e. fully pipelined).

"latency" u32 The latency is defined by the <input_stage> and

<output_stage> values in the user TIE code defining the
TIE lookup port according to the following formula:
latency = <input_stage> - <output_stage>
If "has_ready" is true, "latency" specfies how many
clock cycles after m_ready (TIE_xxx_Rdy) is asserted
that m_data (TIE_xxx_In) is valid.
If "has_ready" is false, "latency" specfies how many
clock cycles after m_req (TIE_xxx_Out_Req) is sampled
and found to be asserted that m_data (TIE_xxx_In) is
valid.
"latency" must be greater than 0.
Default = 1.

"delay" u32 If "has_ready" is true, "delay" gives the default value

for how many clock cycles after a lookup request is
accepted before another lookup request will be accepted
(provided the pipeline is not full). A value of 0 means
the default is to not delay. The default delay may be
overridden on a per lookup address basis by specifiying
a delay value on the "lookup_table" line defining the
lookup value for the lookup address in question. The
purpose of this parameter is to allow a limited ability
to model the lookup device being busy (for example,
because it is shared with another Xtensa or because it
is having its values reloaded). If "has_ready" is
false, "delay" is ignored.

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Default = 0.

Note: The interpretation of the "delay" parameter changed after (not including) RC-2010.1
to better model proper TIE lookup interface protocol.

"lookup_table" char* The name of the file containing the address-data pairs
and/or just the data (with an implied address). Each
address-data pair can also have an optional delay
specified. If this parameter is NULL, then all lookups
will return the "default_data". This file must contain
lines in the following format:

[<Address>] <Value> [@<Delay>]

1. Each line of the text file contains one or two

numbers in decimal or hexadecimal (using '0x'
prefix) format followed by an optional delay
value which must start with an @.
For example,

0x12345678 // Implied address of 0x0

0xbabeface // Implied address of 0x1
0x99 0x11111111 // Explicit address of 0x99
16 0x11111111 // Explicit address of 0x10
0x22222222 // Implied address of 0x11
18 0x33333333 @3 // Next m_ready is delayed by 3

2. If a line contains two numbers (excluding the

optional delay), the first number is interpreted as
an address and the second number is interpreted as
the data corresponding to the address.
3. If a line only contains one number (excluding the
optional delay),then it is interpreted as the data
corresponding to an address which is one greater
than the address of the previous line. If the first
line of the file contains one number, then the
implied address is 0.
4. Numbers can contain up to 1024 bits (256 hex
nibbles).
5. An address can occur at most once in the file
(either explicitly or implied). A data value can
occur as often as desired.
6. An optional integer delay value can be specified to
override the "delay" parameter for this lookup
address only. A delay specified here means that
following any lookup to this address, the lookup
device will not be available for a subsequent lookup
for the specified number of clock cycles. The
@<Delay> entries only take effect if "has_ready" is
true.
7. Comments, extra white space, and blank lines are
ignored. See xtsc::xtsc_script_file.

"default_data" char* C-string containing the default data to be returned for

any address not specified (explicitly or implicitly) in
"lookup_table".
Default = "0x0".

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"clock_period" u32 This is the length of this lookup's clock period

expressed in terms of the SystemC time resolution
(from sc_get_time_resolution()). A value of
0xFFFFFFFF means to use the XTSC system clock
period (from xtsc_get_system_clock_period()).
Default = 0xFFFFFFFF (i.e. use the system clock
period).

"posedge_offset" u32 This specifies the time at which the first posedge of
this device's clock conceptually occurs. It is
expressed in units of the SystemC time resolution and
the value implied by it must be strictly less than the
value implied by the "clock_period" parameter. A value
of 0xFFFFFFFF means to use the same posedge offset as
the system clock (from
xtsc_get_system_clock_posedge_offset()).
Default = 0xFFFFFFFF.

"sample_phase" u32 This specifies the phase (i.e. the point) in each clock
period at which the m_req signal is sampled. It is
expressed in terms of the SystemC time resolution (from
sc_get_time_resolution()) and must be strictly less than
the clock period as specified by the "clock_period"
parameter. A value of 0 means the m_req signal is
sampled on posedge clock as specified by
"posedge_offset".
Default = 0.

"vcd_handle" void* Pointer to SystemC VCD object (sc_trace_file *) or

0 if tracing is not desired.

See also:
xtsc_lookup_pin
xtsc::xtsc_parms
xtsc::xtsc_initialize_parms

Definition at line 180 of file xtsc_lookup_pin.h.

7.75.2 Constructor & Destructor Documentation

7.75.2.1 xtsc_lookup_pin_parms (xtsc::u32 address_bit_width = 0, xtsc::u32

data_bit_width = 0, bool has_ready = false, const char ∗ lookup_table
= NULL, const char ∗ default_data = "0x0", sc_core::sc_trace_file ∗
p_trace_file = 0) [inline]

Constructor for an xtsc_lookup_pin_parms object.

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Parameters:
address_bit_width The width of the request address in bits.
data_bit_width The width of the response data in bits.
has_ready If true, xtsc_lookup_pin will drive the m_ready signal. If false, xtsc_-
lookup_pin will internally cap the m_ready signal and the user must not connect
to it.
lookup_table The name of the file containing the address-data pairs and/or just the
data (with an implied address).
default_data The data to use for addresses which aren’t in lookup_table.
p_trace_file Pointer to SystemC VCD object or 0 if tracing is not desired.

Definition at line 206 of file xtsc_lookup_pin.h.

The documentation for this class was generated from the following file:

• xtsc_lookup_pin.h

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7.76 xtsc_master Class Reference

A scripted memory interface master.

#include <xtsc/xtsc_master.h>Inheritance diagram for xtsc_master:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface xtsc_respond_if

xtsc_master

Collaboration diagram for xtsc_master:

xtsc_connection_interface

xtsc_module
xtsc_wire_write_if
xtsc_resettable

xtsc_command_handler_interface m_master xtsc_wire_write_if_impl

xtsc_master m_p_write_impl
xtsc_respond_if m_script_file_stream
m_p_return_value_file

xtsc_script_file

Classes
• class xtsc_wire_write_if_impl

Public Member Functions

• SC_HAS_PROCESS (xtsc_master)
• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

• xtsc_master (sc_core::sc_module_name module_name, const xtsc_master_parms

&master_parms)
Constructor for an xtsc_master.

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• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• void reset (bool hard_reset=false)

Reset the xtsc_master.

• void dump_response_history (std::ostream &os)

Dump the response history table.

• const std::string & get_response (xtsc::u32 n)

Get nth entry from the response history table.

• xtsc::u32 get_response_history_count () const

Get response count.

• xtsc::u32 get_response_history_depth () const

Return the response history depth.

• void set_response_history_depth (xtsc::u32 depth)

Set response history depth.

• void execute (const std::string &cmd_line, const std::vector< std::string > &words,
const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

• sc_core::sc_export< xtsc::xtsc_wire_write_if > & get_control_input () const

Return the sc_export of the optional control input.

• void connect (xtsc_wire_logic &logic, const char ∗output_name)

Connect an xtsc_wire_logic output to the control input of this xtsc_master.

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• void connect (xtsc_mmio &mmio, const char ∗output_name)

Connect an xtsc_mmio output to the control input of this xtsc_master.

• void connect (xtsc::xtsc_core &core, const char ∗port="inbound_pif")

Connect to the inbound pif or snoop slave port pair of an xtsc_core.

• virtual void request_thread (void)

Send requests (from m_script_file) to the memory interface slave.

• bool nb_respond (const xtsc::xtsc_response &response)

Receive responses from the memory interface slave.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

Public Attributes
• sc_core::sc_port< xtsc::xtsc_request_if > m_request_port
From us to slave.

• sc_core::sc_export< xtsc::xtsc_respond_if > m_respond_export

From slave to us.

Protected Types
• typedef sc_core::sc_export< xtsc::xtsc_wire_write_if > wire_write_export

Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to m_respond_export.

• int get_words ()
Get the next vector of words which define an xtsc::xtsc_request test vector.

• xtsc::u32 get_u32 (xtsc::u32 index, const std::string &argument_name)

Extract a u32 value (named argument_name) from the word at m_words[index].

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• xtsc::u64 get_u64 (xtsc::u32 index, const std::string &argument_name)

Extract a u64 value (named argument_name) from the word at m_words[index].

• double get_double (xtsc::u32 index, const std::string &argument_name)

Extract a double value (named argument_name) from the word at m_words[index].

• xtsc::xtsc_request::coherence_t optionally_get_coherence (xtsc::u32 index,

xtsc::u32 &offset)
Get the optional coherence value.

• void check_for_too_many_parameters (xtsc::u32 number_expected)

Throw an exception if the current command has more parameters than number_expected.

• void check_for_too_few_parameters (xtsc::u32 number_expected)

Throw an exception if the current command has fewer parameters than number_expected.

• void set_buffer (xtsc::u32 index, xtsc::u32 size8, bool is_poke=false)

Set m_buffer using size8 words starting at m_words[index].

• void set_buffer (xtsc::xtsc_request &request, xtsc::u32 index, xtsc::u32 size8)

Set the buffer of this request using size8 words starting at m_words[index].

• bool get_return_value ()
Get the next return value for a call to nb_respond.

Protected Attributes

• log4xtensa::TextLogger & m_text

TextLogger.

• bool m_control
From "control" parameter.

• bool m_control_bound
Something is connected to the control input.

• wire_write_export ∗ m_p_control
Optional control input.

• xtsc_wire_write_if_impl ∗ m_p_write_impl

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Implementaion for optional control input.

• sc_dt::sc_unsigned m_control_value
Current value of the control input.

• xtsc::u32 m_control_write_count
Number of times control input is written.

• xtsc::u32 m_control_change_count
Number of times input is written with a new value.

• bool m_wraparound
Should script file wraparound at EOF.

• bool m_zero_delay_repeat
See the "zero_delay_repeat" parameter.

• std::string m_script_file
The name of the script file.

• xtsc::xtsc_script_file m_script_file_stream
The script file object.

• std::string m_return_value_file
The name of the optional return value file.

• xtsc::xtsc_script_file ∗ m_p_return_value_file
Pointer to the return value file object.

• xtsc::u32 m_format
The format in effect. See "format" parameter.

• std::string m_line
The current script file line.

• xtsc::u32 m_line_count
The current script file line number.

• std::vector< std::string > m_words

Tokenized words from m_line.

• std::vector< std::string > m_return_values

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Tokenized words from return value file.

• xtsc::u32 m_return_value_index
Current word of return value file.

• xtsc::u32 m_return_value_line_count
The current return value file line number.

• std::string m_return_value_line
The current return value file line.

• xtsc::u64 m_block_write_tag
Keep track of tag for BLOCK_WRITE.

• xtsc::u64 m_burst_write_tag
Keep track of tag for BURST_WRITE.

• xtsc::u64 m_rcw_tag
Keep track of tag for RCW.

• xtsc::u64 m_last_request_tag
Tag of most recent previous request sent.

• xtsc::xtsc_address m_virtual_address_delta
Amount to add to get snoop/coherent virtual addr.

• xtsc::u32 m_response_history_depth
As initially set by the "response_history_depth" parameter or overridden by the set_-
response_history_depth() method.

• std::deque< std::string > m_response_history

The response history table.

• bool m_last_request_got_response
Response received with tag of m_last_request_tag.

• bool m_last_request_got_nacc
RSP_NACC received with tag of m_last_request_tag.

• bool m_fetch
For xtsc_request::set_instruction_fetch().

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• bool m_use_coherent_peek_poke
See "COHERENT ON|OFF" command.

• bool m_set_xfer_en
See "XFER_EN ON|OFF" command.

• bool m_set_user_data
See "USER_DATA value|OFF" command.

• void ∗ m_user_data
See "USER_DATA value|OFF" command.

• bool m_set_byte_enables
True if a "BE byte_enables" command is in effect.

• bool m_set_last_transfer
See "LAST_TRANSFER OFF" command.

• bool m_last_transfer
See "LAST_TRANSFER 0|1" command.

• bool m_do_dram_attribute
False when "DRAM_ATTRIBUTE OFF" is in effect.

• bool m_do_pif_attribute
False when "PIF_ATTRIBUTE OFF" is in effect.

• bool m_do_pif_domain
False when "PIF_DOMAIN OFF" is in effect.

• bool m_exclusive
False when "EXCLUSIVE OFF" is in effect.

• sc_dt::sc_unsigned m_dram_attribute
Value from "DRAM_ATTRIBUTE attr" command.

• xtsc::u32 m_pif_attribute
Value from "PIF_ATTRIBUTE attr" command.

• xtsc::u8 m_pif_domain
Value from "PIF_DOMAIN domain" command.

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• xtsc::xtsc_byte_enables m_byte_enables
Byte enables from the "BE byte_enables" command.

• xtsc::u8 m_buffer [m_buffer_size]

Buffer for xtsc_request and peek/poke.

• xtsc::u64 m_clock_period_value
This device’s clock period as u64.

• sc_core::sc_time m_clock_period
This device’s clock period.

• sc_core::sc_time m_time_resolution
The SystemC time resolution.

• bool m_has_posedge_offset
True if m_posedge_offset is non-zero.

• sc_core::sc_time m_posedge_offset
From "posedge_offset" parameter.

• xtsc::u64 m_posedge_offset_value
m_posedge_offset as u64

• sc_core::sc_event m_control_write_event
Notified when control input is written.

• sc_core::sc_event m_response_event
Event to notify when a response is received.

• xtsc::xtsc_response::status_t m_last_response_status
Status of last response.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to m_respond_export.

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

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Static Protected Attributes

• static const xtsc::u32 m_buffer_size = 4096
Max size for peeks and poke.

7.76.1 Detailed Description

A scripted memory interface master. This XTSC module implements a memory interface
master that reads an input file ("script_file") to determine when and what requests to send
to a memory interface slave module. An optional return value file can be named (in the
"return_value_file" parameter) from which the return value for calls to nb_respond() will be
obtained (if no return value file is provided, then nb_respond() always returns true).
This module provides a simple means to deliver xtsc::xtsc_request test transactions to an
xtsc_memory, to an xtsc_core (inbound PIF), or even to a system comprised of xtsc_-
arbiter, xtsc_core, xtsc_dma_engine, xtsc_memory, xtsc_memory_pin, xtsc_mmio, xtsc_-
router, xtsc_slave, and xtsc_tlm2pin_memory_transactor objects.
To provide an additional degree of feedback or control of the script (beyond what the mem-
ory interface slave can exert through memory responses), the "control" option can be set to
true and a wire writer such as xtsc_core, xtsc_mmio, or xtsc_wire_logic can be connected
to the control input. This allows the xtsc_master device to better model certain SoC com-
ponents. For example, if you are using an xtsc_master to program an xtsc_dma_engine,
then the memory-mapped write from the xtsc_dma_engine used to signal "DMA done" can
be routed through an xtsc_mmio device and thence to the control input of the xtsc_master
to cause it to program the next DMA movement.
Here is a block diagram of an xtsc_master as it is used in the master example:

nb_respond()

nb_request()
xtsc_master master xtsc_memory mem

request.vec

master.m_request_port (*mem.m_respond_ports[0])

master.m_respond_export *mem.m_request_exports[0]

Figure 7.7: xtsc_master Example

See also:
xtsc_master_parms
xtsc::xtsc_request_if

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xtsc::xtsc_respond_if

Definition at line 488 of file xtsc_master.h.

7.76.2 Constructor & Destructor Documentation

7.76.2.1 xtsc_master (sc_core::sc_module_name module_name, const

xtsc_master_parms & master_parms)

Constructor for an xtsc_master.

Parameters:
module_name Name of the xtsc_master sc_module.
master_parms The remaining parameters for construction.

See also:
xtsc_master_parms

7.76.3 Member Function Documentation

7.76.3.1 void dump_response_history (std::ostream & os)

Dump the response history table. This method dumps the contents of the response history
table. Each response is shown on a separate line starting with the 1-based index of that
response in the table.
Example output using the XTSC cmd prompt:

cmd: master dump_response_history

1: tag=17 pc=0x00000000 RSP_OK*[0x60003000/0/00]: 04 05 06 07
2: tag=17 pc=0x00000000 RSP_OK [0x60003000/0/00]: 00 01 02 03
3: tag=16 pc=0x00000000 RSP_OK*[0x60003040/0/00]
4: tag=15 pc=0x00000000 RSP_OK*[0x60003020/0/00]

7.76.3.2 const std::string& get_response (xtsc::u32 n)

Get nth entry from the response history table.

Parameters:
n Get the nth most recent previous response from the response history table. Use n=1
for the most recent previous response, n=2 for the next most recent response,

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etc. n must be inclusively between 1 and the value returned by get_response_-

history_count().

See also:
get_response_history_count()

7.76.3.3 xtsc::u32 get_response_history_count () const

Get response count. This method returns the number of entries currently in the response
history table. The value returned by this method is guaranteed to be inclusively between 0
and the value set by the most recent previous call to set_response_history_depth().

See also:
set_response_history_depth()

7.76.3.4 xtsc::u32 get_response_history_depth () const

Return the response history depth. This method returns the value set by the most recent
previous call to set_response_history_depth().

See also:
set_response_history_depth()

7.76.3.5 void set_response_history_depth (xtsc::u32 depth)

Set response history depth. This method sets the maximum number of responses that the
response history table may hold. If there are currently more enteries in the table, the oldest
entries are discarded. Setting depth to 0 will empty the response history table and turn
off response history capture until such time as this method is again called with a non-zero
value for depth. The initial response history depth is as set by the "response_history_depth"
parameter.

Parameters:
depth The maximum number of entries to maintain in the response history table.

See also:
get_response_history_depth()

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7.76.3.6 void execute (const std::string & cmd_line, const std::vector< std::string
> & words, const std::vector< std::string > & words_lc, std::ostream &
result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:

dump_response_history
Return the os buffer from calling xtsc_master::dump_response_history(os).

get_response <N>
Return value from calling xtsc_master::get_response(<N>).

get_response_history_count
Return value from calling xtsc_master::get_response_history_count().

get_response_history_depth
Return value from calling xtsc_master::get_response_history_depth().

set_response_history_depth <Depth>
Call xtsc_master::set_response_history_depth(<Depth>).

Implements xtsc_command_handler_interface.

7.76.3.7 sc_core::sc_export<xtsc::xtsc_wire_write_if>& get_control_input ()

const

Return the sc_export of the optional control input. This method may be used for port binding
of the optional control input.
For example, to bind the TIE export state named "onebit" of an xtsc_core name core0 to
the control input of an xtsc_master named master:

core0.get_export_state("onebit")(master.get_control_input());

7.76.3.8 void connect (xtsc_wire_logic & logic, const char ∗ output_name)

Connect an xtsc_wire_logic output to the control input of this xtsc_master. This method
connects the specified output of the specified xtsc_wire_logic to the optional control input
of this xtsc_master. This method should not be used unless the "control" parameter was
set to true.

Parameters:
logic The xtsc_wire_logic to connect to the control input of this xtsc_master.
output_name The output of the xtsc_wire_logic.

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7.76.3.9 void connect (xtsc_mmio & mmio, const char ∗ output_name)

Connect an xtsc_mmio output to the control input of this xtsc_master. This method con-
nects the specified output of the specified xtsc_mmio to the optional control input of this
xtsc_master. This method should not be used unless the "control" parameter was set to
true.

Parameters:
mmio The xtsc_mmio to connect to the control input of this xtsc_master.
output_name The output of the xtsc_mmio.

7.76.3.10 void connect (xtsc::xtsc_core & core, const char ∗ port = "inbound_pif")

Connect to the inbound pif or snoop slave port pair of an xtsc_core.

Parameters:
core The xtsc_core to connect to.
port Either "inbound_pif" or "snoop", case-insensitive.

Note: The snoop port is reserved for future use.

7.76.3.11 xtsc::xtsc_request::coherence_t optionally_get_coherence (xtsc::u32

index, xtsc::u32 & offset) [protected]

Get the optional coherence value. If m_format is 1, then set offset to 0 and return a
coherence_t value of NONCOHERENT, otherwise, convert the word indicated by index
to a coherence_t value, set offset to 1, and return the coherence value.

7.76.3.12 void check_for_too_many_parameters (xtsc::u32 number_expected)

[protected]

Throw an exception if the current command has more parameters than number_expected.

Parameters:
number_expected The number of parameters expected.

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7.76.3.13 void check_for_too_few_parameters (xtsc::u32 number_expected)

[protected]

Throw an exception if the current command has fewer parameters than number_expected.

Parameters:
number_expected The number of parameters expected.

7.76.4 Member Data Documentation

7.76.4.1 xtsc::u32 m_response_history_depth [protected]

As initially set by the "response_history_depth" parameter or overridden by the set_-

response_history_depth() method.
Definition at line 810 of file xtsc_master.h.
The documentation for this class was generated from the following file:

• xtsc_master.h

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7.77 xtsc_master_parms Class Reference

Constructor parameters for a xtsc_master object.

#include <xtsc/xtsc_master.h>Inheritance diagram for xtsc_master_parms:

xtsc_parms

xtsc_master_parms

Collaboration diagram for xtsc_master_parms:

xtsc_parms

xtsc_master_parms

Public Member Functions

• xtsc_master_parms (const char ∗script_file="", bool wraparound=false, const char

∗return_value_file=NULL)
Constructor for an xtsc_master_parms object.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

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7.77.1 Detailed Description

Constructor parameters for a xtsc_master object. This class contains the constructor pa-
rameters for a xtsc_master object.

Name Type Description

------------------ ---- --------------------------------------------------------

"control" bool If true, then a 1-bit control input will be created and
the "WAIT CONTROL" commands will be enabled in the
script file (see "script_file"). The control input can
be used to control the xtsc_master device with another
device.
Default = false.

"format" u32 Set the initial format expected in the script file. The
line format specified by this parameter can be changed
using the "FORMAT 1|2|3" command in the script file
itself.
Default 1.

"script_file" char* The file to read the requests from. Each request takes
one line in the file. The supported line formats are:

Note: Snoop and coherence are reserved for future use.

Note: Long lines may be truncated in XTSC_RM.pdf (please consult the html or header file).

// All formats
delay POKE address size b0 b1 ... bN
delay PEEK address size
delay LOCK lock
delay RETIRE address
delay FLUSH
delay STOP
WAIT RESPONSE|RSP|TAG [repeat]
WAIT NACC [timeout [repeat]]
WAIT duration
WAIT CONTROL WRITE|CHANGE|value [count]
FETCH ON|OFF
SYNC time
NOTE message
INFO message
VIRTUAL addr_delta
FORMAT 1|2|3
COHERENT ON|OFF
DRAM_ATTRIBUTE attr|OFF
PIF_ATTRIBUTE attr|OFF
PIF_DOMAIN domain|OFF
XFER_EN ON|OFF
USER_DATA value|OFF
BE byte_enables|OFF
LAST_TRANSFER 0|1|OFF
EXCLUSIVE ON|OFF

// Format 1
delay READ address size route_id id priority pc

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delay WRITE address size route_id id priority pc byte_enables b0 b1 ... bN

delay BLOCK_READ address size route_id id priority pc num_xfers
delay BURST_READ address size route_id id priority pc num_xfers
delay BLOCK_WRITE address size route_id id priority pc num_xfers last_xfer first_xfer b0 b1 ... bN
delay BURST_WRITE address size route_id id priority pc num_xfers xfer_num byte_enables hw_address b
delay RCW address size route_id id priority pc num_xfers last_xfer b0 b1 b2 b3
delay SNOOP address size route_id id priority pc num_xfers

// Format 2 (adds coh to all requests and adds byte_enables to RCW)

delay READ address size route_id id priority pc coh
delay WRITE address size route_id id priority pc coh byte_enables b0 b1 ... bN
delay BLOCK_READ address size route_id id priority pc coh num_xfers
delay BURST_READ address size route_id id priority pc coh num_xfers
delay BLOCK_WRITE address size route_id id priority pc coh num_xfers last_xfer first_xfer b0 b1 ...
delay BURST_WRITE address size route_id id priority pc coh num_xfers xfer_num byte_enables hw_addre
delay RCW address size route_id id priority pc coh num_xfers last_xfer byte_enables b0 b1 b
delay SNOOP address size route_id id priority pc coh num_xfers

// Format 3 (same as Format 2 except for BLOCK_WRITE)

delay BLOCK_WRITE address size route_id id priority pc coh num_xfers xfer_num byte_enables hw_addre

1. Each field after a request type (READ|WRITE|RCW|

BLOCK_READ|BLOCK_WRITE|BURST_READ|BURST_WRITE|SNOOP)
corresponds to an argument in the
xtsc::xtsc_request constructor used to create a
request of that type.
Exceptions/Clarifications:
- The first_xfer field is a 1 for the first transfer
of a BLOCK_WRITE sequence and is 0 for all others.
- The last_xfer field is a 1 for the last transfer
of a BLOCK_WRITE sequence and is 0 for all others.
- The coh field specifies the value to be passed to
the xtsc::xtsc_request::set_coherence() method.
- The xfer_num field is 1 for the first transfer, 2
for the second transfer, etc.
- In format 3, after construction xfer_num and
hw_address are set via explicit call to
xtsc_request::adjust_block_write() and
byte_enables are set via an explicit call to
xtsc_request::set_byte_enables.
2. A POKE line can be used to cause a call to either
the nb_poke() method or the nb_poke_coherent()
method depending on whether COHERENT is OFF or ON,
respectively. Each field after POKE specifies the
value to pass to the corresponding argument in the
nb_poke() or nb_poke_coherent() method. The fields
labelled "b0 b1 ... BN" specify the contents of the
buffer argument.
3. A PEEK line can be used to cause a call to either
the nb_peek() method or the nb_peek_coherent()
method depending on whether COHERENT is OFF or ON,
respectively. Each field after PEEK specifies the
value to pass to the corresponding argument in the
nb_peek() or nb_peek_coherent() method.
4. Integers can appear in decimal or hexadecimal (using
'0x' prefix) format.

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5. N = size - 1.
6. delay can be 0 (to mean 1 delta cycle), or "now" to
mean no delta cycle delay, or a positive integer or
floating point number to mean that many clock
periods.
7. A "FORMAT 1|2|3" line can be used to specify what
format the following lines will be in. The format
stays the same until another "FORMAT 1|2|3" line is
encountered. The initial format is as specified by
the "format" parameter which, by default, is 1.
8. The "delay LOCK lock" command causes a call to
nb_lock() with an argument of lock. lock can be
"true"|"1"|"on" for an argument of true or it can
be "false"|"0"|"off" for an argument of false. This
is for modelling the DRamnLockm signal of DRAM.
9. The "delay RETIRE address" command causes a call to
nb_load_retired() with an argument of address. This
is for modelling the DPortnLoadRetiredm signal of
the XLMI.
10. The "delay FLUSH" command causes a call to
nb_retire_flush(). This is for modelling the
DPortnRetireFlushm signal of the XLMI.
11. The "delay STOP" command causes simulation to stop
via a call to the sc_stop() method after the
specified delay.
12. The "WAIT RESPONSE|RSP" command causes a wait until
the next response is received without regard to
which request the response is for. The "WAIT TAG"
command causes a wait until a response is received
to the most recent previous request. A response is
deemed to be for the most recent previous request if
they have the same tag, i.e. if response.get_tag()
equals request.get_tag(). The repeat option
specifies how many times the preceeding request
should be repeated if the response is RSP_NACC. If
the repeat option is not present, the preceeding
request will be repeated until a response other than
RSP_NACC is received. If no repeat is desired,
specify 0 for the repeat option.
13. The "WAIT NACC" command causes a wait for the
specified timeout_period and then a check is made to
see if an RSP_NACC has been received for the
preceeding request. A response is deemed to be for
the most recent previous request if they have the
same tag, i.e. if response.get_tag() equals
request.get_tag(). The timeout_period is defined
based on the timeout argument using the formula:
timeout_period = timeout * clock_period
The timeout argument can be a positive integer or
floating point number. clock_period is based upon
the "clock_period" parameter. If no timeout
argument is specified, it defaults to 1 (which means
the timeout_period is the same as the xtsc_master's
clock period). At the end of the specified
timeout_period, if no RSP_NACC has been received for
the preceding request, then the xtsc_master
continues processing the script file. If an

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RSP_NACC has been received then the preceding

request will be repeated subject to the repeat
option. The repeat option specifies how many times
the preceeding request should be repeated if it has
gotten a RSP_NACC response by the end of the
specified timeout_period. If the repeat option is
not present, the preceeding request will be repeated
indefinitely as long as it always gets an RSP_NACC
within the specified timeout_period. If no repeat
is desired, specify 0 for the repeat option.
14. The "WAIT duration" command can be used to cause a
wait of the specified duration. duration can be 0
(to mean 1 delta cycle) or a positive integer or
floating point number to mean that many clock
periods.
15. If the "control" parameter was set to true then the
"WAIT CONTROL" command can be used to cause a wait
until the specified activity occurs on the control
input. WRITE means any write even if its the same
value, CHANGE means a write of a new value, and
value (which can only be 0 or 1) means a write of
the specified value. An optional count can be
specified to mean the event has to occur count
times. The default count is 1. The default event
is WRITE (so "wait control" is the same thing as
"wait control write 1").
16. The "FETCH ON" command causes all subsequent READ
and BLOCK_READ requests to have the xtsc_request
method set_instruction_fetch(true) called. To turn
this off, use the "FETCH OFF" command. The initial
setting is "FETCH OFF".
17. The "SYNC <time>" command with <time> less than 1.0
can be used to cause a wait to the clock phase
(relative to posedge clock) specified by <time>.
Posedge clock is as specified by "posedge_offset".
For example, "sync 0.5" will cause the minimum wait
necessary to sync to negedge clock.
The "SYNC <time>" command with <time> greater than
or equal to 1.0 can be used to cause a wait until
the specified absolute simulation time.
18. The NOTE and INFO commands can be used to cause
the entire line to be logged at NOTE_LOG_LEVEL
or INFO_LOG_LEVEL, respectively.
19. The VIRTUAL command can be used to specify an
addr_delta value. The addr_delta value will be
added to the address in subsequent requests to
form the snoop virtual address using xtsc_request::
set_snoop_virtual_address(address+addr_delta);
In addition, the addr_value is used in calculating
the virtual_address8 argument used in
nb_poke_coherent() and nb_peek_coherent() calls (see
the COHERENT command).
The initial value of addr_delta is 0.
20. The "COHERENT ON" command causes subsequent POKE and
PEEK lines to result in calls to nb_poke_coherent()
and nb_peek_coherent(), respectively, instead of
nb_poke() and nb_peek(). The virtual_address8 value

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passed into the nb_poke_coherent() and

nb_peek_coherent() methods is computed by adding the
addr_delta value (see the VIRTUAL command) to the
address value on the POKE or PEEK line. To return
to using nb_poke() and nb_peek(), use a
"COHERENT OFF" command.
The initial setting is "COHERENT OFF".
21. The "DRAM_ATTRIBUTE attr" command causes the DRAM
attributes to be set to attr in subsequent requests
using:
xtsc_request::set_dram_attribute(attr);
Setting of DRAM attributes can be turned off using
the "DRAM_ATTRIBUTE OFF" command.
The initial setting is "DRAM_ATTRIBUTE OFF".
22. The "PIF_ATTRIBUTE attr" command causes the PIF
attributes to be set to attr in subsequent requests
using:
xtsc_request::set_pif_attribute(attr);
Setting of PIF attributes can be turned off using
the "PIF_ATTRIBUTE OFF" command. If desired,
ATTRIBUTE may be used as an alias for PIF_ATTRIBUTE.
The initial setting is "PIF_ATTRIBUTE OFF".
23. The "PIF_DOMAIN domain" command causes the PIF request
domain to be set to domain in subsequent requests
using:
xtsc_request::set_pif_req_domain(domain);
Setting of PIF attributes can be turned off using
the "PIF_DOMAIN OFF" command. If desired,
DOMAIN may be used as an alias for PIF_DOMAIN.
The initial setting is "PIF_DOMAIN OFF".
24. The "XFER_EN ON" command causes subsequent requests to
have their m_xfer_en flag set via a call to
xtsc_request::set_xfer_en(true). To return to not
having the m_xfer_en flag set, use a "XFER_EN OFF"
command.
The initial setting is "XFER_EN OFF".
25. The "USER_DATA value" command causes subsequent
requests to have their m_user_data flag set via a
call to xtsc_request::set_user_data((void*)value).
To return to not having the m_user_data flag set,
use a "USER_DATA OFF" command.
The initial setting is "USER_DATA OFF".
26. The "BE byte_enables" command causes subsequent
transactions to have their byte enables overridden
to byte_enables (regardless of any byte enables that
appear on the request type line) via an explicit
call to xtsc_request::set_byte_enables(). The
"BE OFF" command terminates the override call to
xtsc_request::set_byte_enables() for subsequent
transactions.
The initial setting is "BE OFF".
27. The "LAST_TRANSFER 0|1" command causes subsequent
requests to have their normal m_last_transfer flag
overridden via a call to
xtsc_request::set_last_transfer(0|1). To return to
not having the normal setting overridden, use a
"LAST_TRANSFER OFF" command.

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The initial setting is "LAST_TRANSFER OFF".

28. The "EXCLUSIVE ON" command causes subsequent
requests to have their m_exclusive flag set via a
call to xtsc_request::set_exclusive(true).
To return to not having the m_exclusive flag set,
use an "EXCLUSIVE OFF" command.
The initial setting is "EXCLUSIVE OFF".
29. Words are case insensitive.
30. Comments, extra whitespace, blank lines, and lines
between "#if 0" and "#endif" are ignored.
See xtsc_script_file for a complete list of
pseudo-preprocessor commands.

"wraparound" bool Specifies what should happen when the end of file
(EOF) is reached on "script_file". When EOF is reached
and "wraparound" is true, "script_file" will be reset
to the beginning of file and the script will be processed
again. When EOF is reached and "wraparound" is false,
the xtsc_master object will cease issuing requests.
Default = false.

"response_history_depth" u32 The maximum number of entries to maintain in the

response history table. This value may be overridden
using the set_response_history_depth() method. You may
wish to maintain a response history table in order to
examine responses during program execution using the
XTSC command facility and a Lua script/snippet or the
XTSC cmd prompt. See the xtsc_master::execute() method.
Default = 0 (no response history is maintained).

"zero_delay_repeat" bool A request line in the script file with a delay of either
"now" or 0 followed by a "WAIT RESPONSE|RSP|TAG" line
will result in a hung simulation if the downstream slave
is busy, requires a non-zero amount of SystemC time to
become non-busy, and sends its RSP_NACC without any
SystemC delay. To prevent a potential hung simulation,
leave this parameter at its default setting of false to
cause a one clock cycle delay to be inserted whenever
the downstream slave responds with RSP_NACC at the same
SystemC time as a request from a request line with a
"now" or 0 delay followed by a "WAIT RESPONSE|RSP|TAG"
line. Set this parameter to true to get the behavior of
RD-2011.2 and earlier (which allows a potential hung
simulation).
Default = false.

"return_value_file" char* The file to read the nb_respond return values from.
Each time xtsc_master::nb_respond() is called with a
non-RSP_NACC status, another word is read from this
file. If the word is "1", nb_respond returns true. If
the word is "0", nb_respond returns false. When the end
of the file is reached, the file pointer is reset to the
beginning of the file. If "return_value_file" is NULL
or empty, then nb_respond always returns true. Comments
and blank lines are ignored.
See xtsc::xtsc_script_file.

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"clock_period" u32 This is the length of this master's clock period

expressed in terms of the SystemC time resolution (from
sc_get_time_resolution()). A value of 0xFFFFFFFF means
to use the XTSC system clock period (from
xtsc_get_system_clock_period()). A value of 0 means one
delta cycle.
Default = 0xFFFFFFFF (i.e. use the system clock
period).

"posedge_offset" u32 This specifies the time at which the first posedge of
this device's clock conceptually occurs. It is
expressed in units of the SystemC time resolution and
the value implied by it must be strictly less than the
value implied by the "clock_period" parameter. A value
of 0xFFFFFFFF means to use the same posedge offset as
the system clock (from
xtsc_get_system_clock_posedge_offset()).
Default = 0xFFFFFFFF.

See also:
xtsc_master
xtsc::xtsc_parms
xtsc::xtsc_request
xtsc::xtsc_request_if::nb_request
xtsc::xtsc_debug_if::nb_poke
xtsc::xtsc_debug_if::nb_peek
xtsc::xtsc_debug_if::nb_poke_coherent
xtsc::xtsc_debug_if::nb_peek_coherent
xtsc::xtsc_script_file

Definition at line 415 of file xtsc_master.h.

7.77.2 Constructor & Destructor Documentation

7.77.2.1 xtsc_master_parms (const char ∗ script_file = "", bool wraparound =

false, const char ∗ return_value_file = NULL) [inline]

Constructor for an xtsc_master_parms object.

Parameters:
script_file The file name to read the xtsc::xtsc_request test vectors from.
wraparound Indicates if script_file should wraparound to the beginning of the file after
the end of file is reached.
return_value_file The optional file name to read the xtsc::nb_respond return values
from. If this argument is NULL or empty, then xtsc_master::nb_respond() will

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always return true. When the end of this file is reached, the file pointer is reset to
the beginning of the file.

Definition at line 435 of file xtsc_master.h.

The documentation for this class was generated from the following file:

• xtsc_master.h

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7.78 xtsc_master_tlm2 Class Reference

A scripted OSCI TLM2 memory interface master.

#include <xtsc/xtsc_master_tlm2.h>Inheritance diagram for xtsc_master_tlm2:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface

xtsc_master_tlm2

Collaboration diagram for xtsc_master_tlm2:

xtsc_connection_interface

xtsc_module

xtsc_resettable
m_master
xtsc_command_handler_interface xtsc_master_tlm2 tlm_bw_transport_if_impl
m_script_file_stream m_tlm_bw_transport_if_impl

xtsc_script_file

Classes
• class tlm_bw_transport_if_impl
Implementation of tlm_bw_transport_if.

Public Types
• typedef tlm::tlm_initiator_socket< 32 > initiator_socket_4
initiator socket with BUSWIDTH = 32 bits ( 4 bytes)

• typedef tlm::tlm_initiator_socket< 64 > initiator_socket_8

initiator socket with BUSWIDTH = 64 bits ( 8 bytes)

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• typedef tlm::tlm_initiator_socket< 128 > initiator_socket_16

initiator socket with BUSWIDTH = 128 bits (16 bytes)

• typedef tlm::tlm_initiator_socket< 256 > initiator_socket_32

initiator socket with BUSWIDTH = 256 bits (32 bytes)

• typedef tlm::tlm_initiator_socket< 512 > initiator_socket_64

initiator socket with BUSWIDTH = 512 bits (64 bytes)

Public Member Functions

• initiator_socket_4 & get_initiator_socket_4 ()

Get a reference to the initiator socket with a 4-byte data interface.

• initiator_socket_8 & get_initiator_socket_8 ()

Get a reference to the initiator socket with a 8-byte data interface.

• initiator_socket_16 & get_initiator_socket_16 ()

Get a reference to the initiator socket with a 16-byte data interface.

• initiator_socket_32 & get_initiator_socket_32 ()

Get a reference to the initiator socket with a 32-byte data interface.

• initiator_socket_64 & get_initiator_socket_64 ()

Get a reference to the initiator socket with a 64-byte data interface.

• SC_HAS_PROCESS (xtsc_master_tlm2)
• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

• xtsc_master_tlm2 (sc_core::sc_module_name module_name, const xtsc_master_-

tlm2_parms &master_parms)
Constructor for an xtsc_master_tlm2.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

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For xtsc_connection_interface.

• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• xtsc::u32 get_byte_width () const

Return byte width of data interface (from "byte_width" parameter).

• void execute (const std::string &cmd_line, const std::vector< std::string > &words,
const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

• void reset (bool hard_reset=false)

Reset the xtsc_master_tlm2.

• void dump_last_read_write (std::ostream &os)

Dump log line of last read or write transaction.

• void do_poke (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗buffer)

Get size8 bytes from buffer and use transport_dbg() to poke them starting at address8.

• void do_peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗buffer)

Use transport_dbg() to peek size8 bytes starting at address8 and put them in buffer.

• void throw_missing_or_extra_arguments (bool missing)

Common routine to throw an exception for missing/extra arguments.

• virtual void script_thread (void)

Send OSCI TLM2 transactions (from m_script_file) to the downstream memory interface
slave.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

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Protected Member Functions

• xtsc::u8 ∗ new_u8_array (xtsc::u32 size8)
Get a u8 array from the pool or create a new one.

• void delete_u8_array (xtsc::u32 size8, xtsc::u8 ∗&p_array)

Return a u8 array to the pool.

• xtsc::u8 ∗ duplicate_u8_array (xtsc::u32 size8, const xtsc::u8 ∗p_src)

Duplicate a u8 array using new_u8_array.

• tlm::tlm_generic_payload ∗ new_transaction ()
Get a new transaction object from the pool.

• virtual void free (tlm::tlm_generic_payload ∗p_trans)

For tlm_mm_interface.

• void validate_port_width (xtsc::u32 width8)

Perform validation for the get_initiator_socket_BW() methods.

• void do_b_transport (tlm::tlm_generic_payload &trans, sc_core::sc_time &delay, bool

use_tlm2_busy)
Common method for calling b_transport().

• void do_transport_dbg (tlm::tlm_generic_payload &trans)

Common method for calling transport_dbg() and handling the return count.

• int get_words ()
Get the next vector of words from the script_file.

• xtsc::u32 get_u32 (xtsc::u32 index, const std::string &argument_name)

Extract a u32 value (named argument_name) from the word at m_words[index].

• xtsc::u64 get_u64 (xtsc::u32 index, const std::string &argument_name)

Extract a u64 value (named argument_name) from the word at m_words[index].

• double get_double (xtsc::u32 index, const std::string &argument_name)

Extract a double value (named argument_name) from the word at m_words[index].

• void check_for_too_many_parameters (xtsc::u32 num_expected)

Throw an exception if the current command has more parameters than num_expected.

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• void check_for_too_few_parameters (xtsc::u32 num_expected)

Throw an exception if the current command has fewer parameters than num_expected.

• void set_buffer (xtsc::u32 index, xtsc::u32 size8, xtsc::u8 ∗p_dst)

Set p_dst using size8 words starting at m_words[index].

Protected Attributes
• initiator_socket_4 ∗ m_initiator_socket_4
Initiator socket for 4-byte interface.

• initiator_socket_8 ∗ m_initiator_socket_8
Initiator socket for 8-byte interface.

• initiator_socket_16 ∗ m_initiator_socket_16
Initiator socket for 16-byte interface.

• initiator_socket_32 ∗ m_initiator_socket_32
Initiator socket for 32-byte interface.

• initiator_socket_64 ∗ m_initiator_socket_64
Initiator socket for 64-byte interface.

• tlm_bw_transport_if_impl m_tlm_bw_transport_if_impl
m_initiator_socket_BW binds to this

• log4xtensa::TextLogger & m_text

TextLogger.

• xtsc::u32 m_width8
The bus width in bytes. See "byte_width".

• xtsc::u32 m_streaming_width
From the "streaming_width" parameter or STREAM script file cmd.

• xtsc::u8 m_data_fill_byte
From the "data_fill_byte" parameter.

• bool m_wraparound
Should script file wraparound at EOF.

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• xtsc::xtsc_script_file m_script_file_stream
The script file object.

• std::string m_script_file
The name of the script file.

• std::string m_line
The current script file line.

• xtsc::u32 m_line_count
The current script file line number.

• std::vector< std::string > m_words

Tokenized words from m_line.

• xtsc::u64 m_clock_period_value
This device’s clock period as u64.

• sc_core::sc_time m_clock_period
This device’s clock period.

• sc_core::sc_time m_time_resolution
The SystemC time resolution.

• bool m_has_posedge_offset
True if m_posedge_offset is non-zero.

• std::string m_last_read_write
Log line from last read or write command.

• sc_core::sc_time m_posedge_offset
From "posedge_offset" parameter.

• xtsc::u64 m_posedge_offset_value
m_posedge_offset as u64

• xtsc::u32 m_p_byte_enable_length
Current byte enable length. Initially, 0.

• xtsc::u8 ∗ m_p_byte_enables
Current byte enables. From "enables" command.

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• std::multimap< xtsc::u32, xtsc::u8 ∗ > m_u8_array_pool

Maintain a pool of u8 arrays: <size,ptr>.

• std::vector< tlm::tlm_generic_payload ∗ > m_transaction_pool

Maintain a pool to improve performance.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to m_respond_export.

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

7.78.1 Detailed Description

A scripted OSCI TLM2 memory interface master. This XTSC module implements an OSCI
TLM2 memory interface master that reads an input file ("script_file") to determine when
and what transactions to send to an OSCI TLM2 memory interface slave module.
This module provides a simple means to deliver OSCI TLM2 generic payload test transac-
tions to an xtsc_memory_tlm2, to an xtsc_tlm22xttlm_transactor, or to any other memory-
interface slave component that supports the OSCI TLM2 base protocol.
Here is a block diagram of an xtsc_master_tlm2 as it is used in the xtsc_tlm22xttlm_-
transactor example:

(*tlm22xttlm.m_request_ports[0])

(core0.get_request_export(“inbound_pif”))
master.get_initiator_socket_4()

req
nb_request
xtsc_memory
pif
rsp

xtsc_tlm22xttlm_transactor
xtsc_master_tlm2 b_transport tlm22xttlm xtsc_core
master “num_ports” = 1 core0

req
master_tlm2.vec
nb_respond xtsc_memory
dram0
rsp

core0.get_respond_port(“inbound_pif”)

(*tlm22xttlm.m_respond_exports[0])

(tlm22xttlm.get_target_socket_4(0))

Figure 7.8: xtsc_tlm22xttlm_transactor Example

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See also:
xtsc_master_tlm2_parms
xtsc_memory_tlm2
xtsc_tlm22xttlm_transactor

Definition at line 230 of file xtsc_master_tlm2.h.

7.78.2 Constructor & Destructor Documentation

7.78.2.1 xtsc_master_tlm2 (sc_core::sc_module_name module_name, const

xtsc_master_tlm2_parms & master_parms)

Constructor for an xtsc_master_tlm2.

Parameters:
module_name Name of the xtsc_master_tlm2 sc_module.
master_parms The remaining parameters for construction.

See also:
xtsc_master_tlm2_parms

7.78.3 Member Function Documentation

7.78.3.1 void execute (const std::string & cmd_line, const std::vector< std::string
> & words, const std::vector< std::string > & words_lc, std::ostream &
result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:

dump_last_read_write
Dump the log line from the most recent previous read or write command.

peek <StartAddress> <NumBytes>

Use transport_dbg() to peek <NumBytes> of memory starting at <StartAddress>.

poke <StartAddress> <NumBytes> <Byte1> <Byte2> . . . <ByteN>

Use transport_dbg() to poke <NumBytes> (=N) of memory starting at <StartAddress>.

reset [<Hard>]
Call xtsc_memory_tlm2::reset(<Hard>). Where <Hard> is 0|1 (default 0).

Implements xtsc_command_handler_interface.

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7.78.3.2 void dump_last_read_write (std::ostream & os)

Dump log line of last read or write transaction.

Parameters:
os The ostream object to which the log line of the most recent previous read or write
is to be dumped.

7.78.3.3 void check_for_too_many_parameters (xtsc::u32 num_expected)

[protected]

Throw an exception if the current command has more parameters than num_expected.

Parameters:
num_expected The number of parameters expected.

7.78.3.4 void check_for_too_few_parameters (xtsc::u32 num_expected)

[protected]

Throw an exception if the current command has fewer parameters than num_expected.

Parameters:
num_expected The number of parameters expected.

The documentation for this class was generated from the following file:

• xtsc_master_tlm2.h

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7.79 xtsc_master_tlm2_parms Class Reference

Constructor parameters for a xtsc_master_tlm2 object.

#include <xtsc/xtsc_master_tlm2.h>Inheritance diagram for xtsc_master_tlm2_-
parms:

xtsc_parms

xtsc_master_tlm2_parms

Collaboration diagram for xtsc_master_tlm2_parms:

xtsc_parms

xtsc_master_tlm2_parms

Public Member Functions

• xtsc_master_tlm2_parms (const char ∗script_file="", xtsc::u32 width8=4, bool

wraparound=false)
Constructor for an xtsc_master_tlm2_parms object.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

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7.79.1 Detailed Description

Constructor parameters for a xtsc_master_tlm2 object. This class contains the constructor
parameters for a xtsc_master_tlm2 object.

Name Type Description

------------------ ---- --------------------------------------------------------

"byte_width" u32 Bus width in bytes. Valid values are 4, 8, 16, 32, and
64.

"script_file" char* The file to read the requests from. Each request takes
one line in the file. The supported line formats are:

WAIT duration
SYNC time
NOTE message
INFO message

ENABLES size [byte_enables]

STREAM streaming_width

delay STOP

delay POKE address size b0 b1 ... bN

delay WRITE address size b0 b1 ... bN
delay PEEK address size
delay READ address size

1. In the POKE, WRITE, PEEK, and READ lines, the

address and size fields are used to set the address
and data length attributes, respectively, in the
generic payload.
2. A POKE line causes a call to the transport_dbg()
method with a command of TLM_WRITE_COMMAND. The
fields labelled "b0 b1 ... BN" specify the contents
of the data array in the generic payload.
3. A WRITE line causes a call to the b_transport()
method with a command of TLM_WRITE_COMMAND. The
fields labelled "b0 b1 ... BN" specify the contents
of the data array in the generic payload.
4. A PEEK line causes a call to the transport_dbg()
method with a command of TLM_READ_COMMAND.
5. A READ line causes a call to the b_transport()
method with a command of TLM_READ_COMMAND.
6. In the POKE and WRITE lines, N = size - 1.
7. delay can be 0 (to mean 1 delta cycle), or "now" to
mean no delta cycle delay, or a positive integer or
floating point number to mean that many clock
periods.
8. The "ENABLES" command sets the byte enables array
that will be used for subsequent READ and WRITE
transactions. If byte_enables is provided then it
must be a string of exactly size characters each of
which is either 0 or 1. Each 0 in byte_enables will

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cause a 0 byte to be added to the TLM2 generic

payload byte enables array and each 1 in
byte_enables will cause a 0xff byte to be added. If
byte_enables is not provided then it will default to
size 1's (all bytes enabled).
For example:
enables 4
enables 4 1111 // same as above
enables 7 0111001
9. The "STREAM" command can be used to change the
streaming width attribute of subsequent reads and
writes. The special value of 0xFFFFFFFF means to
make the streaming width the same as the data length
attribute (from the size argument of the READ or
WRITE command). The initial streaming width is as
set by the "streaming_width" parameter.
10. The "delay STOP" command causes simulation to stop
via a call to the sc_stop() method after the
specified delay.
11. The "WAIT duration" command can be used to cause a
wait of the specified duration. duration can be 0
(to mean 1 delta cycle) or a positive integer or
floating point number to mean that many clock
periods.
12. The "SYNC <time>" command with <time> less than 1.0
can be used to cause a wait to the clock phase
(relative to posedge clock) specified by <time>.
Posedge clock is as specified by "posedge_offset".
For example, "sync 0.5" will cause the minimum wait
necessary to sync to negedge clock.
The "SYNC <time>" command with <time> greater than
or equal to 1.0 can be used to cause a wait until
the specified absolute simulation time.
13. The NOTE and INFO commands can be used to cause
the entire line to be logged at NOTE_LOG_LEVEL
or INFO_LOG_LEVEL, respectively.
14. Integers can appear in decimal or hexadecimal (using
'0x' prefix) format.
15. Words are case insensitive.
16. Comments, extra whitespace, blank lines, and lines
between "#if 0" and "#endif" are ignored.
See xtsc_script_file for a complete list of
pseudo-preprocessor commands.

"wraparound" bool Specifies what should happen when the end of file
(EOF) is reached on "script_file". When EOF is reached
and "wraparound" is true, "script_file" will be reset
to the beginning of file and the script will be processed
again. When EOF is reached and "wraparound" is false,
the xtsc_master_tlm2 object will cease issuing requests.
Default = false.

"streaming_width" u32 Specifies the streaming width attribute or read and

write transactions. The special value of 0xFFFFFFFF
means to make the streaming width equal to the data
length attribute (from the READ/WRITE command).
Default = 0xFFFFFFFF.

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"data_fill_byte" u32 The low byte specifies the value used to initialize
the data pointer array in each new transaction.
Default = 0.

"clock_period" u32 This is the length of this master's clock period

expressed in terms of the SystemC time resolution (from
sc_get_time_resolution()). A value of 0xFFFFFFFF means
to use the XTSC system clock period (from
xtsc_get_system_clock_period()). A value of 0 means one
delta cycle.
Default = 0xFFFFFFFF (i.e. use the system clock
period).

"posedge_offset" u32 This specifies the time at which the first posedge of
this device's clock conceptually occurs. It is
expressed in units of the SystemC time resolution and
the value implied by it must be strictly less than the
value implied by the "clock_period" parameter. A value
of 0xFFFFFFFF means to use the same posedge offset as
the system clock (from
xtsc_get_system_clock_posedge_offset()).
Default = 0xFFFFFFFF.

See also:
xtsc_master_tlm2
xtsc::xtsc_parms
xtsc::xtsc_request
xtsc::xtsc_script_file

Definition at line 174 of file xtsc_master_tlm2.h.

7.79.2 Constructor & Destructor Documentation

7.79.2.1 xtsc_master_tlm2_parms (const char ∗ script_file = "", xtsc::u32 width8 =

4, bool wraparound = false) [inline]

Constructor for an xtsc_master_tlm2_parms object.

Parameters:
script_file The file name to read the xtsc::xtsc_request test vectors from.
byte_width The byte width of the memory interface (BUSWIDTH)
wraparound Indicates if script_file should wraparound to the beginning of the file after
the end of file is reached.

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Definition at line 190 of file xtsc_master_tlm2.h.

The documentation for this class was generated from the following file:

• xtsc_master_tlm2.h

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7.80 xtsc_memory Class Reference

A PIF, XLMI, or local memory.

#include <xtsc/xtsc_memory.h>Inheritance diagram for xtsc_memory:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface

xtsc_memory

xtsc_cache xtsc_dma_engine

Collaboration diagram for xtsc_memory:

xtsc_debug_if

xtsc_connection_interface xtsc_request_if
xtsc_module

xtsc_resettable

xtsc_command_handler_interface

m_p_exclusive_script_stream
m_p_script_stream

xtsc_script_file m_p_initial_value_file
m_memory xtsc_request_if_impl
xtsc_memory_b m_p_memory
m_request_impl
xtsc_memory
m_filtered_request

m_filtered_response
m_p_request m_stream_dumper m_p_active_response
stream_dumper xtsc_response
xtsc_request
m_stream_dumper

m_request m_p_active_request_info
request_info
m_memory_parms

xtsc_memory_parms
xtsc_parms
m_fast_access_object
xtsc_fast_access_if

Classes
• class address_info

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POD class to help keep track of information related to a special address or address range.

• class request_info
Information about each request.

• class watchfilter_info
Information about each watchfilter.

• class xtsc_request_if_impl
Implementation of xtsc_request_if.

Public Types

• enum request_type_t {
REQ_READ = 1 << 0,
REQ_WRITE = 1 << 1,
REQ_BLOCK_READ = 1 << 2,
REQ_RCW_1 = 1 << 3,
REQ_RCW_2 = 1 << 4,
REQ_BURST_READ = 1 << 5,
REQ_BURST_WRITE_1 = 1 << 8,
REQ_BURST_WRITE_2 = 1 << 9,
REQ_BURST_WRITE_3 = 1 << 10,
REQ_BURST_WRITE_4 = 1 << 11,
REQ_BURST_WRITE_5 = 1 << 12,
REQ_BURST_WRITE_6 = 1 << 13,
REQ_BURST_WRITE_7 = 1 << 14,
REQ_BURST_WRITE_8 = 1 << 15,
REQ_BLOCK_WRITE_1 = 1 << 16,
REQ_BLOCK_WRITE_2 = 1 << 17,
REQ_BLOCK_WRITE_3 = 1 << 18,
REQ_BLOCK_WRITE_4 = 1 << 19,
REQ_BLOCK_WRITE_5 = 1 << 20,
REQ_BLOCK_WRITE_6 = 1 << 21,
REQ_BLOCK_WRITE_7 = 1 << 22,

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REQ_BLOCK_WRITE_8 = 1 << 23,

REQ_BLOCK_WRITE_9 = 1 << 24,
REQ_BLOCK_WRITE_10 = 1 << 25,
REQ_BLOCK_WRITE_11 = 1 << 26,
REQ_BLOCK_WRITE_12 = 1 << 27,
REQ_BLOCK_WRITE_13 = 1 << 28,
REQ_BLOCK_WRITE_14 = 1 << 29,
REQ_BLOCK_WRITE_15 = 1 << 30,
REQ_BLOCK_WRITE_16 = 1 << 31,
REQ_ALL = 0xFFFFFFFF,
REQ_NONE = 0 }
• typedef enum xtsc_component::xtsc_memory::request_type_t request_type_t

Public Member Functions

• SC_HAS_PROCESS (xtsc_memory)
• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

• xtsc_memory (sc_core::sc_module_name module_name, const xtsc_memory_-

parms &memory_parms)
Constructor for an xtsc_memory.

• virtual ∼xtsc_memory (void)

Destructor.

• void end_of_simulation ()
• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-
num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const

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For xtsc_connection_interface.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

• log4xtensa::BinaryLogger & get_binary_logger ()

Get the BinaryLogger for this component (e.g. to adjust its log level).

• virtual void peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗buffer)

Non-hardware reads (for example, reads by the debugger).

• virtual void poke (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8

∗buffer)
Non-hardware writes (for example, writes from the debugger).

• void byte_dump (xtsc::xtsc_address address8, xtsc::u32 size8, std::ostream

&os=std::cout, bool left_to_right=true, xtsc::u32 bytes_per_line=16, bool show_-
address=true, bool show_hex_values=true, bool do_column_heading=true, bool
show_ascii_values=true, bool adjust_address=true)
This method dumps the specified number of bytes from the memory.

• void reset (bool hard_reset=false)

Reset the memory.

• void support_exclusive (bool exclusive)

Set whether or not exlusive access requests are supported.

• void change_clock_period (xtsc::u32 clock_period_factor)

Method to change the clock period.

• virtual void man (std::ostream &os)

Implementation of the xtsc::xtsc_command_handler_interface.

• void execute (const std::string &cmd_line, const std::vector< std::string > &words,
const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

• void connect (xtsc_arbiter &arbiter, xtsc::u32 port_num=0)

Connect an xtsc_arbiter with this xtsc_memory.

• xtsc::u32 connect (xtsc::xtsc_core &core, const char ∗memory_port_name, xtsc::u32

port_num=0, bool single_connect=false)

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Connect an xtsc_core with this xtsc_memory.

• void connect (xtsc_dma_engine &dma, xtsc::u32 port_num=0)

Connect an xtsc_dma_engine with this xtsc_memory.

• void connect (xtsc_master &master, xtsc::u32 port_num=0)

Connect an xtsc_master with this xtsc_memory.

• xtsc::u32 connect (xtsc_memory_trace &memory_trace, xtsc::u32 trace_port=0,

xtsc::u32 port_num=0, bool single_connect=false)
Connect an xtsc_memory_trace with this xtsc_memory.

• xtsc::u32 connect (xtsc_pin2tlm_memory_transactor &pin2tlm, xtsc::u32 tran_-

port=0, xtsc::u32 port_num=0, bool single_connect=false)
Connect an xtsc_pin2tlm_memory_transactor with this xtsc_memory.

• void connect (xtsc_router &router, xtsc::u32 router_port, xtsc::u32 port_num=0)

Connect an xtsc_router with this xtsc_memory.

• xtsc::u32 watchfilter_add (const std::string &filter_name, sc_core::sc_event &event)

Add a watchfilter on peeks, pokes, requests, or responses.

• void watchfilter_dump (std::ostream &os=std::cout)

Dump a list of all watchfilters applied to this xtsc_memory instance.

• xtsc::u32 watchfilter_remove (xtsc::u32 watchfilter)

Remove the specified watchfilter or all watchfilters.

• void setup_false_error_responses (xtsc::xtsc_response::status_t status, xtsc::u32

request_mask, xtsc::u32 fail_percentage)
This method can be used to control the sending of false error responses (for example, to
test the upstream memory interface master device’s handling of them).

• void clear_addresses ()
Clear all addresses and address ranges that are to receive special responses.

• void dump_addresses (std::ostream &os)

Dump all addresses and address ranges that are to receive special responses.

• void dump_exclusive_monitors (std::ostream &os)

Dump all exclusive monitors in format <TranID>:<AddressBeg>-<AddressEnd>.

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• bool compute_special_response (const xtsc::xtsc_request &request, xtsc::u32 port_-

num, xtsc::xtsc_response::status_t &status, bool &list, xtsc::u32 &type)
Determine if the specified request should get a special response and also compute type.

• xtsc::u32 get_request_type_code (xtsc::u32 index)

Extract and return the request type code from the word at m_words[index].

• xtsc::u32 random ()
Compute a pseudo-random sequence based on George Marsaglia’s multiply-with-carry
method.

Public Attributes
• sc_core::sc_export< xtsc::xtsc_request_if > ∗∗ m_request_exports
From the memory interface masters (e.g xtsc_core, xtsc_router, etc) to us.

• sc_core::sc_port< xtsc::xtsc_respond_if > ∗∗ m_respond_ports

From us to the memory interface masters (e.g xtsc_core, xtsc_router, etc).

Protected Types
• typedef std::pair< xtsc::xtsc_address, xtsc::xtsc_address > address_range

Protected Member Functions

• void handle_response_filters (xtsc::u32 port, const xtsc::xtsc_response &response)
Handle xtsc_response filters.

• virtual void compute_delays ()

Common method to compute/re-compute time delays.

• void reset_fifos ()
Reset internal fifos.

• void script_thread ()
Process optional "script_file".

• void compute_let_through ()

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Translate fail_percentage into terms of maximum random value.

• bool set_exclusive_from_script (xtsc::xtsc_address address8, xtsc::xtsc_response

&response)
Call set_exclusive based on value in "exclusive_script_file". Return exclusive setting.

• void create_exclusive_monitor (xtsc::xtsc_request &request, xtsc::xtsc_address ad-

dress8, xtsc::u32 size8)
Create an exclusive monitor of the specified address and size and transaction ID (from
request).

• bool check_exclusive_write (xtsc::xtsc_request &request, xtsc::xtsc_address ad-

dress8, xtsc::u32 size8, xtsc::xtsc_response &response)
Return whether or not there is a monitor for the given exclusive write and, if so, remove it.

• void check_exclusive_monitors_against_write (xtsc::xtsc_request &request,

xtsc::xtsc_address address8, xtsc::u32 size8)
Remove all exclusive monitors that overlap a write of the specified address and size.

• request_type_t get_request_type (const xtsc::xtsc_request &request, xtsc::u32

port_num)
Return the exact request type of this request.

• bool do_nacc_failure (const xtsc::xtsc_request &request, xtsc::u32 port_num)

Return true if an RSP_NACC should be sent for testing purposes.

• xtsc::xtsc_response::status_t get_status_for_testing_failures (request_info ∗p_-

request_info, xtsc::u32 port_num, bool &list)
Return response status for testing purposes.

• virtual void worker_thread (void)

Thread to handle transactions at the correct time.

• virtual void do_active_request (xtsc::u32 port_num)

Method to handle the current (active) request.

• virtual void do_read (xtsc::u32 port_num)

Helper method to handle xtsc::xtsc_request::READ.

• virtual void do_block_read (xtsc::u32 port_num)

Helper method to handle xtsc::xtsc_request::BLOCK_READ.

• virtual void do_burst_read (xtsc::u32 port_num)

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Helper method to handle BURST_READ.

• virtual void do_rcw (xtsc::u32 port_num)

Helper method to handle xtsc::xtsc_request::RCW.

• virtual void do_write (xtsc::u32 port_num)

Helper method to handle xtsc::xtsc_request::WRITE.

• virtual void do_block_write (xtsc::u32 port_num)

Helper method to handle xtsc::xtsc_request::BLOCK_WRITE.

• virtual void do_block_write_transfer_count (xtsc::xtsc_request ∗p_request, xtsc::u32

port_num, bool last_transfer)
Update m_block_write_transfer_count and perform checks on it.

• virtual void do_burst_write (xtsc::u32 port_num)

Helper method to handle BURST_WRITE.

• void send_response (xtsc::u32 port_num, bool log_data_binary)

Helper method to binary log response and then send the response until it is accepted.

• request_info ∗ new_request_info (const xtsc::xtsc_request &request, xtsc::xtsc_-

response::status_t status, bool list)
Get a new request_info (from the pool).

• void delete_request_info (request_info ∗&p_request_info)

Delete an request_info (return it to the pool).

• xtsc::xtsc_fast_access_if ∗ get_fast_access_object () const

Get the object to use for fast access implemented through CALLBACKS.

• int get_words ()
Get the next vector of words from the script file.

• xtsc::u32 get_u32 (xtsc::u32 index, const std::string &argument_name)

Extract a u32 value (named argument_name) from the word at m_words[index].

• xtsc::u64 get_u64 (xtsc::u32 index, const std::string &argument_name)

Extract a u64 value (named argument_name) from the word at m_words[index].

• double get_double (xtsc::u32 index, const std::string &argument_name)

Extract a double value (named argument_name) from the word at m_words[index].

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• bool get_addresses (xtsc::u32 index, const std::string &argument_name, xtsc::xtsc_-

address &low_address, xtsc::xtsc_address &high_address)
Method to convert an address or address range string into a pair of numeric addresses.

• void load_initial_values ()
Helper function to initialize memory contents.

• xtsc::u32 get_page (xtsc::xtsc_address address8)

Get the page of memory containing address8 (allocate as needed).

• xtsc::u32 get_page_id (xtsc::xtsc_address address8) const

Get the page of storage corresponding to the specified address.

• xtsc::u32 get_page_offset (xtsc::xtsc_address address8) const

Get the offset into the page of storage corresponding to the specified address.

• virtual xtsc::u8 read_u8 (xtsc::xtsc_address address8)

Helper method to read a u8 value (allocate as needed).

• virtual void write_u8 (xtsc::xtsc_address address8, xtsc::u8 value)

Helper method to write a u8 value (allocate as needed).

• virtual xtsc::u32 read_u32 (xtsc::xtsc_address address8, bool big_endian=false)

Helper method to read a u32 value (allocate as needed).

• virtual void write_u32 (xtsc::xtsc_address address8, xtsc::u32 value, bool big_-

endian=false)
Helper method to write a u32 value (allocate as needed).

Protected Attributes

• xtsc_memory_parms m_memory_parms
Copy of xtsc_memory_parms.

• xtsc::u32 m_num_ports
The number of ports this memory has.

• xtsc::u32 m_next_port_num
Used by worker_thread entry to get its slave port number.

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• xtsc_request_if_impl ∗∗ m_request_impl
The m_request_exports objects bind to these.

• xtsc::xtsc_memory_b ∗ m_p_memory
The memory itself.

• sc_core::sc_fifo< request_info ∗ > ∗∗ m_request_fifo

The fifos for incoming requests on each port.

• request_info ∗∗ m_p_active_request_info
The active (current) request on each port.

• xtsc::xtsc_response ∗∗ m_p_active_response
The active (current) response on each port.

• xtsc::u32 ∗ m_block_write_transfer_count
Keep track of block writes on each port.

• xtsc::u32 ∗ m_burst_write_transfer_count
Keep track of burst writes on each port.

• bool ∗ m_first_block_write
True if first block write request on each port.

• bool ∗ m_first_burst_write
True if first burst write request on each port.

• bool ∗ m_first_rcw
True if first RCW request on each port.

• sc_core::sc_time ∗ m_last_action_time_stamp
Time of last action on each port: recovery time starts from here.

• sc_core::sc_event ∗∗ m_worker_thread_event
To notify worker_thread of a request on each port.

• bool ∗ m_rcw_have_first_transfer
True if first RCW has been received but not second.

• xtsc::u8 ∗ m_rcw_compare_data
Comparison data from RCW request.

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• sc_core::sc_time m_clock_period
The clock period of this memory.

• bool m_immediate_timing
True if requests should be handled without any delay.

• bool m_delay_from_receipt
True if delay timing starts from receipt of request.

• bool m_write_responses
See "write_responses" parameter.

• bool m_check_alignment
If true, check that address is size aligned.

• sc_core::sc_time m_recovery_time
See "recovery_time" parameter.

• sc_core::sc_time m_read_delay
See "read_delay" parameter.

• sc_core::sc_time m_block_read_delay
See "block_read_delay" parameter.

• sc_core::sc_time m_block_read_repeat
See "block_read_repeat" parameter.

• sc_core::sc_time m_burst_read_delay
See "burst_read_delay" parameter.

• sc_core::sc_time m_burst_read_repeat
See "burst_read_repeat" parameter.

• sc_core::sc_time m_rcw_repeat
See "rcw_repeat" parameter.

• sc_core::sc_time m_rcw_response
See "rcw_response" parameter.

• sc_core::sc_time m_write_delay
See "write_delay" parameter.

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• sc_core::sc_time m_block_write_delay
See "block_write_delay" parameter.

• sc_core::sc_time m_block_write_repeat
See "block_write_repeat" parameter.

• sc_core::sc_time m_block_write_response
See "block_write_response" parameter.

• sc_core::sc_time m_burst_write_delay
See "burst_write_delay" parameter.

• sc_core::sc_time m_burst_write_repeat
See "burst_write_repeat" parameter.

• sc_core::sc_time m_burst_write_response
See "burst_write_response" parameter.

• sc_core::sc_time m_response_repeat
See "response_repeat" parameter.

• std::string m_script_file
The name of the optional script file.

• bool m_wraparound
Should script file wraparound at EOF.

• sc_core::sc_event m_script_thread_event
To notify script_thread of a request.

• xtsc::xtsc_script_file ∗ m_p_script_stream
Pointer to the optional script file object.

• std::string m_line
The current script file line.

• xtsc::u32 m_line_count
The current script file line number.

• std::vector< std::string > m_words

Tokenized words from m_line.

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• std::string m_exclusive_script_file
See "exclusive_script_file" parameter.

• xtsc::xtsc_script_file ∗ m_p_exclusive_script_stream
Pointer to the optional exclusive script file object.

• std::string m_current_exclusive_file
"exclusive_script_file": Current file name (may be from include)

• xtsc::u32 m_exclusive_line_num
"exclusive_script_file": Current line number

• std::string m_exclusive_line
"exclusive_script_file": Current line

• std::vector< std::string > m_exclusive_words

"exclusive_script_file": words from current line

• std::map< xtsc::u64, address_range > m_exclusive_monitor_map

Map transaction ID to exclusive monitor address range.

• bool m_support_exclusive
See "support_exclusive" parameter, method, and command.

• bool ∗ m_block_write_doit
Actually do the writes of an exclusive BLOCK_WRITE.

• xtsc::u32 m_exclusive_monitors
Total exclusive monitors created - logged at end of simulation.

• xtsc::u32 m_prev_type
type code of most recent previous request

• bool m_prev_hit
true if request address was in one of the address lists

• xtsc::u32 m_prev_port
port number of most recent previous request

• xtsc::xtsc_response::status_t m_fail_status
See "fail_status" parameter.

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• xtsc::u32 m_fail_request_mask
See "fail_request_mask" parameter.

• xtsc::u32 m_fail_percentage
See "fail_percentage" parameter.

• xtsc::u32 m_fail_seed
See "fail_seed" parameter.

• xtsc::u32 m_z
For Marsaglia’s multipy-with-carry PRNG.

• xtsc::u32 m_w
For Marsaglia’s multipy-with-carry PRNG.

• xtsc::u32 m_let_through
Gate when "fail_request_mask" is non-zero.

• std::string m_lua_function
See LUA_FUNCTION under "script_file" parameter.

• bool m_last
See LAST under "script_file" parameter.

• bool m_read_only
See "read_only" parameter.

• xtsc::u32 m_log_user_data_bytes
See "log_user_data_bytes" parameter.

• xtsc::u32 m_user_data_type
0=none (use default), 1=value, 2=pointer

• xtsc::u32 m_user_data_length
Number of bytes in or pointed to by m_p_user_data.

• xtsc::u8 ∗ m_p_user_data
To override default response user data.

• std::vector< request_info ∗ > m_request_pool

Pool of requests.

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• bool m_host_shared_memory
See "host_shared_memory" parameter.

• bool m_host_mutex
See "host_mutex" parameter.

• bool m_use_fast_access
For turboxim. See "use_fast_access".

• std::vector< xtsc::u32 > m_deny_fast_access

For turboxim. See "deny_fast_access".

• std::vector< xtsc::u32 > m_fast_access_size

For turboxim. See "fast_access_size".

• bool m_use_raw_access
For turboxim. See "use_raw_access".

• bool m_use_callback_access
For turboxim. See "use_callback_access".

• bool m_use_custom_access
For turboxim. See "use_custom_access".

• bool m_use_interface_access
For turboxim. See "use_interface_access".

• xtsc::xtsc_fast_access_if ∗ m_fast_access_object
Object for fast access through CALLBACKS.

• std::vector< xtsc::xtsc_response::status_t > m_response_list

See RESPONSE_LIST under "script_file".

• std::map< xtsc::xtsc_address, address_info ∗ > m_address_map

Map of single addresses.

• std::map< xtsc::xtsc_address, address_info ∗ > m_address_range_map

Map of address ranges.

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

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• std::map< xtsc::u32, watchfilter_info ∗ > m_watchfilters

The currently active watchfilters.

• std::set< xtsc::u32 > m_peek_watchfilters

The currently active peek watchfilters.

• std::set< xtsc::u32 > m_poke_watchfilters

The currently active poke watchfilters.

• std::set< xtsc::u32 > m_request_watchfilters

The currently active xtsc_request watchfilters.

• std::set< xtsc::u32 > m_response_watchfilters

The currently active xtsc_response watchfilters.

• bool m_filter_peeks
True if m_peek_watchfilters is non-empty.

• bool m_filter_pokes
True if m_poke_watchfilters is non-empty.

• bool m_filter_requests
True if m_request_watchfilters is non-empty.

• bool m_filter_responses
True if m_response_watchfilters is non-empty.

• xtsc::xtsc_request m_filtered_request
Copy of most recent previous filtered xtsc_request.

• xtsc::xtsc_response m_filtered_response
Copy of most recent previous filtered xtsc_response.

• xtsc::xtsc_address m_start_address8
The starting byte address of this memory.

• xtsc::u32 m_size8
The byte size of this memory.

• xtsc::u32 m_width8
The byte width of this memories data interface.

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• xtsc::xtsc_address m_end_address8

The ending byte address of this memory.

• log4xtensa::TextLogger & m_text

Text logger.

• log4xtensa::BinaryLogger & m_binary

Binary logger.

7.80.1 Detailed Description

A PIF, XLMI, or local memory. Example XTSC module implementing a configurable mem-
ory.
On a given port, this memory model always processes transactions in the order they were
received.
You may use this memory directly or just use the code as a starting place for develop-
ing your own memory models. In some cases, this class can be sub-classed for special
functionality.
Note: The xtsc_memory module does not ensure RCW transactions are atomic. Ensuring
RCW transactions are atomic is the responsibility of upstream modules.
Here is a block diagram of an xtsc_memory as it is used in the hello_world example:

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core0.get_request_port("pif")

(*core0_pif.m_request_exports[0])

nb_request()

xtsc_core core0
xtsc_memory core0_pif
(hello.out)

nb_respond()

(core0.get_respond_export("pif"))

(*core0_pif.m_respond_ports[0])

Figure 7.9: hello_world Example

Here is the code to connect the system using the xtsc::xtsc_connect() method:

xtsc_connect(core0, "pif", "", core0_pif);

And here is the code to connect the system using manual SystemC port binding:

core0.get_request_port("pif")(*core0_pif.m_request_exports[0]);
(*core0_pif.m_respond_ports[0])(core0.get_respond_export("pif"));

See also:
xtsc_memory_parms
xtsc::xtsc_memory_b
xtsc::xtsc_request_if
xtsc::xtsc_respond_if
xtsc::xtsc_core::How_to_do_port_binding
xtsc_arbiter
xtsc_dma_engine
xtsc_router
xtsc_master

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Definition at line 1004 of file xtsc_memory.h.

7.80.2 Member Enumeration Documentation

7.80.2.1 enum request_type_t

Enumerator:
REQ_READ 0x00000001 = Single read
REQ_WRITE 0x00000002 = Write
REQ_BLOCK_READ 0x00000004 = Block read
REQ_RCW_1 0x00000008 = Read-conditional-write request #1
REQ_RCW_2 0x00000010 = Read-conditional-write request #2
REQ_BURST_READ 0x00000020 = Burst read
REQ_BURST_WRITE_1 0x00000100 = Burst write request #1
REQ_BURST_WRITE_2 0x00000200 = Burst write request #2
REQ_BURST_WRITE_3 0x00000400 = Burst write request #3
REQ_BURST_WRITE_4 0x00000800 = Burst write request #4
REQ_BURST_WRITE_5 0x00001000 = Burst write request #5
REQ_BURST_WRITE_6 0x00002000 = Burst write request #6
REQ_BURST_WRITE_7 0x00004000 = Burst write request #7
REQ_BURST_WRITE_8 0x00008000 = Burst write request #8
REQ_BLOCK_WRITE_1 0x00010000 = Block write request #1
REQ_BLOCK_WRITE_2 0x00020000 = Block write request #2
REQ_BLOCK_WRITE_3 0x00040000 = Block write request #3
REQ_BLOCK_WRITE_4 0x00080000 = Block write request #4
REQ_BLOCK_WRITE_5 0x00100000 = Block write request #5
REQ_BLOCK_WRITE_6 0x00200000 = Block write request #6
REQ_BLOCK_WRITE_7 0x00400000 = Block write request #7
REQ_BLOCK_WRITE_8 0x00800000 = Block write request #8
REQ_BLOCK_WRITE_9 0x01000000 = Block write request #9
REQ_BLOCK_WRITE_10 0x02000000 = Block write request #10
REQ_BLOCK_WRITE_11 0x04000000 = Block write request #11
REQ_BLOCK_WRITE_12 0x08000000 = Block write request #12
REQ_BLOCK_WRITE_13 0x10000000 = Block write request #13
REQ_BLOCK_WRITE_14 0x20000000 = Block write request #14

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REQ_BLOCK_WRITE_15 0x40000000 = Block write request #15

REQ_BLOCK_WRITE_16 0x80000000 = Block write request #16
REQ_ALL 0xFFFFFFFF = All request types
REQ_NONE 0x00000000 = No request types

Definition at line 1461 of file xtsc_memory.h.

7.80.3 Constructor & Destructor Documentation

7.80.3.1 xtsc_memory (sc_core::sc_module_name module_name, const

xtsc_memory_parms & memory_parms)

Constructor for an xtsc_memory.

Parameters:
module_name Name of the xtsc_memory sc_module.
memory_parms The remaining parameters for construction.

See also:
xtsc_memory_parms

7.80.4 Member Function Documentation

7.80.4.1 virtual void peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8

∗ buffer) [inline, virtual]

Non-hardware reads (for example, reads by the debugger).

See also:
xtsc::xtsc_request_if::nb_peek

Reimplemented in xtsc_cache.
Definition at line 1071 of file xtsc_memory.h.

7.80.4.2 virtual void poke (xtsc::xtsc_address address8, xtsc::u32 size8, const

xtsc::u8 ∗ buffer) [inline, virtual]

Non-hardware writes (for example, writes from the debugger).

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See also:
xtsc::xtsc_request_if::nb_poke

Reimplemented in xtsc_cache.
Definition at line 1078 of file xtsc_memory.h.

7.80.4.3 void byte_dump (xtsc::xtsc_address address8, xtsc::u32 size8,

std::ostream & os = std::cout, bool left_to_right = true, xtsc::u32
bytes_per_line = 16, bool show_address = true, bool show_hex_values =
true, bool do_column_heading = true, bool show_ascii_values = true,
bool adjust_address = true) [inline]

This method dumps the specified number of bytes from the memory. Each line of output is
divided into three columnar sections, each of which is optional. The first section contains
an address. The second section contains a hex dump of some (possibly all) of the data
(two hex nibbles and a space for each byte from the memory). The third section contains
an ASCII dump of the same data.

Parameters:
address8 The starting byte address in memory.
size8 The number of bytes of data to dump.
os The ostream object to which the data is to be dumped.
left_to_right If true, the data is dumped in the order: memory[0], memory[1],
..., memory[bytes_per_line-1]. If false, the data is dumped in the order:
memory[bytes_per_line-1], memory[bytes_per_line-2], ..., memory[0].
bytes_per_line The number of bytes to dump on each line of output. If bytes_per_line
is 0 then all size8 bytes are dumped on a single line with no newline at the end. If
bytes_per_line is non-zero, then all lines of output end in newline.
show_address If true, the first columnar section contains an address printed as an
8-hex-digit number with a 0x prefix. If false, the first columnar section is null and
takes no space in the output.
show_hex_values If true, the second (middle) columnar section of hex data values
is printed. If false, the second columnar section is null and takes no space in the
output.
do_column_heading If true, print byte position column headings over the hex val-
ues section. If false, no column headings are printed. If show_hex_values is
false, then the do_column_heading value is ignored and no column headings are
printed.
show_ascii_values If true, the third (last) columnar section of ASCII data values is
printed (if an ASCII value is a non-printable character a period is printed). If

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show_ascii_values is false, the third columnar section is null and takes no space
in the output.
adjust_address If adjust_address is true and address8 modulo bytes_per_line is not
0, then offset the printed values on the first line of the hex and ASCII colum-
nar sections and adjust the printed address so that the printed address modulo
bytes_per_line is always zero. Otherwize, do not offset the first printed data val-
ues and do not adjust the printed address.

Definition at line 1138 of file xtsc_memory.h.

7.80.4.4 void support_exclusive (bool exclusive)

Set whether or not exlusive access requests are supported. Note: Calling this method when
xtsc_memory_parms "exclusive_script_file" is defined has no useful effect and results in a
warning.

7.80.4.5 void change_clock_period (xtsc::u32 clock_period_factor)

Method to change the clock period.

Parameters:
clock_period_factor Specifies the new length of this device’s clock period expressed
in terms of the SystemC time resolution (from sc_get_time_resolution()).

7.80.4.6 void execute (const std::string & cmd_line, const std::vector< std::string
> & words, const std::vector< std::string > & words_lc, std::ostream &
result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:

change_clock_period <ClockPeriodFactor>
Call xtsc_memory::change_clock_period(<ClockPeriodFactor>). Return previous
<ClockPeriodFactor> for this device.

dump <StartAddress> <NumBytes>

Dump <NumBytes> of memory starting at <StartAddress> (includes header and
printable ASCII column).

dump_exclusive_monitors
Dump all exclusive monitors, one per line, with format:
<TranID>:<AddressBeg>-<AddressEnd>

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dump_filtered_request
Dump the most recent previous xtsc_request that passed a xtsc_request
watchfilter.

dump_filtered_response
Dump the most recent previous xtsc_response that passed a xtsc_response
watchfilter.

get_exclusive_monitors_count
Return the number of exclusive monitors currently active.

get_total_exclusive_monitors_created
Return the total number of exclusive monitors created so far in the simulation.

peek <StartAddress> <NumBytes>

Peek <NumBytes> of memory starting at <StartAddress>.

poke <StartAddress> <NumBytes> <Byte1> <Byte2> . . . <ByteN>

Poke <NumBytes> (=N) of memory starting at <StartAddress>.

reset [<Hard>]
Call xtsc_memory::reset(<Hard>). Where <Hard> is 0|1 (default 0).

support_exclusive [<Exclusive>]
Call xtsc_memory::support_exclusive(<Exclusive>), where <Exclusive> is 0|1, or
return xtsc_memory::m_support_exclusive.

watchfilter_add <FilterName> <EventName>

Calls xtsc_memory::watchfilter_add(<FilterName>, <Event>) and returns the
watchfilter number. <EventName> can be a hyphen (-) to mean the last event
created by the xtsc_event_create command.

watchfilter_dump
Return xtsc_memory::watchfilter_dump().

watchfilter_remove <Watchfilter> | *
Return xtsc_memory::watchfilter_remove(<Watchfilter>). An * removes all
watchfilters.

Implements xtsc_command_handler_interface.
Reimplemented in xtsc_cache, and xtsc_dma_engine.

7.80.4.7 void connect (xtsc_arbiter & arbiter, xtsc::u32 port_num = 0)

Connect an xtsc_arbiter with this xtsc_memory. This method connects the master port pair
of the specified xtsc_arbiter with the specified slave port pair of this xtsc_memory.

Parameters:
arbiter The xtsc_arbiter to connect with this xtsc_memory.
port_num The slave port pair of this memory to connect the xtsc_arbiter with.

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7.80.4.8 xtsc::u32 connect (xtsc::xtsc_core & core, const char ∗

memory_port_name, xtsc::u32 port_num = 0, bool single_connect =
false)

Connect an xtsc_core with this xtsc_memory. This method connects the specified memory
interface master port pair of the specified xtsc_core with the specified slave port pair of this
xtsc_memory.

Parameters:
core The xtsc::xtsc_core to connect with this xtsc_memory.
memory_port_name The name of the memory interface master port pair of the xtsc_-
core to connect with this xtsc_memory.
port_num The slave port pair of this xtsc_memory to connect the xtsc_core with.
single_connect If true only one slave port pair of this memory will be connected. If
false, the default, and if memory_port_name names the first port of an uncon-
nected multi-ported interface of core and if port_num is 0 and if the number of
ports this memory has matches the number of multi-ports in the core interface,
then all master port pairs of the core interface specified by memory_port_name
will be connected to the slave port pairs of this xtsc_memory.

Returns:
number of ports that were connected by this call (1 or 2)

7.80.4.9 void connect (xtsc_dma_engine & dma, xtsc::u32 port_num = 0)

Connect an xtsc_dma_engine with this xtsc_memory. This method connects the master
port pair of the specified xtsc_dma_engine with the specified slave port pair of this xtsc_-
memory.

Parameters:
dma The xtsc_dma_engine to connect with this xtsc_memory.
port_num The slave port pair of this memory to connect the xtsc_dma_engine with.

7.80.4.10 void connect (xtsc_master & master, xtsc::u32 port_num = 0)

Connect an xtsc_master with this xtsc_memory. This method connects the master port
pair of the specified xtsc_master with the specified slave port pair of this xtsc_memory.

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Parameters:
master The xtsc_master to connect with this xtsc_memory.
port_num The slave port pair of this memory to connect the xtsc_master with.

7.80.4.11 xtsc::u32 connect (xtsc_memory_trace & memory_trace, xtsc::u32

trace_port = 0, xtsc::u32 port_num = 0, bool single_connect = false)

Connect an xtsc_memory_trace with this xtsc_memory. This method connects the speci-
fied master port pair of the upstream xtsc_memory_trace with the specified slave port pair
of this xtsc_memory.

Parameters:
memory_trace The xtsc_memory_trace to connect with this xtsc_memory.
trace_port The master port pair of the xtsc_memory_trace to connect with this xtsc_-
memory.
port_num The slave port pair of this memory to connect the xtsc_memory_trace with.
single_connect If true only one slave port pair of this memory will be connected. If
false, the default, then all contiguous, unconnected slave port pairs of this mem-
ory starting at port_num that have a corresponding existing master port pair in
memory_trace (starting at trace_port) will be connected with that corresponding
memory_trace master port pair.

Returns:
number of ports that were connected by this call (1 or more)

7.80.4.12 xtsc::u32 connect (xtsc_pin2tlm_memory_transactor & pin2tlm,

xtsc::u32 tran_port = 0, xtsc::u32 port_num = 0, bool single_connect =
false)

Connect an xtsc_pin2tlm_memory_transactor with this xtsc_memory. This method con-

nects the specified TLM master port pair of the specified xtsc_pin2tlm_memory_transactor
with the specified slave port pair of this xtsc_memory.

Parameters:
pin2tlm The xtsc_pin2tlm_memory_transactor to connect with this xtsc_memory.
tran_port The xtsc_pin2tlm_memory_transactor TLM master port pair to connect with
this xtsc_memory.

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port_num The slave port pair of this xtsc_memory to connect the xtsc_pin2tlm_-
memory_transactor with.
single_connect If true only one slave port pair of this xtsc_memory will be connected.
If false, the default, then all contiguous, unconnected slave port pairs of this xtsc_-
memory starting at port_num that have a corresponding existing TLM master port
pair in pin2tlm (starting at tran_port) will be connected with that corresponding
pin2tlm master port pair.

7.80.4.13 void connect (xtsc_router & router, xtsc::u32 router_port, xtsc::u32

port_num = 0)

Connect an xtsc_router with this xtsc_memory. This method connects the specified master
port pair of the specified xtsc_router with the specified slave port pair of this xtsc_memory.

Parameters:
router The xtsc_router to connect with this xtsc_memory.
router_port The xtsc_router master port pair to connect with this xtsc_memory.
port_num The slave port pair of this xtsc_memory to connect the xtsc_router with.

7.80.4.14 xtsc::u32 watchfilter_add (const std::string & filter_name,

sc_core::sc_event & event)

Add a watchfilter on peeks, pokes, requests, or responses.

Parameters:
filter_name The filter instance name. The actual xtsc::xtsc_filter object will be ob-
tained via a call to xtsc::xtsc_filter_get. Its kind must be one of "xtsc_peek",
"xtsc_poke", "xtsc_request", or "xtsc_response".
event The sc_event to notify when a nb_peek, nb_poke, nb_request, or nb_response
(as appropriate) occurs whose payload and port passes the filter.

Returns:
the watchfilter number (use to remove the watchfilter).

See also:
watchfilter_remove
xtsc::xtsc_filter
xtsc::xtsc_filter_get

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7.80.4.15 void watchfilter_dump (std::ostream & os = std::cout)

Dump a list of all watchfilters applied to this xtsc_memory instance.

Parameters:
os The ostream object to which the watchfilters should be dumped.

See also:
watchfilter_add
xtsc::xtsc_filter

7.80.4.16 xtsc::u32 watchfilter_remove (xtsc::u32 watchfilter)

Remove the specified watchfilter or all watchfilters.

Parameters:
watchfilter The number returned from a previous call to watchfilter_add. A -1
(0xFFFFFFFF) means to remove all watchfilters on this xtsc_memory instance.

Returns:
the number (count) of watchfilters removed.

See also:
watchfilter_add
xtsc::xtsc_filter

7.80.4.17 void setup_false_error_responses (xtsc::xtsc_response::status_t status,

xtsc::u32 request_mask, xtsc::u32 fail_percentage)

This method can be used to control the sending of false error responses (for example, to
test the upstream memory interface master device’s handling of them).

Parameters:
status see "fail_status" in xtsc_memory_parms.
request_mask see "fail_request_mask" in xtsc_memory_parms.
fail_percentage see "fail_percentage" in xtsc_memory_parms.

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7.80.4.18 bool compute_special_response (const xtsc::xtsc_request & request,

xtsc::u32 port_num, xtsc::xtsc_response::status_t & status, bool & list,
xtsc::u32 & type)

Determine if the specified request should get a special response and also compute type.

Parameters:
request The xtsc_request object.
port_num The slave port number the request came in on.
status Reference in which to return the response status based on the "script_file".
Even if this is RSP_OK, the request might still get an error response due to a real
error.
list Reference in which to return list flag to indicate BLOCK_READ and BURST_-
READ responses should set their status according to response list.
type Reference in which to return the request type: 0=READ, 1=BLOCK_READ,
2=RCW, 3=WRITE, 4=BLOCK_WRITE

Returns:
true if this request matches up with one of the address lists.

7.80.4.19 xtsc::xtsc_response::status_t get_status_for_testing_failures

(request_info ∗ p_request_info, xtsc::u32 port_num, bool & list)
[protected]

Return response status for testing purposes.

Parameters:
list Use response list for status instead of the return value.

7.80.4.20 bool get_addresses (xtsc::u32 index, const std::string

& argument_name, xtsc::xtsc_address & low_address,
xtsc::xtsc_address & high_address) [protected]

Method to convert an address or address range string into a pair of numeric addresses.
An address range must be specified without any spaces. For example, 0x80000000-
0x8FFFFFFF.

Parameters:
index The index of the string in m_words[].

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argument_name The name of the argument being converted. This name is from the
"script_file" line format documentation.
low_address The converted low address.
high_address If the string is an address range then this is the converted high address.
Otherwise, this is equal to low_address.

Returns:
true if the string is an address range.

7.80.4.21 void load_initial_values () [inline, protected]

Helper function to initialize memory contents.

See also:
xtsc::xtsc_memory_b::load_initial_values

Definition at line 1854 of file xtsc_memory.h.

The documentation for this class was generated from the following file:

• xtsc_memory.h

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7.81 xtsc_memory_b Class Reference

Class for a memory model.

#include <xtsc/xtsc_memory_b.h>Inheritance diagram for xtsc_memory_b:

xtsc_memory_b

xtsc_memory_base

Collaboration diagram for xtsc_memory_b:

xtsc_script_file

m_p_initial_value_file

xtsc_memory_b

Public Member Functions

• xtsc_memory_b (const char ∗name, const char ∗kind, xtsc::u32 byte_width, xtsc::u32
start_byte_address, xtsc::u32 memory_byte_size, xtsc::u32 page_byte_size, const
char ∗initial_value_file, xtsc::u8 memory_fill_byte, bool host_shared_memory=false,
bool host_mutex=false, const char ∗shared_memory_name=NULL)
Constructor for an xtsc_memory_b.

• virtual ∼xtsc_memory_b (void)

The destructor.

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• void peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗buffer)

Non-hardware reads (for example, reads by the debugger).

• void poke (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8 ∗buffer)

Non-hardware writes (for example, writes from the debugger).

• void byte_dump (xtsc::xtsc_address address8, xtsc::u32 size8, std::ostream

&os=std::cout, bool left_to_right=true, xtsc::u32 bytes_per_line=16, bool show_-
address=true, bool show_hex_values=true, bool do_column_heading=true, bool
show_ascii_values=true, bool adjust_address=true)
This method dumps the specified number of bytes from the memory.

• void load_initial_values ()
Method to initialize memory contents.

• xtsc::u32 get_page (xtsc::xtsc_address address8)

Get the page of memory containing address8 (allocate as needed).

• xtsc::u32 get_page_id (xtsc::xtsc_address address8) const

Get the page of storage corresponding to the specified address.

• xtsc::u32 get_page_offset (xtsc::xtsc_address address8) const

Get the offset into the page of storage corresponding to the specified address.

• const std::string & get_shared_memory_name () const

Return the host OS shared memory name (will be empty unless host_shared_memory was
true).

• void lock (xtsc::xtsc_address address8)

Lock the memory.

• void unlock (xtsc::xtsc_address address8)

Unlock the memory.

• virtual xtsc::u8 read_u8 (xtsc::xtsc_address address8)

Helper method to read a u8 value (allocate as needed).

• virtual void write_u8 (xtsc::xtsc_address address8, xtsc::u8 value)

Helper method to write a u8 value (allocate as needed).

• virtual xtsc::u32 read_u32 (xtsc::xtsc_address address8, bool big_endian=false)

Helper method to read a u32 value (allocate as needed).

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• virtual void write_u32 (xtsc::xtsc_address address8, xtsc::u32 value, bool big_-

endian=false)
Helper method to write a u32 value (allocate as needed).

Public Attributes

• std::string m_name
The hierarchical name of the module using this memory.

• std::string m_kind
The kind of module using this memory.

• xtsc::xtsc_address m_start_address8
The starting byte address of this memory.

• xtsc::u64 m_size8
The byte size of this memory.

• xtsc::u32 m_width8
The byte width of this memories data interface.

• xtsc::xtsc_address m_end_address8
The ending byte address of this memory.

• xtsc::xtsc_address m_page_offset_mask
Mask for getting the page offset mask.

• xtsc::u32 m_num_pages
The number of pages in this memory.

• xtsc::u8 ∗∗ m_page_table
The page table for this memory.

• std::string m_initial_value_file
The name of the optional file containing initial values.

• xtsc::xtsc_script_file ∗ m_p_initial_value_file
Pointer to the optional initial value file object.

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• xtsc::u8 m_memory_fill_byte
Uninitialized memory has this value.

• log4xtensa::TextLogger & m_text

Text logger.

• log4xtensa::BinaryLogger & m_binary

Binary logger.

• bool m_log_data_binary
True if transaction data should be logged by m_binary.

• xtsc::u64 m_page_size8
Memory page size for allocation - must be a power of 2.

• xtsc::u32 m_page_size8_log2
Log base 2 of memory page size.

• bool m_host_shared_memory
Create host OS shared memory for each page.

• bool m_host_mutex
Create and use a xtsc_host_mutex object for this memory.

• std::string m_shared_memory_name
Host OS shared memory name.

• xtsc::xtsc_host_mutex ∗ m_p_host_mutex
Mutex object for the shared memory.

7.81.1 Detailed Description

Class for a memory model. This class contains a lot of common code that can be used by
either a TLM or pin-level memory model.

See also:
xtsc_memory
xtsc_memory_pin

Definition at line 32 of file xtsc_memory_b.h.

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7.81.2 Constructor & Destructor Documentation

7.81.2.1 xtsc_memory_b (const char ∗ name, const char ∗ kind, xtsc::u32

byte_width, xtsc::u32 start_byte_address, xtsc::u32 memory_byte_size,
xtsc::u32 page_byte_size, const char ∗ initial_value_file, xtsc::u8
memory_fill_byte, bool host_shared_memory = false, bool host_mutex
= false, const char ∗ shared_memory_name = NULL)

Constructor for an xtsc_memory_b.

Parameters:
name The hierarchical name of the sc_module using this memory model.
kind The kind the sc_module using this memory model.
byte_width See "byte_width" in xtsc_memory_parms
start_byte_address See "start_byte_address" in xtsc_memory_parms.
memory_byte_size See "memory_byte_size" in xtsc_memory_parms.
page_byte_size See "page_byte_size" in xtsc_memory_parms. Ignored when
"host_shared_memory" is true.
initial_value_file See "initial_value_file" in xtsc_memory_parms. Must be NULL
when "host_shared_memory" is true.
memory_fill_byte See "memory_fill_byte" in xtsc_memory_parms. Ignored when
"host_shared_memory" is true.
host_shared_memory True if host OS shared memory should be used for the back-
ing store of this memory instance.
host_mutex True if a host OS level mutex (xtsc_host_mutex) should be made for the
shared memory. The xtsc_memory_b class will take care of lock and unlock dur-
ing calls to its poke, write_u8, and write_u32 methods. The xtsc_memory_b client
is responsible for calling lock() and unlock() if it modifies memory directly and for
PIF RCW and PIF/AXI exclusive activity. If this parameter is true, then atomic
access addresses should be in Xtensa’s uncached space and atomic accesses
must always occur in pairs (RCW1/RCW2 pair or exclusive read/write pair). Note:
Host mutex support in XTSC is an experimental feature.
shared_memory_name Name to used for the host shared memory. If NULL or empty,
then the default name will be used.

7.81.3 Member Function Documentation

7.81.3.1 void peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗

buffer)

Non-hardware reads (for example, reads by the debugger).

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See also:
xtsc::xtsc_request_if::nb_peek

7.81.3.2 void poke (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8

∗ buffer)

Non-hardware writes (for example, writes from the debugger).

See also:
xtsc::xtsc_request_if::nb_poke

7.81.3.3 void byte_dump (xtsc::xtsc_address address8, xtsc::u32 size8,

std::ostream & os = std::cout, bool left_to_right = true, xtsc::u32
bytes_per_line = 16, bool show_address = true, bool show_hex_values =
true, bool do_column_heading = true, bool show_ascii_values = true,
bool adjust_address = true)

This method dumps the specified number of bytes from the memory. Each line of output is
divided into three columnar sections, each of which is optional. The first section contains
an address. The second section contains a hex dump of some (possibly all) of the data
(two hex nibbles and a space for each byte from the memory). The third section contains
an ASCII dump of the same data.

Parameters:
address8 The starting byte address in memory.
size8 The number of bytes of data to dump.
os The ostream object to which the data is to be dumped.
left_to_right If true, the data is dumped in the order: memory[0], memory[1],
..., memory[bytes_per_line-1]. If false, the data is dumped in the order:
memory[bytes_per_line-1], memory[bytes_per_line-2], ..., memory[0].
bytes_per_line The number of bytes to dump on each line of output. If bytes_per_line
is 0 then all size8 bytes are dumped on a single line with no newline at the end. If
bytes_per_line is non-zero, then all lines of output end in newline.
show_address If true, the first columnar section contains an address printed as an
8-hex-digit number with a 0x prefix. If false, the first columnar section is null and
takes no space in the output.
show_hex_values If true, the second (middle) columnar section of hex data values
is printed. If false, the second columnar section is null and takes no space in the
output.

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do_column_heading If true, print byte position column headings over the hex val-
ues section. If false, no column headings are printed. If show_hex_values is
false, then the do_column_heading value is ignored and no column headings are
printed.

show_ascii_values If true, the third (last) columnar section of ASCII data values is
printed (if an ASCII value is a non-printable character a period is printed). If
show_ascii_values is false, the third columnar section is null and takes no space
in the output.

adjust_address If adjust_address is true and address8 modulo bytes_per_line is not

0, then offset the printed values on the first line of the hex and ASCII colum-
nar sections and adjust the printed address so that the printed address modulo
bytes_per_line is always zero. Otherwize, do not offset the first printed data val-
ues and do not adjust the printed address.

7.81.3.4 void load_initial_values ()

Method to initialize memory contents. If host_shared_memory was false this method

sets the contents of all currently allocated memory pages (if any) to the value defined
by "memory_fill_byte" and then loads the values from "initial_value_file". If host_shared_-
memory was true this method returns without doing anything.

7.81.3.5 void lock (xtsc::xtsc_address address8)

Lock the memory. An exception is thrown if either host_shared_memory or host_mutex

was false.
Note: When host_mutex is true, lock() and unlock() methods are used by xtsc_memory_-
b clients to lock the shared memory. For normal writes and pokes, the shared memory
should be locked just long enough to perform the modification. For atomic accesses, the
memory has to be locked for the extended period of time of the atomic access. Specifically,
for PIF RCW access the memory should be locked upon receipt of the 1st RCW beat
and unlocked upon completion of the 2nd RCW beat. For a PIF/AXI exclusive access
sequence, the memory should be locked upon receipt of the exclusive read and unlocked
upon completion of the exclusive write.
Warning: System deadlock will probably occur if an atomic access pair is not completed.
For example, if RCW1 is issued without RCW2 (forbidden by PIF protocol) or if an exclusive
read is not followed by an exclusive write (allowed by AXI but not supported when using
host_mutex).

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7.81.3.6 void unlock (xtsc::xtsc_address address8)

Unlock the memory. An exception is thrown if either host_shared_memory or host_mutex

was false.

See also:
lock()

The documentation for this class was generated from the following file:

• xtsc_memory_b.h

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7.82 xtsc_memory_base Class Reference

Inheritance diagram for xtsc_memory_base:

xtsc_memory_b

xtsc_memory_base

Collaboration diagram for xtsc_memory_base:

xtsc_script_file

m_p_initial_value_file

xtsc_memory_b

xtsc_memory_base

Public Member Functions

• xtsc_memory_base (const char ∗name, const char ∗kind, xtsc::u32 byte_width,

xtsc::u32 start_byte_address, xtsc::u32 memory_byte_size, xtsc::u32 page_byte_-
size, const char ∗initial_value_file, xtsc::u8 memory_fill_byte)

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7.82.1 Detailed Description

Definition at line 20 of file xtsc_memory_base.h.

The documentation for this class was generated from the following file:

• xtsc_memory_base.h

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7.83 xtsc_memory_parms Class Reference

Constructor parameters for a xtsc_memory object.

#include <xtsc/xtsc_memory.h>Inheritance diagram for xtsc_memory_parms:

xtsc_parms

xtsc_memory_parms

xtsc_cache_parms xtsc_dma_engine_parms

Collaboration diagram for xtsc_memory_parms:

xtsc_parms

xtsc_memory_parms

Public Member Functions

• xtsc_memory_parms (xtsc::u32 width8=4, xtsc::u32 delay=0, xtsc::u32 start_-

address8=0, xtsc::u32 size8=0, xtsc::u32 num_ports=1)
Constructor for an xtsc_memory_parms object.

• xtsc_memory_parms (const xtsc::xtsc_core &core, const char ∗port_name, xtsc::u32

delay=0xFFFFFFFF, xtsc::u32 num_ports=0)

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Constructor for an xtsc_memory_parms object based upon an xtsc_core object and a

named memory interface.

• void init (xtsc::u32 width8=4, xtsc::u32 delay=0, xtsc::u32 start_address8=0,

xtsc::u32 size8=0, xtsc::u32 num_ports=1)
Do initialization common to both constructors.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

7.83.1 Detailed Description

Constructor parameters for a xtsc_memory object. This class contains the constructor
parameters for an xtsc_memory object.

Name Type Description

------------------ ---- -------------------------------------------------------

"num_ports" u32 The number of slave port pairs this memory has. This
defines how many memory interface master devices will be
connected with this memory. It is allowed to set this
parameter to 0 if no "hardware" memory interfaces are
desired (for example, if the xtsc_memory is only going
to be accessed using XTSC command facility commands or
direct calls to xtsc_memory API's that do not go through
an sc_port).
Default = 1.
Minimum = 0.

"byte_width" u32 Memory data interface width in bytes. Valid values are
0, 4, 8, 16, 32, and 64. A value of 0 indicates that this
memory supports all of the valid data interface widths.
This can be useful, for example, to model a memory that
is connected to multiple Xtensa cores that do not all
have the same PIF data interface width.
Default = 4.

"start_byte_address" u32 The starting byte address of this memory in the 4GB
address space.
Default = 0x00000000.

"memory_byte_size" u32 The byte size of this memory. 0 means the memory
occupies all of the 4GB address space at and above
"start_byte_address".
Default = 0.

"clock_period" u32 This is the length of this memory's clock period

expressed in terms of the SystemC time resolution
(from sc_get_time_resolution()). A value of
0xFFFFFFFF means to use the XTSC system clock

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period (from xtsc_get_system_clock_period()).

A value of 0 means one delta cycle.
Default = 0xFFFFFFFF (i.e. use the system clock
period).

"request_fifo_depth" u32 The request FIFO depth (i.e. how many entries it has).
Note: A request transfer (a beat) takes one entry in the
FIFO. Single WRITE, single READ, BLOCK_READ, and
BURST_READ transactions each have a single request
transfer and take up only 1 entry in the FIFO. A
BLOCK_WRITE transaction has N=2|4|8|16 request transfers
and takes up to N entries in the FIFO (how many entries
in the FIFO a given BLOCK_WRITE transaction sequence
actually takes depends upon the memory timing parameters
and the arrival times of the transfers). BURST_WRITE
transactions work similar to BLOCK_WRITE transactions.
Note: A request transfer that arrives while the request
FIFO is full will receive an RSP_NACC.
Default = 2.
Minimum = 1.

"write_responses" bool If true, an RSP_OK write response will be sent after a

WRITE, BLOCK_WRITE, or BURST_WRITE request is received
with its last transfer flag set. If false, write
responses of RSP_OK will not be sent.
Default = true.

"check_alignment" bool If true, requests whose address is not size-aligned or

whose size is not a power of 2 will get an
RSP_ADDRESS_ERROR response. If false, this check is not
performed.
Default = false (don't check alignment).

"delay_from_receipt" bool If false, the following delay parameters apply from

the start of processing of the request (i.e. after
all previous requests have been responded to). This
models a memory that can only service one request
at a time. If true, the following delay parameters
apply from the time of receipt of the request. This
more closely models a memory with pipelining; however,
requests are always completed (i.e. the response(s)
is/are sent) in the order that their corresponding
requests were received.
Default = true.

"recovery_time" u32 If "delay_from_receipt" is true, this specifies the

minimum number of clock periods after a response is
sent (except for non-last BLOCK_READ responses) or a
first RCW is handled or a non-last BLOCK_WRITE is
handled before the next response will be sent or the
next BLOCK_WRITE will be handled ("block_read_repeat"
is used in lieu of "recovery_time" to specify the
delay between consecutive BLOCK_READ responses to
the same BLOCK_READ request). If "delay_from_receipt"
is false, this parameter is ignored.
Default = 1.

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"read_delay" u32 If "delay_from_receipt" is false, the number of clock

periods between starting to process a READ request and
sending xtsc::xtsc_response. If "delay_from_receipt" is
true, the minimum number of clock periods between receipt
of a READ request and sending xtsc::xtsc_response.
Default = As specified by delay argument to constructor.

"block_read_delay" u32 If "delay_from_receipt" is false, the number of clock

periods between starting to process a BLOCK_READ request
and sending the first xtsc::xtsc_response. If
"delay_from_receipt" is true, the minimum number of
clock periods between receipt of a BLOCK_READ request
and sending the first xtsc::xtsc_response.
Default = As specified by delay argument to constructor.

"block_read_repeat" u32 Number of clock periods between each BLOCK_READ response.

Default = 1.

"burst_read_delay" u32 If "delay_from_receipt" is false, the number of clock

periods between starting to process a BURST_READ request
and sending the first response. If "delay_from_receipt"
is true, the minimum number of clock periods between
receipt of a BURST_READ request and sending the first
response. This parameter is ignored unless
"memory_interface" is "PIF".
Default = As specified by delay argument to constructor.

"burst_read_repeat" u32 Number of clock periods between each BURST_READ response.

This parameter is ignored unless "memory_interface" is
"PIF".
Default = 1.

"rcw_repeat" u32 If "delay_from_receipt" is false, the minimum number of

clock periods between starting to process the first RCW
request and starting to process the second RCW request.
If "delay_from_receipt" is true, the minimum number of
clock periods between receipt of the first RCW request
and starting to process the second RCW request.
Default = 1.

"rcw_response" u32 If "delay_from_receipt" is false, the number of clock

periods between starting to process the second RCW
request and sending the xtsc::xtsc_response. If
"delay_from_receipt" is true, the minimum number of
clock periods between receipt of the second RCW
request and sending the xtsc::xtsc_response.
Default = As specified by delay argument to constructor.

"write_delay" u32 If "delay_from_receipt" is false, the number of clock

periods between starting to process a WRITE request
and sending xtsc::xtsc_response. If "delay_from_receipt"
is true, the minimum number of clock periods between
receipt of a WRITE request and sending xtsc::xtsc_response.
Default = As specified by delay argument to constructor.

"block_write_delay" u32 If "delay_from_receipt" is false, the number of clock

periods to process the first BLOCK_WRITE request of a

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sequence. If "delay_from_receipt" is true, the minimum

number of clock periods between receipt of the first
BLOCK_WRITE request and processing it.
Default = As specified by delay argument to constructor.

"block_write_repeat" u32 If "delay_from_receipt" is false, the minimum number

of clock periods between starting to process a
BLOCK_WRITE request (except the first or last one)
and starting to process the following BLOCK_WRITE
request. If "delay_from_receipt" is true, the
minimum number of clock periods between receipt of
a BLOCK_WRITE request (except the first or last one)
and starting to process the following BLOCK_WRITE
request.
Default = As specified by delay argument to constructor.

"block_write_response" u32 If "delay_from_receipt" is false, the number of clock

periods between starting to process the last
BLOCK_WRITE request and sending the xtsc::xtsc_response.
If "delay_from_receipt" is true, the minimum number
of clock periods between receipt of the last
BLOCK_WRITE request and sending the xtsc::xtsc_response.
Default = As specified by delay argument to constructor.

"burst_write_delay" u32 If "delay_from_receipt" is false, the minimum number

of clock periods between starting to process the first
BURST_WRITE request and starting to process the second
BURST_WRITE request. If "delay_from_receipt" is true,
the minimum number of clock periods between receipt
of the first BURST_WRITE request and starting to
process the second BURST_WRITE request. This parameter
is ignored unless "memory_interface" is "PIF".
Default = As specified by delay argument to constructor.

"burst_write_repeat" u32 If "delay_from_receipt" is false, the minimum number

of clock periods between starting to process a
BURST_WRITE request (except the first or last one)
and starting to process the following BURST_WRITE
request. If "delay_from_receipt" is true, the
minimum number of clock periods between receipt of
a BURST_WRITE request (except the first or last one)
and starting to process the following BURST_WRITE
request. This parameter is ignored unless
"memory_interface" is "PIF".
Default = As specified by delay argument to constructor.

"burst_write_response" u32 If "delay_from_receipt" is false, the number of clock

periods between starting to process the last BURST_WRITE
request and sending the response. If
"delay_from_receipt" is true, the minimum number of
clock periods between receipt of the last BURST_WRITE
request and sending the response. This parameter is
ignored unless "memory_interface" is "PIF".
Default = As specified by delay argument to constructor.

"response_repeat" u32 The number of clock periods after a response is sent

and rejected before the response will be resent. A

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value of 0 means one delta cycle.

Default = 1.

"immediate_timing" bool If true, the above delays parameters are ignored and
the memory model responds to all requests immediately
(without any delay--not even a delta cycle). If false,
the above delay parameters are used to determine
response timing.
Note: Setting this parameter to true typically will not
work on configs that issue BLOCK_READ requests because
the ISS does not support getting multiple responses in
the same clock period.
Default = false.

"page_byte_size" u32 The byte size of a page of memory. A page of memory in

the model is not allocated until it is accessed. This
parameter specifies the page allocation size.
Default is 16 Kilobytes (1024*16=16384=0x4000).
Minimum page size is 16*byte_width (or 256 if
"byte_width" is 0).
Note: "page_byte_size" must be a power of 2.
Note: "page_byte_size" should evenly divide
"start_byte_address".
Note: "page_byte_size" does not apply when
"host_shared_memory" is true.
Default = 16384 (16KB).

"initial_value_file" char* If not NULL or empty, this names a text file from which
to read the initial memory contents as byte values.
Note: "initial_value_file" should not be set when
"host_shared_memory" is true.
Default = NULL.
The text file format is:

([@<Offset>] <Value>*)*

1. Any number (<Offset> or <Value>) can be in decimal

or hexadecimal (using '0x' prefix) format.
2. @<Offset> is added to "start_byte_address".
3. <Value> cannot exceed 255 (0xFF).
4. If a <Value> entry is not immediately preceeded in
the file by an @<Offset> entry, then its offset is
one greater than the preceeding <Value> entry.
5. If the first <Value> entry in the file is not
preceeded by an @<Offset> entry, then its offset
is zero.
6. Comments, extra whitespace, and blank lines are
ignored. See xtsc::xtsc_script_file.

Example text file contents:

0x01 0x02 0x3 // First three bytes of the memory,

// 0x01 is at "start_byte_address"
@0x1000 50 // The byte at offset 0x1000 is 50
51 52 // The byte at offset 0x1001 is 51
// The byte at offset 0x1002 is 52

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"memory_fill_byte" u32 The low byte specifies the value used to initialize
memory contents at address locations not initialize
from "initial_value_file".
Note: "memory_fill_byte" does not apply when
"host_shared_memory" is true.
Default = 0.

"host_shared_memory" bool If true the backing store for this memory will be host
OS shared memory (created using shm_open() on Linux and
CreateFileMapping() on MS Windows). If this parameter
is true then "page_byte_size", "memory_fill_byte", and
"initial_value_file" do not apply and should be left at
their default value. If desired, a Lua script can be
used to initialize memory contents. See
"lua_script_file_eoe" in xtsc:xtsc_initialize_parms.
Default = false.

"shared_memory_name" char* The shared memory name to use when creating host OS
shared memory. If this parameter is left at its default
setting of NULL, then the default name will be formed by
concatenating the user name, a period, and the module
instance hierarchical name. For example:
MS Windows: joeuser.myshmem
Linux: /dev/shm/joeuser.myshmem
This parameter is ignored if "host_shared_memory" is
false.
Default = NULL (use default shared memory name)

"host_mutex" bool If true then the host OS shared memory will

have a host OS level mutex which will be locked
during PIF RCW and PIF/AXI exclusive sequences and
during each poke and write call. This parameter is
ignored if "host_shared_memory" is false.
Default = false.

Caution: To avoid potential deadlock situations, Cadence recommends that each OS

process have at most one host OS level mutex. This means at most one xtsc_memory
instance with this parameter set true.

Note: For performance reasons, it is best to have the smallest memory possible
protected by a host OS level mutex. If a larger shared memory is required, this can
be accomplished by modelling the single large shared memory in XTSC as two separate
xtsc_memory instances, both with shared memory enabled but only one of them with
"host_mutex" set to true. All used memory addresses protected by hardware
synchronization (PIF RCW or PIF/AXI exclusive) should be located within the single
small mutex-enabled memory. An xtsc_router with its "immediate_timing" parameter
set to true can be used to combine the two xtsc_memory instances.

Note: Cadence recommends that "allow_fast_access" be set to false whenever

"host_mutex" is true.

Note: Host mutex support in XTSC is an experimental feature.

"log_user_data_bytes" u32 Number of bytes of user data to log using the

xtsc::xtsc_request::get_user_data_for_logging() method.
Default = 0.

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"read_only" bool If true this memory model represents a ROM which

does not support WRITE, BLOCK_WRITE, and RCW
transactions. Use "initial_value_file" to initialize
the ROM. The nb_poke() method may also be used to
initialize or change the ROM contents.
Default = false.

"support_exclusive" bool If true this memory model supports exclusive access

requests. If false it does not support them (it
ignores the exclusve access flag in the request).
This parameter is effectively ignored if
"exclusive_script_file" is defined.
Default = true.

"use_fast_access" bool If true, this memory will support fast access

for the turboxim simulation engine.
Default = true.

"deny_fast_access" vector<u32> A std::vector containing an even number of

addresses. Each pair of addresses specifies a range of
addresses that will be denied fast access. The first
address in each pair is the start address which should
always correspond to the start of a bus width and the
second address in each pair is the end address which
should always correspond to the end of a bus width.
Default = <empty>

"fast_access_size" vector<u32> This parameter is a std::vector containing a

multiple of 3 numbers. It is used to limit fast access
granularity of granted blocks for testing purposes.
The first number in each triplet is the start address.
The second number in each triplet is the end address.
The third number in each triplet is the fast access
granularity. The granularity must be an integer
multiple of the bus width as defined by "byte_width".
The start address must be an integer multiple of the
granularity. The end address plus 1 must be an integer
multiple of the granularity.
Default = <empty>

"use_raw_access" bool If "use_fast_access" is true, then when this parameter

is true the memory will give direct raw pointer access
to the turboxim simulation engine and when this
parameter is false, one of callback access, custom
callback access, interface access, or peek/poke access
will be used depending on the "use_callback_access",
"custom_callback_access", and "use_interface_access"
parameters.
Default = true.

Note: To use a fast access method other then raw access, set "use_raw_access" to
false, and at most one of "use_callback_access", "use_custom_access", and
"use_interface_access" to true. If all 4 are false, then normal nb_peek/nb_poke
through all upstream devices will be used for fast access. Setting "use_raw_access"
to false is primarily for testing purposes.

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"use_callback_access" bool This parameter is only used if "use_fast_access" is true

and "use_raw_access" is false. In that case, when this
parameter is true then callback access will be used
(the callback methods internally call the xtsc_memory
peek/poke methods but any upstream devices between the
originator and xtsc_memory are bypassed) and when this
parameter is false, one of custom callback access,
interface access, or peek/poke access will be used
depending on the "custom_callback_access" and
"use_interface_access" parameters.
Default = false.
Note: Callback access is not supported for use with
big endian cores.

"use_custom_access" bool This parameter is only used if "use_fast_access" is true

and both "use_raw_access" and "use_callback_access" are
false. In that case, when this parameter is true then
custom callback access will be used (the custom callback
methods internally call the xtsc_memory peek/poke
methods but any upstream devices between the originator
and xtsc_memory are bypassed) and when this parameter is
false, one of interface access or peek/poke access will
be used depending on the "use_interface_access"
parameter.
Default = false.

"use_interface_access" bool This parameter is only used if "use_fast_access" is true

and "use_raw_access", "use_callback_access", and
"use_custom_access" are all three false. In that case,
if this parameter is false then normal nb_peek/nb_poke
through all upstream devices will be used for fast
access and if this parameter is true then interface
access will be used (which internally calls the
peek/poke methods of xtsc_memory but any upstream
devices between the originator and xtsc_memory are
bypassed).
Default = false.

"exclusive_script_file" char* If not NULL or empty, this names a text file from which
exclusive write responses will be read. Each non-empty,
non-comment line must have the following format (where
<value> can be 0 or 1):
<value> [<Address>]
Each time an exclusive WRITE request is received a line
from the file will be read and used in a call to
xtsc_response::set_exclusive(<value>). If <Address> is
specified then it will be checked against the request
address and an exception will be thrown if there is a
mismatch. If the end of the file is reached, processing
will wrap around to the beginning of the file. When the
first transfer of an exclusive BLOCK_WRITE sequence is
received, one line will be read from the file and its
content will control all beats of the BLOCK_WRITE
sequence. Each time an exclusive read request is
received xtsc_response::set_exclusive(1) will be called
and no line will be read from the file. The file is
opened as an xtsc_script_file, so comments, extra

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whitespace, and blank lines are allowed and ignored.

Default = NULL
Note: xtsc_memory::support_exclusive() essentially has
no effect when this parameter is defined.

"script_file" char* An optional file to read scripted responses from.

Normally xtsc_memory, barring an error in a request and
barring requests coming in too fast, performs the
requested action (i.e. it reads or writes the memory)
and responds with an RSP_OK. This script file allows
you to specify other responses. This can be useful for
test scenarios or for causing an RSP_ADDRESS_ERROR
response to be sent to an out-of-bound request instead
of having an exception thrown. You cause non-normal
responses to be given by specifying either a single
address or an address range and the response that goes
with that address or address range and optional port
number and request type. You can also specify the time
frame in which that response applies and how many times
that response is to be given. Multiple single addresses
and multiple address ranges are supported; however, no
overlap is allowed. This script also lets you override
the default user data in the response. Active lines in
this file (that is lines that aren't whitespace or
comments) fall into one of three categories.
1. Response definition lines
2. Debug/logging lines
3. Timing control lines
When a script file is specified, xtsc_memory spawns a
SystemC thread to process it. At the beginning of
simulation this thread starts processing each line in
the script file in sequence up to the first timing
control line (category 3). When the first timing
control line is hit, the thread stops processing the
script file and waits for the time or event implied by
the timing control line. When the time or event implied
by the first timing control line occurs, the thread
resumes processing the script file until the next timing
control line, and so on. A few examples are shown
below.
The supported line formats organized by category are:

Category 1: Response Definition Line Formats:

lowAddr port type status [limit]
lowAddr-highAddr port type status [limit]
CLEAR lowAddr
CLEAR lowAddr-highAddr
CLEAR
USER_DATA length value
USER_DATA * byte ...
USER_DATA
RESPONSE_LIST 0|2 ...
LAST true|false
LUA_FUNCTION luaFunction

Category 2: Debug/Logging Line Formats:

DUMP log_level

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NOTE message
INFO message

Category 3: Timing Control Line Formats:

SYNC time
WAIT duration
WAIT port type match [count]
delay STOP

1. Integers can appear in decimal or hexadecimal (using

'0x' prefix) format.
2. port can be any non-negative integer less then
"num_ports" or it can be an asterisk to indicate any
port (i.e. port number is a don't care).
3. type can be read|block_read|rcw|write|block_write|
burst_read|burst_write or it can be an asterisk to
indicate any request type (i.e. request type is a
don't care).
4. status can be okay|nacc|address_error|data_error|
address_data_error|response_list. Normally, when
a request is received that matches a response
definition line the specified response status is
returned for that request; however, a request that
would have gotten RSP_NACC even without a match
occurring will always get an RSP_NACC (regardless of
the response status specified in the response
definition line). A request that would have gotten
one of the three possible error responses can be
overridden by the script file to get one of the
other two possible error responses or an RSP_NACC
but it cannot be overridden by the script file to
get an RSP_OK. If status is data_error than the
last transfer flag will be set on the response. If
status is response_list, than the status will be
be obtained from RESPONSE_LIST (responses for
BLOCK_READ and BURST_READ requests will be obtained
by cycling through RESPONSE_LIST, the response for
other request types will come from the first entry
in RESPONSE_LIST). Note: A status of okay is used
to count requests (LAST true) or count beats (LAST
false), it cannot be used to force an RSP_OK
response to a non-last transfer of a BLOCK_WRITE or
RCW request (See Example 3 below).
5. limit specifies how many times the specified special
response status is to be given. A limit of 0, the
default, means there is no limit.
6. match can be *|hit|miss. hit means to count the
request if its address is found in the list of
single addresses or in the list of address ranges.
miss means to count the request if its address is
not in either list. An asterisk means to count the
request regardless of whether or not its address is
found in one of the lists (i.e. address matching is
a don't care).
7. count must be greater than 0 and defaults to 1.
8. time, duration, and delay can be any non-negative
integer or floating point number to mean that many

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clock cycles.
9. You can use an asterisk in lieu of lowAddr-highAddr
to indicate all addresses in this memory's address
space.
10. The CLEAR commands cause the specified single address
or address range to be removed from the list of
single addresses or address ranges. CLEAR by itself
clears all single addresses and all address ranges.
Although you can have multiple response definitions
in effect at one time, given an address and a point
in time in the simulation, at most one response
definition can be in effect for that address.
Because of this, the CLEAR command is often used
after one of the timing control lines in order to
remove a response definition for an address before
defining a new response for that address.
11. The "SYNC time" command can be used to cause a wait
until the specified absolute simulation time.
12. The "WAIT duration" command can be used to cause a
wait for duration clock cycles.
13. The "WAIT port request match [count]" command can be
used to cause a wait until count number of requests
of the specified request type and with the specified
match criteria have been received on the specified
port.
14. The "delay STOP" command will call sc_stop() after
delaying delay cycles.
15. The DUMP command will cause a list of all current
single addresses and address ranges that have a
response status defined to be dumped using the
logging facility. log_level can be INFO|NOTE.
16. The USER_DATA commands can be used to override the
default user data in the response. The
"USER_DATA length value" command passes value to
method xtsc_response::set_user_data(value). The
length argument specifies how many bytes are in
value and it must be greater than 0 and not exceed 4
(32-bit simulator) or 8 (64-bit simulator). The
"USER_DATA * byte ..." command, allocates memory for
the number of bytes in "byte ...", populates that
memory with those bytes, and calls set_user_data()
with a pointer to the allocated memory. The
"USER_DATA" command with no arguments, returns to
using the default response user data (that is, the
same user data as came in on the request, if any).
17. The RESPONSE_LIST command can be used to specify a
sequence of responses (0=RSP_OK, 2=RSP_DATA_ERROR).
This list is only used for a response definition
line with a status of response_list and a type of
block_read or burst_read. The initial list contains
16 RSP_DATA_ERROR entries, but these are overwritten
if a RESPONSE_LIST command is encountered. If there
are fewer entries in the list then required for a
particular request, then the missing entries are
assumed to be RSP_OK.
18. The LUA_FUNCTION command can be used to name a Lua
function to be called when a matching request is

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received. The Lua function must be defined in a

#lua_beg/#lua_end block that appears earlier in the
script file. The Lua function should have 5
parameters and return a result (which will be logged
with the function call at INFO log level). The 5
parameters passed to lua_function are:
port - The port number the request was received on.
addr - The address of the request.
type - The string type of the request from
xtsc::xtsc_request::get_type_name().
last - true if last beat of request, else false.
dump - The string output of xtsc_request::dump().
See Example 6 and got_read() below for an example.
19. By default, script_file handling follows the PIF
protocol requirement that a non-RSP_NACC response
is only sent after a request with the last transfer
flag set. This default behaviour can be overriden
by defining the environment variable
XTSC_MEMORY_SCRIPT_FILE_LAST_FALSE or by using the
"LAST false" command. Either of these will allow a
special response to be sent to a request whose last
transfer flag is false (that is, the first request
of an RCW pair of requests or a non-last BLOCK_WRITE
request).
20. The NOTE and INFO commands can be used to cause
the entire line to be logged at NOTE_LOG_LEVEL
or INFO_LOG_LEVEL, respectively.
21. Words are case insensitive.
22. Comments, extra whitespace, blank lines, and lines
between "#if 0" and "#endif" are ignored.
See xtsc_script_file.

Here are some example script file contents for specific

purposes (each example is assumed to be in its own
script file):

// Example 1: RSP_NACC the first 3 READ requests to 0x60001708.

0x60001708 * read nacc 3

// Example 2: Accept the first 2 BLOCK_READ requests in the range of

// 0x60001a00-0x60001aff, then RSP_NACC the next 3 WRITE
// requests to any address.
0x60001a00-0x60001aff * block_read okay
wait * * hit 2
clear
* * write nacc 3

// Example 3: RSP_NACC the second transfer of the first BLOCK_WRITE 2

// times. Note the use of last and okay to count the beats
// of the BLOCK_WRITE.
last false
* * block_write okay
wait * * hit 1
clear
* * block_write nacc 2

// Example 4: Wait for 1000 requests then RSP_NACC the next 2

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wait * * * 1000
note 1000 requests received; the next two will get RSP_NACC
* * * nacc 2

// Example 5: Return RSP_DATA_ERROR for 2nd & 3rd BLOCK_READ response.

// The 1st and 4th response will be RSP_OK. If more than 4
// responses are required then they will also be RSP_OK.
response_list 0 2 2 0
* * BLOCK_READ response_list
wait * * hit
clear

// Example 6: Call a Lua function called got_read() when a READ to

// address 0xC0000000 is received. The Lua function changes
// the contents stored at that address to be the number of
// times a read has occurred. When the READ is handled
// (by worker_thread) it will see that value in memory and
// return it in the xtsc_response. In this example, the
// got_read() Lua function assumes the xtsc_memory instance
// name is "sysmem" and ignores the arguments passed to it.
#lua_beg
cnt = 0
function got_read(port, addr, type, last, dump)
cnt = cnt + 1
poke_bytes = xtsc.num_to_poke_bytes(cnt, 4)
xtsc.cmd("sysmem poke 0xC0000000 4 " .. poke_bytes)
return cnt
end
#lua_end
lua_function got_read
0xC0000000 * read okay

Note: The implementation of the "script_file" facility assumes that at most one
request can occur in a single delta cycle. If this is not the case (e.g. when
"num_ports" is greater then 1) the behavior of the "script_file" facility may be
different then what you desire.

"wraparound" bool Specifies what will happen when the end of file (EOF) is
reached on "script_file". When EOF is reached and
"wraparound" is true, "script_file" will be reset to the
beginning of file and the script will be processed
again. When EOF is reached and "wraparound" is false,
the xtsc_memory object will cease processing the script
file itself but response definitions may still remain in
effect.
Default = false.

Note: The following 4 parameters provide another method (besides "script_file") to

cause the memory to generate special responses (RSP_NACC, RSP_ADDRESS_ERROR,
RSP_DATA_ERROR, and RSP_ADDRESS_DATA_ERROR) in order to test the memory
interface master module's handling of error and nacc responses.

Note: Combining the two methods for generating special responses is not supported.
That is, it is not legal for both "script_file" and "fail_request_mask" to be
non-zero.

"fail_status" u32 This specifies which false error response status

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(xtsc::xtsc_response::status_t) will be generated

(RSP_NACC, RSP_ADDRESS_ERROR, RSP_DATA_ERROR, or
RSP_ADDRESS_DATA_ERROR).
Default = RSP_NACC.

"fail_request_mask" u32 Each bit of this mask determines whether a false

error response may be generated for a particular
request type (see xtsc_memory::request_type_t).
If the bit is set (i.e. 1), then the corresponding
request type is a candidate for a false error
response. If the bit is clear (i.e. 0), then
the corresponding request type will not be given
any false error responses. If all bits are 0
(REQ_NONE) then no false error responses will
be generated. If all bits are 1 (REQ_ALL), then
all requests are candidates for a false error
response.
Default = 0x00000000 (i.e. REQ_NONE).

"fail_percentage" u32 This parameter specifies the probability of

a false error response being generated when
a request is received whose corresponding
bit in "fail_request_mask" is set. A value
of 100 causes all requests whose corresponding
bit in "fail_request_mask" is set to receive
a false error response (i.e. 100 percent
receive a false error response). A value of
1 will result in a false error response being
sent approximately 1% of the time. Valid
values are 1 to 100.
Note: This mechanism should not be used on memories with
subbanks that share a single busy signal.
Default = 100.

"fail_seed" u32 This parameter is used to seed the psuedo-random number

generator. Each xtsc_memory instance has its own random
sequence based on its "fail_seed" value. If this
parameter is set to 0 then the "random" numbers
generated by the sequence will all be 0.
Default = 1.

See also:
xtsc_memory
xtsc_memory::request_type_t
xtsc::xtsc_parms
xtsc::xtsc_response
xtsc::xtsc_response::status_t
xtsc::xtsc_script_file

Definition at line 816 of file xtsc_memory.h.

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7.83.2 Constructor & Destructor Documentation

7.83.2.1 xtsc_memory_parms (xtsc::u32 width8 = 4, xtsc::u32 delay = 0, xtsc::u32

start_address8 = 0, xtsc::u32 size8 = 0, xtsc::u32 num_ports = 1)
[inline]

Constructor for an xtsc_memory_parms object. After the object is constructed, the data
members can be directly written using the appropriate xtsc_parms::set() method in cases
where non-default values are desired.

Parameters:
width8 Memory data interface width in bytes.
delay Default delay for read and write in terms of this memory’s clock period (see
"clock_period"). Local memory devices should use a delay of 0 for a 5-stage
pipeline and a delay of 1 for a 7-stage pipeline. PIF memory devices should use
a delay of 1 or more.
start_address8 The starting byte address of this memory.
size8 The byte size of this memory. 0 means the memory occupies all of the 4GB
address space at and above start_address8.
num_ports The number of ports this memory has.

Definition at line 841 of file xtsc_memory.h.

7.83.2.2 xtsc_memory_parms (const xtsc::xtsc_core & core, const char ∗

port_name, xtsc::u32 delay = 0xFFFFFFFF, xtsc::u32 num_ports = 0)

Constructor for an xtsc_memory_parms object based upon an xtsc_core object and a

named memory interface. This constructor will determine width8, delay, start_address8,
size8, and, optionally, num_ports by querying the core object and then pass the values
to the init() method. If port_name is a ROM interface, then "read_only" will be be set to
true. In addition, the "clock_period" parameter will be set to match the core’s clock pe-
riod. For PIF memories, start_address8 and size8 will both be 0 indicating a memory
which spans the entire 4 gigabyte address space, "check_alignment" will be set to true,
and "write_responses" will be set opposite to the core’s "SimPIFFakeWriteResponses" set-
ting. If required, "page_byte_size" will be adjusted so that it devides "start_byte_address".
If desired, after the xtsc_memory_parms object is constructed, its data members can be
changed using the appropriate xtsc_parms::set() method before passing it to the xtsc_-
memory constructor.

Parameters:
core A reference to the xtsc_core object upon which to base the xtsc_memory_parms.

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port_name The memory port name (the name of the memory interface). Note: The
core configuration must have the named memory interface.
delay Default delay for PIF read and write in terms of this memory’s clock period (see
"clock_period"). PIF memory devices should use a delay of 1 or more. A value
of 0xFFFFFFFF (the default) means to use a delay of 1 if the core has a 5-stage
pipeline and a delay of 2 if the core has a 7-stage pipeline. For non-PIF interfaces,
the delay is 0 or 1 (5 or 7 stage, respectively) regardless of the value passed in.
num_ports The number of ports this memory has. If 0, the default, the number of
ports will be inferred based on the number of multi-ports in the port_name core
interface (assuming they are unbound).

See also:
xtsc::xtsc_core::How_to_do_memory_port_binding for a list of legal port_name values.

The documentation for this class was generated from the following file:

• xtsc_memory.h

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7.84 xtsc_memory_pin Class Reference

This device implements a pin-level memory model.

#include <xtsc/xtsc_memory_pin.h>Inheritance diagram for xtsc_memory_pin:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_module_pin_base

xtsc_memory_pin

Collaboration diagram for xtsc_memory_pin:

xtsc_connection_interface xtsc_resettable xtsc_script_file

m_p_initial_value_file

xtsc_module xtsc_module_pin_base xtsc_memory_b

m_p_memory

xtsc_debug_if xtsc_memory_pin

m_memory_pin m_debug_impl

xtsc_debug_if_impl

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Classes
• class pif_req_info
Information about each request.

• class xtsc_debug_if_impl
Implementation of xtsc_debug_if.

Public Types
• typedef sc_core::sc_fifo< bool > bool_fifo
• typedef sc_core::sc_fifo< sc_dt::sc_bv_base > wide_fifo
• typedef sc_core::sc_signal< bool > bool_signal
• typedef sc_core::sc_signal< sc_dt::sc_uint_base > uint_signal
• typedef sc_core::sc_signal< sc_dt::sc_bv_base > wide_signal
• typedef std::map< std::string, bool_signal ∗ > map_bool_signal
• typedef std::map< std::string, uint_signal ∗ > map_uint_signal
• typedef std::map< std::string, wide_signal ∗ > map_wide_signal

Public Member Functions

• SC_HAS_PROCESS (xtsc_memory_pin)
This SystemC macro inserts some code required for SC_THREAD’s to work.

• virtual const char ∗ kind () const

Our C++ type (SystemC uses this).

• xtsc_memory_pin (sc_core::sc_module_name module_name, const xtsc_memory_-

pin_parms &memory_parms)
Constructor for a xtsc_memory_pin.

• ∼xtsc_memory_pin (void)
Destructor.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

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• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

• log4xtensa::BinaryLogger & get_binary_logger ()

Get the BinaryLogger for this component (e.g. to adjust its log level).

• void peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗buffer)

Non-hardware reads (for example, reads by the debugger).

• void poke (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8 ∗buffer)

Non-hardware writes (for example, writes from the debugger).

• void byte_dump (xtsc::xtsc_address address8, xtsc::u32 size8, std::ostream

&os=std::cout, bool left_to_right=true, xtsc::u32 bytes_per_line=16, bool show_-
address=true, bool show_hex_values=true, bool do_column_heading=true, bool
show_ascii_values=true, bool adjust_address=true)
This method dumps the specified number of bytes from the memory.

• xtsc::u32 connect (xtsc_tlm2pin_memory_transactor &tlm2pin, xtsc::u32 tlm2pin_-

port=0, xtsc::u32 mem_port=0, bool single_connect=false)
Connect an xtsc_tlm2pin_memory_transactor transactor to this xtsc_memory_pin.

• virtual void reset (bool hard_reset=false)

The implementation of reset() in xtsc_module logs a warning and does nothing else.

• bool get_append_id () const

Return true if pin port names include the set_id as a suffix.

Public Attributes
• sc_core::sc_export< xtsc::xtsc_debug_if > ∗∗ m_debug_exports
From master to us (per mem port).

• xtsc::Readme How_to_get_input_and_output_ports

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Protected Member Functions

• std::string adjust_name_and_check_size (const std::string &port_name, const xtsc_-

tlm2pin_memory_transactor &tlm2pin, xtsc::u32 tlm2pin_port, const set_string
&transactor_set) const
Helper method to get the tlm2pin port name and confirm pin sizes match.

• void dump_set_string (std::ostringstream &oss, const set_string &strings, const

std::string &indent)
Dump a set of strings one string per line with the specified indent.

• virtual void end_of_elaboration (void)

SystemC callback.

• virtual void start_of_simulation (void)

SystemC callback.

• void sync_to_sample_phase (void)

Sync to m_sample_phase (always waits).

• void sync_to_drive_phase (void)

Sync to m_drive_phase (only waits if not already at m_drive_phase).

• void pif_request_thread (void)

Capture PIF|IDMA0 request information.

• void pif_drive_req_rdy_thread (void)

Drive POReqRdy at "drive_phase".

• void pif_respond_thread (void)

Process PIF|IDMA0 requests and drive response signals at "drive_phase".

• void lcl_request_thread (void)

Handle local memory-interface requests on non-split Rd/Wr interfaces.

• void lcl_rd_request_thread (void)

Handle local memory-interface requests on Rd ports of split Rd/Wr interfaces.

• void lcl_wr_request_thread (void)

Handle local memory-interface requests on Wr ports of split Rd/Wr interfaces.

• void lcl_drive_read_data_thread (void)

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Drive local memory read data.

• void lcl_drive_busy_thread (void)

Drive local memory busy signal.

• void do_read (const pif_req_info &info)

Helper method to handle READ.

• void do_block_read (const pif_req_info &info)

Helper method to handle BLOCK_READ.

• void do_burst_read (const pif_req_info &info)

Helper method to handle BURST_READ.

• void do_rcw (const pif_req_info &info)

Helper method to handle RCW.

• void do_write (const pif_req_info &info)

Helper method to handle WRITE.

• void do_block_write (const pif_req_info &info)

Helper method to handle BLOCK_WRITE.

• void do_burst_write (const pif_req_info &info)

Helper method to handle BURST_WRITE.

• void pif_drive_response (const pif_req_info &info, const resp_cntl &response, const

sc_dt::sc_bv_base &data)
Drive response for durations of one clock cycle until accepted, then deassert.

• bool_signal & create_bool_signal (const std::string &signal_name)

Create an sc_signal<bool> with the specified name.

• uint_signal & create_uint_signal (const std::string &signal_name, xtsc::u32 num_bits)

Create an sc_signal<sc_uint_base> with the specified name and size.

• wide_signal & create_wide_signal (const std::string &signal_name, xtsc::u32 num_-

bits)
Create an sc_signal<sc_bv_base> with the specified name and size.

• void swizzle_byte_enables (xtsc::xtsc_byte_enables &byte_enables) const

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Swizzle byte enables.

• pif_req_info ∗ new_pif_req_info (xtsc::u32 port)

Get a new pif_req_info (from the pool).

• void delete_pif_req_info (pif_req_info ∗&p_pif_req_info)

Delete an pif_req_info (return it to the pool).

Protected Attributes

• xtsc_debug_if_impl ∗∗ m_debug_impl
m_debug_exports binds to these (per mem port)

• xtsc::xtsc_memory_b ∗ m_p_memory
The memory itself.

• std::deque< pif_req_info ∗ > ∗ m_pif_req_fifo

The fifo of incoming PIF|IDMA0 requests (per mem port).

• xtsc::u32 m_request_fifo_depth
From "request_fifo_depth" parameter.

• std::vector< pif_req_info ∗ > m_pif_req_pool

Pool of pif_req_info objects.

• xtsc::u32 m_num_ports
The number of ports this memory has.

• std::string m_interface_uc
Uppercase version of "memory_interface" parameter.

• std::string m_interface_lc
Lowercase version of "memory_interface" parameter.

• memory_interface_type m_interface_type
The memory interface type.

• xtsc::u32 m_dram_attribute_width
See "dram_attribute_width" parameter.

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• sc_dt::sc_bv_base m_dram_attribute_bv
To read dram attribute for logging.

• xtsc::u64 m_clock_period_value
This device’s clock period as u64.

• sc_core::sc_time m_clock_period
This device’s clock period as sc_time.

• sc_core::sc_time m_time_resolution
The SystemC time resolution.

• sc_core::sc_time m_posedge_offset
From "posedge_offset" parameter.

• sc_core::sc_time m_sample_phase
Clock phase at which inputs are sampled (from "sample_phase").

• sc_core::sc_time m_sample_phase_plus_one
m_sample_phase plus one clock period

• sc_core::sc_time m_drive_phase
Clock phase at which outputs are driven (from "drive_phase").

• sc_core::sc_time m_drive_phase_plus_one
m_drive_phase plus one clock period

• sc_core::sc_time m_drive_to_sample_time
Time from m_drive_phase to next sample phase (PIF|IDMA0).

• sc_core::sc_time m_sample_to_drive_time
Time from next sample phase to next drive phase (PIF|IDMA0).

• sc_core::sc_time m_sample_to_drive_data_delay
Time to wait from sampling inputs to driving data output (lcl mem).

• sc_core::sc_time m_sample_to_drive_busy_delay
Time to wait from sampling inputs to driving busy output (lcl mem).

• bool m_has_posedge_offset
True if m_posedge_offset is non-zero.

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• xtsc::u64 m_posedge_offset_value
m_posedge_offset as u64

• xtsc::u32 m_read_delay_value
See "read_delay" parameter.

• xtsc::u32 m_next_port_lcl_request_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_lcl_drive_read_data_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_lcl_drive_busy_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_pif_request_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_pif_drive_req_rdy_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_pif_respond_thread
To give each thread instance a port number.

• sc_core::sc_time m_read_delay
See "read_delay" parameter.

• sc_core::sc_time m_block_read_delay
See "block_read_delay" parameter.

• sc_core::sc_time m_block_read_repeat
See "block_read_repeat" parameter.

• sc_core::sc_time m_burst_read_delay
See "burst_read_delay" parameter.

• sc_core::sc_time m_burst_read_repeat
See "burst_read_repeat" parameter.

• sc_core::sc_time m_rcw_repeat
See "rcw_repeat" parameter.

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• sc_core::sc_time m_rcw_response
See "rcw_response" parameter.

• sc_core::sc_time m_write_delay
See "write_delay" parameter.

• sc_core::sc_time m_block_write_delay
See "block_write_delay" parameter.

• sc_core::sc_time m_block_write_repeat
See "block_write_repeat" parameter.

• sc_core::sc_time m_block_write_response
See "block_write_response" parameter.

• sc_core::sc_time m_burst_write_delay
See "burst_write_delay" parameter.

• sc_core::sc_time m_burst_write_repeat
See "burst_write_repeat" parameter.

• sc_core::sc_time m_burst_write_response
See "burst_write_response" parameter.

• sc_core::sc_time ∗ m_last_action_time_stamp
Time of last action: recovery time starts from here (per mem port).

• bool m_cbox
See "cbox" parameter.

• bool m_split_rw
True if m_interface_type is DRAM0RW or DRAM1RW.

• bool m_has_dma
See "has_dma" parameter.

• bool m_append_id
True if pin port names should include the set_id.

• bool m_inbound_pif
True if interface is inbound PIF.

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• bool m_has_coherence
See "has_coherence" parameter (future use).

• bool m_has_pif_attribute
See "has_pif_attribute" parameter.

• bool m_has_pif_req_domain
See "has_pif_req_domain" parameter.

• bool m_use_fast_access
See "use_fast_access" parameter.

• bool m_big_endian
True if master is big endian.

• bool m_has_request_id
True if the "POReqId" and "PIRespId" ports should be present.

• bool m_write_responses
See "write_responses" parameter.

• std::string m_req_user_data
See "req_user_data" parameter.

• std::string m_req_user_data_name
Name of request user data port.

• xtsc::u32 m_req_user_data_width1
Bit width of request user data port.

• std::string m_rsp_user_data
See "rsp_user_data" parameter.

• std::string m_rsp_user_data_name
Name of response user data port.

• xtsc::u32 m_rsp_user_data_width1
Bit width of response user data port.

• bool m_rsp_user_data_val_echo
True if "rsp_user_data_val" is "echo".

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• xtsc::u32 m_address_bits
Number of bits in the address (non-PIF|IDMA0 only).

• xtsc::u32 m_check_bits
Number of bits in ECC/parity signals (from "check_bits").

• xtsc::u32 m_setw
Number of nibbles to use when displaying an address.

• xtsc::u32 m_address_shift
Number of bits to left-shift the address.

• xtsc::u32 m_address_mask
To mask out unused bits of address.

• xtsc::u32 m_route_id_bits
Number of bits in the route ID (PIF|IDMA0 only).

• bool m_has_busy
True if memory interface has a busy pin (non-PIF|IDMA0 only).

• bool m_has_lock
True if memory interface has a lock pin (DRAM0|DRAM0BS|DRAM0RW|DRAM1|DRAM1BS|DRAM1RW
only).

• bool m_has_xfer_en
True if memory interface has Xfer enable pin (NA PIF|IDMA0|DROM0|XLMI0).

• bool ∗ m_testing_busy
We’re asserting PIReqRdy because of "busy_percentage".

• xtsc::i32 m_busy_percentage
Percent of requests that will get a busy response.

• sc_core::sc_event ∗ m_pif_req_event
Event used to notify pif_respond_thread (per mem port).

• sc_core::sc_event ∗ m_pif_req_rdy_event
Event used to notify pif_drive_req_rdy_thread (per mem port).

• sc_core::sc_event ∗ m_respond_event
Event used to notify pif_request_thread (per mem port).

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• bool ∗ m_first_block_write
True if next BLOCK_WRITE will be first in the block (per mem port).

• bool ∗ m_first_burst_write
True if next BURST_WRITE will be first in the block (per mem port).

• xtsc::u32 ∗ m_block_write_xfers
Num transfers from first transfer of BLOCK_WRITE (per mem port).

• xtsc::xtsc_address ∗ m_block_write_address
Base address from first transfer of BLOCK_WRITE (per mem port).

• xtsc::xtsc_address ∗ m_block_write_offset
Address offset for this/next BLOCK_WRITE transfer (per mem port).

• xtsc::xtsc_address ∗ m_burst_write_address
Address to be used for next BURST_WRITE (per mem port).

• sc_dt::sc_uint_base m_address
The address after any required shifting and masking.

• sc_dt::sc_bv_base ∗∗ m_data
POReqData/PIRespData, also temp buffer for lcl memory reads.

• sc_dt::sc_bv_base ∗∗ m_data_to_be_written
For delayed handling of lcl memory write data.

• sc_dt::sc_bv_base ∗∗ m_rcw_compare_data
RCW compare data from 1st transfer of RCW (per mem port).

• sc_dt::sc_bv_base ∗∗ m_rsp_user_data_val
Value to be drive on signal defined by "rsp_user_data" parameter.

• sc_dt::sc_uint_base m_id_zero
For deasserting PIRespId.

• sc_dt::sc_uint_base m_priority_zero
For deasserting PIRespPriority.

• sc_dt::sc_uint_base m_route_id_zero
For deasserting PIRespRouteId.

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• sc_dt::sc_bv_base m_data_zero
For deasserting PIRespData.

• resp_cntl m_resp_cntl_zero
For deasserting PIRespCntl.

• sc_dt::sc_uint_base m_coh_cntl
For driving PIRespCohCntl.

• req_cntl m_req_cntl
Value from POReqCntl.

• resp_cntl m_resp_cntl
Value for PIRespCntl.

• wide_fifo ∗∗ m_read_data_fifo
sc_fifo of sc_bv_base read data values (lcl mem) (per mem port)

• bool_fifo ∗∗ m_busy_fifo
sc_fifo of busy values (lcl mem) (per mem port)

• sc_core::sc_event_queue ∗∗ m_read_event_queue
When read data should be driven (lcl mem) (per mem port).

• sc_core::sc_event_queue ∗∗ m_busy_event_queue
When busy should be driven (lcl mem) (per mem port).

• map_bool_signal m_map_bool_signal
The optional map of all sc_signal<bool> signals.

• map_uint_signal m_map_uint_signal
The optional map of all sc_signal<sc_uint_base> signals.

• map_wide_signal m_map_wide_signal
The optional map of all sc_signal<sc_bv_base> signals.

• bool_input ∗∗ m_p_en
DPortEn, DRamEn, DRomEn, IRamEn, IRomEn (per mem port).

• uint_input ∗∗ m_p_addr
DPortAddr, DRamAddr, DRomAddr, IRamAddr, IRomAddr (per mem port).

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• uint_input ∗∗ m_p_lane
DPortByteEn, DRamByteEn, DRomByteEn, IRamWordEn, IRomWordEn (per mem port).

• wide_input ∗∗ m_p_wrdata
DPortWrData, DRamWrData, IRamWrData (per mem port).

• bool_input ∗∗ m_p_wr
DPortWr, DRamWr, IRamWr (per mem port).

• bool_input ∗∗ m_p_load
DPortLoad, IRamLoadStore, IRomLoad - Trace only (per mem port).

• bool_input ∗∗ m_p_retire
DPortLoadRetired - Trace only (per mem port).

• bool_input ∗∗ m_p_flush
DPortRetireFlush - Trace only (per mem port).

• bool_input ∗∗ m_p_lock
DRamLock (per mem port or bank, if subbanked).

• wide_input ∗∗ m_p_attr
DRamAttr, DRamWrAttr.

• wide_input ∗∗ m_p_check_wr
DRamCheckWrData, IRamCheckWrData.

• wide_output ∗∗ m_p_check
DRamCheckData, IRamCheckData.

• bool_input ∗∗ m_p_xfer_en
DRamXferEn, IRamXferEn, IRomXferEn, URamXferEn.

• bool_output ∗∗ m_p_busy
DPortBusy, DRamBusy, DRomBusy, IRamBusy, IRomBusy (per mem port or bank, if sub-
banked).

• wide_output ∗∗ m_p_data
DPortData, DRamData, DRomData, IRamData, IRomData (per mem port).

• bool_input ∗∗ m_p_req_valid

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POReqValid (per mem port).

• uint_input ∗∗ m_p_req_cntl
POReqCntl (per mem port).

• uint_input ∗∗ m_p_req_adrs
POReqAdrs (per mem port).

• wide_input ∗∗ m_p_req_data
POReqData (per mem port).

• uint_input ∗∗ m_p_req_data_be
POReqDataBE (per mem port).

• uint_input ∗∗ m_p_req_id
POReqId (per mem port).

• uint_input ∗∗ m_p_req_priority
POReqPriority (per mem port).

• uint_input ∗∗ m_p_req_route_id
POReqRouteId (per mem port).

• uint_input ∗∗ m_p_req_attribute
POReqAttribute (per mem port).

• uint_input ∗∗ m_p_req_domain
POReqDomain (per mem port).

• uint_input ∗∗ m_p_req_coh_vadrs
POReqCohVAdrsIndex (per mem port).

• uint_input ∗∗ m_p_req_coh_cntl
POReqCohCntl (per mem port).

• wide_input ∗∗ m_p_req_user_data
Request User Data. See "req_user_data" parameter.

• bool_output ∗∗ m_p_req_rdy
PIReqRdy (per mem port).

• bool_output ∗∗ m_p_resp_valid

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PIRespValid (per mem port).

• uint_output ∗∗ m_p_resp_cntl
PIRespCntl (per mem port).

• wide_output ∗∗ m_p_resp_data
PORespData (per mem port).

• uint_output ∗∗ m_p_resp_id
PIRespId (per mem port).

• uint_output ∗∗ m_p_resp_priority
PIRespPriority (per mem port).

• uint_output ∗∗ m_p_resp_route_id
PIRespRouteId (per mem port).

• uint_output ∗∗ m_p_resp_coh_cntl
PIRespCohCntl (per mem port).

• wide_output ∗∗ m_p_resp_user_data
Response User Data. See "rsp_user_data" parameter.

• bool_input ∗∗ m_p_resp_rdy
PORespRdy (per mem port).

• xtsc::xtsc_address m_start_address8
The starting byte address of this memory.

• xtsc::u32 m_size8
The byte size of this memory.

• xtsc::u32 m_width8
The byte width of this memories data interface.

• xtsc::u32 m_enable_bits
Number of explicit/implied byte/word enable bits.

• xtsc::xtsc_address m_end_address8
The ending byte address of this memory.

• std::vector< sc_core::sc_process_handle > m_process_handles

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For reset.

• log4xtensa::TextLogger & m_text

Text logger.

• log4xtensa::BinaryLogger & m_binary

Binary logger.

Friends

• class pif_req_info
• std::ostream & operator<< (std::ostream &os, const pif_req_info &info)

7.84.1 Detailed Description

This device implements a pin-level memory model. It can be driven by any of the XTSC
TLM memory interface master modules by using an xtsc_tlm2pin_memory_transactor to
convert the TLM requests/responses into pin-level requests/responses. In addition, when
doing SystemC-Verilog cosimulation, this model can be driven by any Verilog module which
supports the configured Xtensa memory interface and protocol.
This model supports any of the Xtensa memory interfaces (except caches) and it supports
operating as a multi-ported memory. It also supports generating a random busy/not-ready
signal for testing purposes.
The SystemC names of the pin-level ports exactly match the pin names of the Xtensa RTL.
For example, an Xtensa core with a PIF has an output pin called "POReqValid" and, when
it is serving as a PIF memory, this module has a matching SystemC input port which is also
called "POReqValid" (see data member m_p_req_valid).
Note: The parity/ECC signals (DRamNCheckDataM, DRamNCheckWrDataM, IRam-
NCheckData, and IRamNCheckWrData) are present for IRAM and DRAM interfaces when
"check_bits" is non-zero; however, the input signal is ignored and the output signal is driven
with constant 0. Similarly, the DRamNLockM signals are present when "has_lock" is true;
however, the input is ignored.
Here is a block diagram of an xtsc_memory_pin as it is used in the xtsc_tlm2pin_memory_-
transactor example:

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POReqValid
req

PIReqRdy

POReqCntl 8
/
POReqAdrs 32
/
POReqData 32
/
POReqDataBE 4
/
POReqId 6
/

xtsc_tlm2pin_memory_transactor POReqPriority 2 xtsc_memory_pin

tlm2pin_pif / mem_pif

rsp PIRespValid
xtsc_core core0
PORespRdy

PIRespCntl 8
/
PIRespData 32
/
PIRespId 6
/
PIRespPriority 2
/

Figure 7.10: xtsc_tlm2pin_memory_transactor Example

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See also:
xtsc_memory_pin_parms
xtsc::xtsc_memory_b
xtsc_tlm2pin_memory_transactor
xtsc::xtsc_core

Definition at line 597 of file xtsc_memory_pin.h.

7.84.2 Constructor & Destructor Documentation

7.84.2.1 xtsc_memory_pin (sc_core::sc_module_name module_name, const

xtsc_memory_pin_parms & memory_parms)

Constructor for a xtsc_memory_pin.

Parameters:
module_name Name of the xtsc_memory_pin sc_module.
memory_parms The remaining parameters for construction.

See also:
xtsc_memory_pin_parms

7.84.3 Member Function Documentation

7.84.3.1 void peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗

buffer) [inline]

Non-hardware reads (for example, reads by the debugger).

See also:
xtsc::xtsc_request_if::nb_peek

Definition at line 681 of file xtsc_memory_pin.h.

7.84.3.2 void poke (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8

∗ buffer) [inline]

Non-hardware writes (for example, writes from the debugger).

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See also:
xtsc::xtsc_request_if::nb_poke

Definition at line 688 of file xtsc_memory_pin.h.

7.84.3.3 void byte_dump (xtsc::xtsc_address address8, xtsc::u32 size8,

std::ostream & os = std::cout, bool left_to_right = true, xtsc::u32
bytes_per_line = 16, bool show_address = true, bool show_hex_values =
true, bool do_column_heading = true, bool show_ascii_values = true,
bool adjust_address = true) [inline]

This method dumps the specified number of bytes from the memory. Each line of output is
divided into three columnar sections, each of which is optional. The first section contains
an address. The second section contains a hex dump of some (possibly all) of the data
(two hex nibbles and a space for each byte from the memory). The third section contains
an ASCII dump of the same data.

Parameters:
address8 The starting byte address in memory.
size8 The number of bytes of data to dump.
os The ostream object to which the data is to be dumped.
left_to_right If true, the data is dumped in the order: memory[0], memory[1],
..., memory[bytes_per_line-1]. If false, the data is dumped in the order:
memory[bytes_per_line-1], memory[bytes_per_line-2], ..., memory[0].
bytes_per_line The number of bytes to dump on each line of output. If bytes_per_line
is 0 then all size8 bytes are dumped on a single line with no newline at the end. If
bytes_per_line is non-zero, then all lines of output end in newline.
show_address If true, the first columnar section contains an address printed as an
8-hex-digit number with a 0x prefix. If false, the first columnar section is null and
takes no space in the output.
show_hex_values If true, the second (middle) columnar section of hex data values
is printed. If false, the second columnar section is null and takes no space in the
output.
do_column_heading If true, print byte position column headings over the hex val-
ues section. If false, no column headings are printed. If show_hex_values is
false, then the do_column_heading value is ignored and no column headings are
printed.
show_ascii_values If true, the third (last) columnar section of ASCII data values is
printed (if an ASCII value is a non-printable character a period is printed). If
show_ascii_values is false, the third columnar section is null and takes no space
in the output.

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adjust_address If adjust_address is true and address8 modulo bytes_per_line is not

0, then offset the printed values on the first line of the hex and ASCII colum-
nar sections and adjust the printed address so that the printed address modulo
bytes_per_line is always zero. Otherwize, do not offset the first printed data val-
ues and do not adjust the printed address.

Definition at line 748 of file xtsc_memory_pin.h.

7.84.3.4 xtsc::u32 connect (xtsc_tlm2pin_memory_transactor & tlm2pin, xtsc::u32

tlm2pin_port = 0, xtsc::u32 mem_port = 0, bool single_connect = false)

Connect an xtsc_tlm2pin_memory_transactor transactor to this xtsc_memory_pin. This

method connects the pin-level ports of the xtsc_tlm2pin_memory_transactor to this xtsc_-
memory_pin. It also connects the debug interface unless the transactor was configured
with a "dso_name". In the process of connecting the pin-level ports, it creates the neces-
sary signals of type sc_signal<bool>, sc_signal<sc_uint_base>, and sc_signal<sc_bv_-
base>. The name of each signal is formed by the concatenation of the SystemC name of
the xtsc_memory_pin object, the 2 characters "__", and the SystemC name of the xtsc_-
memory_pin port (for example, "pif__POReqValid").

Parameters:
tlm2pin The xtsc_tlm2pin_memory_transactor to connect to this xtsc_memory_pin.
tlm2pin_port The tlm2pin master port to connect to.
mem_port The port of this memory to connect tlm2pin to.
single_connect If true only one port of this memory will be connected. If false, the
default, then all contiguous, unconnected port numbers of this memory starting at
mem_port that have a corresponding existing port in tlm2pin (starting at tlm2pin_-
port) will be connected to that corresponding port in tlm2pin.

Returns:
number of ports that were connected by this call (1 or more)

7.84.3.5 virtual void reset (bool hard_reset = false) [virtual]

The implementation of reset() in xtsc_module logs a warning and does nothing else. Sub-
classes should provide their own implementation if they are able to support reset.
Reimplemented from xtsc_module.

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7.84.4 Member Data Documentation

7.84.4.1 xtsc::Readme How_to_get_input_and_output_ports

See also:
xtsc_module_pin_base::get_bool_input()
xtsc_module_pin_base::get_uint_input()
xtsc_module_pin_base::get_wide_input()
xtsc_module_pin_base::get_bool_output()
xtsc_module_pin_base::get_uint_output()
xtsc_module_pin_base::get_wide_output()

Definition at line 616 of file xtsc_memory_pin.h.

The documentation for this class was generated from the following file:

• xtsc_memory_pin.h

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7.85 xtsc_memory_pin_parms Class Reference

Constructor parameters for a xtsc_memory_pin object.

#include <xtsc/xtsc_memory_pin.h>Inheritance diagram for xtsc_memory_pin_parms:

xtsc_parms

xtsc_memory_pin_parms

Collaboration diagram for xtsc_memory_pin_parms:

xtsc_parms

xtsc_memory_pin_parms

Public Member Functions

• xtsc_memory_pin_parms (const char ∗memory_interface="PIF", xtsc::u32 byte_-
width=4, xtsc::u32 address_bits=32, xtsc::u32 delay=1, xtsc::u32 num_ports=1)
Constructor for an xtsc_memory_pin_parms object.

• xtsc_memory_pin_parms (const xtsc::xtsc_core &core, const char ∗memory_-

interface, xtsc::u32 delay=0xFFFFFFFF, xtsc::u32 num_ports=0)
Constructor for an xtsc_memory_pin_parms object based upon an xtsc_core object and a
named memory interface.

• void init (const char ∗memory_interface, xtsc::u32 byte_width, xtsc::u32 address_-

bits, xtsc::u32 delay, xtsc::u32 num_ports)

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• virtual const char ∗ kind () const

Our C++ type (the xtsc_parms base class uses this for error messages).

7.85.1 Detailed Description

Constructor parameters for a xtsc_memory_pin object. This class contains the constructor
parameters for an xtsc_memory_pin object.

Name Type Description

------------------ ---- --------------------------------------------------------

"memory_interface" char* The memory interface type. Valid values are "DRAM0",
"DRAM0BS", "DRAM0RW", "DRAM1", "DRAM1BS", "DRAM1RW",
"DROM0", "IRAM0", "IRAM1", "IROM0", "URAM0", "XLMI0",
"PIF", and "IDMA0" (case-insensitive).
Note: For inbound PIF set this parameter to "PIF" and
set the "inbound_pif" parameter to true.

"num_ports" u32 The number of memory ports this memory has. A value of
1 means this memory is single-ported, a value of 2 means
this transactor is dual-ported, etc.
If "memory_interface" is "DRAM0RW" or "DRAM1RW", then a
read port counts as one port and its corresponding write
port counts as another port.
Default = 1.
Minimum = 1.

"port_name_suffix" char* Optional constant suffix to be appended to every input

and output port name.
Default = "".

"byte_width" u32 Memory data interface width in bytes. Valid values for
"DRAM0", "DRAM0RW", "DRAM1", "DRAM1RW", "DROM0",
"URAM0", and "XLMI0" are 4, 8, 16, 32, and 64. Valid
values for "DRAM0BS" and "DRAM1BS" are 4, 8, 16, and 32.
Valid values for "IRAM0", "IRAM1", "IROM0", "PIF", and
"IDMA0" are 4, 8, and 16.

"start_byte_address" u32 The starting byte address of this memory in the 4GB
address space.

"memory_byte_size" u32 The byte size of this memory. 0 means the memory
occupies all of the 4GB address space at and above
"start_byte_address".

"page_byte_size" u32 The byte size of a page of memory. In the model,

memory is not allocated until it is accessed. This
parameter specifies the allocation size.
Default is 16 Kilobytes (1024*16=16384=0x4000).
Minimum page size is 16*byte_width.

"initial_value_file" char* If not NULL or empty, this names a text file from which

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to read the initial memory contents as byte values.

Default = NULL.
The text file format is:

([@<Offset>] <Value>*)*

1. Any number (<Offset> or <Value>) can be in decimal

or hexadecimal (using '0x' prefix) format.
2. @<Offset> is added to "start_byte_address".
3. <Value> cannot exceed 255 (0xFF).
4. If a <Value> entry is not immediately preceeded in
the file by an @<Offset> entry, then its offset is
one greater than the preceeding <Value> entry.
5. If the first <Value> entry in the file is not
preceeded by an @<Offset> entry, then its offset
is zero.
6. Comments, extra whitespace, and blank lines are
ignored. See xtsc::xtsc_script_file.

Example text file contents:

0x01 0x02 0x3 // First three bytes of the memory,

// 0x01 is at "start_byte_address"
@0x1000 50 // The byte at offset 0x1000 is 50
51 52 // The byte at offset 0x1001 is 51
// The byte at offset 0x1002 is 52

"memory_fill_byte" u32 The low byte specifies the value used to initialize
memory contents at address locations not initialize
from "initial_value_file".
Default = 0.

"use_fast_access" bool If true, this memory will support fast access for the
turboxim simulation engine.
Default = true.

"big_endian" bool True if the master is big endian.

Default = false.

"clock_period" u32 This is the length of this device's clock period

expressed in terms of the SystemC time resolution
(from sc_get_time_resolution()). A value of
0xFFFFFFFF means to use the XTSC system clock
period (from xtsc_get_system_clock_period()). A value
of 0 means one delta cycle.
Default = 0xFFFFFFFF (i.e. use the system clock
period).

"posedge_offset" u32 This specifies the time at which the first posedge of
this device's clock conceptually occurs. It is
expressed in units of the SystemC time resolution and
the value implied by it must be strictly less than the
value implied by the "clock_period" parameter. A value
of 0xFFFFFFFF means to use the same posedge offset as
the system clock (from
xtsc_get_system_clock_posedge_offset()).

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Default = 0xFFFFFFFF.

"sample_phase" u32 This specifies the phase (i.e. the point) in a clock
period at which input pins are sampled. Outputs which
are used for handshaking (PIReqRdy, PIRespValid,
IRamBusy, DRamBusy, etc.) are also sampled at this time.
This value is expressed in terms of the SystemC time
resolution (from sc_get_time_resolution()) and must be
strictly less than the clock period as specified by the
"clock_period" parameter. A value of 0 means input pins
are sampled on posedge clock as specified by
"posedge_offset".
Default = 0 (sample at posedge clock).

"drive_phase" u32 This specifies the phase (i.e. the point) in a clock
period at which output pins are driven. It is expressed
in terms of the SystemC time resolution (from
sc_get_time_resolution()) and must be strictly less than
the clock period as specified by the "clock_period"
parameter. A value of 0 means output pins are driven on
posedge clock as specified by "posedge_offset".
Default = 1 (1 time resolution after posedge clock).

"vcd_handle" void* Pointer to SystemC VCD object (sc_trace_file *) or

0 if tracing is not desired.
Default = 0.

"busy_percentage" u32 This specifies the percentage of requests that will

receive a busy/not-ready response. This is for testing
purposes. Valid values are 0-100. Not applicable for
local memories with "has_busy" of false.
Default = 0.

Parameters which apply to PIF|IDMA0 only:

"inbound_pif" bool Set to true for inbound PIF. Set to false for outbound
PIF. This parameter is ignored if "memory_interface"
is other then "PIF".
Default = false (outbound PIF).

"has_coherence" bool True if the "POReqCohCntl", "POReqCohVAdrsIndex", and

"PIRespCohCntl" ports should be present. This parameter
is ignored unless "memory_interface" is "PIF" and
"inbound_pif" is false.
Default = false.
Note: Reserved for future use.

"has_pif_attribute" bool True if the "POReqAttribute" or "PIReqAttribute" port

should be present. This parameter is ignored unless
"memory_interface" is "PIF" or "IDMA0".
Default = false.

"has_pif_req_domain" bool True if the "POReqDomain" port should be present. This

parameter is ignored unless "memory_interface" is "PIF"
or "IDMA0" and "inbound_pif" is false.
Default = false.

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"has_request_id" bool True if the "POReqId" and "PIRespId" ports should be

present. This parameter is ignored unless
"memory_interface" is "PIF" or "IDMA0".
Default = true.

"write_responses" bool True if write responses should be sent to the master.

If false, write responses will not be sent. This
parameter is ignored unless "memory_interface" is "PIF"
or "IDMA0".
Default = true.

"route_id_bits" u32 Number of bits in the route ID. Valid values are 0-32.
If "route_id_bits" is 0, then the "POReqRouteId" and
"PIRespRouteId" output ports will not be present. This
parameter is ignored unless "memory_interface" is "PIF"
or "IDMA0".
Default = 0.

"void_resp_cntl" u32 The low byte specifies the value to be driven out the
"PIRespCntl" port when "PIRespValid" is low (that is
when no response is occurring). A default value of 0xFF
is used (instead of 0x00 which is the encoding for
"Response, not last transfer") to make it easier to
visually distinguish when a response is occuring when
using a waveform viewer. This parameter is ignored
unless "memory_interface" is "PIF" or "IDMA0".
Default = 0xFF.

"request_fifo_depth" u32 The request fifo depth. This parameter is ignored

unless "memory_interface" is "PIF" or "IDMA0".
Default = 2.
Minimum = 1.

"read_delay" u32 The number of clock periods between starting to process

a READ request and sending the response. See below for
the meaning of this parameter when "memory_interface" is
neither "PIF" nor "IDMA0".
Default = As specified by delay argument to constructor.

"block_read_delay" u32 The number of clock periods between starting to process

a BLOCK_READ request and sending the first response.
This parameter is ignored unless "memory_interface" is
"PIF" or "IDMA0".
Default = As specified by delay argument to constructor.

"block_read_repeat" u32 Number of clock periods between each BLOCK_READ response.

This parameter is ignored unless "memory_interface" is
"PIF" or "IDMA0".
Default = 1.

"burst_read_delay" u32 The number of clock periods between starting to process

a BURST_READ request and sending the first response.
This parameter is ignored unless "memory_interface" is
"PIF" or "IDMA0".
Default = As specified by delay argument to constructor.

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"burst_read_repeat" u32 Number of clock periods between each BURST_READ response.

This parameter is ignored unless "memory_interface" is
"PIF" or "IDMA0".
Default = 1.

"rcw_repeat" u32 The minimum number of clock periods between starting to

process the first RCW request and starting to process
the second RCW request. This parameter is ignored
unless "memory_interface" is "PIF" or "IDMA0".
Default = 1.

"rcw_response" u32 The number of clock periods between starting to process

the second RCW request and sending the response. This
parameter is ignored unless "memory_interface" is "PIF"
or "IDMA0".
Default = As specified by delay argument to constructor.

"write_delay" u32 The number of clock periods between starting to process

a WRITE request and sending the response. This
parameter is ignored unless "memory_interface" is "PIF"
or "IDMA0".
Default = As specified by delay argument to constructor.

"block_write_delay" u32 The minimum number of clock periods between starting to

process the first BLOCK_WRITE request and starting to
process the second BLOCK_WRITE request. This parameter
is ignored unless "memory_interface" is "PIF" or "IDMA0".
Default = As specified by delay argument to constructor.

"block_write_repeat" u32 The minimum number of clock periods between starting to

process a BLOCK_WRITE request (except the first or last
one) and starting to process the following BLOCK_WRITE
request. This parameter is ignored unless
"memory_interface" is "PIF" or "IDMA0".
Default = As specified by delay argument to constructor.

"block_write_response" u32 The number of clock periods between starting to process

the last BLOCK_WRITE request and sending the response.
This parameter is ignored unless "memory_interface" is
"PIF" or "IDMA0".
Default = As specified by delay argument to constructor.

"burst_write_delay" u32 The minimum number of clock periods between starting to

process the first BURST_WRITE request and starting to
process the second BURST_WRITE request. This parameter
is ignored unless "memory_interface" is "PIF" or "IDMA0".
Default = As specified by delay argument to constructor.

"burst_write_repeat" u32 The minimum number of clock periods between starting to

process a BURST_WRITE request (except the first or last
one) and starting to process the following BURST_WRITE
request. This parameter is ignored unless
"memory_interface" is "PIF" or "IDMA0".
Default = As specified by delay argument to constructor.

"burst_write_response" u32 The number of clock periods between starting to process

the last BURST_WRITE request and sending the response.

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This parameter is ignored unless "memory_interface" is

"PIF" or "IDMA0".
Default = As specified by delay argument to constructor.

"req_user_data" char* If not NULL or empty, this specifies the optional port
that should be used for user data. The string must give
the port name and bit width using the format:
PortName,BitWidth
This parameter is ignored unless "memory_interface" is
"PIF" or "IDMA0".
Default = "" (optional user data port is abscent)

"rsp_user_data" char* If not NULL or empty, this specifies the optional port
that should be used for user data. The string must give
the port name and bit width using the format:
PortName,BitWidth
This parameter is ignored unless "memory_interface" is
"PIF" or "IDMA0".
Default = "" (optional user data port is abscent)

"rsp_user_data_val" char* This specifies the value to drive on the port specified
by "rsp_user_data". If left at its default value of
"echo", the model will simply echo back the value most
recently received on the port defined by "req_user_data"
(or 0 if that port is not defined). This parameter is
for testing purposes only and is ignored unless
"memory_interface" is "PIF" or "IDMA0" and
"rsp_user_data" is set.
Default = "echo"

Parameters which apply to local memories only (that is, non-PIF|IDMA0 memories):

"address_bits" u32 Number of bits in the address. This parameter is

ignored if "memory_interface" is "PIF" or "IDMA0".

"check_bits" u32 Number of bits in the parity/ecc signals. This

parameter is ignored unless "memory_interface" is
"DRAM0", "DRAM0BS", "DRAM0RW", "DRAM1", "DRAM1BS",
"DRAM1RW", "IRAM0", or "IRAM1",
Default = 0.

"has_busy" bool True if the memory interface has a busy pin. This
parameter is ignored if "memory_interface" is "PIF" or
"IDMA0".
Default = true.

"has_lock" bool True if the memory interface has a lock pin. This
parameter is ignored unless "memory_interface" is
"DRAM0", "DRAM0BS", "DRAM0RW", "DRAM1", "DRAM1BS", or
"DRAM1RW".
Default = false.

"has_xfer_en" bool True if the memory interface has an xfer enable pin.
This parameter is ignored if "memory_interface" is
"DROM0", "XLMI0", "PIF", or "IDMA0".
Default = false.

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"read_delay" u32 Number of clock periods to delay before read data is

driven. This should be 0 for a 5-stage pipeline and 1
for a 7-stage pipeline. See above for the meaning of
this parameter when "memory_interface" is "PIF" or "IDMA0".
Default = As specified by delay argument to constructor.

"cbox" bool True if this memory interface is driven from an Xtensa

CBOX. This parameter is ignored if "memory_interface"
is other then "DRAM0"|"DRAM1"|"DROM0".
Default = false.

"banked" bool True if this is a banked "DRAM0"|"DRAM1"|"DROM0"

interface or if this is a "DRAM0BS"|"DRAM1BS" interface.
Default = false.

"has_dma" bool True if the memory interface has split Rd/Wr ports
("DRAM0RW"|"DRAM1RW") accessible from inbound PIF.
Default = false.

"num_subbanks" u32 The number of subbanks that each bank has.

"dram_attribute_width" u32 160 if the "DRamNAttr" and "DRamNWrAttr" ports

should be present. This parameter is ignored unless
"memory_interface" is "DRAM0RW" or "DRAM1RW".
Default = 0.

See also:
xtsc_memory_pin
xtsc::xtsc_parms
xtsc::xtsc_initialize_parms

Definition at line 408 of file xtsc_memory_pin.h.

7.85.2 Constructor & Destructor Documentation

7.85.2.1 xtsc_memory_pin_parms (const char ∗ memory_interface = "PIF",

xtsc::u32 byte_width = 4, xtsc::u32 address_bits = 32, xtsc::u32 delay =
1, xtsc::u32 num_ports = 1) [inline]

Constructor for an xtsc_memory_pin_parms object.

Parameters:
memory_interface The memory interface type. Valid values are "DRAM0",
"DRAM0RW", "DRAM0BS", "DRAM1", "DRAM1RW", "DRAM1BS", "DROM0",
"IRAM0", "IRAM1", "IROM0", "URAM0", "XLMI0", "PIF", and "IDMA0" (case-
insensitive).

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byte_width Memory data interface width in bytes.

address_bits Number of bits in address. Ignored for "PIF" and "IDMA0".
delay Default delay for read and write in terms of this memory’s clock period (see
"clock_period"). Non-PIF|IDMA0 memory devices should use a delay of 0 for a
5-stage pipeline and a delay of 1 for a 7-stage pipeline.
num_ports The number of ports this memory has.

Definition at line 432 of file xtsc_memory_pin.h.

7.85.2.2 xtsc_memory_pin_parms (const xtsc::xtsc_core & core, const char ∗

memory_interface, xtsc::u32 delay = 0xFFFFFFFF, xtsc::u32 num_ports =
0)

Constructor for an xtsc_memory_pin_parms object based upon an xtsc_core object

and a named memory interface. This constructor will determine "clock_period", "has_-
busy", "has_lock", "cbox", "banked", "num_subbanks", "start_byte_address", "memory_-
byte_size", "address_bits", "byte_width", "has_dma", "dram_attribute_width", "big_endian",
"check_bits", "has_pif_attribute", and "has_pif_req_domain" by querying the core object.
If desired, after the xtsc_memory_pin_parms object is constructed, its data members can
be changed using the appropriate xtsc_parms::set() method before passing it to the xtsc_-
memory_pin constructor.

Parameters:
core A reference to the xtsc_core object upon which to base the xtsc_memory_pin_-
parms.
memory_interface The memory interface type. Valid values are "DRAM0",
"DRAM0BS", "DRAM0RW", "DRAM1", "DRAM1BS", "DRAM1RW", "DROM0",
"IRAM0", "IRAM1", "IROM0", "URAM0", "XLMI0", "PIF", and "IDMA0" (case-
insensitive).
delay Default delay for PIF|IDMA0 read and write in terms of this memory’s clock
period (see "clock_period"). A value of 0xFFFFFFFF (the default) means to use
a delay of 0 if the core has a 5-stage pipeline and a delay of 1 if the core has
a 7-stage pipeline. For non-PIF interfaces, the delay is 0 or 1 (5 or 7 stage,
respectively) regardless of the value passed in.
num_ports The number of ports this memory has. If 0, the default, the num-
ber of ports will be inferred thusly: For banked DRAM0|DRAM1|DROM0,
the "num_ports" will be equal to the number of banks. For subbanked
DRAM0BS|DRAM1BS, the "num_ports" will be equal to the number of banks
times the number of subbanks per bank. For split R/W DRAM0RW|DRAM1RW,
the "num_ports" will be 2 times the number of Load/Store units plus 2 if there is
an inbound PIf interface. For non-banked, non-split R/W interfaces, if memory_-
interface is a LD/ST unit 0 port of a dual-ported core interface, and the core is

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dual-ported and has no CBox, and if the 2nd port of the core has not been bound,
then "num_ports" will be 2; otherwise, "num_ports" will be 1.

The documentation for this class was generated from the following file:

• xtsc_memory_pin.h

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7.86 xtsc_memory_tlm2 Class Reference

A PIF, XLMI, or local memory which uses OSCI TLM2.

#include <xtsc/xtsc_memory_tlm2.h>Inheritance diagram for xtsc_memory_tlm2:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface

xtsc_memory_tlm2

Collaboration diagram for xtsc_memory_tlm2:

xtsc_connection_interface
xtsc_module

xtsc_resettable

xtsc_command_handler_interface
m_memory
xtsc_memory_tlm2 tlm_fw_transport_if_impl
m_memory_parms
m_tlm_fw_transport_if_impl
xtsc_parms xtsc_memory_tlm2_parms
m_p_memory

m_p_initial_value_file
xtsc_script_file xtsc_memory_b

Classes

• class tlm_fw_transport_if_impl
Implementation of tlm_fw_transport_if<>.

Public Types

• typedef tlm::tlm_target_socket< 32 > target_socket_4

target socket with BUSWIDTH = 32 bits ( 4 bytes)

• typedef tlm::tlm_target_socket< 64 > target_socket_8

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target socket with BUSWIDTH = 64 bits ( 8 bytes)

• typedef tlm::tlm_target_socket< 128 > target_socket_16

target socket with BUSWIDTH = 128 bits (16 bytes)

• typedef tlm::tlm_target_socket< 256 > target_socket_32

target socket with BUSWIDTH = 256 bits (32 bytes)

• typedef tlm::tlm_target_socket< 512 > target_socket_64

target socket with BUSWIDTH = 512 bits (64 bytes)

Public Member Functions

• target_socket_4 & get_target_socket_4 (xtsc::u32 port_num=0)
Get a reference to a target socket when configured with a 4-byte data interface.

• target_socket_8 & get_target_socket_8 (xtsc::u32 port_num=0)

Get a reference to a target socket when configured with a 8-byte data interface.

• target_socket_16 & get_target_socket_16 (xtsc::u32 port_num=0)

Get a reference to a target socket when configured with a 16-byte data interface.

• target_socket_32 & get_target_socket_32 (xtsc::u32 port_num=0)

Get a reference to a target socket when configured with a 32-byte data interface.

• target_socket_64 & get_target_socket_64 (xtsc::u32 port_num=0)

Get a reference to a target socket when configured with a 64-byte data interface.

• SC_HAS_PROCESS (xtsc_memory_tlm2)
• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

• xtsc_memory_tlm2 (sc_core::sc_module_name module_name, const xtsc_-

memory_tlm2_parms &memory_parms)
Constructor for an xtsc_memory_tlm2.

• virtual ∼xtsc_memory_tlm2 (void)

The destructor.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const

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For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

• void peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗buffer)

Non-hardware reads (for example, reads by the debugger).

• void poke (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8 ∗buffer)

Non-hardware writes (for example, writes from the debugger).

• void byte_dump (xtsc::xtsc_address address8, xtsc::u32 size8, std::ostream

&os=std::cout, bool left_to_right=true, xtsc::u32 bytes_per_line=16, bool show_-
address=true, bool show_hex_values=true, bool do_column_heading=true, bool
show_ascii_values=true, bool adjust_address=true)
This method dumps the specified number of bytes from the memory.

• void execute (const std::string &cmd_line, const std::vector< std::string > &words,
const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

• void connect (xtsc_master_tlm2 &master_tlm2, xtsc::u32 target_socket)

Connect an xtsc_master_tlm2 to this xtsc_memory_tlm2.

• xtsc::u32 connect (xtsc_xttlm2tlm2_transactor &xttlm2tlm2, xtsc::u32 initiator_-

socket=0, xtsc::u32 target_socket=0, bool single_connect=false)
Connect an xtsc_xttlm2tlm2_transactor transactor to this xtsc_memory_tlm2.

• void reset (bool hard_reset=false)

Reset the memory.

• void change_clock_period (xtsc::u32 clock_period_factor)

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Method to change the clock period.

• void invalidate_direct_mem_ptr (xtsc::u32 port, xtsc::u32 start_address, xtsc::u32

end_address)
Helper method to call invalidate_direct_mem_ptr() through the specified port of the appro-
priate socket.

• void nb2b_thread (void)

Convert nb_transport to b_transport (one per port).

• void tlm_accepted_thread (void)

Thread to transition from BEGIN_REQ to END_REQ or BEGIN_RESP for testing purposes
(one per port).

Protected Types
• typedef tlm_utils::peq_with_get< tlm::tlm_generic_payload > peq

Protected Member Functions

• virtual void compute_delays ()
Common method to compute/re-compute time delays.

• void load_initial_values ()
Helper function to initialize memory contents.

• xtsc::u32 get_page (xtsc::xtsc_address address8)

Get the page of memory containing address8 (allocate as needed).

• xtsc::u32 get_page_id (xtsc::xtsc_address address8) const

Get the page of storage corresponding to the specified address.

• xtsc::u32 get_page_offset (xtsc::xtsc_address address8) const

Get the offset into the page of storage corresponding to the specified address.

• virtual xtsc::u8 read_u8 (xtsc::xtsc_address address8)

Helper method to read a u8 value (allocate as needed).

• virtual void write_u8 (xtsc::xtsc_address address8, xtsc::u8 value)

Helper method to write a u8 value (allocate as needed).

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• virtual xtsc::u32 read_u32 (xtsc::xtsc_address address8, bool big_endian=false)

Helper method to read a u32 value (allocate as needed).

• virtual void write_u32 (xtsc::xtsc_address address8, xtsc::u32 value, bool big_-

endian=false)
Helper method to write a u32 value (allocate as needed).

Protected Attributes

• target_socket_4 ∗∗ m_target_sockets_4
Target socket(s) for 4-byte interface.

• target_socket_8 ∗∗ m_target_sockets_8
Target socket(s) for 8-byte interface.

• target_socket_16 ∗∗ m_target_sockets_16
Target socket(s) for 16-byte interface.

• target_socket_32 ∗∗ m_target_sockets_32
Target socket(s) for 32-byte interface.

• target_socket_64 ∗∗ m_target_sockets_64
Target socket(s) for 64-byte interface.

• xtsc_memory_tlm2_parms m_memory_parms
Copy of xtsc_memory_tlm2_parms.

• xtsc::u32 m_num_ports
The number of ports this memory has.

• tlm_fw_transport_if_impl ∗∗ m_tlm_fw_transport_if_impl
The m_target_sockets_BW objects bind to these.

• xtsc::xtsc_memory_b ∗ m_p_memory
The memory itself.

• peq ∗∗ m_nb2b_thread_peq
For nb_transport/nb2b_thread (per port).

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• xtsc::u32 m_port_nb2b_thread
Used by nb2b_thread to get its port number.

• peq ∗∗ m_tlm_accepted_thread_peq
For tlm_accepted_thread (per port).

• xtsc::u32 m_port_tlm_accepted_thread
Used by tlm_accepted_thread to get its port number.

• sc_core::sc_time m_clock_period
The clock period of this memory.

• bool m_immediate_timing
See "immediate_timing" parameter.

• bool m_check_alignment
See "check_alignment" parameter.

• bool m_annotate_delay
See "annotate_delay" parameter.

• sc_core::sc_time m_read_delay
See "read_delay" parameter.

• sc_core::sc_time m_burst_read_delay
See "burst_read_delay" parameter.

• sc_core::sc_time m_burst_read_repeat
See "burst_read_repeat" parameter.

• sc_core::sc_time m_write_delay
See "write_delay" parameter.

• sc_core::sc_time m_burst_write_delay
See "burst_write_delay" parameter.

• sc_core::sc_time m_burst_write_repeat
See "burst_write_repeat" parameter.

• sc_core::sc_time m_nb_transport_delay
See "nb_transport_delay" parameter and command.

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• bool m_test_tlm_accepted
See "test_tlm_accepted" parameter and command.

• bool m_test_end_req_phase
See "test_end_req_phase" parameter and command.

• bool m_read_only
See "read_only" parameter.

• bool m_host_shared_memory
See "host_shared_memory" parameter.

• bool m_allow_dmi
See "allow_dmi" parameter and command.

• std::vector< xtsc::u32 > m_deny_fast_access

For DMI. See "deny_fast_access" paramter.

• tlm::tlm_response_status m_tlm_response_status
Normally TLM_OK_RESPONSE, can be changed using tlm_response_status command.

• xtsc::xtsc_address m_start_address8
The starting byte address of this memory.

• xtsc::u32 m_size8
The byte size of this memory.

• xtsc::u32 m_width8
The byte width of this memories data interface.

• xtsc::xtsc_address m_end_address8
The ending byte address of this memory.

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

• log4xtensa::TextLogger & m_text

Text logger.

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7.86.1 Detailed Description

A PIF, XLMI, or local memory which uses OSCI TLM2. Example module implementing a
configurable memory which uses OSCI TLM2.
On a given port, this memory model always processes transactions in the order they were
received.
You may use this memory directly or just use the code as a starting place for developing
your own memory models.
Here is a block diagram of xtsc_memory_tlm2 objects being used in the xtsc_xttlm2tlm2_-
transactor example:
(*tran_dram0.m_request_exports[0])
(mem_dram0.get_target_socket_4(0))

core0.get_request_port(“dram0ls0”)
tran_dram0.get_initiator_socket_4(0)

dram0ls0
nb_request
b_transport
nb_respond invalidate_direct_mem_ptr
dram0ls0

xtsc_xttlm2tlm2_transactor xtsc_memory_tlm2
tran_dram0 mem_dram0
“num_ports” = 2 “num_ports” = 2
nb_request
dram0ls1

b_transport
nb_respond invalidate_direct_mem_ptr
dram0ls1

xtsc_core core0
(memory_test.out)

nb_request
pif
xtsc_xttlm2tlm2_transactor xtsc_memory_tlm2
tran_pif
b_transport
mem_pif
“num_ports” = 1 “num_ports” = 1
nb_respond invalidate_direct_mem_ptr
pif

(*tran_pif.m_respond_ports[0])

(core0.get_respond_export(“pif”))

Figure 7.11: xtsc_xttlm2tlm2_transactor Example

See also:
xtsc_memory_tlm2_parms
xtsc::xtsc_memory_b
xtsc::xtsc_core
xtsc_xttlm2tlm2_transactor
xtsc_master_tlm2

Definition at line 417 of file xtsc_memory_tlm2.h.

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7.86.2 Constructor & Destructor Documentation

7.86.2.1 xtsc_memory_tlm2 (sc_core::sc_module_name module_name, const

xtsc_memory_tlm2_parms & memory_parms)

Constructor for an xtsc_memory_tlm2.

Parameters:
module_name Name of the xtsc_memory_tlm2 sc_module.
memory_parms The remaining parameters for construction.

See also:
xtsc_memory_tlm2_parms

7.86.3 Member Function Documentation

7.86.3.1 void peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗

buffer) [inline]

Non-hardware reads (for example, reads by the debugger).

See also:
xtsc::xtsc_request_if::nb_peek

Definition at line 494 of file xtsc_memory_tlm2.h.

7.86.3.2 void poke (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8

∗ buffer) [inline]

Non-hardware writes (for example, writes from the debugger).

See also:
xtsc::xtsc_request_if::nb_poke

Definition at line 501 of file xtsc_memory_tlm2.h.

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7.86.3.3 void byte_dump (xtsc::xtsc_address address8, xtsc::u32 size8,

std::ostream & os = std::cout, bool left_to_right = true, xtsc::u32
bytes_per_line = 16, bool show_address = true, bool show_hex_values =
true, bool do_column_heading = true, bool show_ascii_values = true,
bool adjust_address = true) [inline]

This method dumps the specified number of bytes from the memory. Each line of output is
divided into three columnar sections, each of which is optional. The first section contains
an address. The second section contains a hex dump of some (possibly all) of the data
(two hex nibbles and a space for each byte from the memory). The third section contains
an ASCII dump of the same data.

Parameters:
address8 The starting byte address in memory.
size8 The number of bytes of data to dump.
os The ostream object to which the data is to be dumped.
left_to_right If true, the data is dumped in the order: memory[0], memory[1],
..., memory[bytes_per_line-1]. If false, the data is dumped in the order:
memory[bytes_per_line-1], memory[bytes_per_line-2], ..., memory[0].
bytes_per_line The number of bytes to dump on each line of output. If bytes_per_line
is 0 then all size8 bytes are dumped on a single line with no newline at the end. If
bytes_per_line is non-zero, then all lines of output end in newline.
show_address If true, the first columnar section contains an address printed as an
8-hex-digit number with a 0x prefix. If false, the first columnar section is null and
takes no space in the output.
show_hex_values If true, the second (middle) columnar section of hex data values
is printed. If false, the second columnar section is null and takes no space in the
output.
do_column_heading If true, print byte position column headings over the hex val-
ues section. If false, no column headings are printed. If show_hex_values is
false, then the do_column_heading value is ignored and no column headings are
printed.
show_ascii_values If true, the third (last) columnar section of ASCII data values is
printed (if an ASCII value is a non-printable character a period is printed). If
show_ascii_values is false, the third columnar section is null and takes no space
in the output.
adjust_address If adjust_address is true and address8 modulo bytes_per_line is not
0, then offset the printed values on the first line of the hex and ASCII colum-
nar sections and adjust the printed address so that the printed address modulo
bytes_per_line is always zero. Otherwize, do not offset the first printed data val-
ues and do not adjust the printed address.

Definition at line 561 of file xtsc_memory_tlm2.h.

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7.86.3.4 void execute (const std::string & cmd_line, const std::vector< std::string
> & words, const std::vector< std::string > & words_lc, std::ostream &
result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:

allow_dmi 0|1
Set allow_dmi flag to true or false. Return previous value.

change_clock_period <ClockPeriodFactor>
Call xtsc_memory_tlm2::change_clock_period(<ClockPeriodFactor>). Return previous
<ClockPeriodFactor> for this device.

invalidate_direct_mem_ptr <StartAddress> <EndAddress> [<Port>]

Call xtsc_memory_tlm2::invalidate_direct_mem_ptr(<Port, <StartAddress>,
<EndAddress>). Default <Port> is 0.

nb_transport_delay <NumClockPeriods>
Set m_nb_transport_delay to (m_clock_period * <NumClockPeriods>). Return
previous <NumClockPeriods>.

peek <StartAddress> <NumBytes>

Peek <NumBytes> of memory starting at <StartAddress>.

poke <StartAddress> <NumBytes> <Byte1> <Byte2> . . . <ByteN>

Poke <NumBytes> (=N) of memory starting at <StartAddress>.

reset [<Hard>]
Call xtsc_memory_tlm2::reset(<Hard>). Where <Hard> is 0|1 (default 0).

test_end_req_phase 0|1
Set m_test_end_req_phase to 0|1. Return previous value of m_test_end_req_phase.

test_tlm_accepted 0|1
Set m_test_tlm_accepted to 0|1. Return previous value of m_test_tlm_accepted.

tlm_response_status <Status>
Call tlm_generic_payload::set_response_status(<Status>).

Note: The nb_transport_delay, test_end_req_phase, and test_tlm_accepted commands

are only available when "immediate_timing" is false.
Implements xtsc_command_handler_interface.

7.86.3.5 void connect (xtsc_master_tlm2 & master_tlm2, xtsc::u32 target_socket)

Connect an xtsc_master_tlm2 to this xtsc_memory_tlm2. This method connects the spec-

ified xtsc_master_tlm2 to the specified target socket of this xtsc_memory_tlm2.

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Parameters:
master_tlm2 The xtsc_master_tlm2 to connect to this xtsc_memory_tlm2.
target_socket The target socket of this memory to connect the initiator socket of
master_tlm2 to.

7.86.3.6 xtsc::u32 connect (xtsc_xttlm2tlm2_transactor & xttlm2tlm2, xtsc::u32

initiator_socket = 0, xtsc::u32 target_socket = 0, bool single_connect =
false)

Connect an xtsc_xttlm2tlm2_transactor transactor to this xtsc_memory_tlm2. This method

connects the specified initiator socket(s) of the xtsc_xttlm2tlm2_transactor to specified tar-
get socket(s) of this xtsc_memory_tlm2.

Parameters:
xttlm2tlm2 The xtsc_xttlm2tlm2_transactor to connect to this xtsc_memory_tlm2.
initiator_socket The xttlm2tlm2 initiator socket to connect to.
target_socket The target socket of this memory to connect the initiator socket of xt-
tlm2tlm2 to.
single_connect If true only one socket of this memory will be connected. If false, the
default, then all contiguous, unconnected socket numbers of this memory starting
at target_socket that have a corresponding existing socket in xttlm2tlm2 (starting
at initiator_socket) will be connected to that corresponding socket in xttlm2tlm2.

Returns:
number of sockets that were connected by this call (1 or more)

7.86.3.7 void change_clock_period (xtsc::u32 clock_period_factor)

Method to change the clock period.

Parameters:
clock_period_factor Specifies the new length of this device’s clock period expressed
in terms of the SystemC time resolution (from sc_get_time_resolution()).

7.86.3.8 void load_initial_values () [inline, protected]

Helper function to initialize memory contents.

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See also:
xtsc::xtsc_memory_b::load_initial_values

Definition at line 755 of file xtsc_memory_tlm2.h.

The documentation for this class was generated from the following file:

• xtsc_memory_tlm2.h

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7.87 xtsc_memory_tlm2_parms Class Reference

Constructor parameters for a xtsc_memory_tlm2 object.

#include <xtsc/xtsc_memory_tlm2.h>Inheritance diagram for xtsc_memory_tlm2_-
parms:

xtsc_parms

xtsc_memory_tlm2_parms

Collaboration diagram for xtsc_memory_tlm2_parms:

xtsc_parms

xtsc_memory_tlm2_parms

Public Member Functions

• xtsc_memory_tlm2_parms (xtsc::u32 width8=4, xtsc::u32 delay=0, xtsc::u32 start_-

address8=0, xtsc::u32 size8=0, xtsc::u32 num_ports=1)
Constructor for an xtsc_memory_tlm2_parms object.

• xtsc_memory_tlm2_parms (const xtsc::xtsc_core &core, const char ∗memory_-

interface, xtsc::u32 delay=0xFFFFFFFF, xtsc::u32 num_ports=0)
Constructor for an xtsc_memory_tlm2_parms object based upon an xtsc_core object and
a named memory interface.

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• void init (xtsc::u32 width8=4, xtsc::u32 delay=0, xtsc::u32 start_address8=0,

xtsc::u32 size8=0, xtsc::u32 num_ports=1)
Do initialization common to both constructors.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

7.87.1 Detailed Description

Constructor parameters for a xtsc_memory_tlm2 object. This class contains the construc-
tor parameters for an xtsc_memory_tlm2 object.

Name Type Description

------------------ ---- -------------------------------------------------------

"num_ports" u32 The number of slave port pairs this memory has. This
defines how many memory interface master devices will be
connected with this memory.
Default = 1.
Minimum = 1.

"byte_width" u32 Memory data interface width in bytes. Valid values are
4, 8, 16, 32, and 64.

"start_byte_address" u32 The starting byte address of this memory in the 4GB
address space.

"memory_byte_size" u32 The byte size of this memory. 0 means the memory
occupies all of the 4GB address space at and above
"start_byte_address".

"clock_period" u32 This is the length of this memory's clock period

expressed in terms of the SystemC time resolution
(from sc_get_time_resolution()). A value of
0xFFFFFFFF means to use the XTSC system clock
period (from xtsc_get_system_clock_period()).
A value of 0 means one delta cycle.
Default = 0xFFFFFFFF (i.e. use the system clock
period).

"check_alignment" bool If true, requests will get tlm_response_status of

TLM_ADDRESS_ERROR_RESPONSE if their size (data length)
is less then the bus width and either the size is not a
power of 2 or the address is not size-aligned.
In addition, requests whose size is greater then the bus
width but is not a multiple of the bus width will get
tlm_response_status of TLM_BURST_ERROR_RESPONSE.
If false, these checks are not performed.
Default = true (check alignment).

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Note: A TLM2 transaction is considered a burst transfer transaction if the generic

payload data length attribute is greater then the BUSWIDTH template parameter
of the socket. The number of nominal beats in a burst transfer is equal to:
N = ceil(Payload_Data_Length_Attribute / BUSWIDTH)

"read_delay" u32 Specifies the delay for a non-burst read transaction.

If "annotate_delay" is true, then this delay is added to
the time argument of the b_transport call.
If "annotate_delay" is false, a SystemC wait is done
for this delay.
Default = As specified by delay argument to constructor.

"burst_read_delay" u32 Specifies the delay for the nominal first beat of a
burst read command. For a burst read command comprised
of N nominal beats, the total delay is calculated as:
total_delay = burst_read_delay + burst_read_repeat * (N-1)
If "annotate_delay" is true, then total_delay is added
to the time argument of the b_transport call.
If "annotate_delay" is false, a SystemC wait is done
for total_delay.
Default = As specified by delay argument to constructor.

"burst_read_repeat" u32 Specifies the delay for each of the nominal second
through last beat of a burst read command. See the
"burst_read_delay" parameter.
Default = 1.

"write_delay" u32 Specifies the delay for a non-burst write transaction.

If "annotate_delay" is true, then this delay is added to
the time argument of the b_transport call.
If "annotate_delay" is false, a SystemC wait is done
for this delay.
Default = As specified by delay argument to constructor.

"burst_write_delay" u32 Specifies the delay for the nominal first beat of a
burst write command. For a burst write command comprised
of N nominal beats, the total delay is calculated as:
total_delay = burst_write_delay + burst_write_repeat * (N-1)
If "annotate_delay" is true, then total_delay is added
to the time argument of the b_transport call.
If "annotate_delay" is false, a SystemC wait is done
for total_delay.
Default = As specified by delay argument to constructor.

"burst_write_repeat" u32 Specifies the delay for each of the nominal second
through last beat of a burst write command. See the
"burst_write_delay" parameter.
Default = As specified by delay argument to constructor.

"annotate_delay" bool If true, the appropriate delay (as specified by the

above delay parameters) is added to the sc_time argument
of the b_transport() call and the b_transport()
implementation does not call wait().
If false, wait() is called with the appropriate delay
(as specified by the above delay parameters) and the
sc_time argument of the b_transport() call is not
modified.

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Default = true.

"nb_transport_delay" u32 Specifies the delay in terms of this device's clock

period to add to the time value of the nb_transport_fw()
call.
This parameter is for testing purposes and is ignored if
"immediate_timing" is true.
Default = 0.

"test_tlm_accepted" bool If true, a separate thread will be used to transition

from BEGIN_REQ to END_REQ or BEGIN_RESP (depending on
"test_end_req_phase") when nb_transport_fw() is called.
This parameter is for testing purposes and is ignored if
"immediate_timing" is true.
Default = false.

"test_end_req_phase" bool If true, the tlm_accepted_thread will cause an explicit

END_REQ phase by calling nb_transport_bw().
This parameter is for testing purposes and is ignored if
"immediate_timing" is true or "test_tlm_accepted" is
false.
Default = false.

"immediate_timing" bool If true, the above delays parameters are ignored and
the memory model responds to all requests immediately
(without any delay--not even a delta cycle). If false,
the above delay parameters are used to determine
response timing.
Default = false.

"page_byte_size" u32 The byte size of a page of memory. A page of memory in

the model is not allocated until it is accessed. This
parameter specifies the page allocation size.
Default is 16 Kilobytes (1024*16=16384=0x4000).
Minimum page size is 16*byte_width (or 256 if
"byte_width" is 0).
Note: "page_byte_size" must be a power of 2.
Note: "page_byte_size" should evenly divide
"start_byte_address".

"initial_value_file" char* If not NULL or empty, this names a text file from which
to read the initial memory contents as byte values.
Note: "initial_value_file" should not be set when
"host_shared_memory" is true.
Default = NULL.
The text file format is:

([@<Offset>] <Value>*)*

1. Any number (<Offset> or <Value>) can be in decimal

or hexadecimal (using '0x' prefix) format.
2. @<Offset> is added to "start_byte_address".
3. <Value> cannot exceed 255 (0xFF).
4. If a <Value> entry is not immediately preceeded in
the file by an @<Offset> entry, then its offset is
one greater than the preceeding <Value> entry.
5. If the first <Value> entry in the file is not

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preceeded by an @<Offset> entry, then its offset

is zero.
6. Comments, extra whitespace, and blank lines are
ignored. See xtsc::xtsc_script_file.

Example text file contents:

0x01 0x02 0x3 // First three bytes of the memory,

// 0x01 is at "start_byte_address"
@0x1000 50 // The byte at offset 0x1000 is 50
51 52 // The byte at offset 0x1001 is 51
// The byte at offset 0x1002 is 52

"memory_fill_byte" u32 The low byte specifies the value used to initialize
memory contents at address locations not initialize
from "initial_value_file".
Note: "memory_fill_byte" does not apply when
"host_shared_memory" is true.
Default = 0.

"host_shared_memory" bool If true the backing store for this memory will be host
OS shared memory (created using shm_open() on Linux and
CreateFileMapping() on MS Windows). If this parameter
is true then "memory_fill_byte" and "initial_value_file"
do not apply and must be left at their default value.
If desired, a Lua script can be used to initialize
memory contents. See "lua_script_file_eoe" in
xtsc:xtsc_initialize_parms.
Default = false.

"shared_memory_name" char* The shared memory name to use when creating host OS
shared memory. If this parameter is left at its default
setting of NULL, then the default name will be formed by
concatenating the user name, a period, and the module
instance hierarchical name. For example:
MS Windows: joeuser.myshmem
Linux: /dev/shm/joeuser.myshmem
This parameter is ignored if "host_shared_memory" is
false.
Default = NULL (use default shared memory name)

"read_only" bool If true this memory model represents a ROM which

does not support WRITE transactions. Use
"initial_value_file" to initialize the ROM. The
transport_dbg() method may also be used to initialize or
change the ROM contents.
Default = false.

"allow_dmi" bool If true, this memory will support DMI except to address
ranges as specified by the "deny_fast_access" parameter.
If false, all DMI requests will be denied.
Default = true.

"deny_fast_access" vector<u32> A std::vector containing an even number of

addresses. Each pair of addresses specifies a range of
addresses that will be denied fast access. The first

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address in each pair is the start address and the second

address in each pair is the end address.

See also:
xtsc_memory_tlm2
xtsc::xtsc_parms

Definition at line 268 of file xtsc_memory_tlm2.h.

7.87.2 Constructor & Destructor Documentation

7.87.2.1 xtsc_memory_tlm2_parms (xtsc::u32 width8 = 4, xtsc::u32 delay = 0,

xtsc::u32 start_address8 = 0, xtsc::u32 size8 = 0, xtsc::u32 num_ports =
1) [inline]

Constructor for an xtsc_memory_tlm2_parms object. After the object is constructed, the

data members can be directly written using the appropriate xtsc_parms::set() method in
cases where non-default values are desired.

Parameters:
width8 Memory data interface width in bytes.
delay Default delay for read and write in terms of this memory’s clock period (see
"clock_period"). Local memory devices should use a delay of 0 for a 5-stage
pipeline and a delay of 1 for a 7-stage pipeline. PIF memory devices should use
a delay of 1 or more.
start_address8 The starting byte address of this memory.
size8 The byte size of this memory. 0 means the memory occupies all of the 4GB
address space at and above start_address8.
num_ports The number of ports this memory has.

Definition at line 293 of file xtsc_memory_tlm2.h.

7.87.2.2 xtsc_memory_tlm2_parms (const xtsc::xtsc_core & core, const char ∗

memory_interface, xtsc::u32 delay = 0xFFFFFFFF, xtsc::u32 num_ports =
0)

Constructor for an xtsc_memory_tlm2_parms object based upon an xtsc_core object and

a named memory interface. This constructor will determine width8, delay, start_address8,
size8, and, optionally, num_ports by querying the core object and then pass the values to

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the init() method. If memory_interface is a ROM interface, then "read_only" will be be set to
true. In addition, the "clock_period" parameter will be set to match the core’s clock period.
For PIF memories, start_address8 and size8 will both be 0 indicating a memory which
spans the entire 4 gigabyte address space. For non-PIF memories, "check_alignment" will
be set to false. If desired, after the xtsc_memory_tlm2_parms object is constructed, its data
members can be changed using the appropriate xtsc_parms::set() method before passing
it to the xtsc_memory_tlm2 constructor.

Parameters:
core A reference to the xtsc_core object upon which to base the xtsc_memory_tlm2_-
parms.
memory_interface The memory interface name (port name). Note: The core config-
uration must have the named memory interface.
delay Default delay for PIF read and write in terms of this memory’s clock period (see
"clock_period"). PIF memory devices should use a delay of 1 or more. A value
of 0xFFFFFFFF (the default) means to use a delay of 1 if the core has a 5-stage
pipeline and a delay of 2 if the core has a 7-stage pipeline. This parameter is
ignored except for PIF memory interfaces.
num_ports The number of ports this memory has. If 0, the default, the number of
ports (1 or 2) will be inferred thusly: If memory_interface is a LD/ST unit 0 port
of a dual-ported core interface, and the core is dual-ported and has no CBox,
and if the 2nd port of the core has not been bound, then "num_ports" will be 2;
otherwise, "num_ports" will be 1.

See also:
xtsc::xtsc_core::How_to_do_memory_port_binding for a list of legal memory_interface
values.

The documentation for this class was generated from the following file:

• xtsc_memory_tlm2.h

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7.88 xtsc_memory_trace Class Reference

Example XTSC model which generates a value-change dump (VCD) file of the data mem-
bers of each xtsc::xtsc_request and xtsc::xtsc_response that passes through it ("allow_-
tracing" true) and/or which tracks the lifetime, latency, and counters of each transaction by
request type and by port number ("track_latency" true).
#include <xtsc/xtsc_memory_trace.h>Inheritance diagram for xtsc_memory_trace:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface

xtsc_memory_trace

Collaboration diagram for xtsc_memory_trace:

xtsc_respond_if

m_trace xtsc_respond_if_impl

m_respond_impl
xtsc_command_handler_interface xtsc_memory_trace
xtsc_connection_interface m_request_impl

xtsc_module
m_trace
xtsc_resettable xtsc_request_if_impl

xtsc_debug_if xtsc_request_if

Classes
• class statistic_info
This class is used to keep track of transaction statistics.

• class transaction_info
This class is used to keep track of 4 key times during each transaction’s lifecycle in order
to compute transaciton lifetime and latency.

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• class xtsc_request_if_impl
Implementation of xtsc_request_if.

• class xtsc_respond_if_impl
Implementation of xtsc_respond_if.

Public Member Functions

• virtual const char ∗ kind () const

Our C++ type (SystemC uses this).

• xtsc_memory_trace (sc_core::sc_module_name module_name, const xtsc_-

memory_trace_parms &trace_parms)
Constructor for an xtsc_memory_trace.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• xtsc::u32 get_num_ports ()
Get the number of memory ports this memory trace device has.

• sc_core::sc_trace_file ∗ get_trace_file ()
Get a pointer to the VCD object that this memory trace device is using.

• void reset (bool hard_reset=false)

Reset the xtsc_memory_trace.

• bool is_tracing_enabled () const

Return whether or not tracing is enabled.

• void enable_tracing (bool enable)

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Set whether or not tracing is enabled.

• bool is_latency_tracking_enabled () const

Return whether or not latency tracking is enabled.

• void enable_latency_tracking (bool enable)

Set whether or not latency tracking is enabled.

• void end_of_simulation ()
SystemC calls this method at the end of simulation.

• void dump_latencies (std::ostream &os=std::cout)

Dump maximum latencies and lifetimes observed for each xtsc::xtsc_request::type_t type.

• xtsc::u64 get_counter (const std::string &cntr_name, const std::string &types="",

const std::string &ports="")
Return the value of the specified counter for the specified xtsc::xtsc_request::type_t type
and specified port.

• void dump_statistic_info (std::ostream &os=std::cout, const std::string &types="",

const std::string &ports="")
Dump statistic info for the specified xtsc::xtsc_request::type_t types and ports to the speci-
fied ostream object.

• void dump_latency_histogram (std::ostream &os=std::cout, const std::string

&types="", const std::string &ports="")
Dump an aggregate histogram of the latency values for the specified xtsc::xtsc_-
request::type_t types and ports to the specified ostream object.

• void dump_lifetime_histogram (std::ostream &os=std::cout, const std::string

&types="", const std::string &ports="")
Dump an aggregate histogram of the lifetime values for the specified xtsc::xtsc_-
request::type_t types and ports to the specified ostream object.

• virtual void execute (const std::string &cmd_line, const std::vector< std::string >
&words, const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

• void connect (xtsc_arbiter &arbiter, xtsc::u32 trace_port=0)

Connect an upstream xtsc_arbiter with this xtsc_memory_trace.

• xtsc::u32 connect (xtsc::xtsc_core &core, const char ∗memory_port_name, xtsc::u32

port_num=0, bool single_connect=false)

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Connect with an upstream or downstream (inbound pif) xtsc_core.

• void connect (xtsc_dma_engine &dma_engine, xtsc::u32 trace_port=0)

Connect with an xtsc_dma_engine.

• void connect (xtsc_master &master, xtsc::u32 trace_port=0)

Connect with an xtsc_master.

• xtsc::u32 connect (xtsc_pin2tlm_memory_transactor &pin2tlm, xtsc::u32 tran_-

port=0, xtsc::u32 trace_port=0, bool single_connect=false)
Connect with an xtsc_pin2tlm_memory_transactor.

• void connect (xtsc_router &router, xtsc::u32 router_port, xtsc::u32 trace_port)

Connect with an upstream xtsc_router.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

Public Attributes
• sc_core::sc_export< xtsc::xtsc_request_if > ∗∗ m_request_exports
From multi-ported master or multiple masters to us.

• sc_core::sc_port< xtsc::xtsc_request_if > ∗∗ m_request_ports

From us to multi-ported slave or multiple slaves.

• sc_core::sc_export< xtsc::xtsc_respond_if > ∗∗ m_respond_exports

From multi-port slave or multiple slaves to us.

• sc_core::sc_port< xtsc::xtsc_respond_if > ∗∗ m_respond_ports

From us to multi-ported master or multiple masters.

Protected Types
• enum cntr_type {
cntr_transactions = 0,
cntr_latency,
cntr_lifetime,

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cntr_req_beats,
cntr_req_busys,
cntr_rsp_beats,
cntr_rsp_busys,
cntr_count }
enum for the various counters in the statistic_info class

• typedef xtsc::xtsc_request::type_t type_t

• typedef xtsc::u64 u64

Protected Member Functions

• bool get_types (const std::string &types, std::set< type_t > &types_set)
Common helper method to determine the all_types flag and populate the types_set con-
tainer.

• bool get_ports (const std::string &ports, std::set< xtsc::u32 > &ports_set)

Common helper method to determine the all_ports flag and populate the ports_set con-
tainer.

• void dump_histogram (std::ostream &os=std::cout, const std::string &types="", const

std::string &ports="", bool latency=true)
Common helper method used by dump_latency_histogram and dump_lifetime_histogram.

• void clear_transaction_list ()
• transaction_info ∗ new_transaction_info (type_t type)
Get a new transaction_info (from the pool).

• void delete_transaction_info (transaction_info ∗&p_transaction_info)

Delete an transaction_info (return it to the pool).

Static Protected Member Functions

• static void dump_counter_names (std::ostream &os)
Dump the string version of all the counter names.

• static std::string get_cntr_type_name (cntr_type type)

Return the string version of the specified counter type.

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• static cntr_type get_cntr_type (std::string name)

Return the specified counter type given its string name.

Protected Attributes
• xtsc_request_if_impl ∗∗ m_request_impl
m_request_exports bind to these

• xtsc_respond_if_impl ∗∗ m_respond_impl
m_respond_exports bind to these

• xtsc::u32 m_width8
The byte width of the memory data interface.

• bool m_big_endian
Swizzle the bytes in the request/response data bufer.

• sc_core::sc_trace_file ∗ m_p_trace_file
The VCD object.

• xtsc::u32 m_num_ports
The number of memory ports.

• xtsc::u32 m_num_transfers
See "num_transfers" parameter.

• bool m_allow_tracing
See "allow_tracing" parameter.

• bool m_enable_tracing
See "enable_tracing" parameter enable_tracing method/command.

• bool m_track_latency
See "track_latency" parameter and enable_latency_tracking method/command.

• bool m_did_track
True if m_track_latency was ever true.

• std::vector< transaction_info ∗ > m_transaction_pool

Maintain a pool of transaction_info objects to improve performance.

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• std::map< u64, transaction_info ∗ > m_pending_transactions

Map of all transactions in progress.

• std::map< type_t, statistic_info ∗ > ∗ m_statistics_maps

Map request type to statistic_info (one map per port).

• sc_core::sc_time m_system_clock_period
The XTSC System Clock Period (SCP).

• sc_core::sc_time m_system_clock_period_half
One-half of the XTSC System Clock Period (SCP/2).

• log4xtensa::TextLogger & m_text

Text logger.

7.88.1 Detailed Description

Example XTSC model which generates a value-change dump (VCD) file of the data mem-
bers of each xtsc::xtsc_request and xtsc::xtsc_response that passes through it ("allow_-
tracing" true) and/or which tracks the lifetime, latency, and counters of each transaction
by request type and by port number ("track_latency" true). This module is designed to be
inserted between a memory interface master (for example, an xtsc_core) and a memory
interface slave (for example, an xtsc_memory) to generate a VCD file trace of the data
members of each xtsc::xtsc_request that the master sends the slave and each xtsc::xtsc_-
response that the slave sends the master and/or to track the lifetime, latency, and counters
of each transaction.
When doing VCD tracing, each request and each response is counted and the counts are
traced. In addition, each RSP_OK response and each RSP_NACC response are sepa-
rately counted and traced to make it easier to detect when an RSP_NACC response hap-
pens in the same cycle as an RSP_OK response. VCD tracing can be turned off and on
during simulation using the enable_tracing method and/or command.
When the "track_latency" parameter is true, lifetime and latency histograms and transac-
tion, beat, and busy counters are maintained. This can be turned off and on during simu-
lation using the enable_latency_tracking method and/or command. Informally, transaction
lifetime is the number of clock periods between when the first request of the transaction
is first received from the upstream device and when the last response of the transaction
is accepted by the upstream device, while transaction latency is the number of clock peri-
ods between when the last request is accepted by the downstream device and when the
first response returns from the downstream device. See transaction_info for the formal
definition.

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Here is a block diagram of an xtsc_memory_trace as it is used in the xtsc_memory_trace

example:

req req
dram0ls0

dram0ls0
rsp rsp
xtsc_memory_trace xtsc_memory
trace_dram0 mem_dram0
“num_ports” = 2 “num_ports” = 2
req req
dram0ls1

dram0ls1
rsp rsp

xtsc_core core0
(memory_test.out)

req req
pif

xtsc_memory_trace xtsc_memory
trace_pif mem_pif
pif
rsp “num_ports” = 1 rsp “num_ports” = 1

Figure 7.12: xtsc_memory_trace Example

See also:
xtsc_memory_trace_parms
xtsc::xtsc_request_if
xtsc::xtsc_respond_if
transaction_info
statistic_info
cntr_type
get_counter
dump_statistic_info
dump_latency_histogram
dump_lifetime_histogram

Definition at line 256 of file xtsc_memory_trace.h.

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7.88.2 Member Enumeration Documentation

7.88.2.1 enum cntr_type [protected]

enum for the various counters in the statistic_info class

Enumerator:
cntr_transactions "transactions": Total transactions
cntr_latency "latency": Total latency of all transactions
cntr_lifetime "lifetime": Total lifetime of all transactions
cntr_req_beats "req_beats": Total request beats
cntr_req_busys "req_busys": Total request beats that get RSP_NACC
cntr_rsp_beats "rsp_beats": Total response beats (does NOT include RSP_NACC)

cntr_rsp_busys "rsp_busys": Total response beats that get rejected

Definition at line 806 of file xtsc_memory_trace.h.

7.88.3 Constructor & Destructor Documentation

7.88.3.1 xtsc_memory_trace (sc_core::sc_module_name module_name, const

xtsc_memory_trace_parms & trace_parms)

Constructor for an xtsc_memory_trace.

Parameters:
module_name Name of the xtsc_memory_trace sc_module.
trace_parms The remaining parameters for construction.

See also:
xtsc_memory_trace_parms

7.88.4 Member Function Documentation

7.88.4.1 bool is_tracing_enabled () const [inline]

Return whether or not tracing is enabled.

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See also:
xtsc_memory_trace_parms "enable_tracing".

Definition at line 313 of file xtsc_memory_trace.h.

7.88.4.2 void enable_tracing (bool enable)

Set whether or not tracing is enabled.

See also:
xtsc_memory_trace_parms "enable_tracing".

7.88.4.3 bool is_latency_tracking_enabled () const [inline]

Return whether or not latency tracking is enabled.

See also:
xtsc_memory_trace_parms "track_latency".

Definition at line 329 of file xtsc_memory_trace.h.

7.88.4.4 void enable_latency_tracking (bool enable)

Set whether or not latency tracking is enabled.

See also:
xtsc_memory_trace_parms "track_latency".

7.88.4.5 void dump_latencies (std::ostream & os = std::cout)

Dump maximum latencies and lifetimes observed for each xtsc::xtsc_request::type_t type.
This method is deprecated in favor of the dump_statistic_info() method which provides
more useful information.
Parameters:
os The ostream object to which the results should be dumped.

See also:
"track_latency" in xtsc_memory_trace_parms.

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7.88.4.6 xtsc::u64 get_counter (const std::string & cntr_name, const std::string &
types = "", const std::string & ports = "")

Return the value of the specified counter for the specified xtsc::xtsc_request::type_t type
and specified port. This method returns the value of the specified counter for the specified
request type and specified port. Multiple request types and multiple ports can be specified,
in which case the method returns the sum of the values of the specified counter for all
matching request types and ports.

Parameters:
cntr_name The desired counter name. See cntr_type.
types A comma separated list of the xtsc::xtsc_request::type_t types desired (for ex-
ample, "READ,BLOCK_READ"). The empty string ("") or asterisk ("∗") both mean
all tracked request types.
ports A comma separated list of the desired port numbers (for examples, "1,3,5").
The empty string ("") or asterisk ("∗") both mean all ports.

See also:
dump_counter_names
cntr_type

7.88.4.7 void dump_statistic_info (std::ostream & os = std::cout, const

std::string & types = "", const std::string & ports = "")

Dump statistic info for the specified xtsc::xtsc_request::type_t types and ports to the spec-
ified ostream object. Method dumps a block of statistic info for each specified xtsc::xtsc_-
request::type_t type of each specified port. For example, here is a sample output block
when this method was called with types of "BLOCK_READ" and ports of "1" (the Counters
and Average lines are shown on multiple lines due to printing limitations in some media):

Port #1 BLOCK_READ:
Counters: transactions=4 latency=111 lifetime=200 req_beats=18 req_busys=14
rsp_beats=79 rsp_busys=15
Average per transaction: latency=27.75 lifetime=50 req_beats=4.5 req_busys=3.5
rsp_beats=19.75 rsp_busys=3.75
Histograms (Format: NumCycles=TranCount):
latency: 2=1,16=1,46=1,47=1 (tag=5)
lifetime: 17=1,46=1,61=1,76=1 (tag=5)

The value in parenthesis at the end of the histograms is the tag of the first transaction
during simulation with the maximum (last) NumCycles value.

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Parameters:
types A comma separated list of xtsc::xtsc_request::type_t types desired (for exam-
ple, "READ,BLOCK_READ"). The empty string ("") or asterisk ("∗") both mean all
tracked request types.
ports A comma separated list of the desired port numbers (for examples, "1,3,5").
The empty string ("") or asterisk ("∗") both mean all ports.

See also:
xtsc_memory_trace for the definition of transaction latency and lifetime
statistic_info
cntr_type

7.88.4.8 void dump_latency_histogram (std::ostream & os = std::cout, const

std::string & types = "", const std::string & ports = "")

Dump an aggregate histogram of the latency values for the specified xtsc::xtsc_-
request::type_t types and ports to the specified ostream object. This method dumps a
histogram of the latency values for the specified request type and port. For example, here
is a sample output block when this method was called with types of "BLOCK_READ" and
ports of "1" using the same simulation as shown for dump_statistic_info:

2,1
16,1
46,1
47,1

If this method is called for multiple types or ports then an aggregate histogram is formed by
combining the individual histograms. For example, if the same simulation had 2 BLOCK_-
WRITE transactions on Port #1, one with a latency of 2 cycles and the other with a latency
of 8 cycles, and this method were called with types of "BLOCK_READ,BLOCK_WRITE"
and ports of "1", then the output would be:

2,2
8,1
16,1
46,1
47,1

Parameters:
types A comma separated list of the xtsc::xtsc_request::type_t types desired (for ex-
ample, "READ,BLOCK_READ"). The empty string ("") or asterisk ("∗") both mean
all tracked request types.
ports A comma separated list of the desired port numbers (for examples, "1,3,5").
The empty string ("") or asterisk ("∗") both mean all ports.

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See also:
statistic_info
cntr_type

7.88.4.9 void dump_lifetime_histogram (std::ostream & os = std::cout, const

std::string & types = "", const std::string & ports = "")

Dump an aggregate histogram of the lifetime values for the specified xtsc::xtsc_-
request::type_t types and ports to the specified ostream object. This method dumps a
histogram of the lifetime values for the specified request type and port. For example, here
is a sample output block when this method was called with types of "BLOCK_READ" and
ports of "1" using the same simulation as shown for dump_statistic_info:

17,1
46,1
61,1
76,1

If this method is called for multiple types or ports then an aggregate histogram is formed by
combining the individual histograms.

Parameters:
types A comma separated list of the xtsc::xtsc_request::type_t types desired (for ex-
ample, "READ,BLOCK_READ"). The empty string ("") or asterisk ("∗") both mean
all tracked request types.
ports A comma separated list of the desired port numbers (for examples, "1,3,5").
The empty string ("") or asterisk ("∗") both mean all ports.

See also:
statistic_info
cntr_type

7.88.4.10 virtual void execute (const std::string & cmd_line, const std::vector<
std::string > & words, const std::vector< std::string > & words_lc,
std::ostream & result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:

dump_counter_names
Dump a list of valid counter names by calling dump_counter_names().

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dump_latency_histogram [<Types> [<Ports>]]

Call dump_latency_histogram() for the specified request <Types> and <Ports>.
Default all <Types> and <Ports>.

dump_lifetime_histogram [<Types> [<Ports>]]

Call dump_lifetime_histogram() for the specified request <Types> and <Ports>.
Default all <Types> and <Ports>.

dump_statistic_info [<Types> [<Ports>]]

Call statistic_info::dump() for each of the specified request <Types> and <Ports>.
Default all <Types> and <Ports>.

enable_latency_tracking <Enable>
Call xtsc_memory_trace::enable_latency_tracking(<Enable>).
Set whether or not latency tracking is enabled.

enable_tracing <Enable>
Call xtsc_memory_trace::enable_tracing(<Enable>).
Set whether or not tracing is enabled.

get_counter <CntrName> [<Types> [<Ports>]]

Return value from calling xtsc_memory_trace::get_counter(<CntrName>, <Types>, <Ports>).
Default all <Types> and <Ports>.

get_num_ports
Return value from calling xtsc_memory_trace::get_num_ports().

reset
Call xtsc_memory_trace::reset().

Implements xtsc_command_handler_interface.

7.88.4.11 void connect (xtsc_arbiter & arbiter, xtsc::u32 trace_port = 0)

Connect an upstream xtsc_arbiter with this xtsc_memory_trace. This method connects the
master port pair of the specified xtsc_arbiter to the specified slave port pair of this xtsc_-
memory_trace.

Parameters:
arbiter The xtsc_arbiter to connect with.
trace_port The slave port pair of this xtsc_memory_trace to connect the xtsc_arbiter
with. trace_port must be in the range of 0 to this xtsc_memory_trace’s "num_-
ports" parameter minus 1.

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7.88.4.12 xtsc::u32 connect (xtsc::xtsc_core & core, const char ∗

memory_port_name, xtsc::u32 port_num = 0, bool single_connect =
false)

Connect with an upstream or downstream (inbound pif) xtsc_core. This method connects
this xtsc_memory_trace with the memory interface specified by memory_port_name of the
xtsc_core specified by core. If memory_port_name is "inbound_pif" or "snoop", then a
master port pair of this xtsc_memory_trace is connected with the inbound pif or snoop
slave port pair (respectively) of core. If memory_port_name is neither "inbound_pif" nor
"snoop", then the master port pair of core specified by memory_port_name is connected
with a slave port pair of this xtsc_memory_trace

Parameters:
core The xtsc_core to connect with.
memory_port_name The name of the xtsc_core memory interface to connect with.
Case-insensitive.
port_num If memory_port_name is "inbound_pif" or "snoop" then this specifies the
master port pair of this xtsc_memory_trace to connect with core. If memory_-
port_name is neither "inbound_pif" nor "snoop" then this specifies the slave port
pair of this xtsc_memory_trace to connect with core.
single_connect If true only one slave port pair of this device will be connected. If
false, the default, and if memory_port_name names the first port of an uncon-
nected multi-ported interface of core and if port_num is 0 and if the number of
ports this device has matches the number of multi-ports in the core interface, then
all master port pairs of the core interface specified by memory_port_name will be
connected to the slave port pairs of this xtsc_memory_trace. This parameter is
ignored if memory_port_name is "inbound_pif" or "snoop".

Returns:
number of ports that were connected by this call (1 or 2)

See also:
xtsc::xtsc_core::How_to_do_memory_port_binding for a list of valid memory_port_-
name values.

Note: The snoop port is reserved for future use.

7.88.4.13 void connect (xtsc_dma_engine & dma_engine, xtsc::u32 trace_port = 0)

Connect with an xtsc_dma_engine. This method connects the master port pair of the
specified xtsc_dma_engine with the specified slave port pair of this xtsc_memory_trace.

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Parameters:
dma_engine The xtsc_dma_engine to connect with.
trace_port The slave port pair of this xtsc_memory_trace to connect the xtsc_dma_-
engine with.

7.88.4.14 void connect (xtsc_master & master, xtsc::u32 trace_port = 0)

Connect with an xtsc_master. This method connects the master port pair of the specified
xtsc_master with the specified slave port pair of this xtsc_memory_trace.

Parameters:
master The xtsc_master to connect with.
trace_port The slave port pair of this xtsc_memory_trace to connect the xtsc_master
with.

7.88.4.15 xtsc::u32 connect (xtsc_pin2tlm_memory_transactor & pin2tlm,

xtsc::u32 tran_port = 0, xtsc::u32 trace_port = 0, bool single_connect =
false)

Connect with an xtsc_pin2tlm_memory_transactor. This method connects this xtsc_-

memory_trace with the specified TLM master port pair of the specified xtsc_pin2tlm_-
memory_transactor.

Parameters:
pin2tlm The xtsc_pin2tlm_memory_transactor to connect with this xtsc_memory_-
trace.
tran_port The xtsc_pin2tlm_memory_transactor TLM master port pair to connect with
this xtsc_memory_trace.
trace_port The slave port pair of this xtsc_memory_trace to connect the xtsc_-
pin2tlm_memory_transactor with.
single_connect If true only one slave port pair of this xtsc_memory_trace will be con-
nected. If false, the default, then all contiguous, unconnected slave port pairs of
this xtsc_memory_trace starting at trace_port that have a corresponding exist-
ing master port pair in pin2tlm (starting at tran_port) will be connected with that
corresponding pin2tlm master port pair.

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7.88.4.16 void connect (xtsc_router & router, xtsc::u32 router_port, xtsc::u32

trace_port)

Connect with an upstream xtsc_router. This method connects the specified master port
pair of the specified upstream xtsc_router with the specified slave port pair of this xtsc_-
memory_trace.

Parameters:
router The upstream xtsc_router to connect with.
router_port The master port pair of the upstream xtsc_router to connect with. router_-
port must be in the range of 0 to the upstream xtsc_router’s "num_slaves" param-
eter minus 1.
trace_port The slave port pair of this xtsc_memory_trace to connect with. trace_port
must be in the range of 0 to this xtsc_memory_trace’s "num_ports" parameter
minus 1.

7.88.4.17 bool get_types (const std::string & types, std::set< type_t > &
types_set) [protected]

Common helper method to determine the all_types flag and populate the types_set con-
tainer. This method returns true if types is the empty string or "∗" (both indicate all types).
Otherwise it returns false and populates the types_set container with each xtsc::xtsc_-
request::type_t type whose string name is listed in types.

Parameters:
types A comma separated list of the xtsc::xtsc_request::type_t types desired (for ex-
ample, "READ,BLOCK_READ"). Both the empty string or asterisk ("" or "∗") mean
all types.
types_set If types is neither "" nor "∗", then this container will be populated with the
xtsc::xtsc_request::type_t values found in types.

7.88.4.18 bool get_ports (const std::string & ports, std::set< xtsc::u32 > &
ports_set) [protected]

Common helper method to determine the all_ports flag and populate the ports_set con-
tainer. This method returns true if ports is the empty string or "∗" (both indicate all ports).
Otherwise it returns false and populates the ports_set container with each port listed in
ports.

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Parameters:
ports A comma separated list of the desired ports (for example, "1,3"). Both the empty
string or asterisk ("" or "∗") mean all ports.
ports_set If ports is neither "" nor "∗", then this container will be populated with the
port values found in ports.

The documentation for this class was generated from the following file:

• xtsc_memory_trace.h

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7.89 xtsc_memory_trace_parms Class Reference

Constructor parameters for a xtsc_memory_trace object.

#include <xtsc/xtsc_memory_trace.h>Inheritance diagram for xtsc_memory_trace_-
parms:

xtsc_parms

xtsc_memory_trace_parms

Collaboration diagram for xtsc_memory_trace_parms:

xtsc_parms

xtsc_memory_trace_parms

Public Member Functions

• xtsc_memory_trace_parms (xtsc::u32 width8=64, bool big_endian=false, sc_-

core::sc_trace_file ∗p_trace_file=0, xtsc::u32 num_ports=1)
Constructor for an xtsc_memory_trace_parms object.

• xtsc_memory_trace_parms (const xtsc::xtsc_core &core, const char ∗memory_-

name, sc_core::sc_trace_file ∗p_trace_file=0, xtsc::u32 num_ports=0)
Constructor for an xtsc_memory_trace_parms object based upon an xtsc_core object and
a named memory interface.

• virtual const char ∗ kind () const

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Return what kind of xtsc_parms this is (our C++ type).

Protected Member Functions

• void init (xtsc::u32 width8, bool big_endian, sc_core::sc_trace_file ∗p_trace_file,

xtsc::u32 num_ports)
Do initialization common to all constructors.

7.89.1 Detailed Description

Constructor parameters for a xtsc_memory_trace object.

Name Type Description

------------------ ---- -------------------------------------------------------

"byte_width" u32 Memory data interface width in bytes. Valid values are
4, 8, 16, 32, and 64.
Default = 64.

"big_endian" bool True if the master is big endian.

Default = false.

"vcd_handle" void* Pointer to a SystemC VCD object (sc_trace_file *) or 0

if the memory trace device should create its own trace
file (which will be called "waveforms.vcd").
Default = 0.

"num_ports" u32 The number of memory ports attached to the memory trace
device. This number of master devices and this number
of slave devices must be connected to the memory trace
device.
Default = 1.

"allow_tracing" bool True if VCD trace is allowed. False if VCD trace is not
allowed. Setting "allow_tracing" to false allows
leaving the model in place in sc_main but with tracing
disabled so there is near zero impact on simulation
time. This might also be done if latency tracking is
desired (see "track_latency") but VCD tracing is not.
Default = true.

"enable_tracing" bool True if VCD tracing is initially enabled. False if VCD

tracing is initially disabled. See the enable_tracing
command and method.
Default = true.

"track_latency" bool True if lifetime, latency, and counter tracking is to be

done. False if not to be done. When "track_latency" is

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set to true, the xtsc_memory_trace class maintains

lifetime and latency histograms and counters of
transactions, request beats, request busys, response
beats, and response busys. The histograms and counters
are maintained per xtsc_request type and per port.
Transaction lifetime is the number of clock periods
between when the first request of the transaction is
first seen and when the last response of the transaction
is accepted. Transaction latency is the number of clock
periods between when the last request is accepted and
when the first response returns. Results are logged at
INFO level at the end of the simulation and may also be
obtained at any time during simulation using the
dump_statistic_info, dump_latency_histogram,
dump_lifetime_histogram, and get_counter commands and
methods.
Default = false.

"num_transfers" u32 If non-zero then only transactions with this number of

transfers are tracked (that is, transactions whose
xtsc_request::get_num_transfers() method returns a value
equal to the value set by this parameter). This can be
used to get statistics on block/burst transactions of a
single size rather than mixing unequal transaction sizes
together. This parameter is ignored if "track_latency"
is false and enable_latency_tracking(true) is never
called.
Default = 0.

See also:
xtsc_memory_trace
xtsc::xtsc_parms

Definition at line 121 of file xtsc_memory_trace.h.

7.89.2 Constructor & Destructor Documentation

7.89.2.1 xtsc_memory_trace_parms (xtsc::u32 width8 = 64, bool big_endian =

false, sc_core::sc_trace_file ∗ p_trace_file = 0, xtsc::u32 num_ports = 1)
[inline]

Constructor for an xtsc_memory_trace_parms object.

Parameters:
width8 Memory data interface width in bytes. Default = 64.
big_endian True if master is big_endian. Default = false.

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p_trace_file Pointer to SystemC VCD object or 0 if the memory trace device should
create its own VCD object (which will be called "waveforms.vcd"). Default = 0.
num_ports The number of memory ports the memory trace device has. Default = 1.

Definition at line 143 of file xtsc_memory_trace.h.

7.89.2.2 xtsc_memory_trace_parms (const xtsc::xtsc_core & core, const char

∗ memory_name, sc_core::sc_trace_file ∗ p_trace_file = 0, xtsc::u32
num_ports = 0)

Constructor for an xtsc_memory_trace_parms object based upon an xtsc_core object and

a named memory interface. This constructor will determine width8, big_endian, and, op-
tionally, num_ports by querying the core object and then pass the values to the init()
method.
If desired, after the xtsc_memory_trace_parms object is constructed, its data members
can be changed using the appropriate xtsc_parms::set() method before passing it to the
xtsc_memory constructor.

Parameters:
core A reference to the xtsc_core object upon which to base the xtsc_memory_trace_-
parms.
memory_name The name of the memory interface. Note: The core configuration
must have the named memory interface.
p_trace_file Pointer to SystemC VCD object or 0 if the memory trace device should
create its own trace file (which will be called "waveforms.vcd"). Default = 0.
num_ports The number of ports this memory has. If 0, the default, the number of
ports will be inferred based on the number of multi-ports in the port_name core
interface (assuming they are unbound).

See also:
xtsc::xtsc_core::How_to_do_memory_port_binding for a list of legal memory_name
values.

The documentation for this class was generated from the following file:

• xtsc_memory_trace.h

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7.90 xtsc_mmio Class Reference

A general-purpose memory-mapped input/output (MMIO) register device.

#include <xtsc/xtsc_mmio.h>Inheritance diagram for xtsc_mmio:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface

xtsc_mmio

Collaboration diagram for xtsc_mmio:

xtsc_debug_if
xtsc_request_if

xtsc_script_file
m_p_definition_file

m_request_impl xtsc_request_if_impl
xtsc_parms xtsc_mmio_parms
m_mmio_parms

xtsc_mmio m_mmio
xtsc_connection_interface xtsc_module

m_active_request
xtsc_resettable xtsc_command_handler_interface

xtsc_request m_stream_dumper
stream_dumper
m_p_request

Classes

• class input_definition
Input definition and sc_export.

• class output_definition
Output definition and sc_port.

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• class register_definition
Register definition and value.

• class xtsc_request_if_impl
Implementation of xtsc_request_if.

Public Member Functions

• SC_HAS_PROCESS (xtsc_mmio)
This SystemC macro inserts some code required for SC_THREAD’s to work.

• virtual const char ∗ kind () const

Our C++ type (SystemC uses this).

• xtsc_mmio (sc_core::sc_module_name module_name, const xtsc_mmio_parms

&mmio_parms)
Constructor for a xtsc_mmio.

• ∼xtsc_mmio (void)
Destructor.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• bool has_input (const char ∗input_name) const

Return true if the named input exists.

• bool has_output (const char ∗output_name) const

Return true if the named output exists.

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• xtsc::u32 get_bit_width (const char ∗io_name) const

Return the bit width of the name input/output.

• sc_core::sc_export< xtsc::xtsc_wire_write_if > & get_input (const char ∗input_name)

const
Return the sc_export of the named input.

• sc_core::sc_port< xtsc::xtsc_wire_write_if, NSPP > & get_output (const char

∗output_name) const
Return the sc_port of the named output.

• std::set< std::string > get_input_set () const

Get the set of input names defined for this xtsc_mmio.

• std::set< std::string > get_output_set () const

Get the set of output names defined for this xtsc_mmio.

• virtual void execute (const std::string &cmd_line, const std::vector< std::string >
&words, const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

• void connect (xtsc_arbiter &arbiter)

Connect an xtsc_arbiter with this xtsc_mmio.

• void connect (xtsc::xtsc_core &core, const char ∗memory_port_name)

Connect an xtsc_core with the memory interface slave port pair of this xtsc_mmio.

• void connect (xtsc::xtsc_core &core, const char ∗core_intf_name, const char ∗io_-
name)
Connect an xtsc_mmio wire input or output to an xtsc_core.

• void connect (xtsc_master &master)

Connect an xtsc_master with this xtsc_mmio.

• void connect (xtsc_memory_trace &memory_trace, xtsc::u32 port_num)

Connect an xtsc_memory_trace with this xtsc_mmio.

• void connect (xtsc_pin2tlm_memory_transactor &pin2tlm, xtsc::u32 port_num)

Connect an xtsc_pin2tlm_memory_transactor with this xtsc_mmio.

• void connect (xtsc_router &router, xtsc::u32 port_num)

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Connect an xtsc_router with this xtsc_mmio.

• void connect (xtsc_mmio &mmio, const char ∗output_name, const char ∗input_-
name)
Connect a wire output of another xtsc_mmio to a wire input of this xtsc_mmio.

• void connect (xtsc_wire_logic &logic, const char ∗output_name, const char ∗input_-
name)
Connect an xtsc_wire_logic output to an input of this xtsc_mmio.

• void connect (xtsc_wire_source &source, const char ∗output_name, const char

∗input_name=NULL)
Connect an xtsc_wire_source output to an input of this xtsc_mmio.

• virtual void reset (bool hard_reset=false)

Write the initial values to the registers and drive any outputs.

• void change_clock_period (xtsc::u32 clock_period_factor)

Method to change the clock period.

Public Attributes
• sc_core::sc_export< xtsc::xtsc_request_if > m_request_export
From the memory interface master to us.

• sc_core::sc_port< xtsc::xtsc_respond_if > m_respond_port

From us to the memory interface master.

Protected Types
• typedef std::map< xtsc::xtsc_address, register_definition ∗ > address_register_-
map
• typedef std::map< std::string, register_definition ∗ > register_definition_map
• typedef std::map< std::string, output_definition ∗ > output_definition_map
• typedef std::map< std::string, input_definition ∗ > input_definition_map
• typedef std::set< output_definition ∗ > output_set
• typedef std::set< input_definition ∗ > input_set
• typedef sc_core::sc_port< xtsc::xtsc_wire_write_if, NSPP > wire_write_port
• typedef sc_core::sc_export< xtsc::xtsc_wire_write_if > wire_write_export

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Protected Member Functions

• virtual void end_of_elaboration (void)

SystemC callback.

• virtual void compute_delays ()

Common method to compute/re-compute time delays.

• void request_thread (void)

Handle memory-interface requests.

• register_definition ∗ get_register (xtsc::xtsc_address address, xtsc::u32 &high_bit,

xtsc::u32 &low_bit)
Determine which bits of which register (if any) address maps to.

• xtsc::u32 get_u32 (xtsc::u32 index, const std::string &argument_name)

Extract a u32 value (named argument_name) from the word at m_words[index].

• const std::string & validate_identifier (xtsc::u32 index, const std::string &argument_-

name)
Throw an exception if m_words[index] (named argument_name) does not exists or is not a
valid C/C++ identifier, otherwise return the m_words[index].

• void swizzle_buffer (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗buffer)

Swizzle the contents of buffer based on starting address (address8) and size (size8) and
the bus width defined by "byte_width" in xtsc_mmio_parms.

• void read_bytes (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗buffer)

Get bytes from the register(s) mapped to by the addresses from address8 to
address8+size8-1 and copy them to buffer.

• void write_bytes (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8

∗buffer)
Write bytes from buffer to the register(s) mapped to by the addresses from address8 to
address8+size8-1 and then write all sc_port objects that the register(s) map to.

• void send_response (xtsc::xtsc_response &response)

Send and log a response.

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Protected Attributes
• xtsc_mmio_parms m_mmio_parms
Copy of xtsc_mmio_parms.

• xtsc_request_if_impl m_request_impl
m_request_export binds to this

• log4xtensa::TextLogger & m_text

Used for logging.

• sc_core::sc_time m_clock_period
This device’s clock period.

• bool m_use_fast_access
From the "use_fast_access" parameter.

• sc_core::sc_event m_request_event
Event used to notify request_thread.

• sc_core::sc_event m_write_event
Event notified whenever an nb_request WRITE or nb_write occurs.

• sc_core::sc_event m_poke_event
Event notified whenever an nb_poke occurs.

• xtsc::xtsc_script_file ∗ m_p_definition_file
The script file from the "definition_file" parameter.

• std::string m_definition_file
The name of the script file.

• std::string m_line
Current line of script file.

• xtsc::u32 m_line_count
Current line number in script file.

• std::vector< std::string > m_words

Current line in script file tokenized into words.

• address_register_map m_address_register_map

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Map from address to register definition.

• register_definition_map m_register_definition_map
Map of register definitions.

• output_definition_map m_output_definition_map
Map of output definitions.

• input_definition_map m_input_definition_map
Map of input definitions.

• std::set< std::string > m_input_set

Set of names of all inputs.

• std::set< std::string > m_output_set

Set of names of all outputs.

• std::set< std::string > m_io_set

Set of names of all inputs and outputs.

• xtsc::u32 m_byte_width
The byte width of this device’s data interface.

• xtsc::xtsc_request m_active_request
Our copy of the active (current) request.

• bool m_busy
We can only accept one request at a time.

• sc_core::sc_time m_response_time
How long to take to respond.

• bool m_always_write
Write port even if value hasn’t changed.

• bool m_swizzle_bytes
Swizzle bytes before writing and after reading.

• xtsc::xtsc_port_table m_port_table_all
All wire inputs and outputs in "definition_file" order.

• xtsc::xtsc_port_table m_port_table_all_inputs

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All wire inputs in "definition_file" order.

• xtsc::xtsc_port_table m_port_table_all_outputs
All wire outputs in "definition_file" order.

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

Friends

• std::ostream & operator<< (std::ostream &os, const register_definition &reg)

• std::ostream & operator<< (std::ostream &os, const output_definition &output)
• std::ostream & operator<< (std::ostream &os, const input_definition &input)

7.90.1 Detailed Description

A general-purpose memory-mapped input/output (MMIO) register device. This device mod-

els a set of memory-mapped registers that connect to general-purpose I/O ports. A file
(named by the "definition_file" parameter of xtsc_mmio_parms) is used to define the reg-
isters that this device models as well as the input and output ports connected to those
registers.
The device is a memory interface slave so that the registers can be written by a memory
interface master such as xtsc::xtsc_core or xtsc_master. The memory interface would
typically be connected to the PIF of an xtsc_core by way of an xtsc_router so that only the
addresses that map to this device get routed to it and other addresses can go to some
other device, for example, an xtsc_memory connected to another port of the xtsc_router.
The device has as many wire I/O ports as are defined in the definition file. The input ports
(technically, sc_export<xtsc_wire_write_if>) can be written by any device having an sc_-
port<xtsc_wire_write_if>, for example, a TIE export state of an xtsc::xtsc_core, an xtsc_-
wire_logic output, or an xtsc_wire_source. The output ports (technically, sc_port<xtsc_-
wire_write_if>) can write to any device implementing the xtsc::xtsc_wire_write_if, for ex-
ample, a system-level input wire of an xtsc_core such as "BInterrupt" or "BReset", an
xtsc_wire_logic input, or an xtsc_wire.
Because the I/O ports are not known until construction time (when the definition file is
processed), they are not named members of the class. To perform port binding, use the
xtsc::xtsc_connect() method or do manual SystemC port binding using the get_input() and
get_output() methods to obtain references to the desired port.
Here is a block diagram of the system used in the xtsc_mmio example:

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req
xtsc_memory
rsp core0_pif
mmio.get_output("BInterrupt01")

req
xtsc_core xtsc_router
(core1.get_input_wire("BInterrupt01"))
core0 router m_request_export
(core0.out) rsp
req nb_write() req
xtsc_core
xtsc_memory
routing.tab core1
rsp xtsc_mmio nb_write() (core1.out) rsp core1_pif
mmio

mmio.txt

core1.get_export_state("EXPSTATE")
m_respond_port

(mmio.get_input("EXPSTATE"))

Figure 7.13: xtsc_mmio Example

Here is the code to connect the xtsc_mmio example system using the xtsc::xtsc_connect()
method:

xtsc_connect(core0, "pif", "slave_port", router);

xtsc_connect(router, "master_port[0]", "", core0_pif);
xtsc_connect(router, "master_port[1]", "slave_port", mmio);
xtsc_connect(core1, "BInterrupt10", "BInterrupt10", mmio);
xtsc_connect(core1, "EXPSTATE", "EXPSTATE", mmio);
xtsc_connect(core1, "pif", "", core1_pif);

And here is the code to connect the system using manual SystemC port binding:

core0.get_request_port("pif")(router.m_request_export);
router.m_respond_port(core0.get_respond_export("pif"));
(*router.m_request_ports[0])(*core0_pif.m_request_exports[0]);
(*core0_pif.m_respond_ports[0])(*router.m_respond_exports[0]);
(*router.m_request_ports[1])(mmio.m_request_export);
mmio.m_respond_port(*router.m_respond_exports[1]);
mmio.get_output("BInterrupt10")(core1.get_system_input_wire("BInterrupt10"));
core1.get_export_state("EXPSTATE")(mmio.get_input("EXPSTATE"));
core1.get_request_port("pif")(*core1_pif.m_request_exports[0]);
(*core1_pif.m_respond_ports[0])(core1.get_respond_export("pif"));

See also:
xtsc_mmio_parms
xtsc::xtsc_core
xtsc_router
xtsc_memory
xtsc_wire

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xtsc::xtsc_connect()
xtsc::xtsc_core::How_to_do_port_binding

Definition at line 270 of file xtsc_mmio.h.

7.90.2 Constructor & Destructor Documentation

7.90.2.1 xtsc_mmio (sc_core::sc_module_name module_name, const

xtsc_mmio_parms & mmio_parms)

Constructor for a xtsc_mmio.

Parameters:
module_name Name of the xtsc_mmio sc_module.
mmio_parms The remaining parameters for construction.

See also:
xtsc_mmio_parms

7.90.3 Member Function Documentation

7.90.3.1 sc_core::sc_export<xtsc::xtsc_wire_write_if>& get_input (const char ∗

input_name) const

Return the sc_export of the named input. This method is used for port binding. For exam-
ple, to bind the TIE export state named "foo" of an xtsc_core named core0 to the sc_export
input named "bar" of an xtsc_mmio named mmio:

core0.get_export_state("foo")(mmio.get_input("bar"));

7.90.3.2 sc_core::sc_port<xtsc::xtsc_wire_write_if, NSPP>& get_output (const

char ∗ output_name) const

Return the sc_port of the named output. This method is used for port binding. For example,
to bind the sc_port output named "vectors" of an xtsc_mmio named mmio to the "BInterrupt"
system-level input of an xtsc_core named core0:

mmio.get_output("vectors")(core0.get_input_wire("BInterrupt"));

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7.90.3.3 virtual void execute (const std::string & cmd_line, const std::vector<
std::string > & words, const std::vector< std::string > & words_lc,
std::ostream & result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:

change_clock_period <ClockPeriodFactor>
Call xtsc_mmio::change_clock_period(<ClockPeriodFactor>). Return previous
<ClockPeriodFactor> for this device.

peek <StartAddress> <NumBytes>

Peek <NumBytes> starting at <StartAddress>.

poke <StartAddress> <NumBytes> <Byte1> <Byte2> . . . <ByteN>

Poke <NumBytes> (=N) starting at <StartAddress>.

reset
Call xtsc_mmio::reset().

Implements xtsc_command_handler_interface.

7.90.3.4 void connect (xtsc_arbiter & arbiter)

Connect an xtsc_arbiter with this xtsc_mmio. This method connects the master port pair of
the xtsc_arbiter with the memory interface slave port pair of this xtsc_mmio.

Parameters:
arbiter The xtsc_arbiter to connect with this xtsc_mmio.

7.90.3.5 void connect (xtsc::xtsc_core & core, const char ∗ memory_port_name)

Connect an xtsc_core with the memory interface slave port pair of this xtsc_mmio. This
method connects the memory interface master port pair specified by memory_port_name
of the xtsc_core specified by core with the memory interface slave port pair of this xtsc_-
mmio.

Parameters:
core The xtsc_core to connect with this xtsc_mmio.
memory_port_name The name of the memory interface master port pair of the xtsc_-
core to connect with this xtsc_mmio. Case-insensitive.

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See also:
xtsc::xtsc_core::How_to_do_memory_port_binding for a list of valid memory_port_-
name values.

7.90.3.6 void connect (xtsc::xtsc_core & core, const char ∗ core_intf_name,

const char ∗ io_name)

Connect an xtsc_mmio wire input or output to an xtsc_core. This method connects an

export state or system-level output wire of an xtsc_core to this xtsc_mmio or it connects
this xtsc_mmio to a system-level input wire of an xtsc_core.

Parameters:
core The xtsc_core to connect with.
core_intf_name The export state or system-level output/input wire of the xtsc_core
that is to be connected to this xtsc_mmio. For an export state, core_intf_name is
the name as it appears in the user’s TIE code (it must NOT begin with the "TIE_"
prefix). For a system-level output/input wire, core_intf_name is the name as it
appears in the Xtensa microprocessor data book.
io_name The output or input of this xtsc_mmio to be connected to the xtsc_core. If
core_intf_name is an xtsc_core export state or a system-level output wire then
io_name must name an input. If core_intf_name is an xtsc_core system-level
input wire then io_name must name an output.

See also:
xtsc::xtsc_core::get_output_wire().
xtsc::xtsc_core::get_input_wire().

7.90.3.7 void connect (xtsc_master & master)

Connect an xtsc_master with this xtsc_mmio. This method connects the memory interface
master port pair of xtsc_master with the memory interface slave port pair of this xtsc_mmio.

Parameters:
master The xtsc_master to connect with this xtsc_mmio.

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7.90.3.8 void connect (xtsc_memory_trace & memory_trace, xtsc::u32 port_num)

Connect an xtsc_memory_trace with this xtsc_mmio. This method connects the specified
memory interface master port pair of the specified xtsc_memory_trace with the memory
interface slave port pair of this xtsc_mmio.

Parameters:
memory_trace The xtsc_memory_trace to connect with this xtsc_mmio.
port_num The xtsc_memory_trace master port pair to connect with this xtsc_mmio.

7.90.3.9 void connect (xtsc_pin2tlm_memory_transactor & pin2tlm, xtsc::u32

port_num)

Connect an xtsc_pin2tlm_memory_transactor with this xtsc_mmio. This method connects

the specified TLM master port pair of the specified xtsc_pin2tlm_memory_transactor with
the memory interface slave port pair of this xtsc_mmio.

Parameters:
pin2tlm The xtsc_pin2tlm_memory_transactor to connect with this xtsc_mmio.
port_num The TLM master port pair of the xtsc_pin2tlm_memory_transactor to con-
nect with this xtsc_mmio. port_num must be in the range of 0 to the xtsc_-
pin2tlm_memory_transactor’s "num_ports" parameter minus 1.

7.90.3.10 void connect (xtsc_router & router, xtsc::u32 port_num)

Connect an xtsc_router with this xtsc_mmio. This method connects the specified master
port pair of the specified xtsc_router with the memory interface slave port pair of this xtsc_-
mmio.

Parameters:
router The xtsc_router to connect with this xtsc_mmio.
port_num The master port pair of the xtsc_router to connect with this xtsc_mmio.
port_num must be in the range of 0 to the xtsc_router’s "num_slaves" parameter
minus 1.

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7.90.3.11 void connect (xtsc_mmio & mmio, const char ∗ output_name, const
char ∗ input_name)

Connect a wire output of another xtsc_mmio to a wire input of this xtsc_mmio. This method
connects the specified wire output of the specified xtsc_mmio to the specified wire input of
this xtsc_mmio.

Parameters:
mmio The other xtsc_mmio to be connected to this xtsc_mmio.
output_name The output of the other xtsc_mmio to be connected to an input of this
xtsc_mmio.
input_name The input of this xtsc_mmio that the other xtsc_mmio is to be connected
to.

7.90.3.12 void connect (xtsc_wire_logic & logic, const char ∗ output_name, const
char ∗ input_name)

Connect an xtsc_wire_logic output to an input of this xtsc_mmio. This method connects

the specified output of the specified xtsc_wire_logic to the specified wire input of this xtsc_-
mmio.

Parameters:
logic The xtsc_wire_logic to be connected to this xtsc_mmio.
output_name The output of the xtsc_wire_logic to be connected to this xtsc_mmio.
input_name The input of this xtsc_mmio that the xtsc_wire_logic is to be connected
to.

7.90.3.13 void connect (xtsc_wire_source & source, const char ∗ output_name,

const char ∗ input_name = NULL)

Connect an xtsc_wire_source output to an input of this xtsc_mmio. This method connects

the specified output of the specified xtsc_wire_source to the specified wire input of this
xtsc_mmio.

Parameters:
source The xtsc_wire_source to connect to this xtsc_mmio.
output_name The output of the xtsc_wire_source to be connected to this xtsc_mmio.
If this parameter is NULL or empty then the default (first/only) output of source
will be connected.

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input_name The input of this xtsc_mmio that the xtsc_wire_source is to be connected

to. For backwards compatibility, if this parameter is NULL, then the output_name
and input_name values will be swapped so that the default (first/only) output of
source will be connected to this xtsc_mmio input named output_name (which
must not be NULL or empty).

7.90.3.14 void change_clock_period (xtsc::u32 clock_period_factor)

Method to change the clock period.

Parameters:
clock_period_factor Specifies the new length of this device’s clock period expressed
in terms of the SystemC time resolution (from sc_get_time_resolution()).

7.90.3.15 register_definition∗ get_register (xtsc::xtsc_address address, xtsc::u32

& high_bit, xtsc::u32 & low_bit) [protected]

Determine which bits of which register (if any) address maps to.

Parameters:
address in The address of interest.
high_bit out The high bit of the register address maps to.
low_bit out The low bit of the register address maps to.

Returns:
A pointer to the register_definition object that address maps to, or NULL if address
does not map to a register.

7.90.3.16 void swizzle_buffer (xtsc::xtsc_address address8, xtsc::u32 size8,

xtsc::u8 ∗ buffer) [protected]

Swizzle the contents of buffer based on starting address (address8) and size (size8) and
the bus width defined by "byte_width" in xtsc_mmio_parms. This method is meant to sup-
port peeks and pokes with arbitrary size and alignment from a big-endian core.

Parameters:
address8 Starting address.

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size8 The number of bytes in buffer.

buffer The data to be swizzled.

As an example, if "byte_width" is 8 and address8 is 0x10000001 and size8 is 22 then the

following 5 swizzles will take place (the bytes in buffer[0] and buffer[21] will be left in place):
verbatim 1. buffer[1] through buffer[2] (2 bytes at nominal addr 0x10000002-0x10000003)
2. buffer[3] through buffer[6] (4 bytes at nominal addr 0x10000004-0x10000007) 3.
buffer[7] through buffer[14] (8 bytes at nominal addr 0x10000008-0x1000000F) 4. buffer[15]
through buffer[18] (4 bytes at nominal addr 0x10000010-0x10000013) 5. buffer[19] through
buffer[20] (2 bytes at nominal addr 0x10000014-0x10000015)
The documentation for this class was generated from the following file:

• xtsc_mmio.h

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7.91 xtsc_mmio_parms Class Reference

Constructor parameters for a xtsc_mmio object.

#include <xtsc/xtsc_mmio.h>Inheritance diagram for xtsc_mmio_parms:

xtsc_parms

xtsc_mmio_parms

Collaboration diagram for xtsc_mmio_parms:

xtsc_parms

xtsc_mmio_parms

Public Member Functions

• xtsc_mmio_parms (const char ∗definition_file="", xtsc::u32 width8=4, bool swizzle_-

bytes=false)
Constructor for an xtsc_mmio_parms object.

• virtual const char ∗ kind () const

Our C++ type (the xtsc_parms base class uses this for error messages).

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7.91.1 Detailed Description

Constructor parameters for a xtsc_mmio object.

Name Type Description

------------------ ---- --------------------------------------------------------

"byte_width" u32 Memory data interface width in bytes. Valid values are
4, 8, 16, 32, and 64.

"definition_file" char* The name of a file providing memory-mapped I/O register

definitions, output sc_port definitions, and input
sc_export definitions. Lines in this file must be in
one of the following three formats (curely braces
indicate optional elements):

register <RegisterName> <BitWidth> <Address> {<InitialValue>}

output <PortName> <RegisterName> {<HighBit> {<LowBit>}}

input <ExportName> <RegisterName> {<HighBit> {<LowBit>}}

1. A line beginning with the keyword "register" defines

a register that can be read and written using the
memory interface (that is, m_request_export and
m_respond_port). Memory-mapped writes to this
register result in calls to the nb_write() method of
the xtsc_wire_write_if interface of the sc_port
objects defined by output definition lines that map
to this register (see #2 below). Memory-mapped
reads of this register return the last value written
to this register. Values can be written to a
register by one of two means. First, by memory-
mapped writes just discussed. Second, by calls to
the nb_write() method of the xtsc_wire_write_if
interface bound to the sc_export objects defined by
any input definition lines (see #3 below) that map
to the register.
2. A line beginning with the keyword "output" defines an
sc_port<xtsc_wire_write_if> and specifies which
bits of which register map to that sc_port.
3. A line beginning with the keyword "input" defines an
sc_export<xtsc_wire_write_if> and specifies which
bits of which register that sc_export maps to.
4. <RegisterName>, <PortName>, and <ExportName> must be
valid C/C++ identifiers.
5. <PortName> and <ExportName> must be unique (they
have the same name space).
6. Every <RegisterName> that appears in the definition
file must appear in exactly one register definition
line.
7. <BitWidth> must be between 1 and B*8, where
B = "byte_width"
8. A register occupies N bytes of the address space
from <Address> to <Address> + N - 1. N is defined
as:

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N = ceil(W/8)
Where,
W = <BitWidth>
9. Writes to memory-mapped addresses not covered by a
register definition line are logged and discarded.
Reads to memory-mapped addresses not covered by a
register definition line are logged and return all
zeroes.
10. If the optional <InitialValue> element is not
preset, it defaults to 0.
11. A <RegisterName> may appear in any combination of
input and output definition lines or none at all;
however, a specific bit of a register may be used in
at most one input or output definition line.
12. The size of an input or output is defined as follows:
If both <LowBit> and <HighBit> are present:
Size = <HighBit> - <LowBit> + 1
If <HighBit> is present and <LowBit> is missing:
Size = 1
If both <LowBit> and <HighBit> are missing:
Size = <BitWidth> of corresponding register
13. Comments, extra whitespace, and blank lines are
ignored. See xtsc_script_file.

"swizzle_bytes" bool If true, the bytes in the data payload of memory-mapped

writes will be swizzled prior to being stored in the
register. For memory-mapped reads, the bytes will be
taken from the register and then swizzled prior to being
loaded into the response data payload. This may be
useful when the memory interface of the xtsc_mmio object
is connected to a big-endian xtsc_core object.
Default = false (do not swizzle bytes).

"always_write" bool If true, a write to a register will result in a write to

all output ports mapped to that register regardless of
whether or not the port values changed. If false, a
write to a mapped port will occur only if the port value
has changed. At start of simulation and at reset all
ports are written with their initial value regardless of
this parameter.
Default = true.

"use_fast_access" bool If true, this device will support fast access for the
TurboXim simulation engine using peek/poke. If false,
TurboXim fast access will not be allowed.
Default = true.

"clock_period" u32 This is the length of this device's clock period

expressed in terms of the SystemC time resolution
(from sc_get_time_resolution()). A value of
0xFFFFFFFF means to use the XTSC system clock
period (from xtsc_get_system_clock_period()). A value
of 0 means one delta cycle.
Default = 0xFFFFFFFF (i.e. use the system clock
period).

"response_time" u32 This is the number of clock periods that this device

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takes to respond to memory-interface requests. A value

of 0 means one delta cycle.
Default = 1.

See also:
xtsc_mmio
xtsc::xtsc_parms

Definition at line 165 of file xtsc_mmio.h.

7.91.2 Constructor & Destructor Documentation

7.91.2.1 xtsc_mmio_parms (const char ∗ definition_file = "", xtsc::u32 width8 = 4,

bool swizzle_bytes = false) [inline]

Constructor for an xtsc_mmio_parms object.

Parameters:
definition_file See the "definition_file" parameter
width8 Memory data interface width in bytes.
swizzle_bytes See the "swizzle_bytes" parameter

Definition at line 178 of file xtsc_mmio.h.

The documentation for this class was generated from the following file:

• xtsc_mmio.h

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7.92 xtsc_mode_switch_if Class Reference

Interface for dynamic simulation mode switching between fast-functional and cycle-
accurate modes.
#include <xtsc/xtsc_mode_switch_if.h>Inheritance diagram for xtsc_mode_switch_if:

xtsc_mode_switch_if

xtsc_udma xtsc_xttlm2tlm2_transactor

Public Member Functions

• virtual bool switch_sim_mode (xtsc_sim_mode mode)=0

Request a simulation mode switch between instruction-accurate (functional/TurboXim
mode) and cycle-accurate (non-TurboXim mode) simulation.

• virtual bool prepare_to_switch_sim_mode (xtsc_sim_mode mode)=0

Test to see if a switch between simulation modes (instruction-accurate/functional/ TurboXim
and cycle-accurate/non-TurboXim) can be made this cycle.

• virtual sc_core::sc_event & get_sim_mode_switch_ready_event ()=0

During the dynamic simulation mode switching protocol, when a device returns not ready
from prepare_to_switch_sim_mode(), it should fire this event when it is ready.

• virtual xtsc_sim_mode get_sim_mode () const =0

Query function to determine the current simulation mode of the device.

• virtual bool is_mode_switch_pending () const =0

Query function to determine whether the device is stalled for a simulation mode switch.

• virtual ∼xtsc_mode_switch_if ()
virtual destructor

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7.92.1 Detailed Description

Interface for dynamic simulation mode switching between fast-functional and cycle-
accurate modes. Any device that needs to participate in simulation mode switching should
implement this interface, create an xtsc_switch_registration object, and pass that object to
xtsc_register_mode_switch_interface.
For example, have the sc_module sub-class of the device inherit from and implement the
xtsc_mode_switch_if and then have code like this in the constructor:

xtsc_register_mode_switch_interface(
xtsc_switch_registration(*this, *this, "")
);

Definition at line 46 of file xtsc_mode_switch_if.h.

7.92.2 Member Function Documentation

7.92.2.1 virtual bool switch_sim_mode (xtsc_sim_mode mode) [pure virtual]

Request a simulation mode switch between instruction-accurate (functional/TurboXim

mode) and cycle-accurate (non-TurboXim mode) simulation. If a mode switch is desired
after simulation has started (i.e. after the first call to sc_start), the prepare_to_switch_-
sim_mode() method should be called on every clock cycle until it returns true before this
method is called.

Parameters:
mode If mode is XTSC_CYCLE_ACCURATE, then switch to cycle-accurate (non-
TurboXim) mode. If mode is XTSC_FUNCTIONAL, then switch to functional mode
(TurboXim).

Returns:
true if switch was successful.

See also:
prepare_to_switch_sim_mode()

Implemented in xtsc_udma, and xtsc_xttlm2tlm2_transactor.

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7.92.2.2 virtual bool prepare_to_switch_sim_mode (xtsc_sim_mode mode) [pure

virtual]

Test to see if a switch between simulation modes (instruction-accurate/functional/ TurboXim

and cycle-accurate/non-TurboXim) can be made this cycle. During the dynamic simulation
mode switching protocol, this method also informs a device that not issue any new re-
quests until it has switched. If the device is not ready to switch it should fire its ready
event (accessible with the get_sim_mode_switch_ready_event()) when it becomes ready.
In XTSC_FUNCTIONAL mode a device can simulate a relaxed_cycle_limit number of cy-
cles out-of-order with respect to the rest of the system. The global function xtsc::xtsc_get_-
relaxed_simulation_cycle_limit() can be called to determine the limit.

Parameters:
mode If mode is XTSC_CYCLE_ACCURATE, then switch to cycle-accurate (non-
TurboXim) mode. If mode is XTSC_FUNCTIONAL, then switch to functional mode
(TurboXim).

Returns:
true if this device is ready to switch, false if it is not yet ready.

Implemented in xtsc_udma, and xtsc_xttlm2tlm2_transactor.

7.92.2.3 virtual sc_core::sc_event& get_sim_mode_switch_ready_event () [pure

virtual]

During the dynamic simulation mode switching protocol, when a device returns not ready
from prepare_to_switch_sim_mode(), it should fire this event when it is ready.

Returns:
event fired when a device is ready to switch after it reported that it was not ready.

Implemented in xtsc_udma, and xtsc_xttlm2tlm2_transactor.

7.92.2.4 virtual xtsc_sim_mode get_sim_mode () const [pure virtual]

Query function to determine the current simulation mode of the device.

Returns:
the current mode

Implemented in xtsc_udma, and xtsc_xttlm2tlm2_transactor.

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7.92.2.5 virtual bool is_mode_switch_pending () const [pure virtual]

Query function to determine whether the device is stalled for a simulation mode switch.

Returns:
true if the device has a mode switch pending

Implemented in xtsc_udma, and xtsc_xttlm2tlm2_transactor.

The documentation for this class was generated from the following file:

• xtsc_mode_switch_if.h

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7.93 xtsc_module Class Reference

This composite interface combines the xtsc_connection_interface and xtsc_resettable in-

terfaces.

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#include <xtsc/xtsc.h>Inheritance diagram for xtsc_module:

xtsc_core

xtsc_tx_loader

xtsc_udma

xtsc_arbiter

xtsc_lookup

xtsc_lookup_driver

xtsc_lookup_pin

xtsc_master

xtsc_master_tlm2
xtsc_cache

xtsc_memory
xtsc_dma_engine

xtsc_memory_pin

xtsc_memory_tlm2

xtsc_memory_trace

xtsc_connection_interface xtsc_mmio
xtsc_module

xtsc_resettable xtsc_pin2tlm_lookup_transactor

xtsc_pin2tlm_memory_transactor

xtsc_queue

xtsc_queue_consumer

xtsc_queue_pin

xtsc_queue_producer

xtsc_router

xtsc_slave
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Collaboration diagram for xtsc_module:

xtsc_connection_interface xtsc_resettable

xtsc_module

Public Member Functions

• xtsc_module (sc_core::sc_module &module)
Constructor for an xtsc_module.

• virtual ∼xtsc_module ()
Destructor.

• void reset (bool hard_reset=false)

The implementation of reset() in xtsc_module logs a warning and does nothing else.

Private Member Functions

• xtsc_module (const xtsc_module &)
• xtsc_module & operator= (const xtsc_module &)

7.93.1 Detailed Description

This composite interface combines the xtsc_connection_interface and xtsc_resettable in-

terfaces. The XTSC core and component modules all use this composite interface.
Definition at line 5603 of file xtsc.h.

7.93.2 Constructor & Destructor Documentation

7.93.2.1 xtsc_module (sc_core::sc_module & module) [inline]

Constructor for an xtsc_module.

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Parameters:
module A reference to the associated sc_module.

Definition at line 5612 of file xtsc.h.

7.93.3 Member Function Documentation

7.93.3.1 void reset (bool hard_reset = false) [virtual]

The implementation of reset() in xtsc_module logs a warning and does nothing else. Sub-
classes should provide their own implementation if they are able to support reset.
Implements xtsc_resettable.
Reimplemented in xtsc_cache, xtsc_core, xtsc_arbiter, xtsc_dma_engine, xtsc_lookup,
xtsc_lookup_driver, xtsc_master, xtsc_master_tlm2, xtsc_memory, xtsc_memory_tlm2,
xtsc_mmio, xtsc_queue, xtsc_queue_consumer, xtsc_queue_producer, xtsc_router, xtsc_-
slave, xtsc_wire, xtsc_wire_source, xtsc_lookup_pin, xtsc_memory_pin, xtsc_memory_-
trace, xtsc_pin2tlm_lookup_transactor, xtsc_pin2tlm_memory_transactor, xtsc_queue_-
pin, xtsc_tlm2pin_memory_transactor, xtsc_tlm22xttlm_transactor, xtsc_tx_loader, xtsc_-
udma, xtsc_wire_logic, and xtsc_xttlm2tlm2_transactor.
The documentation for this class was generated from the following file:

• xtsc.h

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7.94 xtsc_module_pin_base Class Reference

This is a base class for modules implementing pin-level interfaces, especially pin-level
memory interfaces.
#include <xtsc/xtsc_module_pin_base.h>Inheritance diagram for xtsc_module_pin_-
base:

xtsc_module_pin_base

xtsc_memory_pin xtsc_pin2tlm_memory_transactor xtsc_tlm2pin_memory_transactor

Classes

• class req_cntl
Class to manage the bits of POReqCntl/PIReqCntl.

• class resp_cntl
Class to manage the bits of PORespCntl/PIRespCntl/SnoopRespCntl.

Public Types

• enum memory_interface_type {
DRAM0,
DRAM0RW,
DRAM0BS,
DRAM1,
DRAM1RW,
DRAM1BS,
DROM0,
IRAM0,
IRAM1,
IROM0,
URAM0,

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XLMI0,
PIF,
IDMA0 }
Memory interface type.

• typedef std::map< std::string, xtsc::u32 > map_string_u32

• typedef sc_core::sc_in< bool > bool_input
• typedef sc_core::sc_in< sc_dt::sc_uint_base > uint_input
• typedef sc_core::sc_in< sc_dt::sc_bv_base > wide_input
• typedef sc_core::sc_out< bool > bool_output
• typedef sc_core::sc_out< sc_dt::sc_uint_base > uint_output
• typedef sc_core::sc_out< sc_dt::sc_bv_base > wide_output
• typedef std::set< std::string > set_string
• typedef std::vector< set_string ∗ > vector_set_string
• typedef std::map< std::string, bool_input ∗ > map_bool_input
• typedef std::map< std::string, uint_input ∗ > map_uint_input
• typedef std::map< std::string, wide_input ∗ > map_wide_input
• typedef std::map< std::string, bool_output ∗ > map_bool_output
• typedef std::map< std::string, uint_output ∗ > map_uint_output
• typedef std::map< std::string, wide_output ∗ > map_wide_output
• typedef enum xtsc_component::xtsc_module_pin_base::memory_interface_type
memory_interface_type
Memory interface type.

Public Member Functions

• xtsc_module_pin_base (sc_core::sc_module &module, xtsc::u32 num_sets, sc_-
core::sc_trace_file ∗p_trace_file, const std::string &suffix, bool banked=false, bool
split_rw=false, bool has_dma=false, xtsc::u32 num_subbanks=0)
Constructor for a xtsc_module_pin_base.

• virtual ∼xtsc_module_pin_base (void)

Destructor.

• bool has_input (const std::string &port_name) const

Return true if the named input exists.

• bool has_output (const std::string &port_name) const

Return true if the named output exists.

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• bool has_bool_input (const std::string &port_name) const

Return true if the named input of type sc_in<bool> exists.

• bool has_uint_input (const std::string &port_name) const

Return true if the named input of type sc_in<sc_uint_base> exists.

• bool has_wide_input (const std::string &port_name) const

Return true if the named input of type sc_in<sc_bv_base> exists.

• bool has_bool_output (const std::string &port_name) const

Return true if the named output of type sc_out<bool> exists.

• bool has_uint_output (const std::string &port_name) const

Return true if the named output of type sc_out<sc_uint_base> exists.

• bool has_wide_output (const std::string &port_name) const

Return true if the named output of type sc_out<sc_bv_base> exists.

• set_string get_input_set (xtsc::u32 set_id=0) const

Get the set of pin-level input names defined for this xtsc_module_pin_base.

• set_string get_output_set (xtsc::u32 set_id=0) const

Get the set of pin-level output names defined for this xtsc_module_pin_base.

• set_string get_bool_input_set (xtsc::u32 set_id=0) const

Get the set of bool_input names belonging to the specified set_id.

• set_string get_uint_input_set (xtsc::u32 set_id=0) const

Get the set of uint_input names belonging to the specified set_id.

• set_string get_wide_input_set (xtsc::u32 set_id=0) const

Get the set of wide_input names belonging to the specified set_id.

• set_string get_bool_output_set (xtsc::u32 set_id=0) const

Get the set of bool_output names belonging to the specified set_id.

• set_string get_uint_output_set (xtsc::u32 set_id=0) const

Get the set of uint_output names belonging to the specified set_id.

• set_string get_wide_output_set (xtsc::u32 set_id=0) const

Get the set of wide_output names belonging to the specified set_id.

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• xtsc::u32 get_bit_width (const std::string &port_name) const

Return the bit width of the name input/output port.

• bool_input & get_bool_input (const std::string &port_name) const

Return a reference to the sc_in<bool> of the named input.

• uint_input & get_uint_input (const std::string &port_name) const

Return a reference to the sc_in<sc_uint_base> of the named input.

• wide_input & get_wide_input (const std::string &port_name) const

Return a reference to the sc_in<sc_bv_base> of the named input.

• bool_output & get_bool_output (const std::string &port_name) const

Return a reference to the sc_out<bool> of the named output.

• uint_output & get_uint_output (const std::string &port_name) const

Return a reference to the sc_out<sc_uint_base> of the named output.

• wide_output & get_wide_output (const std::string &port_name) const

Return a reference to the sc_out<sc_bv_base> of the named output.

• xtsc::u32 get_num_sets () const

Return the number of port sets (memory ports) this device has.

• void dump_ports (std::ostream &os=std::cout, xtsc::u32 set_id=0xFFFFFFFF)

Dump name, type, and bit-width of all ports of the specified set.

Static Public Member Functions

• static std::string get_interface_uc (const char ∗interface_name)
Helper function to get an upper-case version of the "memory_interface" parameter.

• static std::string get_interface_lc (const char ∗interface_name)

Helper function to get a lower-case version of the "memory_interface" parameter.

• static memory_interface_type get_interface_type (xtsc::xtsc_core::memory_port

mem_port)
Helper function to get the interface type given a memory_port.

• static memory_interface_type get_interface_type (const std::string &interface_name)

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Helper function to get the interface type given a string.

• static const char ∗ get_interface_name (memory_interface_type interface_type)

Helper function to get the interface name given the interface_type.

• static xtsc::u32 get_number_of_enables (memory_interface_type interface_type,

xtsc::u32 byte_width)
Helper function to get the number of bits (i.e. number of enables) in the byte/word enable
port.

• static bool is_pif_or_idma (memory_interface_type type)

Return true if interface type is PIF or IDMA0.

Protected Member Functions

• void confirm_valid_set_id (xtsc::u32 set_id) const
Confirm set_id is valid.

• std::string get_full_port_name (const std::string &port_name, bool append_id,

xtsc::u32 set_id) const
Create the full port name.

• void confirm_unique_name_and_valid_set_id (const std::string &port_name,

xtsc::u32 set_id) const
Confirm port_name is unique and that set_id is valid.

• bool_input & add_bool_input (const std::string &port_name, bool append_id,

xtsc::u32 set_id, bool no_subbank=false)
Add an sc_in<bool> with the specified name.

• uint_input & add_uint_input (const std::string &port_name, xtsc::u32 num_bits, bool

append_id, xtsc::u32 set_id)
Add an sc_in<sc_uint_base> with the specified name.

• wide_input & add_wide_input (const std::string &port_name, xtsc::u32 num_bits, bool

append_id, xtsc::u32 set_id)
Add an sc_in<sc_bv_base> with the specified name.

• bool_output & add_bool_output (const std::string &port_name, bool append_id,

xtsc::u32 set_id, bool no_subbank=false)
Add an sc_out<bool> with the specified name.

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• uint_output & add_uint_output (const std::string &port_name, xtsc::u32 num_bits,

bool append_id, xtsc::u32 set_id)
Add an sc_out<sc_uint_base> with the specified name.

• wide_output & add_wide_output (const std::string &port_name, xtsc::u32 num_bits,

bool append_id, xtsc::u32 set_id)
Add an sc_out<sc_bv_base> with the specified name.

• void parse_port_name_and_bit_width (const xtsc::xtsc_parms &parms, const char

∗parm_name, std::string &parm_value, std::string &port_name, xtsc::u32 &bit_width,
xtsc::u32 min_bits, xtsc::u32 max_bits)
Parse a parameter value in the format "<PortName>,<BitWidth>".

Protected Attributes
• sc_core::sc_module & m_sc_module
Reference to the sc_module being constructed with these pins.

• xtsc::u32 m_num_sets
Number of sets of ports (e.g. number of memory ports, NOT sc_port).

• xtsc::u32 m_num_subbanks
Number of subbanks (or 0 if not subbanked).

• sc_core::sc_trace_file ∗ m_p_trace_file
Pointer to optional VCD object.

• std::string m_suffix
Suffix to be added to every pin-level input and output name.

• bool m_banked
If true and m_num_subbanks is 0, then add "B" after the base port_name and before the
set_id.

• bool m_split_rw
When m_split_rw is true, if append_id is true in a call to one of the add_xxx_input()/add_-
xxx_output() methods then adjusted_set_id will be used as part of the port name instead
of set_id according to the formula: adjusted_set_id = floor(set_id / 2).

• bool m_has_dma

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If true use "DMA" instead of adjusted_set_id for last adjusted_set_id.

• bool m_append_subbank
Include the "S" and subbank number in suffix (N.A. unless m_num_subbanks > 1).

• map_string_u32 m_map_port_size
Map of pin-level port name to bit width.

• set_string m_set_port
Set of names of all pin-level inputs and outputs.

• set_string m_set_input
Set of names of all pin-level inputs.

• set_string m_set_output
Set of names of all pin-level outputs.

• vector_set_string m_vector_set_input
Vector[i] is the set of names of all set i pin-level inputs.

• vector_set_string m_vector_set_output
Vector[i] is the set of names of all set i pin-level outputs.

• vector_set_string m_vector_set_bool_input
Vector[i] is the set of names of all set i sc_in<bool>.

• vector_set_string m_vector_set_uint_input
Vector[i] is the set of names of all set i sc_in<sc_uint_base>.

• vector_set_string m_vector_set_wide_input
Vector[i] is the set of names of all set i sc_in<sc_bv_base>.

• vector_set_string m_vector_set_bool_output
Vector[i] is the set of names of all set i sc_out<bool>.

• vector_set_string m_vector_set_uint_output
Vector[i] is the set of names of all set i sc_out<sc_uint_base>.

• vector_set_string m_vector_set_wide_output
Vector[i] is the set of names of all set i sc_out<sc_bv_base>.

• map_bool_input m_map_bool_input

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The map of all sc_in<bool> inputs.

• map_uint_input m_map_uint_input
The map of all sc_in<sc_uint_base> inputs.

• map_wide_input m_map_wide_input
The map of all sc_in<sc_bv_base> inputs.

• map_bool_output m_map_bool_output
The map of all sc_out<bool> outputs.

• map_uint_output m_map_uint_output
The map of all sc_out<sc_uint_base> outputs.

• map_wide_output m_map_wide_output
The map of all sc_out<sc_bv_base> outputs.

Static Protected Attributes

• static const xtsc::u32 m_id_bits = 6

Number of bits in POReqId/PIRespId.

• static const xtsc::u32 m_num_ids = 1 << m_id_bits

Number of possible ID’s.

• static const xtsc::u32 m_id_mask = m_num_ids - 1

Mask for POReqId/PIRespId.

• static const xtsc::u32 m_vadrs_mask = 0x0003F000

Mask in virtual address of POReqCohVAdrsIndex.

• static const xtsc::u32 m_vaddr_lo_mask = 0x00000FFF

Mask of low bits in virtual address below VAdrsIndex bits.

• static const xtsc::u32 m_vadrs_shift = 12

Shift of masked virtual address to get POReqCohVAdrsIndex.

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Friends

• std::ostream & operator<< (std::ostream &os, const req_cntl &req)

• std::ostream & operator<< (std::ostream &os, const resp_cntl &resp)

7.94.1 Detailed Description

This is a base class for modules implementing pin-level interfaces, especially pin-level
memory interfaces. This class is responsible for containing and managing the sc_in<>
and sc_out<> ports of the derived class (the derived class should also inherit from sc_-
module).
This class supports multi-ported memories. A single-ported memory is said to have 1 port
set, a dual-ported memory is said to have 2 port sets, etc. The number of port sets is
specified using the num_sets parameter of the xtsc_module_pin_base constructor.
Three types of sc_in<> ports and three types of sc_out<> ports are supported:

Type Alias Usage

-------------------- ----------- ----------------------------------------------
sc_in<bool> bool_input A scalar input (1 bit).
sc_in<sc_uint_base> uint_input A vector input with 2-64 bits.
sc_in<sc_bv_base> wide_input A vector input of arbitrary width.
sc_out<bool> bool_output A scalar output (1 bit).
sc_out<sc_uint_base> uint_output A vector output with 2-64 bits.
sc_out<sc_bv_base> wide_output A vector output of arbitrary width.

Ports are created using one of the 6 methods corresponding to the type of port de-
sired: add_bool_input(), add_uint_input(), add_wide_input(), add_bool_output(), add_-
uint_output(), and add_wide_output().
Once created, a reference to a port can be obtained using one of the 6 methods: get_-
bool_input(), get_uint_input(), get_wide_input(), get_bool_output(), get_uint_output(), and
get_wide_output().

See also:
xtsc_tlm2pin_memory_transactor
xtsc_pin2tlm_memory_transactor
xtsc_memory_pin

Definition at line 72 of file xtsc_module_pin_base.h.

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7.94.2 Constructor & Destructor Documentation

7.94.2.1 xtsc_module_pin_base (sc_core::sc_module & module, xtsc::u32

num_sets, sc_core::sc_trace_file ∗ p_trace_file, const std::string &
suffix, bool banked = false, bool split_rw = false, bool has_dma =
false, xtsc::u32 num_subbanks = 0)

Constructor for a xtsc_module_pin_base.

Parameters:
module Reference to the associated sc_module.
num_sets Number of I/O port sets (e.g. a single-ported memory has 1 set of ports, a
dual-ported memory has 2 sets of ports, etc.). If split_rw is true, then a read port
set counts as one and its corresponding write port set counts as another one.
p_trace_file Pointer to VCD object (can be NULL to indicate no tracing). If not NULL,
then all input and output pins will be traced.
suffix This constant suffix will be added to every port name. This suffix can be set to
the empty string ("") if no suffix is desired.
banked True if this is for a banked memory. If banked is true and num_subbanks
is 0, then when forming the full port name the letter "B" will be added after the
base port_name and before each set_id. If banked is true and num_subbanks
is set then when forming the full port name the letter "B" will be added after the
base port_name, followed by floor(set_id/num_subbanks), followed by the letter
"S" followed by set_idnum_subbanks, followed by suffix, if any.
split_rw True if this is for a DRAM with split Rd/Wr interfaces.
has_dma True if last split Rd/Wr interface is from inbound PIF (so when forming the
full port name the suffix "DMA" will be used instead of the port digit M). See m_-
has_dma.
num_subbanks Number of subbanks. Leave at 0 unless the memory has multiple
subbanks, in which case num_subbanks should be greater then 1 and evenly
divide num_sets. See banked.

7.94.3 Member Function Documentation

7.94.3.1 bool_input& get_bool_input (const std::string & port_name) const

Return a reference to the sc_in<bool> of the named input. This method is used for port
binding. For example, to bind the "PIReqRdy" sc_in<bool> of an xtsc_module_pin_base
named pin to an sc_signal<bool> named PIReqRdy:

pin.get_bool_input("PIReqRdy")(PIReqRdy);

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7.94.3.2 uint_input& get_uint_input (const std::string & port_name) const

Return a reference to the sc_in<sc_uint_base> of the named input. This method is used
for port binding. For example, to bind the "PIRespCntl" sc_in<sc_uint_base> of an xtsc_-
module_pin_base named pin to an sc_signal<sc_uint_base> named PIRespCntl:

pin.get_uint_input("PIRespCntl")(PIRespCntl);

7.94.3.3 wide_input& get_wide_input (const std::string & port_name) const

Return a reference to the sc_in<sc_bv_base> of the named input. This method is used
for port binding. For example, to bind the "PIRespData" sc_in<sc_bv_base> of an xtsc_-
module_pin_base named pin to an sc_signal<sc_bv_base> named PIRespData:

pin.get_wide_input("PIRespData")(PIRespData);

7.94.3.4 bool_output& get_bool_output (const std::string & port_name) const

Return a reference to the sc_out<bool> of the named output. This method is used for port
binding. For example, to bind the "POReqValid" sc_out<bool> of an xtsc_module_pin_-
base named pin to an sc_signal<bool> named POReqValid:

pin.get_bool_output("POReqValid")(POReqValid);

7.94.3.5 uint_output& get_uint_output (const std::string & port_name) const

Return a reference to the sc_out<sc_uint_base> of the named output. This method is

used for port binding. For example, to bind the "POReqCntl" sc_out<sc_uint_base> of an
xtsc_module_pin_base named pin to an sc_signal<sc_uint_base> named POReqCntl:

pin.get_uint_output("POReqCntl")(POReqCntl);

7.94.3.6 wide_output& get_wide_output (const std::string & port_name) const

Return a reference to the sc_out<sc_bv_base> of the named output. This method is used
for port binding. For example, to bind the "POReqData" sc_out<sc_bv_base> of an xtsc_-
module_pin_base named pin to an sc_signal<sc_bv_base> named POReqData:

pin.get_wide_output("POReqData")(POReqData);

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7.94.3.7 void dump_ports (std::ostream & os = std::cout, xtsc::u32 set_id =

0xFFFFFFFF)

Dump name, type, and bit-width of all ports of the specified set.

Parameters:
os The ostream object to dump to.
set_id The port set to dump or 0xFFFFFFFF, the default, to dump all port sets.

7.94.3.8 bool_input& add_bool_input (const std::string & port_name, bool

append_id, xtsc::u32 set_id, bool no_subbank = false) [protected]

Add an sc_in<bool> with the specified name.

Parameters:
port_name The base port name. The full port name is formed by concatenating port_-
name, set_id (if append_id is true), and the optional suffix passed into the xtsc_-
module_pin_base constructor.
append_id If true, then set_id will be part of the full port name. Otherwise, set_id will
not be part of the full port name. Note: See m_split_rw.
set_id This specifies the set this port belongs.
no_subbank Set true to cause m_append_subbank to be forced false for this call only
(used for lock/busy signals that are per bank, not per subbank).

7.94.3.9 uint_input& add_uint_input (const std::string & port_name, xtsc::u32

num_bits, bool append_id, xtsc::u32 set_id) [protected]

Add an sc_in<sc_uint_base> with the specified name.

Parameters:
port_name The base port name. The full port name is formed by concatenating port_-
name, set_id (if append_id is true), and the optional suffix passed into the xtsc_-
module_pin_base constructor.
num_bits The number of bits.
append_id If true, then set_id will be part of the full port name. Otherwise, set_id will
not be part of the full port name. Note: See m_split_rw.
set_id This specifies the set this port belongs.

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7.94.3.10 wide_input& add_wide_input (const std::string & port_name, xtsc::u32

num_bits, bool append_id, xtsc::u32 set_id) [protected]

Add an sc_in<sc_bv_base> with the specified name.

Parameters:
port_name The base port name. The full port name is formed by concatenating port_-
name, set_id (if append_id is true), and the optional suffix passed into the xtsc_-
module_pin_base constructor.
num_bits The number of bits.
append_id If true, then set_id will be part of the full port name. Otherwise, set_id will
not be part of the full port name. Note: See m_split_rw.
set_id This specifies the set this port belongs.

7.94.3.11 bool_output& add_bool_output (const std::string & port_name, bool

append_id, xtsc::u32 set_id, bool no_subbank = false) [protected]

Add an sc_out<bool> with the specified name.

Parameters:
port_name The base port name. The full port name is formed by concatenating port_-
name, set_id (if append_id is true), and the optional suffix passed into the xtsc_-
module_pin_base constructor.
append_id If true, then set_id will be part of the full port name. Otherwise, set_id will
not be part of the full port name. Note: See m_split_rw.
set_id This specifies the set this port belongs.
no_subbank Set true to cause m_append_subbank to be forced false for this call only
(used for lock/busy signals that are per bank, not per subbank).

7.94.3.12 uint_output& add_uint_output (const std::string & port_name, xtsc::u32

num_bits, bool append_id, xtsc::u32 set_id) [protected]

Add an sc_out<sc_uint_base> with the specified name.

Parameters:
port_name The base port name. The full port name is formed by concatenating port_-
name, set_id (if append_id is true), and the optional suffix passed into the xtsc_-
module_pin_base constructor.

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num_bits The number of bits.

append_id If true, then set_id will be part of the full port name. Otherwise, set_id will
not be part of the full port name. Note: See m_split_rw.
set_id This specifies the set this port belongs.

7.94.3.13 wide_output& add_wide_output (const std::string & port_name,

xtsc::u32 num_bits, bool append_id, xtsc::u32 set_id) [protected]

Add an sc_out<sc_bv_base> with the specified name.

Parameters:
port_name The base port name. The full port name is formed by concatenating port_-
name, set_id (if append_id is true), and the optional suffix passed into the xtsc_-
module_pin_base constructor.
num_bits The number of bits.
append_id If true, then set_id will be part of the full port name. Otherwise, set_id will
not be part of the full port name. Note: See m_split_rw.
set_id This specifies the set this port belongs.

7.94.3.14 void parse_port_name_and_bit_width (const xtsc::xtsc_parms & parms,

const char ∗ parm_name, std::string & parm_value, std::string &
port_name, xtsc::u32 & bit_width, xtsc::u32 min_bits, xtsc::u32
max_bits) [protected]

Parse a parameter value in the format "<PortName>,<BitWidth>". This method parses

a parameter value in the format "<PortName>,<BitWidth>" and returns the parameter
value, the port name, and the bit width. It is meant to be used for the "req_user_data" and
"rsp_user_data" parameters of the pin-level memory interface classes.

Parameters:
parms The xtsc_parms object which has a parameter named by parm_name.
parm_name The parameter name (e.g. "req_user_data").
parm_value A reference to the string in which to return the value that parm_name
maps to.
port_name A reference to the string in which to return the base port name.
bit_width A reference to the u32 in which to return the bit width.
min_bits The minimum supported bit_width.
max_bits The maximum supported bit_width.

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7.94.4 Member Data Documentation

7.94.4.1 bool m_banked [protected]

If true and m_num_subbanks is 0, then add "B" after the base port_name and before the
set_id. If m_num_subbanks is non-zero, then add "B" and bank, then add "S" and subb-
bank. Where: bank=floor(set_id/m_num_subbanks) subbank=set_id % m_num_subbanks
Definition at line 771 of file xtsc_module_pin_base.h.
The documentation for this class was generated from the following file:

• xtsc_module_pin_base.h

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7.95 xtsc_parms Class Reference

Base class for core and component module construction parameters.

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#include <xtsc/xtsc_parms.h>Inheritance diagram for xtsc_parms:

xtsc_core_parms

xtsc_initialize_parms

xtsc_tx_loader_parms

xtsc_udma_parms

xtsc_arbiter_parms

xtsc_lookup_driver_parms

xtsc_lookup_parms

xtsc_lookup_pin_parms

xtsc_master_parms

xtsc_master_tlm2_parms
xtsc_cache_parms

xtsc_memory_parms
xtsc_dma_engine_parms

xtsc_memory_pin_parms

xtsc_memory_tlm2_parms

xtsc_memory_trace_parms

xtsc_parms xtsc_mmio_parms

xtsc_pin2tlm_lookup_transactor_parms

xtsc_pin2tlm_memory_transactor_parms

xtsc_queue_consumer_parms
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Public Types
• enum xtsc_parameter_type {
PARM_TYPE_BOOL,
PARM_TYPE_DOUBLE,
PARM_TYPE_U32,
PARM_TYPE_VOID_POINTER,
PARM_TYPE_U32_VECTOR,
PARM_TYPE_C_STR,
PARM_TYPE_C_STR_ARRAY,
PARM_TYPE_XTSC_PARMS }

Public Member Functions

• xtsc_parms ()
Create an xtsc_parms object.

• xtsc_parms (const xtsc_parms &parms)

Copy constructor.

• xtsc_parms & operator= (const xtsc_parms &parms)

Copy assignment.

• virtual const char ∗ kind () const

Return the kind (C++ type) of this xtsc_parms object.

• u32 dump (std::ostream &os=std::cout) const

Dump all dumpable parameters alphabetically.

• u32 dump_by_type (std::ostream &os=std::cout, bool recurse=false, const std::string

&prefix="") const
Dump all parameters grouped by type (that is, all bool parameters, then all u32 parameters,
etc).

• void dump_type (xtsc_parameter_type parm_type, std::ostream &os=std::cout)

const
Dump all parameters of the specified type.

• void dump_value (const char ∗name, std::ostream &os=std::cout) const

Dump the value of the specified parameter.

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• bool exists (const char ∗name) const

Determine if a parameter with the specified name exists.

• bool dumpable (const char ∗name) const

Determine if the named parameter is dumpable.

• bool writable (const char ∗name) const

Determine if the named parameter is writable.

• xtsc_parameter_type get_parameter_type (const char ∗name) const

This method returns the xtsc_parameter_type of the parameter with the specified name.

• const char ∗ get_parameter_type_name (xtsc_parameter_type parm_type) const

Return a c-string corresponding to the specified xtsc_parameter_type.

• void set (const char ∗name, bool value)

Set an existing named parameter of type bool.

• void get (const char ∗name, bool &value) const

Get the named value of type bool.

• bool get_bool (const char ∗name) const

Return the named value of type bool.

• const std::map< std::string, bool > & get_bool_map ()

Get the name-to-bool-value map.

• u32 dump_bool_map (std::ostream &os=std::cout, const std::string &prefix="")

const
Dump all dumpable bool parameters.

• void set (const char ∗name, double value)

Set an existing named parameter of type double.

• void get (const char ∗name, double &value) const

Get the named value of type double.

• double get_double (const char ∗name) const

Return the named value of type double.

• const std::map< std::string, double > & get_double_map ()

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Get the name-to-double-value map.

• u32 dump_double_map (std::ostream &os=std::cout, const std::string &prefix="")

const
Dump all dumpable double parameters.

• void set (const char ∗name, int value)

Set an existing named parameter of type int in the u32 map.

• void get (const char ∗name, int &value) const

Get the named value from the u32 map as type int.

• int get_int (const char ∗name) const

Get the named value from the u32 map as type int.

• void set (const char ∗name, u32 value)

Set an existing named parameter of type u32.

• void get (const char ∗name, u32 &value) const

Get the named value of type u32.

• u32 get_u32 (const char ∗name) const

Return the named value of type u32.

• u32 get_non_zero_u32 (const char ∗name) const

Return the named value of type u32 if it is non-zero.

• const std::map< std::string, u32 > & get_u32_map ()

Get the name-to-u32-value map.

• u32 dump_u32_map (std::ostream &os=std::cout, const std::string &prefix="")

const
Dump all dumpable u32 parameters.

• void set (const char ∗name, const std::vector< u32 > &value)
Set an existing named parameter of type vector<u32>.

• void get (const char ∗name, std::vector< u32 > &value) const
Get the named value of type vector<u32>.

• const std::vector< u32 > get_u32_vector (const char ∗name) const

Return the named value of type vector<u32>.

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• const std::map< std::string, std::vector< u32 > > & get_u32_vector_map ()

Get the name-to-vector<u32>-value map.

• u32 dump_u32_vector_map (std::ostream &os=std::cout, const std::string &prefix="")

const
Dump all dumpable vector<u32> parameters.

• void set (const char ∗name, const void ∗value)

Set an existing named parameter of type void∗.

• void get (const char ∗name, const void ∗&value) const

Get the named value of type void∗.

• const void ∗ get_void_pointer (const char ∗name) const

Return the named value of type void∗.

• const std::map< std::string, const void ∗ > & get_void_pointer_map ()

Get the name-to-void∗-value map.

• u32 dump_void_pointer_map (std::ostream &os=std::cout, const std::string &pre-

fix="") const
Dump all dumpable void∗ parameters.

• void set (const char ∗name, const char ∗value)

Set an existing named parameter of type char∗ (c-string).

• void get (const char ∗name, const char ∗&value) const

Get the named value of type char∗ (c-string).

• const char ∗ get_c_str (const char ∗name) const

Return the named value of type char∗ (c-string).

• const char ∗ get_non_empty_c_str (const char ∗name) const

Return the named value of type char∗ if it is neither NULL nor empty.

• const std::map< std::string, const char ∗ > & get_c_str_map ()

Get the name-to-char∗-value map.

• u32 dump_c_str_map (std::ostream &os=std::cout, const std::string &prefix="")

const
Dump all dumpable char∗ parameters.

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• void set (const char ∗name, const char ∗const ∗value)

Set an existing named parameter of type char∗∗ (NULL-terminated array of c-strings).

• void get (const char ∗name, const char ∗const ∗&value) const
Get the named value of type char∗∗ (NULL-terminated array of c-strings).

• const char ∗const ∗ get_c_str_array (const char ∗name) const

Return the named value of type char∗∗ (NULL-terminated array of c-strings).

• const std::map< std::string, char ∗∗ > & get_c_str_array_map ()

Get the name-to-char∗∗-value map.

• u32 dump_c_str_array_map (std::ostream &os=std::cout, const std::string &prefix="")

const
Dump all dumpabe char∗∗ parameters.

• void set (const char ∗name, const xtsc_parms &value)

Set an existing named parameter of type xtsc_parms.

• void get (const char ∗name, xtsc_parms &value) const

Get the named value of type xtsc_parms.

• xtsc_parms get_xtsc_parms (const char ∗name) const

Return the named value of type xtsc_parms.

• const std::map< std::string, xtsc_parms > & get_xtsc_parms_map ()

Get the name-to-xtsc_parms-value map.

• u32 dump_xtsc_parms_map (std::ostream &os=std::cout, bool recurse=false, const

std::string &prefix="") const
Dump all dumpable xtsc_parms parameters.

• void set_name_width (u32 name_width)

Set the width of the name column used by the dump methods.

• u32 get_name_width ()
Get the width of the name column used by the dump methods.

• u32 extract_parms (int argc, const char ∗const argv[ ], const std::string &id="")
Extract any applicable parameters from a c-string array.

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Protected Member Functions

• void add (const char ∗name, bool value, bool read_only=false, bool dumpable=true)
Add a new named parameter of type bool.

• void add (const char ∗name, double value, bool read_only=false, bool
dumpable=true)
Add a new named parameter of type double.

• void add (const char ∗name, int value, bool read_only=false, bool dumpable=true)
Add a new named parameter of type int in the u32 map.

• void add (const char ∗name, u32 value, bool read_only=false, bool dumpable=true)
Add a new named parameter of type u32.

• void add (const char ∗name, const std::vector< u32 > &value, bool read_only=false,
bool dumpable=true)
Add a new named parameter of type vector<u32>.

• void add (const char ∗name, const void ∗value, bool read_only=false, bool
dumpable=true)
Add a new named parameter of type void∗.

• void add (const char ∗name, const char ∗value, bool read_only=false, bool
dumpable=true)
Add a new named parameter of type char∗ (c-string).

• void add (const char ∗name, const char ∗const ∗value, bool read_only=false, bool
dumpable=true)
Add a new named parameter of type char∗∗ (NULL-terminated array of c-strings).

• void add (const char ∗name, const xtsc_parms &value, bool read_only=false, bool
dumpable=true)
Add a new named parameter of type xtsc_parms.

• virtual void copy_void_pointer (const std::string &name, const void ∗value)

This virtual method does a shallow copy of the void∗ pointer (the pointer is copied, but the
(unknown) object it points to is not).

• virtual void copy_their_stuff (const xtsc_parms &parms)

• virtual void delete_our_stuff ()
• void no_value_found (xtsc_parameter_type parm_type, const char ∗name) const
• void set_dumpable (const char ∗name, bool dumpable)

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This method sets the dump attribute of a parameter.

• void validate_add_name (const char ∗name, xtsc_parameter_type parm_type) const

Helper method for add() to validate the parameter name.

• void validate_set_name (const char ∗name, xtsc_parameter_type parm_type) const

Helper method for set() to validate the parameter name.

Private Member Functions

• void dump_helper (std::ostream &os, const std::string &prefix, const std::string
&name) const
Helper method for dumping.

Private Attributes
• std::map< std::string, xtsc_parameter_type > m_type_map
name-to-type map

• std::map< std::string, bool > m_bool_map

name-to-value map for bool

• std::map< std::string, double > m_double_map

name-to-value map for double

• std::map< std::string, u32 > m_u32_map

name-to-value map for u32

• std::map< std::string, const void ∗ > m_void_pointer_map

name-to-value map for void∗

• std::map< std::string, std::vector< u32 > > m_u32_vector_map

name-to-value map for vector<u32>

• std::map< std::string, const char ∗ > m_c_str_map

name-to-value map for char∗

• std::map< std::string, char ∗∗ > m_c_str_array_map

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name-to-value map for char∗∗

• std::map< std::string, xtsc_parms > m_xtsc_parms_map

name-to-value map for xtsc_parms

• std::set< std::string > m_read_only_set

read-only set

• std::set< std::string > m_not_dumpable_set

not-dumpable set

• u32 m_name_width
width of the name column for dumping

7.95.1 Detailed Description

Base class for core and component module construction parameters. This
class is the base class for all core and component module constructor pa-
rameters sub-classes (xtsc_core_parms, xtsc_component::xtsc_memory_parms, xtsc_-
component::xtsc_arbiter_parms, etc).
This class maintains a map of name-value pairs for each of the following parameter types:

bool
double
u32
vector<u32>
void*
char*
char**
xtsc_parms

A name must be unique across all the name-value maps.

When a parameter name-value pair is first added (using the appropriate add() method),
it can be flagged as being read-only so that subsequent calls to the corresponding set()
method will result in an exception being thrown.
This class can be sub-classed as needed to provide default parameter values. Typically,
this would be done by calling the appropriate set methods from the sub-class constructor.
For example, to have a widget bit_width parameter with a default u32 value of 16, one could
create a xtsc_parms subclass like this:

class widget_parms : public xtsc_parms {

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public:
widget_parms() {
add("bit_width", (u32) 16);
}
};

Note: When an xtsc_parms object is copied a deep copied is performed for all parameters
except for void∗ parameters. See copy_void_pointer().

See also:
xtsc_core_parms
xtsc_component::xtsc_arbiter_parms
xtsc_component::xtsc_lookup_parms
xtsc_component::xtsc_lookup_driver_parms
xtsc_component::xtsc_master_parms
xtsc_component::xtsc_memory_parms
xtsc_component::xtsc_queue_parms
xtsc_component::xtsc_queue_consumer_parms
xtsc_component::xtsc_queue_producer_parms
xtsc_component::xtsc_router_parms
xtsc_component::xtsc_slave_parms
xtsc_component::xtsc_wire_parms

Definition at line 90 of file xtsc_parms.h.

7.95.2 Member Enumeration Documentation

7.95.2.1 enum xtsc_parameter_type

Enumerator:
PARM_TYPE_BOOL parameter of type bool
PARM_TYPE_DOUBLE parameter of type double
PARM_TYPE_U32 parameter of type u32
PARM_TYPE_VOID_POINTER parameter of type void∗
PARM_TYPE_U32_VECTOR parameter of type vector<u32>
PARM_TYPE_C_STR parameter of type char∗
PARM_TYPE_C_STR_ARRAY parameter of type char∗∗
PARM_TYPE_XTSC_PARMS parameter of type xtsc_parms

Definition at line 93 of file xtsc_parms.h.

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7.95.3 Member Function Documentation

7.95.3.1 virtual const char∗ kind () const [inline, virtual]

Return the kind (C++ type) of this xtsc_parms object. Sub-classes should override
this method and return a c-string identifying their type (e.g. "xtsc_core_parms", "xtsc_-
memory_parms", etc.).
Reimplemented in xtsc_initialize_parms, xtsc_cache_parms, xtsc_core_parms, xtsc_-
arbiter_parms, xtsc_dma_engine_parms, xtsc_lookup_parms, xtsc_lookup_driver_parms,
xtsc_master_parms, xtsc_master_tlm2_parms, xtsc_memory_parms, xtsc_memory_-
tlm2_parms, xtsc_mmio_parms, xtsc_queue_parms, xtsc_queue_consumer_parms,
xtsc_queue_producer_parms, xtsc_router_parms, xtsc_slave_parms, xtsc_wire_parms,
xtsc_wire_source_parms, xtsc_lookup_pin_parms, xtsc_memory_pin_parms, xtsc_-
memory_trace_parms, xtsc_pin2tlm_lookup_transactor_parms, xtsc_pin2tlm_memory_-
transactor_parms, xtsc_queue_pin_parms, xtsc_tlm2pin_memory_transactor_parms,
xtsc_tlm22xttlm_transactor_parms, xtsc_tx_loader_parms, xtsc_udma_parms, xtsc_-
wire_logic_parms, and xtsc_xttlm2tlm2_transactor_parms.
Definition at line 126 of file xtsc_parms.h.

7.95.3.2 u32 dump (std::ostream & os = std::cout) const

Dump all dumpable parameters alphabetically.

Parameters:
os The ostream object to which the parameters are dumped. Default is cout.

Returns:
the total number of parameters.

7.95.3.3 u32 dump_by_type (std::ostream & os = std::cout, bool recurse = false,

const std::string & prefix = "") const

Dump all parameters grouped by type (that is, all bool parameters, then all u32 parameters,
etc).

Parameters:
os The ostream object to which the parameters are dumped. Default is cout.
recurse If false (the default), then only the name of each hierarchical xtsc_parms ob-
jects is dumped (i.e their contents are not dumped). If true, the name of each hier-
archical xtsc_parms objects is dumped and then xtsc_parms::dump_by_type() is

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recursively called on that xtsc_parms object. Using recurse=true is only meaning-

ful when hierarchical parameters exist (i.e. when this xtsc_parms object contains
other xtsc_parms objects --see dump_xtsc_parms_map()).
prefix A string prefix to prepend to the parameter name. Default is an empty string. If
prefix is not empty, then a period is also prepended (between prefix and parame-
ter name). A non-empty prefix is generally only used when recurse is true.

Returns:
the total number of parameters. If recurse is true, then this number includes the num-
ber of parameters in each child xtsc_parms object recursively, but does not count any
child xtsc_parms object itself. If recurse is false, then this number includes 1 for each
immediate child xtsc_parms object, but does not count any parameters contained in
those child xtsc_parms objects.

7.95.3.4 void dump_type (xtsc_parameter_type parm_type, std::ostream & os =

std::cout) const

Dump all parameters of the specified type.

Parameters:
parm_type The parameter type to dump.
os The ostream object to which the parameters are dumped. Default is cout.

7.95.3.5 void dump_value (const char ∗ name, std::ostream & os = std::cout)

const

Dump the value of the specified parameter.

Parameters:
name The name of the parameter to dump.
os The ostream object to which the parameter value is to be dumped. Default is cout.

7.95.3.6 bool exists (const char ∗ name) const

Determine if a parameter with the specified name exists. The is method returns true if a
parameter with the specified name exists, otherwise it returns false.

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7.95.3.7 bool dumpable (const char ∗ name) const

Determine if the named parameter is dumpable. This method returns true if the named
parameter is dumpable, it returns false if the named parameter is not dumpable, and it
throws an exception if the named parameter does not exist.

7.95.3.8 bool writable (const char ∗ name) const

Determine if the named parameter is writable. The is method returns true if the named
parameter is writable, it returns false if the named parameter is read-only, and it throws an
exception if the named parameter does not exist.

7.95.3.9 xtsc_parameter_type get_parameter_type (const char ∗ name) const

This method returns the xtsc_parameter_type of the parameter with the specified name. It
throws an exception if the parameter does not exists.

7.95.3.10 void add (const char ∗ name, bool value, bool read_only = false, bool
dumpable = true) [protected]

Add a new named parameter of type bool.

Parameters:
name The name of the parameter. The first character of the name can be any alpha-
betic character plus underscore (_). Other characters can be any alphanumeric
character plus underscore (_).
value The value of the parameter. Note: value should be of type bool. If it is of type
int or u32, then the name- value pair will be stored in the u32 map instead of the
bool map. For literals, this means true/false should be used instead of 1/0.
read_only If true, then the value cannot be changed (calls to the set method will result
in an exception being thrown). If false (the default), then the value can be changed
by calls to the set method.
dumpable If true (the default), then this parameter is dumpable. If false, then the
parameter will not be dumped.

7.95.3.11 void set (const char ∗ name, bool value)

Set an existing named parameter of type bool.

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Parameters:
name The name of the parameter.
value The value of the parameter. Note: value should be of type bool. If it is of type
int or u32, then the name- value pair will be stored in the u32 map instead of the
bool map. For literals, this means true/false should be used instead of 1/0.

7.95.3.12 u32 dump_bool_map (std::ostream & os = std::cout, const std::string

& prefix = "") const

Dump all dumpable bool parameters.

Parameters:
os The ostream object to which the parameters are dumped. Default is cout.
prefix A string prefix to prepend to the parameter name. Default is an empty string.
If prefix is not empty, then a period is also prepended (between prefix and pa-
rameter name). This is mainly used for hierarchical parameters (i.e. when an
xtsc_parms object contains other xtsc_parms objects--see dump_xtsc_parms_-
map()).

Returns:
the total number of bool parameters.

7.95.3.13 void add (const char ∗ name, double value, bool read_only = false,
bool dumpable = true) [protected]

Add a new named parameter of type double.

Parameters:
name The name of the parameter. The first character of the name can be any alpha-
betic character plus underscore (_). Other characters can be any alphanumeric
character plus underscore (_).
value The value of the parameter. Note: value should be of type double. For literals,
this means a decimal point should be present.
read_only If true, then the value cannot be changed (calls to the set method will result
in an exception being thrown). If false (the default), then the value can be changed
by calls to the set method.
dumpable If true (the default), then this parameter is dumpable. If false, then the
parameter will not be dumped.

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7.95.3.14 void set (const char ∗ name, double value)

Set an existing named parameter of type double.

Parameters:
name The name of the parameter.
value The value of the parameter. Note: value should be of type double. For literals,
this means a decimal point should be present.

7.95.3.15 u32 dump_double_map (std::ostream & os = std::cout, const

std::string & prefix = "") const

Dump all dumpable double parameters.

Parameters:
os The ostream object to which the parameters are dumped. Default is cout.
prefix A string prefix to prepend to the parameter name. Default is an empty string.
If prefix is not empty, then a period is also prepended (between prefix and pa-
rameter name). This is mainly used for hierarchical parameters (i.e. when an
xtsc_parms object contains other xtsc_parms objects--see dump_xtsc_parms_-
map()).

Returns:
the total number of double parameters.

7.95.3.16 void add (const char ∗ name, int value, bool read_only = false, bool
dumpable = true) [protected]

Add a new named parameter of type int in the u32 map. Note: int values are stored in the
u32 map as u32 values.

Parameters:
name The name of the parameter. The first character of the name can be any alpha-
betic character plus underscore (_). Other characters can be any alphanumeric
character plus underscore (_).
value The value of the parameter.
read_only If true, then the value cannot be changed (calls to the set method will result
in an exception being thrown). If false (the default), then the value can be changed
by calls to the set method.

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dumpable If true (the default), then this parameter is dumpable. If false, then the
parameter will not be dumped.

7.95.3.17 void set (const char ∗ name, int value)

Set an existing named parameter of type int in the u32 map. Note: int values are stored in
the u32 map as u32 values.

Parameters:
name The name of the parameter.
value The value of the parameter.

7.95.3.18 void add (const char ∗ name, u32 value, bool read_only = false, bool
dumpable = true) [protected]

Add a new named parameter of type u32.

Parameters:
name The name of the parameter. The first character of the name can be any alpha-
betic character plus underscore (_). Other characters can be any alphanumeric
character plus underscore (_).
value The value of the parameter.
read_only If true, then the value cannot be changed (calls to the set method will result
in an exception being thrown). If false (the default), then the value can be changed
by calls to the set method.
dumpable If true (the default), then this parameter is dumpable. If false, then the
parameter will not be dumped.

7.95.3.19 void set (const char ∗ name, u32 value)

Set an existing named parameter of type u32.

Parameters:
name The name of the parameter.
value The value of the parameter.

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7.95.3.20 u32 get_non_zero_u32 (const char ∗ name) const

Return the named value of type u32 if it is non-zero. This is a convenience method to get
a u32 value and ensure it is not 0. If it is zero, an exception is thrown which gives the
xtsc_parms sub-class and the parameter name.
xtsc_exception if the value is 0.

7.95.3.21 u32 dump_u32_map (std::ostream & os = std::cout, const std::string &

prefix = "") const

Dump all dumpable u32 parameters.

Parameters:
os The ostream object to which the parameters are dumped. Default is cout.
prefix A string prefix to prepend to the parameter name. Default is an empty string.
If prefix is not empty, then a period is also prepended (between prefix and pa-
rameter name). This is mainly used for hierarchical parameters (i.e. when an
xtsc_parms object contains other xtsc_parms objects--see dump_xtsc_parms_-
map()).

Returns:
the total number of u32 parameters.

7.95.3.22 void add (const char ∗ name, const std::vector< u32 > & value, bool
read_only = false, bool dumpable = true) [protected]

Add a new named parameter of type vector<u32>.

Parameters:
name The name of the parameter. The first character of the name can be any alpha-
betic character plus underscore (_). Other characters can be any alphanumeric
character plus underscore (_).
value The value of the parameter.
read_only If true, then the value cannot be changed (calls to the set method will result
in an exception being thrown). If false (the default), then the value can be changed
by calls to the set method.
dumpable If true (the default), then this parameter is dumpable. If false, then the
parameter will not be dumped.

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7.95.3.23 void set (const char ∗ name, const std::vector< u32 > & value)

Set an existing named parameter of type vector<u32>.

Parameters:
name The name of the parameter.
value The value of the parameter.

7.95.3.24 u32 dump_u32_vector_map (std::ostream & os = std::cout, const

std::string & prefix = "") const

Dump all dumpable vector<u32> parameters.

Parameters:
os The ostream object to which the parameters are dumped. Default is cout.
prefix A string prefix to prepend to the parameter name. Default is an empty string.
If prefix is not empty, then a period is also prepended (between prefix and pa-
rameter name). This is mainly used for hierarchical parameters (i.e. when an
xtsc_parms object contains other xtsc_parms objects--see dump_xtsc_parms_-
map()).

Returns:
the total number of vector<u32> parameters.

7.95.3.25 void add (const char ∗ name, const void ∗ value, bool read_only = false,
bool dumpable = true) [protected]

Add a new named parameter of type void∗. Caution: By default, when an xtsc_parms
object is copied, the void∗ parameters are copied as opaque pointers. The (unknown)
objects pointed to by the void∗ parameters are NOT copied. For a means to change the
default behavior, see copy_void_pointer().

Parameters:
name The name of the parameter. The first character of the name can be any alpha-
betic character plus underscore (_). Other characters can be any alphanumeric
character plus underscore (_).
value The value of the parameter.

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read_only If true, then the value cannot be changed (calls to the set method will result
in an exception being thrown). If false (the default), then the value can be changed
by calls to the set method.
dumpable If true (the default), then this parameter is dumpable. If false, then the
parameter will not be dumped.

7.95.3.26 void set (const char ∗ name, const void ∗ value)

Set an existing named parameter of type void∗. Caution: By default, when an xtsc_parms
object is copied, the void∗ parameters are copied as opaque pointers. The (unknown)
objects pointed to by the void∗ parameters are NOT copied. For a means to change the
default behavior, see copy_void_pointer().

Parameters:
name The name of the parameter.
value The value of the parameter.

7.95.3.27 u32 dump_void_pointer_map (std::ostream & os = std::cout, const

std::string & prefix = "") const

Dump all dumpable void∗ parameters.

Parameters:
os The ostream object to which the parameters are dumped. Default is cout.
prefix A string prefix to prepend to the parameter name. Default is an empty string.
If prefix is not empty, then a period is also prepended (between prefix and pa-
rameter name). This is mainly used for hierarchical parameters (i.e. when an
xtsc_parms object contains other xtsc_parms objects--see dump_xtsc_parms_-
map()).

Returns:
the total number of void∗ parameters.

7.95.3.28 void add (const char ∗ name, const char ∗ value, bool read_only =
false, bool dumpable = true) [protected]

Add a new named parameter of type char∗ (c-string).

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Parameters:
name The name of the parameter. The first character of the name can be any alpha-
betic character plus underscore (_). Other characters can be any alphanumeric
character plus underscore (_).
value The value of the parameter.
read_only If true, then the value cannot be changed (calls to the set method will result
in an exception being thrown). If false (the default), then the value can be changed
by calls to the set method.
dumpable If true (the default), then this parameter is dumpable. If false, then the
parameter will not be dumped.

7.95.3.29 void set (const char ∗ name, const char ∗ value)

Set an existing named parameter of type char∗ (c-string).

Parameters:
name The name of the parameter.
value The value of the parameter.

7.95.3.30 const char∗ get_non_empty_c_str (const char ∗ name) const

Return the named value of type char∗ if it is neither NULL nor empty. This is a convenience
method to get a u32 value and ensure it is neither NULL nor empty. If it is NULL or empty
an exception is thrown which gives the xtsc_parms sub-class and the parameter name.
xtsc_exception if the value is NULL or empty.

7.95.3.31 u32 dump_c_str_map (std::ostream & os = std::cout, const std::string

& prefix = "") const

Dump all dumpable char∗ parameters.

Parameters:
os The ostream object to which the parameters are dumped. Default is cout.
prefix A string prefix to prepend to the parameter name. Default is an empty string.
If prefix is not empty, then a period is also prepended (between prefix and pa-
rameter name). This is mainly used for hierarchical parameters (i.e. when an
xtsc_parms object contains other xtsc_parms objects--see dump_xtsc_parms_-
map()).

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Returns:
the total number of char∗ parameters.

7.95.3.32 void add (const char ∗ name, const char ∗const ∗ value, bool read_only
= false, bool dumpable = true) [protected]

Add a new named parameter of type char∗∗ (NULL-terminated array of c-strings).

Parameters:
name The name of the parameter. The first character of the name can be any alpha-
betic character plus underscore (_). Other characters can be any alphanumeric
character plus underscore (_).
value The value of the parameter.
read_only If true, then the value cannot be changed (calls to the set method will result
in an exception being thrown). If false (the default), then the value can be changed
by calls to the set method.
dumpable If true (the default), then this parameter is dumpable. If false, then the
parameter will not be dumped.

Note: value can be NULL; however, if it is not NULL, then the last entry of the array (i.e.
value[last]) MUST be NULL.

7.95.3.33 void set (const char ∗ name, const char ∗const ∗ value)

Set an existing named parameter of type char∗∗ (NULL-terminated array of c-strings).

Parameters:
name The name of the parameter.
value The value of the parameter.

Note: value can be NULL; however, if it is not NULL, then the last entry of the array (i.e.
value[last]) MUST be NULL.

7.95.3.34 u32 dump_c_str_array_map (std::ostream & os = std::cout, const

std::string & prefix = "") const

Dump all dumpabe char∗∗ parameters.

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Parameters:
os The ostream object to which the parameters are dumped. Default is cout.
prefix A string prefix to prepend to the parameter name. Default is an empty string.
If prefix is not empty, then a period is also prepended (between prefix and pa-
rameter name). This is mainly used for hierarchical parameters (i.e. when an
xtsc_parms object contains other xtsc_parms objects--see dump_xtsc_parms_-
map()).

Returns:
the total number of char∗∗ parameters.

7.95.3.35 void add (const char ∗ name, const xtsc_parms & value, bool read_only
= false, bool dumpable = true) [protected]

Add a new named parameter of type xtsc_parms.

Parameters:
name The name of the parameter. The first character of the name can be any alpha-
betic character plus underscore (_). Other characters can be any alphanumeric
character plus underscore (_).
value The value of the parameter.
read_only If true, then the value cannot be changed (calls to the set method will result
in an exception being thrown). If false (the default), then the value can be changed
by calls to the set method.
dumpable If true (the default), then this parameter is dumpable. If false, then the
parameter will not be dumped.

7.95.3.36 void set (const char ∗ name, const xtsc_parms & value)

Set an existing named parameter of type xtsc_parms.

Parameters:
name The name of the parameter.
value The value of the parameter.

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7.95.3.37 u32 dump_xtsc_parms_map (std::ostream & os = std::cout, bool

recurse = false, const std::string & prefix = "") const

Dump all dumpable xtsc_parms parameters.

Parameters:
os The ostream object to which the parameters are dumped. Default is cout.
recurse If false (the default), then only the name of each hierarchical xtsc_parms ob-
jects is dumped (i.e their contents are not dumped). If true, the name of each
hierarchical xtsc_parms objects is dumped and then xtsc_parms::dump() is re-
cursively called on that xtsc_parms object.
prefix A string prefix to prepend to the parameter name. Default is an empty string. If
prefix is not empty, then a period is also prepended (between prefix and parame-
ter name).

Returns:
If recurse is true, then returns the number of parameters in each child xtsc_parms
object recursively, but does not count any child xtsc_parms object itself. If recurse is
false, then returns the number of immediate child xtsc_parms objects.

7.95.3.38 u32 extract_parms (int argc, const char ∗const argv[ ], const std::string
& id = "")

Extract any applicable parameters from a c-string array. This optional convenience method
is designed to make it easy to pass in module configuration parameters on the command
line. This method will scan the argv array looking for c-strings in one of the following 3
formats (leading hyphens are ignored):

1. <ParmName>=<NewValue>
2. <ParmType>::<ParmName>=<NewValue>
3. <id>.<ParmName>=<NewValue>

For each match found, if <ParmName> matches an existing parameter name then that
parameters value will be changed to <NewValue> subject to the following constraits on
formats 2 and 3.
For format 2, <ParmType> must match the value returned by this objects kind() method.
For format 3, <id> must match the id argument passed into this method.
Each extracted parameter value is logged at INFO_LOG_LEVEL.

Parameters:
argc The number of c-strings in argv.

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argv An array of c-strings.

id A c-string that can be used in conjuction with format 3 to narrow which argv c-strings
apply. One technique is to pass in name of the module that these parameters will
be used to configure.

Note: The id check does not apply to argv entries in formats 1 or 2.

Note: If <ParmName> is a parameter of type bool, then <NewValue> can be one of
0|1|t|f|true|false (case insensitive).
Note: If <ParmName> is a parameter of type vector<u32> or char∗∗ (c-string array), then
<NewValue> can be a comma-separated list of integers or strings, respectively.
Note: If any problem is detected with an argv entry in format 1, that argv entry will be
disregarded under the assumption that it doesn’t apply to this object.
As a technique, you may wish to put a call to this method in sc_main between the xtsc_-
parms sub-class constructor call and the XTSC module constructor call for each XTSC
module that the user might wish to configure at run time.
Examples:

In sc_main.cpp:
xtsc_core_parms core_parms(CONFIG_NAME, XTENSA_REGISTRY, TDK_DIR);
core_parms.extract_parms(argc, argv, "core0");
xtsc_core core0("core0", core_parms);

xtsc_memory_parms core0_pif_parms(core0, "pif");

core0_pif_parms.extract_parms(argc, argv, "core0_pif");
xtsc_memory core0_pif("core0_pif", core0_pif_parms);

Running program prog from command line:

prog --xtsc_core_parms::SimClients=summary --core0_pif.read_delay=8
prog --core0.SimTargetArgs=1,two,"Three Amigos"

Returns:
the number of parameters changed.

7.95.3.39 virtual void copy_void_pointer (const std::string & name, const void ∗
value) [protected, virtual]

This virtual method does a shallow copy of the void∗ pointer (the pointer is copied, but the
(unknown) object it points to is not). Sub-classes can override this virtual method to provide
their own copy mechanism.

Parameters:
name The name of the parameter.

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value The value of the parameter.

7.95.3.40 void set_dumpable (const char ∗ name, bool dumpable) [protected]

This method sets the dump attribute of a parameter.

Parameters:
name The name of the parameter.
dumpable The new value of dump attribute.

The documentation for this class was generated from the following file:

• xtsc_parms.h

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7.96 xtsc_pif_respond_if_impl Class Reference

Implementation of xtsc_respond_if for system RAM port.

#include <xtsc/xtsc_udma.h>Inheritance diagram for xtsc_pif_respond_if_impl:

xtsc_respond_if

xtsc_pif_respond_if_impl

Collaboration diagram for xtsc_pif_respond_if_impl:

xtsc_respond_if m_udma xtsc_ram_respond_if_impl

xtsc_mode_switch_if

m_ram_respond_impl
xtsc_command_handler_interface

m_udma m_udma
xtsc_pif_respond_if_impl
m_pif_respond_impl m_wer_lookup_impl
xtsc_udma xtsc_wer_lookup_if_impl
m_descriptor m_rer_lookup_impl
udma_descriptor
m_udma_parms

xtsc_parms xtsc_udma_parms m_udma

xtsc_lookup_if xtsc_rer_lookup_if_impl
xtsc_resettable xtsc_module m_pif_response
m_ram_response

xtsc_connection_interface

xtsc_response m_p_response
stream_dumper
m_stream_dumper

Public Member Functions

• xtsc_pif_respond_if_impl (const char ∗object_name, xtsc_udma &udma)

Constructor.

• bool nb_respond (const xtsc_response &response)

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Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to us.

Protected Attributes
• xtsc_udma & m_udma
Our xtsc_udma object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.96.1 Detailed Description

Implementation of xtsc_respond_if for system RAM port.

Definition at line 669 of file xtsc_udma.h.

7.96.2 Member Function Documentation

7.96.2.1 bool nb_respond (const xtsc_response & response) [virtual]

See also:
xtsc::xtsc_respond_if

Implements xtsc_respond_if.
The documentation for this class was generated from the following file:

• xtsc_udma.h

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7.97 xtsc_pin2tlm_lookup_transactor Class Reference

A transactor to convert a pin-level TIE lookup interface to Xtensa TLM.

#include <xtsc/xtsc_pin2tlm_lookup_transactor.h>Inheritance diagram for xtsc_-
pin2tlm_lookup_transactor:

xtsc_connection_interface xtsc_resettable

xtsc_module

xtsc_pin2tlm_lookup_transactor

Collaboration diagram for xtsc_pin2tlm_lookup_transactor:

xtsc_connection_interface xtsc_resettable xtsc_signal_sc_bv_base

xtsc_module xtsc_signal_sc_bv_base_floating

m_ready_floating

xtsc_pin2tlm_lookup_transactor

Public Member Functions

• SC_HAS_PROCESS (xtsc_pin2tlm_lookup_transactor)
• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

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• xtsc_pin2tlm_lookup_transactor (sc_core::sc_module_name module_name, const

xtsc_pin2tlm_lookup_transactor_parms &parms)
Constructor for an xtsc_pin2tlm_lookup_transactor.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• void reset (bool hard_reset=false)

Reset the xtsc_pin2tlm_lookup_transactor.

• void request_thread (void)

Request thread: samples m_req and m_address then calls nb_send_address() and nb_-
is_ready() and then notifies drive_data_thread.

• void drive_data_thread (void)

Thread to wait the appropriate delay for timing and latency then call nb_get_data() then
drive m_data then wait 1 clock cycle and then deassert m_data.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

Public Attributes
• sc_core::sc_in< sc_dt::sc_bv_base > m_address
pin-level address to lookup

• sc_core::sc_in< sc_dt::sc_bv_base > m_req

pin-level request to lookup

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• sc_core::sc_out< sc_dt::sc_bv_base > m_data

pin-level data signal from lookup

• sc_core::sc_out< sc_dt::sc_bv_base > m_ready

pin-level ready signal from lookup

• sc_core::sc_port< xtsc::xtsc_lookup_if > m_lookup

TLM port to the lookup.

Protected Member Functions

• void end_of_elaboration ()
Method to check interface width.

Protected Attributes

• log4xtensa::TextLogger & m_text

For logging.

• bool m_has_ready
From "has_ready" parameter.

• sc_core::sc_time m_latency
From "latency" parameter.

• xtsc::u64 m_clock_period_value
This device’s clock period as u64.

• sc_core::sc_time m_clock_period
This device’s clock period as sc_time.

• sc_core::sc_time m_time_resolution
The SystemC time resolution.

• bool m_has_posedge_offset
True if m_posedge_offset is non-zero.

• sc_core::sc_time m_posedge_offset

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From "posedge_offset" parameter.

• xtsc::u64 m_posedge_offset_value
m_posedge_offset as u64

• sc_core::sc_time m_sample_phase
From "sample_phase" parameter.

• xtsc::u32 m_address_width1
From "address_bit_width" parameter.

• xtsc::u32 m_data_width1
From "data_bit_width" parameter.

• sc_core::sc_trace_file ∗ m_p_trace_file
If "vcd_handle" specified.

• sc_dt::sc_bv_base m_zero_bv
To detect low signal.

• sc_dt::sc_bv_base m_one_bv
To detect high signal.

• sc_core::sc_event_queue m_drive_data
For drive_data_thread.

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

• xtsc::xtsc_signal_sc_bv_base_floating m_ready_floating

7.97.1 Detailed Description

A transactor to convert a pin-level TIE lookup interface to Xtensa TLM. This transactor
converts a pin-level TIE lookup interface to xtsc_lookup_if, the equivalent Xtensa TLM in-
terface.
This transactor supports a TIE lookup interface that has a ready signal; however, the down-
stream Xtensa TLM lookup must always return true to the nb_is_ready() call.

See also:
xtsc_pin2tlm_lookup_transactor_parms
xtsc::xtsc_lookup_if

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Definition at line 142 of file xtsc_pin2tlm_lookup_transactor.h.

7.97.2 Constructor & Destructor Documentation

7.97.2.1 xtsc_pin2tlm_lookup_transactor (sc_core::sc_module_name

module_name, const xtsc_pin2tlm_lookup_transactor_parms & parms)

Constructor for an xtsc_pin2tlm_lookup_transactor.

Parameters:
module_name Name of the xtsc_pin2tlm_lookup_transactor sc_module.
parms The remaining parameters for construction.

See also:
xtsc_pin2tlm_lookup_transactor_parms

The documentation for this class was generated from the following file:

• xtsc_pin2tlm_lookup_transactor.h

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7.98 xtsc_pin2tlm_lookup_transactor_parms Class Ref-

erence

Constructor parameters for a xtsc_pin2tlm_lookup_transactor object.

#include <xtsc/xtsc_pin2tlm_lookup_transactor.h>Inheritance diagram for xtsc_-
pin2tlm_lookup_transactor_parms:

xtsc_parms

xtsc_pin2tlm_lookup_transactor_parms

Collaboration diagram for xtsc_pin2tlm_lookup_transactor_parms:

xtsc_parms

xtsc_pin2tlm_lookup_transactor_parms

Public Member Functions

• xtsc_pin2tlm_lookup_transactor_parms (xtsc::u32 address_bit_width=1, xtsc::u32

data_bit_width=1, bool has_ready=false)
Constructor for an xtsc_pin2tlm_lookup_transactor_parms object.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

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7.98.1 Detailed Description

Constructor parameters for a xtsc_pin2tlm_lookup_transactor object. This class contains

the constructor parameters for a xtsc_pin2tlm_lookup_transactor object.

Name Type Description

------------------ ---- --------------------------------------------------------

"address_bit_width" u32 Width of request address in bits.

"data_bit_width" u32 Width of respone data in bits.

"has_ready" bool Specifies whether the lookup device has a ready signal.
This corresponds to the rdy keyword in the user's TIE
code for the lookup.

"latency" u32 The latency is defined by the <use_stage> and

<def_stage> values in the user TIE code defining the
TIE lookup port according to the following formula:
latency = <use_stage> - <def_stage>
If "has_ready" is true, "latency" specfies how many
clock cycles after m_ready (TIE_xxx_Rdy) is asserted
that m_data (TIE_xxx_In) is valid.
If "has_ready" is false, "latency" specfies how many
clock cycles after m_req (TIE_xxx_Out_Req) is asserted
that m_data (TIE_xxx_In) is valid. "latency" must be
greater than 0.
Default = 1.

"vcd_handle" void* Pointer to SystemC VCD object (sc_trace_file *) or 0 if

tracing is not desired.
Default = 0 (NULL).

"clock_period" u32 This is the length of this device's clock period

expressed in terms of the SystemC time resolution
(from sc_get_time_resolution()). A value of
0xFFFFFFFF means to use the XTSC system clock
period (from xtsc_get_system_clock_period()).
Default = 0xFFFFFFFF (i.e. use the system clock
period).

"posedge_offset" u32 This specifies the time at which the first posedge of
this device's clock conceptually occurs. It is
expressed in units of the SystemC time resolution and
the value implied by it must be strictly less than the
value implied by the "clock_period" parameter. A value
of 0xFFFFFFFF means to use the same posedge offset as
the system clock (from
xtsc_get_system_clock_posedge_offset()).
Default = 0xFFFFFFFF.

"sample_phase" u32 This parameter specifies the point in each clock period
at which the m_req and m_address signals are sampled.
This parameter is expressed in terms of the SystemC time
resolution (from sc_get_time_resolution()) and must be
strictly less than the clock period as specified by the

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"clock_period" parameter. A value of 0 means sampling

occurs at posedge clock as specfied by "posedge_offset".
The special value of 0xFFFFFFFF means to sample at 1
SystemC time resolution prior to posedge clock.
Default = 0xFFFFFFFF.

See also:
xtsc_pin2tlm_lookup_transactor
xtsc::xtsc_parms

Definition at line 94 of file xtsc_pin2tlm_lookup_transactor.h.

7.98.2 Constructor & Destructor Documentation

7.98.2.1 xtsc_pin2tlm_lookup_transactor_parms (xtsc::u32 address_bit_width = 1,

xtsc::u32 data_bit_width = 1, bool has_ready = false) [inline]

Constructor for an xtsc_pin2tlm_lookup_transactor_parms object.

Parameters:
address_bit_width Width of request address in bits.
data_bit_width Width of response data in bits.
has_ready Specifies whether or not the lookup device has a ready signal (corre-
sponds to the rdy keyword in the user’s TIE code for the lookup).

Definition at line 109 of file xtsc_pin2tlm_lookup_transactor.h.

The documentation for this class was generated from the following file:

• xtsc_pin2tlm_lookup_transactor.h

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7.99 xtsc_pin2tlm_memory_transactor Class Reference

This device converts memory transactions from pin level to transaction level.
#include <xtsc/xtsc_pin2tlm_memory_transactor.h>Inheritance diagram for xtsc_-
pin2tlm_memory_transactor:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_module_pin_base

xtsc_pin2tlm_memory_transactor

Collaboration diagram for xtsc_pin2tlm_memory_transactor:

xtsc_respond_if

xtsc_connection_interface
m_pin2tlm xtsc_respond_if_impl
xtsc_module
m_respond_impl
xtsc_resettable

xtsc_module_pin_base xtsc_pin2tlm_memory_transactor
m_subbank_activity m_debug_impl

subbank_activity
m_pin2tlm
xtsc_debug_if_impl

xtsc_debug_if

Classes

• class request_info
Information about each request.

• class subbank_activity
Keep track of subbank activity to a given given bank to ensure all responses are consistent
(all RSP_OK or all RSP_NACC).

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• class xtsc_debug_if_impl
Implementation of xtsc_debug_if.

• class xtsc_respond_if_impl
Implementation of xtsc_respond_if.

Public Types
• typedef xtsc::xtsc_request xtsc_request
• typedef xtsc::xtsc_response xtsc_response
• typedef sc_core::sc_fifo< sc_dt::sc_bv_base > wide_fifo
• typedef sc_core::sc_fifo< bool > bool_fifo
• typedef sc_core::sc_signal< bool > bool_signal
• typedef sc_core::sc_signal< sc_dt::sc_uint_base > uint_signal
• typedef sc_core::sc_signal< sc_dt::sc_bv_base > wide_signal
• typedef std::map< std::string, bool_signal ∗ > map_bool_signal
• typedef std::map< std::string, uint_signal ∗ > map_uint_signal
• typedef std::map< std::string, wide_signal ∗ > map_wide_signal
• typedef std::deque< xtsc::xtsc_address > address_deque

Public Member Functions

• SC_HAS_PROCESS (xtsc_pin2tlm_memory_transactor)
This SystemC macro inserts some code required for SC_THREAD’s to work.

• virtual const char ∗ kind () const

Our C++ type (SystemC uses this).

• xtsc_pin2tlm_memory_transactor (sc_core::sc_module_name module_name, const

xtsc_pin2tlm_memory_transactor_parms &pin2tlm_parms)
Constructor for a xtsc_pin2tlm_memory_transactor.

• ∼xtsc_pin2tlm_memory_transactor (void)
Destructor.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

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For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• void connect (xtsc::xtsc_core &core, xtsc::u32 pin2tlm_port=0)

Connect this xtsc_pin2tlm_memory_transactor to an xtsc_core.

• xtsc::u32 connect (xtsc_tlm2pin_memory_transactor &tlm2pin, xtsc::u32 tlm2pin_-

port=0, xtsc::u32 pin2tlm_port=0, bool single_connect=false)
Connect an xtsc_tlm2pin_memory_transactor transactor to this xtsc_pin2tlm_memory_-
transactor transactor.

• virtual void reset (bool hard_reset=false)

The implementation of reset() in xtsc_module logs a warning and does nothing else.

• memory_interface_type get_interface_type () const

Return the interface type.

• const char ∗ get_interface_name () const

Return the interface name string.

• xtsc::u32 get_num_ports () const

Return the number of memory ports this transactor has.

• bool get_append_id () const

Return true if pin port names include the set_id as a suffix.

Public Attributes
• sc_core::sc_port< xtsc::xtsc_request_if > ∗∗ m_request_ports
• sc_core::sc_export< xtsc::xtsc_respond_if > ∗∗ m_respond_exports
From us to slave (per mem port).

• sc_core::sc_export< xtsc::xtsc_debug_if > ∗∗ m_debug_exports

From slave to us (per mem port).

• xtsc::Readme How_to_get_input_and_output_ports
From master to us (per mem port).

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Protected Member Functions

• std::string adjust_name_and_check_size (const std::string &port_name, const xtsc_-

tlm2pin_memory_transactor &tlm2pin, xtsc::u32 tlm2pin_port, const set_string
&transactor_set) const
Helper method to get the tlm2pin port name and confirm pin sizes match.

• void dump_set_string (std::ostringstream &oss, const set_string &strings, const

std::string &indent)
Dump a set of strings one string per line with the specified indent.

• virtual void end_of_elaboration (void)

SystemC callback.

• virtual void start_of_simulation (void)

SystemC callback.

• void get_read_data_from_response (const xtsc::xtsc_response &response)

Move response buffer data to m_data.

• void sync_to_sample_phase ()
Sync to sample phase (m_sample_phase). If already at sample phase, sync to next one.

• void lcl_request_thread (void)

Handle local memory-interface requests on non-split Rd/Wr interfaces.

• void lcl_split_rw_request_thread (void)

Handle local memory-interface requests on split Rd/Wr interfaces.

• void lcl_drive_read_data_thread (void)

Handle local memory-interface requests.

• void lcl_drive_busy_thread (void)

Handle local memory-interface busy.

• void xlmi_load_retired_thread ()
DPort0LoadRetiredm.

• void xlmi_retire_flush_thread ()
DPort0RetireFlushm.

• void dram_lock_method ()

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DRamnLockm.

• void pif_sample_pin_request_thread (void)

PIF|IDMA0: Capture a pin request from upstream.

• void pif_drive_req_rdy_thread (void)

PIF|IDMA0: Drive PIReqRdy.

• void pif_send_tlm_request_thread (void)

PIF|IDMA0: Send a TLM request downstream.

• void pif_drive_pin_response_thread (void)

PIF|IDMA0: Send a pin response upstream.

• bool_signal & create_bool_signal (const std::string &signal_name)

Create an sc_signal<bool> with the specified name.

• uint_signal & create_uint_signal (const std::string &signal_name, xtsc::u32 num_bits)

Create an sc_signal<sc_uint_base> with the specified name and size.

• wide_signal & create_wide_signal (const std::string &signal_name, xtsc::u32 num_-

bits)
Create an sc_signal<sc_bv_base> with the specified name and size.

• void swizzle_byte_enables (xtsc::xtsc_byte_enables &byte_enables) const

Swizzle byte enables.

• request_info ∗ new_request_info (xtsc::u32 port)

Get a new request_info (from the pool).

• void delete_request_info (request_info ∗&p_request_info)

Delete an request_info (return it to the pool).

• xtsc_response ∗ new_response (const xtsc_response &response)

Get a new xtsc_request (from the pool).

• void delete_response (xtsc_response ∗&p_response)

Delete an xtsc_request (return it to the pool).

• void initialize_subbank_activity (subbank_activity ∗p_subbank_activity)

Initialize a subbank_activity to all zeroes.

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Protected Attributes
• xtsc_respond_if_impl ∗∗ m_respond_impl
m_respond_exports binds to this (per mem port)

• xtsc_debug_if_impl ∗∗ m_debug_impl
m_debug_exports binds to this (per mem port)

• xtsc::u32 m_num_ports
The number of memory ports this transactor has.

• std::deque< request_info ∗ > ∗ m_request_fifo

The fifo of incoming requests (per mem port).

• std::deque< xtsc_response ∗ > ∗ m_pif_resp_fifo

The fifo of incoming PIF|IDMA0 responses (per mem port).

• std::string m_interface_uc
Uppercase version of "memory_interface" parameter.

• std::string m_interface_lc
Lowercase version of "memory_interface" parameter.

• memory_interface_type m_interface_type
The memory interface type.

• xtsc::u32 m_size8
Byte size of the attached XLMI0 from "memory_byte_size" parameter.

• xtsc::u32 m_width8
Data width in bytes of the memory interface.

• xtsc::u32 m_dram_attribute_width
See "dram_attribute_width" parameter.

• sc_dt::sc_unsigned m_dram_attribute
To set value using xtsc_request::set_dram_attribute().

• sc_dt::sc_bv_base m_dram_attribute_bv
To read dram attribute before converting to sc_unsigned.

• xtsc::xtsc_address m_start_byte_address

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Number to be add to the pin address to form the TLM request address.

• xtsc::u64 m_clock_period_value
This device’s clock period as u64.

• sc_core::sc_time m_clock_period
This device’s clock period as sc_time.

• sc_core::sc_time m_time_resolution
The SystemC time resolution.

• sc_core::sc_time m_posedge_offset
From "posedge_offset" parameter.

• sc_core::sc_time m_sample_phase
Clock phase for sampling certain signals (see "sample_phase").

• sc_core::sc_time m_sample_phase_plus_one
m_sample_phase plus one clock period

• sc_core::sc_time m_output_delay
See "output_delay" parameter.

• sc_core::sc_time ∗ m_request_time_stamp
Time stamp of last-transfer request when "one_at_a_time" is true (per mem port).

• xtsc::u64 m_posedge_offset_value
m_posedge_offset as u64

• bool m_has_posedge_offset
True if m_posedge_offset is non-zero.

• bool ∗ m_waiting_for_nacc
True if waiting for RSP_NACC from PIF slave (per mem port).

• bool ∗ m_request_got_nacc
True if active request got RSP_NACC from PIF slave (per mem port).

• bool m_cbox
See "cbox" parameter.

• bool m_split_rw

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True if m_interface_type is DRAM0RW or DRAM1RW.

• bool m_has_dma
See "has_dma" parameter.

• bool m_append_id
True if pin port names should include the set_id.

• bool m_inbound_pif
True if interface is inbound PIF.

• bool m_snoop
True if interface is snoop port (future use).

• bool m_has_coherence
See "has_coherence" parameter.

• bool m_has_pif_attribute
See "has_pif_attribute" parameter.

• bool m_has_pif_req_domain
See "has_pif_req_domain" parameter.

• bool m_axi_exclusive
See "axi_exclusive" parameter.

• bool m_axi_exclusive_id
See "axi_exclusive_id" parameter.

• bool m_big_endian
True if master is big endian.

• bool m_write_responses
True if TLM write responses will be dropped on the floor (PIF|IDMA0 only).

• bool m_has_request_id
True if the "POReqId" and "PIRespId" ports should be present.

• bool m_one_at_a_time
See "one_at_a_time" parameter.

• bool m_prereject_responses

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See "prereject_responses" parameter.

• xtsc::u32 ∗ m_current_id
Used when m_has_request_id is false (per mem port).

• std::string m_req_user_data
See "req_user_data" parameter.

• std::string m_req_user_data_name
Name of request user data port.

• xtsc::u32 m_req_user_data_width1
Bit width of request user data port.

• std::string m_rsp_user_data
See "rsp_user_data" parameter.

• std::string m_rsp_user_data_name
Name of response user data port.

• xtsc::u32 m_rsp_user_data_width1
Bit width of response user data port.

• sc_dt::sc_bv_base ∗ m_user_data_val
Value for rsp_user_data port.

• xtsc::u32 m_address_bits
Number of bits in the address (non-PIF|IDMA0 only).

• xtsc::u32 m_check_bits
Number of bits in ECC/parity signals (from "check_bits").

• xtsc::xtsc_address m_address_mask
Address mask.

• xtsc::xtsc_address m_bus_addr_bits_mask
Address mask to get bits which indicate which byte lane.

• xtsc::u32 m_address_shift
Number of bits to right-shift the address.

• xtsc::u32 m_route_id_bits

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Number of bits in the route ID (PIF|IDMA0 only).

• xtsc::u32 m_max_cycle_entries
See "max_cycle_entries" parameter.

• subbank_activity ∗∗ m_subbank_activity
m_subbank_activity[bank][cycle_index]

• xtsc::u32 m_next_port_lcl_request_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_lcl_drive_read_data_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_lcl_drive_busy_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_xlmi_load_retired_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_xlmi_retire_flush_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_pif_sample_pin_request_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_pif_drive_req_rdy_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_pif_send_tlm_request_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_pif_drive_pin_response_thread
To give each thread instance a port number.

• bool m_has_busy
True if memory interface has a busy pin (non-PIF|IDMA0 only).

• bool m_has_lock
True if memory interface has a lock pin (DRAM0|DRAM0BS|DRAM0RW|DRAM1|DRAM1BS|DRAM1RW
only).

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• bool m_has_xfer_en
True if memory interface has Xfer enable pin (NA PIF|IDMA0|DROM0|XLMI0).

• sc_core::sc_event ∗ m_pif_req_event
Notify pif_send_tlm_request_thread (per mem port).

• sc_core::sc_event ∗ m_pif_resp_event
Notify pif_drive_pin_response_thread (per mem port).

• bool ∗ m_first_block_write
True if next BLOCK_WRITE will be first in the block (per mem port).

• xtsc::u32 ∗ m_burst_write_transfer_num
Transfer number for BURST_WRITE.

• bool ∗ m_first_rcw
True if next RCW will be first in the block (per mem port).

• bool ∗ m_dram_lock
State of DRAM lock pin.

• bool m_dram_lock_reset
State of DRAM lock pin needs to be reset.

• xtsc::u64 ∗ m_tag
Tag from first BLOCK_WRITE and RCW.

• xtsc::xtsc_address ∗ m_last_address
Keep track of BLOCK_WRITE/BURST_WRITE addresses.

• sc_dt::sc_uint_base m_address
The address after any required shifting and masking.

• sc_dt::sc_uint_base m_id
POReqId/PIRespId.

• sc_dt::sc_uint_base m_priority
POReqPriority/PIRespPriority.

• sc_dt::sc_uint_base m_route_id
POReqRouteId/PIRespRouteId.

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• sc_dt::sc_uint_base m_coh_cntl
PIRespCohCntl/SnoopRespCohCntl.

• sc_dt::sc_bv_base m_data
Read/write data.

• req_cntl m_req_cntl
Value for POReqCntl/SnoopReqCntl.

• resp_cntl m_resp_cntl
Value for PIRespCntl/SnoopRespCntl.

• wide_fifo ∗∗ m_read_data_fifo
sc_fifo of sc_bv_base read data values (per mem port)

• bool_fifo ∗∗ m_busy_fifo
sc_fifo to keep track of busy pin (per mem port, per bank if subbanked)

• bool_fifo ∗∗ m_req_rdy_fifo
sc_fifo to keep track of PIReqRdy pin (per mem port, per bank if subbanked) A false entry,
means to deassert for one clock period A true entry, means to deassert until m_drive_req_-
rdy_event is notified again at which point the pin will be reasserted and a false entry read
from the fifo.

• sc_core::sc_event ∗ m_drive_read_data_event
Notify when read data should be driven (per mem port).

• sc_core::sc_event ∗ m_drive_busy_event
Notify when busy should be driven (per mem port).

• sc_core::sc_event ∗ m_drive_req_rdy_event
Notify when PIReqRdy should be driven (per mem port).

• std::vector< request_info ∗ > m_request_pool

Maintain a pool of requests to improve performance.

• std::vector< xtsc_response ∗ > m_response_pool

Maintain a pool of responses to improve performance.

• address_deque ∗ m_load_address_deque
deque of XLMI load addresses (per mem port)

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• bool ∗ m_previous_response_last
true if previous response was a last transfer (per mem port)

• map_bool_signal m_map_bool_signal
The optional map of all sc_signal<bool> signals.

• map_uint_signal m_map_uint_signal
The optional map of all sc_signal<sc_uint_base> signals.

• map_wide_signal m_map_wide_signal
The optional map of all sc_signal<sc_bv_base> signals.

• sc_dt::sc_bv_base m_zero_bv
For initialization.

• sc_dt::sc_uint_base m_zero_uint
For initialization.

• log4xtensa::TextLogger & m_text

Used for logging.

• bool_input ∗∗ m_p_en
DPortEn, DRamEn, DRomEn, IRamEn, IRomEn.

• uint_input ∗∗ m_p_addr
DPortAddr, DRamAddr, DRomAddr, IRamAddr, IRomAddr.

• uint_input ∗∗ m_p_lane
DPortByteEn, DRamByteEn, DRomByteEn, IRamWordEn, IRomWordEn.

• wide_input ∗∗ m_p_wrdata
DPortWrData, DRamWrData, IRamWrData.

• bool_input ∗∗ m_p_wr
DPortWr, DRamWr, IRamWr.

• bool_input ∗∗ m_p_load
DPortLoad, IRamLoadStore, IRomLoad.

• bool_input ∗∗ m_p_retire
DPortLoadRetired.

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• bool_input ∗∗ m_p_flush
DPortRetireFlush.

• bool_input ∗∗ m_p_lock
DRamLock (per bank if subbanked).

• wide_input ∗∗ m_p_attr
DRamAttr, DRamWrAttr.

• wide_input ∗∗ m_p_check_wr
DRamCheckWrData, IRamCheckWrData.

• wide_output ∗∗ m_p_check
DRamCheckData, IRamCheckData.

• bool_input ∗∗ m_p_xfer_en
DRamXferEn, IRamXferEn, IRomXferEn, URamXferEn.

• bool_output ∗∗ m_p_busy
DPortBusy, DRamBusy, DRomBusy, IRamBusy, IRomBusy (per bank if subbanked).

• wide_output ∗∗ m_p_data
DPortData, DRamData, DRomData, IRamData, IRomData.

• bool_input ∗∗ m_p_req_valid
POReqValid/SnoopReqValid.

• uint_input ∗∗ m_p_req_cntl
POReqCntl/SnoopReqCntl.

• uint_input ∗∗ m_p_req_adrs
POReqAdrs/SnoopReqAdrs.

• wide_input ∗∗ m_p_req_data
POReqData.

• uint_input ∗∗ m_p_req_data_be
POReqDataBE.

• uint_input ∗∗ m_p_req_id
POReqId/SnoopReqId.

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• uint_input ∗∗ m_p_req_priority
POReqPriority/SnoopReqPriority.

• uint_input ∗∗ m_p_req_route_id
POReqRouteId.

• uint_input ∗∗ m_p_req_attribute
POReqAttribute.

• uint_input ∗∗ m_p_req_domain
POReqDomain.

• uint_input ∗∗ m_p_req_coh_vadrs
POReqCohVAdrsIndex/SnoopReqCohVAdrsIndex.

• uint_input ∗∗ m_p_req_coh_cntl
POReqCohCntl/SnoopReqCohCntl.

• wide_input ∗∗ m_p_req_user_data
Request User Data. See "req_user_data" parameter.

• bool_output ∗∗ m_p_req_rdy
PIReqRdy/SnoopReqRdy.

• bool_output ∗∗ m_p_resp_valid
PIRespValid/SnoopRespValid.

• uint_output ∗∗ m_p_resp_cntl
PIRespCntl/SnoopRespCntl.

• wide_output ∗∗ m_p_resp_data
PORespData/SnoopRespData.

• uint_output ∗∗ m_p_resp_id
PIRespId/SnoopRespId.

• uint_output ∗∗ m_p_resp_priority
PIRespPriority.

• uint_output ∗∗ m_p_resp_route_id
PIRespRouteId.

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• uint_output ∗∗ m_p_resp_coh_cntl
PIRespCohCntl/SnoopRespCohCntl.

• wide_output ∗∗ m_p_resp_user_data
Response User Data. See "rsp_user_data" parameter.

• bool_input ∗∗ m_p_resp_rdy
PORespRdy/SnoopRespRdy.

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

Friends

• class request_info
• std::ostream & operator<< (std::ostream &os, const request_info &info)

7.99.1 Detailed Description

This device converts memory transactions from pin level to transaction level. This device
converts pin-level memory requests to TLM memory requests (xtsc_request_if) and it con-
verts the corresponding TLM responses (xtsc_respond_if) to pin-level responses.
When configured for the PIF or IDMA0, this module introduces some timing artifacts that
might not be present in a pure pin-level system. This is because of the PIF protocol and
the way it is modeled in XTSC TLM. Specifically, this module does not know that there is a
pin-level request until it is too late to reject the request. Also, the only way to reject a TLM
response is to return false to the nb_response() call; however, during the nb_response()
call (which is non-blocking) this module does not yet know that the upstream pin-level
master will eventually reject the response (but see the "prereject_responses" parameter).
To overcome these issues, the PIReqRdy signal is deasserted for one clock period each
time the nb_respond() call is RSP_NACC. For the case of back-to-back PIF requests, the
effect of this is to reject the next request after the request that would have been rejected in
a pure pin-level simulation (but see the "one_at_a_time" parameter). By default, this model
does not reject TLM PIF responses which come from the memory interface slave and, if the
memory interface master rejects a pin-level response, then this module will simply repeat
the response next cycle.
When configured for a local memory, these timing artifacts don’t exist because, for a re-
quest, the busy is not due until the cycle after the request and, for a response, there is no
concept of rejecting it.

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Note: The parity/ECC signals (DRamNCheckDataM, DRamNCheckWrDataM, IRam-

NCheckData, and IRamNCheckWrData) are present for IRAM and DRAM interfaces when
"check_bits" is non-zero; however, the input signal is ignored and the output signal is driven
with constant 0.
Here is a block diagram of an xtsc_pin2tlm_memory_transactor as it is used in the xtsc_-
pin2tlm_memory_transactor example:

xtsc_pin2tlm_memory_transactor

POReqXXX
req
req req
xtsc_memory
PIReqRdy core0_pif
rsp

xtsc_master xtsc_core
tlm2pin pin2tlm
master core0

req
PIRespXXX
rsp rsp xtsc_memory
core0_dram0
rsp
PORespRdy

xtsc_tlm2pin_memory_transactor

Substitute for Verilog Module

Figure 7.14: xtsc_pin2tlm_memory_transactor Example

See also:
xtsc_pin2tlm_memory_transactor_parms
xtsc::xtsc_core
xtsc_tlm2pin_memory_transactor

Definition at line 478 of file xtsc_pin2tlm_memory_transactor.h.

7.99.2 Constructor & Destructor Documentation

7.99.2.1 xtsc_pin2tlm_memory_transactor (sc_core::sc_module_name

module_name, const xtsc_pin2tlm_memory_transactor_parms &
pin2tlm_parms)

Constructor for a xtsc_pin2tlm_memory_transactor.

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Parameters:
module_name Name of the xtsc_pin2tlm_memory_transactor sc_module.
pin2tlm_parms The remaining parameters for construction.

See also:
xtsc_pin2tlm_memory_transactor_parms

7.99.3 Member Function Documentation

7.99.3.1 void connect (xtsc::xtsc_core & core, xtsc::u32 pin2tlm_port = 0)

Connect this xtsc_pin2tlm_memory_transactor to an xtsc_core. Depending upon the

"snoop" parameter value, this method connects the specified TLM master port pair of this
xtsc_pin2tlm_memory_transactor to either the inbound PIF ("snoop" is false) or the snoop
("snoop" is true) slave port pair of the specified xtsc_core.

Parameters:
core The xtsc_core to connect with this xtsc_pin2tlm_memory_transactor.
pin2tlm_port The master port pair of this xtsc_pin2tlm_memory_transactor to con-
nect with the inbound PIF or snoop interface of core.

Note: The snoop port is reserved for future use.

7.99.3.2 xtsc::u32 connect (xtsc_tlm2pin_memory_transactor & tlm2pin, xtsc::u32

tlm2pin_port = 0, xtsc::u32 pin2tlm_port = 0, bool single_connect =
false)

Connect an xtsc_tlm2pin_memory_transactor transactor to this xtsc_pin2tlm_memory_-

transactor transactor. This method connects the pin-level ports of an upstream xtsc_-
tlm2pin_memory_transactor to the pin-level ports of this xtsc_pin2tlm_memory_transactor.
In the process, it creates the necessary signals of type sc_signal<bool>, sc_signal<sc_-
uint_base>, and sc_signal<sc_bv_base>. The name of each signal is formed by the
concatenation of the SystemC name of the xtsc_pin2tlm_memory_transactor object, the 2
characters "__", and the SystemC name of the xtsc_pin2tlm_memory_transactor port (for
example, "pin2tlm__POReqValid").

Parameters:
tlm2pin The xtsc_tlm2pin_memory_transactor to connect to this xtsc_pin2tlm_-
memory_transactor.
tlm2pin_port The tlm2pin port to connect to.

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pin2tlm_port The port of this transactor to connect the tlm2pin to.

single_connect If true only one port of this transactor will be connected. If false, the
default, then all contiguous, unconnected port numbers of this transactor start-
ing at pin2tlm_port that have a corresponding existing port in tlm2pin (starting at
tlm2pin_port) will be connected to that corresponding port in tlm2pin.

NOTE: This method is just for special testing purposes. In general, connecting a xtsc_-
tlm2pin_memory_transactor to a xtsc_pin2tlm_memory_transactor is not guarranteed to
meet timing requirements.

Returns:
number of ports that were connected by this call (1 or more)

7.99.3.3 virtual void reset (bool hard_reset = false) [virtual]

The implementation of reset() in xtsc_module logs a warning and does nothing else. Sub-
classes should provide their own implementation if they are able to support reset.
Reimplemented from xtsc_module.

7.99.4 Member Data Documentation

7.99.4.1 xtsc::Readme How_to_get_input_and_output_ports

From master to us (per mem port).

See also:
xtsc_module_pin_base::get_bool_input()
xtsc_module_pin_base::get_uint_input()
xtsc_module_pin_base::get_wide_input()
xtsc_module_pin_base::get_bool_output()
xtsc_module_pin_base::get_uint_output()
xtsc_module_pin_base::get_wide_output()

Definition at line 498 of file xtsc_pin2tlm_memory_transactor.h.

7.99.4.2 bool_fifo∗∗ m_req_rdy_fifo [protected]

sc_fifo to keep track of PIReqRdy pin (per mem port, per bank if subbanked) A false entry,
means to deassert for one clock period A true entry, means to deassert until m_drive_req_-
rdy_event is notified again at which point the pin will be reasserted and a false entry read
from the fifo.

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Definition at line 1005 of file xtsc_pin2tlm_memory_transactor.h.

The documentation for this class was generated from the following file:

• xtsc_pin2tlm_memory_transactor.h

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7.100 xtsc_pin2tlm_memory_transactor_parms Class

Reference

Constructor parameters for a xtsc_pin2tlm_memory_transactor transactor object.

#include <xtsc/xtsc_pin2tlm_memory_transactor.h>Inheritance diagram for xtsc_-
pin2tlm_memory_transactor_parms:

xtsc_parms

xtsc_pin2tlm_memory_transactor_parms

Collaboration diagram for xtsc_pin2tlm_memory_transactor_parms:

xtsc_parms

xtsc_pin2tlm_memory_transactor_parms

Public Member Functions

• xtsc_pin2tlm_memory_transactor_parms (const char ∗memory_interface="PIF",

xtsc::u32 byte_width=4, xtsc::u32 address_bits=32, xtsc::u32 num_ports=1)
Constructor for an xtsc_pin2tlm_memory_transactor_parms transactor object.

• xtsc_pin2tlm_memory_transactor_parms (const xtsc::xtsc_core &core, const char

∗memory_interface, xtsc::u32 num_ports=0)
Constructor for an xtsc_pin2tlm_memory_transactor_parms transactor object based upon
an xtsc_core object and a named memory interface.

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• void init (const char ∗memory_interface, xtsc::u32 byte_width, xtsc::u32 address_-

bits, xtsc::u32 num_ports)
• virtual const char ∗ kind () const
Our C++ type (the xtsc_parms base class uses this for error messages).

7.100.1 Detailed Description

Constructor parameters for a xtsc_pin2tlm_memory_transactor transactor object.

Name Type Description

------------------ ---- --------------------------------------------------------

"memory_interface" char* The memory interface type. Valid values are "DRAM0",
"DRAM0BS", "DRAM0RW", "DRAM1", "DRAM1BS", "DRAM1RW",
"DROM0", "IRAM0", "IRAM1", "IROM0", "URAM0", "XLMI0",
"PIF", and "IDMA0" (case-insensitive).
Note: For inbound PIF, set this parameter to "PIF" and
set the "inbound_pif" parameter to true.
Note: For snoop port, set this parameter to "PIF" and
set the "snoop" parameter to true (future use).

"num_ports" u32 The number of memory ports this transactor has. A value
of 1 means this transactor is single-ported, a value of
2 means this transactor is dual-ported, etc. If
"memory_interface" is "DRAM0RW" or "DRAM1RW", then a
read port counts as one port and its corresponding write
port counts as another port.
Default = 1.
Minimum = 1.

"port_name_suffix" char* Optional constant suffix to be appended to every input

and output port name.
Default = "".

"byte_width" u32 Memory data interface width in bytes. Valid values for
"DRAM0", "DRAM0RW", "DRAM1", "DRAM1RW", "DROM0",
"URAM0", and "XLMI0" are 4, 8, 16, 32, and 64. Valid
values for "DRAM0BS" and "DRAM1BS" are 4, 8, 16, and 32.
Valid values for "IRAM0", "IRAM1", "IROM0", "PIF", and
"IDMA0" are 4, 8, and 16.

"start_byte_address" u32 The number to be added to the pin-level address to form

the TLM request address. This corresponds to the
starting byte address of the memory in the 4GB address
space.
Default = 0x00000000.

"big_endian" bool True if the memory interface master is big endian.

Default = false.

"clock_period" u32 This is the length of this device's clock period

expressed in terms of the SystemC time resolution

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(from sc_get_time_resolution()). A value of

0xFFFFFFFF means to use the XTSC system clock
period (from xtsc_get_system_clock_period()). A value
of 0 means one delta cycle.
Default = 0xFFFFFFFF (i.e. use the system clock period).

"posedge_offset" u32 This specifies the time at which the first posedge of
this device's clock conceptually occurs. It is
expressed in units of the SystemC time resolution and
the value implied by it must be strictly less than the
value implied by the "clock_period" parameter. A value
of 0xFFFFFFFF means to use the same posedge offset as
the system clock (from
xtsc_get_system_clock_posedge_offset()).
Default = 0xFFFFFFFF.

"sample_phase" u32 This specifies the phase (i.e. the point) in a clock
period at which input pins are sampled. Output pins
which are used for handshaking (PIReqRdy, PIRespValid,
IRamBusy, DRamBusy, etc.) are also sampled at this time.
This value is expressed in terms of the SystemC time
resolution (from sc_get_time_resolution()) and must be
strictly less than the clock period as specified by the
"clock_period" parameter. A value of 0 means pins are
sampled on posedge clock as specified by the
"posedge_offset" parameter.
Default = 0 (sample at posedge clock).

"output_delay" u32 This specifies how long to delay after the nb_respond()
call before starting to drive the output pins. The
output pins will remain driven for one clock period
(see the "clock_period" parameter). This value is
expressed in terms of the SystemC time resolution (from
sc_get_time_resolution()) and must be strictly less than
the clock period. A value of 0 means one delta cycle.
Default = 1 (i.e. 1 time resolution).

"vcd_handle" void* Pointer to SystemC VCD object (sc_trace_file *) or

0 if tracing is not desired.

Parameters which apply to PIF|IDMA0 only (Note The snoop port is reserved for future use):

"inbound_pif" bool Set to true for inbound PIF. Set to false for outbound
PIF. This parameter is ignored if "memory_interface"
is other then "PIF".
Default = false (outbound PIF or snoop).

"snoop" bool Set to true for snoop port. Set to false for outbound
or inbound PIF. This parameter is ignored if
"memory_interface" is other then "PIF".
Default = false (outbound or inbound PIF).

"has_coherence" bool True if the "POReqCohCntl", "POReqCohVAdrsIndex", and

"PIRespCohCntl" ports should be present. This parameter
is ignored unless "memory_interface" is "PIF" and
"inbound_pif" and "snoop" are both false.

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Default = false.

"has_pif_attribute" bool True if the "POReqAttribute" or "PIReqAttribute" port

should be present. This parameter is ignored unless
"memory_interface" is "PIF" or "IDMA0" and "snoop" is
false.
Default = false.

"has_pif_req_domain" bool True if the "POReqDomain" port should be present. This

parameter is ignored unless "memory_interface" is "PIF"
or "IDMA0" and both "inbound_pif" and "snoop" are false.
Default = false.

"has_request_id" bool True if the "POReqId" and "PIRespId" ports should be

present. This parameter is ignored unless
"memory_interface" is "PIF" or "IDMA0".

"write_responses" bool True if TLM write responses should be dropped on the

floor by the xtsc_pin2tlm_memory_transactor. False if
write responses should be passed along to the downstream
pin-level slave. This parameter is ignored unless
"memory_interface" is "PIF" or "IDMA0".
Default = false.
Note for xtsc-run users: When the --cosim command is
present, xtsc-run will initialize "write_responses" with
a value appropriate for the current config.

"route_id_bits" u32 Number of bits in the route ID. Valid values are 0-32.
If "route_id_bits" is 0, then the "POReqRouteId" and
"PIRespRouteId" ports ("PIReqRouteId"/"PORespRouteId"
when "inbound_pif" is true) will not be present. This
parameter is ignored unless "memory_interface" is "PIF"
or "IDMA0".
Default = 0.

"axi_exclusive" bool True if ReqCntl and RespCntl should have AXI exclusive
encodings. This parameter is ignored unless
"memory_interface" is "PIF" or "IDMA0".
Default = false.

"axi_exclusive_id" bool True if the inbound PIF request route ID input, normally
called "PIReqRouteId", should be called "AXIExclID", and
the "PORespRouteId" output should not be present. This
parameter is ignored unless "memory_interface" is "PIF",
"inbound_pif" is true, and "axi_exclusive" is true.
Default = false.

"one_at_a_time" bool The PIReqRdy signal is always deasserted for one clock
period each time the nb_respond() call is RSP_NACC. In
addition, if this parameter is true then PIReqRdy will
also be deasserted as soon as a last-transfer request is
accepted until the last transfer response is received so
that only one complete request is accepted at a time.
When this parameter is true, a minimum of one clock
period must elapse between when a last-transfer request
is sent downstream and when a last-transfer response is
received (does not apply to RSP_NACC response). This

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parameter is ignored unless "memory_interface" is "PIF".

Default = false.

"prereject_responses" bool If true, calls to nb_respond() will return false if

PORespRdy is low when the call to nb_respond() is made.
From the pin-level perspective, a response is not
rejected unless PORespRdy is low at the sample time;
however, the XTSC TLM model of the response channel only
allows a response to be rejected at the time of the
nb_respond() call (by returning false). The default
behavior of this model when PIRespRdy is low at the time
of the nb_respond() call is to simply repeat the
response the next cycle (if any other responses arrive
in the mean time, they are saved and handled in order).
This parameter is ignored unless "memory_interface" is
"PIF" or "IDMA0".
Default = false (don't return false to nb_respond).

"req_user_data" char* If not NULL or empty, this specifies the optional pin-
level port that should be used for xtsc_request user
data. The string must give the port name and bit width
using the format: PortName,BitWidth
Note: The values read from PortName will written to
the low order BitWidth bits of the void*
pointer set by xtsc_request::set_user_data().
BitWidth may not exceed 32 or 64 depending on
whether you are using a 32 or 64 bit simulator.
This parameter is ignored unless "memory_interface" is
"PIF" or "IDMA0".
Default = "" (xtsc_request user data is ignored).

"rsp_user_data" char* If not NULL or empty, this specifies the optional pin-
level port that should be used for xtsc_response user
data. The string must give the port name and bit width
using the format: PortName,BitWidth
Note: The values driven on PortName will be obtained
from the low order BitWidth bits of the void*
pointer returned by xtsc_response::get_user_data().
BitWidth may not exceed 32 or 64 depending on
whether you are using a 32 or 64 bit simulator.
This parameter is ignored unless "memory_interface" is
"PIF" or "IDMA0".
Default = "" (xtsc_response user data is ignored).

Parameters which apply to local memories only (that is, non-PIF|IDMA0 memories):

"memory_byte_size" u32 The byte size of this memory. This parameter is

ignored unless "memory_interface" is "XLMI0".

"address_bits" u32 Number of bits in the address. This parameter is

ignored if "memory_interface" is "PIF" or "IDMA0".

"check_bits" u32 Number of bits in the parity/ecc signals. This

parameter is ignored unless "memory_interface" is
"IRAM0", "IRAM1", "DRAM0", "DRAM0BS", "DRAM0RW",
"DRAM1", "DRAM1BS", or "DRAM1RW".

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Default = 0.

"has_busy" bool True if the memory interface has a busy pin. This
parameter is ignored if "memory_interface" is "PIF" or
"IDMA0".
Default = true.

"has_lock" bool True if the memory interface has a lock pin. This
parameter is ignored unless "memory_interface" is
"DRAM0", "DRAM0BS", "DRAM0RW", "DRAM1", "DRAM1BS", or
"DRAM1RW".
Default = false.

"has_xfer_en" bool True if the memory interface has an xfer enable pin.
This parameter is ignored if "memory_interface" is
"DROM0", "XLMI0", or "PIF" or "IDMA0".
Default = false.

"cbox" bool True if this memory interface is driven from an Xtensa

CBOX. This parameter is ignored if "memory_interface"
is other then "DRAM0"|"DRAM1"|"DROM0".

"banked" bool True if this is a banked "DRAM0"|"DRAM1"|"DROM0"

interface or if this is a "DRAM0BS"|"DRAM1BS" interface.
Default = false.

"has_dma" bool True if the memory interface has split Rd/Wr ports
("DRAM0RW"|"DRAM1RW") accessible from inbound PIF or
"IDMA0".
Default = false.

"num_subbanks" u32 The number of subbanks that each bank has.

"max_cycle_entries" u32 Should be at least 1 greater than the memory latency.

Used only when subbanked.
Default = 4.

"dram_attribute_width" u32 160 if the "DRamNAttr" and "DRamNWrAttr" ports

should be present. This parameter is ignored unless
"memory_interface" is "DRAM0RW" or "DRAM1RW".
Default = 0.

See also:
xtsc_pin2tlm_memory_transactor
xtsc::xtsc_parms

Definition at line 309 of file xtsc_pin2tlm_memory_transactor.h.

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7.100.2 Constructor & Destructor Documentation

7.100.2.1 xtsc_pin2tlm_memory_transactor_parms (const char ∗

memory_interface = "PIF", xtsc::u32 byte_width = 4, xtsc::u32
address_bits = 32, xtsc::u32 num_ports = 1) [inline]

Constructor for an xtsc_pin2tlm_memory_transactor_parms transactor object.

Parameters:
memory_interface The memory interface type. Valid values are "DRAM0",
"DRAM0BS", "DRAM0RW", "DRAM1", "DRAM1BS", "DRAM1RW", "DROM0",
"IRAM0", "IRAM1", "IROM0", "URAM0", "XLMI0", "PIF", and "IDMA0" (case-
insensitive).
byte_width Memory data interface width in bytes.
address_bits Number of bits in address. Ignored for "PIF" and "IDMA0".
num_ports The number of memory ports this transactor has.

Definition at line 329 of file xtsc_pin2tlm_memory_transactor.h.

7.100.2.2 xtsc_pin2tlm_memory_transactor_parms (const xtsc::xtsc_core & core,

const char ∗ memory_interface, xtsc::u32 num_ports = 0)

Constructor for an xtsc_pin2tlm_memory_transactor_parms transactor object based upon

an xtsc_core object and a named memory interface. This constructor will determine
"clock_period", "byte_width", "big_endian", "cbox", "address_bits", "start_byte_address",
"has_busy", "has_lock", "num_subbanks", "banked", "has_dma", "dram_attribute_width",
"check_bits", "has_pif_attribute", and "has_pif_req_domain" by querying the core object. If
memory_interface is XLMI0 then it will also determine "memory_byte_size".
If desired, after the xtsc_pin2tlm_memory_transactor_parms object is constructed, its data
members can be changed using the appropriate xtsc_parms::set() method before passing
it to the xtsc_pin2tlm_memory_transactor constructor.

Parameters:
core A reference to the xtsc_core object upon which to base the xtsc_pin2tlm_-
memory_transactor_parms.
memory_interface The memory interface type. Valid values are "DRAM0",
"DRAM0BS", "DRAM0RW", "DRAM1", "DRAM1BS", "DRAM1RW", "DROM0",
"IRAM0", "IRAM1", "IROM0", "URAM0", "XLMI0", "PIF", and "IDMA0" (case-
insensitive).
num_ports The number of ports this transactor has. If 0, the default, the number
of ports (1|2|4) will be inferred thusly: For banked DRAM0|DRAM1|DROM0,

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the "num_ports" will be equal to the number of banks. For subbanked

DRAM0BS|DRAM1BS, the "num_ports" will be equal to the number of banks
times the number of subbanks per bank. For split R/W DRAM0RW|DRAM1RW,
the "num_ports" will be 2 times the number of Load/Store units plus 2 if there is
an inbound PIf interface. For non-banked, non-split R/W interfaces, if memory_-
interface is a LD/ST unit 0 port of a dual-ported core interface, and the core is
dual-ported and has no CBox, and if the 2nd port of the core has not been bound,
then "num_ports" will be 2; otherwise, "num_ports" will be 1.

Note: If memory_interface is "PIF" or "IDMA0", then "start_byte_address" will be set to 0.

The documentation for this class was generated from the following file:

• xtsc_pin2tlm_memory_transactor.h

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7.101 xtsc_pin2tlm_wire_transactor< W, T > Class Tem-

plate Reference

User interface class for connecting an sc_in<T> or an sc_signal<T> to an sc_-

export<xtsc_wire_write_if>.
#include <xtsc/xtsc.h>

Public Member Functions

• SC_HAS_PROCESS (xtsc_pin2tlm_wire_transactor)
• xtsc_pin2tlm_wire_transactor (sc_core::sc_module_name module_name)
• virtual const char ∗ kind () const
• virtual const sc_core::sc_event & default_event () const
• virtual const sc_core::sc_event & value_changed_event () const
• virtual bool event () const
• void relay_method ()

Public Attributes
• sc_core::sc_port< xtsc_wire_write_if > m_sc_port
Bind this to the sc_export<xtsc_wire_write_if>.

• sc_core::sc_in< T > m_sc_in

Bind this to the sc_signal<T> or to a higher-level (outer) sc_in<T>.

Private Attributes
• sc_dt::sc_unsigned m_value

7.101.1 Detailed Description

template<int W, typename T> class xtsc::xtsc_pin2tlm_wire_transactor< W, T >

User interface class for connecting an sc_in<T> or an sc_signal<T> to an sc_-

export<xtsc_wire_write_if>. An instance of this class can be used to connect an sc_-
in<T> or an sc_signal<T> to an sc_export<xtsc_wire_write_if> where T is some com-
mon integral or SystemC type. For example, the xtsc_core class uses sc_export<xtsc_-
wire_write_if> for system-level input ports. If you need input ports of a different type then

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xtsc_wire_write_if, then this transactor template can be used to create an transactor of the
appropriate type. A typical use-case for this transactor is when cosimulating XTSC with
Verilog using a commercial simulator.
For more information about when this transactor might be used and how to use it, see
xtsc_tlm2pin_wire_transactor.

See also:
xtsc_tlm2pin_wire_transactor
xtsc_core::get_input_wire()

Definition at line 3026 of file xtsc.h.

The documentation for this class was generated from the following file:

• xtsc.h

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7.102 xtsc_plugin_interface Class Reference

This interface is used to add plugin modules to an XTSC simulation.

#include <xtsc/xtsc.h>

Public Member Functions

• virtual ∼xtsc_plugin_interface ()
Destructor.

• virtual std::set< std::string > get_plugin_names ()=0

The implementation of this API must return the set of plugin names that this shared library
supports.

• virtual void help (const std::string &plugin_name, bool verbose, std::ostream

&os)=0
The implementation of this API must generate help information to the specified ostream
object for the specified plugin name.

• virtual xtsc::xtsc_parms ∗ create_parms (const std::string &plugin_name)=0

The implementation of this API must return a pointer to a valid, newly-constructed xtsc_-
parms object.

• virtual sc_core::sc_module & create_module (const std::string &plugin_name, const

std::string &instance_name, const xtsc::xtsc_parms ∗p_parms)=0
The implementation of this API must return a reference to a valid, newly-constructed sc_-
module of the type specified by plugin_name.

• virtual xtsc::xtsc_connection_interface ∗ get_connection_interface (const std::string

&hierarchical_name)=0
The implementation of this API must return a pointer to the xtsc_connection_interface as-
sociated with the plugin module instance identified by hierarchical_name.

7.102.1 Detailed Description

This interface is used to add plugin modules to an XTSC simulation. Plugin support for a
custom module can be added to an XTSC simulation by first creating (writing, compiling,
and linking) the plugin and then by using it in xtsc-run or sc_main.
To create a plugin:

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• Implement the xtsc_connection_interface for the custom module.

• Implement this interface (xtsc_plugin_interface) for the custom module.
• Implement and export a method with the signature defined by xtsc::xtsc_get_plugin_-
interface_t. Typically theis method is called xtsc_get_plugin_interface() but you may
wish to use a unique name if you also intend to make a static version of the library
available (for example, for SystemC-Verilog co-simulation).
• Compile and link the above 3 items as a shared library (Linux shared object or MS
Windows DLL). IMPORTANT NOTE: The plugin used in xtsc-run must be compiled
and linked against the shared-library versions of SystemC and XTSC, not the static
versions. The shared library version of the SystemC header files are installed under
XtensaTools/include/systemc-X.Y.Z-shared. The shared library version of the XTSC
header files are obtained by compiling with the preprocessor macro XTSC_IS_DSO
defined. The shared library names end in "_sh" (or "_shd" for MS Windows Debug),
so you should link against systemc_sh, xtsc_sh, and xtsc_comp_sh instead of sys-
temc, xtsc, and xtsc_comp.
• Provide the resulting shared library to the end-user along with the actual name of the
exported method of type xtsc::xtsc_get_plugin_interface_t.

To use a plugin from xtsc-run, pass the optional path and name of the shared library (with-
out the extension) to xtsc-run using the --load_library command of xtsc-run.
To see one way to use a plugin from sc_main, add the --sc_main command to an xtsc-run
script in which you do a --load_library and then configure, create, and connect the plugin
module. You can then inspect the sc_main file that xtsc-run will generate when it processes
the script.
For working examples which illustrate implementing this interface please see the simple_-
memory.plugin and pif2sb_bridge.plugin sub-directories of the XTSC examples directory
installed with each Tensilica core config in:

• <xtsc_examples_root>/simple_memory.plugin
• <xtsc_examples_root>/pif2sb_bridge.plugin

For a step-by-step guide to take an XTSC module from the XTSC component library and
then rename, modify, and re-build it as an XTSC plugin please see the README.txt file
in the xtsc.component.plugin sub-directory of the XTSC examples directory installed with
each Tensilica core config in:

• <xtsc_examples_root>/xtsc.component.plugin

See also:
xtsc_connection_interface
xtsc_get_plugin_interface_t

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Definition at line 5694 of file xtsc.h.

7.102.2 Member Function Documentation

7.102.2.1 virtual std::set<std::string> get_plugin_names () [pure virtual]

The implementation of this API must return the set of plugin names that this shared library
supports. The xtsc-run program requires that plugin names be valid C/C++ identifiers. In
addition it is recommended that they contain no uppercase letters and that they neither
begin nor end with the underscore (_) character.
Note: To use a plugin whose name has uppercase letters or begins or ends with the under-
score character, requires adding a plugin name redefinition to the --load_library command
passed to xtsc-run.

7.102.2.2 virtual void help (const std::string & plugin_name, bool verbose,
std::ostream & os) [pure virtual]

The implementation of this API must generate help information to the specified ostream
object for the specified plugin name.

Parameters:
plugin_name The plugin name for which help information should be generated. This
name is guarranteed to be from the set returned by the get_plugin_names()
method.
verbose If true, verbose help should be generated.
os The ostream object to which the help information should be generated.

7.102.2.3 virtual xtsc::xtsc_parms∗ create_parms (const std::string &

plugin_name) [pure virtual]

The implementation of this API must return a pointer to a valid, newly-constructed xtsc_-
parms object. Each call to this API must return a pointer to a different (unique) xtsc_parms
object. The parameter names, types, and initial values contained in the xtsc_parms object
are up to the implementation but should correspond to the plugin type specified by plugin_-
name. The xtsc-run progam will allow the user to change the parameter values as desired
prior to passing the xtsc_parms object back in the create_module() method when the user
requests that an instance of the plugin be created.

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Parameters:
plugin_name The plugin name for which an xtsc_parms object should be returned.
This name is guarranteed to be from the set returned by the get_plugin_names()
method.

7.102.2.4 virtual sc_core::sc_module& create_module (const std::string

& plugin_name, const std::string & instance_name, const
xtsc::xtsc_parms ∗ p_parms) [pure virtual]

The implementation of this API must return a reference to a valid, newly-constructed sc_-
module of the type specified by plugin_name. Each call to this API must return a reference
to a different (unique) newly-constructed sc_module object.

Parameters:
plugin_name The plugin name for which an sc_module object should be returned.
This name is guarranteed to be from the set returned by the get_plugin_names()
method.
instance_name The SystemC base instance name to be given to the sc_module.
This name should be passed to the sc_module constructor as an sc_module_-
name.
p_parms A pointer to an xtsc_parms object previously obtained by a call to the
create_parms() method. The parameter values will have been modified as de-
sired by the user.

7.102.2.5 virtual xtsc::xtsc_connection_interface∗ get_connection_interface

(const std::string & hierarchical_name) [pure virtual]

The implementation of this API must return a pointer to the xtsc_connection_interface as-
sociated with the plugin module instance identified by hierarchical_name.

Parameters:
hierarchical_name The full hierarchical name of a sc_module instance previously
created by a call to create_module().

Note: Under certain circumstances the hierarchical name can differ from the instance_-
name passed in to the create_module method. The implementation can call the sc_-
module::name() method from within the create_module() method to determine the hier-
archical name after creating the sc_module.
The documentation for this class was generated from the following file:

• xtsc.h

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7.103 xtsc_queue Class Reference

A queue implementation that connects using TLM-level ports.

#include <xtsc/xtsc_queue.h>Inheritance diagram for xtsc_queue:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface

xtsc_queue

Collaboration diagram for xtsc_queue:

xtsc_queue_push_if

m_queue
xtsc_queue_push_if_multi_impl

m_push_multi_impl

xtsc_connection_interface
m_push_impl xtsc_queue_push_if_impl
xtsc_module
xtsc_resettable m_queue

xtsc_command_handler_interface xtsc_queue
m_pop_file m_queue

xtsc_script_file
m_pop_multi_impl
xtsc_queue_pop_if_multi_impl

m_pop_impl

m_queue
xtsc_queue_pop_if xtsc_queue_pop_if_impl

Classes
• class xtsc_queue_pop_if_impl
Implementation of xtsc_queue_pop_if for single consumer.

• class xtsc_queue_pop_if_multi_impl

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Implementation of xtsc_queue_pop_if for multi-client queue (either m_num_producers or

m_num_consumers > 1).

• class xtsc_queue_push_if_impl
Implementation of xtsc_queue_push_if for single producer.

• class xtsc_queue_push_if_multi_impl
Implementation of xtsc_queue_push_if for multi-client queue (either m_num_producers or
m_num_consumers > 1).

Public Member Functions

• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

• SC_HAS_PROCESS (xtsc_queue)
• xtsc_queue (sc_core::sc_module_name module_name, const xtsc_queue_parms
&queue_parms)
Constructor for an xtsc_queue.

• ∼xtsc_queue ()
Destructor.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• xtsc::u32 get_num_producers ()
Get the number of producers allowed to bind to this module instance.

• xtsc::u32 get_num_consumers ()
Get the number of consumers allowed to bind to this module instance.

• void reset (bool hard_reset=false)

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Reset the xtsc_queue.

• void drain_fifo_method ()
To drain the fifo’s after a reset.

• void dump (std::ostream &os)

Dump the contents of the xtsc_queue.

• xtsc::u32 num_available ()
Return the number of available data items in the queue (how many more elements can be
popped out).

• xtsc::u32 num_free ()
Return the number of free spaces in the queue (how many more elements can be pushed
in).

• void peek (xtsc::u32 nth, sc_dt::sc_unsigned &value)

Return the value of the nth element from the front of the queue.

• void poke (xtsc::u32 nth, const sc_dt::sc_unsigned &value)

Overwrite the nth element from the front of the queue using the specified value.

• virtual void man (std::ostream &os)

Implementation of the xtsc::xtsc_command_handler_interface.

• virtual void execute (const std::string &cmd_line, const std::vector< std::string >
&words, const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

• void connect (xtsc::xtsc_core &core, const char ∗queue_name, xtsc::u32 port_-

num=0)
Connect to an xtsc_core.

• void connect (xtsc_queue_producer &producer, xtsc::u32 port_num=0)

Connect to an xtsc_queue_producer.

• void connect (xtsc_queue_consumer &consumer, xtsc::u32 port_num=0)

Connect to an xtsc_queue_consumer.

• xtsc::u32 get_bit_width ()
Get the width of this xtsc_queue in bits.

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• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

• log4xtensa::BinaryLogger & get_binary_logger ()

Get the BinaryLogger for this component (e.g. to adjust its log level).

Public Attributes
• sc_core::sc_export< xtsc::xtsc_queue_push_if > m_producer
Single producer binds to this.

• sc_core::sc_export< xtsc::xtsc_queue_pop_if > m_consumer

Single consumer binds to this.

• sc_core::sc_export< xtsc::xtsc_queue_push_if > ∗∗ m_producers

Multiple producers bind to these.

• sc_core::sc_export< xtsc::xtsc_queue_pop_if > ∗∗ m_consumers

Multiple consumers bind to these.

Private Member Functions

• void confirm_has_fifo_or_shmem (const char ∗function)
Throw an exception if using neither sc_fifo nor host OS shared memory (because "push_-
file" or "pop_file" was specified).

• xtsc::u32 get_index_of_nth_from_front (xtsc::u32 nth, const char ∗function)

Return the index of the nth element from the front or throw if there is none.

• xtsc::xtsc_queue_push_if & get_queue_push_interface (xtsc::u32 port)

Get the xtsc_queue_push_if associated with port.

• xtsc::xtsc_queue_pop_if & get_queue_pop_interface (xtsc::u32 port)

Get the xtsc_queue_pop_if associated with port.

• void delta_cycle_method ()
Handle bookkeeping to support multi-client queue.

• void get_next_pop_file_element ()

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Set m_has_pop_file_element and m_pop_file_element.

Private Attributes

• xtsc_queue_push_if_impl ∗ m_push_impl
m_producer binds to this if m_multi_client is false

• xtsc_queue_pop_if_impl ∗ m_pop_impl
m_consumer binds to this if m_multi_client is false

• xtsc_queue_push_if_multi_impl ∗∗ m_push_multi_impl
m_producers bind to these if m_multi_client is true

• xtsc_queue_pop_if_multi_impl ∗∗ m_pop_multi_impl
m_consumers bind to these if m_multi_client is true

• xtsc::u32 m_num_producers
From "num_producers" parameter.

• xtsc::u32 m_num_consumers
From "num_consumers" parameter.

• bool m_multi_client
true if either m_num_producers or m_num_consumers exceeds 1

• xtsc::u32 m_depth
Capacity - number of elements.

• sc_core::sc_fifo< int > m_fifo

Indexes into m_element_ptrs (to ensure determinacy).

• bool m_use_fifo
True if using sc_fifo, false if using a file of host shared memory.

• sc_dt::sc_unsigned ∗∗ m_element_ptrs
To store the elements.

• xtsc::u64 ∗ m_tickets
To store the ticket associated with each element.

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• xtsc::u32 m_skid_index
Move from skid buffer to m_fifo in fair, round-robin fashion.

• sc_core::sc_fifo< int > ∗∗ m_skid_fifos

A entry in m_skid_fifos[N] says that m_skid_buffers[N] is valid.

• sc_dt::sc_unsigned ∗∗ m_skid_buffers
Skid buffers to store the elements.

• xtsc::u64 ∗ m_skid_tickets
To store the queue tickets associated with the skid buffers.

• xtsc::u32 m_jerk_index
Move from m_fifo to jerk buffer in fair, round-robin fashion.

• sc_core::sc_fifo< int > ∗∗ m_jerk_fifos

A entry in m_jerk_fifos[N] says that m_jerk_buffers[N] is valid.

• sc_dt::sc_unsigned ∗∗ m_jerk_buffers
Jerk buffers to store the elements.

• xtsc::u64 ∗ m_jerk_tickets
To store the queue tickets associated with the jerk buffers.

• xtsc::u64 m_pop_ticket
Save ticket of last popped value.

• xtsc::u64 m_push_ticket
Save ticket of last pushed value.

• sc_dt::sc_unsigned m_dummy
For logging failed pushes and pops.

• xtsc::u32 m_width1
Bit width of each element.

• xtsc::u32 m_width8
Byte width of each element.

• sc_dt::sc_unsigned m_value
For temporary use within a method.

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• xtsc::u32 m_next
Next slot in m_element_ptrs[] and m_tickets[].

• log4xtensa::TextLogger & m_text

Text logger.

• log4xtensa::BinaryLogger & m_binary

Binary logger.

• bool m_log_data_binary
True if transaction data should be logged by m_binary.

• std::string m_push_file_name
Name of file to write elements to instead of using the fifo.

• std::string m_pop_file_name
Name of file to read elements from instead of using the fifo.

• std::ofstream ∗ m_push_file
File to write elements to instead of using the fifo.

• bool m_timestamp
From "timestamp" parameter.

• xtsc::xtsc_script_file ∗ m_pop_file
File to read elements from instead of using the fifo.

• bool m_wraparound
False if m_pop_file should only be read through one time.

• bool m_has_pop_file_element
For use by nb_can_pop() and num_available() when using m_pop_file.

• sc_dt::sc_unsigned m_pop_file_element
For use by nb_pop() when using m_pop_file.

• std::vector< std::string > m_words

The tokenized words of the current line from m_pop_file.

• std::string m_line
The current line from m_pop_file.

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• sc_core::sc_event m_drain_fifo_event
To drain the fifos after a reset.

• sc_core::sc_event m_push_pop_event
multi-client: notify delta_cycle_method(); else each peek/poke

• sc_core::sc_event m_nonempty_event
The no-longer-empty event.

• sc_core::sc_event m_nonfull_event
The no-longer-full event.

• sc_core::sc_event ∗∗ m_nonempty_events
The no-longer-empty events when m_multi_client is true.

• sc_core::sc_event ∗∗ m_nonfull_events
The no-longer-full events when m_multi_client is true.

• xtsc::u32 m_next_word_index
Index into m_words.

• xtsc::u32 m_pop_file_line_number
The line number of m_words in m_pop_file.

• bool m_host_shared_memory
See "host_shared_memory" parameter.

• std::string m_shmem_name
Shared Memory: name.

• xtsc::u8 ∗ m_p_shmem
Shared Memory: pointer to host OS shared memory.

• xtsc::u32 m_shmem_bytes_per_row
Shared Memory: number of bytes per row ((64+m_width1+63)/64)∗8.

• xtsc::u32 m_shmem_num_rows
Shared Memory: number of rows (m_depth + 1).

• xtsc::u32 m_shmem_array_size
Shared Memory: number of bytes in all rows.

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• xtsc::u32 m_shmem_total_size
Shared Memory: number of bytes in all rows plus read/write indices.

• xtsc::u32 ∗ m_p_shmem_ridx
Shared Memory: pointer to ridx (ridx = Read row InDeX).

• xtsc::u32 ∗ m_p_shmem_widx
Shared Memory: pointer to widx (widx = Write row InDeX).

7.103.1 Detailed Description

A queue implementation that connects using TLM-level ports. This queue implements
xtsc::xtsc_queue_push_if and is suitable for connecting to a TIE output queue interface.
It also implements xtsc::xtsc_queue_pop_if and is suitable for connecting to a TIE input
queue interface.
Typically, the queue is connected on the push side to a queue producer such as a TIE
output queue interface of xtsc::xtsc_core and on the pop side to a queue consumer such
as a TIE input queue interface of xtsc::xtsc_core. Alternatively, it can be left unconnected
on the pop side and then all elements pushed into it will be written to a file. It is also
possible to leave it unconnected on the push side and then any element popped from the
queue will be read from a file.
This queue can operate as a multi-client queue by setting the "num_producers" parameter
to a value larger then one and/or setting the "num_consumers" parameter to a value larger
then one. When "num_producers" is larger then one then an additional skid buffer is added
to the queue for each producer (when "num_producers" is left at its default value of 1
then no additional skid buffer is used). If all the producer skid buffers are empty then all
producers can push an element into the queue in the same cycle. Similarly, when "num_-
consumers" is larger then one then an additional jerk buffer is added to the queue for each
consumer (again, this does not happen when "num_consumers" is 1). If all the consumer
jerk buffers are full then all consumers can pop an element from the queue in the same
cycle.
The following diagram shows the situation when "num_producers" is 2, "num_consumers"
is 3, and "depth" is 4. In this case the queue can potentially hold 9 (=2+3+4) elements.
In the diagram, a percent sign represents a producer or consumer port, ’X’ represents a
producer skid buffer, ’Y’ represents a buffer in the main fifo, and ’Z’ represents a consumer
jerk buffer.

Producer A % => X Z => % Consumer 1

\ /
YYYY --Z => % Consumer 2
/ \
Producer B % => X Z => % Consumer 3

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Note: In a multiple-producer/single-consumer scenario, elements pushed into the queue

by different producers always come out ordered by the time when they went in (elements
pushed into the queue in the same delta cycle have no concept of relative order amongst
themselves).
Note: There is no concept of "first-come-first-serve" when multiple consumers are popping
from the queue. When an element is added to the queue it lands in the first empty con-
sumer jerk buffer in fair round-robin order without regard for any previous unsuccessful pop
attempts at some other consumer port.
Caution: The only way to get an element out of one of the consumer jerk buffers is for the
corresponding consumer to pop an element from the queue. If the user does not want any
elements to be stuck in the queue, then they must ensure that all consumers periodically
pop from the queue.
By default this queue uses internal data members to store the queue elements. If desired,
the queue can be configured to instead use host OS shared memory to store the elements
and read/write row indices by setting "host_shared_memory" to true. This can be used
to speed up a multi-core simulation by partitioning it into multiple host processes that run
on separate processor cores of the host workstation. It can also be used to allow a sepa-
rate (potentially non-XTSC) host process to feed and/or drain the queue or just passively
monitor it. For example on Linux:

hexdump -C /dev/shm/username.Q1

The layout and access protocol of the shared memory data structure are:

Shared Memory Layout and Access Protocol

-----------------------------------------------
Row 0: | Ticket 0 | Data 0 | Filler 0 |
-----------------------------------------------
Row 1: | Ticket 1 | Data 1 | Filler 1 |
-----------------------------------------------
Row 2: | Ticket 2 | Data 2 | Filler 2 |
-----------------------------------------------
... | ... | ... | ... |
-----------------------------------------------
Row N: | Ticket N | Data N | Filler N |
-----------------------------------------------
Indices: | ridx | widx |
---------------

- Memory byte addresses increase left to right then top to bottom in the diagram.
- All values are stored LSB first (left most byte in each field shown above).
- In the following points, R represents any row index between 0 and N, inclusive.
- N is equal to the "depth" parameter, so the number of "Row R" rows is "depth" + 1.
- There is always at least one "unoccupied" row, even when the queue is full.
- The size of the "ridx" field is 4 bytes (u32).
- The size of the "widx" field is 4 bytes (u32).
- The size of the "Ticket R" field is 8 bytes (u64).
- The size of the "Data R" field is ("bit_width" + 7) / 8
- The size of the "Filler R" field is the smallest value (between 0 and 7) which

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makes the row byte size be a multiple of 8.

- The ridx (Read row InDeX) and widx (Write row InDeX) fields each always contain a
value between 0 and N, inclusive.
- ridx is the index of the next row to be read.
- widx is the index of the next row to be written.
- The queue is empty when widx and ridx are the same. That is, when:
widx == ridx
- The queue is full when widx is one "behind" ridx. That is, when:
(widx + 1) % (N + 1) == ridx
- The shared memory contents should be zero-filled (especially ridx and widx) by the
host OS process creating the shared memory. Other than zero-filling at creation:
- At most one host OS process (the producer process) may write to the "Row R" rows
and the widx field.
- At most one host OS process (the consumer process) may write to the ridx field.
- If and only if the queue is not full, the producer process may write to the row
whose index is widx and then update widx: widx = (widx + 1) % (N + 1)
- If and only if the queue is not empty, the consumer process may read the row
whose index is ridx and then update ridx: ridx = (ridx + 1) % (N + 1)

Here is a block diagram of the system used in the xtsc_queue example (memories not
shown):

(Q1.m_producer) (Q1.m_consumer)

nb_can_push() nb_can_pop()
xtsc_core core0
nb_push() nb_pop() xtsc_core core1
xtsc_queue Q1
(producer.out) (consumer.out)

core0.get_output_queue("OUTQ1") core1.get_input_queue("INQ1")

Figure 7.15: xtsc_queue Example

Here is the code to connect the system using the xtsc::xtsc_connect() method:

xtsc_connect(core0, "pif", "", core0_pif);

xtsc_connect(core1, "pif", "", core1_pif);
xtsc_connect(core0, "OUTQ1", "queue_push", Q1);
xtsc_connect(core1, "INQ1", "queue_pop", Q1);

And here is the code to connect the system using manual SystemC port binding:

core0.get_request_port("pif")(*core0_pif.m_request_exports[0]);
(*core0_pif.m_respond_ports[0])(core0.get_respond_export("pif"));
core1.get_request_port("pif")(*core1_pif.m_request_exports[0]);
(*core1_pif.m_respond_ports[0])(core1.get_respond_export("pif"));
core0.get_output_queue("OUTQ1")(Q1.m_producer);
core1.get_input_queue("INQ1")(Q1.m_consumer);

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See also:
xtsc_queue_parms
xtsc::xtsc_queue_pop_if
xtsc::xtsc_queue_push_if
xtsc::xtsc_core::How_to_do_port_binding

Definition at line 390 of file xtsc_queue.h.

7.103.2 Constructor & Destructor Documentation

7.103.2.1 xtsc_queue (sc_core::sc_module_name module_name, const

xtsc_queue_parms & queue_parms)

Constructor for an xtsc_queue.

Parameters:
module_name Name of the xtsc_queue sc_module.
queue_parms The remaining parameters for construction.

See also:
xtsc_queue_parms

7.103.3 Member Function Documentation

7.103.3.1 xtsc::u32 num_available ()

Return the number of available data items in the queue (how many more elements can
be popped out). If "pop_file" was specified then this method returns 0 or 1 depending on
whether or not the end of file has been reached.

7.103.3.2 xtsc::u32 num_free ()

Return the number of free spaces in the queue (how many more elements can be pushed
in). If "push_file" was specified then this method always returns 1.

7.103.3.3 void peek (xtsc::u32 nth, sc_dt::sc_unsigned & value)

Return the value of the nth element from the front of the queue. An exception is thrown if
the queue does not currently have n elements or if "push_file" or "pop_file" was specified.

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Parameters:
nth Specifies which element is desired (starting at 1).
value Used to return the value of the nth element.

7.103.3.4 void poke (xtsc::u32 nth, const sc_dt::sc_unsigned & value)

Overwrite the nth element from the front of the queue using the specified value. An excep-
tion is thrown if the queue does not currently have n elements or if "push_file" or "pop_file"
was specified.

Parameters:
nth Specifies which element is desired (starting at 1).
value The value to overwrite the nth element with.

7.103.3.5 virtual void execute (const std::string & cmd_line, const std::vector<
std::string > & words, const std::vector< std::string > & words_lc,
std::ostream & result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:

can_pop [<PopPort>]
Return nb_can_pop() for the specified <PopPort> (default 0).

can_push [<PushPort>]
Return nb_can_push() for the specified <PushPort> (default 0).

dump
Return the os buffer from calling xtsc_queue::dump(os).

get_bit_width
Return xtsc_queue::get_bit_width().

get_num_consumers
Return xtsc_queue::get_num_consumers().

get_num_producers
Return xtsc_queue::get_num_producers().

get_pop_ticket
Return the ticket of most recent previous element popped.

get_push_ticket
Return the ticket of most recent previous element pushed.

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num_available
Return xtsc_queue::num_available().

num_free
Return xtsc_queue::num_free().

peek <nth>
Return value from calling xtsc_queue::peek(<nth>, value).

poke <nth> <NewValue>

Call xtsc_queue::poke(<nth>, <NewValue>). Return old value.

pop [<PopPort>]
Return the value popped by calling nb_pop() for the specified <PopPort>
(default 0). Throws if cannot pop.

push <Value> [<PushPort>]

Return nb_push(<Value>) for the specified <PushPort> (default 0).

reset
Call xtsc_queue::reset().

Notes:

• The poke command is not supported when "push_file" is specified.

• The peek command is not supported when "pop_file" is specfied.
• The can_push and push commands are not supported when "num_producers" is 0.
• The can_pop and pop commands are not supported when "num_consumser" is 0.

Implements xtsc_command_handler_interface.

7.103.3.6 void connect (xtsc::xtsc_core & core, const char ∗ queue_name,

xtsc::u32 port_num = 0)

Connect to an xtsc_core. This method connects this xtsc_queue to the named input or
output queue interface of an xtsc_core.

Parameters:
core The xtsc_core to connect to.
queue_name Queue interface name as it appears in the user’s TIE code after the
queue keyword. This name must NOT begin with the "TIE_" prefix.
port_num If queue_name is an output queue interface of core then this specifies the
producer port number of this xtsc_queue. If queue_name is an input queue inter-
face of core then this specifies the consumer port number of this xtsc_queue.

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7.103.3.7 void connect (xtsc_queue_producer & producer, xtsc::u32 port_num =

0)

Connect to an xtsc_queue_producer. This method connects the specified producer port of

this xtsc_queue to the specified xtsc_queue_producer.

Parameters:
producer The xtsc_queue_producer to connect to.
port_num The producer port number of this xtsc_queue to connect to.

7.103.3.8 void connect (xtsc_queue_consumer & consumer, xtsc::u32 port_num =

0)

Connect to an xtsc_queue_consumer. This method connects the specified consumer port

of this xtsc_queue to the specified xtsc_queue_consumer.

Parameters:
consumer The xtsc_queue_consumer to connect to.
port_num The consumer port number of this xtsc_queue to connect to.

The documentation for this class was generated from the following file:

• xtsc_queue.h

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7.104 xtsc_queue_consumer Class Reference

A scripted consumer to drain a queue.

#include <xtsc/xtsc_queue_consumer.h>Inheritance diagram for xtsc_queue_-
consumer:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface xtsc_queue_pop_if

xtsc_queue_consumer

Collaboration diagram for xtsc_queue_consumer:

xtsc_connection_interface

xtsc_module
xtsc_resettable

xtsc_command_handler_interface

xtsc_queue_pop_if xtsc_queue_consumer
m_test_vector_stream

xtsc_script_file m_pop_floating
m_empty_floating
m_data_floating

xtsc_signal_sc_bv_base xtsc_signal_sc_bv_base_floating

Public Member Functions

• SC_HAS_PROCESS (xtsc_queue_consumer)
• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

• xtsc_queue_consumer (sc_core::sc_module_name module_name, const xtsc_-

queue_consumer_parms &consumer_parms)
Constructor for an xtsc_queue_consumer.

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• ∼xtsc_queue_consumer (void)
Destructor.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• void reset (bool hard_reset=false)

Reset the xtsc_queue_consumer.

• void execute (const std::string &cmd_line, const std::vector< std::string > &words,
const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

• void connect (xtsc::xtsc_tx_loader &loader)

Connect to a upstream xtsc_tx_loader.

• void script_thread (void)

Thread to process commands from m_script_file.

• void sample_thread (void)

Thread to sample the empty signal to see if the pop succeeded.

• void request_thread (void)

Thread to drive the pop request.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

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Public Attributes
• sc_core::sc_out< sc_dt::sc_bv_base > m_pop
pin-level pop request to queue

• sc_core::sc_in< sc_dt::sc_bv_base > m_data

pin-level data from queue

• sc_core::sc_in< sc_dt::sc_bv_base > m_empty

pin-level empty signal from queue

• sc_core::sc_port< xtsc::xtsc_queue_pop_if > m_queue

TLM port to queue.

Protected Member Functions

• xtsc::u32 get_u32 (xtsc::u32 index, const std::string &argument_name)
Extract a u32 value (named argument_name) from the word at m_words[index].

• double get_double (xtsc::u32 index, const std::string &argument_name)

Extract a double value (named argument_name) from the word at m_words[index].

• void end_of_elaboration ()
Method to check interface width.

• bool nb_can_pop ()
This method is used to determine if the queue has at least one element in it.

• bool nb_pop (sc_dt::sc_unsigned &element, xtsc::u64 &ticket)

This method is used remove an element from the queue.

• xtsc::u32 nb_get_bit_width ()
Get the element width in bits that the queue implementation will pop.

Protected Attributes
• log4xtensa::TextLogger & m_text
For logging.

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• bool m_wraparound
From "wraparound" parameter.

• xtsc::xtsc_script_file m_test_vector_stream
Script file from "script_file" parameter.

• std::string m_script_file
Script file name from "script_file" parameter.

• std::string m_line
Current line from "script_file".

• xtsc::u32 m_line_count
Current line number from "script_file".

• std::vector< std::string > m_words

Current line from "script_file" tokenized into words.

• xtsc::u64 m_clock_period_value
This device’s clock period as u64.

• sc_core::sc_time m_clock_period
From "clock_period" parameter.

• sc_core::sc_time m_time_resolution
The SystemC time resolution.

• bool m_has_posedge_offset
True if m_posedge_offset is non-zero.

• sc_core::sc_time m_posedge_offset
From "posedge_offset" parameter.

• xtsc::u64 m_posedge_offset_value
m_posedge_offset as u64

• sc_core::sc_time m_sample_phase
From "sample_phase" parameter.

• sc_core::sc_time m_deassert_delay
From "deassert_delay" parameter.

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• bool m_no_timeout
True if <timeout> was not specified in "script_file" for this pop.

• xtsc::u32 m_width1
Bit width of each element.

• bool m_pin_level
From "pin_level" parameter.

• sc_core::sc_trace_file ∗ m_p_trace_file
From "vcd_handle" parameter.

• xtsc::u64 m_pop_count
Number of items popped.

• xtsc::u64 m_ticket
Ticket of last value popped ("pin_level" false).

• sc_dt::sc_unsigned m_value
Popped value ("pin_level" false).

• sc_dt::sc_bv_base m_value_bv
Popped value ("pin_level" true).

• sc_dt::sc_bv_base m_zero_bv
Constant 0.

• sc_dt::sc_bv_base m_one_bv
Constant 1.

• sc_core::sc_event m_next_request
To notify script_thread to advance ("pin_level" true).

• sc_core::sc_event m_assert
To notify request_thread to assert the request.

• sc_core::sc_event m_deassert
To notify request_thread to deassert the request.

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

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• xtsc::xtsc_signal_sc_bv_base_floating m_pop_floating
• xtsc::xtsc_signal_sc_bv_base_floating m_data_floating
• xtsc::xtsc_signal_sc_bv_base_floating m_empty_floating

7.104.1 Detailed Description

A scripted consumer to drain a queue. This XTSC module implements a queue consumer
that reads an input file ("script_file") to determine when to attempt to read values from (i.e.
pop) a queue module.
This module provides a simple means to test reading a queue at the TLM-level (such as
xtsc_queue) or at the pin-level (such as xtsc_queue_pin). To use pin-level connections,
you must set the "pin_level" parameter to true.
Here is a block diagram of an xtsc_queue_consumer as it is used in the queue consumer
example:

queue.m_producer queue.m_consumer

nb_push() nb_pop()
xtsc_queue_producer xtsc_queue_consumer
producer xtsc_queue queue
consumer
producer.vec consumer.vec

producer.m_queue consumer.m_queue

Figure 7.16: xtsc_queue_consumer Example

See also:
xtsc_queue_consumer_parms
xtsc::xtsc_queue_pop_if

Definition at line 231 of file xtsc_queue_consumer.h.

7.104.2 Constructor & Destructor Documentation

7.104.2.1 xtsc_queue_consumer (sc_core::sc_module_name module_name,

const xtsc_queue_consumer_parms & consumer_parms)

Constructor for an xtsc_queue_consumer.

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Parameters:
module_name Name of the xtsc_queue_consumer sc_module.
consumer_parms The remaining parameters for construction.

See also:
xtsc_queue_consumer_parms

7.104.3 Member Function Documentation

7.104.3.1 void execute (const std::string & cmd_line, const std::vector<

std::string > & words, const std::vector< std::string > & words_lc,
std::ostream & result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:

can_pop
Return !empty ("pin_level" true) or nb_can_pop() ("pin_level" false).

get_pop_count
Return number of items popped since simulation began.

get_pop_data
Return most recent popped data.

get_pop_ticket
Return ticket of most recent popped data.
TLM only ("pin_level" false).

pop
Calls nb_pop(value, ticket) and returns value if successful, else throws exception.
TLM only ("pin_level" false).

reset [<Hard>]
Call reset(<Hard>). Where <Hard> is 0|1 (default 0).

Implements xtsc_command_handler_interface.

7.104.3.2 void connect (xtsc::xtsc_tx_loader & loader)

Connect to a upstream xtsc_tx_loader. This method connects the m_queue sc_port of this
xtsc_queue_consumer to the m_consumer sc_export of an xtsc_tx_loader.

Parameters:
loader The xtsc_tx_loader to connect to.

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7.104.3.3 bool nb_can_pop () [inline, protected, virtual]

This method is used to determine if the queue has at least one element in it.

Returns:
true if the queue has at least one element in it, returns false if the queue is empty.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implements xtsc_queue_pop_if.
Definition at line 397 of file xtsc_queue_consumer.h.

7.104.3.4 bool nb_pop (sc_dt::sc_unsigned & element, xtsc::u64 & ticket)

[inline, protected, virtual]

This method is used remove an element from the queue.

Parameters:
element The sc_unsigned object in which to return the element popped from the
queue.
ticket An optional reference to a u64 object in which to return a ticket number asso-
ciated with this queue element. If a component which implements this interface
choses to support the ticket concept, it should create and return a unique ticket
number for each element pushed into the component (see xtsc_create_queue_-
ticket()). The unique ticket number should be maintained with the element and
be returned here when the element is popped from the component. It is rec-
ommended that a component that implements both the xtsc_queue_push_if and
xtsc_queue_pop_if interfaces support this ticket concept. For some devices (e.g.
ones that implement just one of the two interfaces), the ticket concept may not be
meaningful and they should just return a constant ticket value (e.g. 0). Typically,
queue clients (such as xtsc_core) use this ticket for non-hardware purposes such
as logging, profiling, and debugging. Clients are free to ignore the ticket.

Returns:
false if no element can be removed because the queue is empty, otherwise returns
true.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implements xtsc_queue_pop_if.
Definition at line 398 of file xtsc_queue_consumer.h.

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7.104.3.5 xtsc::u32 nb_get_bit_width () [inline, protected, virtual]

Get the element width in bits that the queue implementation will pop. This method allows
the queue consumer to confirm that the implementation will pop elements of the expected
bit width.
This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implements xtsc_queue_pop_if.
Definition at line 399 of file xtsc_queue_consumer.h.
The documentation for this class was generated from the following file:

• xtsc_queue_consumer.h

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 Chapter 7. Class Documentation

7.105 xtsc_queue_consumer_parms Class Reference

Constructor parameters for a xtsc_queue_consumer object.

#include <xtsc/xtsc_queue_consumer.h>Inheritance diagram for xtsc_queue_-
consumer_parms:

xtsc_parms

xtsc_queue_consumer_parms

Collaboration diagram for xtsc_queue_consumer_parms:

xtsc_parms

xtsc_queue_consumer_parms

Public Member Functions

• xtsc_queue_consumer_parms (const char ∗script_file=0, xtsc::u32 width1=32)

Constructor for an xtsc_queue_consumer_parms object.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

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7.105.1 Detailed Description

Constructor parameters for a xtsc_queue_consumer object. This class contains the con-
structor parameters for a xtsc_queue_consumer object.

Name Type Description

------------------ ---- --------------------------------------------------------

"pin_level" bool If true, pin-level connections are used.

Default = false (TLM connections are used).

"vcd_handle" void* Pointer to SystemC VCD object (sc_trace_file *) or 0 if

tracing is not desired. This parameter is ignored if
"pin_level" is false.
Default = 0 (NULL).

"script_file" char* The file to read the test vector commands from. Each
command occupies one line in the file. Valid command
formats are shown below (the first format shows a queue
pop transaction command):

<delay> [<timeout>]
<delay> STOP
WAIT <duration>
SYNC <time>
TEST_EMPTY
NOTE message
INFO message

1. Integers can appear in decimal or hexadecimal (using

'0x' prefix) format.
2. <delay> specifies how long to wait after completing
the previous command before attempting to pop a
value from the queue or stopping the simulation.
<delay> can be 0 (to mean 1 delta cycle), or "now"
to mean no delta cycle delay, or a positive integer
or floating point number to mean that many clock
periods (see "clock_period").
Note: For pin-level connections, a pop command
is considered to be complete when the pop request
is deasserted. See parameter "deassert_delay".
3. The optional <timeout> specifies how long to
continue attempting to pop a value from the queue.
For a TLM-level connection (e.g. to xtsc_queue),
<timeout> specifies a non-zero integer number of
clock periods and the pop request is repeated each
clock period for <timeout> number of clock periods
or until the pop request is granted. For a pin-
level connection (e.g. to xtsc_queue_pin),
<timeout> is multiplied by the module's clock
period (see "clock_period") to determine the
maximum amount of time the pop request will be
asserted before being abandoned if it has not yet
been not granted. For a pin-level connection,
<timeout> can be an integer or a floating point
number. For either a TLM-level or a pin-level

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 Chapter 7. Class Documentation

connection, a negative or missing <timeout> value

means to keep trying the request until it is
granted.
4. The "<delay> STOP" command causes simulation to stop
via a call to the sc_stop() method after the
specified delay.
5. The "WAIT <duration>" command can be used to cause a
wait of the specified duration. <duration> can be 0
(to mean 1 delta cycle) or a positive integer or
floating point number to mean that many clock
periods.
6. The "SYNC <time>" command with <time> less than 1.0
can be used to cause a wait to the clock phase
(relative to posedge clock) specified by <time>.
Posedge clock is as specified by "posedge_offset".
For example, "sync 0.5" will cause the minimum wait
necessary to sync to negedge clock.
The "SYNC <time>" command with <time> greater than
or equal to 1.0 can be used to cause a wait until
the specified absolute simulation time.
7. The "TEST_EMPTY" command causes the nb_can_pop()
method to be called (TLM-level) or the empty signal
to be sampled (pin-level) and the result to be
logged.
8. The NOTE and INFO commands can be used to cause
the entire line to be logged at NOTE_LOG_LEVEL
or INFO_LOG_LEVEL, respectively.
9. Words are case insensitive.
10. Comments, extra whitespace, blank lines, and lines
between "#if 0" and "#endif" are ignored.
See xtsc_script_file for a complete list of
pseudo-preprocessor commands.

"bit_width" u32 Width of each queue element in bits.

"clock_period" u32 This is the length of this module's clock period

expressed in terms of the SystemC time resolution
(from sc_get_time_resolution()). A value of
0xFFFFFFFF means to use the XTSC system clock
period (from xtsc_get_system_clock_period()).
Default = 0xFFFFFFFF (i.e. use the system clock
period).

"posedge_offset" u32 This specifies the time at which the first posedge of
this device's clock conceptually occurs. It is
expressed in units of the SystemC time resolution and
the value implied by it must be strictly less than the
value implied by the "clock_period" parameter. A value
of 0xFFFFFFFF means to use the same posedge offset as
the system clock (from
xtsc_get_system_clock_posedge_offset()).
Default = 0xFFFFFFFF.

"sample_phase" u32 This specifies the phase (i.e. the point) in each clock
period at which the empty signal is sampled. It is
expressed in terms of the SystemC time resolution (from
sc_get_time_resolution()) and must be strictly less

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Chapter 7. Class Documentation

than the clock period as specified by the

"clock_period" parameter. A value of 0 means sampling
occurs at posedge clock as specified by "posedge_clock".
This parameter is for pin-level connection only.
Default = 0.

"deassert_delay" u32 During a pop attempt, this specifies how long after the
empty signal is sampled and found to be false, that the
pop signal should be deasserted. It is expressed in
terms of the SystemC time resolution (from
sc_get_time_resolution()) and must be strictly less than
the clock period as specified by the "clock_period"
parameter. A value of 0 means the pop signal will be
deasserted 1 delta cycle after the empty signal is
sampled and found to be false. This parameter is for
pin-level connection only.
Default = 0.

"wraparound" bool If false (the default), "script_file" is only processed

one time. If true, the file pointer will be reset to
the beginning of the file each time the end of file is
reached.
Default = false.

See also:
xtsc_queue_consumer
xtsc::xtsc_parms
xtsc::xtsc_script_file

Definition at line 178 of file xtsc_queue_consumer.h.

7.105.2 Constructor & Destructor Documentation

7.105.2.1 xtsc_queue_consumer_parms (const char ∗ script_file = 0, xtsc::u32

width1 = 32) [inline]

Constructor for an xtsc_queue_consumer_parms object.

Parameters:
script_file The file name to read the xtsc_request test vectors from.
width1 Width of each queue element in bits.

Definition at line 191 of file xtsc_queue_consumer.h.

The documentation for this class was generated from the following file:

• xtsc_queue_consumer.h

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7.106 xtsc_queue_parms Class Reference

Constructor parameters for an xtsc_queue object.

#include <xtsc/xtsc_queue.h>Inheritance diagram for xtsc_queue_parms:

xtsc_parms

xtsc_queue_parms

Collaboration diagram for xtsc_queue_parms:

xtsc_parms

xtsc_queue_parms

Public Member Functions

• xtsc_queue_parms (xtsc::u32 width1=32, xtsc::u32 depth=16, const char ∗push_-

file=0, const char ∗pop_file=0, bool wraparound=false)
Constructor for an xtsc_queue_parms object.

• xtsc_queue_parms (const xtsc::xtsc_core &core, const char ∗queue_name, xtsc::u32

depth=16, const char ∗push_file=0, const char ∗pop_file=0, bool wraparound=false)
Constructor for an xtsc_queue_parms object based upon an xtsc_core object and a named
TIE input or output queue.

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• void init (xtsc::u32 width1=32, xtsc::u32 depth=16, const char ∗push_file=0, const
char ∗pop_file=0, bool wraparound=false)
Do initialization common to both constructors.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

7.106.1 Detailed Description

Constructor parameters for an xtsc_queue object. This class contains the constructor pa-
rameters for an xtsc_queue object.

Name Type Description

------------------ ---- --------------------------------------------------

"bit_width" u32 Width of each queue element in bits.

"depth" u32 Number of elements the queue can hold.

"num_producers" u32 Number of producers which can write to the queue. If

"num_producers" is greater than 1 then a dedicated skid
buffer will be added to the queue for each producer.
Default = 1.

"num_consumers" u32 Number of consumers which can read from the queue. If
"num_consumers" is greater than 1 then a dedicated skid
buffer will be added to the queue for each consumer.
Default = 1.

"push_file" char* Name of file to write nb_push elements to instead

of adding them to the queue fifo. If the
"push_file" parameter is non-null and non-empty,
then calls to nb_push will cause the passed
element to be written to the file and to NOT be
added to the queue fifo. If the file named by the
"push_file" parameter value does not exist, it
will be created. If it does exist, it will be
overwritten. If both "push_file" and "pop_file"
parameters are null or empty, then calls to nb_push
will cause the passed element to be added to the
queue fifo.

"timestamp" bool If true, then each value written to "push_file"

will include the SystemC timestamp as an
xtsc_script_file comment. This parameter is ignored
unless "push_file" is non-null and non-empty.
Default = true.

"pop_file" char* Name of file to read nb_pop elements from instead

of getting them from the queue. If the "pop_file"
parameter is non-null and non-empty, then calls

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to nb_pop will get their element from the file

instead of from the queue fifo. The file named
by the "pop_file" parameter must exist. If both
"pop_file" and "push_file" parameters are null or
empty, then calls to nb_pop will get their element
from the queue fifo. Element values in the file can
be expressed in decimal or hexadecimal (using leading
'0x') format. Element values must be separated by
white-space and any C-style comments are ignored.
See xtsc::xtsc_script_file.

"wraparound" bool Specifies what should happen when the end of file
(EOF) is reached on "pop_file". When EOF is reached
and "wraparound" is true, "pop_file" will be reset
to the beginning of file and nb_pop will return
the first element from the file. When EOF is
reached and "wraparound" is false, nb_can_pop and
nb_pop will return false.
Default = false.

"host_shared_memory" bool If true the storage for the queue tickets, data, and
read and write indices will be created at module
construction time as host OS shared memory using
shm_open() on Linux and CreateFileMapping() on
MS Windows. If this parameter is set true, then
neither "pop_file" nor "push_file" may be used and
neither "num_consumers" nor "num_producers" may
exceed 1.
Default = false.

"shared_memory_name" char* The name of the host OS shared memory. If this

parameter is left at its default setting of NULL, then
the shared memory name will be formed by concatenating
the user name, a period, and the module instance
hierarchical name. This parameter is only used if
"host_shared_memory" is true.
Default = NULL (use default shared memory name)

Note: To cause xtsc_queue to function as a normal queue, set both "push_file"

and "pop_file" parameter values to null (the default) or empty and
bind to both the xtsc_queue::m_producer and xtsc_queue::m_consumer ports.

To cause xtsc_queue to function as an infinite sink of elements pushed

into it, specify a valid file name for "push_file" and bind to the
xtsc_queue::m_producer port.

To cause xtsc_queue to function as a source of elements popped from

it, specify a valid and existing file name for "pop_file" and bind to
the xtsc_queue::m_consumer port.

To cause xtsc_queue to function as both a sink and a source, specify

both file names and bind to both ports.

To cause xtsc_queue to function as a sink but not as a source, specify

"pop_file" as null or empty and do NOT bind to the xtsc_queue::m_consumer
port.

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To cause xtsc_queue to function as a source but not as a sink, specify

"push_file" as null or empty and do NOT bind to the xtsc_queue::m_producer
port.

To use host OS shared memory for the queue, set "host_shared_memory" to true,
do not set "pop_file" or "push_file", set "num_consumers" and "num_producers"
to either 0 or 1, and ensure at most one process on the workstation writes to
the queue and at most one process reads from the queue.

See also:
xtsc_queue
xtsc::xtsc_parms

Definition at line 152 of file xtsc_queue.h.

7.106.2 Constructor & Destructor Documentation

7.106.2.1 xtsc_queue_parms (xtsc::u32 width1 = 32, xtsc::u32 depth = 16, const

char ∗ push_file = 0, const char ∗ pop_file = 0, bool wraparound = false)
[inline]

Constructor for an xtsc_queue_parms object.

Parameters:
width1 Width of each queue element in bits.
depth Number of elements the queue can hold.
push_file Name of file to write nb_push elements to instead of adding them to the
queue fifo.
pop_file Name of file to read nb_pop elements from instead of getting them from the
queue fifo.
wraparound Indicates if pop_file should wraparound to the beginning of the file after
the end of file is reached.

Definition at line 173 of file xtsc_queue.h.

7.106.2.2 xtsc_queue_parms (const xtsc::xtsc_core & core, const char ∗

queue_name, xtsc::u32 depth = 16, const char ∗ push_file = 0, const
char ∗ pop_file = 0, bool wraparound = false)

Constructor for an xtsc_queue_parms object based upon an xtsc_core object and a named
TIE input or output queue. This constructor will determine width1 by querying the core

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 Chapter 7. Class Documentation

object and then pass it to the init() method. If desired, after the xtsc_queue_parms ob-
ject is constructed, its data members can be changed using the appropriate xtsc::xtsc_-
parms::set() method before passing it to the xtsc_queue constructor.

Parameters:
core A reference to the xtsc_core object upon which to base the xtsc_queue_parms.
queue_name The name of the TIE queue as it appears in the user’s TIE code after
the queue keyword.
depth Number of elements the queue can hold.
push_file Name of file to write nb_push elements to instead of adding them to the
queue fifo.
pop_file Name of file to read nb_pop elements from instead of getting them from the
queue fifo.
wraparound Indicates if pop_file should wraparound to the beginning of the file after
the end of file is reached.

The documentation for this class was generated from the following file:

• xtsc_queue.h

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7.107 xtsc_queue_pin Class Reference

A TIE queue implementation using the pin-level interface.

#include <xtsc/xtsc_queue_pin.h>Inheritance diagram for xtsc_queue_pin:

xtsc_connection_interface xtsc_resettable

xtsc_module

xtsc_queue_pin

Collaboration diagram for xtsc_queue_pin:

xtsc_connection_interface xtsc_resettable xtsc_signal_sc_bv_base

xtsc_module xtsc_script_file xtsc_signal_sc_bv_base_floating

m_data_out_floating
m_pop_floating
m_empty_floating
m_pop_file
m_full_floating
m_data_in_floating
m_push_floating

xtsc_queue_pin

Public Member Functions

• SC_HAS_PROCESS (xtsc_queue_pin)

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 Chapter 7. Class Documentation

• virtual const char ∗ kind () const

Our C++ type (SystemC uses this).

• xtsc_queue_pin (sc_core::sc_module_name module_name, const xtsc_queue_pin_-

parms &queue_parms)
Constructor for an xtsc_queue_pin.

• ∼xtsc_queue_pin ()
Destructor.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• void reset (bool hard_reset=false)

Reset the xtsc_queue_pin.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

• log4xtensa::BinaryLogger & get_binary_logger ()

Get the BinaryLogger for this component (e.g. to adjust its log level).

Public Attributes

• xtsc::u32 m_width1
Bit width of each element.

• sc_core::sc_in< sc_dt::sc_bv_base > m_push

Push request from producer.

• sc_core::sc_in< sc_dt::sc_bv_base > m_data_in

Input data from producer.

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• sc_core::sc_out< sc_dt::sc_bv_base > m_full

Signal producer that queue is full.

• sc_core::sc_in< sc_dt::sc_bv_base > m_pop

Pop request from consumer.

• sc_core::sc_out< sc_dt::sc_bv_base > m_empty

Signal consumer that queue is empty.

• sc_core::sc_out< sc_dt::sc_bv_base > m_data_out

Output data to consumer.

• xtsc::xtsc_signal_sc_bv_base_floating m_push_floating
To cap unused push interface.

• xtsc::xtsc_signal_sc_bv_base_floating m_data_in_floating
To cap unused push interface.

• xtsc::xtsc_signal_sc_bv_base_floating m_full_floating
To cap unused push interface.

• xtsc::xtsc_signal_sc_bv_base_floating m_pop_floating
To cap unused pop interface.

• xtsc::xtsc_signal_sc_bv_base_floating m_empty_floating
To cap unused pop interface.

• xtsc::xtsc_signal_sc_bv_base_floating m_data_out_floating
To cap unused pop interface.

• sc_core::sc_signal< xtsc::u32 > m_quantity

Number of elements in queue.

Protected Member Functions

• void before_end_of_elaboration ()
Cap unused interfaces and do checks.

• void get_next_pop_file_element ()

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 Chapter 7. Class Documentation

Set m_has_pop_file_element and m_pop_file_element.

• void worker_thread ()
For regular queue using a fifo.

• void file_worker_thread ()
For push to file and/or pop from file.

Protected Attributes

• sc_core::sc_time m_time_resolution
SystemC time resolution.

• sc_core::sc_time m_clock_period
From "clock_period" parameter.

• xtsc::u64 m_clock_period_value
m_clock_period as u64

• bool m_has_posedge_offset
True if m_posedge_offset is non-zero.

• sc_core::sc_time m_posedge_offset
From "posedge_offset" parameter.

• xtsc::u64 m_posedge_offset_value
m_posedge_offset as u64

• sc_core::sc_time m_sample_phase
From "sample_phase" parameter.

• xtsc::u64 m_sample_phase_value
m_sample_phase as u64

• sc_dt::sc_bv_base m_zero
Constant 0.

• sc_dt::sc_bv_base m_one
Constant 1.

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• int m_rp
Read pointer in m_elements_ptrs fifo.

• int m_wp
Write pointer in m_elements_ptrs fifo.

• sc_dt::sc_bv_base ∗∗ m_element_ptrs
Fifo to store the elements.

• xtsc::u64 ∗ m_tickets
Fifo to store the ticket associated with each element.

• xtsc::u32 m_depth
From "depth" parameter. Capacity - number of elements.

• log4xtensa::TextLogger & m_text

Text logger.

• log4xtensa::BinaryLogger & m_binary

Binary logger.

• bool m_log_data_binary
True if transaction data should be logged by m_binary.

• sc_core::sc_trace_file ∗ m_p_trace_file
• bool m_use_fifo
False if pushing to a file and/or popping from a file.

• bool m_use_push_file
True if "push_file" is set.

• bool m_use_pop_file
True if "pop_file" is set.

• std::string m_push_file_name
Name of file to write elements to instead of using the fifo.

• std::string m_pop_file_name
Name of file to read elements from instead of using the fifo.

• std::ofstream ∗ m_push_file
File to write elements to instead of using the fifo.

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• bool m_timestamp
From "timestamp" parameter.

• xtsc::xtsc_script_file ∗ m_pop_file
File to read elements from instead of using the fifo.

• bool m_wraparound
False if m_pop_file should only be read through one time.

• bool m_has_pop_file_element
For use by nb_can_pop() when using m_pop_file.

• sc_dt::sc_bv_base m_pop_file_element
For use by nb_pop() when using m_pop_file.

• std::vector< std::string > m_words

The tokenized words of the current line from m_pop_file.

• std::string m_line
The current line from m_pop_file.

• xtsc::u32 m_next_word_index
Index into m_words.

• xtsc::u32 m_pop_file_line_number
The line number of m_words in m_pop_file.

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

7.107.1 Detailed Description

A TIE queue implementation using the pin-level interface. Example XTSC queue imple-
mentation that connects at the pin-level.
Here is a block diagram of an xtsc_queue_pin as it is used in the xtsc_queue_pin example:

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Chapter 7. Class Documentation

xtsc_core core0 xtsc_queue_pin Q1 xtsc_core core1

“SimPinLevelInterfaces” = “OUTQ1” “SimPinLevelInterfaces” = “INQ1”
(producer.out) (consumer.out)

core1_TIE_INQ1_PopReq_m_pop_Q1
TIE_OUTQ1_PushReq m_push m_pop TIE_INQ1_PopReq

96 96
Q1_m_data_out_TIE_INQ1_core1
TIE_OUTQ1 / m_data_in m_data_out / TIE_INQ1

Q1_m_empty_TIE_INQ1_Empty_core1
TIE_OUTQ1_Full m_full m_empty TIE_INQ1_Empty

Figure 7.17: xtsc_queue_pin Example

See also:
xtsc_queue_pin_parms

Definition at line 210 of file xtsc_queue_pin.h.

7.107.2 Constructor & Destructor Documentation

7.107.2.1 xtsc_queue_pin (sc_core::sc_module_name module_name, const

xtsc_queue_pin_parms & queue_parms)

Constructor for an xtsc_queue_pin.

Parameters:
module_name Name of the xtsc_queue_pin sc_module.
queue_parms The remaining parameters for construction.

See also:
xtsc_queue_pin_parms

The documentation for this class was generated from the following file:

• xtsc_queue_pin.h

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 Chapter 7. Class Documentation

7.108 xtsc_queue_pin_parms Class Reference

Constructor parameters for a xtsc_queue_pin object.

#include <xtsc/xtsc_queue_pin.h>Inheritance diagram for xtsc_queue_pin_parms:

xtsc_parms

xtsc_queue_pin_parms

Collaboration diagram for xtsc_queue_pin_parms:

xtsc_parms

xtsc_queue_pin_parms

Public Member Functions

• xtsc_queue_pin_parms (xtsc::u32 width1=32, xtsc::u32 depth=16, const char

∗push_file=0, const char ∗pop_file=0, bool wraparound=false, sc_core::sc_trace_file
∗p_trace_file=0)
Constructor for an xtsc_queue_pin_parms object.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

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7.108.1 Detailed Description

Constructor parameters for a xtsc_queue_pin object. This class contains the constructor
parameters for a xtsc_queue_pin object.

Name Type Description

------------------ ---- --------------------------------------------------

"bit_width" u32 Width of each queue element in bits.

"depth" u32 Number of elements the queue can hold.

"push_file" char* Name of file to write pushed elements to instead

of adding them to the queue fifo. If the
"push_file" parameter is non-null and non-empty,
then pushes will cause the passed
element to be written to the file and to NOT be
added to the queue fifo. If the file named by the
"push_file" parameter value does not exist, it
will be created. If it does exist, it will be
overwritten. If both "push_file" and "pop_file"
parameters are null or empty, then pushes
will cause the passed element to be added to the
queue fifo.

"timestamp" bool If true, then each value written to "push_file"

will include the SystemC timestamp as an
xtsc_script_file comment. This parameter is ignored
unless "push_file" is non-null and non-empty.
Default = true.

"pop_file" char* Name of file to read popped elements from instead

of getting them from the queue. If the "pop_file"
parameter is non-null and non-empty, then pops will
get their element from the file instead of from the
queue fifo. The file named by the "pop_file"
parameter must exist. If both "pop_file" and
"push_file" parameters are null or empty, then pops
will get their element from the queue fifo. Element
values in the file can be expressed in decimal or
hexadecimal (using leading '0x') format. Element
values must be separated by white-space.
See xtsc::xtsc_script_file.

"wraparound" bool Specifies what should happen when the end of file
(EOF) is reached on "pop_file". When EOF is reached
and "wraparound" is true, "pop_file" will be reset
to the beginning of file and pops will return
the first element from the file. When EOF is
reached and "wraparound" is false, pops will fail.
Default = false.

Note: To cause xtsc_queue_pin to function as a normal queue, set both "push_file"

and "pop_file" parameter values to null (the default) or empty and
bind to both push and pop interfaces.

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To cause xtsc_queue_pin to function as an infinite sink of elements pushed

into it, specify a valid file name for "push_file" and bind to the
push interfaces.

To cause xtsc_queue_pin to function as a source of elements popped from

it, specify a valid and existing file name for "pop_file" and bind to
the pop interfaces.

To cause xtsc_queue_pin to function as both a sink and a source, specify

both file names and bind to both push and pop interfaces.

To cause xtsc_queue_pin to function as a sink but not as a source, specify

"pop_file" as null or empty and do NOT bind to the push interfaces.

To cause xtsc_queue_pin to function as a source but not as a sink, specify

"push_file" as null or empty and do NOT bind to the pop interfaces.

"clock_period" u32 This is the length of this queue's clock period

expressed in terms of the SystemC time
resolution (from sc_get_time_resolution()). A
value of 0xFFFFFFFF means to use the XTSC system
clock period from xtsc_get_system_clock_period().
Default = 0xFFFFFFFF (i.e. use the system clock
period).

"posedge_offset" u32 This specifies the time at which the first

posedge of this device's clock conceptually
occurs. It is expressed in units of the SystemC
time resolution and the value implied by it must
be strictly less than the value implied by the
"clock_period" parameter. A value of 0xFFFFFFFF
means to use the same posedge offset as the
system clock (from
xtsc_get_system_clock_posedge_offset()).
Default = 0xFFFFFFFF.

"sample_phase" u32 This specifies the phase (i.e. the point) in

each clock period at which the signals are
sampled. It is expressed in terms of the
SystemC time resolution (from
sc_get_time_resolution()) and must be strictly
less than the clock period as specified by the
"clock_period" parameter. A value of 0 means
sampling occurs at posedge clock as specified by
"posedge_offset".
Default = 0.

"vcd_handle" void* Pointer to SystemC VCD object (sc_trace_file *)

or 0 if tracing is not desired.

See also:
xtsc_queue_pin

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Chapter 7. Class Documentation

xtsc::xtsc_parms
xtsc::xtsc_initialize_parms

Definition at line 142 of file xtsc_queue_pin.h.

7.108.2 Constructor & Destructor Documentation

7.108.2.1 xtsc_queue_pin_parms (xtsc::u32 width1 = 32, xtsc::u32 depth = 16,

const char ∗ push_file = 0, const char ∗ pop_file = 0, bool wraparound =
false, sc_core::sc_trace_file ∗ p_trace_file = 0) [inline]

Constructor for an xtsc_queue_pin_parms object.

Parameters:
width1 Width of each queue element in bits. Default = 32.
depth Number of elements the queue can hold. Default = 16.
push_file Name of file to write nb_push elements to instead of adding them to the
queue fifo.
pop_file Name of file to read nb_pop elements from instead of getting them from the
queue fifo.
wraparound Indicates if pop_file should wraparound to the beginning of the file after
the end of file is reached.
p_trace_file Pointer to SystemC VCD object or 0 if tracing is not desired. Default = 0.

Definition at line 169 of file xtsc_queue_pin.h.

The documentation for this class was generated from the following file:

• xtsc_queue_pin.h

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7.109 xtsc_queue_pop_if Class Reference

This interface is for connecting between a consumer and a queue.

#include <xtsc/xtsc_queue_pop_if.h>Inheritance diagram for xtsc_queue_pop_if:

xtsc_queue_pop_if

xtsc_queue_pop_if_impl xtsc_queue_pop_if_multi_impl xtsc_queue_consumer

Public Member Functions

• virtual bool nb_can_pop ()=0
This method is used to determine if the queue has at least one element in it.

• virtual bool nb_pop (sc_dt::sc_unsigned &element, u64 &ticket=pop_ticket)=0

This method is used remove an element from the queue.

• virtual u32 nb_get_bit_width ()=0

Get the element width in bits that the queue implementation will pop.

• virtual const sc_core::sc_event & default_event () const

Return the no-longer-empty event.

Static Protected Attributes

• static u64 pop_ticket

7.109.1 Detailed Description

This interface is for connecting between a consumer and a queue. This interface along
with the xtsc_queue_push_if is used for one way communication between a producer and
a consumer through a queue.
A producer has an sc_port<xtsc_queue_push_if>, a consumer has an sc_port<xtsc_-
queue_pop_if>, and a queue typically has an sc_export<xtsc_queue_push_if> and an
sc_export<xtsc_queue_pop_if>.

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Often the producer and the consumer are instances of xtsc_core.

Note: The methods of xtsc_queue_pop_if are all non-blocking in the OSCI TLM sense.
That is, they must NEVER call wait() either directly or indirectly. The "nb_" method prefix
stands for Non-Blocking.

See also:
xtsc_queue_push_if
xtsc_create_queue_ticket
xtsc_component::xtsc_queue
xtsc_core::How_to_do_port_binding

Definition at line 43 of file xtsc_queue_pop_if.h.

7.109.2 Member Function Documentation

7.109.2.1 virtual bool nb_can_pop () [pure virtual]

This method is used to determine if the queue has at least one element in it.

Returns:
true if the queue has at least one element in it, returns false if the queue is empty.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implemented in xtsc_queue_pop_if_impl, xtsc_queue_pop_if_multi_impl, xtsc_queue_-
consumer, and xtsc_queue_pop_if_impl.

7.109.2.2 virtual bool nb_pop (sc_dt::sc_unsigned & element, u64 & ticket =
pop_ticket) [pure virtual]

This method is used remove an element from the queue.

Parameters:
element The sc_unsigned object in which to return the element popped from the
queue.
ticket An optional reference to a u64 object in which to return a ticket number asso-
ciated with this queue element. If a component which implements this interface
choses to support the ticket concept, it should create and return a unique ticket
number for each element pushed into the component (see xtsc_create_queue_-
ticket()). The unique ticket number should be maintained with the element and

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be returned here when the element is popped from the component. It is rec-
ommended that a component that implements both the xtsc_queue_push_if and
xtsc_queue_pop_if interfaces support this ticket concept. For some devices (e.g.
ones that implement just one of the two interfaces), the ticket concept may not be
meaningful and they should just return a constant ticket value (e.g. 0). Typically,
queue clients (such as xtsc_core) use this ticket for non-hardware purposes such
as logging, profiling, and debugging. Clients are free to ignore the ticket.

Returns:
false if no element can be removed because the queue is empty, otherwise returns
true.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implemented in xtsc_queue_pop_if_impl, xtsc_queue_pop_if_multi_impl, xtsc_queue_-
consumer, and xtsc_queue_pop_if_impl.

7.109.2.3 virtual u32 nb_get_bit_width () [pure virtual]

Get the element width in bits that the queue implementation will pop. This method allows
the queue consumer to confirm that the implementation will pop elements of the expected
bit width.
This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implemented in xtsc_queue_pop_if_impl, xtsc_queue_pop_if_multi_impl, xtsc_queue_-
consumer, and xtsc_queue_pop_if_impl.

7.109.2.4 virtual const sc_core::sc_event& default_event () const [inline,

virtual]

Return the no-longer-empty event. Clients can call this method to get a reference to an
event that will be notified whenever the queue transitions from empty to not empty.
Sub-classes must override this method and return their no-longer-empty event.
Reimplemented in xtsc_queue_pop_if_impl, xtsc_queue_pop_if_multi_impl, and xtsc_-
queue_pop_if_impl.
Definition at line 118 of file xtsc_queue_pop_if.h.
The documentation for this class was generated from the following file:

• xtsc_queue_pop_if.h

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7.110 xtsc_queue_pop_if_impl Class Reference

Implementation of xtsc_queue_pop_if.
#include <xtsc/xtsc_tx_loader.h>Inheritance diagram for xtsc_queue_pop_if_impl:

xtsc_queue_pop_if

xtsc_queue_pop_if_impl

Collaboration diagram for xtsc_queue_pop_if_impl:

xtsc_connection_interface

xtsc_module
xtsc_resettable
m_incoming_tx_xfer
xtsc_tx_xfer m_outgoing_tx_xfer

xtsc_queue_push_if
m_data_out_floating
m_pop_floating m_loader xtsc_queue_push_if_impl
m_empty_floating
m_full_floating
m_queue_push_impl
m_data_in_floating
m_push_floating
xtsc_signal_sc_bv_base xtsc_signal_sc_bv_base_floating xtsc_tx_loader
m_loader m_tx_xfer_impl

m_queue_pop_impl m_loader
xtsc_queue_pop_if xtsc_queue_pop_if_impl xtsc_tx_xfer_if_impl

xtsc_tx_xfer_if

Public Member Functions

• xtsc_queue_pop_if_impl (const char ∗object_name, xtsc_tx_loader &loader)

Constructor.

• bool nb_can_pop ()
• bool nb_pop (sc_dt::sc_unsigned &element, u64 &ticket=pop_ticket)
• u32 nb_get_bit_width ()
• virtual const sc_core::sc_event & default_event () const
Get the event that will be notified when the queue transitions from empty to not empty.

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Private Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

SystemC callback when something binds to us.

Private Attributes

• xtsc_tx_loader & m_loader

Our xtsc_tx_loader object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.110.1 Detailed Description

Implementation of xtsc_queue_pop_if.
Definition at line 429 of file xtsc_tx_loader.h.

7.110.2 Member Function Documentation

7.110.2.1 bool nb_can_pop () [virtual]

See also:
xtsc_queue_pop_if

Implements xtsc_queue_pop_if.

7.110.2.2 bool nb_pop (sc_dt::sc_unsigned & element, u64 & ticket = pop_ticket)
[virtual]

See also:
xtsc_queue_pop_if

Implements xtsc_queue_pop_if.

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7.110.2.3 u32 nb_get_bit_width () [inline, virtual]

See also:
xtsc_queue_pop_if

Implements xtsc_queue_pop_if.
Definition at line 446 of file xtsc_tx_loader.h.
The documentation for this class was generated from the following file:

• xtsc_tx_loader.h

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7.111 xtsc_queue_pop_if_impl Class Reference

Implementation of xtsc_queue_pop_if for single consumer. Inheritance diagram for xtsc_-

queue_pop_if_impl:

xtsc_queue_pop_if

xtsc_queue_pop_if_impl

Collaboration diagram for xtsc_queue_pop_if_impl:

m_queue
xtsc_queue_pop_if_multi_impl
xtsc_command_handler_interface
m_pop_multi_impl
xtsc_queue_pop_if
xtsc_script_file
m_pop_file

m_pop_impl xtsc_queue m_push_multi_impl

xtsc_queue_pop_if_impl
m_queue xtsc_queue_push_if_multi_impl
m_queue
xtsc_connection_interface m_queue

xtsc_module
xtsc_resettable
m_push_impl

xtsc_queue_push_if xtsc_queue_push_if_impl

Public Member Functions

• xtsc_queue_pop_if_impl (const char ∗object_name, xtsc_queue &queue)

Constructor.

• bool nb_can_pop ()
• bool nb_pop (sc_dt::sc_unsigned &element, xtsc::u64 &ticket=pop_ticket)
• xtsc::u32 nb_get_bit_width ()
• virtual const sc_core::sc_event & default_event () const
Get the event that will be notified when the queue transitions from empty to not empty.

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Private Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

SystemC callback when something binds to us.

Private Attributes

• xtsc_queue & m_queue

Our xtsc_queue object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.111.1 Detailed Description

Implementation of xtsc_queue_pop_if for single consumer.

Definition at line 688 of file xtsc_queue.h.

7.111.2 Member Function Documentation

7.111.2.1 bool nb_can_pop () [virtual]

See also:
xtsc::xtsc_queue_pop_if

Implements xtsc_queue_pop_if.

7.111.2.2 bool nb_pop (sc_dt::sc_unsigned & element, xtsc::u64 & ticket =

pop_ticket) [virtual]

See also:
xtsc::xtsc_queue_pop_if

Implements xtsc_queue_pop_if.

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7.111.2.3 xtsc::u32 nb_get_bit_width () [inline, virtual]

See also:
xtsc::xtsc_queue_pop_if

Implements xtsc_queue_pop_if.
Definition at line 705 of file xtsc_queue.h.
The documentation for this class was generated from the following file:

• xtsc_queue.h

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7.112 xtsc_queue_pop_if_multi_impl Class Reference

Implementation of xtsc_queue_pop_if for multi-client queue (either m_num_producers or

m_num_consumers > 1). Inheritance diagram for xtsc_queue_pop_if_multi_impl:

xtsc_queue_pop_if

xtsc_queue_pop_if_multi_impl

Collaboration diagram for xtsc_queue_pop_if_multi_impl:

m_queue
xtsc_queue_pop_if_impl
xtsc_command_handler_interface
m_pop_impl
xtsc_queue_pop_if
xtsc_script_file m_pop_file

m_pop_multi_impl xtsc_queue m_push_multi_impl

xtsc_queue_pop_if_multi_impl
m_queue xtsc_queue_push_if_multi_impl
m_queue
xtsc_connection_interface m_queue

xtsc_module
xtsc_resettable
m_push_impl

xtsc_queue_push_if xtsc_queue_push_if_impl

Public Member Functions

• xtsc_queue_pop_if_multi_impl (const char ∗object_name, xtsc_queue &queue,

xtsc::u32 port_num)
Constructor.

• bool nb_can_pop ()
• bool nb_pop (sc_dt::sc_unsigned &element, xtsc::u64 &ticket=pop_ticket)
• xtsc::u32 nb_get_bit_width ()
• virtual const sc_core::sc_event & default_event () const
Get the event that will be notified when the queue transitions from empty to not empty.

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Private Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

SystemC callback when something binds to us.

Private Attributes

• xtsc_queue & m_queue

Our xtsc_queue object.

• xtsc::u32 m_port_num
Our consumer port number.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.112.1 Detailed Description

Implementation of xtsc_queue_pop_if for multi-client queue (either m_num_producers or

m_num_consumers > 1).
Definition at line 765 of file xtsc_queue.h.

7.112.2 Member Function Documentation

7.112.2.1 bool nb_can_pop () [virtual]

See also:
xtsc::xtsc_queue_pop_if

Implements xtsc_queue_pop_if.

7.112.2.2 bool nb_pop (sc_dt::sc_unsigned & element, xtsc::u64 & ticket =

pop_ticket) [virtual]

See also:
xtsc::xtsc_queue_pop_if

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Implements xtsc_queue_pop_if.

7.112.2.3 xtsc::u32 nb_get_bit_width () [inline, virtual]

See also:
xtsc::xtsc_queue_pop_if

Implements xtsc_queue_pop_if.
Definition at line 783 of file xtsc_queue.h.
The documentation for this class was generated from the following file:

• xtsc_queue.h

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7.113 xtsc_queue_producer Class Reference

A scripted producer to supply a queue.

#include <xtsc/xtsc_queue_producer.h>Inheritance diagram for xtsc_queue_-
producer:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface xtsc_queue_push_if

xtsc_queue_producer

Collaboration diagram for xtsc_queue_producer:

xtsc_connection_interface

xtsc_module

xtsc_resettable
xtsc_wire_write_if
xtsc_command_handler_interface
m_producer xtsc_wire_write_if_impl

xtsc_queue_push_if xtsc_queue_producer m_p_write_impl

m_test_vector_stream

xtsc_script_file m_full_floating
m_data_floating
m_push_floating

xtsc_signal_sc_bv_base xtsc_signal_sc_bv_base_floating

Classes
• class xtsc_wire_write_if_impl

Public Member Functions

• SC_HAS_PROCESS (xtsc_queue_producer)
• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

• xtsc_queue_producer (sc_core::sc_module_name module_name, const xtsc_-

queue_producer_parms &producer_parms)

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Constructor for an xtsc_queue_producer.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• void reset (bool hard_reset=false)

Reset the xtsc_queue_producer.

• sc_core::sc_export< xtsc::xtsc_wire_write_if > & get_control_input () const

Return the sc_export of the optional control input.

• virtual void execute (const std::string &cmd_line, const std::vector< std::string >
&words, const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

• void connect (xtsc::xtsc_tx_loader &loader)

Connect to a downstream xtsc_tx_loader.

• void connect (xtsc_wire_logic &logic, const char ∗output_name)

Connect an xtsc_wire_logic output to the control input of this xtsc_queue_producer.

• void connect (xtsc_mmio &mmio, const char ∗output_name)

Connect an xtsc_mmio output to the control input of this xtsc_queue_producer.

• void script_thread (void)

Thread to process commands from m_script_file.

• void sample_thread (void)

Thread to sample the full signal to see if push succeeded.

• void request_thread (void)

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Thread to drive the push request.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

Public Attributes
• sc_core::sc_out< sc_dt::sc_bv_base > m_push
pin-level push request to queue

• sc_core::sc_out< sc_dt::sc_bv_base > m_data

pin-level data to queue

• sc_core::sc_in< sc_dt::sc_bv_base > m_full

pin-level full signal from queue

• sc_core::sc_port< xtsc::xtsc_queue_push_if > m_queue

TLM port to the queue.

Protected Types
• typedef sc_core::sc_export< xtsc::xtsc_wire_write_if > wire_write_export

Protected Member Functions

• xtsc::u32 get_u32 (xtsc::u32 index, const std::string &argument_name)
Extract a u32 value (named argument_name) from the word at m_words[index].

• double get_double (xtsc::u32 index, const std::string &argument_name)

Extract a double value (named argument_name) from the word at m_words[index].

• void end_of_elaboration ()
Method to check interface width.

• bool nb_can_push ()
This method is used to determine if the queue can accept another element.

• bool nb_push (const sc_dt::sc_unsigned &, xtsc::u64 &)

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This method is used add an element to the queue.

• xtsc::u32 nb_get_bit_width ()
Get the element width in bits that the queue implementation will hold.

Protected Attributes

• log4xtensa::TextLogger & m_text

• bool m_control
From "control" parameter.

• bool m_control_bound
Something is connected to the control input.

• wire_write_export ∗ m_p_control
Optional control input.

• xtsc_wire_write_if_impl ∗ m_p_write_impl
Implementaion for optional control input.

• sc_dt::sc_unsigned m_control_value
Current value of the control input.

• xtsc::u32 m_control_write_count
Number of times control input is written.

• xtsc::u32 m_control_change_count
Number of times control input is written with a new value.

• xtsc::xtsc_script_file m_test_vector_stream
Script file from "script_file" parameter.

• std::string m_script_file
Script file name from "script_file" parameter.

• std::string m_line
Current line from "script_file".

• xtsc::u32 m_line_count
Current line number from "script_file".

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• std::vector< std::string > m_words

Current line from "script_file" tokenized into words.

• xtsc::u64 m_clock_period_value
This device’s clock period as u64.

• sc_core::sc_time m_clock_period
From "clock_period" parameter.

• sc_core::sc_time m_time_resolution
The SystemC time resolution.

• bool m_has_posedge_offset
True if m_posedge_offset is non-zero.

• sc_core::sc_time m_posedge_offset
From "posedge_offset" parameter.

• xtsc::u64 m_posedge_offset_value
m_posedge_offset as u64

• sc_core::sc_time m_request_phase
From "request_phase" parameter.

• sc_core::sc_time m_sample_phase
From "sample_phase" parameter.

• sc_core::sc_time m_previous_push
Time of most recent previous push.

• sc_core::sc_time m_deassert_delay
From "deassert_delay" parameter.

• bool m_no_timeout
True if <timeout> was not specified in "script_file" for this push.

• xtsc::u64 m_ticket
Save value of last ticket pushed.

• xtsc::u32 m_width1
Bit width of each element.

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• bool m_pin_level
From "pin_level" parameter.

• sc_core::sc_trace_file ∗ m_p_trace_file
From "vcd_handle" parameter.

• sc_dt::sc_unsigned m_value
Value from "script_file" when not operating "pin_level".

• sc_dt::sc_bv_base m_value_bv
Value from "script_file" when operating "pin_level".

• sc_dt::sc_bv_base m_zero_bv
Constant 0.

• sc_dt::sc_bv_base m_one_bv
Constant 1.

• sc_core::sc_event m_control_write_event
Notified when control input is written.

• sc_core::sc_event m_next_request
To notify script_thread to advance when operating "pin_level".

• sc_core::sc_event m_assert
To notify request_thread to assert the request.

• sc_core::sc_event m_deassert
To notify request_thread to deassert the request.

• xtsc::u64 m_assert_delta_cycle
Handle thread scheduling indeterminacy at time 0.

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

• xtsc::xtsc_signal_sc_bv_base_floating m_push_floating
• xtsc::xtsc_signal_sc_bv_base_floating m_data_floating
• xtsc::xtsc_signal_sc_bv_base_floating m_full_floating

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7.113.1 Detailed Description

A scripted producer to supply a queue. This XTSC module implements a queue producer
that reads an input file ("script_file") to determine when and what data values to send to a
queue module.
This module provides a simple means to deliver test transactions to a queue at the TLM-
level (such as xtsc_queue) or at the pin-level (such as xtsc_queue_pin). To use pin-level
queue connections, you must set the "pin_level" parameter to true.
To provide a degree of feedback or control of the script, the "control" option can be set
to true and a wire writer such as xtsc::xtsc_core, xtsc_mmio, or xtsc_wire_logic can be
connected to the control input. This allows the xtsc_queue_producer device to better
model certain SoC components. To perform port binding of the control input, use the
get_control_input() method to obtain a reference to the sc_export<xtsc_wire_write_if> or
use the xtsc::xtsc_connect() method.
Here is a block diagram of an xtsc_queue_producer as it is used in the queue consumer
example:

queue.m_producer queue.m_consumer

nb_push() nb_pop()
xtsc_queue_producer xtsc_core core0
xtsc_queue queue
producer (consumer.out)
producer.vec

producer.m_queue core0.get_input_queue("INQ2")

Figure 7.18: xtsc_queue_consumer Example

See also:
xtsc_queue_producer_parms
xtsc::xtsc_queue_push_if
xtsc::xtsc_connect()
xtsc::xtsc_core::How_to_do_port_binding

Definition at line 286 of file xtsc_queue_producer.h.

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7.113.2 Constructor & Destructor Documentation

7.113.2.1 xtsc_queue_producer (sc_core::sc_module_name module_name, const

xtsc_queue_producer_parms & producer_parms)

Constructor for an xtsc_queue_producer.

Parameters:
module_name Name of the xtsc_queue_producer sc_module.
producer_parms The remaining parameters for construction.

See also:
xtsc_queue_producer_parms

7.113.3 Member Function Documentation

7.113.3.1 sc_core::sc_export<xtsc::xtsc_wire_write_if>& get_control_input ()

const

Return the sc_export of the optional control input. This method may be used for port binding
of the optional control input.
For example, to bind the TIE export state named "onebit" of an xtsc_core named core0 to
the control input of an xtsc_queue_producer named producer:

core0.get_export_state("onebit")(producer.get_control_input());

7.113.3.2 virtual void execute (const std::string & cmd_line, const std::vector<
std::string > & words, const std::vector< std::string > & words_lc,
std::ostream & result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:

can_push
Return !full ("pin_level" true) or nb_can_push() ("pin_level" false).

get_push_ticket
Return the ticket of most recent previous element pushed.
TLM only ("pin_level" false).

push <Value>
Return nb_push(<Value>).

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TLM only ("pin_level" false).

reset
Call xtsc_queue_producer::reset().

Implements xtsc_command_handler_interface.

7.113.3.3 void connect (xtsc::xtsc_tx_loader & loader)

Connect to a downstream xtsc_tx_loader. This method connects the m_queue sc_port of

this xtsc_queue_producer to the m_producer sc_export of an xtsc_tx_loader.

Parameters:
loader The xtsc_tx_loader to connect to.

7.113.3.4 void connect (xtsc_wire_logic & logic, const char ∗ output_name)

Connect an xtsc_wire_logic output to the control input of this xtsc_queue_producer. This

method connects the specified output of the specified xtsc_wire_logic to the optional control
input of this xtsc_queue_producer. This method should not be used unless the "control"
parameter was set to true.

Parameters:
logic The xtsc_wire_logic to connect to the control input of this xtsc_queue_producer.
output_name The output of the xtsc_wire_logic.

7.113.3.5 void connect (xtsc_mmio & mmio, const char ∗ output_name)

Connect an xtsc_mmio output to the control input of this xtsc_queue_producer. This

method connects the specified output of the specified xtsc_mmio to the optional control
input of this xtsc_queue_producer. This method should not be used unless the "control"
parameter was set to true.

Parameters:
mmio The xtsc_mmio to connect to the control input of this xtsc_queue_producer.
output_name The output of the xtsc_mmio.

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7.113.3.6 bool nb_can_push () [inline, protected, virtual]

This method is used to determine if the queue can accept another element.

Returns:
true if the queue can accept another element, returns false if the queue is full.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implements xtsc_queue_push_if.
Definition at line 546 of file xtsc_queue_producer.h.

7.113.3.7 bool nb_push (const sc_dt::sc_unsigned & element, xtsc::u64 & ticket)
[inline, protected, virtual]

This method is used add an element to the queue.

Parameters:
element The sc_unsigned object to be pushed onto the queue.
ticket An optional reference to a u64 object in which to return a ticket number asso-
ciated with this queue element. If a component which implements this interface
choses to support the ticket concept, it should create and return a unique ticket
number for each element pushed into the component (see xtsc_create_queue_-
ticket()). The unique ticket number should be maintained with the element and
returned in nb_pop when the element is popped from the component. It is rec-
ommended that a component that implements both the xtsc_queue_push_if and
xtsc_queue_pop_if interfaces support this ticket concept. For some devices (e.g.
ones that implement just one of the two interfaces), the ticket concept may not be
meaningful and they should just return a constant ticket value (e.g. 0). Typically,
queue clients (such as xtsc_core) use this ticket for non-hardware purposes such
as logging, profiling, and debugging. Clients are free to ignore the ticket.

Returns:
false if the element cannot be added because the queue is full, otherwise returns true.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).

See also:
xtsc_create_queue_ticket

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Implements xtsc_queue_push_if.
Definition at line 547 of file xtsc_queue_producer.h.

7.113.3.8 xtsc::u32 nb_get_bit_width () [inline, protected, virtual]

Get the element width in bits that the queue implementation will hold. This method allows
the queue producer to confirm that the implementation will hold elements of a certain bit
width.
This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implements xtsc_queue_push_if.
Definition at line 548 of file xtsc_queue_producer.h.
The documentation for this class was generated from the following file:

• xtsc_queue_producer.h

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7.114 xtsc_queue_producer_parms Class Reference

Constructor parameters for a xtsc_queue_producer object.

#include <xtsc/xtsc_queue_producer.h>Inheritance diagram for xtsc_queue_-
producer_parms:

xtsc_parms

xtsc_queue_producer_parms

Collaboration diagram for xtsc_queue_producer_parms:

xtsc_parms

xtsc_queue_producer_parms

Public Member Functions

• xtsc_queue_producer_parms (const char ∗script_file=0, xtsc::u32 width1=32)

Constructor for an xtsc_queue_producer_parms object.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

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7.114.1 Detailed Description

Constructor parameters for a xtsc_queue_producer object. This class contains the con-
structor parameters for a xtsc_queue_producer object.

Name Type Description

------------------ ---- --------------------------------------------------------

"control" bool If true, then a 1-bit TLM control input will be created
and the "WAIT CONTROL" commands will be enabled in the
script file (see "script_file"). The control input can
be used to control the xtsc_queue_producer device with
another device.
Default = false.
Note: The control input is a TLM interface regardless of
the "pin_level" setting.

"pin_level" bool If true, pin-level queue connections are used.

Default = false (TLM connections are used).

"vcd_handle" void* Pointer to SystemC VCD object (sc_trace_file *) or 0 if

tracing is not desired. This parameter is ignored if
"pin_level" is false.
Default = 0 (NULL).

"script_file" char* The file to read the test vector commands from. Each
command occupies one line in the file. Valid command
formats are shown below (the first format shows a queue
push transaction command):

<value>
<delay> <value> [<timeout>]
<delay> STOP
WAIT <duration>
WAIT CONTROL WRITE|CHANGE|<value> { <count> }
SYNC <time>
TEST_FULL
NOTE message
INFO message

1. Integers can appear in decimal or hexadecimal (using

'0x' prefix) format.
2. <delay> specifies how long to wait after completing
the previous command before attempting to push a
value into the queue or stopping the simulation.
<delay> can be 0 (to mean 1 delta cycle), or "now"
to mean no delta cycle delay, or a positive integer
or floating point number to mean that many clock
periods (see "clock_period").
Note: For pin-level connections, a push command
is considered to be complete when the push request
is deasserted. See parameter "deassert_delay".
3. <value> specifies the value to push into the queue.
It can be specified in hex or decimal format.
If <value> is specified by itself (that is, without
a <delay>), then a wait is performed to the clock

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phase specified by "request_phase" (if not already

there) and then the value is pushed until it is
accepted.
4. The optional <timeout> specifies how long to
continue attempting to push <value> into the queue.
For a TLM-level connection (e.g. to xtsc_queue),
<timeout> specifies a non-zero integer number of
clock periods and the push request is repeated each
clock period for <timeout> number of clock periods
or until the push request is granted. For a pin-
level connection (e.g. to xtsc_queue_pin),
<timeout> is multiplied by the module's clock
period (see "clock_period") to determine the
maximum amount of time the push request will be
asserted before being abandoned if it has not yet
been not granted. For a pin-level connection,
<timeout> can be an integer or a floating point
number. For either a TLM-level or a pin-level
connection, a negative or missing <timeout> value
means to keep trying the request until it is
granted.
5. The "<delay> STOP" command causes simulation to stop
via a call to the sc_stop() method after the
specified delay.
6. The "WAIT <duration>" command can be used to cause a
wait of the specified duration. <duration> can be 0
(to mean 1 delta cycle) or a positive integer or
floating point number to mean that many clock
periods.
7. If the "control" parameter was set to true then the
"WAIT CONTROL" command can be used to cause a wait
until the specified activity occurs on the control
input. WRITE means any write even if its the same
value, CHANGE means a write of a new value, and
<value> (which can only be 0 or 1) means a write of
the specified value. An optional <count> can be
specified to mean the event has to occur <count>
times. The default <count> is 1. The default event
is WRITE (so "wait control" is the same thing as
"wait control write 1").
8. The "SYNC <time>" command with <time> less than 1.0
can be used to cause a wait to the clock phase
(relative to posedge clock) specified by <time>.
Posedge clock is as specified by "posedge_offset".
For example, "sync 0.5" will cause the minimum wait
necessary to sync to negedge clock.
The "SYNC <time>" command with <time> greater than
or equal to 1.0 can be used to cause a wait until
the specified absolute simulation time.
9. The "TEST_FULL" command causes the nb_can_push()
method to be called (TLM-level) or the full signal
to be sampled (pin-level) and the result to be
logged.
10. The NOTE and INFO commands can be used to cause
the entire line to be logged at NOTE_LOG_LEVEL
or INFO_LOG_LEVEL, respectively.
11. Words are case insensitive.

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12. Comments, extra whitespace, blank lines, and lines

between "#if 0" and "#endif" are ignored.
See xtsc_script_file for a complete list of
pseudo-preprocessor commands.

"bit_width" u32 Width of each queue element in bits.

"clock_period" u32 This is the length of this module's clock period

expressed in terms of the SystemC time resolution
(from sc_get_time_resolution()). A value of
0xFFFFFFFF means to use the XTSC system clock
period (from xtsc_get_system_clock_period()).
Default = 0xFFFFFFFF (i.e. use the system clock
period).

"posedge_offset" u32 This specifies the time at which the first posedge of
this device's clock conceptually occurs. It is
expressed in units of the SystemC time resolution and
the value implied by it must be strictly less than the
value implied by the "clock_period" parameter. A value
of 0xFFFFFFFF means to use the same posedge offset as
the system clock (from
xtsc_get_system_clock_posedge_offset()).
Default = 0xFFFFFFFF.

"request_phase" u32 This specifies the phase (i.e. the point) in the clock
period at which the request occurs ("pin_level" false)
or starts ("pin_level" true) when using the plain
<value> line format. That is, this parameter only
applies to line formats of:
<value>
It does NOT apply to line formats of:
<delay> <value> [<timeout>]
It is expressed in terms of the SystemC time resolution
(from sc_get_time_resolution()) and must be strictly
less than the clock period as specified by the
"clock_period" parameter. A value of 0 means the
request occurs at posedge clock as specified by
"posedge_offset". A value of 0xFFFFFFFF means to use 0
if "pin_level" is false and to use Phase B if true (see
xtsc_core::set_clock_phase_delta_factors documentation).
Note: When "pin_level" is true it is recommended that
this value NOT be set to 0.
Default = 0xFFFFFFFF.

"sample_phase" u32 This specifies the phase (i.e. the point) in each clock
period at which the full signal is sampled. It is
expressed in terms of the SystemC time resolution (from
sc_get_time_resolution()) and must be strictly less
than the clock period as specified by the
"clock_period" parameter. A value of 0 means sampling
occurs at posedge clock as specified by "posedge_offset".
This parameter is for pin-level connection only.
Default = 0.

"deassert_delay" u32 During a push attempt, this specifies how long after
the full signal is sampled and found to be false, that

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Chapter 7. Class Documentation

the push signal should be deasserted. It is expressed

in terms of the SystemC time resolution (from
sc_get_time_resolution()) and must be strictly less
than the clock period as specified by the
"clock_period" parameter. A value of 0 means the push
signal will be deasserted 1 delta cycle after the full
signal is sampled and found to be false. This
parameter is for pin-level connection only.
Default = 0.

See also:
xtsc_queue_producer
xtsc::xtsc_parms
xtsc::xtsc_script_file

Definition at line 223 of file xtsc_queue_producer.h.

7.114.2 Constructor & Destructor Documentation

7.114.2.1 xtsc_queue_producer_parms (const char ∗ script_file = 0, xtsc::u32

width1 = 32) [inline]

Constructor for an xtsc_queue_producer_parms object.

Parameters:
script_file The file name to read the test vectors from.
width1 Width of each queue element in bits.

Definition at line 235 of file xtsc_queue_producer.h.

The documentation for this class was generated from the following file:

• xtsc_queue_producer.h

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7.115 xtsc_queue_push_if Class Reference

Interface for connecting between a producer and a queue.

#include <xtsc/xtsc_queue_push_if.h>Inheritance diagram for xtsc_queue_push_if:

xtsc_queue_push_if

xtsc_queue_push_if_impl xtsc_queue_push_if_multi_impl xtsc_queue_producer

Public Member Functions

• virtual bool nb_can_push ()=0

This method is used to determine if the queue can accept another element.

• virtual bool nb_push (const sc_dt::sc_unsigned &element, u64 &ticket=push_-

ticket)=0
This method is used add an element to the queue.

• virtual u32 nb_get_bit_width ()=0

Get the element width in bits that the queue implementation will hold.

• virtual const sc_core::sc_event & default_event () const

Return the no-longer-full event.

Static Protected Attributes

• static u64 push_ticket

7.115.1 Detailed Description

Interface for connecting between a producer and a queue. This interface along with the
xtsc_queue_pop_if is used for one way communication between a producer and a con-
sumer through a queue.

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A producer has an sc_port<xtsc_queue_push_if>, a consumer has an sc_port<xtsc_-

queue_pop_if>, and a queue typically has an sc_export<xtsc_queue_push_if> and an
sc_export<xtsc_queue_pop_if>.
Often the producer and the consumer are instances of xtsc_core.
Note: The methods of xtsc_queue_push_if are all non-blocking in the OSCI TLM sense.
That is, they must NEVER call wait() either directly or indirectly. The "nb_" method prefix
stands for Non-Blocking.

See also:
xtsc_queue_pop_if
xtsc_create_queue_ticket
xtsc_component::xtsc_queue
xtsc_core::How_to_do_port_binding

Definition at line 45 of file xtsc_queue_push_if.h.

7.115.2 Member Function Documentation

7.115.2.1 virtual bool nb_can_push () [pure virtual]

This method is used to determine if the queue can accept another element.

Returns:
true if the queue can accept another element, returns false if the queue is full.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implemented in xtsc_queue_push_if_impl, xtsc_queue_push_if_multi_impl, xtsc_queue_-
producer, and xtsc_queue_push_if_impl.

7.115.2.2 virtual bool nb_push (const sc_dt::sc_unsigned & element, u64 & ticket
= push_ticket) [pure virtual]

This method is used add an element to the queue.

Parameters:
element The sc_unsigned object to be pushed onto the queue.
ticket An optional reference to a u64 object in which to return a ticket number asso-
ciated with this queue element. If a component which implements this interface

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 Chapter 7. Class Documentation

choses to support the ticket concept, it should create and return a unique ticket
number for each element pushed into the component (see xtsc_create_queue_-
ticket()). The unique ticket number should be maintained with the element and
returned in nb_pop when the element is popped from the component. It is rec-
ommended that a component that implements both the xtsc_queue_push_if and
xtsc_queue_pop_if interfaces support this ticket concept. For some devices (e.g.
ones that implement just one of the two interfaces), the ticket concept may not be
meaningful and they should just return a constant ticket value (e.g. 0). Typically,
queue clients (such as xtsc_core) use this ticket for non-hardware purposes such
as logging, profiling, and debugging. Clients are free to ignore the ticket.

Returns:
false if the element cannot be added because the queue is full, otherwise returns true.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).

See also:
xtsc_create_queue_ticket

Implemented in xtsc_queue_push_if_impl, xtsc_queue_push_if_multi_impl, xtsc_queue_-

producer, and xtsc_queue_push_if_impl.

7.115.2.3 virtual u32 nb_get_bit_width () [pure virtual]

Get the element width in bits that the queue implementation will hold. This method allows
the queue producer to confirm that the implementation will hold elements of a certain bit
width.
This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implemented in xtsc_queue_push_if_impl, xtsc_queue_push_if_multi_impl, xtsc_queue_-
producer, and xtsc_queue_push_if_impl.

7.115.2.4 virtual const sc_core::sc_event& default_event () const [inline,

virtual]

Return the no-longer-full event. Clients can call this method to get a reference to an event
that will be notified whenever the queue transitions from full to not full.
Sub-classes must override this method and return their no-longer-full event.

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Reimplemented in xtsc_queue_push_if_impl, xtsc_queue_push_if_multi_impl, and xtsc_-

queue_push_if_impl.
Definition at line 120 of file xtsc_queue_push_if.h.
The documentation for this class was generated from the following file:

• xtsc_queue_push_if.h

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7.116 xtsc_queue_push_if_impl Class Reference

Implementation of xtsc_queue_push_if.
#include <xtsc/xtsc_tx_loader.h>Inheritance diagram for xtsc_queue_push_if_impl:

xtsc_queue_push_if

xtsc_queue_push_if_impl

Collaboration diagram for xtsc_queue_push_if_impl:

xtsc_connection_interface

xtsc_module

xtsc_resettable
m_incoming_tx_xfer
xtsc_tx_xfer m_outgoing_tx_xfer

xtsc_queue_pop_if
m_data_out_floating
m_pop_floating m_loader xtsc_queue_pop_if_impl
m_empty_floating
m_full_floating
m_queue_pop_impl
m_data_in_floating
m_push_floating
xtsc_signal_sc_bv_base xtsc_signal_sc_bv_base_floating xtsc_tx_loader
m_loader m_tx_xfer_impl

m_queue_push_impl m_loader
xtsc_queue_push_if xtsc_queue_push_if_impl xtsc_tx_xfer_if_impl

xtsc_tx_xfer_if

Public Member Functions

• xtsc_queue_push_if_impl (const char ∗object_name, xtsc_tx_loader &loader)

Constructor.

• bool nb_can_push ()
• bool nb_push (const sc_dt::sc_unsigned &element, u64 &ticket=push_ticket)
• u32 nb_get_bit_width ()
• virtual const sc_core::sc_event & default_event () const
Get the event that will be notified when the queue transitions from full to not full.

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Private Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

SystemC callback when something binds to us.

Private Attributes

• xtsc_tx_loader & m_loader

Our xtsc_tx_loader object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.116.1 Detailed Description

Implementation of xtsc_queue_push_if.
Definition at line 393 of file xtsc_tx_loader.h.

7.116.2 Member Function Documentation

7.116.2.1 bool nb_can_push () [virtual]

See also:
xtsc_queue_push_if

Implements xtsc_queue_push_if.

7.116.2.2 bool nb_push (const sc_dt::sc_unsigned & element, u64 & ticket =
push_ticket) [virtual]

See also:
xtsc_queue_push_if

Implements xtsc_queue_push_if.

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7.116.2.3 u32 nb_get_bit_width () [inline, virtual]

See also:
xtsc_queue_push_if

Implements xtsc_queue_push_if.
Definition at line 410 of file xtsc_tx_loader.h.
The documentation for this class was generated from the following file:

• xtsc_tx_loader.h

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7.117 xtsc_queue_push_if_impl Class Reference

Implementation of xtsc_queue_push_if for single producer. Inheritance diagram for xtsc_-

queue_push_if_impl:

xtsc_queue_push_if

xtsc_queue_push_if_impl

Collaboration diagram for xtsc_queue_push_if_impl:

m_queue
xtsc_queue_push_if_multi_impl
xtsc_command_handler_interface
m_push_multi_impl
xtsc_queue_push_if
xtsc_script_file
m_pop_file

m_push_impl xtsc_queue m_queue

xtsc_queue_push_if_impl
m_pop_impl
xtsc_queue_pop_if_impl
m_queue
xtsc_connection_interface m_pop_multi_impl

xtsc_module
xtsc_resettable
m_queue
xtsc_queue_pop_if_multi_impl

xtsc_queue_pop_if

Public Member Functions

• xtsc_queue_push_if_impl (const char ∗object_name, xtsc_queue &queue)

Constructor.

• bool nb_can_push ()
• bool nb_push (const sc_dt::sc_unsigned &element, xtsc::u64 &ticket=push_ticket)
• xtsc::u32 nb_get_bit_width ()
• virtual const sc_core::sc_event & default_event () const
Get the event that will be notified when the queue transitions from full to not full.

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Private Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

SystemC callback when something binds to us.

Private Attributes

• xtsc_queue & m_queue

Our xtsc_queue object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.117.1 Detailed Description

Implementation of xtsc_queue_push_if for single producer.

Definition at line 652 of file xtsc_queue.h.

7.117.2 Member Function Documentation

7.117.2.1 bool nb_can_push () [virtual]

See also:
xtsc::xtsc_queue_push_if

Implements xtsc_queue_push_if.

7.117.2.2 bool nb_push (const sc_dt::sc_unsigned & element, xtsc::u64 & ticket =
push_ticket) [virtual]

See also:
xtsc::xtsc_queue_push_if

Implements xtsc_queue_push_if.

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7.117.2.3 xtsc::u32 nb_get_bit_width () [inline, virtual]

See also:
xtsc::xtsc_queue_push_if

Implements xtsc_queue_push_if.
Definition at line 669 of file xtsc_queue.h.
The documentation for this class was generated from the following file:

• xtsc_queue.h

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7.118 xtsc_queue_push_if_multi_impl Class Reference

Implementation of xtsc_queue_push_if for multi-client queue (either m_num_producers or

m_num_consumers > 1). Inheritance diagram for xtsc_queue_push_if_multi_impl:

xtsc_queue_push_if

xtsc_queue_push_if_multi_impl

Collaboration diagram for xtsc_queue_push_if_multi_impl:

m_queue
xtsc_queue_push_if_impl
xtsc_command_handler_interface
m_push_impl
xtsc_queue_push_if
xtsc_script_file m_pop_file

m_push_multi_impl xtsc_queue m_queue

xtsc_queue_push_if_multi_impl
m_pop_impl
xtsc_queue_pop_if_impl
m_queue
xtsc_connection_interface m_pop_multi_impl

xtsc_module
xtsc_resettable
m_queue
xtsc_queue_pop_if_multi_impl

xtsc_queue_pop_if

Public Member Functions

• xtsc_queue_push_if_multi_impl (const char ∗object_name, xtsc_queue &queue,

xtsc::u32 port_num)
Constructor.

• bool nb_can_push ()
• bool nb_push (const sc_dt::sc_unsigned &element, xtsc::u64 &ticket=push_ticket)
• xtsc::u32 nb_get_bit_width ()
• virtual const sc_core::sc_event & default_event () const
Get the event that will be notified when the queue transitions from full to not full.

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Private Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

SystemC callback when something binds to us.

Private Attributes

• xtsc_queue & m_queue

Our xtsc_queue object.

• xtsc::u32 m_port_num
Our producer port number.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.118.1 Detailed Description

Implementation of xtsc_queue_push_if for multi-client queue (either m_num_producers or

m_num_consumers > 1).
Definition at line 725 of file xtsc_queue.h.

7.118.2 Member Function Documentation

7.118.2.1 bool nb_can_push () [virtual]

See also:
xtsc::xtsc_queue_push_if

Implements xtsc_queue_push_if.

7.118.2.2 bool nb_push (const sc_dt::sc_unsigned & element, xtsc::u64 & ticket =
push_ticket) [virtual]

See also:
xtsc::xtsc_queue_push_if

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Implements xtsc_queue_push_if.

7.118.2.3 xtsc::u32 nb_get_bit_width () [inline, virtual]

See also:
xtsc::xtsc_queue_push_if

Implements xtsc_queue_push_if.
Definition at line 743 of file xtsc_queue.h.
The documentation for this class was generated from the following file:

• xtsc_queue.h

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Chapter 7. Class Documentation

7.119 xtsc_ram_respond_if_impl Class Reference

Implementation of xtsc_respond_if for local RAM port.

#include <xtsc/xtsc_udma.h>Inheritance diagram for xtsc_ram_respond_if_impl:

xtsc_respond_if

xtsc_ram_respond_if_impl

Collaboration diagram for xtsc_ram_respond_if_impl:

m_udma
xtsc_respond_if xtsc_pif_respond_if_impl
xtsc_mode_switch_if

m_pif_respond_impl
xtsc_command_handler_interface

m_ram_respond_impl m_udma
xtsc_ram_respond_if_impl
m_udma m_rer_lookup_impl
xtsc_udma xtsc_rer_lookup_if_impl
m_descriptor m_udma
udma_descriptor
m_udma_parms

m_wer_lookup_impl
xtsc_parms xtsc_udma_parms

xtsc_lookup_if xtsc_wer_lookup_if_impl
xtsc_resettable xtsc_module
m_pif_response
m_ram_response

xtsc_connection_interface

xtsc_response m_p_response
stream_dumper
m_stream_dumper

Public Member Functions

• xtsc_ram_respond_if_impl (const char ∗object_name, xtsc_udma &udma)

Constructor.

• bool nb_respond (const xtsc::xtsc_response &response)

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Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to us.

Protected Attributes
• xtsc_udma & m_udma
Our xtsc_udma object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.119.1 Detailed Description

Implementation of xtsc_respond_if for local RAM port.

Definition at line 645 of file xtsc_udma.h.

7.119.2 Member Function Documentation

7.119.2.1 bool nb_respond (const xtsc::xtsc_response & response) [virtual]

See also:
xtsc::xtsc_respond_if

Implements xtsc_respond_if.
The documentation for this class was generated from the following file:

• xtsc_udma.h

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Chapter 7. Class Documentation

7.120 xtsc_request Class Reference

Class representing a PIF, XLMI, local memory, snoop, or inbound PIF request transfer.
#include <xtsc/xtsc_request.h>Collaboration diagram for xtsc_request:

xtsc_request

m_p_request m_stream_dumper

stream_dumper

Classes

• class stream_dumper
Helper class to make it easy to dump xtsc_request to an ostream with or without data
values.

Public Types

• enum type_t {
READ = 0x00,
BLOCK_READ = 0x10,
BURST_READ = 0x30,
RCW = 0x50,
WRITE = 0x80,
BLOCK_WRITE = 0x90,
BURST_WRITE = 0xB0,
SNOOP = 0x60 }
Enumeration used to identify the request type.

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 Chapter 7. Class Documentation

• enum coherence_t {
NONCOHERENT = 0,
SHARED = 1,
EXCLUSIVE = 2,
INVALIDATE = 3,
LAST = INVALIDATE }
Enumeration used to identify cache coherence information.

• typedef enum xtsc::xtsc_request::type_t type_t

Enumeration used to identify the request type.

• typedef enum xtsc::xtsc_request::coherence_t coherence_t

Enumeration used to identify cache coherence information.

Public Member Functions

• xtsc_request ()
Constructor for an empty xtsc_request object used to create a pool of pre-allocated xtsc_-
request objects.

• xtsc_request (type_t type, xtsc_address address8, u32 size8, u64 tag=0, u32 num_-
transfers=1, xtsc_byte_enables byte_enables=0xFFFF, bool last_transfer=true, u32
route_id=0, u8 id=0, u8 priority=2, xtsc_address pc=0xFFFFFFFF)
Constructor for most kinds of xtsc_request objects.

• xtsc_request (u64 tag, xtsc_address address8, u32 size8, u32 num_transfers,

bool last_transfer, u32 route_id=0, u8 id=0, u8 priority=2, xtsc_address
pc=0xFFFFFFFF)
Constructor for second through last request of a BLOCK_WRITE.

• xtsc_request (u64 tag, xtsc_address address8, u32 route_id=0, u8 id=0, u8 prior-

ity=2, xtsc_address pc=0xFFFFFFFF)
Constructor for the second (last) request transfer of a RCW sequence.

• xtsc_request (xtsc_address hw_address8, u64 tag, xtsc_address address8,

u32 size8, u32 num_transfers, u32 transfer_num, xtsc_byte_enables byte_-
enables=0xFFFF, u32 route_id=0, u8 id=0, u8 priority=2, xtsc_address
pc=0xFFFFFFFF)
Constructor for second through last request of a BURST_WRITE.

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• xtsc_request (const xtsc_request &request)

Copy Constructor.

• xtsc_request & operator= (const xtsc_request &request)

Copy assignment.

• ∼xtsc_request ()
Destructor.

• void initialize (type_t type, xtsc_address address8, u32 size8, u64 tag=0, u32 num_-
transfers=1, xtsc_byte_enables byte_enables=0xFFFF, bool last_transfer=true, u32
route_id=0, u8 id=0, u8 priority=2, xtsc_address pc=0xFFFFFFFF)
Initializer for most kinds of xtsc_request objects.

• void initialize (u64 tag, xtsc_address address8, u32 size8, u32 num_transfers,
bool last_transfer, u32 route_id=0, u8 id=0, u8 priority=2, xtsc_address
pc=0xFFFFFFFF)
Initializer for second through last request of a BLOCK_WRITE.

• void initialize (u64 tag, xtsc_address address8, u32 route_id=0, u8 id=0, u8 prior-
ity=2, xtsc_address pc=0xFFFFFFFF)
Initializer for the second (last) request transfer of a RCW sequence.

• void initialize (xtsc_address hw_address8, u64 tag, xtsc_address address8,

u32 size8, u32 num_transfers, u32 transfer_num, xtsc_byte_enables byte_-
enables=0xFFFF, u32 route_id=0, u8 id=0, u8 priority=2, xtsc_address
pc=0xFFFFFFFF)
Initializer for second through last request of a BURST_WRITE.

• void set_byte_address (xtsc_address address8)

Set the byte address.

• xtsc_address get_byte_address () const

Get the byte address.

• xtsc_address get_hardware_address () const

Get the byte address corresponding to the PIF hardware address signals.

• void adjust_block_write (xtsc_address hw_address8, u32 transfer_num)

Override the computed hardware address and transfer number for a BLOCK_WRITE re-
quest.

• void set_byte_size (u32 size8)

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Set the size in bytes of each transfer.

• u32 get_byte_size () const

Get the size in bytes of each transfer.

• void set_pif_attribute (u32 pif_attribute)

Set the PIF request attributes of each transfer.

• u32 get_pif_attribute () const

Get the PIF request attributes of each transfer.

• void set_pif_req_domain (u8 pif_req_domain)

Set the PIF request domain bits of each transfer.

• u8 get_pif_req_domain () const
Get the PIF request domain bits of each transfer.

• void set_dram_attribute (const sc_dt::sc_unsigned &dram_attribute)

Set the DRAM read/write attibutes of this request.

• void get_dram_attribute (sc_dt::sc_unsigned &dram_attribute) const

Get the DRAM read/write attributes of this request.

• bool has_dram_attribute () const

Return whether or not this request has DRAM read/write attributes.

• void set_route_id (u32 route_id)

Set the route ID.

• u32 get_route_id () const

Get the route ID.

• void set_type (type_t type)

Set the request type.

• type_t get_type () const

Get the request type.

• const char ∗ get_type_name () const

Get a c-string corresponding to this request’s type.

• void set_num_transfers (u32 num_transfers)

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Set the number of transfers.

• u32 get_num_transfers () const

Get the number of transfers.

• u32 get_transfer_number () const

Get which request transfer this is in a sequence of request transfers.

• void set_byte_enables (xtsc_byte_enables byte_enables)

Set the byte enables.

• xtsc_byte_enables get_byte_enables () const

Get the byte enables.

• void set_id (u8 id)

Set the PIF ID.

• u8 get_id () const
Get the PIF ID.

• void set_priority (u8 priority)

Set the transaction priority.

• u8 get_priority () const
Get the transaction priority.

• void set_last_transfer (bool last_transfer)

Set whether or not this is the last transfer of the request.

• bool get_last_transfer () const

Get whether or not this is the last transfer of the request.

• void set_instruction_fetch (bool instruction_fetch)

Set whether or not this is request is for an instruction fetch.

• bool get_instruction_fetch () const

Get whether or not this is request is for an instruction fetch.

• void set_xfer_en (bool xfer_en)

Set whether or not this is request is from the Xtensa top XFER control block.

• bool get_xfer_en () const

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Get whether or not this is request is from the Xtensa top XFER control block.

• void set_coherence (coherence_t coherence)

Set the cache coherence information of this request.

• coherence_t get_coherence () const

Get the cache coherence information of this request.

• void set_snoop_virtual_address (xtsc_address snoop_virtual_address)

Set the virtual address for coherent/snoop requests.

• xtsc_address get_snoop_virtual_address () const

Get the virtual address associated with this request (for coherent/snoop requests).

• void set_pc (xtsc_address pc)

Set the processor program counter (PC) associated with this request.

• xtsc_address get_pc () const

Get the processor program counter (PC) associated with this request.

• void set_buffer (u32 size8, const u8 ∗buffer)

Set the request’s transfer buffer (data payload).

• const u8 ∗ get_buffer () const

Get a pointer to the request’s transfer data suitable only for reading the data.

• u8 ∗ get_buffer ()
Get a pointer to the request’s transfer data suitable either for reading or writing the data.

• void set_user_data (void ∗user_data)

Set optional user data associated with this request.

• void ∗ get_user_data () const

Get the optional user data associated with this request.

• std::string get_user_data_for_logging (xtsc::u32 num_bytes, const std::string &pre-

fix=" {", const std::string &suffix="}") const
Return a string suitable for logging containing bytes from the optional user data associated
with this request.

• void set_exclusive (bool exclusive)

Set whether or not this request if for exclusive access.

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• bool get_exclusive () const

Get whether or not this request if for exclusive access.

• u64 get_tag () const

Get this request’s tag.

• void dump (std::ostream &os=std::cout, bool dump_data=true) const

This method dumps this request’s info to the specified ostream object, optionally including
data (if applicable).

• const stream_dumper & show_data (bool show) const

This method makes it easy to dump an xtsc_request to an ostream while programatically
determining whether or not to include the payload data (if any).

Static Public Member Functions

• static const char ∗ get_type_name (type_t type)

Get a c-string corresponding to the specified request type.

• static type_t get_type (const std::string &name)

Get the xtsc_request::type_t from a string name.

Private Member Functions

• void zeroize ()
• sc_dt::sc_unsigned ∗ new_sc_unsigned ()
Get a new sc_unsigned (from the pool).

• void delete_sc_unsigned (sc_dt::sc_unsigned ∗&p_sc_unsigned)

Delete an sc_unsigned (return it to the pool).

Private Attributes

• xtsc_address m_address8
Byte address.

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• u8 m_buffer [xtsc_max_bus_width8]
Data for RCW, WRITE, and BLOCK_WRITE.

• u32 m_size8
Byte size of each transfer.

• u32 m_pif_attribute
PIF request attributes (12 bits). 0xFFFFFFFF => not set.

• sc_dt::sc_unsigned ∗ m_dram_attribute
DRAM write attributes (160 bits). NULL => not set.

• u32 m_route_id
Route ID for arbiters.

• type_t m_type
Request type (READ, BLOCK_READ, etc).

• u32 m_num_transfers
Number of transfers.

• xtsc_byte_enables m_byte_enables
Byte enables.

• u8 m_id
PIF ID.

• u8 m_priority
Transaction priority.

• u8 m_pif_req_domain
PIF request domain (2 bits). 0xFF => not set.

• bool m_last_transfer
True if last transfer of request.

• bool m_instruction_fetch
True if request is for an instruction fetch, otherwise false.

• bool m_xfer_en
True if request is from Xtensa top XFER control block.

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• coherence_t m_coherence
Cache Coherence information.

• xtsc_address m_snoop_virtual_address
Virtual address for snoop controller [Reserved for future use].

• xtsc_address m_pc
Program counter associated with request (artificial).

• xtsc_address m_hw_address8
Address that would appear in hardware. BURST_WRITE only.

• u32 m_transfer_num
Number of this transfer. BURST_WRITE only. (artificial).

• void ∗ m_user_data
Arbitrary data supplied by user.

• bool m_adjust_block_write
True if adjust_block_write() has been called.

• bool m_exclusive
True if request is for exclusive access.

• u64 m_tag
Unique tag per request-response set (artificial).

Static Private Attributes

• static stream_dumper m_stream_dumper
To assist with printing (dumping).

• static std::vector< sc_dt::sc_unsigned ∗ > m_sc_unsigned_pool

Pool of sc_unsigned (160 bits).

7.120.1 Detailed Description

Class representing a PIF, XLMI, local memory, snoop, or inbound PIF request transfer. The
general 2-step procedure to create a request is:

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1. Construct the xtsc_request object using the appropriate xtsc_request constructor for
the type of request you want to create (see type_t). These xtsc_request constructors
all have parameters.

2. Use the set_buffer() or get_buffer() methods to fill in the data payload. This step is
only needed for RCW, WRITE, BLOCK_WRITE, and BURST_WRITE request types.

If you wish to preconstruct an empty xtsc_request object before you know the request type
(for example to create a pool of xtsc_request objects to improve performance), use the
xtsc_request constructor that takes no parameters. When you are ready to use the xtsc_-
request object:

1. Call the the appropriate xtsc_request initialize() method for the type of request you
want to create (see type_t).

2. Use the set_buffer() or get_buffer() methods to fill in the data payload. This step is
only needed for RCW, WRITE, BLOCK_WRITE, and BURST_WRITE request types.

If desired, the above two procedures can be mixed. For example, create an RCW xtsc_-
request using the main xtsc_request constructor and then, when the time comes to create
the second RCW request, call the special initialize() method meant for the second RCW
request. This same technique can be used for BLOCK_WRITE and BURST_WRITE trans-
actions.
For protocol and timing information specific to xtsc_core, see xtsc_core::Information_on_-
memory_interface_protocols.
Note: SNOOP and coherence_t are reserved for future use.

See also:
xtsc_request_if
xtsc_respond_if
xtsc_response
xtsc_core::Information_on_memory_interface_protocols.
xtsc_component::xtsc_arbiter
xtsc_component::xtsc_dma_engine
xtsc_component::xtsc_master
xtsc_component::xtsc_mmio
xtsc_component::xtsc_memory
xtsc_component::xtsc_router
xtsc_component::xtsc_slave

Definition at line 63 of file xtsc_request.h.

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7.120.2 Member Typedef Documentation

7.120.2.1 typedef enum xtsc::xtsc_request::coherence_t coherence_t

Enumeration used to identify cache coherence information. Note: Reserved for future use

7.120.3 Member Enumeration Documentation

7.120.3.1 enum type_t

Enumeration used to identify the request type.

Enumerator:
READ Single read.
BLOCK_READ Block read (num_transfers = 2|4|8|16).
BURST_READ Burst read (num_transfers between 2 and 16, inclusive).
RCW Read-conditional-write.
WRITE Write.
BLOCK_WRITE Block write (num_transfers = 2|4|8|16).
BURST_WRITE Burst write (num_transfers between 2 and 16, inclusive).
SNOOP Snoop request to an Xtensa config supporting data cache coherence
[SNOOP is reserved for future use].

Definition at line 71 of file xtsc_request.h.

7.120.3.2 enum coherence_t

Enumeration used to identify cache coherence information. Note: Reserved for future
use

Enumerator:
NONCOHERENT Non-coherent request.
SHARED BLOCK_READ request for shared or SNOOP request for shared.
EXCLUSIVE BLOCK_READ request for exclusive or SNOOP request for exclusive.
INVALIDATE SNOOP request for invalidate.

Definition at line 89 of file xtsc_request.h.

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7.120.4 Constructor & Destructor Documentation

7.120.4.1 xtsc_request ()

Constructor for an empty xtsc_request object used to create a pool of pre-allocated xtsc_-
request objects. Before using an xtsc_request object that was created with this constructor,
either assign another xtsc_request object to it or call one of the initialize() methods on it.

7.120.4.2 xtsc_request (type_t type, xtsc_address address8, u32 size8, u64 tag =
0, u32 num_transfers = 1, xtsc_byte_enables byte_enables = 0xFFFF,
bool last_transfer = true, u32 route_id = 0, u8 id = 0, u8 priority = 2,
xtsc_address pc = 0xFFFFFFFF)

Constructor for most kinds of xtsc_request objects. This constructor is used to create the
following kinds of xtsc_request objects:

• READ
• BLOCK_READ
• BURST_READ
• RCW (first transfer only)
• WRITE
• BLOCK_WRITE (first transfer only)
• BURST_WRITE (first transfer only)
• SNOOP (reserved for future use)

Parameters:
type Type of request. See xtsc_request::type_t.
address8 Byte address of request. See set_byte_address().
size8 Size in bytes of each transfer. See set_byte_size().
tag The tag if it has already been assigned by the Xtensa ISS. If not, pass in 0 (the
default) and a new non-zero tag will be assigned (and can be obtained by calling
the get_tag() method).
num_transfers See set_num_transfers().
byte_enables See set_byte_enables(). If type is BLOCK_WRITE, BLOCK_READ, or
BURST_READ then this parameter is ignored and the byte enables are all set for
a bus width corresponding to size8. If a different set of byte enables is desired for
BLOCK_WRITE, then call set_byte_enables() after calling this constructor or the
corresponding initialize() method.

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last_transfer See set_last_transfer().

route_id The route ID. See set_route_id().
id The PIF ID. See set_id().
priority The transaction priority. See set_priority().
pc The associated processor program counter. See set_pc().

7.120.4.3 xtsc_request (u64 tag, xtsc_address address8, u32 size8, u32

num_transfers, bool last_transfer, u32 route_id = 0, u8 id = 0, u8
priority = 2, xtsc_address pc = 0xFFFFFFFF)

Constructor for second through last request of a BLOCK_WRITE.

Parameters:
tag The tag from the first request of the BLOCK_WRITE sequence.
address8 Byte address of request. This should increment by size8 (bus width) for
each request of the BLOCK_WRITE sequence.
size8 Size in bytes of each transfer. For BLOCK_WRITE, this is always equal to the
bus width.
num_transfers The total number of BLOCK_WRITE request transfers. This should
be the same number as in the first request of the BLOCK_WRITE sequence.
last_transfer True if this is the last request of the BLOCK_WRITE sequence.
route_id The route ID. See set_route_id().
id The PIF ID. See set_id().
priority The transaction priority. See set_priority().
pc The associated processor program counter. See set_pc().

Note: This constructor sets the the byte enables for all bytes of the bus (based on size8). If
you want byte enables other then this, call set_byte_enables() after calling this constructor.

7.120.4.4 xtsc_request (u64 tag, xtsc_address address8, u32 route_id = 0, u8 id =

0, u8 priority = 2, xtsc_address pc = 0xFFFFFFFF)

Constructor for the second (last) request transfer of a RCW sequence.

Parameters:
tag The tag from the first request of the RCW sequence.

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address8 Byte address of request. This should be the same as the address of the
first RCW request transfer.
route_id The route ID. See set_route_id().
id The PIF ID. See set_id().
priority The transaction priority. See set_priority().
pc The associated processor program counter. See set_pc().

Note: This constructor sets the byte size to 4 and the byte enables to 0xF. If you want
an RCW request with a byte size other then 4, then call set_byte_size() after calling this
constructor. If you want byte enables other then 0xF, call set_byte_enables() after calling
this constructor.
Note: If you use literals or non-byte integers for both id and priority, then at least one of
them will need to be cast to a u8 to disambiguate this constructor from the BLOCK_WRITE
constructor. For example:
xtsc_request rcw2(tag, address8, 0, 0, (u8) 0, pc);

7.120.4.5 xtsc_request (xtsc_address hw_address8, u64 tag, xtsc_address

address8, u32 size8, u32 num_transfers, u32 transfer_num,
xtsc_byte_enables byte_enables = 0xFFFF, u32 route_id = 0, u8 id = 0,
u8 priority = 2, xtsc_address pc = 0xFFFFFFFF)

Constructor for second through last request of a BURST_WRITE.

Parameters:
hw_address8 This should be equal to the lowest byte address enabled by a byte
enable in the first request of the sequence. See get_hardware_address().
tag The tag from the first request of the BURST_WRITE sequence.
address8 Byte address of request. This starts out bus-width- aligned and should
increment by the bus width for each request of the BURST_WRITE sequence.
size8 Size in bytes of each transfer. This should be equal to the bus width. See
set_byte_size().
num_transfers The total number of BURST_WRITE request transfers. This should
be the same number as in the first request of the BURST_WRITE sequence.
transfer_num The sequential number of this transfer (valid values are 2 through
num_transfers).
byte_enables The bytes to be written. See set_byte_enables().
route_id The route ID. See set_route_id().
id The PIF ID. See set_id().
priority The transaction priority. See set_priority().
pc The associated processor program counter. See set_pc().

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7.120.5 Member Function Documentation

7.120.5.1 void initialize (type_t type, xtsc_address address8, u32 size8, u64 tag =
0, u32 num_transfers = 1, xtsc_byte_enables byte_enables = 0xFFFF,
bool last_transfer = true, u32 route_id = 0, u8 id = 0, u8 priority = 2,
xtsc_address pc = 0xFFFFFFFF)

Initializer for most kinds of xtsc_request objects. This method is used to initialize the fol-
lowing kinds of xtsc_request objects:

• READ

• BLOCK_READ

• BURST_READ

• RCW (first transfer only)

• WRITE

• BLOCK_WRITE (first transfer only)

• BURST_WRITE (first transfer only)

• SNOOP (reserved for future use)

See the documentation for the corresponding constructor.

7.120.5.2 void initialize (u64 tag, xtsc_address address8, u32 size8, u32
num_transfers, bool last_transfer, u32 route_id = 0, u8 id = 0, u8
priority = 2, xtsc_address pc = 0xFFFFFFFF)

Initializer for second through last request of a BLOCK_WRITE. See the documentation for
the corresponding constructor.

7.120.5.3 void initialize (u64 tag, xtsc_address address8, u32 route_id = 0, u8 id =

0, u8 priority = 2, xtsc_address pc = 0xFFFFFFFF)

Initializer for the second (last) request transfer of a RCW sequence. See the documentation
for the corresponding constructor.

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7.120.5.4 void initialize (xtsc_address hw_address8, u64 tag, xtsc_address

address8, u32 size8, u32 num_transfers, u32 transfer_num,
xtsc_byte_enables byte_enables = 0xFFFF, u32 route_id = 0, u8 id = 0,
u8 priority = 2, xtsc_address pc = 0xFFFFFFFF)

Initializer for second through last request of a BURST_WRITE. See the documentation for
the corresponding constructor.

7.120.5.5 void set_byte_address (xtsc_address address8) [inline]

Set the byte address.

Parameters:
address8 Byte address of request. Should be size-aligned (that is, address8 modulo
m_size8 should be 0). For BLOCK_WRITE requests, address8 starts out aligned
to m_size8∗num_transfers and increases by bus width (m_size8) on each subse-
quent request transfer in the sequence. For BURST_WRITE requests, address8
should start out bus width (m_size8) aligned and should increase by the bus width
(m_size8) on each subsequent request transfer in the sequence. For BLOCK_-
READ, BURST_READ, and SNOOP requests, address8 should be aligned to the
bus width (m_size8); it does not have to be aligned to m_size8∗num_transfers (for
BLOCK_READ, this is to allow critical word first access to memory). address8 is
the same for both request transfers of an RCW sequence.

Note: For a PIF interface, the address in a BLOCK_WRITE xtsc_request differs from the
address in the PIF hardware specification. In XTSC, the address changes with each re-
quest of a BLOCK_WRITE sequence to reflect the target address for that transfer. In the
hardware specification, the address for each transfer is constant and reflects the starting
address of the block.
Note: For a PIF interface, the address in a BURST_WRITE xtsc_request differs from the
address in the PIF hardware specification. In XTSC, the address starts out aligned with the
bus width and increases by the bus width for each request of a BURST_WRITE sequence.
In the hardware specification, the address for all transfers in the sequence is constant and
equal to the lowest address enabled by a byte enable in the first transfer.
Note: The address corresponding to the hardware specification is available by calling the
get_hardware_address() method.
Note: Snoop is reserved for future use.
get_byte_address(). get_hardware_address().
Definition at line 395 of file xtsc_request.h.

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7.120.5.6 xtsc_address get_byte_address () const [inline]

Get the byte address.

See also:
set_byte_address

Definition at line 403 of file xtsc_request.h.

7.120.5.7 xtsc_address get_hardware_address () const

Get the byte address corresponding to the PIF hardware address signals. For all request
types except BLOCK_WRITE and BURST_WRITE, this method returns the same address
as the get_byte_address() method. For all BLOCK_WRITE requests in a sequence, this
method returns the address of the start of the block unless the adjust_block_write() method
has been called for the request. For the first BURST_WRITE request in a sequence, this
method returns the hardware address inferred by the starting address and the byte enables;
that is, the lowest byte address enabled by a byte enable. For all other BURST_WRITE re-
quests, this method returns the value set by the constructor or the initialize() method (which
is supposed to be the lowest byte address enabled in the first request of the sequence).
Note: For BLOCK_WRITE requests in normal operation, this method computes the return
value based on byte address (from get_byte_address) of the xtsc_request. If the adjust_-
block_write() method has been called for this request, then the value provide by that call is
returned instead.

See also:
adjust_block_write
get_byte_address

7.120.5.8 void adjust_block_write (xtsc_address hw_address8, u32 transfer_num)

Override the computed hardware address and transfer number for a BLOCK_WRITE re-
quest. In normal operations for BLOCK_WRITE requests, xtsc_request computes the hard-
ware address returned by the get_hardware_address() method and the transfer number
returned by the get_transfer_number() method. After constructing or initializing a BLOCK_-
WRITE xtsc_request, this method can be called to override the values normally returned
by the two get methods. This might be done, for example, to test how a model handles a
protocol violation.

See also:
get_hardware_address

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get_transfer_number

7.120.5.9 void set_byte_size (u32 size8) [inline]

Set the size in bytes of each transfer.

Parameters:
size8 Size in bytes of each transfer. For BLOCK_READ, BLOCK_WRITE, BURST_-
READ, BURST_WRITE, and SNOOP, this is always equal to the bus width. For
READ, WRITE, and RCW, size8 must be a power of 2 less than or equal to bus
width.

Note: Snoop is reserved for future use.

Definition at line 459 of file xtsc_request.h.

7.120.5.10 u32 get_byte_size () const [inline]

Get the size in bytes of each transfer.

See also:
set_byte_size()

Definition at line 467 of file xtsc_request.h.

7.120.5.11 void set_pif_attribute (u32 pif_attribute) [inline]

Set the PIF request attributes of each transfer.

Parameters:
pif_attribute PIF request attributes.

Definition at line 475 of file xtsc_request.h.

7.120.5.12 u32 get_pif_attribute () const [inline]

Get the PIF request attributes of each transfer.

See also:
set_pif_attribute()

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Definition at line 483 of file xtsc_request.h.

7.120.5.13 void set_pif_req_domain (u8 pif_req_domain) [inline]

Set the PIF request domain bits of each transfer.

Parameters:
pif_req_domain PIF request domain bits.

Definition at line 491 of file xtsc_request.h.

7.120.5.14 u8 get_pif_req_domain () const [inline]

Get the PIF request domain bits of each transfer.

See also:
set_pif_req_domain()

Definition at line 499 of file xtsc_request.h.

7.120.5.15 void set_dram_attribute (const sc_dt::sc_unsigned & dram_attribute)

Set the DRAM read/write attibutes of this request.

Parameters:
dram_attribute The DRAM read/write attributes.

See also:
get_dram_attribute()

7.120.5.16 void get_dram_attribute (sc_dt::sc_unsigned & dram_attribute) const

Get the DRAM read/write attributes of this request.

Parameters:
dram_attribute The DRAM read/write attributes.

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Exceptions:

xtsc_exception if this request has no DRAM attributes.

See also:
has_dram_attribute()
set_dram_attribute()

7.120.5.17 bool has_dram_attribute () const [inline]

Return whether or not this request has DRAM read/write attributes.

See also:
get_dram_attribute()
set_dram_attribute()

Definition at line 531 of file xtsc_request.h.

7.120.5.18 void set_route_id (u32 route_id) [inline]

Set the route ID.

Parameters:
route_id Arbiters add bits to this field as needed to be able to route the return re-
sponse. Terminal devices must echo this field back verbatim in the response. An
arbiter should clear the corresponding bit field in the response before forwarding
the response back upstream. The result should be that the route ID in the re-
sponse that the arbiter sends upstream should match the route ID in the original
request received by the arbiter.

See also:
xtsc_response::set_route_id()

Definition at line 548 of file xtsc_request.h.

7.120.5.19 u32 get_route_id () const [inline]

Get the route ID.

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See also:
set_route_id()

Definition at line 556 of file xtsc_request.h.

7.120.5.20 void set_type (type_t type) [inline]

Set the request type.

See also:
type_t

Definition at line 564 of file xtsc_request.h.

7.120.5.21 type_t get_type () const [inline]

Get the request type.

See also:
type_t

Definition at line 572 of file xtsc_request.h.

Referenced by req_cntl::init().

7.120.5.22 static const char∗ get_type_name (type_t type) [static]

Get a c-string corresponding to the specified request type.

Parameters:
type The desired type.

7.120.5.23 static type_t get_type (const std::string & name) [static]

Get the xtsc_request::type_t from a string name.

Parameters:
name The name of the desired type.

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7.120.5.24 void set_num_transfers (u32 num_transfers) [inline]

Set the number of transfers.

Parameters:
num_transfers For READ and WRITE, this is 1. For BLOCK_READ, this is the num-
ber of response transfers expected by this request (2|4|8|16). For BURST_READ,
this is the number of response transfers expected by this request (2-16). For
BLOCK_WRITE this is the number of request transfers in the BLOCK_WRITE
sequence (2|4|8|16). For BURST_WRITE this is the number of request transfers
in the BURST_WRITE sequence (2-16). For RCW, this is 2. For SNOOP, this is
the number of response with data transfers expected by this request (1|2|4|8|16).

Note: Snoop is reserved for future use.

Definition at line 615 of file xtsc_request.h.

7.120.5.25 u32 get_num_transfers () const [inline]

Get the number of transfers.

See also:
set_num_transfers

Definition at line 623 of file xtsc_request.h.

Referenced by req_cntl::init().

7.120.5.26 u32 get_transfer_number () const

Get which request transfer this is in a sequence of request transfers. For READ, BLOCK_-
READ, BURST_READ, WRITE, and SNOOP, this always returns 1. For BLOCK_WRITE
and BURST_WRITE, this returns which request transfer this is in the sequence of BLOCK_-
WRITE or BURST_WRITE request transfers (starting with 1 and going up to m_num_-
transfers). For RCW, this returns 1 for the first request transfer and 2 for the second request
transfer.
Note: For BLOCK_WRITE requests in normal operation, this method computes the return
value based on byte address (from get_byte_address) of the xtsc_request. If the adjust_-
block_write() method has been called for this request, then the value provide by that call is
returned instead.
Note: Snoop is reserved for future use.

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See also:
adjust_block_write
get_byte_address

7.120.5.27 void set_byte_enables (xtsc_byte_enables byte_enables) [inline]

Set the byte enables.

Parameters:
byte_enables Let address8 be the address set by set_byte_address() or an xtsc_-
request constructor or initialize() method. For READ, WRITE, RCW, and
BURST_WRITE, bit 0 of byte_enables applies to address8, bit 1 of byte_-
enables applies to address8+1, ..., bit (size8-1) of byte_enables applies to
address8+size8-1. For BLOCK_WRITE, BLOCK_READ, BURST_READ, and
SNOOP, byte_enables is not used. For the middle requests in a BURST_WRITE
sequence (that is, requests that are neither the first nor the last in the sequence),
all bytes of the bus should be enabled.

Note: Snoop is reserved for future use.

Definition at line 665 of file xtsc_request.h.

7.120.5.28 xtsc_byte_enables get_byte_enables () const [inline]

Get the byte enables.

See also:
set_byte_enables

Definition at line 673 of file xtsc_request.h.

7.120.5.29 void set_id (u8 id) [inline]

Set the PIF ID.

Parameters:
id The PIF ID. Terminal devices must echo this field back verbatim in the response.
Master devices are free to use this field to support multiple outstanding PIF re-
quests.

Definition at line 684 of file xtsc_request.h.

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7.120.5.30 u8 get_id () const [inline]

Get the PIF ID.

See also:
set_id

Definition at line 692 of file xtsc_request.h.

7.120.5.31 void set_priority (u8 priority) [inline]

Set the transaction priority. Hardware only supports priority values of 0-3 (i.e. 2 bits).

Value Meaning
----- -------
0 Low
1 Medium low
2 Medium high
3 High

The Xtensa LX processor issues all PIF requests at medium-high (2) priority and ignores
the priority bits of PIF responses. Inbound PIF requests to instruction RAMs always have
priority over processor generated instruction fetches regardless of the value set using the
set_priority() method. Inbound PIF requests to data RAMs and XLMI will take priority over
processor generated loads and stores if priority is set to 3 (High). A priority of 0, 1, or 2 will
result in the inbound PIF request getting access to the XLMI or data RAM when it is free.
If an inbound PIF request with a priority less then 3 has been blocked for several cycles by
processor generated loads or stores, then bubbles will be inserted in the Xtensa processor
pipeline to allow the request to make forward progress.
Definition at line 717 of file xtsc_request.h.

7.120.5.32 u8 get_priority () const [inline]

Get the transaction priority.

See also:
set_priority

Definition at line 724 of file xtsc_request.h.

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7.120.5.33 void set_last_transfer (bool last_transfer) [inline]

Set whether or not this is the last transfer of the request.

Parameters:
last_transfer True if this is the last transfer of the request. For READ, BLOCK_-
READ, BURST_READ, WRITE, and SNOOP, this should always be true. For all
but the last transfer of a BLOCK_WRITE, BURST_WRITE, or RCW sequence,
this should be false and for the last transfer it should be true.

Note: Snoop is reserved for future use.

Definition at line 738 of file xtsc_request.h.

7.120.5.34 bool get_last_transfer () const [inline]

Get whether or not this is the last transfer of the request.

See also:
set_last_transfer

Definition at line 746 of file xtsc_request.h.

Referenced by req_cntl::init().

7.120.5.35 void set_instruction_fetch (bool instruction_fetch) [inline]

Set whether or not this is request is for an instruction fetch.

Parameters:
instruction_fetch True indicates this request is for an instruction fetch.

Note: Typically m_instruction_fetch should be false if m_type is neither READ nor BLOCK_-
READ.
Definition at line 758 of file xtsc_request.h.

7.120.5.36 bool get_instruction_fetch () const [inline]

Get whether or not this is request is for an instruction fetch.

See also:
set_instruction_fetch

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Definition at line 766 of file xtsc_request.h.

7.120.5.37 void set_xfer_en (bool xfer_en) [inline]

Set whether or not this is request is from the Xtensa top XFER control block.

Parameters:
xfer_en True indicates this request is a local memory request originating from the
Xtensa top XFER control block and therefore must not be RSP_NACC’d.

Note: This interface is only applicable to TX Xtensa cores which have the bootloader inter-
face and at least one local memory with a busy signal.
Definition at line 779 of file xtsc_request.h.

7.120.5.38 bool get_xfer_en () const [inline]

Get whether or not this is request is from the Xtensa top XFER control block. Note: This
interface is only applicable to TX Xtensa cores which have the bootloader interface and at
least one local memory with a busy signal.

See also:
set_xfer_en

Definition at line 790 of file xtsc_request.h.

7.120.5.39 void set_coherence (coherence_t coherence) [inline]

Set the cache coherence information of this request.

Parameters:
coherence The coherence information of this request. For BLOCK_READ this may be
NONCOHERENT, SHARED, or EXCLUSIVE. For SNOOP, this may be SHARED
or EXCLUSIVE or INVALIDATE. For READ, BURST_READ, WRITE, BLOCK_-
WRITE, and BURST_WRITE this is always NONCOHERENT.

Note: Coherence and snoop are reserved for future use.

Definition at line 805 of file xtsc_request.h.

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7.120.5.40 coherence_t get_coherence () const [inline]

Get the cache coherence information of this request.

See also:
set_coherence

Definition at line 813 of file xtsc_request.h.

7.120.5.41 void set_snoop_virtual_address (xtsc_address snoop_virtual_address)

[inline]

Set the virtual address for coherent/snoop requests.

Parameters:
snoop_virtual_address The virtual address for use by the snoop controller.

Note: Coherence and snoop are reserved for future use.

Definition at line 824 of file xtsc_request.h.

7.120.5.42 xtsc_address get_snoop_virtual_address () const [inline]

Get the virtual address associated with this request (for coherent/snoop requests). Note:
Coherence and snoop are reserved for future use.

See also:
set_snoop_virtual_address

Definition at line 834 of file xtsc_request.h.

7.120.5.43 void set_pc (xtsc_address pc) [inline]

Set the processor program counter (PC) associated with this request.

Parameters:
pc The PC associated with this request. If no meaningful PC can be associated with
the request use 0xFFFFFFFF. This signal is not in the hardware, but is provided
for debugging and logging purposes.

Definition at line 845 of file xtsc_request.h.

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7.120.5.44 xtsc_address get_pc () const [inline]

Get the processor program counter (PC) associated with this request.

See also:
set_pc

Definition at line 853 of file xtsc_request.h.

7.120.5.45 void set_buffer (u32 size8, const u8 ∗ buffer)

Set the request’s transfer buffer (data payload). This method should only be used for RCW,
WRITE, BLOCK_WRITE, and BURST_WRITE request transaction types.
For RCW transactions, the first RCW request transfer contains that data that the target
should use to compare with the current memory contents and the second RCW request
transfer contains the data that should replace the current contents if the first transfers data
matched the current contents.
Data is arranged in the buffer as follows: Let address8 be the address set by set_byte_-
address() or the xtsc_request constructor or initialize() method. Let size8 be the transfer
size set by set_byte_size() or the xtsc_request constructor.

The byte corresponding to address8+0 is in buffer[0].

The byte corresponding to address8+1 is in buffer[1].
. . .
The byte corresponding to address8+size8-1 is in buffer[size8-1].

This format applies regardless of host and target endianess. Note: The above mapping
applies regardless of byte enables; however, byte enables may dictate that certain bytes in
the buffer are meaningless and not to be used. See set_byte_enables().

7.120.5.46 const u8∗ get_buffer () const [inline]

Get a pointer to the request’s transfer data suitable only for reading the data.

See also:
set_buffer()

Definition at line 892 of file xtsc_request.h.

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7.120.5.47 u8∗ get_buffer () [inline]

Get a pointer to the request’s transfer data suitable either for reading or writing the data.
The buffer size is 64 bytes to accommodate the widest possible Xtensa memory interface;
however, you should only use the first N bytes where N is the size of the actual memory
interface in use.
Warning: Writing past the 64th byte results in undefined bad behavior.

See also:
set_buffer()

Definition at line 907 of file xtsc_request.h.

7.120.5.48 void set_user_data (void ∗ user_data) [inline]

Set optional user data associated with this request. Note: User data is neither readable
nor writable by Xtensa Ld/St/iFetch operations.
Note: The initial value of m_user_data is 0 (NULL).

Parameters:
user_data Optional user data.

Definition at line 919 of file xtsc_request.h.

7.120.5.49 void∗ get_user_data () const [inline]

Get the optional user data associated with this request.

See also:
set_user_data

Definition at line 927 of file xtsc_request.h.

7.120.5.50 std::string get_user_data_for_logging (xtsc::u32 num_bytes, const

std::string & prefix = " {", const std::string & suffix = "}") const

Return a string suitable for logging containing bytes from the optional user data associated
with this request.

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Parameters:
num_bytes If 0, an empty string is returned. If non-zero, the returned string will begin
with prefix and end with suffix. If positive and m_user_data is not 0 (NULL),
the bytes are taken from the memory pointed to by the user data pointer (user
discretion is advised). If positive and m_user_data is 0, then return string consists
only of the prefix and suffix. If negative, the least significant -num_bytes bytes are
obtained from the user data pointer itself, as shown here:
0xFFFFFFFF or -1: ((u64)p_user_data & 0x00000000000000FF)
0xFFFFFFFE or -2: ((u64)p_user_data & 0x000000000000FFFF)
0xFFFFFFFD or -3: ((u64)p_user_data & 0x0000000000FFFFFF)
0xFFFFFFFC or -4: ((u64)p_user_data & 0x00000000FFFFFFFF)
0xFFFFFFFB or -5: ((u64)p_user_data & 0x000000FFFFFFFFFF)
0xFFFFFFFA or -6: ((u64)p_user_data & 0x0000FFFFFFFFFFFF)
0xFFFFFFF9 or -7: ((u64)p_user_data & 0x00FFFFFFFFFFFFFF)
0xFFFFFFF8 or -8: ((u64)p_user_data & 0xFFFFFFFFFFFFFFFF)

For example, if num_bytes is -3 (0xFFFFFFFD) and m_user_data is 0x12345678

(and prefix and suffix are left at their default values), then this method will return
"{78 56 34}".
prefix Prefix to the user data bytes.
suffix Suffix to the user data bytes.

See also:
set_user_data
get_user_data

7.120.5.51 void set_exclusive (bool exclusive) [inline]

Set whether or not this request if for exclusive access.

Parameters:
exclusive True if this request is for exclusive access.

Definition at line 974 of file xtsc_request.h.

7.120.5.52 bool get_exclusive () const [inline]

Get whether or not this request if for exclusive access.

See also:
set_exclusive

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Definition at line 982 of file xtsc_request.h.

Referenced by req_cntl::init().

7.120.5.53 u64 get_tag () const [inline]

Get this request’s tag. This is an artificial number (not in hardware) useful for correlating
requests and responses in, for example, a log file. For READ and WRITE, the tag is the
same for a request and its corresponding response. For BLOCK_WRITE and BURST_-
WRITE, the tag is the same for all request transfers and the single response transfer of the
BLOCK_WRITE or BURST_WRITE sequence. For BLOCK_READ, BURST_READ, and
SNOOP, the tag is the same for the single request transfer and all the response transfers in
the block. For RCW, the tag is the same for both request transfers and the single response
transfer. A request that gets RSP_NACC maintains the same tag when the request is
repeated.
Note: Snoop is reserved for future use.
Definition at line 1000 of file xtsc_request.h.

7.120.5.54 void dump (std::ostream & os = std::cout, bool dump_data = true)

const

This method dumps this request’s info to the specified ostream object, optionally including
data (if applicable). The format of the output is:

tag=<Tag> pc=<PC> <Type>* [<Address>/<Num>/<ByteEnables>/<Coherence>/<ID>/p<Pri>/<Attr>/<Dom>]<F|E> <Dat

Where:
<Tag> is m_tag in decimal.
<PC> is m_pc in hexadecimal.
<Type> is READ|BLOCK_READ|BURST_READ|RCW|WRITE|BLOCK_WRITE|BURST_WRITE|
SNOOP.
* indicates m_last_transfer is true.
<Address> is m_address8 in hexadecimal.
<Num> is m_size8 for READ|WRITE, or m_num_transfers for BLOCK_READ|
BURST_READ|SNOOP, or get_transfer_number() for RCW|BLOCK_WRITE|
BURST_WRITE.
<ByteEnables> is m_byte_enables in hexadecimal.
<Coherence> is m_coherence in decimal.
<ID> is m_id in decimal.
<Pri> is m_priority in decimal.
<Attr> is m_pif_attribute or m_dram_attribute in hex. <Attr> is not
present if neither m_pif_attribute nor m_dram_attribute has been
set.
<Dom> is m_pif_req_domain in dec. <Dom> is not present if
m_pif_req_domain has not been set.
<F|E> is the letter "F" if m_instruction_fetch is true, else is the
letter "E" if m_exclusive is true, else is null (not present).
<Data> is the equal sign followed by the contents of m_buffer in

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hexadecimal (without leading '0x'). This field is only present

if dump_data is true AND m_type is RCW|WRITE|BLOCK_WRITE|
BURST_WRITE.
<UD> is m_user_data (in hex with leading '0x') if non-zero. If
m_user_data is 0, then this field is not present.
<X> is the letter "X" if m_xfer_en is true. Otherwise, it is null
(not present).

Parameters:
os The ostream object to which the info should be dumped.
dump_data If true, and the request type is RCW|WRITE|BLOCK_WRITE| BURST_-
WRITE, then the request’s buffer contents are dumped. Otherwise, the buffer is
not dumped.

Note: Snoop is reserved for future use.

7.120.5.55 const stream_dumper& show_data (bool show) const [inline]

This method makes it easy to dump an xtsc_request to an ostream while programatically

determining whether or not to include the payload data (if any). Usage:

cout << request << endl; // Show data

cout << request.show_data(true) << endl; // Show data
cout << request.show_data(false) << endl; // Don't show data

Definition at line 1080 of file xtsc_request.h.

The documentation for this class was generated from the following file:

• xtsc_request.h

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7.121 xtsc_request_if Class Reference

Interface for sending requests from a memory interface master to a memory interface slave.
#include <xtsc/xtsc_request_if.h>Inheritance diagram for xtsc_request_if:

xtsc_debug_if

xtsc_request_if

xtsc_request_if_impl xtsc_slave

Collaboration diagram for xtsc_request_if:

xtsc_debug_if

xtsc_request_if

Public Member Functions

• virtual void nb_request (const xtsc_request &request)=0
Calls to this method represent the request phase of real hardware bus activity.

• virtual void nb_load_retired (xtsc_address address8)

This method is called to indicate that the oldest outstanding XLMI load has retired.

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• virtual void nb_retire_flush ()

This method is called to indicate that none of the outstanding XLMI loads will commit (and
therefore they should be flushed).

• virtual void nb_lock (bool lock)

This method is called to indicate that an atomic read-followed-by-write operation is in
progress to the connected DataRAM.

7.121.1 Detailed Description

Interface for sending requests from a memory interface master to a memory interface slave.
This composite interface is for both debug and normal hardware communication from a
memory interface master module to a memory interface slave module.
A memory interface master is a module (such as xtsc_core) that is capable of making mem-
ory interface requests (for example, read, write, block read, etc.) and a memory interface
slave is a module (such as xtsc_component::xtsc_memory) that is capable of servicing
memory interface requests.
Every memory interface master must have two ports. These two ports are referred to
thoughtout the XTSC documentation as a "memory interface master port pair" or simply a
"master port pair". They are:

1. sc_port <xtsc_request_if> (for sending requests)

2. sc_export<xtsc_respond_if> (for receiving responses)

Correspondingly, every memory interface slave must have two ports. These two ports are
referred to thoughtout the XTSC documentation as a "memory interface slave port pair" or
simply a "slave port pair". They are:

1. sc_export<xtsc_request_if> (for receiving requests)

2. sc_port <xtsc_respond_if> (for sending responses)

To connect a memory interface master with a memory interface slave requires two port
binding operations:

1. The master's sc_port<xtsc_request_if> must be bound to the slave's

sc_export<xtsc_request_if>
2. The slave's sc_port<xtsc_respond_if> must be bound to the master's
sc_export<xtsc_respond_if>

For port-binding information specific to xtsc_core, see xtsc_core::How_to_do_memory_-

port_binding.

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For protocol and timing information specific to xtsc_core, see xtsc_core::Information_on_-

memory_interface_protocols.
Note: The methods of xtsc_request_if are all non-blocking in the OSCI TLM sense. That
is, they must NEVER call wait() either directly or indirectly. The "nb_" method prefix stands
for Non-Blocking.

See also:
xtsc_request
xtsc_debug_if
xtsc_respond_if
xtsc_response
xtsc_core::How_to_do_port_binding
xtsc_core::Information_on_memory_interface_protocols
xtsc_component::xtsc_arbiter
xtsc_component::xtsc_dma_engine
xtsc_component::xtsc_master
xtsc_component::xtsc_memory
xtsc_component::xtsc_router
xtsc_component::xtsc_slave

Definition at line 274 of file xtsc_request_if.h.

7.121.2 Member Function Documentation

7.121.2.1 virtual void nb_request (const xtsc_request & request) [pure virtual]

Calls to this method represent the request phase of real hardware bus activity.

Parameters:
request The xtsc_request object.

The nb_request() method returns void. If the slave module (the callee) does not want to
accept the request (e.g. it is already busy with another request), it must call xtsc_respond_-
if::nb_respond() with xtsc_response::RSP_NACC.
Note: The caller module owns the request object. If the callee module needs access to the
request after returning from the nb_request() call, then the callee module must make its
own copy of the request object.
This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).

See also:
xtsc_request

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xtsc_core::Information_on_memory_interface_protocols for protocol and timing issues

specific to xtsc_core.

Implemented in xtsc_request_if_impl, xtsc_request_if_impl, xtsc_request_if_impl, xtsc_-

request_if_impl, xtsc_slave, xtsc_request_if_impl, xtsc_request_if_impl, and xtsc_-
request_if_impl.

7.121.2.2 virtual void nb_load_retired (xtsc_address address8) [inline,

virtual]

This method is called to indicate that the oldest outstanding XLMI load has retired. This
method models the DPortNLoadRetiredM signal of XLMI. This method will never be called
by xtsc_core except on an XLMI port.

Parameters:
address8 The address of the oldest outstanding load.

Note: A router should forward this method call out the master port indicated by the address
argument.
This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Reimplemented in xtsc_request_if_impl, xtsc_request_if_impl, xtsc_request_if_impl, xtsc_-
request_if_impl, and xtsc_request_if_impl.
Definition at line 315 of file xtsc_request_if.h.

7.121.2.3 virtual void nb_retire_flush () [inline, virtual]

This method is called to indicate that none of the outstanding XLMI loads will commit (and
therefore they should be flushed). This method models the DPortnRetireFlushm signal of
XLMI. This method will never be called by xtsc_core except on an XLMI port.
Note: A router should broadcast this method call out all master ports (i.e. to all slaves).
This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Reimplemented in xtsc_request_if_impl, xtsc_request_if_impl, xtsc_request_if_impl, xtsc_-
request_if_impl, and xtsc_request_if_impl.
Definition at line 331 of file xtsc_request_if.h.

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7.121.2.4 virtual void nb_lock (bool lock) [inline, virtual]

This method is called to indicate that an atomic read-followed-by-write operation is in

progress to the connected DataRAM. This method models the DRamnLockm signal of
DataRAM. This method will never be called by xtsc_core except on a DataRAM port.

Parameters:
lock If true, the DRamnLockm signal is being asserted. If false, the DRamnLockm
signal is being deasserted.

Note: Protocol for shared DataRAM:

• A router should broadcast this method call out all master ports (i.e. to all slaves).
• An arbiter should maintain state of the the lock argument for each port.
• An arbiter should actually lock on a port only when a request is received and granted
while the lock argument state is true.

• When an arbiter first locks on a port, it should send a nb_lock(true) call downstream
prior to forwarding the nb_request() call.
• When an arbiter receives an nb_lock(false) call on a port to which it is locked, then it
should unlock the port and foward the nb_lock(false) call downstream.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Reimplemented in xtsc_request_if_impl, xtsc_request_if_impl, xtsc_request_if_impl, xtsc_-
request_if_impl, xtsc_request_if_impl, and xtsc_request_if_impl.
Definition at line 359 of file xtsc_request_if.h.
The documentation for this class was generated from the following file:

• xtsc_request_if.h

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7.122 xtsc_request_if_impl Class Reference

Implementation of xtsc_request_if.
#include <xtsc/xtsc_tlm2pin_memory_transactor.h>Inheritance diagram for xtsc_-
request_if_impl:

xtsc_debug_if

xtsc_request_if

xtsc_request_if_impl

Collaboration diagram for xtsc_request_if_impl:

xtsc_debug_if
m_transactor
xtsc_request_if xtsc_request_if_impl

m_request_impl xtsc_debug_if_cap
m_p_initial_value_file m_transactor
xtsc_script_file xtsc_memory_b
m_p_memory m_debug_cap
xtsc_tlm2pin_memory_transactor
xtsc_connection_interface xtsc_module

xtsc_resettable xtsc_command_handler_interface

xtsc_module_pin_base

Public Member Functions

• xtsc_request_if_impl (const char ∗object_name, xtsc_tlm2pin_memory_transactor
&transactor, xtsc::u32 port_num)
Constructor.

• const char ∗ kind () const

The kind of sc_object we are.

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• void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗buffer)

Receive peeks from the memory interface master.

• void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8 ∗buffer)

Receive pokes from the memory interface master.

• bool nb_fast_access (xtsc::xtsc_fast_access_request &request)

Receive requests for information about how to do fast access from the memory interface
master.

• void nb_request (const xtsc::xtsc_request &request)

Receive requests from the memory interface master.

• void nb_load_retired (xtsc::xtsc_address address8)

For XLMI: DPortLoadRetired.

• void nb_retire_flush ()
For XLMI: DPortRetireFlush.

• void nb_lock (bool lock)

For DRamnLockm.

• bool is_connected ()
Return true if a port has been bound to this implementation.

Protected Member Functions

• void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to us.

Protected Attributes
• xtsc_tlm2pin_memory_transactor & m_transactor
Our xtsc_tlm2pin_memory_transactor object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

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• xtsc::u32 m_port_num
Our port number.

• xtsc::u32 m_lock_port
For DRAM0BS|DRAM1BS, port num of the 0th subbank, otherwise same as m_port_num.

• std::string m_lock_port_str
For DRAM0Bs|DRAM1BS: To add actual port to nb_lock logging.

7.122.1 Detailed Description

Implementation of xtsc_request_if.
Definition at line 1115 of file xtsc_tlm2pin_memory_transactor.h.

7.122.2 Member Function Documentation

7.122.2.1 void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗

buffer) [virtual]

Receive peeks from the memory interface master.

See also:
xtsc::xtsc_request_if

Implements xtsc_debug_if.

7.122.2.2 void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8, const

xtsc::u8 ∗ buffer) [virtual]

Receive pokes from the memory interface master.

See also:
xtsc::xtsc_request_if

Implements xtsc_debug_if.

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7.122.2.3 bool nb_fast_access (xtsc::xtsc_fast_access_request & request)

[virtual]

Receive requests for information about how to do fast access from the memory interface
master.

See also:
xtsc::xtsc_request_if

Implements xtsc_debug_if.

7.122.2.4 void nb_request (const xtsc::xtsc_request & request) [virtual]

Receive requests from the memory interface master.

See also:
xtsc::xtsc_request_if

Implements xtsc_request_if.

7.122.2.5 void nb_load_retired (xtsc::xtsc_address address8) [virtual]

For XLMI: DPortLoadRetired.

See also:
xtsc::xtsc_request_if

Reimplemented from xtsc_request_if.

7.122.2.6 void nb_retire_flush () [virtual]

For XLMI: DPortRetireFlush.

See also:
xtsc::xtsc_request_if

Reimplemented from xtsc_request_if.

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 Chapter 7. Class Documentation

7.122.2.7 void nb_lock (bool lock) [virtual]

For DRamnLockm.

See also:
xtsc::xtsc_request_if

Reimplemented from xtsc_request_if.

The documentation for this class was generated from the following file:

• xtsc_tlm2pin_memory_transactor.h

Xtensa SystemC (XTSC) Reference Manual 931

Chapter 7. Class Documentation

7.123 xtsc_request_if_impl Class Reference

Implementation of xtsc_request_if.
#include <xtsc/xtsc_memory.h>Inheritance diagram for xtsc_request_if_impl:

xtsc_debug_if

xtsc_request_if

xtsc_request_if_impl

Collaboration diagram for xtsc_request_if_impl:

xtsc_connection_interface

xtsc_module

xtsc_resettable
xtsc_command_handler_interface

m_p_exclusive_script_stream
m_p_script_stream

xtsc_script_file m_p_initial_value_file
m_p_memory
xtsc_memory_b

m_filtered_request
m_filtered_response
m_p_request m_stream_dumper m_p_active_response
stream_dumper xtsc_response xtsc_memory
xtsc_request
m_stream_dumper
m_p_active_request_info
m_request
request_info
m_memory_parms

xtsc_memory_parms
xtsc_parms m_fast_access_object

xtsc_fast_access_if
m_request_impl

xtsc_debug_if xtsc_request_if xtsc_request_if_impl m_memory

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 Chapter 7. Class Documentation

Public Member Functions

• xtsc_request_if_impl (const char ∗object_name, xtsc_memory &memory, xtsc::u32
port_num)
Constructor.

• virtual void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗buffer)

• virtual void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8
∗buffer)
• virtual bool nb_fast_access (xtsc::xtsc_fast_access_request &request)
• void nb_request (const xtsc::xtsc_request &request)
• void nb_load_retired (xtsc::xtsc_address address8)
• void nb_retire_flush ()
• void nb_lock (bool lock)
• bool is_connected ()
Return true if a port has bound to this implementation.

Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to us.

Protected Attributes
• xtsc_memory & m_memory
Our xtsc_memory object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

• xtsc::u32 m_port_num
Our slave port pair number.

7.123.1 Detailed Description

Implementation of xtsc_request_if.
Definition at line 1613 of file xtsc_memory.h.

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7.123.2 Constructor & Destructor Documentation

7.123.2.1 xtsc_request_if_impl (const char ∗ object_name, xtsc_memory &

memory, xtsc::u32 port_num) [inline]

Constructor.

Parameters:
memory A reference to the owning xtsc_memory object.
port_num The slave port number that this object serves.

Definition at line 1621 of file xtsc_memory.h.

7.123.3 Member Function Documentation

7.123.3.1 virtual void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8,

xtsc::u8 ∗ buffer) [virtual]

See also:
xtsc::xtsc_request_if

Implements xtsc_debug_if.

7.123.3.2 virtual void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8,

const xtsc::u8 ∗ buffer) [virtual]

See also:
xtsc::xtsc_request_if

Implements xtsc_debug_if.

7.123.3.3 virtual bool nb_fast_access (xtsc::xtsc_fast_access_request & request)

[virtual]

See also:
xtsc::xtsc_request_if

Implements xtsc_debug_if.

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7.123.3.4 void nb_request (const xtsc::xtsc_request & request) [virtual]

See also:
xtsc::xtsc_request_if

Implements xtsc_request_if.

7.123.3.5 void nb_load_retired (xtsc::xtsc_address address8) [virtual]

See also:
xtsc::xtsc_request_if

Reimplemented from xtsc_request_if.

7.123.3.6 void nb_retire_flush () [virtual]

See also:
xtsc::xtsc_request_if

Reimplemented from xtsc_request_if.

7.123.3.7 void nb_lock (bool lock) [virtual]

See also:
xtsc::xtsc_request_if

Reimplemented from xtsc_request_if.

The documentation for this class was generated from the following file:

• xtsc_memory.h

Xtensa SystemC (XTSC) Reference Manual 935

Chapter 7. Class Documentation

7.124 xtsc_request_if_impl Class Reference

Implementation of xtsc_request_if.
#include <xtsc/xtsc_mmio.h>Inheritance diagram for xtsc_request_if_impl:

xtsc_debug_if

xtsc_request_if

xtsc_request_if_impl

Collaboration diagram for xtsc_request_if_impl:

m_mmio
xtsc_debug_if xtsc_request_if xtsc_request_if_impl

m_request_impl
xtsc_resettable xtsc_module

xtsc_connection_interface xtsc_command_handler_interface xtsc_mmio

m_p_definition_file

xtsc_script_file m_mmio_parms

xtsc_parms xtsc_mmio_parms m_active_request

xtsc_request m_p_request
stream_dumper
m_stream_dumper

Public Member Functions

• xtsc_request_if_impl (const char ∗object_name, xtsc_mmio &mmio)

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 Chapter 7. Class Documentation

Constructor.

• const char ∗ kind () const

The kind of sc_object we are.

• void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗buffer)

Receive peeks from the memory interface master.

• void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8 ∗buffer)

Receive pokes from the memory interface master.

• bool nb_fast_access (xtsc::xtsc_fast_access_request &request)

Receive fast access requests from the memory interface master.

• void nb_request (const xtsc::xtsc_request &request)

Receive requests from the memory interface master.

Protected Member Functions

• void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

SystemC callback when something binds to us.

Protected Attributes

• xtsc_mmio & m_mmio

Our xtsc_mmio object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.124.1 Detailed Description

Implementation of xtsc_request_if.
Definition at line 709 of file xtsc_mmio.h.

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Chapter 7. Class Documentation

7.124.2 Member Function Documentation

7.124.2.1 void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗

buffer) [virtual]

Receive peeks from the memory interface master.

See also:
xtsc::xtsc_request_if

Implements xtsc_debug_if.

7.124.2.2 void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8, const

xtsc::u8 ∗ buffer) [virtual]

Receive pokes from the memory interface master.

See also:
xtsc::xtsc_request_if

Implements xtsc_debug_if.

7.124.2.3 bool nb_fast_access (xtsc::xtsc_fast_access_request & request)

[virtual]

Receive fast access requests from the memory interface master.

See also:
xtsc::xtsc_request_if

Implements xtsc_debug_if.

7.124.2.4 void nb_request (const xtsc::xtsc_request & request) [virtual]

Receive requests from the memory interface master.

See also:
xtsc::xtsc_request_if

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 Chapter 7. Class Documentation

Implements xtsc_request_if.
The documentation for this class was generated from the following file:

• xtsc_mmio.h

Xtensa SystemC (XTSC) Reference Manual 939

Chapter 7. Class Documentation

7.125 xtsc_request_if_impl Class Reference

Implementation of xtsc_request_if. Inheritance diagram for xtsc_request_if_impl:

xtsc_debug_if

xtsc_request_if

xtsc_request_if_impl

Collaboration diagram for xtsc_request_if_impl:

m_request_impl
xtsc_debug_if xtsc_request_if xtsc_request_if_impl

m_transactor
m_transactor
xtsc_connection_interface xtsc_module nb_mm
m_nb_mm

xtsc_xttlm2tlm2_transactor m_transactor
xtsc_resettable xtsc_mode_switch_if
tlm_bw_transport_if_impl
m_request m_tlm_bw_transport_if_impl
xtsc_command_handler_interface

xtsc_request m_p_request
stream_dumper
m_stream_dumper

Public Member Functions

• xtsc_request_if_impl (const char ∗object_name, xtsc_xttlm2tlm2_transactor &trans-
actor, xtsc::u32 port_num)
Constructor.

• virtual void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8

∗buffer)
From upstream master.

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 Chapter 7. Class Documentation

• virtual void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8

∗buffer)
From upstream master.

• virtual bool nb_fast_access (xtsc::xtsc_fast_access_request &request)

From upstream master.

• void nb_request (const xtsc::xtsc_request &request)

From upstream master.

• void nb_lock (bool lock)

From upstream master.

• bool is_connected ()
Return true if a port has been bound to this implementation.

Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

SystemC callback when something binds to us.

Protected Attributes

• xtsc_xttlm2tlm2_transactor & m_transactor

Our xtsc_xttlm2tlm2_transactor object.

• xtsc::u32 m_port_num
Our port number.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.125.1 Detailed Description

Implementation of xtsc_request_if.
Definition at line 667 of file xtsc_xttlm2tlm2_transactor.h.

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Chapter 7. Class Documentation

7.125.2 Member Function Documentation

7.125.2.1 virtual void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8,

xtsc::u8 ∗ buffer) [virtual]

From upstream master.

See also:
xtsc::xtsc_request_if

Implements xtsc_debug_if.

7.125.2.2 virtual void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8,

const xtsc::u8 ∗ buffer) [virtual]

From upstream master.

See also:
xtsc::xtsc_request_if

Implements xtsc_debug_if.

7.125.2.3 virtual bool nb_fast_access (xtsc::xtsc_fast_access_request & request)

[virtual]

From upstream master. Use "turbo_support" to specify fast access support.

See also:
xtsc::xtsc_request_if

Implements xtsc_debug_if.

7.125.2.4 void nb_request (const xtsc::xtsc_request & request) [virtual]

From upstream master.

See also:
xtsc::xtsc_request_if

Implements xtsc_request_if.

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 Chapter 7. Class Documentation

7.125.2.5 void nb_lock (bool lock) [virtual]

From upstream master. Not supported by this model.

See also:
xtsc::xtsc_request_if

Reimplemented from xtsc_request_if.

The documentation for this class was generated from the following file:

• xtsc_xttlm2tlm2_transactor.h

Xtensa SystemC (XTSC) Reference Manual 943

Chapter 7. Class Documentation

7.126 xtsc_request_if_impl Class Reference

Implementation of xtsc_request_if.
#include <xtsc/xtsc_router.h>Inheritance diagram for xtsc_request_if_impl:

xtsc_debug_if

xtsc_request_if

xtsc_request_if_impl

Collaboration diagram for xtsc_request_if_impl:

xtsc_connection_interface
xtsc_module

xtsc_resettable
xtsc_command_handler_interface

m_filtered_response

m_response response_info m_responses

xtsc_response m_p_nascent_response
m_p_response
xtsc_respond_if
m_p_nascent_request req_rsp_info
m_stream_dumper m_stream_dumper m_p_first_request_info m_req_rsp_table
stream_dumper m_request m_respond_impl xtsc_respond_if_impl
xtsc_request request_info m_requests
m_filtered_request xtsc_router m_router

m_file
xtsc_script_file
m_router_parms

xtsc_parms xtsc_router_parms
m_router

xtsc_debug_if xtsc_request_if xtsc_request_if_impl m_request_impl

Public Member Functions

• xtsc_request_if_impl (const char ∗object_name, xtsc_router &router)

Constructor.

• virtual void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗buffer)

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 Chapter 7. Class Documentation

• virtual void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8

∗buffer)
• virtual bool nb_peek_coherent (xtsc::xtsc_address virtual_address8, xtsc::xtsc_-
address physical_address8, xtsc::u32 size8, xtsc::u8 ∗buffer)
• virtual bool nb_poke_coherent (xtsc::xtsc_address virtual_address8, xtsc::xtsc_-
address physical_address8, xtsc::u32 size8, const xtsc::u8 ∗buffer)
• virtual bool nb_fast_access (xtsc::xtsc_fast_access_request &request)
• void nb_request (const xtsc::xtsc_request &request)
• void nb_load_retired (xtsc::xtsc_address address8)
• void nb_retire_flush ()
• void nb_lock (bool lock)

Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to us.

Protected Attributes
• xtsc_router & m_router
Our xtsc_router object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.126.1 Detailed Description

Implementation of xtsc_request_if.
Definition at line 1159 of file xtsc_router.h.

7.126.2 Member Function Documentation

7.126.2.1 virtual void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8,

xtsc::u8 ∗ buffer) [virtual]

See also:
xtsc::xtsc_debug_if

Xtensa SystemC (XTSC) Reference Manual 945

Chapter 7. Class Documentation

Implements xtsc_debug_if.

7.126.2.2 virtual void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8,

const xtsc::u8 ∗ buffer) [virtual]

See also:
xtsc::xtsc_debug_if

Implements xtsc_debug_if.

7.126.2.3 virtual bool nb_peek_coherent (xtsc::xtsc_address virtual_address8,

xtsc::xtsc_address physical_address8, xtsc::u32 size8, xtsc::u8 ∗
buffer) [virtual]

See also:
xtsc::xtsc_debug_if

Reimplemented from xtsc_debug_if.

7.126.2.4 virtual bool nb_poke_coherent (xtsc::xtsc_address virtual_address8,

xtsc::xtsc_address physical_address8, xtsc::u32 size8, const xtsc::u8 ∗
buffer) [virtual]

See also:
xtsc::xtsc_debug_if

Reimplemented from xtsc_debug_if.

7.126.2.5 virtual bool nb_fast_access (xtsc::xtsc_fast_access_request & request)

[virtual]

See also:
xtsc::xtsc_debug_if

Implements xtsc_debug_if.

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 Chapter 7. Class Documentation

7.126.2.6 void nb_request (const xtsc::xtsc_request & request) [virtual]

See also:
xtsc::xtsc_request_if

Implements xtsc_request_if.

7.126.2.7 void nb_load_retired (xtsc::xtsc_address address8) [virtual]

See also:
xtsc::xtsc_request_if

Reimplemented from xtsc_request_if.

7.126.2.8 void nb_retire_flush () [virtual]

See also:
xtsc::xtsc_request_if

Reimplemented from xtsc_request_if.

7.126.2.9 void nb_lock (bool lock) [virtual]

See also:
xtsc::xtsc_request_if

Reimplemented from xtsc_request_if.

The documentation for this class was generated from the following file:

• xtsc_router.h

Xtensa SystemC (XTSC) Reference Manual 947

Chapter 7. Class Documentation

7.127 xtsc_request_if_impl Class Reference

Implementation of xtsc_request_if.
#include <xtsc/xtsc_arbiter.h>Inheritance diagram for xtsc_request_if_impl:

xtsc_debug_if

xtsc_request_if

xtsc_request_if_impl

Collaboration diagram for xtsc_request_if_impl:

xtsc_connection_interface
xtsc_module

xtsc_resettable
xtsc_command_handler_interface

m_responses
m_stream_dumper m_response
xtsc_response response_info
m_p_nascent_response
m_p_response xtsc_respond_if
stream_dumper
m_p_nascent_request
m_stream_dumper m_p_first_request_info req_rsp_info m_arbiter xtsc_respond_if_impl
m_request m_req_rsp_table
xtsc_request request_info
m_requests xtsc_arbiter m_respond_impl

m_arbiter_parms

xtsc_parms xtsc_arbiter_parms
m_request_impl

xtsc_debug_if xtsc_request_if xtsc_request_if_impl m_arbiter

Public Member Functions

• xtsc_request_if_impl (const char ∗object_name, xtsc_arbiter &arbiter, xtsc::u32

port_num)
Constructor.

• virtual void nb_request (const xtsc::xtsc_request &request)

948 Xtensa SystemC (XTSC) Reference Manual

 Chapter 7. Class Documentation

• virtual void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗buffer)

• virtual void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8
∗buffer)
• virtual bool nb_peek_coherent (xtsc::xtsc_address virtual_address8, xtsc::xtsc_-
address physical_address8, xtsc::u32 size8, xtsc::u8 ∗buffer)
• virtual bool nb_poke_coherent (xtsc::xtsc_address virtual_address8, xtsc::xtsc_-
address physical_address8, xtsc::u32 size8, const xtsc::u8 ∗buffer)
• virtual bool nb_fast_access (xtsc::xtsc_fast_access_request &request)
• virtual void nb_load_retired (xtsc::xtsc_address address8)
• virtual void nb_retire_flush ()
• virtual void nb_lock (bool lock)

Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

SystemC callback when something binds to us.

Protected Attributes

• xtsc_arbiter & m_arbiter

Our xtsc_arbiter object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

• xtsc::u32 m_port_num
Our port number.

7.127.1 Detailed Description

Implementation of xtsc_request_if.
Definition at line 1143 of file xtsc_arbiter.h.

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Chapter 7. Class Documentation

7.127.2 Constructor & Destructor Documentation

7.127.2.1 xtsc_request_if_impl (const char ∗ object_name, xtsc_arbiter & arbiter,

xtsc::u32 port_num) [inline]

Constructor.

Parameters:
arbiter A reference to the owning xtsc_arbiter object.
port_num The port number that this object serves.

Definition at line 1151 of file xtsc_arbiter.h.

7.127.3 Member Function Documentation

7.127.3.1 virtual void nb_request (const xtsc::xtsc_request & request) [virtual]

See also:
xtsc::xtsc_request_if

Implements xtsc_request_if.

7.127.3.2 virtual void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8,

xtsc::u8 ∗ buffer) [virtual]

See also:
xtsc::xtsc_debug_if

Implements xtsc_debug_if.

7.127.3.3 virtual void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8,

const xtsc::u8 ∗ buffer) [virtual]

See also:
xtsc::xtsc_debug_if

Implements xtsc_debug_if.

950 Xtensa SystemC (XTSC) Reference Manual

 Chapter 7. Class Documentation

7.127.3.4 virtual bool nb_peek_coherent (xtsc::xtsc_address virtual_address8,

xtsc::xtsc_address physical_address8, xtsc::u32 size8, xtsc::u8 ∗
buffer) [virtual]

See also:
xtsc::xtsc_debug_if

Reimplemented from xtsc_debug_if.

7.127.3.5 virtual bool nb_poke_coherent (xtsc::xtsc_address virtual_address8,

xtsc::xtsc_address physical_address8, xtsc::u32 size8, const xtsc::u8 ∗
buffer) [virtual]

See also:
xtsc::xtsc_debug_if

Reimplemented from xtsc_debug_if.

7.127.3.6 virtual bool nb_fast_access (xtsc::xtsc_fast_access_request & request)

[virtual]

See also:
xtsc::xtsc_debug_if

Implements xtsc_debug_if.

7.127.3.7 virtual void nb_load_retired (xtsc::xtsc_address address8) [virtual]

See also:
xtsc::xtsc_request_if

Reimplemented from xtsc_request_if.

7.127.3.8 virtual void nb_retire_flush () [virtual]

See also:
xtsc::xtsc_request_if

Reimplemented from xtsc_request_if.

Xtensa SystemC (XTSC) Reference Manual 951

Chapter 7. Class Documentation

7.127.3.9 virtual void nb_lock (bool lock) [virtual]

See also:
xtsc::xtsc_request_if

Reimplemented from xtsc_request_if.

The documentation for this class was generated from the following file:

• xtsc_arbiter.h

952 Xtensa SystemC (XTSC) Reference Manual

 Chapter 7. Class Documentation

7.128 xtsc_request_if_impl Class Reference

Implementation of xtsc_request_if.
#include <xtsc/xtsc_memory_trace.h>Inheritance diagram for xtsc_request_if_impl:

xtsc_debug_if

xtsc_request_if

xtsc_request_if_impl

Collaboration diagram for xtsc_request_if_impl:

xtsc_debug_if

xtsc_connection_interface xtsc_resettable xtsc_request_if

xtsc_module xtsc_command_handler_interface xtsc_request_if_impl

m_request_impl m_trace

xtsc_respond_if xtsc_memory_trace

m_trace m_respond_impl

xtsc_respond_if_impl

Xtensa SystemC (XTSC) Reference Manual 953

Chapter 7. Class Documentation

Public Member Functions

• xtsc_request_if_impl (const char ∗object_name, xtsc_memory_trace &trace,
xtsc::u32 port_num)
Constructor.

• virtual void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗buffer)

• virtual void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8
∗buffer)
• virtual bool nb_peek_coherent (xtsc::xtsc_address virtual_address8, xtsc::xtsc_-
address physical_address8, xtsc::u32 size8, xtsc::u8 ∗buffer)
• virtual bool nb_poke_coherent (xtsc::xtsc_address virtual_address8, xtsc::xtsc_-
address physical_address8, xtsc::u32 size8, const xtsc::u8 ∗buffer)
• virtual bool nb_fast_access (xtsc::xtsc_fast_access_request &request)
• virtual void nb_request (const xtsc::xtsc_request &request)
• virtual void nb_load_retired (xtsc::xtsc_address address8)
• virtual void nb_retire_flush ()
• virtual void nb_lock (bool lock)
• bool is_connected ()
Return true if a port has bound to this implementation.

Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to us.

Protected Attributes
• xtsc_memory_trace & m_trace
Our xtsc_memory_trace object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

• xtsc::u32 m_port_num
Our port number.

• xtsc::u64 m_nb_request_count
Count the nb_request calls on each port.

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 Chapter 7. Class Documentation

• xtsc::u32 m_address8
Byte address.

• sc_dt::sc_unsigned m_data
Data.

• xtsc::u32 m_size8
Byte size of each transfer.

• xtsc::u32 m_pif_attribute
PIF request attribute of each transfer.

• xtsc::u32 m_route_id
Route ID for arbiters.

• xtsc::u8 m_type
Request type (READ, BLOCK_READ, etc).

• xtsc::u32 m_num_transfers
Number of transfers.

• xtsc::u16 m_byte_enables
Byte enables.

• xtsc::u8 m_id
PIF ID.

• xtsc::u8 m_priority
Transaction priority.

• bool m_last_transfer
True if last transfer of request.

• xtsc::u32 m_pc
Program counter associated with request.

• xtsc::u64 m_tag
Unique tag per request-response set.

• bool m_instruction_fetch
True if request is for an instruction fetch, otherwise false.

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Chapter 7. Class Documentation

• xtsc::u8 m_coherence
Cache Coherence information.

• xtsc::u32 m_snoop_virtual_address
Virtual address for snoop controller (future use).

• xtsc::u32 m_hw_address8
Address that would appear in hardware.

• xtsc::u32 m_transfer_num
Number of this transfer.

7.128.1 Detailed Description

Implementation of xtsc_request_if.
Definition at line 855 of file xtsc_memory_trace.h.

7.128.2 Constructor & Destructor Documentation

7.128.2.1 xtsc_request_if_impl (const char ∗ object_name, xtsc_memory_trace &

trace, xtsc::u32 port_num)

Constructor.
Parameters:
object_name The name of this SystemC channel (aka implementation)
trace A reference to the owning xtsc_memory_trace object.
port_num The port number that this object represents.

7.128.3 Member Function Documentation

7.128.3.1 virtual void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8,

xtsc::u8 ∗ buffer) [virtual]

See also:
xtsc::xtsc_debug_if

Implements xtsc_debug_if.

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 Chapter 7. Class Documentation

7.128.3.2 virtual void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8,

const xtsc::u8 ∗ buffer) [virtual]

See also:
xtsc::xtsc_debug_if

Implements xtsc_debug_if.

7.128.3.3 virtual bool nb_peek_coherent (xtsc::xtsc_address virtual_address8,

xtsc::xtsc_address physical_address8, xtsc::u32 size8, xtsc::u8 ∗
buffer) [virtual]

See also:
xtsc::xtsc_debug_if

Reimplemented from xtsc_debug_if.

7.128.3.4 virtual bool nb_poke_coherent (xtsc::xtsc_address virtual_address8,

xtsc::xtsc_address physical_address8, xtsc::u32 size8, const xtsc::u8 ∗
buffer) [virtual]

See also:
xtsc::xtsc_debug_if

Reimplemented from xtsc_debug_if.

7.128.3.5 virtual bool nb_fast_access (xtsc::xtsc_fast_access_request & request)

[virtual]

See also:
xtsc::xtsc_debug_if

Implements xtsc_debug_if.

7.128.3.6 virtual void nb_request (const xtsc::xtsc_request & request) [virtual]

See also:
xtsc::xtsc_request_if

Implements xtsc_request_if.

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7.128.3.7 virtual void nb_load_retired (xtsc::xtsc_address address8) [virtual]

See also:
xtsc::xtsc_request_if

Reimplemented from xtsc_request_if.

7.128.3.8 virtual void nb_retire_flush () [virtual]

See also:
xtsc::xtsc_request_if

Reimplemented from xtsc_request_if.

7.128.3.9 virtual void nb_lock (bool lock) [virtual]

See also:
xtsc::xtsc_request_if

Reimplemented from xtsc_request_if.

7.128.4 Member Data Documentation

7.128.4.1 xtsc::u8 m_coherence [protected]

Cache Coherence information.

See also:
xtsc::xtsc_request::coherence_t

Definition at line 928 of file xtsc_memory_trace.h.

The documentation for this class was generated from the following file:

• xtsc_memory_trace.h

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 Chapter 7. Class Documentation

7.129 xtsc_rer_lookup_if_impl Class Reference

Implementation of xtsc_lookup_if for RER port.

#include <xtsc/xtsc_udma.h>Inheritance diagram for xtsc_rer_lookup_if_impl:

xtsc_lookup_if

xtsc_rer_lookup_if_impl

Collaboration diagram for xtsc_rer_lookup_if_impl:

xtsc_lookup_if m_udma xtsc_wer_lookup_if_impl

xtsc_mode_switch_if

m_wer_lookup_impl
xtsc_command_handler_interface

m_udma m_udma
xtsc_rer_lookup_if_impl
m_rer_lookup_impl m_ram_respond_impl
xtsc_udma xtsc_ram_respond_if_impl
m_descriptor m_pif_respond_impl
udma_descriptor
m_udma_parms

xtsc_parms xtsc_udma_parms m_udma

xtsc_respond_if xtsc_pif_respond_if_impl
xtsc_resettable xtsc_module m_pif_response
m_ram_response

xtsc_connection_interface

xtsc_response m_p_response
stream_dumper
m_stream_dumper

Public Member Functions

• xtsc_rer_lookup_if_impl (const char ∗object_name, xtsc_udma &udma)
Constructor.

• void nb_send_address (const sc_dt::sc_unsigned &address)

• bool nb_is_ready ()
• sc_dt::sc_unsigned nb_get_data ()
• u32 nb_get_address_bit_width ()

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Chapter 7. Class Documentation

• u32 nb_get_data_bit_width ()
• virtual const sc_core::sc_event & default_event () const
Get the event that will be notified when the lookup data is available.

Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

SystemC callback when something binds to us.

Protected Attributes

• xtsc_udma & m_udma

Our xtsc_udma object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.129.1 Detailed Description

Implementation of xtsc_lookup_if for RER port.

Definition at line 558 of file xtsc_udma.h.

7.129.2 Member Function Documentation

7.129.2.1 void nb_send_address (const sc_dt::sc_unsigned & address)

[virtual]

See also:
xtsc::xtsc_lookup_if

Implements xtsc_lookup_if.

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7.129.2.2 bool nb_is_ready () [virtual]

See also:
xtsc::xtsc_lookup_if

Reimplemented from xtsc_lookup_if.

7.129.2.3 sc_dt::sc_unsigned nb_get_data () [virtual]

See also:
xtsc::xtsc_lookup_if

Implements xtsc_lookup_if.

7.129.2.4 u32 nb_get_address_bit_width () [inline, virtual]

See also:
xtsc::xtsc_lookup_if

Implements xtsc_lookup_if.
Definition at line 578 of file xtsc_udma.h.

7.129.2.5 u32 nb_get_data_bit_width () [inline, virtual]

See also:
xtsc::xtsc_lookup_if

Implements xtsc_lookup_if.
Definition at line 581 of file xtsc_udma.h.
The documentation for this class was generated from the following file:

• xtsc_udma.h

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Chapter 7. Class Documentation

7.130 xtsc_resettable Class Reference

Interface for objects which can be reset.

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 Chapter 7. Class Documentation

#include <xtsc/xtsc.h>Inheritance diagram for xtsc_resettable:

xtsc_core

xtsc_tx_loader

xtsc_udma

xtsc_arbiter

xtsc_lookup

xtsc_lookup_driver

xtsc_lookup_pin

xtsc_master

xtsc_master_tlm2

xtsc_cache

xtsc_memory

xtsc_dma_engine
xtsc_memory_pin

xtsc_memory_tlm2

xtsc_memory_trace

xtsc_mmio

xtsc_resettable xtsc_module

xtsc_pin2tlm_lookup_transactor

xtsc_pin2tlm_memory_transactor

xtsc_queue

xtsc_queue_consumer

xtsc_queue_pin

xtsc_queue_producer

Xtensa SystemC (XTSC) Reference Manual 963

xtsc_router
Chapter 7. Class Documentation

Public Member Functions

• virtual void reset (bool hard_reset)=0
Reset the object.

Private Member Functions

• xtsc_resettable (const xtsc_resettable &)
• xtsc_resettable & operator= (const xtsc_resettable &)

7.130.1 Detailed Description

Interface for objects which can be reset. Note: If a component has any SystenC thread
processes, then those processes may need to be restarted in order to get a clean reset.
SystemC 2.3 provides mechanisms for doing this that were previously not available.
Here is a 6-step idiom for adding thread process reset to an xtsc_module (for an exam-
ple, see m_process_handles, sc_unwind_exception, reset_fifos(), and cancel() in xtsc_-
component::xtsc_arbiter):
1) Add member:

std::vector<sc_core::sc_thread_process> m_process_handles;

2) Add the newly created process to m_process_handles table immediately after each de-
sired SC_THREAD() macro or declare_thread_process() invocation. For example, change
this:

SC_THREAD(worker_thread);

To this:

SC_THREAD(worker_thread); m_process_handles.push_back(sc_get_current_process_handle());

3) In the modules xtsc_resettable::reset() implementation, add a call to xtsc_reset_-

processes():

xtsc_reset_processes(m_process_handles);

4) In the modules xtsc_resettable::reset() implementation, call cancel() on any applicable

sc_event objects and call cancel_all() on any applicable sc_event_queue objects. For ex-
ample:

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 Chapter 7. Class Documentation

m_arbiter_thread_event.cancel();

5) Catch and rethrow sc_unwind_exception in each applicable SystemC thread process. In

the XTSC components, this means changing this:

catch (const exception& error) { ... }

To this:

catch (const sc_unwind_exception& error) { throw; }

catch (const exception& error) { ... }

Typically, the catch clause should either not log or should only log at verbose or debug level
because xtsc_reset_processes() will log each process that is reset.
6) Reset any applicable thread state. This may involve emptying standard library con-
tainer and/or sc_fifo instances. Note that an element cannot be removed from an sc_fifo
in the same delta cycle in which it was added, so the general case may require waiting a
delta cycle which should NOT be done from the reset() method. One technique is to do a
wait(SC_ZERO_TIME) when first entering an SC_THREAD and then emptying any desired
sc_fifo objects. For an example, see xtsc_component::xtsc_arbiter::reset_fifos().

See also:
xtsc_reset_processes()
xtsc_reset

Definition at line 5042 of file xtsc.h.

The documentation for this class was generated from the following file:

• xtsc.h

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7.131 xtsc_respond_if Class Reference

Interface for sending responses from a memory interface slave back to the requesting mem-
ory interface master.
#include <xtsc/xtsc_respond_if.h>Inheritance diagram for xtsc_respond_if:

xtsc_respond_if

xtsc_pif_respond_if_impl xtsc_ram_respond_if_impl xtsc_respond_if_impl xtsc_master

Public Member Functions

• virtual bool nb_respond (const xtsc_response &response)=0

This is method is used by a slave module to either reject the master module’s request
(xtsc_response::get_status() == xtsc_response::RSP_NACC) or to respond to that request
(xtsc_response::get_status() != xtsc_response::RSP_NACC).

7.131.1 Detailed Description

Interface for sending responses from a memory interface slave back to the requesting
memory interface master. This interface is for communication from a memory interface
slave module (for example, xtsc_component::xtsc_memory) back to the memory interface
master module (for example, xtsc_core)
Every memory interface master must have two ports. These two ports are referred to
thoughtout the XTSC documentation as a "memory interface master port pair" or simply a
"master port pair". They are:

1. sc_port <xtsc_request_if> (for sending requests)

2. sc_export<xtsc_respond_if> (for receiving responses)

Correspondingly, every memory interface slave must have two ports. These two ports are
referred to thoughtout the XTSC documentation as a "memory interface slave port pair" or
simply a "slave port pair". They are:

1. sc_export<xtsc_request_if> (for receiving requests)

2. sc_port <xtsc_respond_if> (for sending responses)

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For more information, please see xtsc_request_if.

Note: The methods of xtsc_respond_if are all non-blocking in the OSCI TLM sense. That
is, they must NEVER call wait() either directly or indirectly. The "nb_" method prefix stands
for Non-Blocking.

See also:
xtsc_response
xtsc_request_if
xtsc_request
xtsc_core::How_to_do_port_binding
xtsc_core::Information_on_memory_interface_protocols.
xtsc_component::xtsc_arbiter
xtsc_component::xtsc_dma_engine
xtsc_component::xtsc_master
xtsc_component::xtsc_memory
xtsc_component::xtsc_router
xtsc_component::xtsc_slave

Definition at line 66 of file xtsc_respond_if.h.

7.131.2 Member Function Documentation

7.131.2.1 virtual bool nb_respond (const xtsc_response & response) [pure

virtual]

This is method is used by a slave module to either reject the master module’s request
(xtsc_response::get_status() == xtsc_response::RSP_NACC) or to respond to that request
(xtsc_response::get_status() != xtsc_response::RSP_NACC). In the latter case, if the mas-
ter module is busy and cannot accept the response during the current clock cycle, the
master module should return false to the nb_respond() call.

Parameters:
response The xtsc_response object.

Note: If nb_respond() is called with status == xtsc_response::RSP_NACC (which indicates

the slave module is busy and cannot accept the request), then nb_respond() must return
true. This allows nb_respond() with a status of xtsc_response::RSP_NACC to be called
from xtsc_request_if::nb_request(). Typically, the nb_respond() method should not be
called from xtsc_request_if::nb_request() with a status of other than xtsc_response::RSP_-
NACC. An exception to this rule is when the module is being operated in untimed mode
(e.g. see parameter "immediate_timing" in xtsc_component::xtsc_memory_parms); how-
ever, in this case the module should throw an exception if the nb_respond() call returns
false.

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Chapter 7. Class Documentation

Note: The caller module owns the response object. If the callee module needs access to
the response after returning from the nb_respond() call, then the callee module must make
its own copy of the response object.
This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).

See also:
xtsc_response
xtsc_core::Information_on_memory_interface_protocols for protocol and timing issues
specific to xtsc_core.

Implemented in xtsc_respond_if_impl, xtsc_respond_if_impl, xtsc_respond_if_impl,

xtsc_master, xtsc_respond_if_impl, xtsc_respond_if_impl, xtsc_respond_if_impl, xtsc_-
respond_if_impl, xtsc_ram_respond_if_impl, and xtsc_pif_respond_if_impl.
The documentation for this class was generated from the following file:

• xtsc_respond_if.h

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 Chapter 7. Class Documentation

7.132 xtsc_respond_if_impl Class Reference

Implementation of xtsc_respond_if. Inheritance diagram for xtsc_respond_if_impl:

xtsc_respond_if

xtsc_respond_if_impl

Collaboration diagram for xtsc_respond_if_impl:

xtsc_connection_interface
xtsc_module
m_transactor
xtsc_resettable
m_id_to_transaction_info_tab transaction_info
xtsc_command_handler_interface
xtsc_tlm22xttlm_transactor m_transactor
m_xtsc_respond_if_impl

tlm_fw_transport_if_impl
xtsc_respond_if xtsc_respond_if_impl m_transactor m_tlm_fw_transport_if_impl

Public Member Functions

• xtsc_respond_if_impl (const char ∗object_name, xtsc_tlm22xttlm_transactor &trans-

actor, xtsc::u32 port_num)
Constructor.

• const char ∗ kind () const

The kind of sc_object we are.

• bool nb_respond (const xtsc::xtsc_response &response)

From downstream slave.

• bool is_connected ()
Return true if a port has been bound to this implementation.

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Chapter 7. Class Documentation

Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to us.

Protected Attributes
• xtsc_tlm22xttlm_transactor & m_transactor
Our xtsc_tlm22xttlm_transactor object.

• xtsc::u32 m_port_num
Our port number.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.132.1 Detailed Description

Implementation of xtsc_respond_if.
Definition at line 431 of file xtsc_tlm22xttlm_transactor.h.

7.132.2 Member Function Documentation

7.132.2.1 bool nb_respond (const xtsc::xtsc_response & response) [virtual]

From downstream slave.

See also:
xtsc::xtsc_respond_if

Implements xtsc_respond_if.
The documentation for this class was generated from the following file:

• xtsc_tlm22xttlm_transactor.h

970 Xtensa SystemC (XTSC) Reference Manual

 Chapter 7. Class Documentation

7.133 xtsc_respond_if_impl Class Reference

Implementation of xtsc_respond_if.
#include <xtsc/xtsc_router.h>Inheritance diagram for xtsc_respond_if_impl:

xtsc_respond_if

xtsc_respond_if_impl

Collaboration diagram for xtsc_respond_if_impl:

m_respond_impl
xtsc_respond_if xtsc_respond_if_impl

m_router
xtsc_connection_interface xtsc_module

xtsc_resettable xtsc_command_handler_interface

m_responses
response_info m_p_nascent_response

m_response m_p_nascent_request req_rsp_info m_req_rsp_table

m_p_first_request_info
m_requests xtsc_router m_request_impl

m_request request_info
m_filtered_request m_router xtsc_request_if_impl
m_p_response m_stream_dumper
xtsc_response stream_dumper xtsc_request
m_stream_dumper

m_filtered_response

m_file
xtsc_script_file

m_router_parms
xtsc_parms xtsc_router_parms xtsc_request_if

xtsc_debug_if

Public Member Functions

• xtsc_respond_if_impl (const char ∗object_name, xtsc_router &router, xtsc::u32 port_-

num)
Constructor.

• bool nb_respond (const xtsc::xtsc_response &response)

Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

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Chapter 7. Class Documentation

SystemC callback when something binds to us.

Protected Attributes
• xtsc_router & m_router
Our xtsc_router object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

• xtsc::u32 m_port_num
Our port number.

7.133.1 Detailed Description

Implementation of xtsc_respond_if.
Definition at line 1214 of file xtsc_router.h.

7.133.2 Constructor & Destructor Documentation

7.133.2.1 xtsc_respond_if_impl (const char ∗ object_name, xtsc_router & router,

xtsc::u32 port_num) [inline]

Constructor.

Parameters:
router A reference to the owning xtsc_router object.
port_num The port number that this object represents.

Definition at line 1222 of file xtsc_router.h.

7.133.3 Member Function Documentation

7.133.3.1 bool nb_respond (const xtsc::xtsc_response & response) [virtual]

See also:
xtsc::xtsc_respond_if

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 Chapter 7. Class Documentation

Implements xtsc_respond_if.
The documentation for this class was generated from the following file:

• xtsc_router.h

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Chapter 7. Class Documentation

7.134 xtsc_respond_if_impl Class Reference

Implementation of xtsc_respond_if.
#include <xtsc/xtsc_memory_trace.h>Inheritance diagram for xtsc_respond_if_impl:

xtsc_respond_if

xtsc_respond_if_impl

Collaboration diagram for xtsc_respond_if_impl:

xtsc_connection_interface xtsc_resettable xtsc_respond_if

xtsc_debug_if xtsc_module xtsc_command_handler_interface xtsc_respond_if_impl

m_respond_impl m_trace

xtsc_request_if xtsc_memory_trace

m_trace m_request_impl

xtsc_request_if_impl

Public Member Functions

• xtsc_respond_if_impl (const char ∗object_name, xtsc_memory_trace &trace,

xtsc::u32 port_num)
Constructor.

• bool nb_respond (const xtsc::xtsc_response &response)

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 Chapter 7. Class Documentation

Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

SystemC callback when something binds to us.

Protected Attributes

• xtsc_memory_trace & m_trace

Our xtsc_memory_trace object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

• xtsc::u32 m_port_num
Our port number.

• xtsc::u64 m_nb_respond_count
Count the nb_respond calls on each port.

• xtsc::u64 m_rsp_busy_count
Count the nb_respond calls on each port that are rejected (return false).

• xtsc::u64 m_rsp_ok_count
Count the nb_respond calls on each port that are RSP_OK.

• xtsc::u64 m_rsp_nacc_count
Count the nb_respond calls on each port that are RSP_NACC.

• xtsc::u64 m_rsp_data_err_count
Count the nb_respond calls on each port that are RSP_DATA_ERROR.

• xtsc::u64 m_rsp_addr_err_count
Count the nb_respond calls on each port that are RSP_ADDRESS_ERROR.

• xtsc::u64 m_rsp_a_d_err_count
Count the nb_respond calls on each port that are RSP_ADDRESS_DATA_ERROR.

• xtsc::u32 m_address8
Starting byte address.

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Chapter 7. Class Documentation

• sc_dt::sc_unsigned m_data
Data.

• xtsc::u32 m_size8
Byte size of each transfer.

• xtsc::u32 m_route_id
Route ID for arbiters.

• xtsc::u8 m_status
Response status.

• xtsc::u8 m_id
PIF ID.

• xtsc::u8 m_priority
Transaction priority.

• bool m_last_transfer
True if last transfer of response.

• xtsc::u32 m_pc
Program counter associated with request.

• xtsc::u64 m_tag
Unique tag per request-response set.

• bool m_snoop
True if this is a snoop response, otherwise false (future use).

• bool m_snoop_data
True if this is a snoop response with data, otherwise false (future use).

• xtsc::u8 m_coherence
Cache Coherence information.

7.134.1 Detailed Description

Implementation of xtsc_respond_if.
Definition at line 937 of file xtsc_memory_trace.h.

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7.134.2 Constructor & Destructor Documentation

7.134.2.1 xtsc_respond_if_impl (const char ∗ object_name, xtsc_memory_trace &

trace, xtsc::u32 port_num)

Constructor.

Parameters:
object_name The name of this SystemC channel (aka implementation)
trace A reference to the owning xtsc_memory_trace object.
port_num The port number that this object represents.

7.134.3 Member Function Documentation

7.134.3.1 bool nb_respond (const xtsc::xtsc_response & response) [virtual]

See also:
xtsc::xtsc_respond_if

Implements xtsc_respond_if.

7.134.4 Member Data Documentation

7.134.4.1 xtsc::u8 m_coherence [protected]

Cache Coherence information.

See also:
xtsc::xtsc_response::coherence_t

Definition at line 981 of file xtsc_memory_trace.h.

The documentation for this class was generated from the following file:

• xtsc_memory_trace.h

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Chapter 7. Class Documentation

7.135 xtsc_respond_if_impl Class Reference

Implementation of xtsc_respond_if.
#include <xtsc/xtsc_arbiter.h>Inheritance diagram for xtsc_respond_if_impl:

xtsc_respond_if

xtsc_respond_if_impl

Collaboration diagram for xtsc_respond_if_impl:

xtsc_debug_if

xtsc_connection_interface
xtsc_request_if
xtsc_module
xtsc_resettable
xtsc_command_handler_interface

m_responses
m_stream_dumper m_response
xtsc_response response_info xtsc_request_if_impl
m_p_nascent_response m_arbiter

stream_dumper m_p_response
m_p_nascent_request m_req_rsp_table m_request_impl
req_rsp_info xtsc_arbiter
m_stream_dumper m_p_first_request_info
m_request
xtsc_request request_info m_requests

m_arbiter_parms

xtsc_parms xtsc_arbiter_parms
m_respond_impl

xtsc_respond_if xtsc_respond_if_impl m_arbiter

Public Member Functions

• xtsc_respond_if_impl (const char ∗object_name, xtsc_arbiter &arbiter)
Constructor.

• bool nb_respond (const xtsc::xtsc_response &response)

Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to us.

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Protected Attributes
• xtsc_arbiter & m_arbiter
Our xtsc_arbiter object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.135.1 Detailed Description

Implementation of xtsc_respond_if.
Definition at line 1205 of file xtsc_arbiter.h.

7.135.2 Member Function Documentation

7.135.2.1 bool nb_respond (const xtsc::xtsc_response & response) [virtual]

See also:
xtsc::xtsc_respond_if

Implements xtsc_respond_if.
The documentation for this class was generated from the following file:

• xtsc_arbiter.h

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7.136 xtsc_respond_if_impl Class Reference

Implementation of xtsc_respond_if.
#include <xtsc/xtsc_pin2tlm_memory_transactor.h>Inheritance diagram for xtsc_-
respond_if_impl:

xtsc_respond_if

xtsc_respond_if_impl

Collaboration diagram for xtsc_respond_if_impl:

xtsc_connection_interface xtsc_resettable xtsc_respond_if

xtsc_module xtsc_module_pin_base subbank_activity xtsc_respond_if_impl

m_subbank_activity m_respond_impl m_pin2tlm

xtsc_debug_if xtsc_pin2tlm_memory_transactor

m_pin2tlm m_debug_impl

xtsc_debug_if_impl

Public Member Functions

• xtsc_respond_if_impl (const char ∗object_name, xtsc_pin2tlm_memory_transactor
&pin2tlm, xtsc::u32 port_num)
Constructor.

• const char ∗ kind () const

The kind of sc_object we are.

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• bool nb_respond (const xtsc::xtsc_response &response)

• bool is_connected ()
Return true if a port has been bound to this implementation.

Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

SystemC callback when something binds to us.

Protected Attributes

• xtsc_pin2tlm_memory_transactor & m_pin2tlm

Our xtsc_pin2tlm_memory_transactor object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

• xtsc::u32 m_port_num
Our port number.

• xtsc::u32 m_busy_port
For DRAM0BS|DRAM1BS, port num of the 0th subbank, otherwise same as m_port_num.

• xtsc::u32 m_bank
Which bank.

7.136.1 Detailed Description

Implementation of xtsc_respond_if.
Definition at line 741 of file xtsc_pin2tlm_memory_transactor.h.

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7.136.2 Member Function Documentation

7.136.2.1 bool nb_respond (const xtsc::xtsc_response & response) [virtual]

See also:
xtsc::xtsc_respond_if

Implements xtsc_respond_if.
The documentation for this class was generated from the following file:

• xtsc_pin2tlm_memory_transactor.h

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7.137 xtsc_respond_if_impl Class Reference

Implementation of xtsc_respond_if.
#include <xtsc/xtsc_cache.h>Inheritance diagram for xtsc_respond_if_impl:

xtsc_respond_if

xtsc_respond_if_impl

Collaboration diagram for xtsc_respond_if_impl:

m_request

line_info
m_lines

xtsc_cache_parms
xtsc_parms xtsc_memory_parms m_cache_parms

m_respond_impl xtsc_cache
m_memory_parms xtsc_respond_if_impl

xtsc_respond_if m_cache
m_p_block_read_response
m_p_single_response
m_p_block_write_response
m_stream_dumper xtsc_response
m_p_request stream_dumper
m_filtered_response
m_p_active_response
m_stream_dumper xtsc_fast_access_if
xtsc_request
xtsc_resettable
m_fast_access_object
xtsc_module

xtsc_connection_interface
xtsc_command_handler_interface
xtsc_memory
m_memory
m_p_exclusive_script_stream
m_p_script_stream m_request_impl
xtsc_request_if_impl

xtsc_script_file m_p_initial_value_file m_p_memory

xtsc_memory_b

m_filtered_request

m_request xtsc_request_if
m_p_active_request_info
request_info

xtsc_debug_if

Public Member Functions

• xtsc_respond_if_impl (const char ∗object_name, xtsc_cache &cache)

Constructor.

• bool nb_respond (const xtsc::xtsc_response &response)

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Used by downstream slaves to respond to our PIF requests.

Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to us.

Protected Attributes
• xtsc_cache & m_cache
Our xtsc_cache object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.137.1 Detailed Description

Implementation of xtsc_respond_if.
Definition at line 348 of file xtsc_cache.h.

7.137.2 Member Function Documentation

7.137.2.1 bool nb_respond (const xtsc::xtsc_response & response) [virtual]

Used by downstream slaves to respond to our PIF requests.

See also:
xtsc::xtsc_respond_if

Implements xtsc_respond_if.
The documentation for this class was generated from the following file:

• xtsc_cache.h

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7.138 xtsc_respond_if_impl Class Reference

Implementation of xtsc_respond_if.
#include <xtsc/xtsc_dma_engine.h>Inheritance diagram for xtsc_respond_if_impl:

xtsc_respond_if

xtsc_respond_if_impl

Collaboration diagram for xtsc_respond_if_impl:

m_dma
xtsc_respond_if xtsc_respond_if_impl
m_respond_impl

m_request
xtsc_dma_engine

m_p_block_read_response
m_p_single_response
m_p_block_write_response

m_stream_dumper xtsc_response
m_filtered_response
m_stream_dumper stream_dumper m_p_active_response
m_p_exclusive_script_stream
xtsc_request m_p_request m_p_script_stream
xtsc_script_file
m_p_initial_value_file

xtsc_memory_b m_p_memory
m_filtered_request

m_request
m_memory_parms
xtsc_parms xtsc_memory_parms xtsc_memory m_request_impl

m_p_active_request_info
m_memory xtsc_request_if_impl
request_info

m_fast_access_object

xtsc_fast_access_if

xtsc_connection_interface
xtsc_module
xtsc_request_if
xtsc_resettable
xtsc_command_handler_interface

xtsc_debug_if

Public Member Functions

• xtsc_respond_if_impl (const char ∗object_name, xtsc_dma_engine &dma)
Constructor.

• bool nb_respond (const xtsc::xtsc_response &response)

Used by downstream slaves to respond to our PIF requests.

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Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to us.

Protected Attributes
• xtsc_dma_engine & m_dma
Our xtsc_dma_engine object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.138.1 Detailed Description

Implementation of xtsc_respond_if.
Definition at line 472 of file xtsc_dma_engine.h.

7.138.2 Member Function Documentation

7.138.2.1 bool nb_respond (const xtsc::xtsc_response & response) [virtual]

Used by downstream slaves to respond to our PIF requests.

See also:
xtsc::xtsc_respond_if

Implements xtsc_respond_if.
The documentation for this class was generated from the following file:

• xtsc_dma_engine.h

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7.139 xtsc_response Class Reference

Class representing a PIF, XLMI, local memory, or inbound PIF response transfer.
#include <xtsc/xtsc_response.h>Collaboration diagram for xtsc_response:

xtsc_response

m_p_response m_stream_dumper

stream_dumper

Classes
• class stream_dumper
Helper class to make it easy to dump xtsc_response to an ostream with or without data
values.

Public Types
• enum status_t {
RSP_OK = 0,
RSP_ADDRESS_ERROR = 1,
RSP_DATA_ERROR = 2,
RSP_ADDRESS_DATA_ERROR = 3,
RSP_NACC = 4 }
Enumeration used to identify bus errors and busy information.

• enum coherence_t {
EXCLUSIVE = 0,
MODIFIED = 1,
SHARED = 2,
INVALID = EXCLUSIVE,

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NONCOHERENT = EXCLUSIVE,
LAST = SHARED }
Enumeration used to identify cache coherence information.

• typedef enum xtsc::xtsc_response::status_t status_t

Enumeration used to identify bus errors and busy information.

• typedef enum xtsc::xtsc_response::coherence_t coherence_t

Enumeration used to identify cache coherence information.

Public Member Functions

• xtsc_response (const xtsc_request &request, status_t status=RSP_OK, bool last_-
transfer=true)
Constructor.

• xtsc_address get_byte_address () const

Get the starting byte address.

• u32 get_byte_size () const

Get the number of bytes of data in this response’s buffer.

• void set_status (status_t status)

Set the response status.

• status_t get_status () const

Get the response status.

• const char ∗ get_status_name () const

Get a c-string corresponding to this response’s status.

• void set_last_transfer (bool last_transfer)

Set whether or not this is the last transfer of the response.

• bool get_last_transfer () const

Get whether or not this is the last transfer of the response.

• bool is_snoop () const

Return true if this is a snoop response, else return false;.

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• void set_snoop_data (bool snoop_data)

Set whether or not this is a snoop response with data.

• bool has_snoop_data () const

Return true if this is a snoop response with data, else return false.

• void set_coherence (coherence_t coherence)

Set the cache coherence information of this response.

• coherence_t get_coherence () const

Get the cache coherence information of this response.

• void set_pc (xtsc_address pc)

Set the processor program counter (PC) associated with this request.

• xtsc_address get_pc () const

Get the processor program counter (PC) associated with this request.

• void set_route_id (u32 route_id)

Set the route ID.

• u32 get_route_id () const

Get the route ID.

• void set_id (u8 id)

Set the PIF ID.

• u8 get_id () const
Get the PIF ID.

• void set_priority (u8 priority)

Set the priority.

• u8 get_priority () const
Get the priority.

• void set_buffer (const u8 ∗buffer)

Set the response’s transfer buffer (payload).

• const u8 ∗ get_buffer () const

Get a pointer to the response’s transfer data suitable for reading (but not writing) the data.

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• u8 ∗ get_buffer ()
Get a pointer to the response’s transfer data suitable either for reading or writing the data.

• void set_user_data (void ∗user_data)

Set optional user data associated with this response.

• void ∗ get_user_data () const

Get the optional user data associated with this response.

• std::string get_user_data_for_logging (xtsc::u32 num_bytes, const std::string &pre-

fix=" {", const std::string &suffix="}") const
Return a string suitable for logging containing bytes from the optional user data associated
with this response.

• bool get_exclusive_req () const

Get whether or not this response is for an exclusive access request.

• void set_exclusive_ok (bool ok)

Set whether or not the exclusive access request succeeded.

• bool get_exclusive_ok () const

Get whether or not the exclusive access request succeeded.

• u64 get_tag () const

Get this response’s tag.

• void dump (std::ostream &os=std::cout, bool dump_data=true) const

This method dumps this response’s info to the specified ostream object, optionally including
data (if applicable).

• const stream_dumper & show_data (bool show) const

This method makes it easy to dump an xtsc_response to an ostream while programatically
determining whether or not to include the payload data (if any).

Static Public Member Functions

• static const char ∗ get_status_name (status_t status)

Get a c-string corresponding to the specified response status.

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Private Attributes
• xtsc_address m_address8
Starting byte address (artificial).

• u8 m_buffer [xtsc_max_bus_width8]
Data for READ, BLOCK_READ, BURST_READ, RCW, and SNOOP.

• u32 m_size8
Byte size of each transfer (artificial).

• u32 m_route_id
Route ID for arbiters.

• status_t m_status
Response status.

• u8 m_id
PIF ID.

• u8 m_priority
Transaction priority.

• bool m_last_transfer
True if last transfer of response.

• bool m_snoop
True if this is a snoop response, otherwise false.

• bool m_snoop_data
True if this is a snoop response with data, otherwise false.

• bool m_exclusive_req
True if this response is for an exclusive access request.

• bool m_exclusive_ok
True if the exclusive access request was successful.

• coherence_t m_coherence
Cache Coherence information.

• xtsc_address m_pc

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Program counter associated with request (artificial).

• void ∗ m_user_data
Arbitrary data supplied by user.

• u64 m_tag
Unique tag per request-response set (artificial).

Static Private Attributes

• static stream_dumper m_stream_dumper
To assist with printing (dumping).

7.139.1 Detailed Description

Class representing a PIF, XLMI, local memory, or inbound PIF response transfer. The
general 2-step procedure to create a response is:

1. Construct the xtsc_response object using an xtsc_request object.

2. Use the set_buffer() or get_buffer() methods to fill in the data payload. This step
is only needed for responses to READ, BLOCK_READ, BURST_READ, RCW, and
SNOOP request types.

For protocol and timing information specific to xtsc_core, see xtsc_core::Information_on_-

memory_interface_protocols.
Note: SNOOP and coherence_t are reserved for future use

See also:
xtsc_respond_if
xtsc_request_if
xtsc_request
xtsc_core::Information_on_memory_interface_protocols.
xtsc_component::xtsc_arbiter
xtsc_component::xtsc_dma_engine
xtsc_component::xtsc_master
xtsc_component::xtsc_mmio
xtsc_component::xtsc_memory
xtsc_component::xtsc_router
xtsc_component::xtsc_slave

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Definition at line 50 of file xtsc_response.h.

7.139.2 Member Typedef Documentation

7.139.2.1 typedef enum xtsc::xtsc_response::coherence_t coherence_t

Enumeration used to identify cache coherence information. Note: Reserved for future use

7.139.3 Member Enumeration Documentation

7.139.3.1 enum status_t

Enumeration used to identify bus errors and busy information.

Enumerator:
RSP_OK 0 => Okay
RSP_ADDRESS_ERROR 1 => Address error
RSP_DATA_ERROR 2 => Data error
RSP_ADDRESS_DATA_ERROR 3 => Address and data error
RSP_NACC 4 => Transaction not accepted (busy)

Definition at line 56 of file xtsc_response.h.

7.139.3.2 enum coherence_t

Enumeration used to identify cache coherence information. Note: Reserved for future
use

Enumerator:
EXCLUSIVE PIF: May Be Exclusive, Snoop: Invalid, also PIF: Non-coherent request.

MODIFIED PIF: Modified.

SHARED PIF: Must Be Shared, Snoop: Shared.
INVALID alias for Snoop: Invalid
NONCOHERENT alias for PIF: Non-coherent request

Definition at line 70 of file xtsc_response.h.

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7.139.4 Constructor & Destructor Documentation

7.139.4.1 xtsc_response (const xtsc_request & request, status_t status = RSP_OK,

bool last_transfer = true)

Constructor. A response is always constructed starting with a request.

Parameters:
request The request that this response is in response to.
status The response status. See status_t.
last_transfer True if this is the last transfer of the response sequence, otherwise false.
For READ, WRITE, BLOCK_WRITE, BURST_WRITE, and RCW, this is always
true. For BLOCK_READ, BURST_READ, and SNOOP, this is false except for last
response transfer in the sequence of BLOCK_READ, BURST_READ, or SNOOP
response transfers.

Note: Snoop is reserved for future use.

7.139.5 Member Function Documentation

7.139.5.1 xtsc_address get_byte_address () const [inline]

Get the starting byte address. The starting byte address is determined from the xtsc_-
request object used to create this response and it cannot be changed.
Note: This address does not change for multiple BLOCK_READ, BURST_READ, or
SNOOP responses.
Note: For BLOCK_WRITE responses this address is the beginning address of the block.
Note: Snoop is reserved for future use.
Definition at line 109 of file xtsc_response.h.

7.139.5.2 u32 get_byte_size () const [inline]

Get the number of bytes of data in this response’s buffer. This is an artificial field (i.e. not
in real hardware) used for logging/debugging.
Definition at line 116 of file xtsc_response.h.

7.139.5.3 void set_status (status_t status) [inline]

Set the response status.

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See also:
status_t

Definition at line 124 of file xtsc_response.h.

7.139.5.4 status_t get_status () const [inline]

Get the response status.

See also:
status_t

Definition at line 132 of file xtsc_response.h.

7.139.5.5 static const char∗ get_status_name (status_t status) [static]

Get a c-string corresponding to the specified response status.

Parameters:
status The status whose c-string is desired.

7.139.5.6 void set_last_transfer (bool last_transfer) [inline]

Set whether or not this is the last transfer of the response.

Parameters:
last_transfer True if this is the last transfer of the response sequence, otherwise false.
For READ, WRITE, BLOCK_WRITE, BURST_WRITE, and RCW, this is always
true. For BLOCK_READ, BURST_READ, and SNOOP, this is false except for last
response transfer in the sequence of BLOCK_READ, BURST_READ, or SNOOP
response transfers.

Note: Snoop is reserved for future use.

Definition at line 161 of file xtsc_response.h.

7.139.5.7 bool get_last_transfer () const [inline]

Get whether or not this is the last transfer of the response.

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See also:
set_last_transfer

Definition at line 169 of file xtsc_response.h.

7.139.5.8 bool is_snoop () const [inline]

Return true if this is a snoop response, else return false;. Note: Snoop is reserved for
future use.
Definition at line 177 of file xtsc_response.h.

7.139.5.9 void set_snoop_data (bool snoop_data) [inline]

Set whether or not this is a snoop response with data.

Parameters:
snoop_data True if this is a snoop response AND it has data.

Note: Snoop is reserved for future use.

Definition at line 187 of file xtsc_response.h.

7.139.5.10 bool has_snoop_data () const [inline]

Return true if this is a snoop response with data, else return false.

See also:
set_snoop_data

Note: Snoop is reserved for future use.

Definition at line 197 of file xtsc_response.h.

7.139.5.11 void set_coherence (coherence_t coherence) [inline]

Set the cache coherence information of this response.

Parameters:
coherence The coherence information of this response.

Definition at line 205 of file xtsc_response.h.

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7.139.5.12 coherence_t get_coherence () const [inline]

Get the cache coherence information of this response.

See also:
set_coherence

Definition at line 213 of file xtsc_response.h.

7.139.5.13 void set_pc (xtsc_address pc) [inline]

Set the processor program counter (PC) associated with this request.

Parameters:
pc The PC associated with this request. If no meaningful PC can be associated with
the request use 0xFFFFFFFF. This signal is not in the hardware, but is provided
for debugging and logging purposes.

Definition at line 224 of file xtsc_response.h.

7.139.5.14 xtsc_address get_pc () const [inline]

Get the processor program counter (PC) associated with this request.

See also:
set_pc

Definition at line 232 of file xtsc_response.h.

7.139.5.15 void set_route_id (u32 route_id) [inline]

Set the route ID.

Parameters:
route_id Arbiters add bits to the route ID of the corresponding xtsc_request to be able
to route the return response. Terminal devices must echo this field back verbatim
in the response (this is taken care of automatically in the constructor, so terminal
devices do not need to call this method). On the return, an arbiter should clear
its bit field in the route ID of the response before forwarding the response back
upstream. The result should be that the route ID in the response that the arbiter

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sends upstream should match the route ID in the original request received by the
arbiter.

See also:
xtsc_request::set_route_id()

Definition at line 252 of file xtsc_response.h.

7.139.5.16 u32 get_route_id () const [inline]

Get the route ID.

See also:
set_route_id

Definition at line 260 of file xtsc_response.h.

7.139.5.17 void set_id (u8 id) [inline]

Set the PIF ID.

Parameters:
id The PIF ID. Terminal devices must echo this field back verbatim in the response
(this is taken care of automatically in the constructor, so terminal devices typically
do not need to call this method). Master devices are free to use this field to
support multiple outstanding PIF requests.

Definition at line 274 of file xtsc_response.h.

7.139.5.18 u8 get_id () const [inline]

Get the PIF ID.

See also:
set_id

Definition at line 282 of file xtsc_response.h.

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7.139.5.19 void set_priority (u8 priority) [inline]

Set the priority. Hardware only supports priority values of 0-3 (i.e. 2 bits).

Value Meaning
----- -------
0 Low
1 Medium low
2 Medium high
3 High

The Xtensa LX processor issues all PIF requests at medium-high (2) priority and ignores
the priority bits of PIF responses. For responses to inbound PIF requests, the Xtenasa LX
processor sets the response priority equal to the request priority. Default = The priority in
the request used to create this response.
Definition at line 302 of file xtsc_response.h.

7.139.5.20 u8 get_priority () const [inline]

Get the priority.

See also:
set_priority

Definition at line 309 of file xtsc_response.h.

7.139.5.21 void set_buffer (const u8 ∗ buffer) [inline]

Set the response’s transfer buffer (payload). Used only for READ, BLOCK_READ,
BURST_READ, RCW, and SNOOP. Data is arranged in the buffer as follows: Let address8
be the address returned by xtsc_request::get_byte_address(). Let size8 be the transfer
size returned by xtsc_response::get_byte_size().

The byte corresponding to address8+0 is in buffer[0].

The byte corresponding to address8+1 is in buffer[1].
. . .
The byte corresponding to address8+size8-1 is in buffer[size8-1].

This format applies regardless of host and target endianess.

Note: Snoop is reserved for future use.
Definition at line 329 of file xtsc_response.h.

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7.139.5.22 const u8∗ get_buffer () const [inline]

Get a pointer to the response’s transfer data suitable for reading (but not writing) the data.
Used only for READ, BLOCK_READ, BURST_READ, RCW, and SNOOP.

See also:
set_buffer()

Definition at line 338 of file xtsc_response.h.

7.139.5.23 u8∗ get_buffer () [inline]

Get a pointer to the response’s transfer data suitable either for reading or writing the data.
Used only for READ, BLOCK_READ, BURST_READ, RCW, and SNOOP.
The buffer size is 64 bytes to accommodate the widest possible Xtensa memory interface;
however, you should only use the first N bytes where N is the size of the actual memory
interface in use.
Warning: Writing past the 64th byte results in undefined bad behavior.
Note: Snoop is reserved for future use.

See also:
set_buffer()

Definition at line 355 of file xtsc_response.h.

7.139.5.24 void set_user_data (void ∗ user_data) [inline]

Set optional user data associated with this response. Note: User data is neither readable
nor writable by Xtensa Ld/St/iFetch operations.
Note: The default user data in the response is obtained from the user data of the request
from which the response was formed.

Parameters:
user_data Optional user data.

Definition at line 368 of file xtsc_response.h.

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7.139.5.25 void∗ get_user_data () const [inline]

Get the optional user data associated with this response.

See also:
set_user_data

Definition at line 376 of file xtsc_response.h.

7.139.5.26 std::string get_user_data_for_logging (xtsc::u32 num_bytes, const

std::string & prefix = " {", const std::string & suffix = "}") const

Return a string suitable for logging containing bytes from the optional user data associated
with this response.

Parameters:
num_bytes If 0, an empty string is returned. If non-zero, the returned string will begin
with prefix and end with suffix. If positive and m_user_data is not 0 (NULL),
the bytes are taken from the memory pointed to by the user data pointer (user
discretion is advised). If positive and m_user_data is 0, then return string consists
only of the prefix and suffix. If negative, the least significant -num_bytes bytes are
obtained from the user data pointer itself, as shown here:
0xFFFFFFFF or -1: ((u64)p_user_data & 0x00000000000000FF)
0xFFFFFFFE or -2: ((u64)p_user_data & 0x000000000000FFFF)
0xFFFFFFFD or -3: ((u64)p_user_data & 0x0000000000FFFFFF)
0xFFFFFFFC or -4: ((u64)p_user_data & 0x00000000FFFFFFFF)
0xFFFFFFFB or -5: ((u64)p_user_data & 0x000000FFFFFFFFFF)
0xFFFFFFFA or -6: ((u64)p_user_data & 0x0000FFFFFFFFFFFF)
0xFFFFFFF9 or -7: ((u64)p_user_data & 0x00FFFFFFFFFFFFFF)
0xFFFFFFF8 or -8: ((u64)p_user_data & 0xFFFFFFFFFFFFFFFF)

For example, if num_bytes is -3 (0xFFFFFFFD) and m_user_data is 0x12345678

(and prefix and suffix are left at their default values), then this method will return
"{78 56 34}".
prefix Prefix to the user data bytes.
suffix Suffix to the user data bytes.

See also:
set_user_data
get_user_data

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7.139.5.27 bool get_exclusive_req () const [inline]

Get whether or not this response is for an exclusive access request.

See also:
set_exclusive_ok
get_exclusive_ok

Definition at line 423 of file xtsc_response.h.

7.139.5.28 void set_exclusive_ok (bool ok) [inline]

Set whether or not the exclusive access request succeeded.

Parameters:
ok True if the exclusive access request succeeded.

Definition at line 432 of file xtsc_response.h.

7.139.5.29 bool get_exclusive_ok () const [inline]

Get whether or not the exclusive access request succeeded.

See also:
set_exclusive_ok

Definition at line 440 of file xtsc_response.h.

7.139.5.30 u64 get_tag () const [inline]

Get this response’s tag. This is an artificial number (not in hardware) useful for correlating
requests and responses in, for example, a log file. For READ and WRITE, the tag is the
same for a request and its corresponding response. For BLOCK_WRITE and BURST_-
WRITE, the tag is the same for all request transfers and the single response transfer of the
BLOCK_WRITE or BURST_WRITE sequence. For BLOCK_READ, BURST_READ, and
SNOOP, the tag is the same for the single request transfer and all the response transfers in
the block. For RCW, the tag is the same for both request transfers and the single response
transfer. A request that gets RSP_NACC maintains the same tag when the request is
repeated.
Note: Snoop is reserved for future use.
Definition at line 458 of file xtsc_response.h.

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7.139.5.31 void dump (std::ostream & os = std::cout, bool dump_data = true)

const

This method dumps this response’s info to the specified ostream object, optionally including
data (if applicable). The format of the output is:

tag=<Tag> pc=<PC> <Status>*[<Address>/<Coherence>/<ID>]<E>: <Data> <UD>

Where:
<Tag> is m_tag in decimal.
<PC> is m_pc in hexadecimal.
<Status> is RSP_OK|RSP_ADDRESS_ERROR|RSP_DATA_ERROR|
RSP_ADDRESS_DATA_ERROR|RSP_NACC.
* indicates m_last_transfer is true.
<Address> is m_address8 in hexadecimal.
<Coherence> is m_coherence in decimal.
<ID> is m_id in decimal.
<E> is the letter "E" if m_exclusive_ok is true, else is null (not
present).
<Data> is a colon followed by the contents of m_buffer in
hexadecimal (without leading '0x'). This field is only present
if dump_data is true AND m_status is RSP_OK AND m_size8 is non-
zero (indicating this is a response to a READ, BLOCK_READ,
BURST_READ, or RCW request or that m_snoop_data is true).
<UD> is m_user_data (in hex with leading '0x') if non-zero. If
m_user_data is 0, then this field is not present.

Parameters:
os The ostream object to which the info should be dumped.
dump_data If true and the response has data, then the response’s buffer contents
are dumped. Otherwise, the buffer is not dumped.

Note: Snoop is reserved for future use.

7.139.5.32 const stream_dumper& show_data (bool show) const [inline]

This method makes it easy to dump an xtsc_response to an ostream while programatically

determining whether or not to include the payload data (if any). Usage:

cout << response << endl; // Show data

cout << response.show_data(true) << endl; // Show data
cout << response.show_data(false) << endl; // Don't show data

Definition at line 525 of file xtsc_response.h.

The documentation for this class was generated from the following file:

• xtsc_response.h

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7.140 xtsc_router Class Reference

Example XTSC module implementing a router on a PIF network or local memory intercon-
nect.
#include <xtsc/xtsc_router.h>Inheritance diagram for xtsc_router:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface

xtsc_router

Collaboration diagram for xtsc_router:

xtsc_debug_if
xtsc_request_if

xtsc_script_file
m_file

xtsc_parms xtsc_router_parms
m_router_parms
m_router xtsc_request_if_impl
xtsc_resettable xtsc_module

m_request_impl
xtsc_connection_interface xtsc_command_handler_interface

xtsc_router m_respond_impl
m_filtered_response

m_responses m_router xtsc_respond_if_impl

m_response response_info
m_p_nascent_response m_req_rsp_table xtsc_respond_if
xtsc_response
m_p_response
m_p_nascent_request req_rsp_info
m_p_first_request_info
m_stream_dumper
stream_dumper m_stream_dumper
m_request
xtsc_request request_info
m_requests

m_filtered_request

Classes

• struct bit_field_info
• class req_rsp_info
Information for PIF width converter (PWC) mode.

• class request_info
Information about each request.

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• class response_info
Information about each response.

• class watchfilter_info
Information about each watchfilter.

• class xtsc_request_if_impl
Implementation of xtsc_request_if.

• class xtsc_respond_if_impl
Implementation of xtsc_respond_if.

Public Member Functions

• SC_HAS_PROCESS (xtsc_router)
• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

• xtsc_router (sc_core::sc_module_name module_name, const xtsc_router_parms

&router_parms)
Constructor for an xtsc_router.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• xtsc::u32 get_num_slaves ()
Get the number of memory interface slaves that can be connected with this xtsc_router
(this is the number of memory interface master port pairs that this xtsc_router has).

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• void reset (bool hard_reset=false)

Reset the xtsc_router.

• void change_clock_period (xtsc::u32 clock_period_factor)

Method to change the clock period.

• virtual void man (std::ostream &os)

Implementation of the xtsc::xtsc_command_handler_interface.

• virtual void execute (const std::string &cmd_line, const std::vector< std::string >
&words, const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

• void connect (xtsc_arbiter &arbiter)

Connect with an upstream xtsc_arbiter.

• void connect (xtsc::xtsc_core &core, const char ∗memory_port_name, xtsc::u32

port_num=0xFFFFFFFF)
Connect with an upstream or downstream (inbound pif) xtsc_core.

• void connect (xtsc_dma_engine &dma_engine)

Connect with an upstream xtsc_dma_engine.

• void connect (xtsc_master &master)

Connect with an xtsc_master.

• void connect (xtsc_memory_trace &memory_trace, xtsc::u32 port_num)

Connect with an upstream xtsc_memory_trace.

• void connect (xtsc_router &router, xtsc::u32 port_num)

Connect to an upstream xtsc_router.

• void connect (xtsc_pin2tlm_memory_transactor &pin2tlm, xtsc::u32 port_num)

Connect with an upstream xtsc_pin2tlm_memory_transactor.

• void connect (xtsc_tlm22xttlm_transactor &tlm22xttlm, xtsc::u32 port_num)

Connect with an upstream xtsc_tlm22xttlm_transactor.

• xtsc::u32 watchfilter_add (const std::string &filter_name, sc_core::sc_event &event)

Add a watchfilter on peeks, pokes, requests, or responses.

• void watchfilter_dump (std::ostream &os=std::cout)

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Dump a list of all watchfilters applied to this xtsc_router instance.

• xtsc::u32 watchfilter_remove (xtsc::u32 watchfilter)

Remove the specified watchfilter or all watchfilters.

• void dump_profile_results (std::ostream &os=std::cout)

Dump maximum used buffers for request and response fifos.

• void end_of_simulation ()
• log4xtensa::TextLogger & get_text_logger ()
Get the TextLogger for this component (e.g. to adjust its log level).

• log4xtensa::BinaryLogger & get_binary_logger ()

Get the BinaryLogger for this component (e.g. to adjust its log level).

Public Attributes
• sc_core::sc_export< xtsc::xtsc_request_if > m_request_export
From single master to us.

• sc_core::sc_port< xtsc::xtsc_request_if > ∗∗ m_request_ports

From us to multiple slaves.

• sc_core::sc_export< xtsc::xtsc_respond_if > ∗∗ m_respond_exports

From multiple slaves to us.

• sc_core::sc_port< xtsc::xtsc_respond_if > m_respond_port

From us to single master.

Protected Types
• typedef struct xtsc_component::xtsc_router::bit_field_info bit_field_info

Protected Member Functions

• xtsc::u8 get_empty_slot ()
Get the next empty Request ID slot.

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• void convert_request (request_info ∗&p_request_info, xtsc::u32 slave_byte_width)

PWC: Convert a request as required for a narrow/wider downstream PIF.

• bool convert_response (response_info ∗&p_response_info, xtsc::u32 slave_byte_-

width, req_rsp_info ∗&p_req_rsp_info)
PWC: Convert a response as required for a narrow/wider upstream PIF. Return lock.

• void confirm_alignment (xtsc::u32 total_bytes, xtsc::xtsc_address address8,

xtsc::xtsc_request &request)
PWC: Throw an exception if unaligned BLOCK_READ request is received (CWF).

• virtual xtsc::u32 get_port_and_apply_address_translation (xtsc::xtsc_address &ad-

dress8)
This method determines the port number to associate with the specified address.

• xtsc::u32 get_port_by_type (xtsc::u32 type)

Get the port based on the transaction type.

• void handle_response_filters (xtsc::u32 port, const xtsc::xtsc_response &response)

Handle xtsc_response filters.

• void handle_request (request_info ∗p_request_info)

Handle request.

• virtual void router_thread (void)

Handle incoming requests from single master at the correct time.

• virtual void router_pwc_thread (void)

PWC: Handle incoming requests from single master at the correct time.

• void response_arbiter_thread (void)

Handle responses from multiple slaves at the correct time.

• void response_arbiter_pwc_thread (void)

PWC: Handle responses from multiple slaves at the correct time.

• request_info ∗ new_request_info (const xtsc::xtsc_request &request)

Get a new request_info (from the pool).

• request_info ∗ new_request_info (const request_info &info)

Copy a new request_info (using the pool).

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• void delete_request_info (request_info ∗&p_request_info)

Delete an request_info (return it to the pool).

• response_info ∗ new_response_info (const xtsc::xtsc_response &response)

Get a new response_info (from the pool).

• response_info ∗ new_response_info (const xtsc::xtsc_request &request)

Get a new response_info (from the pool).

• void delete_response_info (response_info ∗&p_response_info)

Delete an response_info (return it to the pool).

• req_rsp_info ∗ new_req_rsp_info (request_info ∗first_request_info)

Get a new req_rsp_info (from the pool).

• void delete_req_rsp_info (req_rsp_info ∗&p_req_rsp_info)

Delete an req_rsp_info (return it to the pool).

• void update_transaction_id_counts (xtsc::u32 port_num, const xtsc::xtsc_response

&response)
Common method to update count in m_transaction_id_counts when "flexible_request_id"
is true.

• xtsc::u32 dump_transaction_id_counts (std::ostream &os, bool verbose=false)

Dump transaction ID’s and outstanding counts for each port.

• void compute_delays ()
Common method to compute/re-compute time delays.

• void reset_fifos ()
Reset internal fifos.

• xtsc::u32 get_u32 (xtsc::u32 index)

Protected Attributes

• xtsc_request_if_impl m_request_impl
m_request_export binds to this

• xtsc_respond_if_impl ∗∗ m_respond_impl
m_respond_exports bind to these

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• sc_core::sc_fifo< request_info ∗ > m_request_fifo

Buffer requests from single master.

• sc_core::sc_fifo< response_info ∗ > ∗∗ m_response_fifos

Buffer responses from multiple slaves.

• xtsc_router_parms m_router_parms
Copy of xtsc_router_parms.

• bool m_is_pwc
True if acting as a PIF width converter.

• bool m_use_block_requests
PWC: From "use_block_requests" parameter.

• std::vector< xtsc::u32 > m_slave_byte_widths

PWC: From "slave_byte_widths" parameter.

• xtsc::u32 m_master_byte_width
PWC: From "master_byte_width" parameter.

• xtsc::u8 m_next_slot
PWC: Next slot to test for availability.

• xtsc::u8 m_pending_request_id
PWC: New ID of pending multi-request (when != m_num_slots).

• xtsc::u8 m_active_block_read_id
PWC: ID of BLOCK_READ request while responses are active.

• req_rsp_info ∗ m_req_rsp_table [m_num_slots]

PWC: Table of outstanding requests indexed by request ID.

• request_info ∗ m_requests [4]

PWC: List of requests to be sent downstream.

• response_info ∗ m_responses [4]

PWC: List of responses to be sent back upstream.

• xtsc::u32 m_num_slaves
The number of slaves (master port pairs).

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• bool m_waiting_for_nacc
True if waiting for RSP_NACC from slave.

• bool m_request_got_nacc
True if active request got RSP_NACC from slave.

• bool m_prev_last_transfer
Last transfer flag of most recent previous accepted request.

• bool m_lock
Lock response arbiter for multiple response sequences.

• xtsc::u32 m_token
For arbitrating responses.

• xtsc::u32 m_default_port_num
If address is not in routing table, send req here.

• xtsc::u32 m_default_delta
Default address translation delta.

• bool m_read_only
From "read_only" parameter.

• bool m_write_only
From "write_only" parameter.

• bool m_log_peek_poke
From "log_peek_poke" parameter.

• bool m_interleave_responses
From "interleave_responses" parameter.

• bool m_flexible_request_id
From "flexible_request_id" parameter.

• sc_core::sc_time m_clock_period
This router’s clock period.

• bool m_delay_from_receipt
True if delay starts upon request receipt.

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• bool m_immediate_timing
True if no delay (not even a delta cycle).

• sc_core::sc_time m_last_request_time_stamp
Time last request was sent out.

• sc_core::sc_time m_last_response_time_stamp
Time last response was sent out.

• sc_core::sc_time m_recovery_time
See "recovery_time" in xtsc_router_parms.

• sc_core::sc_time m_request_delay
See "request_delay" in xtsc_router_parms.

• sc_core::sc_time m_read_delay
See "read_delay" in xtsc_router_parms.

• sc_core::sc_time m_write_delay
See "write_delay" in xtsc_router_parms.

• sc_core::sc_time m_nacc_wait_time
See "nacc_wait_time" in xtsc_router_parms.

• sc_core::sc_time m_response_delay
See "response_delay" in xtsc_router_parms.

• sc_core::sc_time m_response_repeat
See "response_repeat" in xtsc_router_parms.

• std::vector< xtsc::u32 > m_address_routing_bits

From "address_routing_bits" parameter.

• bool m_address_routing
True if "address_routing_bits" is non-empty.

• std::vector< bit_field_info ∗ > m_address_routing_info

Address bit field information for routing.

• xtsc::u32 m_num_bit_fields
Number of address routing bit field pairs.

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• xtsc::u32 m_address_routing_turbo_mask
Address mask from routing bits lsb for TurboXim nb_fast_access.

• xtsc::u32 m_address_routing_turbo_size
2∧ lsb for TurboXim nb_fast_access

• std::vector< xtsc::xtsc_address_range_entry > m_routing_table

The routing table.

• std::string m_lua_port_function
From <LuaPortFunction> in lua_function line of "routing_table" file.

• std::string m_lua_addr_function
From <LuaAddrFunction> in lua_function line of "routing_table" file.

• bool m_lua_function
True if there was a lua_function line in "routing_table" file.

• std::vector< xtsc::u32 > m_route_by_priority

See "route_by_priority" in xtsc_arbiter_parms.

• xtsc::u32 m_priority_port_map [16]

Map up to 4-bits of priority to port number.

• bool m_use_route_by_priority
True if "route_by_priority" is non-empty.

• std::string m_route_by_type
See "route_by_type" in xtsc_arbiter_parms.

• bool m_use_route_by_type
True if "route_by_type" was specified.

• std::map< xtsc::u32, xtsc::u32 > m_type_port_map

Map transaction type to its port.

• std::map< xtsc::u64, xtsc::u32 > ∗ m_transaction_id_counts

For when "flexible_request_id" parameter is true.

• sc_core::sc_event m_router_thread_event
To notify router_thread when a request is accepted.

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• sc_core::sc_event m_response_arbiter_thread_event
To notify response_arbiter_thread.

• std::vector< req_rsp_info ∗ > m_req_rsp_info_pool

Maintain a pool of req_rsp_info to improve performance.

• std::vector< request_info ∗ > m_request_pool

Maintain a pool of requests to improve performance.

• std::vector< response_info ∗ > m_response_pool

Maintain a pool of responses to improve performance.

• std::string m_file_name
Routing table file name from "routing_table".

• xtsc::xtsc_script_file ∗ m_file
Pointer to routing table file.

• std::string m_line
Current line of routing table file.

• xtsc::u32 m_line_count
Current line number in routing table file.

• std::vector< std::string > m_words

Current line tokenized into words.

• std::map< xtsc::u32, watchfilter_info ∗ > m_watchfilters

The currently active watchfilters.

• std::set< xtsc::u32 > m_peek_watchfilters

The currently active peek watchfilters.

• std::set< xtsc::u32 > m_poke_watchfilters

The currently active poke watchfilters.

• std::set< xtsc::u32 > m_request_watchfilters

The currently active xtsc_request watchfilters.

• std::set< xtsc::u32 > m_response_watchfilters

The currently active xtsc_response watchfilters.

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• bool m_filter_peeks
True if m_peek_watchfilters is non-empty.

• bool m_filter_pokes
True if m_poke_watchfilters is non-empty.

• bool m_filter_requests
True if m_request_watchfilters is non-empty.

• bool m_filter_responses
True if m_response_watchfilters is non-empty.

• xtsc::xtsc_request m_filtered_request
Copy of most recent previous filtered xtsc_request.

• xtsc::xtsc_response m_filtered_response
Copy of most recent previous filtered xtsc_response.

• bool m_profile_buffers
See "profile_buffers" in xtsc_router_parms.

• xtsc::u32 m_max_num_requests
The maximum available items in request_fifo.

• sc_core::sc_time m_max_num_requests_timestamp
Time when the max request buffer happened.

• xtsc::u64 m_max_num_requests_tag
Tag of max buffered item in request_fifo.

• xtsc::u32 ∗ m_max_num_responses
The maximum available items in response_fifos.

• sc_core::sc_time ∗ m_max_num_responses_timestamp
Time when the max response buffers happened.

• xtsc::u64 ∗ m_max_num_responses_tag
Tag of max buffered items in response_fifos.

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

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• log4xtensa::TextLogger & m_text

Text logger.

• log4xtensa::BinaryLogger & m_binary

Binary logger.

• bool m_log_data_binary
True if transaction data should be logged by m_binary.

Static Protected Attributes

• static const xtsc::u8 m_num_slots = 64

PWC: Number of Request ID’s (2∧ 6=64).

• static const xtsc::u32 DISCARD_REQUEST = 0xFFFFFFFF

Port number to indicate the xtsc::xtsc_request should be discarded.

• static const xtsc::u32 ADDRESS_ERROR = 0xFFFFFFFE

Port number to indicate that xtsc::xtsc_response::RSP_ADDRESS_ERROR should be sent
upstream (instead of sending the request downstream).

• static const xtsc::u32 READ = 0x00

• static const xtsc::u32 WRITE = 0x80
• static const xtsc::u32 BLOCK_READ = 0x10
• static const xtsc::u32 BLOCK_WRITE = 0x90
• static const xtsc::u32 BURST_READ = 0x30
• static const xtsc::u32 BURST_WRITE = 0xB0
• static const xtsc::u32 RCW = 0x50
• static const xtsc::u32 RCW1 = 0x51
• static const xtsc::u32 RCW2 = 0x52
• static const xtsc::u32 SNOOP = 0x60
• static const xtsc::u32 PEEK = 0xF0
• static const xtsc::u32 POKE = 0xF1
• static const xtsc::u32 FAST_ACCESS = 0xF2
• static const xtsc::u32 LOAD_RETIRED = 0xF3

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7.140.1 Detailed Description

Example XTSC module implementing a router on a PIF network or local memory inter-
connect. This module allows a memory interface master (for example, an xtsc_core) to
be connected with multiple memory interface slaves (for example, multiple xtsc_memory,
xtsc_router, and xtsc_arbiter objects).
It can be configured to have only one memory interface slave. This can be useful to filter
out unwanted address ranges so the slave never sees them or to introduce a simple delay
device.
It can also be configured to have no memory interface slaves. In this "null router" capacity,
it either discards all requests or responds with RSP_ADDRESS_ERROR to all requests
(depending upon the "default_port_num" parameter).
Typically, the routing that this device performs is configured by specifying a routing table file
using the "routing_table" parameter. The "routing_table" allows specifying a fixed routing
table, or a dynamic routing table (using Lua), or a combination of both. Other means of
defining the routing include:

• Using the "route_by_priority" parameter to route based on transaction priority.

• Using the "route_by_type" parameter to route based on transaction type.

• Using the "address_routing_bits" parameter to define the routing based on bit field(s)
of the address.

• Using only the high order bits of the address by NOT specifying "route_by_type",
"address_routing_bits", and "routing_table" and leaving "default_routing" true.

• Using a sub-class and setting "default_routing" to false.

If desired this router can be used as a PIF width converter (PWC) by setting the "master_-
byte_width" parameter to indicated the byte width of the upstream PIF master and by setting
the "slave_byte_widths" parameter to indicate the byte width of each downstream PIF slave.
Limitations of PIF Width Convertor:

• Critical word first BLOCK_READ transactions are not supported (i.e. for BLOCK_-
READ requests, the start address must be aligned to the total transfer size, not just
the bus width).

• When going from a wide master to a narrow slave if an incoming BLOCK_READ re-
quest requires multiple outgoing BLOCK_READ requests then the downstream sys-
tem must return all the BLOCK_READ responses in the order the requests were sent
out and without any intervening responses to other requests.

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Typically, this module is used as a clocked router on a PIF network (so that routing trans-
actons consumes 1 or more clock periods), but it is also possible to use it as an un-
clocked (asynchronous) multiplexor on a PIF, local memory, or XLMI interconnect by setting
"immediate_timing" to true.
Here is a block diagram of the system used in the xtsc_router example:

(*router.m_respond_exports[0])

(*router.m_request_ports[0])

(router.m_request_export)
router.m_respond_port

nb_respond()

nb_request()
xtsc_memory sysrom

xtsc_core core0 nb_request() nb_respond()

xtsc_router router
(router_test.out)

routing.tab nb_request()
xtsc_memory sysram

nb_respond()

(*router.m_request_ports[1])
core0.get_request_port("pif")

(*sysram.m_request_exports[0])

(*sysram.m_respond_port[0])
(*router.m_respond_exports[1])

(core0.get_respond_export("pif"))

Figure 7.19: xtsc_router Example

Here is the code to connect the system using the xtsc::xtsc_connect() method:

xtsc_connect(core0, "pif", "slave_port", router);

xtsc_connect(router, "master_port[0]", "slave_port", sysrom);
xtsc_connect(router, "master_port[1]", "slave_port", sysram);

And here is the code to connect the system using manual SystemC port binding:

core0.get_request_port("pif")(router.m_request_export);
router.m_respond_port(core0.get_respond_export("pif"));
(*router.m_request_ports[0])(*sysrom.m_request_exports[0]);
(*sysrom.m_respond_ports[0])(*router.m_respond_exports[0]);
(*router.m_request_ports[1])(*sysram.m_request_exports[0]);
(*sysram.m_respond_ports[0])(*router.m_respond_exports[1]);

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See also:
xtsc_router_parms
xtsc::xtsc_request_if
xtsc::xtsc_respond_if
xtsc::xtsc_core::How_to_do_port_binding

Definition at line 751 of file xtsc_router.h.

7.140.2 Constructor & Destructor Documentation

7.140.2.1 xtsc_router (sc_core::sc_module_name module_name, const

xtsc_router_parms & router_parms)

Constructor for an xtsc_router.

Parameters:
module_name Name of the xtsc_router sc_module.
router_parms The remaining parameters for construction.

See also:
xtsc_router_parms

7.140.3 Member Function Documentation

7.140.3.1 void change_clock_period (xtsc::u32 clock_period_factor)

Method to change the clock period.

Parameters:
clock_period_factor Specifies the new length of this device’s clock period expressed
in terms of the SystemC time resolution (from sc_get_time_resolution()).

7.140.3.2 virtual void execute (const std::string & cmd_line, const std::vector<
std::string > & words, const std::vector< std::string > & words_lc,
std::ostream & result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:

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change_clock_period <ClockPeriodFactor>
Call xtsc_router::change_clock_period(<ClockPeriodFactor>). Return previous
<ClockPeriodFactor> for this router.

dump_filtered_request
Dump the most recent previous xtsc_request that passed a xtsc_request
watchfilter.

dump_filtered_response
Dump the most recent previous xtsc_response that passed a xtsc_response
watchfilter.

dump_profile_results
Dump max used buffers for request and response fifos.

dump_transaction_id_counts [<Verbose>]
Return the buffer from calling dump_transaction_id_counts(<Verbose>).
<Verbose> may be 0|1 (default is 0).

peek <StartAddress> <NumBytes>

Peek <NumBytes> of memory starting at <StartAddress>.

poke <StartAddress> <NumBytes> <Byte1> <Byte2> . . . <ByteN>

Poke <NumBytes> (=N) of memory starting at <StartAddress>.

reset
Call xtsc_router::reset().

watchfilter_add <FilterName> <EventName>

Calls xtsc_router::watchfilter_add(<FilterName>, <Event>) and returns the
watchfilter number. <EventName> can be a hyphen (-) to mean the last event
created by the xtsc_event_create command.

watchfilter_dump
Return xtsc_router::watchfilter_dump().

watchfilter_remove <Watchfilter> | *
Return xtsc_router::watchfilter_remove(<Watchfilter>). An * removes all
watchfilters.

Implements xtsc_command_handler_interface.

7.140.3.3 void connect (xtsc_arbiter & arbiter)

Connect with an upstream xtsc_arbiter. This method connects the master port pair of the
specified xtsc_arbiter to the slave port pair of this xtsc_router.

Parameters:
arbiter The upstream xtsc_arbiter to connect with.

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7.140.3.4 void connect (xtsc::xtsc_core & core, const char ∗ memory_port_name,

xtsc::u32 port_num = 0xFFFFFFFF)

Connect with an upstream or downstream (inbound pif) xtsc_core. This method connects
this xtsc_router with the memory interface specified by memory_port_name of the specified
xtsc_core. If memory_port_name is "inbound_pif" or "snoop" then the master port pair of
this xtsc_router specified by port_num is connected with the inbound pif or snoop slave port
pair of core. If memory_port_name is neither "inbound_pif" nor "snoop" then the master
port pair of the memory interface of core specified by memory_port_name is connected
with the slave port pair of this xtsc_router.

Parameters:
core The xtsc_core to connect with.
memory_port_name The name of the memory interface of the xtsc_core to connect
with. Case-insensitive.
port_num This specifies which master port pair of this xtsc_router to connect with
the inbound pif or snoop slave port pair of core. This parameter is ignored un-
less memory_port_name is "inbound_pif" or "snoop". If memory_port_name is
"inbound_pif" or "snoop", then this parameter must be explicitly set and must be
in the range of 0 to this xtsc_router’s "num_slaves" parameter minus 1.

See also:
xtsc::xtsc_core::How_to_do_memory_port_binding for a list of valid memory_port_-
name values.

7.140.3.5 void connect (xtsc_dma_engine & dma_engine)

Connect with an upstream xtsc_dma_engine. This method connects the master port pair
of the specified xtsc_dma_engine with the slave port pair of this xtsc_router.

Parameters:
dma_engine The xtsc_dma_engine to connect with this xtsc_router.

7.140.3.6 void connect (xtsc_master & master)

Connect with an xtsc_master. This method connects the master port pair of the specified
xtsc_master with the slave port pair of this xtsc_router.

Parameters:
master The xtsc_master to connect with this xtsc_router.

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7.140.3.7 void connect (xtsc_memory_trace & memory_trace, xtsc::u32 port_num)

Connect with an upstream xtsc_memory_trace. This method connects the specified master
port pair of the specified upstream xtsc_memory_trace with the slave port pair of this xtsc_-
router.

Parameters:
memory_trace The upstream xtsc_memory_trace to connect with this xtsc_router.
port_num The master port pair of the upstream xtsc_memory_trace to connect with
this xtsc_router. port_num must be in the range of 0 to the upstream xtsc_-
memory_trace’s "num_ports" parameter minus 1.

7.140.3.8 void connect (xtsc_router & router, xtsc::u32 port_num)

Connect to an upstream xtsc_router. This method connects the specified master port of
the specified upstream xtsc_router to the slave port of this xtsc_router.

Parameters:
router The upstream xtsc_router to connect to.
port_num The master port of the upstream xtsc_router to connect to. port_num must
be in the range of 0 to the upstream xtsc_router’s "num_slaves" parameter minus
1.

7.140.3.9 void connect (xtsc_pin2tlm_memory_transactor & pin2tlm, xtsc::u32

port_num)

Connect with an upstream xtsc_pin2tlm_memory_transactor. This method connects the

specified TLM master port pair of the specified upstream xtsc_pin2tlm_memory_transactor
with the slave port pair of this xtsc_router.

Parameters:
pin2tlm The upstream xtsc_pin2tlm_memory_transactor to connect with this xtsc_-
router.
port_num The TLM master port pair of the upstream xtsc_pin2tlm_memory_-
transactor to connect with this xtsc_router. port_num must be in the range of
0 to the upstream xtsc_pin2tlm_memory_transactor’s "num_ports" parameter mi-
nus 1.

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7.140.3.10 void connect (xtsc_tlm22xttlm_transactor & tlm22xttlm, xtsc::u32

port_num)

Connect with an upstream xtsc_tlm22xttlm_transactor. This method connects the specified

TLM master port pair of the specified upstream xtsc_tlm22xttlm_transactor with the slave
port pair of this xtsc_router.

Parameters:
tlm22xttlm The upstream xtsc_tlm22xttlm_transactor to connect with this xtsc_router.
port_num The TLM master port pair of the upstream xtsc_tlm22xttlm_transactor to
connect with this xtsc_router. port_num must be in the range of 0 to the upstream
xtsc_tlm22xttlm_transactor’s "num_ports" parameter minus 1.

7.140.3.11 xtsc::u32 watchfilter_add (const std::string & filter_name,

sc_core::sc_event & event)

Add a watchfilter on peeks, pokes, requests, or responses.

Parameters:
filter_name The filter instance name. The actual xtsc::xtsc_filter object will be ob-
tained via a call to xtsc::xtsc_filter_get. Its kind must be one of "xtsc_peek",
"xtsc_poke", "xtsc_request", or "xtsc_response".
event The sc_event to notify when a nb_peek, nb_poke, nb_request, or nb_response
(as appropriate) occurs whose payload and port passes the filter.

Returns:
the watchfilter number (use to remove the watchfilter).

See also:
watchfilter_remove
xtsc::xtsc_filter
xtsc::xtsc_filter_get

7.140.3.12 void watchfilter_dump (std::ostream & os = std::cout)

Dump a list of all watchfilters applied to this xtsc_router instance.

Parameters:
os The ostream object to which the watchfilters should be dumped.

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See also:
watchfilter_add
xtsc::xtsc_filter

7.140.3.13 xtsc::u32 watchfilter_remove (xtsc::u32 watchfilter)

Remove the specified watchfilter or all watchfilters.

Parameters:
watchfilter The number returned from a previous call to watchfilter_add. A -1
(0xFFFFFFFF) means to remove all watchfilters on this xtsc_router instance.

Returns:
the number (count) of watchfilters removed.

See also:
watchfilter_add
xtsc::xtsc_filter

7.140.3.14 void dump_profile_results (std::ostream & os = std::cout)

Dump maximum used buffers for request and response fifos.

Parameters:
os The ostream object to which the profile results should be dumped.

7.140.3.15 virtual xtsc::u32 get_port_and_apply_address_translation

(xtsc::xtsc_address & address8) [protected, virtual]

This method determines the port number to associate with the specified address. It also
modifies the specified address if address translation is in effect. Sub-classes can override
this method to use their own routing and address translation algorithms.

Parameters:
address8 The address to look up in the routing table or routing algorithm. This method
should change the value of address8 as required by any address translation in
effect.

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Returns:
the port number or DISCARD_REQUEST or ADDRESS_ERROR.

7.140.3.16 xtsc::u32 get_port_by_type (xtsc::u32 type) [protected]

Get the port based on the transaction type. This method is used in lieu of get_port_and_-
apply_address_translation() when "route_by_type" is specified.

7.140.3.17 xtsc::u32 dump_transaction_id_counts (std::ostream & os, bool

verbose = false) [protected]

Dump transaction ID’s and outstanding counts for each port.

Parameters:
os The ostream object to which the dump should be done. Format is: <Port>
<Transaction id>=""> <OutstandingCount>
verbose If true, transaction ID’s are shown even if their outstanding count is 0.

Returns:
total of all outstanding counts (should be 0 at end_of_simulation)

The documentation for this class was generated from the following file:

• xtsc_router.h

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7.141 xtsc_router_parms Class Reference

Constructor parameters for a xtsc_router object.

#include <xtsc/xtsc_router.h>Inheritance diagram for xtsc_router_parms:

xtsc_parms

xtsc_router_parms

Collaboration diagram for xtsc_router_parms:

xtsc_parms

xtsc_router_parms

Public Member Functions

• xtsc_router_parms (xtsc::u32 num_slaves=1, bool default_routing=true, const char

∗routing_table=NULL, xtsc::u32 default_port_num=0xFFFFFFFE)
Constructor for an xtsc_router_parms object.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

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7.141.1 Detailed Description

Constructor parameters for a xtsc_router object.

Name Type Description

------------------ ---- -------------------------------------------------------

"num_slaves" u32 The number of memory interface slaves attached to the

router. The router will have this number of memory
interface master port pairs (one to connect with each
slave). A value 0 means this is a null router which
discards or rejects requests. In this case, the only
valid numbers in the routing table and for the
"default_port_num" parameter are DISCARD_REQUEST
0xFFFFFFFF) and ADDRESS_ERROR (0xFFFFFFFE).
Default = 1.

"slave_byte_widths" vector<u32> The byte width of the data interface of each PIF
slave. Typically, this and the "master_byte_width"
parameters are left unset and xtsc_router does not
concern itself with the byte width of the data interface
(it just forwards requests and responses and leaves it
to the upstream master and downstream slaves to have
matching data interface byte widths). If desired when
modeling a PIF interface, this parameter can be set to
indicate the byte widths of each PIF slave (in this case
the "master_byte_width" parameter must also be set to
indicate the byte width of the upstream PIF master) and
the xtsc_router will act as a PIF width convertor (PWC)
to ensure that each request sent out on a request port
has the byte width to match the downstream slave and
that each response sent out on the response port has a
byte width to match the upstream master. If this
parameter is set then "immediate_timing" must be false.
If this parameter is set then it must contain exactly
"num_slaves" entries.
Valid entry values are 4|8|16.
Default = <empty>

"master_byte_width" u32 The data interface byte width of the upstream master.
Typically, this parameter should be left at its default
value of 0; however, if either the "slave_byte_widths"
or "address_routing_bits" parameter is set then this
parameter must be set to a non-zero value to indicate
the byte width of the upstream master.
Valid non-default values are 4|8|16 when acting as a
PIF width converter (when "slave_byte_widths" is set)
and 4|8|16|32|64 when "address_routing_bits" is set.
Default = 0.

"use_block_requests" bool This parameter is only used when acting as a PIF width
converter (i.e. when the "slave_byte_widths" parameter
is set). By default, the downstream request type is the
same as the upstream request type. If this parameter is
set to true when acting as a PIF width converter, then
an upstream WRITE|READ request which has all byte lanes

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enabled and which is larger then the downstream PIF

width will be converted into BLOCK_WRITE|BLOCK_READ
request(s).
Default = false.

"default_routing" bool If true, the xtsc_router base class determines the

sematics of "routing_table". If false, an xtsc_router
sub-class will determine semantics of "routing_table".
Default = true.

"routing_table" char* Information used to create the routing table. The

xtsc_router class or sub-class (depending upon the
"default_routing" parameter) defines the semantics of
this information.

If "default_routing" is true and "routing_table" is

neither NULL nor empty, the xtsc_router class interprets
it as the name of a routing table text file. Other than
a lua_function line described below, this file may only
contain lines in the following format:

<PortNum> <LowAddr> <HighAddr> [<NewBaseAddr>]

1. Each line of the text file contains three or four

numbers in decimal or hexadecimal (with '0x'
prefix) format. For example,

//<PortNum> <LowAddr> <HighAddr> <NewBaseAddr>

0 0x40000000 0x4FFFFFFF
0 0x70000000 0x7FFFFFFF
1 0xF0000000 0xFFFFFFFF 0x00000000

2. The first number is the port number.

3. The second number is the low address of an address
range that is to be routed to <PortNum>.
4. The third number is the high address of an address
range that is to be routed to <PortNum>.
5. The optional fourth number specifies a new base
address for address translation using the formula:

NewAddr = OldAddr + <NewBaseAddr> - <LowAddr>

If <NewBaseAddr> is not present, then the value

specified by the "default_delta" parameter is added
to each address that is in the range specfied by
<LowAddr> and <HighAddr>. If <NewBaseAddr> is the
same as <LowAddr> or if <NewBaseAddr> is missing
and "default_delta" is 0, then NewAddr will be the
same as OldAddr (i.e. the address is unchanged
after routing).
6. <PortNum> can appear more than once (so a single
port can service multiple address ranges).
7. <PortNum> can be 0xFFFFFFFF (-1) to mean the same
as DISCARD_REQUEST (see "default_port_num").
8. <PortNum> can be 0xFFFFFFFE (-2) to mean the same
as ADDRESS_ERROR (see "default_port_num").
9. Address ranges cannot overlap.

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10. Comments, extra whitespace, and blank lines are

ignored. See xtsc_script_file.

The "routing_table" file may also contain a lua_function

line to specify a Lua function that is to be called by
the model to get the port for any address that is not
specified and, optionally, a second Lua function to be
called to get the translated address. If lua_function
is specified then the "routing_table" file should
have a #lua_beg/#lua_end block containing the function
definitions. The format of the lua_function line is:

lua_function <LuaPortFunction> [<LuaAddrFunction>]

Both Lua functions take a single Lua number argument

giving the address. The first function should return a
Lua number giving the port as a whole number. The
second function should return a Lua number giving the
new translated address as a whole number. The values
returned by the Lua functions are not cached by the
model, instead, the functions are called each time a
routing is performed. This provides a dynamic routing
capability. If lua_function is specified then the
"default_port_num" parameter is not used.

Here is an example "routing_table" file using both line

formats and including the required Lua snippet:

#lua_beg
function get_port(addr)
-- print("addr=" .. string.format("0x%08x", addr))
return math.floor(addr/0x01000000) % 16
end
#lua_end
lua_function get_port
//<PortNum> <LowAddr> <HighAddr> <NewBaseAddr>
0 0x00000000 0xBFFFFFFF
0 0xD0000000 0xFFFFFFFF

If "default_routing" is true and "routing_table" is

either NULL or empty and "num_slaves" is not 0, the
xtsc_router class constructs a routing table by
calculating a memory aperture size equal to the 4GB
address space divided by the number of slave modules
("num_slaves" must be a power of 2). Each incoming
request transaction is sent out on the port whose port
number is equal to the address of the request
transaction divided by the memory aperture size (using
integer division). Address translation is done using
"default_delta".

If "default_routing" is true and "routing_table" is

either NULL or empty and "num_slaves" is 0, the
xtsc_router class will discard or reject all requests
depending upon the "default_port_num" parameter value
which must be either DISCARD_REQUEST (0xFFFFFFFF) or
ADDRESS_ERROR (0xFFFFFFFE).

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Default = NULL.

"default_delta" u32 The amount to be added to the address of each

xtsc::xtsc_request that is sent out that does not
have <NewBaseAddr> specified for it in the routing
table.
Default = 0.

"default_port_num" u32 The port number to send requests to when the request's
address is not in the routing table. Two values have
special meaning. If "default_port_num" is
DISCARD_REQUEST (0xFFFFFFFF) then the request is logged
and discarded. If "default_port_num" is ADDRESS_ERROR
(0xFFFFFFFE) then the request is logged and an
RSP_ADDRESS_ERROR response is sent to the upstream
master. To cause an exception to be thrown for a
request address that is not in the routing table, set
this parameter to any number other than the two special
values that is greater than of equal to "num_slaves"
(e.g. 0xbad1bad1).
Default = ADDRESS_ERROR.

"address_routing_bits" vector<u32> This parameter allows specifying the routing

based upon bit field(s) in the address in lieu of
specifying a routing table in a file via the
"routing_table" parameter. This can be useful to
support interleaved memory banks for either PIF or
local memories.
If used, this parameter must contain one or more pairs
of numbers with each pair defining a bit field in the
address. The first number of the pair defines the
high-order bit of the bit field and the second number of
the pair defines the low-order bit of the bit field.
When a request is received, the designated bit fields
from the request address are concatenated in order to
form a single number which is used as the port number to
send the request out on.
If this parameter is defined then:
- It must contain an even number of integers.
- Each integer must be less than 32 and greater than or
equal to log2("master_byte_width").
- The "num_slaves" parameter must be a power of 2 and
must be greater than 1.
- The number of address routing bits specified by this
parameter must be exactly equal to log2("num_slaves").
- The "master_byte_width" parameter must be explicitly
set to one of the valid non-zero values.
- The following parameters must be left at their default
value:
"slave_byte_widths"
"use_block_requests"
"default_routing"
"routing_table"
"default_delta"
"default_port_num"
- The system designer must ensure that the address range

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spanned by any block request sequence (BLOCK_READ and

BLOCK_WRITE) targets the same slave (i.e. the same
master port).
- If TurboXim is going to be used, then special care
must be taken to ensure that the largest minimum
granularity for TurboXim fast access is accounted for
(the minimum granularity for TurboXim fast access from
a particular processor is the load/store width of that
processor).
As an example, consider constructing a router for a
memory system with eight banks and a 4-byte data bus.
In this case we need three bits for routing (log2(8)=3).
Let us say we want to group the eight banks into two
groups of four banks each and we want the most
significant bit of the byte address to select one of the
two groups and we want the least significant bits of the
byte address (not counting the byte lane bits) to select
one of the four banks in each group. In the case of a
4-byte data bus, the low two bits of the byte address
(i.e. bits 1 and 0) select byte lanes on the data bus so
the least significant bit that can be used for routing
is bit 2. If we assume a 32-bit address, then the three
address bits we want for routing are 31, 3, and 2.
Because the "address_routing_bits" parameter expects bit
fields specified as pairs this corresponds to the two
pairs (31,31) and (3,2). With C++ (e.g. in sc_main) the
router parameters can be set like this:
xtsc_router_parms router_parms;
router_parms.set("num_slaves", 8);
router_parms.set("master_byte_width", 4);
vector<u32> bits;
bits.push_back(31);
bits.push_back(31);
bits.push_back(3);
bits.push_back(2);
router_parms.set("address_routing_bits", bits);
If using xtsc-run and a script file, the router
parameters can be set like this:
--set_router_parm=num_slaves=8
--set_router_parm=master_byte_width=4
--set_router_parm=address_routing_bits=31,31,3,2
Default = <empty>

"route_by_priority" vector<u32> This parameter can be used to specify that routing

should occur based on the transaction priority rather
than on the address. This can be useful to send
transactions with different priority field values out
separate ports so that a downstream xtsc_arbiter can
assign different arbitration priorities to them (see
"arbitration_policy" in xtsc_arbiter_parms). The
transaction priority is obtained by calling
xtsc::xtsc_request::get_priority() and represents the
PIF priority (or AxQOS if AXI is being modelled).
If this parameter is specified, then it must contain a
multiple of 3 entries with each triplet being:
BeginPriorityValue,EndPriorityValue,PortNumber
Where BeginPriorityValue must be less than or equal to

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EndPriorityValue which must be less than or equal to 15.

For example, to send all transactions with priority
value of 0 or 1 out port 0, and all transactions with
priority value of 2 out port 1, and all transactions
with any other priority value out the default port of 2,
specify:
num_ports=3
route_by_priority=0,1,0,2,2,1
default_port_num=2
As a more typical example, to send all transactions out
the port number equal to their transaction priority and
cause an exception if transaction priority exceeds 3:
num_ports=4
route_by_priority=0,0,0,1,1,1,2,2,2,3,3,3
default_port_num=0xbad1bad1
If this parameter is specified, then the following
parameters must be left at their default value:
"slave_byte_widths"
"master_byte_width"
"use_block_requests"
"default_routing"
"route_by_type"
"routing_table"
"default_delta"
"address_routing_bits"
If desired, the "immediate_timing" parameter can be set
to true to prevent the xtsc_router from consuming
simulation cycles.
Default = <empty>

"route_by_type" char* This parameter can be used to specify that routing

should occur based on the transaction type rather than
on the address. This can be useful to send read and
write transactions out separate ports so that a
downstream arbiter can assign different priorities to
them (see "arbitration_policy" in xtsc_arbiter_parms).
Syntax:
<RouteByType> := <Port0Types>[;<Port1Types>]...
Where:
<PortNTypes> := [<Type>[,<Type>]...]
<Type> := READ|WRITE|BLOCK_READ|BLOCK_WRITE|BURST_READ|
BURST_WRITE|RCW|RCW1|RCW2|SNOOP|PEEK|POKE|FAST_ACCESS|
LOAD_RETIRED
- <Type> is case-insensitive
- PEEK, POKE, FAST_ACCESS, and LOAD_RETIRED refer to
nb_peek(), nb_poke(), nb_fast_access(), and
nb_load_retired() methods of xtsc::xtsc_request_if.
The others refer to the request type of the
xtsc_request payload in the nb_request() method.
- Only READ and WRITE must be specified. BLOCK_READ,
BURST_READ, RCW1, SNOOP, PEEK, FAST_ACCESS, and
LOAD_RETIRED default to the READ port. BLOCK_WRITE,
BURST_WRITE, RCW2, and POKE default to the WRITE port.
- RCW1 and RCW2 mean the 1st and 2nd beat, respectively,
of RCW. If RCW is specified then RCW1 and RCW2 should
not be.
- The following parameters must be left at their default

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value:
"slave_byte_widths"
"master_byte_width"
"use_block_requests"
"default_routing"
"route_by_priority"
"routing_table"
"default_delta"
"default_port_num"
"address_routing_bits"
If desired, the "immediate_timing" parameter can be set
to true to prevent the xtsc_router from consuming
simulation cycles.
Default = NULL.
Examples:
<RouteByType> Description
-------------------- -------------------------------------------------------
read;write All nb_requests() of type READ, BLOCK_READ, BURST_READ,
RCW1, and SNOOP as well as nb_fast_access() and
nb_load_retired() go out port 0. All nb_requests() of
type WRITE, BLOCK_WRITE, BURST_WRITE, and RCW2 go out
port 1.
read,write;rcw Everything goes out port 0 except RCW which goes out
port 1.
Note: When specifying "route_by_type" on the Linux
command line, any semi-colon will require escaping or
quoting. For example:
./xtsc_router -route_by_type="read;write"

"read_only" bool By default, this router supports all transaction types.

Set this parameter to true to model a modified PIF
interconnect that does not have ReqData pins. If this
parameter is true an exception will be thrown if any of
the following types of requests are received (nb_poke
calls will still be supported):
WRITE, BLOCK_WRITE, RCW, BURST_WRITE
Default: false

"write_only" bool By default, this router supports all transaction types.

Set this parameter to true to model a modified PIF
interconnect that does not have RespData pins. If this
parameter is true an exception will be thrown if any of
the following types of requests are received (nb_peek
calls will still be supported):
READ, BLOCK_READ, RCW, BURST_READ
Default: false

"interleave_responses" bool By default, xtsc_router supports PIF 3.x which requires

a sequence of BLOCK_READ or BURST_READ responses to be
integral. PIF 4.0 removes the integral requirement.
Set this parameter to true to cause xtsc_router to allow
other responses to be interleaved in the middle of a
sequence of BLOCK_READ or BURST_READ responses. This
parameter must be false when the router is being used as
a PIF width converter.
Default = false.

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"flexible_request_id" bool If this parameter is true, xtsc_router will RSP_NACC any

request that has the same transaction ID as any
outstanding request on any other output port (where
transaction ID is the concatenation of route ID left-
shifted by 8 and request ID). The purpose of this is to
ensure the PIF 4 response ordering requirement called
"Flexible Request ID Usage" is met. In AXI4 a similar
requirement is called read ordering (see A5.3.1 in
ARM IHI 0022E). If this parameter is left at its
default value of false, xtsc_router will not enforce
ordering under the assumption that interconnect should
not be burdened with responsibilites that are better
handled by the terminals (master and/or slave), the
system designer, and the programmer.
Default = false.

"log_peek_poke" bool By default, xtsc_router does not log calls to its

peek/poke methods. Set this parameter to true to cause
xtsc_router to log them at VERBOSE_LOG_LEVEL.
Default = false.

"clock_period" u32 This is the length of this router's clock period

expressed in terms of the SystemC time resolution (from
sc_get_time_resolution()). A value of 0xFFFFFFFF means
to use the XTSC system clock period (from
xtsc_get_system_clock_period()). A value of 0 means one
delta cycle.
Default = 0xFFFFFFFF (i.e. use the system clock period).

"delay_from_receipt" bool If false, the following delay parameters apply from

the start of processing of the request or response
(i.e. after all previous requests or all previous
responses, as appropriate, have been forwarded). This
models a router that can only service one request at a
time and one response at a time. If true, the following
delay parameters apply from the time of receipt of the
request or response. This models a router with
pipelining.
Default = true.

"recovery_time" u32 If "delay_from_receipt" is true, this specifies two

things. First, the minimum number of clock periods
after a request is forwarded before the next request
will be forwarded. Second, the minimum number of
clock periods after a response is forwarded before the
next response will be forwarded.
If "delay_from_receipt" is false, this parameter is
ignored.
Default = 1.

"request_delay" u32 The minimum number of clock periods it takes to forward

a request. If "delay_from_receipt" is true, timing
starts when the request is received by the router. If
"delay_from_receipt" is false, timing starts at the
later of when the request is received and when the
previous request was forwarded. A value of 0 means one
delta cycle. This parameter can be overridden for

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read transactions or write transactions by using the

"read_delay" or "write_delay" parameters, respectively.
Default = 1.

"read_delay" u32 The minimum number of clock periods it takes to forward

a read request. If "delay_from_receipt" is true, timing
starts when the request is received by the router. If
"delay_from_receipt" is false, timing starts at the
later of when the request is received and when the
previous request was forwarded. A value of 0 means one
delta cycle. A value of 0xFFFFFFFF, the default, means
to use the value from "request_delay". This parameter
applies to READ, BLOCK_READ, BURST_READ, and SNOOP
transactions.
Default = 0xFFFFFFFF (use "request_delay" value).

"write_delay" u32 The minimum number of clock periods it takes to forward

a write request. If "delay_from_receipt" is true, timing
starts when the request is received by the router. If
"delay_from_receipt" is false, timing starts at the
later of when the request is received and when the
previous request was forwarded. A value of 0 means one
delta cycle. A value of 0xFFFFFFFF, the default, means
to use the value from "request_delay". This parameter
applies to WRITE, BLOCK_WRITE, BURST_WRITE, and RCW
transactions.
Default = 0xFFFFFFFF (use "request_delay" value).

"nacc_wait_time" u32 This parameter, expressed in terms of the SystemC time

resolution, specifies how long to wait after sending a
request downstream to see if it was rejected by
RSP_NACC. This value must not exceed this router's
clock period. A value of 0 means one delta cycle. A
value of 0xFFFFFFFF means to wait for a period equal to
this router's clock period. CAUTION: A value of 0 can
cause an infinite loop in the simulation if the
downstream module requires a non-zero time to become
available.
Default = 0xFFFFFFFF (router's clock period).

"response_delay" u32 The minimum number of clock periods it takes to forward

a response. If "delay_from_receipt" is true, timing
starts when the response is received by the router. If
"delay_from_receipt" is false, timing starts at the
later of when the response is received and when the
previous response was forwarded. A value of 0 means
one delta cycle.
Default = 1.

"response_repeat" u32 The number of clock periods after a response is sent

and rejected before the response will be resent. A
value of 0 means one delta cycle.
Default = 1.

"immediate_timing" bool If true, the above timing parameters are ignored and
the router model forwards all requests and responses
immediately (without any delay--not even a delta

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cycle). If false, the above delay parameters are used

to determine router timing. This parameter must be
false when the router is being used as a PIF width
converter.
Default = false.

"request_fifo_depth" u32 The depth of the single request fifo.

Default = 2.

"response_fifo_depth" u32 The depth of the response fifos (each memory interface
slave has its own response fifo).
Default = 2.

"response_fifo_depths" vector<u32> The depth of each response fifo. Each memory

interface slave has its own response fifo. If this
parameter is set it must contain "num_slaves" number
of values (all non-zero) which will be used to define
the individual response fifo depths in port number order.
If this parameter is not set then "response_fifo_depth"
(without the trailing s) will define the depth of all
the response fifos.
Default = <empty>

"profile_buffers" bool If true, the xtsc_router class keeps the track of used
buffers for its internal request and response fifos. At
the end of the simulation, the maximum used buffer and
the first time that the max buffer has been reached are
printed in the output log file at NOTE level. This
information is printed for each request and response fifo
separately.
Default = false.

See also:
xtsc_router
xtsc::xtsc_parms

Definition at line 598 of file xtsc_router.h.

7.141.2 Constructor & Destructor Documentation

7.141.2.1 xtsc_router_parms (xtsc::u32 num_slaves = 1, bool default_routing =

true, const char ∗ routing_table = NULL, xtsc::u32 default_port_num =
0xFFFFFFFE) [inline]

Constructor for an xtsc_router_parms object.

Parameters:
num_slaves The number of memory interface slaves controlled by the memory inter-

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face master. A value of 1 (the default) can be used to cause the router to act like a
simple pass-through delay and/or address-translation device. A value of 0 can be
used to cause the the router to be a terminal device that either discards or rejects
all requests (depending upon default_port_num).
default_routing If true, the xtsc_router base class determines the sematics of
routing_table. If false, an xtsc_router sub-class will determine semantics of
routing_table.
routing_table Information used to create routing table. The xtsc_router class or sub-
class (depending upon default_routing) defines the semantics of this information.
default_port_num The port number to send requests to when the request’s address
is not in the routing table. Default is to reject the request by responding with
RSP_ADDRESS_ERROR.

Definition at line 627 of file xtsc_router.h.

The documentation for this class was generated from the following file:

• xtsc_router.h

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7.142 xtsc_sc_in_sc_bv_base_adapter< W, T > Class

Template Reference

User interface class for converting an sc_in<T> to an sc_in<sc_bv_base>.

#include <xtsc/xtsc.h>

Public Member Functions

• xtsc_sc_in_sc_bv_base_adapter (sc_core::sc_module_name module_name)
• virtual const char ∗ kind () const

7.142.1 Detailed Description

template<int W, typename T> class xtsc::xtsc_sc_in_sc_bv_base_adapter< W, T >

User interface class for converting an sc_in<T> to an sc_in<sc_bv_base>. An instance of

this class can be used to convert an sc_in<T> to an sc_in<sc_bv_base> where T is some
common integral or SystemC type. For example, the xtsc_core class uses sc_in<sc_bv_-
base> for pin-level TIE input ports. If you need input ports of a different type then sc_-
bv_base, then this adapter template can be used to create an adapter of the appropriate
type. A typical use-case for this adapter is when cosimulating XTSC with Verilog using a
commercial simulator.
For more information about when this adapter might be used and how to use it, see xtsc_-
sc_out_sc_bv_base_adapter.

See also:
xtsc_sc_out_sc_bv_base_adapter
xtsc_sc_in_sc_bv_base_adapter_base::m_sc_export
xtsc_sc_in_sc_bv_base_adapter_base::m_sc_in
xtsc_core::get_input_pin()

Definition at line 2509 of file xtsc.h.

The documentation for this class was generated from the following file:

• xtsc.h

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7.143 xtsc_sc_in_sc_bv_base_adapter_base< W, T >

Class Template Reference

Base class for converting an sc_in<T> to an sc_in<sc_bv_base>.

#include <xtsc/xtsc.h>

Public Member Functions

• xtsc_sc_in_sc_bv_base_adapter_base (sc_core::sc_module_name module_-
name)
• virtual const sc_core::sc_event & default_event () const
• virtual const sc_core::sc_event & value_changed_event () const
• virtual bool event () const
• virtual const sc_dt::sc_bv_base & get_data_ref () const
• virtual const sc_dt::sc_bv_base & read () const =0

Public Attributes
• sc_core::sc_export< sc_core::sc_signal_in_if< sc_dt::sc_bv_base > > m_sc_export

Bind the sc_in<sc_bv_base> to here.

• sc_core::sc_in< T > m_sc_in

Bind this to an sc_signal<T> or to a higher-level (outer) sc_in<T>.

Protected Attributes
• sc_dt::sc_bv_base m_value

7.143.1 Detailed Description

template<int W, typename T> class xtsc::xtsc_sc_in_sc_bv_base_adapter_base<

W, T >

Base class for converting an sc_in<T> to an sc_in<sc_bv_base>. Note: This class is not
used directly, instead use xtsc_sc_in_sc_bv_base_adapter.
Definition at line 2376 of file xtsc.h.

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The documentation for this class was generated from the following file:

• xtsc.h

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7.144 xtsc_sc_in_sc_uint_base_adapter< W, T > Class

Template Reference

User interface class for converting an sc_in<T> to an sc_in<sc_uint_base>.

#include <xtsc/xtsc.h>

Public Member Functions

• xtsc_sc_in_sc_uint_base_adapter (sc_core::sc_module_name module_name)
• virtual const char ∗ kind () const

7.144.1 Detailed Description

template<int W, typename T> class xtsc::xtsc_sc_in_sc_uint_base_adapter< W, T

>

User interface class for converting an sc_in<T> to an sc_in<sc_uint_base>. An instance

of this class can be used to convert an sc_in<T> to an sc_in<sc_uint_base> where T
is some common integral or SystemC type. For example, the xtsc_tlm2pin_memory_-
transactor class uses sc_in<sc_uint_base> for input port vectors of 32 bits or less (except
for a data bus). If you need input ports of a different type then sc_uint_base, then this
adapter template can be used to create an adapter of the appropriate type. A typical use-
case for this adapter is when cosimulating XTSC with Verilog using a commercial simulator.
For more information about when this adapter might be used and how to use it, see xtsc_-
sc_out_sc_uint_base_adapter.

See also:
xtsc_sc_out_sc_uint_base_adapter
xtsc_sc_in_sc_uint_base_adapter_base::m_sc_export
xtsc_sc_in_sc_uint_base_adapter_base::m_sc_in

Definition at line 2843 of file xtsc.h.

The documentation for this class was generated from the following file:

• xtsc.h

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7.145 xtsc_sc_in_sc_uint_base_adapter_base< W, T >

Class Template Reference

Base class for converting an sc_in<T> to an sc_in<sc_uint_base>.

#include <xtsc/xtsc.h>

Public Member Functions

• xtsc_sc_in_sc_uint_base_adapter_base (sc_core::sc_module_name module_-
name)
• virtual const sc_core::sc_event & default_event () const
• virtual const sc_core::sc_event & value_changed_event () const
• virtual bool event () const
• virtual const sc_dt::sc_uint_base & get_data_ref () const
• virtual const sc_dt::sc_uint_base & read () const =0

Public Attributes
• sc_core::sc_export< sc_core::sc_signal_in_if< sc_dt::sc_uint_base > > m_sc_-
export
Bind the sc_in<sc_uint_base> to here.

• sc_core::sc_in< T > m_sc_in

Bind this to sc_signal<T> or an outer sc_in<T>.

Protected Attributes
• sc_dt::sc_uint_base m_value

7.145.1 Detailed Description

template<int W, typename T> class xtsc::xtsc_sc_in_sc_uint_base_adapter_base<

W, T >

Base class for converting an sc_in<T> to an sc_in<sc_uint_base>. Note: This class is

not used directly, instead use xtsc_sc_in_sc_uint_base_adapter.
Definition at line 2710 of file xtsc.h.

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• xtsc.h

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7.146 xtsc_sc_out_sc_bv_base_adapter< W, T > Class

Template Reference

User interface class for converting an sc_out<sc_bv_base> to sc_out<T>.

#include <xtsc/xtsc.h>

Public Member Functions

• xtsc_sc_out_sc_bv_base_adapter (sc_core::sc_module_name module_name)

• virtual const char ∗ kind () const

7.146.1 Detailed Description

template<int W, typename T> class xtsc::xtsc_sc_out_sc_bv_base_adapter< W, T

>

User interface class for converting an sc_out<sc_bv_base> to sc_out<T>. An instance

of this class can be used to convert an sc_out<sc_bv_base> to an sc_out<T> where T
is some common integral or SystemC type. For example, the xtsc_core class uses sc_-
out<sc_bv_base> for pin-level TIE output ports. If you need output ports of a different
type then sc_bv_base, then this adapter template can be used to create an adapter of
the appropriate type. A typical use-case for this adapter is when cosimulating XTSC with
Verilog using a commercial simulator.
Some possible types for T are:

bool
sc_logic
sc_lv<W>
sc_bv<W>
sc_uint<W>
sc_biguint<W>
unsigned long long
unsigned long
unsigned int
unsigned short
unsigned char

As an example, assume you have two xtsc_core objects. The first is called core0 and
it has a 50-bit TIE export state called "TIE_status" which has been enabled for pin-level
access. The second is called core1 and it has a 50-bit TIE import wire called "TIE_control"
which has been enabled for pin-level access. The following code snippet can be use to

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connect these two TIE ports together using two adapters, called status and control, and an
sc_signal<sc_uint<50>>, called core0_to_core1:
Note: These core interfaces can (and typically should) be connected directly without the
use of adapters and an sc_signal. This example is contrived just to illustrate construct-
ing and connecting these adapters. Please consult the xtsc-run documentation and the
cosim sub-directories in the XTSC examples directory for realistic uses of these adapters
to cosimulate XTSC with Verilog.

xtsc_sc_out_sc_bv_base_adapter<50, sc_uint<50> > status("status");

xtsc_sc_in_sc_bv_base_adapter<50, sc_uint<50> > control("control");
sc_signal<sc_uint<50> > core0_to_core1;

core0.get_output_pin("TIE_status")(status.m_sc_export);
status.m_sc_out(core0_to_core1);

core1.get_input_pin("TIE_control")(control.m_sc_export);
control.m_sc_in(core0_to_core1);

See also:
xtsc_sc_out_sc_bv_base_adapter_base::m_sc_export
xtsc_sc_out_sc_bv_base_adapter_base::m_sc_out
xtsc_sc_in_sc_bv_base_adapter
xtsc_core::get_output_pin()

Definition at line 2351 of file xtsc.h.

The documentation for this class was generated from the following file:

• xtsc.h

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7.147 xtsc_sc_out_sc_bv_base_adapter_base< W, T >

Class Template Reference

Base class for converting an sc_out<sc_bv_base> to sc_out<T>.

#include <xtsc/xtsc.h>

Public Member Functions

• xtsc_sc_out_sc_bv_base_adapter_base (sc_core::sc_module_name module_-

name)
• virtual const sc_core::sc_event & default_event () const
• virtual const sc_core::sc_event & value_changed_event () const
• virtual bool event () const
• virtual const sc_dt::sc_bv_base & get_data_ref () const
• virtual const sc_dt::sc_bv_base & read () const =0
• virtual void write (const sc_dt::sc_bv_base &value)=0

Public Attributes

• sc_core::sc_export< sc_core::sc_signal_inout_if< sc_dt::sc_bv_base > > m_sc_-

export
Bind the sc_out<sc_bv_base> to here.

• sc_core::sc_out< T > m_sc_out

Bind this to an sc_signal<T> or to a higher-level (outer) sc_out<T>.

Protected Attributes

• sc_dt::sc_bv_base m_value

7.147.1 Detailed Description

template<int W, typename T> class xtsc::xtsc_sc_out_sc_bv_base_adapter_base<

W, T >

Base class for converting an sc_out<sc_bv_base> to sc_out<T>. Note: This class is not
used directly, instead use xtsc_sc_out_sc_bv_base_adapter.

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Definition at line 2177 of file xtsc.h.

The documentation for this class was generated from the following file:

• xtsc.h

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7.148 xtsc_sc_out_sc_uint_base_adapter< W, T > Class

Template Reference

User interface class for converting an sc_out<sc_uint_base> to sc_out<T>.

#include <xtsc/xtsc.h>

Public Member Functions

• xtsc_sc_out_sc_uint_base_adapter (sc_core::sc_module_name module_name)
• virtual const char ∗ kind () const

7.148.1 Detailed Description

template<int W, typename T> class xtsc::xtsc_sc_out_sc_uint_base_adapter< W, T

>

User interface class for converting an sc_out<sc_uint_base> to sc_out<T>. An instance

of this class can be used to convert an sc_out<sc_uint_base> to an sc_out<T> where
T is some common integral or SystemC type. For example, the xtsc_tlm2pin_memory_-
transactor class uses sc_out<sc_uint_base> for output port vectors of 32 bits or less (ex-
cept for a data bus). If you need output ports of a different type then sc_uint_base, then
this adapter template can be used to create an adapter of the appropriate type. A typi-
cal use-case for this adapter is when cosimulating XTSC with Verilog using a commercial
simulator.
Some possible types for T are:
bool
sc_logic
sc_lv<W>
sc_bv<W>
sc_uint<W>
sc_biguint<W>
unsigned long long
unsigned long
unsigned int
unsigned short
unsigned char

Note: Please consult the xtsc-run documentation and the cosim sub-directories in the
XTSC examples directory for uses of this adapter to cosimulate XTSC with Verilog.

See also:
xtsc_sc_out_sc_uint_base_adapter_base::m_sc_export

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xtsc_sc_out_sc_uint_base_adapter_base::m_sc_out
xtsc_sc_in_sc_uint_base_adapter

Definition at line 2685 of file xtsc.h.

The documentation for this class was generated from the following file:

• xtsc.h

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7.149 xtsc_sc_out_sc_uint_base_adapter_base< W, T >

Class Template Reference

Base class for converting an sc_out<sc_uint_base> to sc_out<T>.

#include <xtsc/xtsc.h>

Public Member Functions

• xtsc_sc_out_sc_uint_base_adapter_base (sc_core::sc_module_name module_-

name)
• virtual const sc_core::sc_event & default_event () const
• virtual const sc_core::sc_event & value_changed_event () const
• virtual bool event () const
• virtual const sc_dt::sc_uint_base & get_data_ref () const
• virtual const sc_dt::sc_uint_base & read () const =0
• virtual void write (const sc_dt::sc_uint_base &value)=0

Public Attributes

• sc_core::sc_export< sc_core::sc_signal_inout_if< sc_dt::sc_uint_base > > m_sc_-

export
Bind the sc_out<sc_uint_base> to here.

• sc_core::sc_out< T > m_sc_out

Bind this to sc_signal<T> or an outer sc_out<T>.

Protected Attributes

• sc_dt::sc_uint_base m_value

7.149.1 Detailed Description

template<int W, typename T> class xtsc::xtsc_sc_out_sc_uint_base_adapter_-

base< W, T >

Base class for converting an sc_out<sc_uint_base> to sc_out<T>. Note: This class is

not used directly, instead use xtsc_sc_out_sc_uint_base_adapter.

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Definition at line 2531 of file xtsc.h.

The documentation for this class was generated from the following file:

• xtsc.h

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7.150 xtsc_script_file Class Reference

Utility class for handling a script-style file.

#include <xtsc/xtsc.h>

Public Types

• typedef std::vector< bool > vector_bool

• typedef std::vector< u32 > vector_u32
• typedef std::vector< std::string > vector_string
• typedef std::vector< vector_string ∗ > vector_vector_string
• typedef std::vector< std::ifstream ∗ > vector_ifstream
• typedef std::set< std::string > set_string
• typedef std::map< std::string, std::string > map_string_string

Public Member Functions

• xtsc_script_file (const char ∗file_name, const char ∗m_parm_name="", const char

∗name="", const char ∗type="", bool wraparound=false, const map_string_string ∗p_-
macros=NULL, bool log_here_file=true)
Constructor for an xtsc_script_file.

• ∼xtsc_script_file ()
Destructor.

• std::string name ()
Return name (for HERE file this returns "HERE_FILE#N").

• void reset ()
Reset script file to the beginning and start over.

• u32 getline (std::string &line, std::string ∗p_file=NULL)

Get the next line from the file.

• u32 get_words (std::vector< std::string > &words, bool downshift=false, std::string

∗p_file=NULL)
Get the next line from the file broken into words.

• u32 get_words (std::vector< std::string > &words, std::string &line, bool down-
shift=false, std::string ∗p_file=NULL)

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Get the next line from the file broken into words.

• std::string evaluate_lua_expression (const std::string &exp)

Evaluate exp as a Lua expression and return the result.

• void dump_last_line_info (std::ostream &os=std::cout, bool single_line=true)

Dump file name and line number info, including include backtrace.

• std::string info_for_exception (bool show_line_number=true, bool new_line=true,

u32 beg=0)

Private Member Functions

• void info_for_exception (std::ostringstream &oss)
• void do_macro_expansion (std::string &line)
• void do_backtick_expansion_of_lua_expression (std::string &line)
• void init_lua_state (const std::string &err_msg)
• void throw_slurping_lua_snippet ()
• void add_alias (const std::string &name, const std::string &value)
• void add_macro (const std::string &name)
• void delete_macro (const std::string &name)
• void open (const std::string &file_name)
• void close_all ()
• void close ()
• void trim_whitespace (std::string &str, bool trim_leading=true, bool trim_-
trailing=true)
• void throw_missing_identifier (const std::string &line_type)

Private Attributes
• u32 m_active_line_count
• std::string m_script_file_name
• std::string m_parm_name
• std::string m_name
• std::string m_type
• bool m_wraparound
• bool m_skipping_comment
• bool m_skipping_pound_cond
• char m_line_cont_char
• bool m_here_file
• u32 m_here_file_line_num

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• vector_string m_here_file_content
• set_string m_macros
• map_string_string m_alias_macros
• map_string_string ∗ m_p_macros
• u32 m_file_depth
• vector_bool m_in_pound_cond
• vector_bool m_found_true_cond
• vector_bool m_found_pound_else
• vector_u32 m_line_number
• vector_string m_file_name
• vector_string m_file_path
• vector_ifstream m_file
• lua_State ∗ m_lua
• lua_State ∗ m_lua_cor
• bool m_use_lua_snippet
• u32 m_lua_line_number
• u32 m_lua_beg_line
• std::string m_whitespace

7.150.1 Detailed Description

Utility class for handling a script-style file. This utility class provides a wrapper for handling
a script-style file.
The get_words() method can be used to get the next non-blank, non-comment line from
the file tokenized into words (as a vector of strings).
The getline() method can be used to get the next non-blank, non-comment line from the file
as a string.
The handling of an xtsc_script_file includes a pseudo-preprocessor:

• C and C++ style comments are never returned by the get_words() and getline() meth-
ods.

• A "#define <Identifier>" line defines a simple macro (a simple macro is a macro that
is defined but that doesn’t contain a value and should be contrasted with an alias
macro, see below, that does contain a value). <Identifier> must be a legal C/C++
identifier. The line itself is never returned by the get_words() and getline() methods.

• A "#define <Identifier>=<String>" line defines an alias macro. <String> can be

any string (including the empty string). Before a line from the script file is processed
in any other way (other then being skipped because it is a comment or is between a
false "#if/#endif" pair), it is first scanned for occurrences of any defined simple or alias

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macro preceeded by a dollar sign and opening parenthesis and followed by a closing
parenthesis. Each occurrence is replaced verbatim by the corresponding <String> if
it is an alias macro or by an empty string if it is a simple macro. For example, a script
file consisting only of the following two lines will result in the single line "Hello World"
being returned by the getline() method:

#define entity=World
Hello $(entity)

Note: On preprocessor lines (lines beginning with #), a sub-string in the format
"$(<Identifier>)" where <Identifier> is not a defined macro will be removed (i.e. treated
like <Identifier> is a macro aliased to the empty string). On non-preprocessor lines, no
substitution takes place if the <Identifier> is not a defined macro. If substitution is desired,
then place code similiar to the following earlier in the script file:

#ifndef MY_MACRO
#define MY_MACRO
#endif

• A "#define <Identifier> <Text>" line also defines an alias macro. <Text> can be any
non-blank text that does not contain an equal sign (=). Leading and trailing spaces
are stripped from <Text>, but embedded spaces are left in place. For example, a
script file consisting only of the following two lines will result in the single line "Hello
World" being returned by the getline() method:

#define message Hello World

$(message)

Note: The alias macro XTSC_SCRIPT_FILE_PATH is always defined and is equal to the
path to the current script file being processed. It can be used to specify locations in the file
system relative to the xtsc_script_file.
Note: The alias macro XTSC_SCRIPT_FILE_PATH_ESC is always defined and is the
same as XTSC_SCRIPT_FILE_PATH except that any backslashes in the path will be es-
caped with a 2nd backslash.
Note: The alias macro XTSC_SCRIPT_FILE_COMPONENT is always defined and is equal
to the value of the name parameter passed into the xtsc_script_file constructor (which may
be the empty string).
Note: The alias macro XTSC_SCRIPT_FILE_PLATFORM is always defined and is equal
to "LINUX" or "WINDOWS" depending on the platform being used.
Note: The alias macro XTSC_SCRIPT_FILE_COMPILER is always defined according to
the compiler version used to compile the XTSC library. On Linux is will be of the form "GCC-
4.1", "GCC-4.4", etc. On MS Windows it will be of the form "MSVC2010", "MSVC2012",
etc.

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• A "#environment" line causes all the environment variables that are valid C/C++ iden-
tifiers to be read in and treated as macros. All environment variables that contain
a value are defined as alias macros. All environment variables that don’t contain a
value are defined as simple macros. The "#environment" line itself is never returned
by the get_words() and getline() methods.

• A "#undef <Identifier>" line removes <Identifier> from the list of defined macros if
such a macro exists (no error is generated if the macro is not currently defined). The
"#undef" line itself is never returned by the get_words() and getline() methods.

• A "#dump" line causes all macros and their value to be logged by logger xtsc_script_-
file at NOTE_LOG_LEVEL if logging has been configured, otherwise they are logged
to STDOUT. This may be useful for trouble-shooting. The "#dump" line itself is never
returned by the get_words() and getline() methods.

• All lines between and including a line starting with "#if 0" and a line starting with
"#elif"/"#else"/"#endif" are ignored and are never returned by the get_words() and
getline() methods.

• Lines starting with "#if 1" and "#elif"/"#else"/"#endif" are never returned by the get_-
words() and getline() methods; however, non-comment, non-blank, non-pseudo-
preprocessor lines between them are.

• Lines starting with "#ifdef <Identifier>" are handled according to one of the previ-
ous two rules depending upon whether or not <Identifier> is a defined macro (ei-
ther a simple macro or an alias macro). "#if defined <Identifier>", "#if !defined
<Identifier>", and "#ifndef <Identifier>" are also supported.

• A "#ifeq (<TextA>,<TextB>)" line is handled like a "#if 1" line if <TextA> is equal to
<TextB>, otherwise, the line is handled like a "#if 0" line. Although it is not a require-
ment, it is common for at least one of <TextA> and <TextB> to be a macro. For
example, "#ifeq ($(GCC_VERSION),3.4.1)". The "#ifneq" directive is also supported.

• The "#else" construct is supported between a "#if/#ifdef/#ifndef/#ifeq/#ifneq" line and

its matching "#endif" line. The "#else" line itself is never returned by the get_words()
and getline() methods.

• Zero, one, or more of the following "#elif" directives are allowed in any combination
between a "#if"-style directive and its corresponding "#else/#endif":

#elif 0
#elif 1
#elif defined <Identifier>
#elif !defined <Identifier>

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#elifdef <Identifier>
#elifndef <Identifier>
#elifeq (<TextA>,<TextB>)
#elifneq (<TextA>,<TextB>)

• Nesting of "#if/#elif/#else/#endif" blocks is NOT supported.

• A "#error" line causes the line to be thrown as an exception.

• A "#warn" line causes the line to be logged by logger xtsc_script_file at WARN_-

LOG_LEVEL if logging has been configured, otherwise the line is sent to STDERR.
The "#warn" line itself is never returned by the get_words() and getline() methods.

• A "#note" line causes the line to be logged by logger xtsc_script_file at NOTE_LOG_-

LEVEL if logging has been configured, otherwise the line is sent to STDOUT. The
"#note" line itself is never returned by the get_words() and getline() methods.

• A "#info" line causes the line to be logged by logger xtsc_script_file at INFO_LOG_-

LEVEL if logging has been configured (otherwise it is ignored). The "#info" line itself
is never returned by the get_words() and getline()

Note: "#warn", "#note", and "#info" lines in an xtsc-run script file do not appear in the XTSC
log file because xtsc-run processes the script file before configuring logging.

• A "#include <FileName>" line causes processing of the current file to be temporarily

suspended while file FileName is opened and processed. The "#include" line itself
is never returned by the get_words() and getline() methods. FileName must be en-
closed in quotation marks or angle brackets. The XTSC_SCRIPT_FILE_PATH macro
can be used as part of FileName to specify a path relative to the current script file
being processed. For example:
#include "$(XTSC_SCRIPT_FILE_PATH)/../common.inc"

• The psuedo-preprocessor will pass the code snippet contained on a "#lua" line or
between a "#lua_beg" and "#lua_end" pair to the Lua library for processing in a
separate Lua coroutine. The "#lua" prefix and the lines between and including
the "#lua_beg" and "#lua_end" lines are never directly returned by the get_words()
and getline() methods; however, the Lua code on the "#lua" line or in the "#lua_-
beg/#lua_end" block may pass lines back to the psuedo-preprocessor for return by
the get_words() or getline() methods by calling the Lua function xtsc.write() which
takes a single string argument containing the line to pass back to the psuedo-
preprocessor. A "#lua_beg/#lua_end" block may NOT contain "#include" lines nor any
of the "#if/#else/#endif"-style constructs; however, other psuedo-processor constructs
such as "#define", "#error", "#warn", "#note", "#info", and $(<Identifier>) macro ex-
pansion are allowed. Also, a "#lua" line or a "#lua_beg/#lua_end" block may appear
inside a "#if/#endif"-style block.

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Note: All Lua code in a given xtsc_script_file is processed by the same Lua state. This
allows variables to be set on a "#lua" line or in one "#lua_beg/#lua_end" block and then
to be accessed by subsequent "#lua" lines or "#lua_beg/#lua_end" blocks and backticked
Lua expressions (described next).

• After the first "#lua" line (it may be empty) or "#lua_beg/#lua_end" block, any lines
not on a "#lua" line or in a "#lua_beg/#lua_end" block will undergo backtick expan-
sion such that the string between each pair of backticks will be passed to Lua for
evaluation as a Lua expression. The Lua expression string and enclosing backticks
will be replaced by the result of the expression’s evaluation.

• In the formats described above, the pound sign ("#") must always be in the first col-
umn.

• Other then the formats defined above, script files should not contain any lines that
have a pound sign ("#") in the first column.

• By default, the pseudo-preprocessor uses the backward slash (\) as the line continua-
tion character. The pseudo-preprocessor does not support comments or # constructs
inside continued lines; however, macro expansion is supported. The line continuation
character can be changed using a "#continuation <CHAR>" line, where <CHAR>
is a single non-alphanumeric printable character. Line continuation support can be
turned off using a "#continuation off" line or by defining the environment variable
XTSC_SCRIPT_FILE_LINE_CONTINUATION_OFF. If a line ends with a single line
continuation character then that line and the following line are concatenated after
first stripping the line continuation character and all then trailing whitespace from the
first line and all leading whitespace from the second line. If a line ends with two
consecutive line continuation characters, then that line and the following line are con-
catenated after stripping the two line continuation characters; however, trailing and
leading whitespace are preserved.

Note: Line continuation can be used in an xtsc-run script to allow the HERE file content to
appear on separate lines. For example:

-set_router_parm=routing_table=<;> \
0x0 0x00000000 0x0FFFFFFF; \
0x1 0x10000000 0x1FFFFFFF; \
0x2 0x20000000 0x2FFFFFFF; \
0x3 0x30000000 0xFFFFFFFF

Note: Error messages regarding xtsc_script_file content contained in continued lines, use
the line number of the last line in the sequence (in the preceeding example, this would be
the line number of the line starting with 0x3).
Here is an example script to illustrate most of the supported preprocessor constructs:

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// You can include other files

#include "common.inc"

// You can define macros

#define OPTION FAST

// You can test macros

#ifndef OPTION
// You can cause a fatal error
#error macro OPTION must be defined
#endif

// You can compare macros with text strings

#ifeq ($(OPTION),SLOW)
#define DELAY=1000
#elifeq ($(OPTION),MEDIUM)
#define DELAY=100
#elifeq ($(OPTION),FAST)
#define DELAY=10
#else
#define DELAY=1
#endif

// You can print notes and warnings

#note Here comes a warning
#warn DELAY is $(DELAY)

// You can run a Lua code snippet

#lua_beg
for i=1,10 do
xtsc.write("wait " .. i)
end
#lua_end

// Other then what might be in "common.inc", the 10 "wait N"

// lines generated by the above Lua snippet, the following
// 3 lines, and the note below are all that the module reading
// this script file will see
$(DELAY) 123
$(DELAY) 456
$(DELAY) 789

// If you have at least one preceeding #lua line or #lua_beg/#lua_end

// block (the line or the block can be empty), then a pair of backticks
// can be used to evaluate a Lua expression
#note Timestamp: `os.date("%x %X")`

// You can disable/enable blocks of "code"

#if 0
#warn Not doing this
#elif 0
#warn Not doing this either
#elif 1
#warn Doing this
#elif 1
#warn Not doing this because I did one of the above
#else

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#warn Also, not doing this because I did one of the above
#endif

// Pull in environment variables (for example, you could

// have all the scripts used in a system simulaton conditioned
// on a single environment variable)
#environment
#warn CWD is $(PWD)

// This predefined macro is were the script file is located

// even when it is not in the current directory
#warn This script file is located in $(XTSC_SCRIPT_FILE_PATH)

// This predefined macro is the optional name of the component

// using the xtsc_script_file
#warn This script file is being used by $(XTSC_SCRIPT_FILE_COMPONENT)

// Line continuation
#note This note is spread \\
over 2 lines

Note: The xtsc-run program can be used to dump the contents of an xtsc_script_file with
preprocessing applied. For example:

xtsc-run -dump_script_file=my_script_file.vec

Definition at line 3389 of file xtsc.h.

7.150.2 Constructor & Destructor Documentation

7.150.2.1 xtsc_script_file (const char ∗ file_name, const char ∗ m_parm_name =

"", const char ∗ name = "", const char ∗ type = "", bool wraparound =
false, const map_string_string ∗ p_macros = NULL, bool log_here_file =
true)

Constructor for an xtsc_script_file.

Parameters:
file_name The name of the script file or a HERE file indicator and contents. If file_-
name does not begin with the HERE file indicator then it must name an existing
file or an exception is thrown. A HERE file is indicated by file_name starting with
the three character pattern "<CHAR>", where CHAR represents any single non-
space, printable character, all occurences of which in the rest of file_name (if any)
will be translated into a new line in the HERE file content. The HERE file name for
logging and error messages will be "HERE_FILE#N" where N is the instantation
number of the HERE file in program execution order. As an example, if file_name
is "<;>one;2;three amigos", then the HERE file indicator is "<;>", the end-of-line
substitution character is ";", and the HERE file content is the following three lines:

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one
2
three amigos

Note: The HERE file content in file_name is NOT pre-processed by the pseudo-
preprocessor of this instance of xtsc_script_file; however, if the value of file_name itself
came from another xtsc_script_file (a typical use-case in an xtsc-run script) then it would
have been pre-processed by that xtsc_script_file before being used as file_name in this
constructor call.

Parameters:
m_parm_name Optional parameter name that file_name came from. This is used for
exception messages.
name Optional name of the component using the script file (for example, "ColorLUT").
This is used for exception messages and for supplying the value of the alias macro
XTSC_SCRIPT_FILE_COMPONENT.
type Optional type of component using the script file (for example, "xtsc_lookup").
This is used for exception messages.
wraparound If false (the default), the file is only processed one time. If true, the file
pointer will be reset to the beginning of the file each time the end of file is reached.
If wraparound is true, the file must contain at least one non-blank, non-comment
line or an exception will be thrown.
p_macros Optional pointer to a map of name/value pair strings to be used as pre-
defined alias macros. This mechanism is used by xtsc-run --define command
to allow passing the value of Xtensa Xplorer variables into an xtsc-run script as
xtsc_script_file macros.
log_here_file If true (the default), the HERE file name and contents, if applicable, will
be logged by the constructor.

7.150.3 Member Function Documentation

7.150.3.1 u32 getline (std::string & line, std::string ∗ p_file = NULL)

Get the next line from the file. This method returns the next non-blank, non-comment line
from the file.

Parameters:
line A reference to the string object in which to return the next non-blank, non-
comment line of the file.
p_file An optional pointer to a string in which to return the name of the file from which
this line came from (or NULL if the name of the file is not desired).

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Note: By default, the getline() method trims trailing whitespace (tabs and spaces) from the
end of the line before returning it. If this is not desired, define the environment variable
XTSC_SCRIPT_FILE_DO_NOT_TRIM_TRAILING_WHITESPACE.

Returns:
the line number. Returns 0 if wraparound is false and the end of file is reached.

7.150.3.2 u32 get_words (std::vector< std::string > & words, bool downshift =
false, std::string ∗ p_file = NULL)

Get the next line from the file broken into words. This method returns the next non-blank,
non-comment line from the file broken into words. Word tokenization is based on whites-
pace (tab and space characters).

Parameters:
words A reference to a vector<string> object in which to return the words.
downshift If true, all the uppercase characters in each string in the words vector will
be shifted to lowercase.
p_file An optional pointer to a string in which to return the name of the file from which
this line came from (or NULL if the name of the file is not desired).

Returns:
the line number. Returns 0 if wraparound is false and the end of file is reached.

7.150.3.3 u32 get_words (std::vector< std::string > & words, std::string & line,
bool downshift = false, std::string ∗ p_file = NULL)

Get the next line from the file broken into words. This method returns the next non-blank,
non-comment line from the file broken into words. Word tokenization is based on whites-
pace (tab and space characters). In addition, the line read from the file is returned.

Parameters:
words A reference to a vector<string> object in which to return the words.
line A reference to the string object in which to return the line read from the file and
used to form the words vector. Any C-style comment characters will not appear in
line, but the other characters will be in the same case as they came from the file
(i.e. they will not be downshifted).

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downshift If true, all the uppercase characters in each string in the words vector will
be shifted to lowercase.
p_file An optional pointer to a string in which to return the name of the file from which
this line came from (or NULL if the name of the file is not desired).

Returns:
the line number. Returns 0 if wraparound is false and the end of file is reached.

7.150.3.4 std::string evaluate_lua_expression (const std::string & exp)

Evaluate exp as a Lua expression and return the result.

Parameters:
exp A Lua expression to evaluate. The expression must not call SystemC wait().

Returns:
the result.

See also:
"LUA_FUNCTION" in "script_file" of xtsc_component::xtsc_memory_parms for an ex-
ample of how this method can be used.

7.150.3.5 void dump_last_line_info (std::ostream & os = std::cout, bool

single_line = true)

Dump file name and line number info, including include backtrace.

Parameters:
os The ostream object to which the backtrace is to be dumped.
single_line If true, print backtrace on a signle line, otherwise use one line per file.

The documentation for this class was generated from the following file:

• xtsc.h

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7.151 xtsc_signal_sc_bv_base Class Reference

Pin-level signal for connecting to a TIE export state, TIE import wire, or system-level I/O of
xtsc_core.
#include <xtsc/xtsc.h>Inheritance diagram for xtsc_signal_sc_bv_base:

xtsc_signal_sc_bv_base

xtsc_signal_sc_bv_base_floating

Public Member Functions

• xtsc_signal_sc_bv_base (u32 width1)

• xtsc_signal_sc_bv_base (const char ∗name, u32 width1)
• u32 get_bit_width () const
Get the width in bits of this signal.

• virtual const char ∗ kind () const

Our C++ type (SystemC uses this).

Private Attributes

• u32 m_width1

7.151.1 Detailed Description

Pin-level signal for connecting to a TIE export state, TIE import wire, or system-level I/O
of xtsc_core. This convenience class implements a pin-level signal for connecting to a TIE
export state, TIE import wire, or system-level I/O of an xtsc_core. The advantage of using
this class instead of sc_signal<sc_bv_base> (from which it inherits) is that you can directly
specify the bit-width of the underlying sc_bv_base using the width1 constructor parameter
instead of having to indirectly specify it through a separate sc_length_context object.

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This is a convenience class. If desired you may use sc_signal<sc_bv_base> in lieu of

xtsc_signal_sc_bv_base for connecting to a pin-level input or output of xtsc_core. In either
case, however, the TIE export state, TIE import wire, or system-level I/O interfaces must
be named in the xtsc_core object’s "SimPinLevelInterfaces" parameter in order for it to be
available as a pin-level input or output.

See also:
xtsc_core::How_to_do_output_pin_binding;
xtsc_core::How_to_do_input_pin_binding;

Definition at line 2077 of file xtsc.h.

The documentation for this class was generated from the following file:

• xtsc.h

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7.152 xtsc_signal_sc_bv_base_floating Class Reference

Floating signal for a capped (unused) TIE export state or import wire.
#include <xtsc/xtsc.h>Inheritance diagram for xtsc_signal_sc_bv_base_floating:

xtsc_signal_sc_bv_base

xtsc_signal_sc_bv_base_floating

Collaboration diagram for xtsc_signal_sc_bv_base_floating:

xtsc_signal_sc_bv_base

xtsc_signal_sc_bv_base_floating

Public Member Functions

• xtsc_signal_sc_bv_base_floating (u32 width1, log4xtensa::TextLogger &text)

• xtsc_signal_sc_bv_base_floating (const char ∗name, u32 width1,
log4xtensa::TextLogger &text)
• const sc_dt::sc_bv_base & read () const
• void write (const sc_dt::sc_bv_base &value)
• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

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Private Attributes
• log4xtensa::TextLogger & m_text

7.152.1 Detailed Description

Floating signal for a capped (unused) TIE export state or import wire. This class imple-
ments the signal use to cap an unconnected TIE export state or TIE import wire.
Definition at line 2100 of file xtsc.h.
The documentation for this class was generated from the following file:

• xtsc.h

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7.153 xtsc_signal_sc_uint_base Class Reference

Pin-level signal for connecting certain pin-level memory ports.

#include <xtsc/xtsc.h>

Public Member Functions

• xtsc_signal_sc_uint_base (u32 width1)
• xtsc_signal_sc_uint_base (const char ∗name, u32 width1)
• u32 get_bit_width () const
Get the width in bits of this signal.

• virtual const char ∗ kind () const

Our C++ type (SystemC uses this).

Private Attributes
• u32 m_width1

7.153.1 Detailed Description

Pin-level signal for connecting certain pin-level memory ports. This convenience class
implements a pin-level signal for connecting pin-level memory ports of template type sc_-
unit_base. The advantage of using this class instead of sc_signal<sc_uint_base> (from
which it inherits) is that you can directly specify the bit-width of the underlying sc_uint_base
using the width1 constructor parameter instead of having to indirectly specify it through a
separate sc_length_context object.
Definition at line 2128 of file xtsc.h.
The documentation for this class was generated from the following file:

• xtsc.h

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7.154 xtsc_slave Class Reference

A scripted memory interface slave.

#include <xtsc/xtsc_slave.h>Inheritance diagram for xtsc_slave:

xtsc_connection_interface xtsc_resettable xtsc_debug_if

xtsc_module xtsc_request_if

xtsc_slave

Collaboration diagram for xtsc_slave:

xtsc_connection_interface xtsc_resettable xtsc_debug_if

xtsc_module xtsc_request_if xtsc_script_file

m_response_stream

xtsc_slave

Classes

• class response_info
This class helps keep track of a response and when it is due.

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Public Member Functions

• SC_HAS_PROCESS (xtsc_slave)
• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

• xtsc_slave (sc_core::sc_module_name module_name, const xtsc_slave_parms

&slave_parms)
Constructor for an xtsc_slave.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• void reset (bool hard_reset=false)

Reset the xtsc_slave.

• void connect (xtsc_arbiter &arbiter)

Connect with an xtsc_arbiter.

• void connect (xtsc::xtsc_core &core, const char ∗memory_name)

Connect with an xtsc_core.

• void connect (xtsc_master &master)

Connect with an xtsc_master.

• void connect (xtsc_memory_trace &memory_trace, xtsc::u32 port_num)

Connect with an xtsc_memory_trace.

• void connect (xtsc_pin2tlm_memory_transactor &pin2tlm, xtsc::u32 port_num)

Connect with an xtsc_pin2tlm_memory_transactor.

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• void connect (xtsc_router &router, xtsc::u32 port_num)

Connect with an xtsc_router.

• virtual void delayed_response_thread (void)

Send delayed (not immediate) responses to the memory interface master.

• virtual void nb_peek (xtsc::xtsc_address address8, xtsc::u32 size8, xtsc::u8 ∗buffer)

Receive peeks from the memory interface master.

• virtual void nb_poke (xtsc::xtsc_address address8, xtsc::u32 size8, const xtsc::u8

∗buffer)
Receive pokes from the memory interface master.

• virtual bool nb_peek_coherent (xtsc::xtsc_address virtual_address8, xtsc::xtsc_-

address physical_address8, xtsc::u32 size8, xtsc::u8 ∗buffer)
Receive coherent peeks from the memory interface master.

• virtual bool nb_poke_coherent (xtsc::xtsc_address virtual_address8, xtsc::xtsc_-

address physical_address8, xtsc::u32 size8, const xtsc::u8 ∗buffer)
Receive coherent pokes from the memory interface master.

• virtual bool nb_fast_access (xtsc::xtsc_fast_access_request &request)

Receive fast access requests from the memory interface master.

• void nb_request (const xtsc::xtsc_request &request)

Receive requests from the memory interface master.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

Public Attributes

• sc_core::sc_export< xtsc::xtsc_request_if > m_request_export

From memory interface master to us.

• sc_core::sc_port< xtsc::xtsc_respond_if > m_respond_port

From us to memory interface master.

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Protected Member Functions

• void send_response (xtsc::xtsc_response &response, bool non_blocking)

Send and log a response (set non_blocking true if called from nb_request).

• response_info ∗ new_response_info (const xtsc::xtsc_request &request)

Create a new response_info object.

• void delete_response_info (response_info ∗&p_response_info)

Delete a response_info object.

• int get_words ()
Get the next vector of words which define an xtsc::xtsc_response test vector.

• xtsc::u32 get_u32 (xtsc::u32 index, const std::string &argument_name)

Extract a u32 value (named argument_name) from the word at m_words[index].

• double get_double (xtsc::u32 index, const std::string &argument_name)

Extract a double value (named argument_name) from the word at m_words[index].

• xtsc::xtsc_response::coherence_t optionally_get_coherence (xtsc::u32 index,

xtsc::u32 &offset)
Get the optional coherence value.

• void set_buffer (xtsc::xtsc_response &response, xtsc::u32 index, xtsc::u32 size8)

Set the buffer of this response using size8 words starting at m_words[index].

Protected Attributes

• std::string m_script_file
The name of the response script file.

• bool m_wraparound
True if m_script_file should be reread after reaching EOF.

• xtsc::xtsc_script_file ∗ m_response_stream
The response script file object.

• xtsc::u32 m_format
The format in effect. See "format" parameter.

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• std::string m_line
Line from m_script_file.

• xtsc::u32 m_line_count
Line number in m_script_file of m_line.

• std::vector< std::string > m_words

The vector of words from current line of m_script_file.

• std::deque< response_info ∗ > m_responses

The deque of pending responses.

• sc_core::sc_event m_delayed_response_event
Event to notify delayed_response_thread.

• xtsc::u32 m_repeat_count
How many times to repeat a rejected response.

• xtsc::u32 m_ignore_count
How many times to ignore a request.

• sc_core::sc_time m_repeat_delay_time
How long to wait between repeated responses.

• sc_core::sc_time m_clock_period
This modules clock period.

• log4xtensa::TextLogger & m_text

Text logger.

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

7.154.1 Detailed Description

A scripted memory interface slave. Example XTSC device implementing a slave on a

memory interface that reads an input file to determine what responses to send to a mas-
ter device. This provides a simple means to test an xtsc_master, an xtsc_core, or even
a system comprised of xtsc_arbiter, xtsc_core, xtsc_master, xtsc_mmio, and xtsc_router
objects.

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Here is a block diagram of an xtsc_slave as it is used in the slave example:

nb_respond()

nb_request()
xtsc_master master xtsc_slave slave

request.vec response.vec

master.m_request_port slave.m_respond_port

master.m_respond_export slave.m_request_export

Figure 7.20: xtsc_slave Example

See also:
xtsc_slave_parms
xtsc::xtsc_request_if
xtsc::xtsc_respond_if

Definition at line 229 of file xtsc_slave.h.

7.154.2 Constructor & Destructor Documentation

7.154.2.1 xtsc_slave (sc_core::sc_module_name module_name, const

xtsc_slave_parms & slave_parms)

Constructor for an xtsc_slave.

Parameters:
module_name Name of the xtsc_slave sc_module.
slave_parms The remaining parameters for construction.

See also:
xtsc_slave_parms

7.154.3 Member Function Documentation

7.154.3.1 void connect (xtsc_arbiter & arbiter)

Connect with an xtsc_arbiter. This method connects the master port pair of the specified
xtsc_arbiter with the slave port pair of this xtsc_slave.

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Parameters:
arbiter The xtsc_arbiter to connect with this xtsc_slave.

7.154.3.2 void connect (xtsc::xtsc_core & core, const char ∗ memory_name)

Connect with an xtsc_core. This method connects the specified memory interface master
port pair of the specified xtsc_core with the slave port pair of this xtsc_slave.

Parameters:
core The xtsc_core to connect with this xtsc_slave.
memory_name The name of the memory interface master port pair of the xtsc_core
to connect with this xtsc_slave.

7.154.3.3 void connect (xtsc_master & master)

Connect with an xtsc_master. This method connects the master port pair of the specified
xtsc_master with the slave port pair of this xtsc_slave.

Parameters:
master The xtsc_master to connect with this xtsc_slave.

7.154.3.4 void connect (xtsc_memory_trace & memory_trace, xtsc::u32 port_num)

Connect with an xtsc_memory_trace. This method connects the specified master port pair
of the specified xtsc_memory_trace with the slave port pair of this xtsc_slave.

Parameters:
memory_trace The xtsc_memory_trace to connect with this xtsc_slave.
port_num The xtsc_memory_trace master port pair to connect with this xtsc_slave.

7.154.3.5 void connect (xtsc_pin2tlm_memory_transactor & pin2tlm, xtsc::u32

port_num)

Connect with an xtsc_pin2tlm_memory_transactor. This method connects the specified

TLM master port pair of the specified xtsc_pin2tlm_memory_transactor with the slave port
pair of this xtsc_slave.

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Parameters:
pin2tlm The xtsc_pin2tlm_memory_transactor to connect with this xtsc_slave.
port_num The xtsc_pin2tlm_memory_transactor master port pair to connect with this
xtsc_slave.

7.154.3.6 void connect (xtsc_router & router, xtsc::u32 port_num)

Connect with an xtsc_router. This method connects the specified master port pair of the
specified xtsc_router with the slave port pair of this xtsc_slave.

Parameters:
router The xtsc_router to connect with this xtsc_slave.
port_num The xtsc_router master port pair to connect with this xtsc_slave.

7.154.3.7 xtsc::xtsc_response::coherence_t optionally_get_coherence (xtsc::u32

index, xtsc::u32 & offset) [protected]

Get the optional coherence value. If word at m_words[index] exists and starts with a dollar
sign then convert the rest of the word to a coherence_t value, set offset to 1, and return the
coherence value. Otherwise, set offset to 0 and return a coherence value of 0.
The documentation for this class was generated from the following file:

• xtsc_slave.h

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7.155 xtsc_slave_parms Class Reference

Constructor parameters for a xtsc_slave object.

#include <xtsc/xtsc_slave.h>Inheritance diagram for xtsc_slave_parms:

xtsc_parms

xtsc_slave_parms

Collaboration diagram for xtsc_slave_parms:

xtsc_parms

xtsc_slave_parms

Public Member Functions

• xtsc_slave_parms (const char ∗script_file=NULL, bool wraparound=true)

Constructor for an xtsc_slave_parms object.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

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7.155.1 Detailed Description

Constructor parameters for a xtsc_slave object.

Name Type Description

------------------ ---- --------------------------------------------------------

"format" u32 If 1, the default, support line format #1 in the script

file (see "script_file" parameter). If 2, line format
#2 is supported. Generally, line format #2 is identical
to format #1 except for the addition of the coh field.
The line format specified by this parameter can be
changed using the "FORMAT 1|2" command in the script
file itself.
Default 1.

"script_file" char* The file to read the responses from. Each response
takes one line in the file; however, the file can
contain a few other lines besides response lines.
Each time an nb_request() call is made to xtsc_slave,
the script file is processed line by line up to and
including the next response line (a response line is a
line that starts with a delay) or to an IGNORE line.
The supported line formats are:

// All formats
REPEAT rcount [rdelay]
IGNORE icount
NOTE <message>
INFO <message>
FORMAT 1|2

// Format 1
delay status size route_id id priority pc last b0 b1 ... bN [CONT]

// Format 2
delay status size route_id id priority pc last coh b0 b1 ... bN [CONT]

1. Each field after delay corresponds to a data member

in the xtsc::xtsc_response object.
2. The coh field (Format 2) specifies the value to be
passed to the xtsc::xtsc_response::set_coherence()
method.
3. Integers can appear in decimal or hexadecimal (using
'0x' prefix) format.
4. N (in bN) is equal to (size - 1).
5. If CONT was not specified for the previous response,
then delay starts upon receipt of a request. If
CONT was specified for the previous response, then
delay starts upon completion of the previous
response. delay can be 0 (to mean 1 delta cycle),
or "now" to mean no delta cycle delay (i.e.
immediate notification), or a positive integer or
floating point number to mean that many clock
periods.
6. status = OKAY|NACC|ADDR|DATA|BOTH.

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7. Any of route_id, id, priority, and pc can be an

asterisk (*) to indicate that the value should be
obtained from the xtsc::xtsc_request object used to
create this xtsc::xtsc_response.
8. last can be 1 to mean last transfer or 0 to mean
NOT last transfer.
9. If CONT appears at the end of a response line, then the
next response line (and all intervening non-response
lines) will be processed without waiting for a
request. This can be used for BLOCK_READ responses
or to generate a response without a request.
10. A line starting with the word REPEAT redefines the
"repeat_count" and "repeat_delay" parameter values.
rcount can be any non-negative integer (including 0)
to indicate that a rejected response should be
repeated rcount times or it can be "forever" or
0xFFFFFFFF to indicate that a response should be
repeated until it is accepted. rdelay can be an
integer or floating point number. It will be
multiplied by the clock period (as determined by the
"clock_period" parameter value) to determine the
delay before a response is repeated.
11. An IGNORE icount lines causes the next icount
requests to be ignored; that is, no response is
sent. icount must be greater then 0.
12. If a line starts with the word NOTE or INFO then the
entire line to be logged at NOTE_LOG_LEVEL or
INFO_LOG_LEVEL, respectively, and the next line of
the file will be read to get the response.
13. Words are case insensitive.
14. Comments, extra whitespace, blank lines, and lines
between "#if 0" and "#endif" are ignored.
See xtsc_script_file.

If "script_file" is null or empty then each

response will be a standard response. A standard
response has the following values:

delay status size route_id id priority pc last coh

1 okay 0 * * * * 1 0

"wraparound" bool Specifies what should happen when the end of file (EOF)
is reached on "script_file". When EOF is reached and
"wraparound" is true, "script_file" will be reset to
the beginning of file to get the next response. When
EOF is reached and "wraparound" is false, a standard
response will be used for the current request and all
subsequent requests.
Default = true.

"repeat_count" u32 Specifies how many times to repeat a rejected response

(this only applies to responses whose delay field is not
"now"). A value of 0xFFFFFFFF means to repeat the
response until it is accepted.
Default = 0 (do not repeat rejected responses).

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"repeat_delay" u32 This specifies how long to wait before sending a

repeated response (this applies only if "repeat_count"
is not 0). "repeat_delay" is expressed in terms of the
SystemC time resolution (from sc_get_time_resolution()).
A value of 0xFFFFFFFF means to use the value determined
by "clock_period". A value of 0 means one delta cycle.
Default = 0xFFFFFFFF (i.e. use the value determined by
"clock_period").

"clock_period" u32 This is the length of this slave's clock period

expressed in terms of the SystemC time resolution
(from sc_get_time_resolution()). A value of
0xFFFFFFFF means to use the XTSC system clock
period (from xtsc_get_system_clock_period()).
A value of 0 means one delta cycle.
Default = 0xFFFFFFFF (i.e. use the system clock
period).

See also:
xtsc_slave
xtsc::xtsc_parms
xtsc::xtsc_response

Definition at line 182 of file xtsc_slave.h.

7.155.2 Constructor & Destructor Documentation

7.155.2.1 xtsc_slave_parms (const char ∗ script_file = NULL, bool wraparound =

true) [inline]

Constructor for an xtsc_slave_parms object.

Parameters:
script_file The file name to read the responses from.
wraparound Indicates if script_file should wraparound to the beginning of the file after
the end of file is reached.

Definition at line 194 of file xtsc_slave.h.

The documentation for this class was generated from the following file:

• xtsc_slave.h

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7.156 xtsc_switch_registration Class Reference

Class for registering TurboXim simulation mode switching interfaces.

#include <xtsc/xtsc.h>Collaboration diagram for xtsc_switch_registration:

xtsc_mode_switch_if

m_switch_if

xtsc_switch_registration

Public Member Functions

• xtsc_switch_registration (sc_core::sc_object &obj, xtsc::xtsc_mode_switch_if

&switch_if, std::string)

constructor for a module_name, switching interface, group triplet

Public Attributes

• sc_core::sc_object ∗ m_object
• xtsc::xtsc_mode_switch_if ∗ m_switch_if

7.156.1 Detailed Description

Class for registering TurboXim simulation mode switching interfaces.

Definition at line 1838 of file xtsc.h.

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7.156.2 Constructor & Destructor Documentation

7.156.2.1 xtsc_switch_registration (sc_core::sc_object & obj,

xtsc::xtsc_mode_switch_if & switch_if, std::string)

constructor for a module_name, switching interface, group triplet

Parameters:
module_name The module that is registering the switch
switch_in The interface class that implements mode switching

The documentation for this class was generated from the following file:

• xtsc.h

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7.157 xtsc_tlm22xttlm_transactor Class Reference

Example module implementing an OSCI TLM2 to Xtensa TLM (xttlm) transactor.

#include <xtsc/xtsc_tlm22xttlm_transactor.h>Inheritance diagram for xtsc_-
tlm22xttlm_transactor:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface

xtsc_tlm22xttlm_transactor

Collaboration diagram for xtsc_tlm22xttlm_transactor:

xtsc_respond_if

m_transactor xtsc_respond_if_impl

m_xtsc_respond_if_impl
xtsc_connection_interface

xtsc_module
xtsc_resettable m_transactor
xtsc_tlm22xttlm_transactor
m_id_to_transaction_info_tab transaction_info
xtsc_command_handler_interface
m_transactor

tlm_fw_transport_if_impl
m_tlm_fw_transport_if_impl

Classes

• class address_range
Class to keep track of address ranges and what DMI access has been granted/invalidated.

• class tlm_fw_transport_if_impl
Implementation of tlm_fw_transport_if<>.

• class transaction_info

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Information about each transaction.

• class xtsc_respond_if_impl
Implementation of xtsc_respond_if.

Public Types
• typedef tlm::tlm_target_socket< 32 > target_socket_4
target socket with BUSWIDTH = 32 bits ( 4 bytes)

• typedef tlm::tlm_target_socket< 64 > target_socket_8

target socket with BUSWIDTH = 64 bits ( 8 bytes)

• typedef tlm::tlm_target_socket< 128 > target_socket_16

target socket with BUSWIDTH = 128 bits (16 bytes)

• typedef tlm::tlm_target_socket< 256 > target_socket_32

target socket with BUSWIDTH = 256 bits (32 bytes)

• typedef tlm::tlm_target_socket< 512 > target_socket_64

target socket with BUSWIDTH = 512 bits (64 bytes)

Public Member Functions

• target_socket_4 & get_target_socket_4 (xtsc::u32 port_num=0)
Get a reference to a target socket with a 4-byte data interface.

• target_socket_8 & get_target_socket_8 (xtsc::u32 port_num=0)

Get a reference to a target socket with a 8-byte data interface.

• target_socket_16 & get_target_socket_16 (xtsc::u32 port_num=0)

Get a reference to a target socket with a 16-byte data interface.

• target_socket_32 & get_target_socket_32 (xtsc::u32 port_num=0)

Get a reference to a target socket with a 32-byte data interface.

• target_socket_64 & get_target_socket_64 (xtsc::u32 port_num=0)

Get a reference to a target socket with a 64-byte data interface.

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• SC_HAS_PROCESS (xtsc_tlm22xttlm_transactor)
• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

• xtsc_tlm22xttlm_transactor (sc_core::sc_module_name module_name, const xtsc_-

tlm22xttlm_transactor_parms &transactor_parms)
Constructor for an xtsc_tlm22xttlm_transactor.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• xtsc::u32 get_num_ports ()
Get the number of memory ports this device has.

• xtsc::u32 get_byte_width () const

Return byte width of data interface (from "byte_width" parameter).

• void change_clock_period (xtsc::u32 clock_period_factor)

Method to change the clock period.

• void execute (const std::string &cmd_line, const std::vector< std::string > &words,
const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

• void connect (xtsc::xtsc_core &core, xtsc::u32 tlm22xttlm_port=0)

Connect this xtsc_tlm22xttlm_transactor to an xtsc_core.

• void connect (xtsc_master_tlm2 &master_tlm2, xtsc::u32 target_socket)

Connect an xtsc_master_tlm2 to this xtsc_tlm22xttlm_transactor.

• xtsc::u32 connect (xtsc_xttlm2tlm2_transactor &xttlm2tlm2, xtsc::u32 initiator_-

socket=0, xtsc::u32 target_socket=0, bool single_connect=false)
Connect an xtsc_xttlm2tlm2_transactor transactor to this xtsc_tlm22xttlm_transactor trans-
actor.

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• void reset (bool hard_reset=false)

Reset the transactor.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

Public Attributes
• sc_core::sc_port< xtsc::xtsc_request_if > ∗∗ m_request_ports
From us to downstream slave(s).

• sc_core::sc_export< xtsc::xtsc_respond_if > ∗∗ m_respond_exports

From downstream slave(s) to us.

Private Types
• typedef tlm_utils::peq_with_get< tlm::tlm_generic_payload > peq

Private Member Functions

• void validate_port_and_width (xtsc::u32 port_num, xtsc::u32 width8)
Perform validation for the get_intiator_socket_BW() methods.

• transaction_info ∗ new_transaction_info (tlm::tlm_generic_payload ∗p_gp)

Get a new transaction object (from the pool).

• void delete_transaction_info (transaction_info ∗&p_transaction_info)

Delete a transaction_info (return it to the pool).

• xtsc::xtsc_request ∗ new_request ()
Get a new xtsc_request (from the pool).

• void delete_request (xtsc::xtsc_request ∗&p_request)

Delete an xtsc_request (return it to the pool).

• virtual void compute_delays ()

Common method to compute/re-compute time delays.

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• void worker_thread (void)

Handle incoming requests from each master (one per port).

• void nb2b_thread (void)

Convert nb_transport to b_transport (one per port).

• void send_response (xtsc::xtsc_response &response, xtsc::u32 port_num)

Common method for sending a response.

Private Attributes

• target_socket_4 ∗∗ m_target_sockets_4
Initiator socket(s) for 4-byte interface.

• target_socket_8 ∗∗ m_target_sockets_8
Initiator socket(s) for 8-byte interface.

• target_socket_16 ∗∗ m_target_sockets_16
Initiator socket(s) for 16-byte interface.

• target_socket_32 ∗∗ m_target_sockets_32
Initiator socket(s) for 32-byte interface.

• target_socket_64 ∗∗ m_target_sockets_64
Initiator socket(s) for 64-byte interface.

• xtsc_respond_if_impl ∗∗ m_xtsc_respond_if_impl
m_respond_exports bind to these

• tlm_fw_transport_if_impl ∗∗ m_tlm_fw_transport_if_impl
m_target_sockets binds to these

• xtsc::u32 m_next_port_num_worker
Used by worker_thread to get its port number.

• xtsc::u32 m_next_port_num_nb2b
Used by nb2b_thread to get its port number.

• xtsc::u32 m_num_ports

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See the "num_ports" parameter.

• xtsc::u32 m_width8
See the "byte_width" parameter.

• xtsc::u32 m_priority
See the "priority" parameter.

• xtsc::u32 m_pc
See the "pc" parameter.

• xtsc::u32 m_max_burst_beats
See the "max_burst_beats" parameter.

• bool m_use_pif_block
See the "use_pif_block" parameter.

• bool m_use_pif_burst
See the "use_pif_burst" parameter.

• bool m_allow_dmi
See the "allow_dmi" parameter.

• bool m_allow_transport_dbg
See the "allow_transport_dbg" parameter.

• xtsc::u64 m_clock_period_value
Clock period as u64.

• sc_core::sc_time m_time_resolution
SystemC time resolution.

• sc_core::sc_time m_clock_period
This transactor’s clock period.

• sc_core::sc_event ∗∗ m_worker_thread_event
To notify worker_thread when transaction is accepted.

• peq ∗∗ m_peq
For nb_transport/nb2b_thread (per port).

• bool ∗ m_waiting_for_nacc

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True if waiting for RSP_NACC from slave.

• bool ∗ m_request_got_nacc
True if request got RSP_NACC from slave.

• xtsc::u8 ∗ m_next_id
Next potentially available PIF ID (per port).

• transaction_info ∗∗∗ m_id_to_transaction_info_tab

Map PIF ID to transaction info (64 per port).

• int ∗∗ m_id_to_request_tab
Map PIF ID to req entry in m_requests (64 per port).

• std::deque< transaction_info ∗ > ∗∗ m_pending_transaction_deque

Hold pending transaction_info objects.

• std::vector< transaction_info ∗ > m_transaction_info_pool

Maintain a pool to improve performance.

• std::vector< xtsc::xtsc_request ∗ > m_request_pool

Maintain a pool of requests to improve performance.

• xtsc::u32 m_transaction_info_count
Count number of constructed transaction_info objects.

• xtsc::u32 m_request_count
Count number of constructed xtsc_request objects.

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

• log4xtensa::TextLogger & m_text

Text logger.

7.157.1 Detailed Description

Example module implementing an OSCI TLM2 to Xtensa TLM (xttlm) transactor. This
module can be used to connect an OSCI TLM2 memory interface master (for example,
xtsc_master_tlm2) to an Xtensa TLM memory interface slave (for example, the inbound
PIF of xtsc::xtsc_core).

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For protocol and timing information specific to xtsc_core and the Xtensa ISS, see
xtsc::xtsc_core::Information_on_memory_interface_protocols.
Here is a block diagram of an xtsc_tlm22xttlm_transactor being used in the xtsc_-
tlm22xttlm_transactor example:

(*tlm22xttlm.m_request_ports[0])

(core0.get_request_export(“inbound_pif”))
master.get_initiator_socket_4()

req
nb_request
xtsc_memory
pif
rsp

xtsc_tlm22xttlm_transactor
xtsc_master_tlm2 b_transport tlm22xttlm xtsc_core
master “num_ports” = 1 core0

req
master_tlm2.vec
nb_respond xtsc_memory
dram0
rsp

core0.get_respond_port(“inbound_pif”)

(*tlm22xttlm.m_respond_exports[0])

(tlm22xttlm.get_target_socket_4(0))

Figure 7.21: xtsc_tlm22xttlm_transactor Example

See also:
xtsc_tlm22xttlm_transactor_parms
xtsc::xtsc_request
xtsc::xtsc_response
xtsc::xtsc_request_if
xtsc::xtsc_respond_if
xtsc::xtsc_core
xtsc::xtsc_core::Information_on_memory_interface_protocols.
xtsc_master_tlm2
xtsc_xttlm2tlm2_transactor

Definition at line 193 of file xtsc_tlm22xttlm_transactor.h.

7.157.2 Constructor & Destructor Documentation

7.157.2.1 xtsc_tlm22xttlm_transactor (sc_core::sc_module_name module_name,

const xtsc_tlm22xttlm_transactor_parms & transactor_parms)

Constructor for an xtsc_tlm22xttlm_transactor.

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Parameters:
module_name Name of the xtsc_tlm22xttlm_transactor sc_module.
transactor_parms The remaining parameters for construction.

See also:
xtsc_tlm22xttlm_transactor_parms

7.157.3 Member Function Documentation

7.157.3.1 void change_clock_period (xtsc::u32 clock_period_factor)

Method to change the clock period.

Parameters:
clock_period_factor Specifies the new length of this device’s clock period expressed
in terms of the SystemC time resolution (from sc_get_time_resolution()).

7.157.3.2 void execute (const std::string & cmd_line, const std::vector<

std::string > & words, const std::vector< std::string > & words_lc,
std::ostream & result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:

change_clock_period <ClockPeriodFactor>
Call xtsc_tlm22xttlm_transactor::change_clock_period(<ClockPeriodFactor>).
Return previous <ClockPeriodFactor> for this device.

Implements xtsc_command_handler_interface.

7.157.3.3 void connect (xtsc::xtsc_core & core, xtsc::u32 tlm22xttlm_port = 0)

Connect this xtsc_tlm22xttlm_transactor to an xtsc_core. This method connects the spec-

ified Xtensa TLM master port pair of this xtsc_tlm22xttlm_transactor to the inbound PIF
slave port pair of the specified xtsc_core.

Parameters:
core The xtsc_core to connect with this xtsc_tlm22xttlm_transactor.
tlm22xttlm_port The master port pair of this xtsc_tlm22xttlm_transactor to connect
with the inbound PIF interface of core.

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7.157.3.4 void connect (xtsc_master_tlm2 & master_tlm2, xtsc::u32 target_socket)

Connect an xtsc_master_tlm2 to this xtsc_tlm22xttlm_transactor. This method connects

the specified xtsc_master_tlm2 to the specified target socket of this xtsc_tlm22xttlm_-
transactor.

Parameters:
master_tlm2 The xtsc_master_tlm2 to connect to this xtsc_tlm22xttlm_transactor.
target_socket The target socket of this transactor to connect the initiator socket of
master_tlm2 to.

7.157.3.5 xtsc::u32 connect (xtsc_xttlm2tlm2_transactor & xttlm2tlm2, xtsc::u32

initiator_socket = 0, xtsc::u32 target_socket = 0, bool single_connect =
false)

Connect an xtsc_xttlm2tlm2_transactor transactor to this xtsc_tlm22xttlm_transactor trans-

actor. This method connects the specified TLM2 initiator socket of an upstream
xtsc_xttlm2tlm2_transactor to the specified TLM2 target socket of this xtsc_tlm22xttlm_-
transactor.

Parameters:
xttlm2tlm2 The xtsc_xttlm2tlm2_transactor to connect to this xtsc_tlm22xttlm_-
transactor.
initiator_socket The initiator socket of xttlm2tlm2 to connect to this xtsc_tlm22xttlm_-
transactor.
target_socket The target socket of this transactor to connect the initiator socket of
xttlm2tlm2 to.
single_connect If true only one socket of this transactor will be connected. If false,
the default, then all contiguous, unconnected socket numbers of this transactor
starting at target_socket that have a corresponding existing socket in xttlm2tlm2
(starting at initiator_socket) will be connected to that corresponding socket in xt-
tlm2tlm2.

NOTE: This method is just for special testing purposes. In general, connecting a xtsc_-
xttlm2tlm2_transactor to a xtsc_tlm22xttlm_transactor is not guarranteed to meet timing
requirements.

Returns:
number of sockets that were connected by this call (1 or more)

The documentation for this class was generated from the following file:

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• xtsc_tlm22xttlm_transactor.h

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7.158 xtsc_tlm22xttlm_transactor_parms Class Refer-

ence

Constructor parameters for a xtsc_tlm22xttlm_transactor object.

#include <xtsc/xtsc_tlm22xttlm_transactor.h>Inheritance diagram for xtsc_-
tlm22xttlm_transactor_parms:

xtsc_parms

xtsc_tlm22xttlm_transactor_parms

Collaboration diagram for xtsc_tlm22xttlm_transactor_parms:

xtsc_parms

xtsc_tlm22xttlm_transactor_parms

Public Member Functions

• xtsc_tlm22xttlm_transactor_parms (xtsc::u32 width8=4, xtsc::u32 num_ports=1)

Constructor for an xtsc_tlm22xttlm_transactor_parms object.

• void init (xtsc::u32 width8=4, xtsc::u32 num_ports=1)

Do initialization common to both constructors.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

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7.158.1 Detailed Description

Constructor parameters for a xtsc_tlm22xttlm_transactor object.

Name Type Description

------------------ ---- --------------------------------------------------------

"num_ports" u32 The number of TLM2 initiator sockets this transactor has
as well as the number of Xtensa TLM (xttlm) port pairs
this transactor has.
Default = 1.
Minimum = 1.

"byte_width" u32 Bus width in bytes. Valid values are 4, 8, 16, 32, and
64. If byte_width is 32 or 64 then only READ and WRITE
requests are allowed. The exclusive-to-PIF transactions
(BLOCK_READ, BURST_READ, RCW, BLOCK_WRITE, and
BURST_WRITE) are only allowed if byte_width is 4|8|16.

"priority" u32 The priority of inbound PIF requests.

Default = 3 (highest priority).

"pc" u32 The pc to use for xtsc_request objects.

Default = 0xFFFFFFFF.

"use_pif_block" bool If true, then a TLM2 burst transfer transaction that can
be mapped to a PIF BLOCK_READ|BLOCK_WRITE transaction
will be.
Default = true.

Note: A TLM2 transaction is considered a burst transfer transaction if the generic

payload data length attribute is greater then the BUSWIDTH template parameter
of the socket.

"use_pif_burst" bool If true, then a TLM2 burst transfer transaction that can
be mapped to a PIF BURST_READ|BURST_WRITE transaction
will be.
Default = false.

"max_burst_beats" u32 If "use_pif_burst" is true, then this specifies the

maximum number of transfers (beats) that will be used
for PIF BURST_READ or BURST_WRITE transactions. The
original PIF Protocol 3.1 allowed up to 8 transfers.
The enhanced PIF burst of Xtensa iDMA hardware in
RG-2017.8 and later allowed up to 16 transfers.
Default = 8.

"allow_dmi" bool If true, this transactor will attempt to get raw access
to the downstream memory using nb_fast_access in order
to support DMI. If false, no attempt will be made to
support DMI. Even if this parameter is true, DMI can
not be supported if the downstream memory does not
support raw fast access.
Default = true.

"allow_transport_dbg" bool If true, this transactor will translate transport_dbg

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calls to nb_peek/nb_poke calls. If false, this

transactor will return 0 to all transport_dbg calls.
Default = true.

"clock_period" u32 This is the length of this transactor's clock period

expressed in terms of the SystemC time resolution
(from sc_get_time_resolution()). A value of
0xFFFFFFFF means to use the XTSC system clock period
(from xtsc_get_system_clock_period()). A value of 0
means one delta cycle.
Default = 0xFFFFFFFF (i.e. use the system clock period).

See also:
xtsc_tlm22xttlm_transactor
xtsc::xtsc_parms

Definition at line 126 of file xtsc_tlm22xttlm_transactor.h.

7.158.2 Constructor & Destructor Documentation

7.158.2.1 xtsc_tlm22xttlm_transactor_parms (xtsc::u32 width8 = 4, xtsc::u32

num_ports = 1) [inline]

Constructor for an xtsc_tlm22xttlm_transactor_parms object.

Parameters:
width8 Memory data bus width in bytes.
num_ports The number of ports this transactor has.

Definition at line 137 of file xtsc_tlm22xttlm_transactor.h.

The documentation for this class was generated from the following file:

• xtsc_tlm22xttlm_transactor.h

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7.159 xtsc_tlm2pin_memory_transactor Class Reference

This transactor converts memory transactions from transaction level (TLM) to pin level.
#include <xtsc/xtsc_tlm2pin_memory_transactor.h>Inheritance diagram for xtsc_-
tlm2pin_memory_transactor:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface xtsc_module_pin_base

xtsc_tlm2pin_memory_transactor

Collaboration diagram for xtsc_tlm2pin_memory_transactor:

xtsc_module_pin_base
m_request_impl
m_p_initial_value_file
xtsc_script_file xtsc_memory_b xtsc_request_if_impl
m_p_memory m_transactor

xtsc_resettable xtsc_module xtsc_tlm2pin_memory_transactor m_transactor

m_debug_cap
xtsc_connection_interface xtsc_command_handler_interface xtsc_request_if
xtsc_debug_if_cap

xtsc_debug_if

Classes

• class response_info
Information about each response.

• class xtsc_debug_if_cap
To cap an unconnected m_debug_ports port when the user can’t bind anything to it.

• class xtsc_request_if_impl
Implementation of xtsc_request_if.

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Public Types

• typedef xtsc::xtsc_request xtsc_request

• typedef sc_core::sc_signal< bool > bool_signal
• typedef sc_core::sc_fifo< bool > bool_fifo

Public Member Functions

• SC_HAS_PROCESS (xtsc_tlm2pin_memory_transactor)
This SystemC macro inserts some code required for SC_THREAD’s to work.

• virtual const char ∗ kind () const

Our C++ type (SystemC uses this).

• xtsc_tlm2pin_memory_transactor (sc_core::sc_module_name module_name, const

xtsc_tlm2pin_memory_transactor_parms &tlm2pin_parms)
Constructor for a xtsc_tlm2pin_memory_transactor.

• ∼xtsc_tlm2pin_memory_transactor (void)
Destructor.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• bool has_dso () const

Return true if "dso_name" was provided.

• void dump_pending_rsp_info (std::ostream &os)

Dump pending response info.

• xtsc::u64 get_pending_rsp_info_cnt (void)

Return the number of pending responses (m_pending_rsp_info_cnt).

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• void execute (const std::string &cmd_line, const std::vector< std::string > &words,
const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

• void connect (xtsc_arbiter &arbiter, xtsc::u32 port_num=0)

Connect an xtsc_arbiter with this xtsc_tlm2pin_memory_transactor.

• xtsc::u32 connect (xtsc::xtsc_core &core, const char ∗memory_port_name, xtsc::u32

port_num=0, bool single_connect=false)
Connect an xtsc_core with this xtsc_tlm2pin_memory_transactor.

• void connect (xtsc_master &master, xtsc::u32 port_num=0)

Connect an xtsc_master with this xtsc_tlm2pin_memory_transactor.

• xtsc::u32 connect (xtsc_memory_trace &memory_trace, xtsc::u32 trace_port=0,

xtsc::u32 port_num=0, bool single_connect=false)
Connect an xtsc_memory_trace with this xtsc_tlm2pin_memory_transactor.

• void connect (xtsc_router &router, xtsc::u32 router_port, xtsc::u32 port_num=0)

Connect an xtsc_router with this xtsc_tlm2pin_memory_transactor.

• virtual void reset (bool hard_reset=false)

The implementation of reset() in xtsc_module logs a warning and does nothing else.

• virtual void peek (xtsc::u32 port_num, xtsc::xtsc_address address8, xtsc::u32 size8,

xtsc::u8 ∗buffer)
Handle nb_peek() calls.

• virtual void poke (xtsc::u32 port_num, xtsc::xtsc_address address8, xtsc::u32 size8,

const xtsc::u8 ∗buffer)
Handle nb_poke() calls.

• virtual bool fast_access (xtsc::u32 port_num, xtsc::xtsc_fast_access_request &re-

quest)
Handle nb_fast_access() calls.

• memory_interface_type get_interface_type () const

Return the interface type.

• const char ∗ get_interface_name () const

Return the interface name string.

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• xtsc::u32 get_num_ports () const

Return the number of memory ports this transactor has.

• bool get_append_id () const

Return true if pin port names include the set_id as a suffix.

Public Attributes
• sc_core::sc_export< xtsc::xtsc_request_if > ∗∗ m_request_exports
• sc_core::sc_port< xtsc::xtsc_respond_if > ∗∗ m_respond_ports
From master to us (per mem port).

• sc_core::sc_port< xtsc::xtsc_debug_if, NSPP > ∗∗ m_debug_ports

From us to master (per mem port).

• xtsc::Readme How_to_get_input_and_output_ports
From us to slave (per mem port).

Protected Types
• typedef std::deque< response_info ∗ > rsp_info_deque
• typedef std::map< xtsc::u64, rsp_info_deque ∗ > rsp_info_deque_map
• typedef void ∗ HMODULE
• typedef void(∗ peek_t )(xtsc::u32 address8, xtsc::u32 size8, xtsc::u8 ∗buffer, const
char ∗dso_cookie, xtsc::u32 port)
• typedef void(∗ poke_t )(xtsc::u32 address8, xtsc::u32 size8, const xtsc::u8 ∗buffer,
const char ∗dso_cookie, xtsc::u32 port)

Protected Member Functions

• virtual void before_end_of_elaboration (void)
SystemC callback.

• virtual void end_of_elaboration (void)

SystemC callback.

• virtual void start_of_simulation (void)

SystemC callback.

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• virtual void end_of_simulation (void)

SystemC callback.

• void pif_request_thread (void)

Handle PIF|IDMA0 requests.

• void pif_response_thread (void)

Handle PIF|IDMA0 responses.

• void pif_drive_resp_rdy_thread (void)

PIF|IDMA0: Drive PORespRdy.

• void lcl_request_thread (void)

Handle local memory requests.

• void lcl_7stage_write_rsp_thread (void)

Thread to write response for 7stage configs.

• void lcl_busy_write_rsp_thread (void)

Thread to sample local busy and/or send write response.

• void lcl_sample_read_data_thread (void)

Thread to sample local memory read data and respond.

• void xlmi_retire_thread (void)

XLMI: Handle DPortLoadRetired pin.

• void xlmi_flush_thread (void)

XLMI: Handle DPortRetireFlush pin.

• void xlmi_load_thread (void)

XLMI: Handle DPortLoad pin.

• void xlmi_load_method (void)

XLMI: Help handle DPortLoad pin when interface has a busy pin.

• void dram_lock_thread (void)

DRAM: Handle DRamLock.

• void send_unchecked_response (xtsc::xtsc_response ∗&p_response, xtsc::u32 port)

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Log and send a local-memory or RSP_NACC response; also delete it if it is a last transfer.

• response_info ∗ new_response_info (xtsc::xtsc_response ∗p_response, xtsc::u32

bus_addr_bits, xtsc::u32 size, bool is_read=false, xtsc::u32 id=0, xtsc::u32 route_-
id=0)
Get a new response_info (from the pool).

• response_info ∗ new_response_info (const response_info &info)

Get a new response_info (from the pool) and initialize it by copying.

• void delete_response_info (response_info ∗&p_response_info)

Delete an response_info (return it to the pool).

• xtsc::xtsc_request ∗ new_request (const xtsc::xtsc_request &request)

Get a new xtsc_request (from the pool) that is a copy of the specified request.

• void delete_request (xtsc::xtsc_request ∗&p_request)

Delete an xtsc_request (return it to the pool).

• void swizzle_byte_enables (xtsc::xtsc_byte_enables &byte_enables) const

Swizzle byte enables.

Protected Attributes

• xtsc_request_if_impl ∗∗ m_request_impl
m_request_exports binds to this (per mem port)

• xtsc_debug_if_cap ∗∗ m_debug_cap
m_debug_ports binds to this if user can’t (per mem port)

• xtsc::u32 m_num_ports
The number of memory ports this transactor has.

• xtsc::xtsc_memory_b ∗ m_p_memory
Optional shadow memory.

• HMODULE m_dso
from dlopen/LoadLibrary of m_dso_name

• peek_t m_peek

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Function pointer to the peek symbol in m_dso.

• poke_t m_poke
Function pointer to the poke symbol in m_dso.

• std::deque< xtsc_request ∗ > ∗ m_request_fifo

The fifo of incoming requests (per mem port).

• xtsc::u32 m_request_fifo_depth
From "request_fifo_depth" parameter.

• std::string m_interface_uc
Uppercase version of "memory_interface" parameter.

• std::string m_interface_lc
Lowercase version of "memory_interface" parameter.

• memory_interface_type m_interface_type
The memory interface type.

• xtsc::u32 m_width8
Data width in bytes of the memory interface.

• xtsc::u32 m_dram_attribute_width
See "dram_attribute_width" parameter.

• sc_dt::sc_unsigned m_dram_attribute
To retrieve value using xtsc_request::get_dram_attribute().

• sc_dt::sc_bv_base m_dram_attribute_bv
To convert sc_unsigned m_dram_attribute to sc_bv_base.

• xtsc::xtsc_address m_start_byte_address
Number to be subtracted from the TLM request address.

• xtsc::u64 m_clock_period_value
This device’s clock period as u64.

• sc_core::sc_time m_clock_period
This device’s clock period as sc_time.

• sc_core::sc_time m_time_resolution

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The SystemC time resolution.

• sc_core::sc_time m_posedge_offset
From "posedge_offset" parameter.

• sc_core::sc_time m_sample_phase
Clock phase for sampling inputs and deasserting outputs.

• sc_core::sc_time m_sample_phase_plus_one
m_sample_phase plus one clock period

• sc_core::sc_time m_output_delay
See "output_delay" parameter.

• sc_core::sc_time ∗ m_retire_deassert
Time at which XLMI retire should be deasserted (per mem port).

• sc_core::sc_time ∗ m_flush_deassert
Time at which XLMI flush should be deasserted (per mem port).

• sc_core::sc_time m_read_delay_time
See "read_delay" parameter.

• xtsc::u32 m_read_delay
See "read_delay" parameter.

• xtsc::u64 m_posedge_offset_value
m_posedge_offset as u64

• bool m_is_7_stage
If "read_delay" is 1.

• bool m_has_posedge_offset
True if m_posedge_offset is non-zero.

• bool m_cosim
See "cosim" parameter.

• bool m_shadow_memory
See "shadow_memory" parameter.

• bool m_test_shadow_memory

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• bool m_cbox
See "cbox" parameter.

• bool m_split_rw
True if m_interface_type is DRAM0RW or DRAM1RW.

• bool m_has_dma
See "has_dma" parameter.

• bool m_external_udma
See "external_udma" parameter.

• bool m_append_id
True if pin port names should include the set_id.

• bool m_inbound_pif
True if interface is inbound PIF.

• bool m_snoop
True if interface is snoop port. See "snoop" parameter.

• bool m_has_coherence
See "has_coherence" parameter.

• bool m_has_pif_attribute
See "has_pif_attribute" parameter.

• bool m_has_pif_req_domain
See "has_pif_req_domain" parameter.

• bool m_big_endian
True if the memory interface master is big endian.

• bool m_write_responses
See "write_responses" parameter (PIF|IDMA0 only).

• bool m_track_write_requests
See "track_write_requests" parameter (PIF only).

• bool m_discard_unknown_responses
See "discard_unknown_responses" parameter (PIF only).

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• bool m_has_request_id
True if the "POReqId" and "PIRespId" ports should be present.

• std::vector< xtsc::u32 > m_deny_fast_access

For turboxim. See "deny_fast_access".

• std::string m_dso_name
See "dso_name" parameter.

• const char ∗ m_dso_cookie

See "dso_cookie" parameter.

• const char ∗ m_initial_value_file

See "initial_value_file" parameter.

• std::string m_req_user_data
See "req_user_data" parameter.

• std::string m_req_user_data_name
Name of request user data port.

• xtsc::u32 m_req_user_data_width1
Bit width of request user data port.

• std::string m_rsp_user_data
See "rsp_user_data" parameter.

• std::string m_rsp_user_data_name
Name of response user data port.

• xtsc::u32 m_rsp_user_data_width1
Bit width of response user data port.

• sc_dt::sc_bv_base ∗ m_user_data_val
Value for req_user_data port.

• xtsc::u8 m_memory_fill_byte
See "memory_fill_byte" parameter.

• xtsc::u32 m_address_bits
Number of bits in the address (non-PIF|IDMA0 only).

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• xtsc::u32 m_check_bits
Number of bits in ECC/parity signals (from "check_bits").

• xtsc::u32 m_ram_select_bit
See "ram_select_bit" parameter.

• bool m_ram_select_normal
See "ram_select_normal" parameter.

• xtsc::u32 m_ram_select_mask
Mask with all bits 0 except m_ram_select_bit.

• xtsc::xtsc_address m_address_mask
Address mask.

• xtsc::xtsc_address m_bus_addr_bits_mask
Address mask to get bits which indicate which byte lane.

• xtsc::u32 m_address_shift
Number of bits to right-shift the address.

• xtsc::u32 m_route_id_bits
Number of bits in the route ID (PIF|IDMA0 only).

• xtsc::u32 m_route_id_mask
Mask to get bits for m_route_id.

• xtsc::u32 m_pif_id_mask
Mask to get bits of PIF request ID.

• xtsc::u32 m_next_port_pif_request_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_pif_response_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_pif_drive_resp_rdy_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_lcl_request_thread
To give each thread instance a port number.

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• xtsc::u32 m_next_port_xlmi_retire_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_xlmi_flush_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_xlmi_load_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_dram_lock_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_lcl_busy_write_rsp_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_lcl_7stage_write_rsp_thread
To give each thread instance a port number.

• xtsc::u32 m_next_port_lcl_sample_read_data_thread
To give each thread instance a port number.

• bool m_has_busy
True if memory interface has a busy/rdy pin (non-PIF|IDMA0 only).

• bool m_has_lock
True if memory interface has a lock pin (DRAM0|DRAM0BS|DRAM0RW|DRAM1|DRAM1BS|DRAM1RW
only).

• bool m_has_xfer_en
True if memory interface has Xfer enable pin (NA PIF|IDMA0|DROM0|XLMI0).

• sc_core::sc_event ∗ m_write_response_event
Event used to notify pif_response_thread (per mem port).

• sc_core::sc_event ∗ m_request_event
Event used to notify request_thread (per mem port).

• sc_core::sc_event ∗ m_retire_event
Event used to notify xlmi_retire_thread (per mem port).

• sc_core::sc_event ∗ m_flush_event
Event used to notify xlmi_flush_thread (per mem port).

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• sc_dt::sc_uint_base m_address
The address after any required shifting and masking.

• sc_dt::sc_uint_base m_vadrs
SnoopReqCohVadrsIndex.

• sc_dt::sc_uint_base m_req_coh_cntl
POReqCohCntl;.

• sc_dt::sc_uint_base m_lane
Byte/Word enables.

• sc_dt::sc_uint_base m_id
POReqId/PIRespId.

• sc_dt::sc_uint_base m_priority
POReqPriority/PIRespPriority.

• sc_dt::sc_uint_base m_route_id
POReqRouteId/PIRespRouteId.

• sc_dt::sc_uint_base m_req_attribute
POReqAttribute/PIReqAttribute.

• sc_dt::sc_uint_base m_req_domain
POReqDomain.

• sc_dt::sc_bv_base m_data
Read/write data.

• req_cntl m_req_cntl
Value for POReqCntrl.

• bool_fifo ∗∗ m_resp_rdy_fifo
sc_fifo to keep track of PORespRdy pin (per mem port)

• sc_core::sc_event ∗ m_drive_resp_rdy_event
Notify when PORespRdy should be driven (per mem port).

• std::vector< xtsc_request ∗ > m_request_pool

Maintain a pool of requests to improve performance.

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• std::vector< response_info ∗ > m_response_pool

Maintain a pool of responses to improve performance.

• std::deque< response_info ∗ > ∗ m_busy_write_rsp_deque

pending responses: check busy and/or send write rsp (per mem port)

• std::deque< response_info ∗ > ∗ m_7stage_write_rsp_deque

pending responses: send write rsp (per mem port) 7 stage only

• std::deque< response_info ∗ > ∗ m_read_data_rsp_deque

deque of pending read responses (per mem port)

• std::deque< response_info ∗ > ∗ m_pif_response_deque

deque of pending PIF|IDMA0 responses (per mem port)

• std::deque< response_info ∗ > ∗ m_write_response_deque

deque of pending generated PIF|IDMA0 write responses (per mem port)

• std::deque< bool > ∗ m_lock_deque

deque of pending DRamLock values (per mem port)

• std::deque< bool > ∗ m_load_deque

deque of pending DPortLoad/m_p_preload values (per mem port)

• bool ∗ m_previous_response_last
true if previous response was a last transfer (per mem port)

• sc_core::sc_event_queue ∗ m_busy_write_rsp_event_queue
When busy should be sampled and/or write rsp sent (per mem port).

• sc_core::sc_event_queue ∗ m_7stage_write_rsp_event_queue
When write rsp should be sent (per mem port) 7 stage only.

• sc_core::sc_event_queue ∗ m_read_data_event_queue
When read data should be sampled (per mem port).

• sc_core::sc_event_queue ∗ m_lock_event_queue
When DRamLock should be driven (per mem port).

• sc_core::sc_event_queue ∗ m_load_event_queue
When DPortLoad/m_p_preload should be driven (per mem port).

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• log4xtensa::TextLogger & m_text

Used for logging.

• bool_signal ∗∗ m_p_preload
DPortLoad prior to qualification with the busy pin.

• bool_output ∗∗ m_p_en
DPortEn, DRamEn, DRomEn, IRamEn, IRomEn.

• uint_output ∗∗ m_p_addr
DPortAddr, DRamAddr, DRomAddr, IRamAddr, IRomAddr.

• uint_output ∗∗ m_p_lane
DPortByteEn, DRamByteEn, DRomByteEn, IRamWordEn, IRomWordEn.

• wide_output ∗∗ m_p_wrdata
DPortWrData, DRamWrData, IRamWrData.

• bool_output ∗∗ m_p_wr
DPortWr, DRamWr, IRamWr.

• bool_output ∗∗ m_p_load
DPortLoad, IRamLoadStore, IRomLoad.

• bool_output ∗∗ m_p_retire
DPortLoadRetired.

• bool_output ∗∗ m_p_flush
DPortRetireFlush.

• bool_output ∗∗ m_p_lock
DRamLock (per bank if subbanked).

• wide_output ∗∗ m_p_attr
DRamAttr, DRamWrAttr.

• wide_output ∗∗ m_p_check_wr
DRamCheckWrData, IRamCheckWrData.

• wide_input ∗∗ m_p_check
DRamCheckData, IRamCheckData.

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• bool_output ∗∗ m_p_xfer_en
DRamXferEn, IRamXferEn, IRomXferEn, URamXferEn.

• bool_input ∗∗ m_p_busy
DPortBusy, DRamBusy, DRomBusy, IRamBusy, IRomBusy (per bank if subbanked).

• wide_input ∗∗ m_p_data
DPortData, DRamData, DRomData, IRamData, IRomData.

• bool_output ∗∗ m_p_ram0
DmaDRam0.

• bool_output ∗∗ m_p_ram1
DmaDRam1.

• bool_output ∗∗ m_p_req_valid
POReqValid.

• uint_output ∗∗ m_p_req_cntl
POReqCntl.

• uint_output ∗∗ m_p_req_adrs
POReqAdrs.

• wide_output ∗∗ m_p_req_data
POReqData.

• uint_output ∗∗ m_p_req_data_be
POReqDataBE.

• uint_output ∗∗ m_p_req_id
POReqId.

• uint_output ∗∗ m_p_req_priority
POReqPriority.

• uint_output ∗∗ m_p_req_route_id
POReqRouteId.

• uint_output ∗∗ m_p_req_attribute
POReqAttribute.

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• uint_output ∗∗ m_p_req_domain
POReqDomain.

• uint_output ∗∗ m_p_req_coh_vadrs
POReqCohVAdrsIndex/SnoopReqCohVAdrsIndex.

• uint_output ∗∗ m_p_req_coh_cntl
POReqCohCntl/SnoopReqCohCntl.

• wide_output ∗∗ m_p_req_user_data
Request User Data. See "req_user_data" parameter.

• bool_input ∗∗ m_p_req_rdy
PIReqRdy.

• bool_input ∗∗ m_p_resp_valid
PIRespValid.

• uint_input ∗∗ m_p_resp_cntl
PIRespCntl.

• wide_input ∗∗ m_p_resp_data
PORespData.

• uint_input ∗∗ m_p_resp_id
PIRespId.

• uint_input ∗∗ m_p_resp_priority
PIRespPriority.

• uint_input ∗∗ m_p_resp_route_id
PIRespRouteId.

• uint_input ∗∗ m_p_resp_coh_cntl
PIRespCohCntl/SnoopRespCohCntl.

• wide_input ∗∗ m_p_resp_user_data
Response User Data. See "rsp_user_data" parameter.

• bool_output ∗∗ m_p_resp_rdy
PORespRdy.

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• rsp_info_deque_map ∗ m_tran_id_rsp_info
Storage for pending responses (per mem port) (PIF only) Map transaction ID to deque of
response_info objects.

• xtsc::u64 m_pending_rsp_info_cnt
Count of entries in m_tran_id_rsp_info.

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

7.159.1 Detailed Description

This transactor converts memory transactions from transaction level (TLM) to pin level. This
module is a transactor which converts TLM memory requests (xtsc_request_if) to pin-level
requests and the corresponding pin-level responses into TLM responses (xtsc_respond_if).
On the TLM side, this module can be connected with any XTSC memory interface master
(e.g. xtsc_core, xtsc_arbiter, xtsc_master, xtsc_router, etc). However, it is always config-
ured for the specified memory interface of xtsc_core (such as DRAM0, DRAM1, IRAM0,
PIF, etc) or of the external micro-DMA engine. See the xtsc_tlm2pin_memory_transactor_-
parms "memory_interface" ∗ parameter and the "external_udma" parameter.
Although there is a pin-level XTSC memory model (xtsc_memory_pin) that this transactor
can be connected to on the pin-level side, the main use for this transactor is assumed to
be for connecting to RTL (Verilog) models of, for instance, XLMI or PIF devices. When con-
necting to RTL, there is no guarranteed support for the TLM debug interface (see the m_-
debug_ports data member) because there is no way to guarrantee support for non-blocking
access across the SystemC-Verilog boundary for peek and poke to arbitrary Verilog mod-
ules. See the discussion of the "dso_name", "dso_cookie", "cosim", and "shadow_memory"
parameters in xtsc_tlm2pin_memory_transactor_parms for more information.
This module inherits from the xtsc_module_pin_base class which is responsible for main-
taining the pin-level sc_in<> and sc_out<> ports. The pin-level port names exactly match
the Xtensa RTL. These names, as well as their SystemC type and bit width, are logged at
info log-level when the module is constructed.
This module supports driving multi-ported memories. See the "num_ports" parameter of
xtsc_tlm2pin_memory_transactor_parms.
Note: The parity/ECC signals (DRamNCheckDataM, DRamNCheckWrDataM, IRam-
NCheckData, and IRamNCheckWrData) are present for IRAM and DRAM interfaces when
"check_bits" is non-zero; however, the input signal is ignored and the output signal is driven
with constant 0.

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Here is a block diagram of an xtsc_tlm2pin_memory_transactor as it is used in the xtsc_-

tlm2pin_memory_transactor example:

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POReqValid
req

PIReqRdy

POReqCntl 8
/
POReqAdrs 32
/
POReqData 32
/
POReqDataBE 4
/
POReqId 6
/

xtsc_tlm2pin_memory_transactor POReqPriority 2 xtsc_memory_pin

tlm2pin_pif / mem_pif

rsp PIRespValid
xtsc_core core0
PORespRdy

PIRespCntl 8
/
PIRespData 32
/
PIRespId 6
/
PIRespPriority 2
/

Figure 7.22: xtsc_tlm2pin_memory_transactor Example

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See also:
xtsc_module_pin_base
xtsc_memory_pin
xtsc_tlm2pin_memory_transactor_parms
xtsc::xtsc_core
xtsc_arbiter
xtsc_master
xtsc_router

Definition at line 695 of file xtsc_tlm2pin_memory_transactor.h.

7.159.2 Constructor & Destructor Documentation

7.159.2.1 xtsc_tlm2pin_memory_transactor (sc_core::sc_module_name

module_name, const xtsc_tlm2pin_memory_transactor_parms &
tlm2pin_parms)

Constructor for a xtsc_tlm2pin_memory_transactor.

Parameters:
module_name Name of the xtsc_tlm2pin_memory_transactor sc_module.
tlm2pin_parms The remaining parameters for construction.

See also:
xtsc_tlm2pin_memory_transactor_parms

7.159.3 Member Function Documentation

7.159.3.1 void execute (const std::string & cmd_line, const std::vector<

std::string > & words, const std::vector< std::string > & words_lc,
std::ostream & result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:

dump_pending_rsp_info
Return the buffer from calling dump_pending_rsp_info().

get_pending_rsp_info_cnt
Return get_pending_rsp_info_cnt().

Implements xtsc_command_handler_interface.

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7.159.3.2 void connect (xtsc_arbiter & arbiter, xtsc::u32 port_num = 0)

Connect an xtsc_arbiter with this xtsc_tlm2pin_memory_transactor. This method connects

the master port pair of the xtsc_arbiter with the specified TLM slave port pair of this xtsc_-
tlm2pin_memory_transactor.

Parameters:
arbiter The xtsc_arbiter to connect with this xtsc_tlm2pin_memory_transactor.
port_num The TLM slave port pair of this xtsc_tlm2pin_memory_transactor to con-
nect with the xtsc_arbiter.

7.159.3.3 xtsc::u32 connect (xtsc::xtsc_core & core, const char ∗

memory_port_name, xtsc::u32 port_num = 0, bool single_connect =
false)

Connect an xtsc_core with this xtsc_tlm2pin_memory_transactor. This method connects

the specified memory interface master port pair of the specified xtsc_core with the specified
TLM slave port pair of this xtsc_tlm2pin_memory_transactor.

Parameters:
core The xtsc_core to connect with this xtsc_tlm2pin_memory_transactor.
memory_port_name The name of the memory interface master port pair of the xtsc_-
core to connect with this xtsc_tlm2pin_memory_transactor. Case-insensitive.
port_num The slave port pair of this xtsc_tlm2pin_memory_transactor to connect the
xtsc_core with.
single_connect If true only one slave port pair of this device will be connected. If
false, the default, and if memory_port_name names the first port of an uncon-
nected multi-ported interface of core and if port_num is 0 and if the number of
ports this device has matches the number of multi-ports in the core interface,
then all master port pairs of the core interface specified by memory_port_name
will be connected to the slave port pairs of this xtsc_tlm2pin_memory_transactor.

See also:
xtsc::xtsc_core::How_to_do_memory_port_binding for a list of valid memory_port_-
name values.

Returns:
number of ports that were connected by this call (1 or 2)

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7.159.3.4 void connect (xtsc_master & master, xtsc::u32 port_num = 0)

Connect an xtsc_master with this xtsc_tlm2pin_memory_transactor. This method connects

the master port pair of the xtsc_master with the TLM slave port pair of this xtsc_tlm2pin_-
memory_transactor.

Parameters:
master The xtsc_master to connect with this xtsc_tlm2pin_memory_transactor.
port_num The slave port pair of this xtsc_tlm2pin_memory_transactor to connect the
xtsc_master with.

7.159.3.5 xtsc::u32 connect (xtsc_memory_trace & memory_trace, xtsc::u32

trace_port = 0, xtsc::u32 port_num = 0, bool single_connect = false)

Connect an xtsc_memory_trace with this xtsc_tlm2pin_memory_transactor. This method

connects the specified master port pair of the specified upstream xtsc_memory_trace with
the specified TLM slave port pair of this xtsc_tlm2pin_memory_transactor.

Parameters:
memory_trace The xtsc_memory_trace to connect with this xtsc_tlm2pin_memory_-
transactor.
trace_port The master port pair of the xtsc_memory_trace to connect with this xtsc_-
tlm2pin_memory_transactor.
port_num The TLM slave port pair of this xtsc_tlm2pin_memory_transactor to con-
nect the xtsc_memory_trace with.
single_connect If true only one TLM slave port pair of this xtsc_tlm2pin_memory_-
transactor will be connected. If false, the default, then all contiguous, uncon-
nected slave port pairs of this xtsc_tlm2pin_memory_transactor starting at port_-
num that have a corresponding existing master port pair in memory_trace (start-
ing at trace_port) will be connected with that corresponding memory_trace master
port pair.

Returns:
number of ports that were connected by this call (1 or more)

7.159.3.6 void connect (xtsc_router & router, xtsc::u32 router_port, xtsc::u32

port_num = 0)

Connect an xtsc_router with this xtsc_tlm2pin_memory_transactor. This method connects

the specified master port pair of the specified xtsc_router with the specified TLM slave port
pair of this xtsc_tlm2pin_memory_transactor.

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Parameters:
router The xtsc_router to connect with this xtsc_tlm2pin_memory_transactor.
router_port The master port pair of the xtsc_router to connect with this xtsc_tlm2pin_-
memory_transactor. router_port must be in the range of 0 to the xtsc_router’s
"num_slaves" parameter minus 1.
port_num The TLM slave port pair of this xtsc_tlm2pin_memory_transactor to con-
nect the xtsc_router with.

7.159.3.7 virtual void reset (bool hard_reset = false) [virtual]

The implementation of reset() in xtsc_module logs a warning and does nothing else. Sub-
classes should provide their own implementation if they are able to support reset.
Reimplemented from xtsc_module.

7.159.3.8 virtual void peek (xtsc::u32 port_num, xtsc::xtsc_address address8,

xtsc::u32 size8, xtsc::u8 ∗ buffer) [virtual]

Handle nb_peek() calls. This method can be overriden by a derived class to provide custom
nb_peek handling when this device is used to connect to a Verilog module.

7.159.3.9 virtual void poke (xtsc::u32 port_num, xtsc::xtsc_address address8,

xtsc::u32 size8, const xtsc::u8 ∗ buffer) [virtual]

Handle nb_poke() calls. This method can be overriden by a derived class to provide custom
nb_poke handling when this device is used to connect to a Verilog module.

7.159.3.10 virtual bool fast_access (xtsc::u32 port_num,

xtsc::xtsc_fast_access_request & request) [virtual]

Handle nb_fast_access() calls. This method can be overriden by a derived class to provide
custom nb_fast_access handling when this device is used to connect to a Verilog module.

7.159.4 Member Data Documentation

7.159.4.1 xtsc::Readme How_to_get_input_and_output_ports

From us to slave (per mem port).

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See also:
xtsc_module_pin_base::get_bool_input()
xtsc_module_pin_base::get_uint_input()
xtsc_module_pin_base::get_wide_input()
xtsc_module_pin_base::get_bool_output()
xtsc_module_pin_base::get_uint_output()
xtsc_module_pin_base::get_wide_output()

Definition at line 714 of file xtsc_tlm2pin_memory_transactor.h.

The documentation for this class was generated from the following file:

• xtsc_tlm2pin_memory_transactor.h

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7.160 xtsc_tlm2pin_memory_transactor_parms Class

Reference

Constructor parameters for a xtsc_tlm2pin_memory_transactor transactor object.

#include <xtsc/xtsc_tlm2pin_memory_transactor.h>Inheritance diagram for xtsc_-
tlm2pin_memory_transactor_parms:

xtsc_parms

xtsc_tlm2pin_memory_transactor_parms

Collaboration diagram for xtsc_tlm2pin_memory_transactor_parms:

xtsc_parms

xtsc_tlm2pin_memory_transactor_parms

Public Member Functions

• xtsc_tlm2pin_memory_transactor_parms (const char ∗memory_interface="PIF",

xtsc::u32 byte_width=4, xtsc::u32 address_bits=32, xtsc::u32 num_ports=1)
Constructor for an xtsc_tlm2pin_memory_transactor_parms transactor object.

• xtsc_tlm2pin_memory_transactor_parms (const xtsc::xtsc_core &core, const char

∗memory_interface, xtsc::u32 num_ports=0)
Constructor for an xtsc_tlm2pin_memory_transactor_parms transactor object based upon
an xtsc_core object and a named memory interface.

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• void init (const char ∗memory_interface, xtsc::u32 byte_width, xtsc::u32 address_-

bits, xtsc::u32 num_ports)
• virtual const char ∗ kind () const
Our C++ type (the xtsc_parms base class uses this for error messages).

7.160.1 Detailed Description

Constructor parameters for a xtsc_tlm2pin_memory_transactor transactor object.

Name Type Description

------------------ ---- --------------------------------------------------------

"memory_interface" char* The memory interface type. Valid values are "DRAM0",
"DRAM0BS", "DRAM0RW", "DRAM1", "DRAM1BS", "DRAM1RW",
"DROM0", "IRAM0", "IRAM1", "IROM0", "URAM0", "XLMI0",
"PIF", and "IDMA0" (case-insensitive).
Note: For inbound PIF, set this parameter to "PIF" and
set the "inbound_pif" parameter to true.
Note: For snoop port, set this parameter to "PIF" and
set the "snoop" parameter to true.

"num_ports" u32 The number of memory ports this transactor has. A value
of 1 means this transactor is single-ported, a value of
2 means this transactor is dual-ported, etc. If
"memory_interface" is "DRAM0RW" or "DRAM1RW", then a
read port counts as one port and its corresponding write
port counts as another port.
Default = 1.
Minimum = 1.

"port_name_suffix" char* Optional constant suffix to be appended to every input

and output port name.
Default = "".

"byte_width" u32 Memory data interface width in bytes. Valid values for
"DRAM0", "DRAM0RW", "DRAM1", "DRAM1RW", "DROM0",
"URAM0", and "XLMI0" are 4, 8, 16, 32, and 64. Valid
values for "DRAM0BS" and "DRAM1BS" are 4, 8, 16, and 32.
Valid values for "IRAM0", "IRAM1", "IROM0", "PIF", and
"IDMA0" are 4, 8, and 16.

"start_byte_address" u32 The number to be subtracted from the address received in

the TLM request. For non-XLMI local memories, this
corresponds to the starting byte address of the memory
in the 4GB address space. For PIF, IDMA0, and XLMI this
should be 0x00000000.
Default = 0x00000000.

"big_endian" bool True if the memory interface master is big endian.

Default = false.

"deny_fast_access" vector<u32> A std::vector containing an even number of

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addresses. Each pair of addresses specifies a range of

addresses that will be denied fast access. The first
address in each pair is the start address and the second
address in each pair is the end address.
Default = <empty>

"dso_name" char* Optional name of a DSO (Linux shared object or MS Windows

DLL) that contains peek and poke functions declared with
the signature and with extern "C" (and __declspec if
MS Windows) as shown here:
#ifdef _WIN32
#define DSO_EXPORT extern "C" __declspec(dllexport)
#else
#define DSO_EXPORT extern "C"
#endif
typedef unsigned char u8;
typedef unsigned int u32;
DSO_EXPORT void peek(u32 address8, u32 size8, u8 *buffer, const char *dso_cookie, u32 port);
DSO_EXPORT void poke(u32 address8, u32 size8, const u8 *buffer, const char *dso_cookie, u32 port);
Typically this parameter is only needed when connecting
this module to a Verilog/SystemVerilog module for
cosimulation when peek/poke access is desired to the
Verilog memory (for example, for loading a target
program using xtsc_core, for TurboXim or xt-gdb access,
or for semi-hosting support for argv[], clock(),
fopen(), fread(), fwrite(), printf(), scanf(), etc).
The idea is that the named DSO, provided by the user, is
able to use some non-blocking mechanism (i.e. a
mechanism that does not require any simulation time to
elapse) to communicate the peeks/pokes to the Verilog/
SystemVerilog module (for example, using a SystemVerilog
export "DPI-C" function). The dso_cookie argument will
come from the "dso_cookie" parameter.
Caution: When a DSO is used during SystemC-Verilog
cosimulation, be sure to use the xtsc_core_parm
parameter SimTargetProgram to name the core
program (if any) that will be loaded using the
DSO. The xtsc-run command --core_program=
should not be used in this situation because it
can result in the core program being loaded
prior to the Verilog memory being constructed.
This is vendor specific but results in a
failure that is hard to decipher.
Default = NULL.

"dso_cookie" char* Optional C-string to pass to the peek and poke methods
of the DSO named by the "dso_name" parameter. This
model does not use this parameter in any way other then
to pass it to the DSO methods.
Default = NULL.

"cosim" bool This parameter is for when the model is connected to a

Verilog model and "dso_name" is NULL. Because Verilog
is not automatically compatible with the xtsc_debug_if
methods (nb_peek, nb_poke, and nb_fast_access) a way is
needed to prevent a run-time exception if these methods
are called. If "cosim" is false and the user does not

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connect the m_debug_ports (either directly or by passing

a DSO name in using the "dso_name" parameter) then a
call to one of these methods coming in on
m_request_exports will result in an exception being
thrown. If "cosim" is true and the user does not
connect the m_debug_ports then a call to one of these
methods will be handled according to the "shadow_memory"
parameter.
Default = false.

"shadow_memory" bool If "cosim" is false or if the user connects the

m_debug_ports (either directly or by passing a DSO name
in using the "dso_name" parameter) then this parameter
is ignored. Otherwise, if "shadow_memory" is false,
calls to nb_peek() and nb_poke() will be ignored and
calls to nb_fast_access() will return false. If
"shadow_memory" is true, then all writes (calls to
nb_request for WRITE, BLOCK_WRITE, BURST_WRITE, and the
write beat of RCW) and all nb_poke() calls will update a
locally-maintained shadow memory (all writes will also
be driven out the pin-level interface). All nb_peek()
calls will return data from the shadow memory. Reads
(calls to nb_request for READ, BLOCK_READ, BURST_READ,
and the read beat of RCW) will never use the shadow
memory. Calls to nb_fast_access will return false.
Note: The shadow memory mechanism is far from perfect
and should NOT be relied upon for accurate simulation
and debugging. Here are some ways in which the shadow
memory could be inaccurate:
1. Write requests always update the shadow memory even
if the pin-level write request is not accepted or is
accepted and then rejected due to, for example, an
address or data error.
2. The write beat of RCW always updates the shadow memory
regardless of the result of the conditional read part.
3. The Verilog memory, as opposed to the shadow memory,
might be modified by other means then through this
module.
4. If the debugger (xt-gdb/Xplorer) is used to change
memory contents, only the shadow memory will be
changed. The Verilog memory, which is what the
Xtensa processor will see when it does read requests,
will not be changed.
5. During execution of the SIMCALL pseudo instruction by
the ISS in support of certain semi-hosting features
such as argc, argv[], clock(), fread(), and scanf(),
the host (i.e. the simulator) uses pokes to put data
in memory which is then retrieved using read requests
(load instructions that follow the SIMCALL pseudo
instruction) by the Xtensa processor. The poke will
go only to the shadow memory; however, the Xtensa
will read the Verilog memory and so will not get the
correct data.
Despite the above caveat and issues, in cases where a
peek/poke DSO is not available, a shadow memory can
sometimes prove useful (for example, to support printf
in target code and/or partial debugger visibility).

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Note: fwrite/printf (unlike fread/scanf) do work with a

shadow memory because in these cases Xtensa code first
does writes (store instructions) that go to both the
shadow memory and to the Verilog memory and then the
host does peeks (which go to the shadow memory) to
retrieve the data for writing to the host file system or
display.
Default = false.

"initial_value_file" char* If not NULL or empty, this names a text file from which
to read the initial memory contents as byte values.
This parameter is ignored unless a shadow memory is
used.
Default = NULL.
The text file format is:

([@<Offset>] <Value>*)*

1. Any number (<Offset> or <Value>) can be in decimal

or hexadecimal (using '0x' prefix) format.
2. @<Offset> is added to "start_byte_address".
3. <Value> cannot exceed 255 (0xFF).
4. If a <Value> entry is not immediately preceeded in
the file by an @<Offset> entry, then its offset is
one greater than the preceeding <Value> entry.
5. If the first <Value> entry in the file is not
preceeded by an @<Offset> entry, then its offset
is zero.
6. Comments, extra whitespace, and blank lines are
ignored. See xtsc::xtsc_script_file.

Example text file contents:

0x01 0x02 0x3 // First three bytes of the memory,

// 0x01 is at "start_byte_address"
@0x1000 50 // The byte at offset 0x1000 is 50
51 52 // The byte at offset 0x1001 is 51
// The byte at offset 0x1002 is 52

"memory_fill_byte" u32 The low byte specifies the value used to initialize
memory contents at address locations not initialize
from "initial_value_file".
This parameter is ignored unless a shadow memory is
used.
Default = 0.

"clock_period" u32 This is the length of this device's clock period

expressed in terms of the SystemC time resolution
(from sc_get_time_resolution()). A value of
0xFFFFFFFF means to use the XTSC system clock
period (from xtsc_get_system_clock_period()). A value
of 0 means one delta cycle.
Default = 0xFFFFFFFF (i.e. use the system clock
period).

"posedge_offset" u32 This specifies the time at which the first posedge of
this device's clock conceptually occurs. It is

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expressed in units of the SystemC time resolution and

the value implied by it must be strictly less than the
value implied by the "clock_period" parameter. A value
of 0xFFFFFFFF means to use the same posedge offset as
the system clock (from
xtsc_get_system_clock_posedge_offset()).
Default = 0xFFFFFFFF.

"sample_phase" u32 This specifies the phase (i.e. the point) in a clock
period at which input pins are sampled. PIF output pins
which are used for handshaking (POReqValid/PORespRdy)
are also sampled at this time. This value is expressed
in terms of the SystemC time resolution (from
sc_get_time_resolution()) and must be less than the
clock period as specified by the "clock_period"
parameter. A value of 0 means pins are sampled on
posedge clock as specified by "posedge_offset". A value
of 0xFFFFFFFF, the default, means if "memory_interface"
is PIF|IDMA0, then pins will be sampled at posedge
clock, and if "memory_interface" is not PIF|IDMA0
(i.e. a local memory), then pins will be sampled at 1
SystemC time resolution prior to phase A. This later
value is used to enable meeting the TLM timing
requirements of the local memory interfaces of
xtsc_core. See the discussion under
xtsc_core::set_clock_phase_delta_factors().
Default = 0xFFFFFFFF

"output_delay" u32 This specifies how long to delay before output pins are
driven. The output pins will remain driven for one
clock period (see the "clock_period" parameter). For
request output pins, the delay timing starts when the
nb_request() call is received. For DPortLoadRetired,
DPortRetireFlush, and DRamLock, the delay timing starts
when the nb_load_retire(), nb_retire_flush(), or
nb_lock() call (respectively) is received. For
PORespRdy, the delay timing starts at the sample phase
(see "sample_phase") when the nb_respond() call
returns false. This value is expressed in terms of the
SystemC time resolution (from sc_get_time_resolution())
and must be less than the clock period. A value of 0
means one delta cycle.
Default = 1 (i.e. 1 time resolution).

"vcd_handle" void* Pointer to SystemC VCD object (sc_trace_file *) or

0 if tracing is not desired.

"request_fifo_depth" u32 The request fifo depth.

Default = 1.
Minimum = 1.

Parameters which apply to PIF|IDMA0 only:

"inbound_pif" bool Set to true for inbound PIF. Set to false for outbound
PIF or snoop. This parameter is ignored if
"memory_interface" is other then "PIF".

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Default = false (outbound PIF or snoop).

"snoop" bool Set to true for snoop port. Set to false for outbound
or inbound PIF. This parameter is ignored if
"memory_interface" is other then "PIF".
Default = false (outbound or inbound PIF).

"has_coherence" bool True if the "POReqCohCntl", "POReqCohVAdrsIndex", and

"PIRespCohCntl" ports should be present. This parameter
is ignored unless "memory_interface" is "PIF" and
"inbound_pif" and "snoop" are both false.
Default = false.

"has_pif_attribute" bool True if the "POReqAttribute" or "PIReqAttribute" port

should be present. This parameter is ignored unless
"memory_interface" is "PIF" or "IDMA0" and "snoop" is
false.
Default = false.

"has_pif_req_domain" bool True if the "POReqDomain" port should be present. This

parameter is ignored unless "memory_interface" is "PIF"
or "IDMA0" and both "inbound_pif" and "snoop" are false.
Default = false.

"has_request_id" bool True if the "POReqId" and "PIRespId" ports should be

present. This parameter is ignored unless
"memory_interface" is "PIF" or "IDMA0".

"write_responses" bool True if write responses should be generated by the

xtsc_tlm2pin_memory_transactor. False if write
responses will not be generated by the transactor
because they are either generated by the downstream
slave or are not required by any upstream master. This
parameter is ignored unless "memory_interface" is "PIF"
or "IDMA0".
Default = false.
Note for xtsc-run users: When the --cosim command is
present, xtsc-run will initialize this parameter with
a value appropriate for the current config.

"track_write_requests" bool True if write requests should be tracked in anticipation

of receiving write responses from the downstream slave.
A situation in which you may need to set this parameter
to false is when xtsc_core_parms parameter
"SimPIFFakeWriteResponses" is true and the downstream
slave (at least in some cases) does not send write
responses. This parameter is ignored unless
"memory_interface" is "PIF" and "write_responses" is
false.
Default = true.

"discard_unknown_responses" bool If false an exception will be thrown if an unknown

response is received from the downsteam slave. If true,
unknown responses from the downstream slave will be
discarded. An "unknown response" is a response which
cannot be matched to a preceeding request (this can
happen because there was no matching preceeding request

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 Chapter 7. Class Documentation

or because "write_responses" is true or because

"track_write_requests" is false). One situation in
which you may need to set this parameter to true, is
when the "write_responses" is true and the downstream
slave subsystem (at least sometimes) sends write
responses. Another situation is when the downstream
slave subsystem sometimes sends write responses and
sometimes does not send them. This parameter is ignored
unless "memory_interface" is "PIF".
Default = false.

"route_id_bits" u32 Number of bits in the route ID. Valid values are 0-32.
If "route_id_bits" is 0, then the "POReqRouteId" and
"PIRespRouteId" output ports will not be present. This
parameter is ignored unless "memory_interface" is "PIF"
or "IDMA0".

"req_user_data" char* If not NULL or empty, this specifies the optional pin-
level port that should be used for xtsc_request user
data. The string must give the port name and bit width
using the format: PortName,BitWidth
Note: The values driven on PortName will be obtained
from the low order BitWidth bits of the void*
pointer returned by xtsc_request::get_user_data().
BitWidth may not exceed 32 or 64 depending on
whether you are using a 32 or 64 bit simulator.
This parameter is ignored unless "memory_interface" is
"PIF" or "IDMA0".
Default = "" (xtsc_request user data is ignored).

"rsp_user_data" char* If not NULL or empty, this specifies the optional pin-
level port that should be used for xtsc_response user
data. The string must give the port name and bit width
using the format: PortName,BitWidth
Note: The values read from PortName will be written to
the low order BitWidth bits of the void* pointer
passed to xtsc_response::set_user_data().
BitWidth may not exceed 32 or 64 depending on
whether you are using a 32 or 64 bit simulator.
This parameter is ignored unless "memory_interface" is
"PIF" or "IDMA0".
Default = "" (xtsc_response user data is ignored).

Parameters which apply to local memories only (that is, non-PIF|IDMA0 memories):

"address_bits" u32 Number of bits in the address. This parameter is

ignored if "memory_interface" is "PIF" or "IDMA0".

"check_bits" u32 Number of bits in the parity/ecc signals. This

parameter is ignored unless "memory_interface" is
"IRAM0", "IRAM1", "DRAM0", "DRAM0BS", "DRAM0RW",
"DRAM1", "DRAM1BS", or "DRAM1RW".
Default = 0.

"has_busy" bool True if the memory interface has a busy pin (or ready
pin if "external_udma" is true). This parameter is

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ignored if "memory_interface" is "PIF" or "IDMA0".

Default = true.

"has_lock" bool True if the memory interface has a lock pin. This
parameter is ignored unless "memory_interface" is
"DRAM0", "DRAM0BS", "DRAM0RW", "DRAM1", "DRAM1BS", or
"DRAM1RW".
Default = false.

"has_xfer_en" bool True if the memory interface has an xfer enable pin.
This parameter is ignored if "memory_interface" is
"DROM0", "XLMI0", "PIF", or "IDMA0".
Default = false.

"read_delay" u32 Number of clock periods to delay before read data is

sampled. This should be 0 for a 5-stage pipeline and 1
for a 7-stage pipeline. This parameter is ignored if
"memory_interface" is "PIF" or "IDMA0".
Default = 0.

"cbox" bool True if this memory interface is driven from an Xtensa

CBOX. This parameter is ignored if "memory_interface"
is other then "DRAM0"|"DRAM1"|"DROM0".
Default = false.

"banked" bool True if this is a banked "DRAM0"|"DRAM1"|"DROM0"

interface or if this is a "DRAM0BS"|"DRAM1BS" interface.
Default = false.

"num_subbanks" u32 The number of subbanks that each bank has.

"has_dma" bool True if the memory interface has split Rd/Wr ports
("DRAM0RW"|"DRAM1RW") accessible from inbound PIF.
Default = false.

"dram_attribute_width" u32 160 if the "DRamNAttr" and "DRamNWrAttr" ports

should be present. This parameter is ignored unless
"memory_interface" is "DRAM0RW" or "DRAM1RW".
Default = 0.

"external_udma" bool True if this is the DataRam interface of the external

micro-DMA engine (xtsc_udma). When this parameter is
set to true, then "memory_interface" must be "DRAM0";
"num_ports" must be 1; "address_bits" must be 32;
"check_bits" and "start_byte_address" must be 0; and
"banked", "has_lock", and "has_xfer_en" must be false.
Although "memory_interface" must be "DRAM0", "num_ports"
must be 1, and "banked" must be false, the actual
interface presented by the transactor is intended to be
connected through a banked memory interface mux to 4
memory banks (2 banks of DataRam0 and 2 banks of
DataRam1).
Default = false.

"ram_select_bit" u32 This parameter specifies which bit in the 32-bit address
selects DataRam0 and DataRam1 when "external_udma" is
true. This parameter is ignored when "external_udma" is

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 Chapter 7. Class Documentation

false.
Default = 0xFFFFFFFF (must be explicitly set).

"ram_select_normal" bool This parameter specifies the value that the address bit
specified by "ram_select_bit" should have to select
DataRam0 or DataRam1. True means a value of 0 selects
DataRam0 and a value of 1 selects DataRam1. False
selects the opposite way. This parameter is ignored
when "external_udma" is false.
Default = true.

See also:
xtsc_tlm2pin_memory_transactor
xtsc::xtsc_parms
xtsc::xtsc_initialize_parms

Definition at line 512 of file xtsc_tlm2pin_memory_transactor.h.

7.160.2 Constructor & Destructor Documentation

7.160.2.1 xtsc_tlm2pin_memory_transactor_parms (const char ∗

memory_interface = "PIF", xtsc::u32 byte_width = 4, xtsc::u32
address_bits = 32, xtsc::u32 num_ports = 1) [inline]

Constructor for an xtsc_tlm2pin_memory_transactor_parms transactor object.

Parameters:
memory_interface The memory interface type. Valid values are "DRAM0",
"DRAM0BS", "DRAM0RW", "DRAM1", "DRAM1BS", "DRAM1RW", "DROM0",
"IRAM0", "IRAM1", "IROM0", "URAM0", "XLMI0", "PIF", and "IDMA0" (case-
insensitive).
byte_width Memory data interface width in bytes.
address_bits Number of bits in address. Ignored for "PIF" and "IDMA0".
num_ports The number of memory ports this transactor has.

Definition at line 532 of file xtsc_tlm2pin_memory_transactor.h.

7.160.2.2 xtsc_tlm2pin_memory_transactor_parms (const xtsc::xtsc_core & core,

const char ∗ memory_interface, xtsc::u32 num_ports = 0)

Constructor for an xtsc_tlm2pin_memory_transactor_parms transactor object based upon

an xtsc_core object and a named memory interface. This constructor will determine

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"clock_period", "byte_width", "big_endian", "read_delay", "address_bits", "start_byte_-

address", "has_busy", "has_lock", "cbox", "banked", "num_subbanks", "has_dma", "dram_-
attribute_width", "check_bits", "has_pif_attribute", and "has_pif_req_domain" by querying
the core object.
If desired, after the xtsc_tlm2pin_memory_transactor_parms object is constructed, its data
members can be changed using the appropriate xtsc_parms::set() method before passing
it to the xtsc_tlm2pin_memory_transactor constructor.

Parameters:
core A reference to the xtsc_core object upon which to base the xtsc_tlm2pin_-
memory_transactor_parms.
memory_interface The memory interface type. Valid values are "DRAM0",
"DRAM0BS", "DRAM0RW", "DRAM1", "DRAM1BS", "DRAM1RW", "DROM0",
"IRAM0", "IRAM1", "IROM0", "URAM0", "XLMI0", "PIF", and "IDMA0" (case-
insensitive).
num_ports The number of ports this transactor has. If 0, the default, the num-
ber of ports will be inferred thusly: For banked DRAM0|DRAM1|DROM0,
the "num_ports" will be equal to the number of banks. For subbanked
DRAM0BS|DRAM1BS, the "num_ports" will be equal to the number of banks
times the number of subbanks per bank. For split R/W DRAM0RW|DRAM1RW,
the "num_ports" will be 2 times the number of Load/Store units plus 2 if there is
an inbound PIf interface. For non-banked, non-split R/W interfaces, if memory_-
interface is a LD/ST unit 0 port of a dual-ported core interface, and the core is
dual-ported and has no CBox, and if the 2nd port of the core has not been bound,
then "num_ports" will be 2; otherwise, "num_ports" will be 1.

The documentation for this class was generated from the following file:

• xtsc_tlm2pin_memory_transactor.h

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 Chapter 7. Class Documentation

7.161 xtsc_tlm2pin_wire_transactor< W, T > Class Tem-

plate Reference

User interface class for connecting an sc_port<xtsc_wire_write_if> to an sc_out<T> or

an sc_signal<T>.
#include <xtsc/xtsc.h>

Public Member Functions

• xtsc_tlm2pin_wire_transactor (sc_core::sc_module_name module_name)

• virtual const char ∗ kind () const

7.161.1 Detailed Description

template<int W, typename T> class xtsc::xtsc_tlm2pin_wire_transactor< W, T >

User interface class for connecting an sc_port<xtsc_wire_write_if> to an sc_out<T> or

an sc_signal<T>. An instance of this class can be used to connect an sc_port<xtsc_-
wire_write_if> to an sc_out<T> or an sc_signal<T> where T is some common integral
or SystemC type. For example, the xtsc_core class uses sc_port<xtsc_wire_write_if>
for TLM-level TIE export states and system-level output ports. If you need output ports
of a different type then xtsc_wire_write_if, then this transactor template can be used to
create an transactor of the appropriate type. A typical use-case for this transactor is when
cosimulating XTSC with Verilog using a commercial simulator.
Note: see xtsc_sc_out_sc_bv_base_adapter for a list of some possible types for T.
As an example, assume you have two xtsc_core objects. The first is called core0 and it has
a 1-bit TIE export state called "onebit". The second is called core1 and it has a 1-bit system-
level input called "BReset". The following code snippet can be use to connect these two
ports together using two transactors, called onebit and BReset, and an sc_signal<bool>,
called onebit_to_BReset:
Note: These core interfaces can (and typically should) be connected directly without the
use of transactors and an sc_signal. This example is contrived just to illustrate constructing
and connecting these transactors. Please consult the xtsc-run documentation and the
cosim sub-directories in the XTSC examples directory for realistic uses of these transactors
to cosimulate XTSC with Verilog.

xtsc_tlm2pin_wire_transactor<1, bool> onebit("onebit");

xtsc_pin2tlm_wire_transactor<1, bool> BReset("BReset");
sc_signal<bool> onebit_to_BReset;

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core0.get_export_state("onebit")(onebit.m_sc_export);
onebit.m_sc_out(onebit_to_BReset);

BReset.m_sc_port(core1.get_input_wire("BReset"));
BReset.m_sc_in(onebit_to_BReset);

See also:
xtsc_tlm2pin_wire_transactor_base::m_sc_export
xtsc_tlm2pin_wire_transactor_base::m_sc_out
xtsc_core::get_export_state()
xtsc_core::get_output_wire()
xtsc_core::get_input_wire()

Definition at line 2990 of file xtsc.h.

The documentation for this class was generated from the following file:

• xtsc.h

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7.162 xtsc_tlm2pin_wire_transactor_base< W, T > Class

Template Reference

Base class for converting an sc_out<xtsc_wire_write_if> to sc_out<T>.

#include <xtsc/xtsc.h>Inheritance diagram for xtsc_tlm2pin_wire_transactor_base<
W, T >:

xtsc_wire_write_if

xtsc_tlm2pin_wire_transactor_base< W, T >

Collaboration diagram for xtsc_tlm2pin_wire_transactor_base< W, T >:

xtsc_wire_write_if

xtsc_tlm2pin_wire_transactor_base< W, T >

Public Member Functions

• xtsc_tlm2pin_wire_transactor_base (sc_core::sc_module_name module_name)
• virtual const sc_core::sc_event & default_event () const
• virtual const sc_core::sc_event & value_changed_event () const
• virtual bool event () const
• virtual void nb_write (const sc_dt::sc_unsigned &value)=0
This method is called by the wire driver to write a new value to the wire.

• virtual u32 nb_get_bit_width ()

Get the wire width in bits.

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Public Attributes

• sc_core::sc_export< xtsc_wire_write_if > m_sc_export

Bind the sc_port<xtsc_wire_write_if> to here.

• sc_core::sc_out< T > m_sc_out

Bind this to an sc_signal<T> or to a higher-level (outer) sc_out<T>.

Private Attributes

• u32 m_bit_width

7.162.1 Detailed Description

template<int W, typename T> class xtsc::xtsc_tlm2pin_wire_transactor_base< W, T

>

Base class for converting an sc_out<xtsc_wire_write_if> to sc_out<T>. Note: This class

is not used directly, instead use xtsc_tlm2pin_wire_transactor.
Definition at line 2865 of file xtsc.h.

7.162.2 Member Function Documentation

7.162.2.1 virtual void nb_write (const sc_dt::sc_unsigned & value) [pure

virtual]

This method is called by the wire driver to write a new value to the wire. For the typical
case of an xtsc_core TIE export state, this method is called on each clock cycle in which
the Xtensa core writes a value to the TIE_xxx interface (where xxx is the state name in the
user TIE code).

Parameters:
value The sc_unsigned object containing the value to be written.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implements xtsc_wire_write_if.

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7.162.2.2 virtual u32 nb_get_bit_width () [inline, virtual]

Get the wire width in bits. This method allows the wire driver to confirm that the implemen-
tation is using the correct size for the wire.
This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implements xtsc_wire_write_if.
Definition at line 2899 of file xtsc.h.
The documentation for this class was generated from the following file:

• xtsc.h

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7.163 xtsc_tx_loader Class Reference

XTSC module to model a boot loader for a TX Xtensa chain.

#include <xtsc/xtsc_tx_loader.h>Inheritance diagram for xtsc_tx_loader:

xtsc_connection_interface xtsc_resettable

xtsc_module

xtsc_tx_loader

Collaboration diagram for xtsc_tx_loader:

xtsc_tx_xfer_if

m_loader xtsc_tx_xfer_if_impl

xtsc_resettable m_tx_xfer_impl

xtsc_module
xtsc_connection_interface m_incoming_tx_xfer
m_outgoing_tx_xfer m_loader
xtsc_tx_xfer xtsc_tx_loader
m_data_out_floating m_queue_push_impl
xtsc_queue_push_if_impl
m_pop_floating
m_empty_floating m_loader
m_full_floating
m_data_in_floating
m_push_floating
xtsc_queue_push_if m_queue_pop_impl
xtsc_signal_sc_bv_base xtsc_signal_sc_bv_base_floating
xtsc_queue_pop_if_impl

xtsc_queue_pop_if

Classes

• class xtsc_queue_pop_if_impl
Implementation of xtsc_queue_pop_if.

• class xtsc_queue_push_if_impl

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Implementation of xtsc_queue_push_if.

• class xtsc_tx_xfer_if_impl
Implementation of xtsc_tx_xfer_if.

Public Types

• enum state {
PowerSave = 0,
Configuration = 1,
Loading = 2,
Reading = 3,
ZeroWrites = 4 }
Boot loader state.

• enum internal_address {
IA_address = 0x0,
IA_length = 0x2,
IA_config_read = 0x3,
IA_config_write = 0x4,
IA_boot_loader_mode = 0x5,
IA_done_pin_control = 0x6 }
• typedef enum xtsc::xtsc_tx_loader::state state
Boot loader state.

• typedef enum xtsc::xtsc_tx_loader::internal_address internal_address

Public Member Functions

• virtual const char ∗ kind () const

Our C++ type (SystemC uses this).

• SC_HAS_PROCESS (xtsc_tx_loader)
For SystemC modules with processes.

• xtsc_tx_loader (sc_core::sc_module_name module_name, const xtsc_tx_loader_-

parms &loader_parms)

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Constructor for an xtsc_tx_loader.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual xtsc_port_table get_port_table (const std::string &port_table_name) const

For xtsc_connection_interface.

• void before_end_of_elaboration ()
SystemC callback.

• void end_of_elaboration ()
SystemC callback.

• void start_of_simulation ()
SystemC callback.

• void reset (bool hard_reset=false)

Reset the xtsc_tx_loader.

• void process_image_file_thread ()
Thread to process the image file.

• void handle_tlm_queue_command_input_thread ()
Thread to handle TLM queue input.

• void handle_pin_queue_command_input_thread ()
Thread to handle pin-level queue input (incoming commands).

• void handle_pin_queue_read_thread ()
Thread to handle pin-level queue output (read data).

• void sync_to_sample_phase (const std::string &thread_name)

Synchronize to the sample phase.

• void drive_read_queue_output_method ()
SystemC method to drive the read queue’s outputs (empty and data signals).

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• void drive_full_queue_output_method ()
SystemC method to drive the read queue’s outputs (empty and data signals).

• void detect_overflow_method ()
SystemC method to detect read fifo overflow.

• bool pin_level () const

Return whether or not the queue interfaces are pin-level or TLM.

• void connect (xtsc_core &core, const char ∗iface)

Connect with an upstream xtsc_core.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

Static Public Member Functions

• static const char ∗ get_state_string (state s)

Return the state as a c-string.

Public Attributes

• sc_core::sc_port< xtsc_tx_xfer_if, NSPP > m_tx_xfer_port

From us to first TX in the chain.

• sc_core::sc_export< xtsc_tx_xfer_if > m_tx_xfer_export

From last TX in the chain to us.

• sc_core::sc_port< xtsc_wire_write_if, NSPP > m_done

Optional Done output.

• sc_core::sc_port< xtsc_wire_write_if, NSPP > m_mode

Optional Mode output.

• sc_core::sc_export< xtsc_queue_push_if > ∗ m_producer

TLM: Optional queue producer binds to this.

• sc_core::sc_export< xtsc_queue_pop_if > ∗ m_consumer

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TLM: Optional queue consumer binds to this.

• sc_core::sc_in< sc_dt::sc_bv_base > ∗ m_push

Pin: Push request from producer.

• sc_core::sc_in< sc_dt::sc_bv_base > ∗ m_data_in

Pin: Input data from producer.

• sc_core::sc_out< sc_dt::sc_bv_base > ∗ m_full

Pin: Signal producer that queue is full.

• sc_core::sc_in< sc_dt::sc_bv_base > ∗ m_pop

Pin: Pop request from consumer.

• sc_core::sc_out< sc_dt::sc_bv_base > ∗ m_empty

Pin: Signal consumer that queue is empty.

• sc_core::sc_out< sc_dt::sc_bv_base > ∗ m_data_out

Pin: Output data to consumer.

Protected Member Functions

• void set_state (state s)

Set the state, log it, and drive m_mode (if bound).

• void do_command (u32 word, bool turbo)

Process the command word.

• bool get_next_word_from_image_file (u32 &word)

Get next word from image file. Returns false at end-of-file.

• void send_xfer (xtsc_tx_xfer &tx_xfer)

Log and send out an xtsc_tx_xfer.

• xtsc_tx_xfer ∗ new_xfer (bool done, u32 address, u32 data, bool write, bool turbo)
Get an xtsc_tx_xfer from the pool.

• void delete_tx_xfer (xtsc_tx_xfer ∗&p_tx_xfer)

Return an xtsc_tx_xfer to the pool.

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Protected Attributes
• xtsc_signal_sc_bv_base_floating ∗ m_push_floating
Pin: To cap unused push interface.

• xtsc_signal_sc_bv_base_floating ∗ m_data_in_floating
Pin: To cap unused push interface.

• xtsc_signal_sc_bv_base_floating ∗ m_full_floating
Pin: To cap unused push interface.

• xtsc_signal_sc_bv_base_floating ∗ m_pop_floating
Pin: To cap unused pop interface.

• xtsc_signal_sc_bv_base_floating ∗ m_empty_floating
Pin: To cap unused pop interface.

• xtsc_signal_sc_bv_base_floating ∗ m_data_out_floating
Pin: To cap unused pop interface.

• xtsc_tx_xfer_if_impl m_tx_xfer_impl
m_tx_xfer_export binds to this

• xtsc_queue_push_if_impl ∗ m_queue_push_impl
m_producer binds to this

• xtsc_queue_pop_if_impl ∗ m_queue_pop_impl
m_consumer binds to this

• bool m_pin_level
See the "pin_level" parameter.

• sc_core::sc_trace_file ∗ m_p_trace_file
From the "vcd_handle" parameter.

• xtsc_tx_xfer m_outgoing_tx_xfer
For VCD tracing.

• xtsc_tx_xfer m_incoming_tx_xfer
For VCD tracing.

• u32 m_outgoing_count

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For VCD tracing.

• u32 m_incoming_count
For VCD tracing.

• u32 m_push_word
For VCD tracing.

• u32 m_read_word
For VCD tracing.

• u32 m_push_count
For VCD tracing.

• u32 m_read_count
For VCD tracing.

• std::string m_image_file_name
See the "image_file" parameter.

• std::ifstream m_image_file
The "image_file" stream.

• u32 m_word_number
word/line number in "image_file"

• bool m_hex_format
See the "hex_format" parameter.

• bool m_binary_format
See the "binary_format" parameter.

• bool m_turbo
See the "turbo" parameter.

• bool m_squelch_loading
See the "squelch_loading" parameter.

• sc_core::sc_time m_time_resolution
The SystemC time resolution.

• sc_core::sc_time m_clock_period

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This loader’s clock period.

• u64 m_clock_period_value
Clock period as u64.

• bool m_has_posedge_offset
True if m_posedge_offset is non-zero.

• sc_core::sc_time m_posedge_offset
From "posedge_offset" parameter.

• u64 m_posedge_offset_value
m_posedge_offset as u64

• sc_core::sc_time m_sample_phase
From "sample_phase" parameter.

• u64 m_sample_phase_value
Sample phase as u64.

• sc_core::sc_time m_output_delay
From "output_delay" parameter.

• u32 m_address
Address for loading, reading, zeroing.

• u32 m_counter
Counter for loading, reading, zeroing.

• bool m_processing_image_file
Image file processing is in progress.

• state m_state
Boot loader state (aka Mode).

• sc_dt::sc_unsigned m_mode_unsigned
Boot loader state (aka Mode) as sc_unsigned.

• sc_dt::sc_unsigned m_done_unsigned
Done output as sc_unsigned.

• sc_dt::sc_bv_base m_read_bv_base

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Read queue output as sc_bv_base.

• sc_dt::sc_bv_base m_full_bv_base
Command queue full output as sc_bv_base.

• bool m_self_connected
m_tx_xfer_port is connected to m_tx_xfer_export

• bool m_done_bound
m_done is connected

• bool m_mode_bound
m_mode is connected

• bool m_push_bound
pin-level input queue interface is connected

• bool m_read_bound
pin-level output queue interface is connected

• u32 m_read_fifo_depth
See the "read_fifo_depth" parameter.

• bool m_allow_overflow
See the "allow_overflow" parameter.

• sc_core::sc_fifo< u32 > m_push_fifo

FIFO of write commands from m_producer.

• sc_core::sc_fifo< u32 > m_read_fifo

FIFO of read data tokens available via m_consumer.

• std::deque< u32 > m_read_deque

Deque of actual read data to allow look ahead.

• sc_core::sc_event m_have_read_data_event
Notified when m_consumer (m_read_fifo) has data.

• sc_core::sc_event m_can_accept_push_event
Notified when another push can be accepted.

• sc_core::sc_event m_have_queue_input_event

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Used to notify handle_tlm_queue_command_input_thread.

• sc_core::sc_event m_drive_read_queue_output_event
Used to notify drive_read_queue_output_method.

• sc_core::sc_event m_drive_full_queue_output_event
Used to notify drive_full_queue_output_method.

• sc_core::sc_event m_detect_overflow_event
Used to notify detect_overflow_method.

• u64 m_fifo_overflow_delta_cycle
Delta cycle in which m_read_fifo overflow occurred.

• u32 m_fifo_overflow_old_data
Data that was overwritten by the m_read_fifo overflow.

• u64 m_pop_delta_cycle
Delta cycle in which last pop of m_read_fifo occurred.

• std::vector< xtsc_tx_xfer ∗ > m_tx_xfer_pool

Maintain a pool of xfers to improve performance.

• log4xtensa::TextLogger & m_text

Text logger.

7.163.1 Detailed Description

XTSC module to model a boot loader for a TX Xtensa chain. This module is designed to
model the boot loader provided by Tensilica. It can be provided an image file to load or
it can be driven by its input queue interface (m_producer). The input queue interface can
be driven by an xtsc_core with a 32-bit TIE output queue interface or by an xtsc_queue_-
producer. Read data can be obtained from the output queue interface (m_consumer). The
output queue interface can be read by an xtsc_core with a 32-bit TIE input queue interface
or by an xtsc_queue_consumer.
If desired, an image file can be provided and after the image file is loaded the input queue
interface can be used.
If desired, this module can be driven by a Verilog module when doing SystemC-Verilog
cosimulation. To do this, set the "pin_level" parameter to true to cause the command input
queue and the read data output queue interfaces to be pin-level. The Done and Mode

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wire outputs will remain as TLM interfaces, but transactors can be used to convert them
to pin-level. The xtsc-run program will automatically take care of this for you. For more
information, see the --connect_proxy_loader and/or --connect_wrapper_loader commands
in the xtsc-run reference manual (available using the "xtsc-run --manual" command).
Note: The xtsc_tx_xfer_if has no pin-level counterpart. Because of this, the TX chain
itself cannot cross the SystemC-Verilog boundary. That is, when doing SystemC-Verilog
cosimulation with TX cores, the boot loader and the TX cores it is controlling must all be on
the same side of the boundary (all in SystemC or all in Verilog).
Here is a block diagram of an xtsc_tx_loader as it is used in the xtsc_tx_loader example:

nb_tx_xfer()

core0.get_tx_xfer_export()
xtsc_tx_loader
loader
core0.get_tx_xfer_port()
m_tx_xfer_export
nb_tx_xfer() xtsc_core xtsc_core
m_tx_xfer_port core0
nb_tx_xfer() core1
xtsc_queue_producer
loader_driver (TX with (TX with
boot loader boot loader
“control” = true option) option)
nb_push()
m_control m_queue m_producer
nb_push() xtsc_queue nb_pop()
OUTQ1 INQ1
Q01
“script_file” m_done
=
loader_driver.vec
m_consumer

INQ1
nb_pop() xtsc_queue nb_push() OUTQ1
m_mode Q10

xtsc_wire_logic
logic

nb_write()
CoreHalted CoreHalted0
nb_write() CoreHalted
CoreHalted1

nb_write()
JobDone

Figure 7.23: xtsc_tx_loader Example

See also:
xtsc_tx_loader_parms
xtsc_tx_xfer_if
xtsc_core
xtsc_component::xtsc_queue_producer
xtsc_component::xtsc_queue_consumer

Definition at line 199 of file xtsc_tx_loader.h.

7.163.2 Constructor & Destructor Documentation

7.163.2.1 xtsc_tx_loader (sc_core::sc_module_name module_name, const

xtsc_tx_loader_parms & loader_parms)

Constructor for an xtsc_tx_loader.

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Parameters:
module_name Name of the xtsc_tx_loader sc_module.
loader_parms The remaining parameters for construction.

See also:
xtsc_tx_loader_parms

7.163.3 Member Function Documentation

7.163.3.1 void connect (xtsc_core & core, const char ∗ iface)

Connect with an upstream xtsc_core. This method connects this loader with the specified
upstream xtsc_core. Which interfaces are connected depends on the iface argument.

Parameters:
core The xtsc_core to connect with.
iface If iface is "tx_xfer_out", then the output XFER interface of core is connected to
input XFER interface of this loader (so core is the last TX in the chain). If iface
is not "tx_xfer_out", then \"pin_level\" must be false and iface must name a 32-
bit TLM TIE output queue interface of core, which will be connected to the TLM
command queue interface (m_producer) of this loader.

The documentation for this class was generated from the following file:

• xtsc_tx_loader.h

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7.164 xtsc_tx_loader_parms Class Reference

Constructor parameters for a xtsc_tx_loader object.

#include <xtsc/xtsc_tx_loader.h>Inheritance diagram for xtsc_tx_loader_parms:

xtsc_parms

xtsc_tx_loader_parms

Collaboration diagram for xtsc_tx_loader_parms:

xtsc_parms

xtsc_tx_loader_parms

Public Member Functions

• xtsc_tx_loader_parms (const char ∗image_file=NULL)
Constructor for an xtsc_tx_loader_parms object.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

7.164.1 Detailed Description

Constructor parameters for a xtsc_tx_loader object.

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Name Type Description

------------------ ---- --------------------------------------------------------

"image_file" char* Name of the optional image file to load. This is the
file produced by the xt-load program.

"hex_format" bool By default, the "image_file" is assumed to be in

readmemh format. Set this parameter to true if it was
generated with the xt-load --hex option.
Default = false (readmemh format).

"binary_format" bool By default, the "image_file" is assumed to be in

readmemh format. Set this parameter to true if it was
generated with the xt-load --binary option.
Default = false (readmemh format).

"turbo" bool If true, then the optional image file will be processed
in turbo mode (in 0 simulation time).
Default = As specified by the "turbo" parameter of
xtsc_initialize_parms.

"squelch_loading" bool This parameter controls the logging of data while in the
Loading state. If true, then XTSC_VERBOSE() is used.
If false, then XTSC_INFO() is used.
Default = true.

"read_fifo_depth" u32 This is the number of read elements that the

xtsc_tx_loader can hold.
Default = 1.

"allow_overflow" bool If true, then read fifo data that is not popped will be
overwritten after the fifo becomes full. If false, then
an exception will be thrown.
Default = true.

"clock_period" u32 This is the length of this loader's clock period

expressed in terms of the SystemC time resolution (from
sc_get_time_resolution()). A value of 0xFFFFFFFF means
to use the XTSC system clock period (from
xtsc_get_system_clock_period()). A value of 0 means one
delta cycle.
Default = 0xFFFFFFFF (i.e. use the system clock
period).

"vcd_handle" void* Pointer to SystemC VCD object (sc_trace_file *) or 0 if

tracing is not desired. Tracing is supported regardless
of the "pin_level" setting.
Default = 0 (NULL).

"pin_level" bool If true, pin-level connections are used for the queue
interfaces.
Default = false (TLM connections are used).

Note: The following parameters only apply if "pin_level" is true:

"posedge_offset" u32 This specifies the time at which the first posedge of
this device's clock conceptually occurs. It is

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expressed in units of the SystemC time resolution and

the value implied by it must be strictly less than the
value implied by the "clock_period" parameter. A value
of 0xFFFFFFFF means to use the same posedge offset as
the system clock (from
xtsc_get_system_clock_posedge_offset()).
Default = 0xFFFFFFFF.

"sample_phase" u32 This specifies the phase (i.e. the point) in each clock
period at which the signals are sampled. It is
expressed in terms of the SystemC time resolution (from
sc_get_time_resolution()) and must be strictly less than
the clock period as specified by the "clock_period"
parameter. A value of 0 means sampling occurs at
posedge clock as specified by "posedge_offset".
Default = 0.

"output_delay" u32 This specifies how long to delay before queue output
pins are driven. The delay is expressed in terms of the
SystemC time resolution (from sc_get_time_resolution())
and must be less than the clock period. A value of 0
means one delta cycle.
Default = 1 (i.e. 1 time resolution).

See also:
xtsc_tx_loader
xtsc_parms

Definition at line 122 of file xtsc_tx_loader.h.

7.164.2 Constructor & Destructor Documentation

7.164.2.1 xtsc_tx_loader_parms (const char ∗ image_file = NULL) [inline]

Constructor for an xtsc_tx_loader_parms object.

Parameters:
image_file Name of the optional image file to load.

Definition at line 132 of file xtsc_tx_loader.h.

References xtsc::xtsc_get_xtsc_initialize_parms().
The documentation for this class was generated from the following file:

• xtsc_tx_loader.h

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7.165 xtsc_tx_xfer Class Reference

This class carries the information of a TLM transaction on the TX Xtensa XFER (boot
loader) interface.
#include <xtsc/xtsc_tx_xfer.h>

Public Member Functions

• xtsc_tx_xfer ()
Constructor for an empty xtsc_tx_xfer object used to create a pool of pre-allocated xtsc_-
tx_xfer objects.

• xtsc_tx_xfer (bool done, u32 address, u32 data, bool config_xfer, bool write, bool
turbo)
Constructor for a normal xtsc_tx_xfer.

• void initialize (bool done, u32 address, u32 data, bool config_xfer, bool write, bool
turbo, u64 tag=0ULL)
Method to re-initialize a pre-existing xtsc_tx_xfer.

• bool get_done () const

Get whether or not this transaction is for Done pin control.

• u32 get_address () const

Get the word address.

• u32 get_data () const

Get the data.

• bool get_config_xfer () const

Get whether or not this is a configuration transaction.

• bool get_write () const

Get whether or not this is a write transaction.

• bool get_read_data () const

Get whether or not this read transaction is carrying read data.

• bool get_turbo () const

Get whether or not the transaction should be handled in turbo style.

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• u64 get_tag () const

Get this xfer transaction’s tag.

• void set_done (bool done)

Set whether or not this transaction is for Done pin control.

• void set_address (u32 address)

Set the word address.

• void set_data (u32 data)

Set the data.

• void set_config_xfer (bool config_xfer)

Set whether or not this is a configuration transaction.

• void set_write (bool write)

Set whether or not this is a write transaction.

• void set_read_data (bool read_data)

Set whether or not this read transaction is carrying read data.

• void set_turbo (bool turbo)

Set whether or not this transaction should be handled turbo style.

• void dump (std::ostream &os=std::cout) const

This method dumps this xfer transactions’s info to the specified ostream object.

Private Member Functions

• void zeroize ()

Private Attributes

• bool m_done
m_data contains Done pin value (XFER block just passes this one along)

• u32 m_address
The word address (byte address = m_address∗4).

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• u32 m_data
The data.

• bool m_config_xfer
True if configuration transaction, false if regular transaction.

• bool m_write
True if write transaction, false if read transaction.

• bool m_read_data
Set to true by the TX core targeted by a read transaction.

• bool m_turbo
Use fast-access (peek/poke).

• u64 m_tag
Unique tag per XFER transaction (artificial).

Friends
• class xtsc_tx_loader

7.165.1 Detailed Description

This class carries the information of a TLM transaction on the TX Xtensa XFER (boot
loader) interface.

See also:
xtsc_tx_xfer_if

Definition at line 28 of file xtsc_tx_xfer.h.

7.165.2 Constructor & Destructor Documentation

7.165.2.1 xtsc_tx_xfer ()

Constructor for an empty xtsc_tx_xfer object used to create a pool of pre-allocated xtsc_-
tx_xfer objects. Before using an xtsc_tx_xfer object that was created with this constructor,
either assign another xtsc_tx_xfer object to it or call the initialize() method on it.

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7.165.3 Member Function Documentation

7.165.3.1 bool get_done () const [inline]

Get whether or not this transaction is for Done pin control.

See also:
set_done()

Definition at line 59 of file xtsc_tx_xfer.h.

7.165.3.2 u32 get_address () const [inline]

Get the word address.

See also:
set_address()

Definition at line 67 of file xtsc_tx_xfer.h.

7.165.3.3 u32 get_data () const [inline]

Get the data.

See also:
set_data()

Definition at line 75 of file xtsc_tx_xfer.h.

7.165.3.4 bool get_config_xfer () const [inline]

Get whether or not this is a configuration transaction.

See also:
set_config_xfer()

Definition at line 83 of file xtsc_tx_xfer.h.

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7.165.3.5 bool get_write () const [inline]

Get whether or not this is a write transaction.

See also:
set_write()

Definition at line 91 of file xtsc_tx_xfer.h.

7.165.3.6 bool get_read_data () const [inline]

Get whether or not this read transaction is carrying read data.

See also:
set_read_data()

Definition at line 99 of file xtsc_tx_xfer.h.

7.165.3.7 bool get_turbo () const [inline]

Get whether or not the transaction should be handled in turbo style.

See also:
set_turbo()

Definition at line 107 of file xtsc_tx_xfer.h.

7.165.3.8 u64 get_tag () const [inline]

Get this xfer transaction’s tag. This is an artificial number (not in hardware) useful for
correlating xfer transactions, for example, a log file.
Definition at line 114 of file xtsc_tx_xfer.h.

7.165.3.9 void set_done (bool done) [inline]

Set whether or not this transaction is for Done pin control.

Parameters:
done If true, then m_data carries the new value of the Done pin (0 or 1). If false, then
this is a regular transaction.

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Definition at line 124 of file xtsc_tx_xfer.h.

7.165.3.10 void set_data (u32 data) [inline]

Set the data. For write transacitions, this method may only be called by the boot loader
(although typically, the constructor or the initialize() method would be used instead of this
method). For read transactions, this method must only be called by the TX targeted by the
read transaction.

See also:
get_data()

Definition at line 141 of file xtsc_tx_xfer.h.

7.165.3.11 void set_config_xfer (bool config_xfer) [inline]

Set whether or not this is a configuration transaction.

See also:
get_config_xfer()

Definition at line 149 of file xtsc_tx_xfer.h.

7.165.3.12 void set_write (bool write) [inline]

Set whether or not this is a write transaction.

See also:
get_write()

Definition at line 157 of file xtsc_tx_xfer.h.

7.165.3.13 void set_read_data (bool read_data) [inline]

Set whether or not this read transaction is carrying read data. Before calling this method,
the TX targeted by a read transaction should first call get_read_data() and throw an excep-
tion if it returns true. It should then call this method with an argument of true.

See also:
get_read_data()

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Definition at line 169 of file xtsc_tx_xfer.h.

7.165.3.14 void set_turbo (bool turbo) [inline]

Set whether or not this transaction should be handled turbo style. In turbo style, the trans-
action should propagate completely around the TX chain without yielding to the SystemC
kernel (that is, in a single delta cycle), this includes any reading or writing of configuration
registers and any reading or writing of the DRAM or IRAM memories. In non-turbo style,
each TX in the TX chain has a write transaction for one clock cycle. For a read transaction,
each non-targeted TX also has the transaction for one clock cycle while the TX targeted
by the read transaction has the transaction for two cycles (the extra cycle is to allow the
read transaction to the local memory (DRAM or IRAM) to take place prior to the transaction
being passed to the next TX in the chain.

See also:
get_turbo()

Definition at line 187 of file xtsc_tx_xfer.h.

7.165.3.15 void dump (std::ostream & os = std::cout) const

This method dumps this xfer transactions’s info to the specified ostream object. The format
of the output is:

tag=<Tag> <Type>! #<Address>=<Data>*

Where:
<Tag> is m_tag in decimal.
<Type> is Done if m_done is true, else is Write if m_write is true,
else is Read.
! indicates m_turbo is true.
# indicates m_config_xfer is true.
<Address> is m_address in hexadecimal (word address).
<Data> is the contents of m_data in hexadecimal.
* indicates m_read_data is false (so data is suspect).

Parameters:
os The ostream object to which the info should be dumped.

The documentation for this class was generated from the following file:

• xtsc_tx_xfer.h

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7.166 xtsc_tx_xfer_if Class Reference

Interface for sending TLM TX XFER interface transactions.

#include <xtsc/xtsc_tx_xfer_if.h>Inheritance diagram for xtsc_tx_xfer_if:

xtsc_tx_xfer_if

xtsc_tx_xfer_if_impl

Public Member Functions

• virtual void nb_tx_xfer (xtsc_tx_xfer &tx_xfer)=0
Method to send a TLM XFER transaction.

7.166.1 Detailed Description

Interface for sending TLM TX XFER interface transactions. This interface is used for send-
ing TLM XFER interface transactions around a boot loader TX Xtensa chain. A TX chain
starts and ends at the boot loader and has one or more TX cores in the chain.

See also:
xtsc_tx_xfer
xtsc_core

Definition at line 37 of file xtsc_tx_xfer_if.h.

7.166.2 Member Function Documentation

7.166.2.1 virtual void nb_tx_xfer (xtsc_tx_xfer & tx_xfer) [pure virtual]

Method to send a TLM XFER transaction. This method is used to send an XFER transac-
tion in the following three situations:

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• From the boot loader to the first TX core in the chain.

• From one TX core in the chain to the next TX core in the chain.
• From the last TX core in the chain to the boot loader.

The boot loader is responsible for creating and destroying the xtsc_tx_xfer object.
By contract, the boot loader may not destroy or re-use the xtsc_tx_xfer object until the
delta cycle after the final TX core in the chain has called the nb_tx_xfer() method of the
boot loader.
By contract, a TX core may not modify the xtsc_tx_xfer object passed to it by a call to its
nb_tx_xfer() method after it has called the nb_tx_xfer() method of the downstream module
(either the next TX core in the chain or the boot loader).
A TX core is allow to use an xtsc_tx_xfer in a read-only capacity (for example, for logging)
after it has called nb_tx_xfer of the downstream module so-long as it has not yielded to the
SystemC kernel.

Parameters:
tx_xfer The xtsc_tx_xfer object.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).

See also:
xtsc_tx_xfer

Implemented in xtsc_tx_xfer_if_impl.
The documentation for this class was generated from the following file:

• xtsc_tx_xfer_if.h

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7.167 xtsc_tx_xfer_if_impl Class Reference

Implementation of xtsc_tx_xfer_if.
#include <xtsc/xtsc_tx_loader.h>Inheritance diagram for xtsc_tx_xfer_if_impl:

xtsc_tx_xfer_if

xtsc_tx_xfer_if_impl

Collaboration diagram for xtsc_tx_xfer_if_impl:

xtsc_connection_interface
xtsc_module

xtsc_resettable
m_incoming_tx_xfer
xtsc_tx_xfer m_outgoing_tx_xfer

xtsc_queue_push_if
m_data_out_floating
m_pop_floating m_loader xtsc_queue_push_if_impl
m_empty_floating
m_full_floating
m_queue_push_impl
m_data_in_floating
m_push_floating
xtsc_signal_sc_bv_base xtsc_signal_sc_bv_base_floating xtsc_tx_loader
m_loader m_queue_pop_impl

m_tx_xfer_impl m_loader
xtsc_tx_xfer_if xtsc_tx_xfer_if_impl xtsc_queue_pop_if_impl

xtsc_queue_pop_if

Public Member Functions

• xtsc_tx_xfer_if_impl (const char ∗object_name, xtsc_tx_loader &loader)
Constructor.

• void nb_tx_xfer (xtsc_tx_xfer &tx_xfer)

• bool is_connected ()
Return true if a port has bound to this implementation.

• bool is_self_connected ()
Return true if the loader’s tx_xfer port is connected to its own export.

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Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

SystemC callback when something binds to us.

Protected Attributes

• xtsc_tx_loader & m_loader

Our xtsc_tx_loader object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.167.1 Detailed Description

Implementation of xtsc_tx_xfer_if.
Definition at line 363 of file xtsc_tx_loader.h.

7.167.2 Constructor & Destructor Documentation

7.167.2.1 xtsc_tx_xfer_if_impl (const char ∗ object_name, xtsc_tx_loader &

loader)

Constructor.

Parameters:
object_name The name of this SystemC channel (aka implementation)
loader A reference to the owning xtsc_tx_loader object.

7.167.3 Member Function Documentation

7.167.3.1 void nb_tx_xfer (xtsc_tx_xfer & tx_xfer) [virtual]

See also:
xtsc_tx_xfer_if

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Implements xtsc_tx_xfer_if.
The documentation for this class was generated from the following file:

• xtsc_tx_loader.h

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7.168 xtsc_udma Class Reference

The xtsc_udma class provides an XTSC model of Cadence/Tensilica’s micro-DMA engine

(uDMA).
#include <xtsc/xtsc_udma.h>Inheritance diagram for xtsc_udma:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_mode_switch_if xtsc_command_handler_interface

xtsc_udma

Collaboration diagram for xtsc_udma:

xtsc_respond_if

m_udma
xtsc_pif_respond_if_impl

xtsc_command_handler_interface m_pif_respond_impl

m_ram_respond_impl
udma_descriptor xtsc_ram_respond_if_impl
m_descriptor

m_udma
xtsc_parms xtsc_udma_parms
m_udma_parms

xtsc_udma m_udma
xtsc_connection_interface xtsc_module
m_rer_lookup_impl
m_pif_response xtsc_rer_lookup_if_impl
xtsc_resettable xtsc_mode_switch_if m_ram_response m_wer_lookup_impl

xtsc_lookup_if
xtsc_response m_p_response m_udma
xtsc_wer_lookup_if_impl
m_stream_dumper stream_dumper

Classes

• struct udma_descriptor
Data structure used to store a uDMA descriptor.

• class xtsc_pif_respond_if_impl
Implementation of xtsc_respond_if for system RAM port.

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• class xtsc_ram_respond_if_impl
Implementation of xtsc_respond_if for local RAM port.

• class xtsc_rer_lookup_if_impl
Implementation of xtsc_lookup_if for RER port.

• class xtsc_wer_lookup_if_impl
Implementation of xtsc_lookup_if for WER port.

Public Member Functions

• SC_HAS_PROCESS (xtsc_udma)
This SystemC macro inserts some code required for SC_THREAD’s to work.

• virtual const char ∗ kind () const

Our C++ type (SystemC uses this).

• xtsc_udma (const sc_core::sc_module_name module_name, const xtsc_udma_-

parms &udma_parms)
Constructor for a xtsc_udma.

• ∼xtsc_udma ()
Destructor.

• virtual u32 get_bit_width (const std::string &port_name, u32 interface_num=0) const

For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

• virtual xtsc_port_table get_port_table (const std::string &port_table_name) const

For xtsc_connection_interface.

• virtual bool prepare_to_switch_sim_mode (xtsc_sim_mode mode)

for xtsc_mode_switch_if

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• virtual bool switch_sim_mode (xtsc_sim_mode mode)

For xtsc_mode_switch_if.

• virtual sc_core::sc_event & get_sim_mode_switch_ready_event ()

For xtsc_mode_switch_if.

• virtual xtsc::xtsc_sim_mode get_sim_mode () const

For xtsc_mode_switch_if.

• virtual bool is_mode_switch_pending () const

For xtsc_mode_switch_if.

• void change_clock_period (xtsc::u32 clock_period_factor)

Method to change the clock period.

• void dump_descriptor (std::ostream &os, bool single_line=true) const

This method dumps the current descriptor info to the specified ostream object.

• void dump_profile_results (std::ostream &os) const

This method dumps current descriptor profile results.

• void reset (bool hard_reset=false)

Reset the xtsc_udma.

• void execute (const std::string &cmd_line, const std::vector< std::string > &words,
const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

Public Attributes

• sc_core::sc_export< xtsc_lookup_if > m_rer_export

Tie lookup RER interface.

• sc_core::sc_export< xtsc_lookup_if > m_wer_export

Tie lookup WER interface.

• sc_core::sc_port< xtsc_request_if > m_ram_request_port

From uDMA to local memory.

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• sc_core::sc_export< xtsc_respond_if > m_ram_respond_export

From local memory to uDMA.

• sc_core::sc_port< xtsc_request_if > m_pif_request_port

From uDMA to PIF.

• sc_core::sc_export< xtsc_respond_if > m_pif_respond_export

From PIF to uDMA.

• sc_core::sc_port< xtsc_wire_write_if, NSPP > m_sync_intr_port

Sync interrupt port.

• sc_core::sc_port< xtsc_wire_write_if, NSPP > m_error_intr_port

Error interrupt port.

Protected Types
• enum register_address_map {
CONFIG = 0xD0000000,
STATUS,
SRCPTR,
DESTPTR,
DESCFIRSTPTR = 0xD0000010,
DESCLASTPTR,
DESCCURPTR,
DESCNUM,
DESCNUMINCR,
NUMREGS = 9 }
Enumeration used to identify software accessible registers.

• enum direction_t {
RAM2PIF = 0,
PIF2RAM = 1,
RAM2RAM = 2,
PIF2PIF = 3 }
Enumeration used to identify the access direction.

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• enum error_t {
BAD_DESCRIPTOR_ERROR = 0x0001,
CROSS_RAM_BOUNDARY_ERROR = 0x0002,
PIF_ADDRESS_ERROR = 0x0004,
PIF_DATA_ERROR = 0x0008,
PIF_ADDRESS_DATA_ERROR = 0x0010,
UDMA_OK = 0x0000 }
Enumeration used to identify DMA error codes.

• typedef enum xtsc::xtsc_udma::direction_t direction_t

Enumeration used to identify the access direction.

• typedef enum xtsc::xtsc_udma::error_t error_t

Enumeration used to identify DMA error codes.

• typedef struct xtsc::xtsc_udma::udma_descriptor udma_descriptor

Data structure used to store a uDMA descriptor.

Protected Member Functions

• error_t check_row_errors (xtsc_address source_address, xtsc_address destination_-
address)
Check crossing RAM boundaries and direction errors on each row.

• bool compute_block_transfers ()
Compute PIF block transfer size (returns false if BAD_DESCRIPTOR error happens).

• void compute_delays ()
Common method to compute/re-compute time delays.

• error_t do_local_read_transfers ()
This method implements local RAM read transfers in a cycle-accurate simulation.

• error_t do_local_write_transfers ()
This method implements local RAM write transfers in a cycle-accurate simulation.

• error_t do_pif_block_read_transfers ()
This method implements PIF block read transfers in a cycle-accurate simulation.

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• error_t do_pif_block_write_transfers ()
This method implements PIF block write transfers in a cycle-accurate simulation.

• error_t do_pif_single_read_transfers ()
This method implements PIF partial read transfers in a cycle-accurate simulation.

• error_t do_pif_single_write_transfers ()
This method implements PIF partial write transfers in a cycle-accurate simulation.

• void do_turbo_transfers ()
This method implements uDMA operation in turbo mode.

• void flush_pif_fifo ()
Flush PIF output fifo.

• bool get_udma_direction (xtsc_address source_address, xtsc_address destination_-

address, direction_t &direction)
Determine uDMA direction.

• const char ∗ get_error_name (error_t error)

Get the error name in string.

• xtsc_fast_access_request ∗ get_fast_access_request (xtsc_address address, u32

num_bytes, u8 port_type)
Get the xtsc_fast_access_request object pointer associated to the requested address.

• void local_read (xtsc_address address, u32 byte_size, u8 ∗data)

This method implements a cycle-ccurate local RAM read transaction.

• void local_write (xtsc_address address, u32 byte_size, const u8 ∗data)

This method implements a cycle-accurate local RAM write transaction.

• bool ram_boundary_crossing (xtsc_address start_address, u32 num_bytes)

Check crossing local RAM boundary.

• void ram_control_thread (void)

uDMA local RAM control thread

• bool read_descriptor (udma_descriptor &descriptor)

This method reads the descriptor located in address m_desc_cur_ptr from local RAM.

• u32 read_udma_register (xtsc_address address)

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Read uDMA user interface register on tie lookup accesses.

• void sync (void)

Synchronize the simulated time to the next sync point.

• void turbo_local_read (xtsc_address address, u32 byte_size, u8 ∗data)

Event-driven local RAM read transfer, used in turbo mode.

• void turbo_local_write (xtsc_address address, u32 byte_size, const u8 ∗data)

Event-driven local RAM write transfer, used in turbo mode.

• void turbo_pif_read (xtsc_address address, u32 byte_size, u8 ∗data)

Event-driven PIF read transfer, used in turbo mode.

• void turbo_pif_write (xtsc_address address, u32 byte_size, const u8 ∗data)

Event-driven PIF write transfer, used in turbo mode.

• void udma_control_thread (void)

uDMA main thread (PIF control thread)

• void write_udma_register (xtsc_address address, u32 write_data)

Write uDMA user interface registers on WER tie lookup accesses.

• void reset_fifos (void)

Reset uDMA internal FIFOs.

Protected Attributes

• xtsc_udma_parms m_udma_parms
Copy of xtsc_udma_parms.

• u32 m_ram_byte_width
See "ram_byte_width".

• u32 m_pif_byte_width
See "pif_byte_width".

• u8 m_ram_read_priority
See "ram_read_priority".

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• u8 m_ram_write_priority
See "ram_write_priority".

• u8 m_pif_read_priority
See "pif_read_priority".

• u8 m_pif_write_priority
See "pif_write_priority".

• sc_core::sc_time m_clock_period
See "clock_period".

• sc_core::sc_time m_ram_read_delay
See "ram_read_delay".

• sc_core::sc_time m_ram_write_delay
See "ram_write_delay".

• sc_core::sc_time m_nacc_wait_time
See "nacc_wait_time".

• sc_core::sc_time m_posedge_offset
See "posedge_offset".

• sc_core::sc_time m_sync_offset
See "sync_offset".

• std::vector< u32 > m_ram_start_addresses

See "ram_start_addresses".

• std::vector< u32 > m_ram_byte_sizes

See "ram_byte_sizes".

• bool m_turbo
See "turbo".

• bool m_use_peek_poke
See "use_peek_poke".

• bool m_log_single_line
See "log_single_line".

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• u8 m_udma_version
See "udma_version".

• xtsc_address m_source_address
Current source address.

• xtsc_address m_destination_address
Current destination address.

• xtsc_address m_desc_first_ptr
Descriptor first pointer in memory.

• xtsc_address m_desc_last_ptr
Descriptor last pointer in memory.

• xtsc_address m_desc_cur_ptr
Descriptor current pointer in memory.

• u32 m_desc_num
Number of descriptors to execute.

• u16 m_error_status
Keep the error state of uDMA operation.

• bool m_udma_enable
Indicate that uDMA is enabled to start its operation.

• bool m_busy
If true, uDMA is busy and transferring data.

• bool m_error_intr_enabled
If true, assert an error interrupt at the completion of the current descriptor (if needed).

• udma_descriptor m_descriptor
Current descriptor.

• direction_t m_udma_direction
uDMA transfer direction (RAM2PIF or PIF2RAM)

• u32 m_block_transfers
Block transfer size (2,4,8, or 16 transfers).

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• u64 m_clock_period_value
This device’s clock period as u64.

• sc_core::sc_time m_time_resolution
The SystemC time resolution.

• sc_core::sc_time m_sync_offset_plus_one
The sync offset on the next clock cycle.

• u32 m_ram_transfer_byte_size
Local ram transfer byte size, needed when RAM byte width is greater than the transfer byte
number.

• u32 m_ram_words_index
Index of stored data in m_ram_words buffer.

• u8 m_ram_words [xtsc::xtsc_max_bus_width8]
Buffer used for collecting data from PIF and sending it to the local RAM.

• std::vector< u32 > m_ram_end_addresses

End address list of local memories, initialized in the uDMA constructor.

• sc_core::sc_event m_dma_thread_start_event
Signal uDMA to start its operation.

• sc_core::sc_event m_ram_control_start_event
Signal ram_control_thread to start its operation.

• sc_core::sc_event m_ram_words_available_event
Notify ram_control_thread when ram write data is collected via PIF port and is ready to
send.

• sc_core::sc_fifo< u8 ∗ > ∗ m_pif_output_fifo

Used to buffer write data to be sent on PIF port.

• u32 m_pif_response_count
PIF response count, used in block transfers.

• u32 m_pif_transfer_byte_size
Byte size of partial or block PIF transfers.

• u16 m_pif_error

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PIF bus error code.

• bool m_terminate_transfers
uDMA threads notify transfers terminations when a PIF error happens

• xtsc_rer_lookup_if_impl ∗ m_rer_lookup_impl
RER xtsc_lookup_if implementation, m_rer_lookup_export binds to this.

• u32 m_rer_address_bit_width
RER tie lookup address bit width.

• u32 m_rer_data_bit_width
RER tie lookup data bit width.

• sc_dt::sc_unsigned m_rer_data
RER tie lookup data.

• xtsc_wer_lookup_if_impl ∗ m_wer_lookup_impl
WER xtsc_lookup_if implementation, m_wer_lookup_export binds to this.

• u32 m_wer_address_bit_width
WER tie lookup address bit width.

• u32 m_wer_data_bit_width
WER tie lookup data bit width.

• xtsc_ram_respond_if_impl ∗ m_ram_respond_impl
Local RAM xtsc_response_if implementation.

• xtsc_response ∗ m_ram_response
Pointer to a local RAM response.

• sc_core::sc_event m_ram_response_available_event
To notify that uDMA has received a local RAM response.

• xtsc_pif_respond_if_impl ∗ m_pif_respond_impl
PIF xtsc_response_if implementation.

• xtsc_response ∗ m_pif_response
Pointer to a PIF response.

• sc_core::sc_event m_pif_response_available_event

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To notify that uDMA has received a PIF response.

• u16 m_num_out_pif_requests
Keep the number of outstanding PIF requests.

• std::vector< xtsc_fast_access_request ∗ > m_fast_access_list

Keep fast access information for turbo mode simulation.

• bool m_prepare_to_switch
Indicate switch to turbo mode.

• sc_core::sc_event m_ready_to_switch_event
Signal ready to switch simulation mode.

• sc_core::sc_event m_switch_mode_done_event
Signal a successful simulation mode switch.

• sc_core::sc_event m_turbo_finish_event
Indicate completion of turbo transfers for the programmed uDMA.

• u64 m_descriptor_cycle_count
Total number of cycles for teh current descriptor execution.

• double m_descriptor_transfer_rate
Transfer rate [bytes/cycle] of the current descriptor.

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

• log4xtensa::TextLogger & m_text

Used for logging.

Static Protected Attributes

• static const u8 m_read_id = 0x3

xtsc_request::m_id for READ

• static const u8 m_write_id = 0x9

xtsc_request::m_id for WRITE

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• static const u8 m_block_read_id = 0x7

xtsc_request::m_id for BLOCK_READ

• static const u8 m_block_write_id = 0x5

xtsc_request::m_id for BLOCK_WRITE

• static const u32 m_descriptor_byte_size = 32

Descriptor byte size.

7.168.1 Detailed Description

The xtsc_udma class provides an XTSC model of Cadence/Tensilica’s micro-DMA engine

(uDMA). It is used to transfer data between a core’s local data RAMs and memories exter-
nal to the core.
The xtsc_udma operations are defined by uDMA descriptors located in a core’s local mem-
ory. The xtsc_udma module is then programmed by writing to its software accessible,
programming registers to set the pointers to the descriptors and define the number of de-
scriptors to execute. The xtsc_udma completion can be determined by a programmed
interrupt or polling the xtsc_udma status register.
An xtcs_udma descriptor is comprised of:

• Source address
• Destination address
• Control (syncInterrupt enable, maximum block size, maximum outstanding PIF re-
quests, number of bytes to transfer)
• Number of rows
• Source pitch
• Destination pitch

The xtsc_udma limits the source and destination address alignments:

• For partial size transfers (1, 2, 4, 8, 16 Bytes): (a) both source and destination ad-
dress must have the same 16B alignment, (b) both source and destination address
must be aligned to the number of bytes being transferred.
• For block size transfers (32, 64, 128, 256 Bytes): (a) the total number of bytes must
be an integer multiple of the block size, (b) the external memory address must be
aligned to the byte size of the block transaction, (c) the local memory address must
be aligned to the smaller of the local memory byte width or the block transaction byte
size, (d) the row transfer must not cross the local memory boundaries.

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The xtsc_udma has a set of software accessible registers, that can be programmed via
RER and WER instructions:

--------------------------------------------------------------------------------------------
Register Name WER/RER Address Description
--------------------------------------------------------------------------------------------
Config 0xD0000000 Configuration register, which includes the following
fields.
Enable: Index 0 0: Disabled, 1: Enabled
NMI: Index 1 0: Disabled, 1: Enabled
Version:Index 31:28
Status 0xD0000001 Status register, which includes the following fields.
Busy: Index 0 Busy processing uDMA descriptors
Error: Index 31:16 One-hot error bits:
0x0001: Bad descriptor
0x0002: DMA crosses DRam boundary
0x0004: PIF address bus error
0x0008: PIF data bus error
SrcPtr 0xD0000002 Current source address register.
DestPtr 0xD0000003 Current destination address register.
DescFirstPtr 0xD0000010 Descriptor first pointer in memory.
DescLastPtr 0xD0000011 Descriptor last pointer in memory.
DescCurPtr 0xD0000012 Descriptor current pointer in memory.
DescNum 0xD0000013 Number of descriptor to execute. Valid values 0 to 63.
DescNumIncr 0xD0000014 Increment number of descriptors. Write-only.

see xtsc_udma_parms
Definition at line 334 of file xtsc_udma.h.

7.168.2 Member Enumeration Documentation

7.168.2.1 enum register_address_map [protected]

Enumeration used to identify software accessible registers.

Enumerator:
CONFIG Configuration register.
STATUS DMA status.
SRCPTR Current source address pointer.
DESTPTR Current destination address pointer.
DESCFIRSTPTR Descriptor first pointer in memory.
DESCLASTPTR Descriptor last pointer in memory.
DESCCURPTR Descriptor current pointer in memory.
DESCNUM Number of descriptors to execute.

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DESCNUMINCR Increament number of DMA descriptors. Write-ony.

NUMREGS Number of registers.

Definition at line 507 of file xtsc_udma.h.

7.168.2.2 enum direction_t [protected]

Enumeration used to identify the access direction.

Enumerator:
RAM2PIF Local RAM to PIF transfers.
PIF2RAM PIF to local RAM transfers.
RAM2RAM Local RAM to local RAM transfers.
PIF2PIF PIF to PIF transfers.

Definition at line 523 of file xtsc_udma.h.

7.168.2.3 enum error_t [protected]

Enumeration used to identify DMA error codes.

Enumerator:
BAD_DESCRIPTOR_ERROR Bad descriptor.
CROSS_RAM_BOUNDARY_ERROR DMA crosses DRAM boundary.
PIF_ADDRESS_ERROR PIF address bus error.
PIF_DATA_ERROR PIF data bus error.
PIF_ADDRESS_DATA_ERROR PIF address and data bus error.
UDMA_OK DMA OK (no error).

Definition at line 533 of file xtsc_udma.h.

7.168.3 Constructor & Destructor Documentation

7.168.3.1 xtsc_udma (const sc_core::sc_module_name module_name, const

xtsc_udma_parms & udma_parms)

Constructor for a xtsc_udma.

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Parameters:
module_name Name of the xtsc_udma sc_module.
udma_parms The remaining parameters for construction.

See also:
xtsc_udma_parms

7.168.4 Member Function Documentation

7.168.4.1 void change_clock_period (xtsc::u32 clock_period_factor)

Method to change the clock period.

Parameters:
clock_period_factor Specifies the new length of this device’s clock period expressed
in terms of the SystemC time resolution (from sc_get_time_resolution()).

7.168.4.2 void dump_descriptor (std::ostream & os, bool single_line = true) const

This method dumps the current descriptor info to the specified ostream object.

Parameters:
os The ostream object to which the dump should be done.
single_line If true, a single line format will be used.

If the single_line option is selected, the format of the output is:

Descriptor (<address>) [<SA>/<DA>/<NumBytes>/<NumTransfers>/<NumOutstanding>/

<NumRows>/<SP>/<DP>/<IntrEnable>]

Where:
<address> is m_desc_cur_ptr in hexadecimal.
<SA> is m_descriptor.source_address in hexadecimal.
<DA> is m_descriptor.destination_address in hexadecimal.
<NumBytes> is m_descriptor.num_bytes in decimal.
<NumTransfers> is m_descriptor.max_block_transfers in decimal.
<NumOutstanding> is m_descriptor.max_num_out in decimal.
<NumRows> is m_descriptor.num_rows in decimal.
<SP> is m_descriptor.source_pitch in hexadecimal.
<DP> is m_descriptor.destination_pitch in hexadecimal.
<IntrEnable> is is m_descriptor.sync_intr_enabled in boolean.

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7.168.4.3 void dump_profile_results (std::ostream & os) const

This method dumps current descriptor profile results.

Parameters:
os The ostream object to which the dump should be done.

The format of output is:

Descriptor (<address>): Cycle count = <CC>, transfer rate = <TR>

Where:
<address> is m_desc_cur_ptr in hexadecimal.
<CC> is the total number of cycles in decimal.
<TR> is the number of bytes transfered per cycle in double.
Calculated as (m_descriptor.num_rows x m_descriptor.num_bytes) / <CC>.

7.168.4.4 void execute (const std::string & cmd_line, const std::vector<

std::string > & words, const std::vector< std::string > & words_lc,
std::ostream & result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:

change_clock_period <ClockPeriodFactor>
Call xtsc_udma::change_clock_period(<ClockPeriodFactor>). Return previous
<ClockPeriodFactor> for this uDMA.

dump_descriptor
Call xtsc_udma::dump_descriptor(). Dump the current descriptor details.

dump_profile_results
Call xtsc_udma::dump_profile_results(). Dump the current descriptor execution info.

reset
Call xtsc_udma::reset().

Implements xtsc_command_handler_interface.
The documentation for this class was generated from the following file:

• xtsc_udma.h

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7.169 xtsc_udma_parms Class Reference

Constructor parameters for an xtsc_udma object.

#include <xtsc/xtsc_udma.h>Inheritance diagram for xtsc_udma_parms:

xtsc_parms

xtsc_udma_parms

Collaboration diagram for xtsc_udma_parms:

xtsc_parms

xtsc_udma_parms

Public Member Functions

• xtsc_udma_parms (u32 ram_byte_width=64, u32 ram_start_address=0x3FF70000,
u32 ram_byte_size=0x1000, u32 pif_byte_width=16)
Constructor for an xtsc_udma object.

• void init (u32 ram_byte_width=64, u32 ram_start_address=0x3FF70000, u32 ram_-

byte_size=0x1000, u32 pif_byte_width=16)
Do initialization.

• virtual const char ∗ kind () const

Our C++ type (the xtsc_parms base class uses this for error messages).

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7.169.1 Detailed Description

Constructor parameters for an xtsc_udma object. This class contains the constructor pa-
rameters for a xtsc_udma object.

Name Type Description

---------------------- ---- --------------------------------------------------

"ram_byte_width" u32 The byte width of the data interface of the local
memory slaves. NOTE: this parameter must be an
integral multiple of "pif_byte_width" parameter.
Default = 64.

"ram_start_address" u32 The starting byte address of the local memory.

Default = 0x3FF70000 (i.e. a single memory model).

"ram_start_addresses" vector<u32> This parameter is a std::vector containing

the starting byte address of all local memories
connected to the xtsc_udma module. This parameter
is used when more than one xtsc_memory component
is connected to xtsc_udma.
Default (unset).

"ram_byte_size" u32 The byte size of the local memory.

Default = 0x1000 (i.e. a single memory model).

"ram_byte_sizes" vector<u32> This parameter is a std::vector containing

the byte size of all local memories connected to
the xtsc_udma module. Note: the size of this
vector must be equal to the size of
"ram_start_addresses" parameter.
Default (unset).

"pif_byte_width" u32 The byte width of the data interface of PIF slave.
Default = 16.

"pif_out_fifo_depth" u32 The depth of PIF output fifo.

Default = 4.

"ram_read_priority" u32 Priority for local RAM READ requests. xtsc_udma

must have the highest READ priority among all
masters connected to the local memory. Response
type of RSP_NACC, DATA_ERROR, and ADDRESS_ERROR
are not allowed at run-time.
Valid values are 0|1|2|3.
Default = (i.e. the highest priority).

"ram_write_priority" u32 Priority for local RAM WRITE requests. xtsc_udma

must have the highest WRITE priority among all
masters connected to the local memory. Response
type of RSP_NACC, DATA_ERROR, and ADDRESS_ERROR
are not allowed at run-time.

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Valid values are 0|1|2|3.

Default = 3 (i.e. the highest priority).

"pif_read_priority" u32 Priority for PIF READ/BLOCK_READ requests.

Valid values are 0|1|2|3.
Default = 3 (i.e. the highest priority).

"pif_write_priority" u32 Priority for PIF WRITE/BLOCK_WRITE requests.

Valid values are 0|1|2|3.
Default = 3 (i.e. the highest priority).

"ram_read_delay" u32 The number of clock periods required between

sending a local RAM READ request and receiving
the corresponding response.
Default = 2.

"ram_write_delay" u32 The number of clock periods required between

sending a local RAM WRITE request and receiving
the corresponding response.
Default = 2.

"rer_address_bit_width" u32 Width of RER request address in bits.

Default = 32.

"rer_data_bit_width" u32 Width of RER response data in bits.

Default = 32.

"wer_address_bit_width" u32 Width of WER request address in bits

Default = 64.

"wer_data_bit_width" u32 Width of WER response data in bits.

Default = 1.

"clock_period" u32 This is the length of this xtsc_udma's clock

period expressed in terms of the SystemC time
resolution (from sc_get_time_resolution()). A
value of 0xFFFFFFFF means to use the XTSC system
clock period (from xtsc_get_system_clock_period()).
A value of 0 means one delta cycle.
Default = 0xFFFFFFFF (i.e. use the system clock
period).

"nacc_wait_time" u32 This parameter, expressed in terms of the SystemC

time resolution, specifies how long to wait after
sending a request downstream to see if it was
rejected by RSP_NACC. This value must not exceed
this device's clock period. A value of 0 means
one delta cycle. A value of 0xFFFFFFFF means to
wait for a period equal to this device's clock
period. CAUTION: A value of 0 can cause an
infinite loop in the simulation if the downstream
module requires a non-zero time to become available.
Default = 0xFFFFFFFF (device's clock period).

"posedge_offset" u32 This specifies the time at which the first

posedge of this device's clock conceptually
occurs. It is expressed in units of the SystemC

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time resolution and the value implied by it must

be strictly less than the value implied by the
"clock_period" parameter. A value of 0xFFFFFFFF
means to use the same posedge offset as the system
clock (from
xtsc_get_system_clock_posedge_offset()).
Default = 0xFFFFFFFF.

"sync_offset" u32 This specifies the synchronization offset from

clock posedge, which xtsc_udma uses to send both
its local RAM and PIF requests (i.e. the point
that an nb_request can be called). It is expressed
in terms of the SystemC time resolution (from
sc_get_time_resolution()). A value of 0 means to
synchronize at clock posedge as specified by
"posedge_offset". A value of 0xFFFFFFFF means to
use the Phase B of the system clock (from
get_clock_phase_delta_factors()).
This means sync_offset is equal to
"posedge_offset + (pda_a + pda_b)"
(i.e. the point that xtsc_core calls nb_request()
to its memories).
Default = 0xFFFFFFFF.

"turbo" bool If true, turboXim fast access mode will be used

to implement uDMA data movement. If false, then
READ|WRITE or BLOCK_READ|BLOCK_WRITE requests
will be used to model a cycle-accurate
implementation of xtsc_udma. The value set by
this parameter can be changed by
xtsc_switch_sim_mode(xtsc_sim_mode mode) method
at run-time. xtsc_udma switches from the cycle-
accurate simulation to the fast functional
simulation at completion of current descriptor,
while it switches from the fast mode to cycle-
accurate mode at the end of the execution of
all programmed descriptors.
Default = As specified by the "turbo" parameter
of xtsc_initialize_parms.

"use_peek_poke" bool If true, xtsc_udma will only use nb_peek() and

nb_poke() methods from xtsc_fast_access interface
to implement the turbo simulation.
If false, the downstream module specifies what
memory address ranges support fast access and
which fast access method to use (raw access,
peek/poke access, etc).
Default = true.

"log_single_line" bool If true, the current descriptor's information

is logged in a brief, single-line format.
If false, the current descriptor's information
is logged in detail with a full description of
each field.
Default = true.

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See also:
xtsc_udma
xtsc::xtsc_parms

Definition at line 203 of file xtsc_udma.h.

7.169.2 Constructor & Destructor Documentation

7.169.2.1 xtsc_udma_parms (u32 ram_byte_width = 64, u32 ram_start_address

= 0x3FF70000, u32 ram_byte_size = 0x1000, u32 pif_byte_width = 16)
[inline]

Constructor for an xtsc_udma object. After the object is constructed, the data members
can be directly written using the appropriate xtsc_parms::set() method in cases where non-
default values are desired.

Parameters:
ram_byte_width The byte width of the data interface of the local memory.
ram_start_address Starting byte address of the local memory.
ram_byte_size Local memory byte size.
pif_byte_width The byte width of the data interface of PIF slave.

Definition at line 220 of file xtsc_udma.h.

The documentation for this class was generated from the following file:

• xtsc_udma.h

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7.170 XTSC_VERSION_INFO_STRING Class Reference

7.170.1 Detailed Description

Definition at line 5946 of file xtsc.h.

The documentation for this class was generated from the following file:

• xtsc.h

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7.171 xtsc_wer_lookup_if_impl Class Reference

Implementation of xtsc_lookup_if for WER port.

#include <xtsc/xtsc_udma.h>Inheritance diagram for xtsc_wer_lookup_if_impl:

xtsc_lookup_if

xtsc_wer_lookup_if_impl

Collaboration diagram for xtsc_wer_lookup_if_impl:

xtsc_lookup_if m_udma xtsc_rer_lookup_if_impl

xtsc_mode_switch_if

m_rer_lookup_impl
xtsc_command_handler_interface

m_udma m_udma
xtsc_wer_lookup_if_impl
m_wer_lookup_impl m_ram_respond_impl
xtsc_udma xtsc_ram_respond_if_impl
m_descriptor m_pif_respond_impl
udma_descriptor
m_udma_parms

xtsc_parms xtsc_udma_parms m_udma

xtsc_respond_if xtsc_pif_respond_if_impl
xtsc_resettable xtsc_module m_pif_response
m_ram_response

xtsc_connection_interface

xtsc_response m_p_response
stream_dumper
m_stream_dumper

Public Member Functions

• xtsc_wer_lookup_if_impl (const char ∗object_name, xtsc_udma &udma)
Constructor.

• void nb_send_address (const sc_dt::sc_unsigned &address)

• bool nb_is_ready ()
• sc_dt::sc_unsigned nb_get_data ()
• u32 nb_get_address_bit_width ()

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• u32 nb_get_data_bit_width ()
• virtual const sc_core::sc_event & default_event () const
Get the event that will be notified when the lookup data is available.

Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

SystemC callback when something binds to us.

Protected Attributes

• xtsc_udma & m_udma

Our xtsc_udma object.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.171.1 Detailed Description

Implementation of xtsc_lookup_if for WER port.

Definition at line 601 of file xtsc_udma.h.

7.171.2 Member Function Documentation

7.171.2.1 void nb_send_address (const sc_dt::sc_unsigned & address)

[virtual]

See also:
xtsc::xtsc_lookup_if

Implements xtsc_lookup_if.

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7.171.2.2 bool nb_is_ready () [virtual]

See also:
xtsc::xtsc_lookup_if

Reimplemented from xtsc_lookup_if.

7.171.2.3 sc_dt::sc_unsigned nb_get_data () [virtual]

See also:
xtsc::xtsc_lookup_if

Implements xtsc_lookup_if.

7.171.2.4 u32 nb_get_address_bit_width () [inline, virtual]

See also:
xtsc::xtsc_lookup_if

Implements xtsc_lookup_if.
Definition at line 621 of file xtsc_udma.h.

7.171.2.5 u32 nb_get_data_bit_width () [inline, virtual]

See also:
xtsc::xtsc_lookup_if

Implements xtsc_lookup_if.
Definition at line 624 of file xtsc_udma.h.
The documentation for this class was generated from the following file:

• xtsc_udma.h

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7.172 xtsc_wire Class Reference

A wire implementation that connects using TLM-level ports.

#include <xtsc/xtsc_wire.h>Inheritance diagram for xtsc_wire:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface xtsc_wire_write_if xtsc_wire_read_if

xtsc_wire

Collaboration diagram for xtsc_wire:

xtsc_connection_interface
xtsc_module
xtsc_resettable
xtsc_command_handler_interface

xtsc_wire_write_if xtsc_wire

m_read_file
xtsc_wire_read_if

xtsc_script_file

Public Member Functions

• virtual const char ∗ kind () const

Our C++ type (SystemC uses this).

• xtsc_wire (sc_core::sc_module_name module_name, const xtsc_wire_parms

&wire_parms)
Constructor for an xtsc_wire.

• ∼xtsc_wire ()

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Destructor.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• void reset (bool hard_reset=false)

Reset the xtsc_wire.

• virtual void execute (const std::string &cmd_line, const std::vector< std::string >
&words, const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

• void connect (xtsc::xtsc_core &core, const char ∗core_intf_name)

Connect to an xtsc_core.

• void connect (xtsc_wire_source &source, const char ∗output_name=NULL)

Connect to an xtsc_wire_source.

• void connect (xtsc_mmio &mmio, const char ∗output_name)

Connect to an xtsc_mmio.

• void connect (xtsc_wire_logic &logic, const char ∗output_name)

Connect to an xtsc_wire_logic.

• void connect (xtsc::xtsc_tx_loader &loader, const char ∗output_name)

Connect to an xtsc_tx_loader.

• void nb_write (const sc_dt::sc_unsigned &value)

This method is used to write a value to this xtsc_wire.

• sc_dt::sc_unsigned nb_read ()
This method is used to read a value from this xtsc_wire.

• xtsc::u32 nb_get_bit_width ()
Returns the bit width of this wire implementation.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

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• log4xtensa::BinaryLogger & get_binary_logger ()

Get the BinaryLogger for this component (e.g. to adjust its log level).

Protected Member Functions

• virtual void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

SystemC callback when something binds to us.

• void get_next_read_file_value ()
Set m_has_read_file_value and m_read_file_value.

Protected Attributes

• bool m_use_wire
Function as a normal wire or use read/write files.

• xtsc::u32 m_width1
Bit width of wire.

• xtsc::u32 m_width8
Byte width of wire.

• sc_dt::sc_unsigned ∗ m_p_wire
The wire.

• sc_dt::sc_unsigned m_initial_value
Initial value of the wire.

• sc_dt::sc_unsigned m_value
Latest value written to or read from the wire.

• sc_core::sc_trace_file ∗ m_p_trace_file
Pointer to sc_trace_file or NULL if not tracing.

• log4xtensa::TextLogger & m_text

TextLogger.

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• log4xtensa::BinaryLogger & m_binary

BinaryLogger.

• bool m_log_data_binary
True if transaction data should be logged by m_binary.

• std::string m_write_file_name
Name of file to write values to.

• std::string m_read_file_name
Name of file to read values from.

• std::ofstream ∗ m_write_file
File to write values to.

• bool m_timestamp
From "timestamp" parameter.

• xtsc::xtsc_script_file ∗ m_read_file
File to read values from.

• bool m_wraparound
Should "read_file" wraparound.

• bool m_has_read_file_value
Does "read_file" have more values.

• sc_dt::sc_unsigned m_read_file_value
Current value from "read_file".

• std::vector< std::string > m_words

Tokenized words from current line of "read_file".

• std::string m_line
Current line from "read_file".

• xtsc::u32 m_next_word_index
Index of current value word in m_words vector.

• xtsc::u32 m_read_file_line_number
Current line of "read_file".

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• sc_core::sc_event m_write_event
Each time nb_write() is called.

• bool m_host_shared_memory
See "host_shared_memory" parameter.

• std::string m_shmem_name
Shared Memory: name.

• xtsc::u8 ∗ m_p_buffer
Shared Memory: intermediate buffer between sc_unsigned & host OS shared memory.

• xtsc::u8 ∗ m_p_shmem
Shared Memory: pointer to host OS shared memory.

• xtsc::u32 m_shmem_total_size
Shared Memory: number of bytes in shared memory.

7.172.1 Detailed Description

A wire implementation that connects using TLM-level ports. Example XTSC wire class that
implements xtsc::xtsc_wire_write_if and xtsc::xtsc_wire_read_if.
To write to this xtsc_wire, bind an sc_port<xtsc_wire_write_if> object to this xtsc_wire. To
read from this xtsc_wire, bind an sc_port<xtsc_wire_read_if> object to this xtsc_wire. This
can be done manually using raw SystemC port binding or by using the xtsc::xtsc_connect()
method.
By default this xtsc_wire uses an internal data member to store the wire value. If desired,
the wire can be configured to instead use host OS shared memory to store the wire value
by setting "host_shared_memory" to true. This can be used to speed up a multi-core
simulation by partitioning it into multiple host processes that run on separate processor
cores of the host workstation. It can also be used to allow a separate (potentially non-
XTSC) host process to read and/or write the wire or just passively monitor it. For example
on Linux:

hexdump -C /dev/shm/username.core0_to_core1

Here is a block diagram of an xtsc_wire as it is used in the xtsc_wire example:

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(core0_to_core1)

core0.get_export_state(“status”) core1.get_import_wire("control")

xtsc_core core0
nb_write() nb_read() xtsc_core core1
xtsc_wire core0_to_core1
(source.out) (sink.out)

Figure 7.24: xtsc_wire Example

Here is the code to connect the xtsc_wire between core0 and core1 using raw SystemC
port binding:

core0.get_export_state("status")(core0_to_core1);
core1.get_import_wire("control")(core0_to_core1);

And here is the code in sc_main.cpp to do the same thing using the xtsc::xtsc_connect()
method:

xtsc_connect(core0, "status", "wire_write", core0_to_core1);

xtsc_connect(core1, "control", "wire_read", core0_to_core1);

See also:
xtsc_wire_parms
xtsc::xtsc_wire_read_if
xtsc::xtsc_wire_write_if
xtsc::xtsc_connect()
xtsc::xtsc_core::How_to_do_port_binding
xtsc::xtsc_core::get_export_state()
xtsc::xtsc_core::get_import_wire()
xtsc::xtsc_core::get_system_output_wire()

Definition at line 285 of file xtsc_wire.h.

7.172.2 Constructor & Destructor Documentation

7.172.2.1 xtsc_wire (sc_core::sc_module_name module_name, const

xtsc_wire_parms & wire_parms)

Constructor for an xtsc_wire.

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Parameters:
module_name Name of the xtsc_wire sc_module.
wire_parms The remaining parameters for construction.

See also:
xtsc_wire_parms

7.172.3 Member Function Documentation

7.172.3.1 virtual void execute (const std::string & cmd_line, const std::vector<
std::string > & words, const std::vector< std::string > & words_lc,
std::ostream & result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:

read
Return the value from calling nb_read().

write <Value>
Call nb_write(<Value>).

reset
Call xtsc_wire::reset().

Implements xtsc_command_handler_interface.

7.172.3.2 void connect (xtsc::xtsc_core & core, const char ∗ core_intf_name)

Connect to an xtsc_core. This method connects an export state, import wire, or system-
level output of an xtsc_core to this xtsc_wire.

Parameters:
core The xtsc_core to connect to.
core_intf_name The export state, import wire, or system-level output of the xtsc_core
that is to be connected to this xtsc_wire. For an export state or an import wire,
core_intf_name is the name as it appears in the user’s TIE code (it must NOT
begin with the "TIE_" prefix). For a system-level output, core_intf_name is the
name as it appears in the Xtensa microprocessor data book. See xtsc::xtsc_-
core::get_output_wire().

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7.172.3.3 void connect (xtsc_wire_source & source, const char ∗ output_name =

NULL)

Connect to an xtsc_wire_source. This method connects an xtsc_wire_source to this xtsc_-

wire.

Parameters:
source The xtsc_wire_source to connect to.
output_name The output of the xtsc_wire_source to be connected to this xtsc_wire.
If NULL then the default (first/only) output of source will be connected.

7.172.3.4 void connect (xtsc_mmio & mmio, const char ∗ output_name)

Connect to an xtsc_mmio. This method connects the named output of the xtsc_mmio to
this xtsc_wire.

Parameters:
mmio The xtsc_mmio to connect to.
output_name The output of the xtsc_mmio to be connected to this xtsc_wire.

7.172.3.5 void connect (xtsc_wire_logic & logic, const char ∗ output_name)

Connect to an xtsc_wire_logic. This method connects the named output of the xtsc_wire_-
logic to this xtsc_wire.

Parameters:
logic The xtsc_wire_logic to connect to.
output_name The output of the xtsc_wire_logic to be connected to this xtsc_wire.

7.172.3.6 void connect (xtsc::xtsc_tx_loader & loader, const char ∗ output_name)

Connect to an xtsc_tx_loader. This method connects the named output of the xtsc_tx_-
loader to this xtsc_wire.

Parameters:
loader The xtsc_tx_loader to connect to.
output_name The output of the xtsc_tx_loader to be connected to this xtsc_wire.
Valid output names are Mode and Done.

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7.172.3.7 void nb_write (const sc_dt::sc_unsigned & value) [virtual]

This method is used to write a value to this xtsc_wire.

See also:
xtsc::xtsc_wire_write_if

Implements xtsc_wire_write_if.

7.172.3.8 sc_dt::sc_unsigned nb_read () [virtual]

This method is used to read a value from this xtsc_wire.

See also:
xtsc::xtsc_wire_read_if

Implements xtsc_wire_read_if.

7.172.3.9 xtsc::u32 nb_get_bit_width () [inline, virtual]

Returns the bit width of this wire implementation.

See also:
xtsc::xtsc_wire_read_if
xtsc::xtsc_wire_write_if

Implements xtsc_wire_write_if.
Definition at line 458 of file xtsc_wire.h.
The documentation for this class was generated from the following file:

• xtsc_wire.h

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7.173 xtsc_wire_logic Class Reference

A general-purpose glue logic device for the xtsc::xtsc_wire_write_if.

#include <xtsc/xtsc_wire_logic.h>Inheritance diagram for xtsc_wire_logic:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface

xtsc_wire_logic

Collaboration diagram for xtsc_wire_logic:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface xtsc_script_file

m_p_definition_file

xtsc_wire_logic

Classes

• class input_definition
Input definition and sc_export.

• class iterator_definition
Iterator definition.

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• class output_definition
Output definition and sc_port.

• class output_info
Information about a delayed output value.

Public Member Functions

• SC_HAS_PROCESS (xtsc_wire_logic)
This SystemC macro inserts some code required for SC_THREAD’s to work.

• virtual const char ∗ kind () const

Our C++ type (SystemC uses this).

• xtsc_wire_logic (sc_core::sc_module_name module_name, const xtsc_wire_logic_-

parms &wire_logic_parms)
Constructor for a xtsc_wire_logic.

• ∼xtsc_wire_logic (void)
Destructor.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• void delay_thread ()
Handle delayed outputs.

• bool has_input (const char ∗input_name) const

Return true if the named input exists.

• bool has_output (const char ∗output_name) const

Return true if the named output exists.

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• xtsc::u32 get_bit_width (const char ∗io_name) const

Return the bit width of the named input/output.

• sc_core::sc_export< xtsc::xtsc_wire_write_if > & get_input (const char ∗input_name)

const
Return the sc_export of the named input.

• sc_core::sc_port< xtsc::xtsc_wire_write_if, NSPP > & get_output (const char

∗output_name) const
Return the sc_port of the named output.

• std::set< std::string > get_input_set () const

Get the set of input names defined for this xtsc_wire_logic.

• std::set< std::string > get_output_set () const

Get the set of output names defined for this xtsc_wire_logic.

• virtual void execute (const std::string &cmd_line, const std::vector< std::string >
&words, const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

• void connect (xtsc::xtsc_core &core, const char ∗core_intf_name, const char ∗io_-
name)
Connect an xtsc_wire_logic input or output to an xtsc_core.

• void connect (xtsc::xtsc_tx_loader &loader, const char ∗output_name, const char

∗input_name)
Connect the output of an xtsc_tx_loader to an input of this xtsc_wire_logic.

• void connect (xtsc_wire_logic &logic, const char ∗output_name, const char ∗input_-
name)
Connect the output of another xtsc_wire_logic to an input of this xtsc_wire_logic.

• void connect (xtsc_mmio &mmio, const char ∗output_name, const char ∗input_-
name)
Connect an xtsc_mmio output to an input of this xtsc_wire_logic.

• void connect (xtsc_wire_source &source, const char ∗output_name, const char

∗input_name)
Connect an xtsc_wire_source output to an input of this xtsc_wire_logic.

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• virtual void reset (bool hard_reset=false)

Write the initial values to the output ports.

• void change_clock_period (xtsc::u32 clock_period_factor)

Method to change the clock period.

Protected Types
• typedef std::vector< xtsc::u32 > rpn_assignment
• typedef std::vector< rpn_assignment ∗ > assignment_table
• typedef std::vector< output_definition ∗ > output_definition_vector
• typedef std::map< std::string, output_definition ∗ > output_definition_map
• typedef std::vector< input_definition ∗ > input_definition_vector
• typedef std::map< std::string, input_definition ∗ > input_definition_map
• typedef std::map< std::string, iterator_definition ∗ > iterator_definition_map
• typedef std::vector< iterator_definition ∗ > iterator_definition_vector
• typedef std::set< output_definition ∗ > output_set
• typedef std::set< input_definition ∗ > input_set
• typedef sc_core::sc_port< xtsc::xtsc_wire_write_if, NSPP > wire_write_port
• typedef sc_core::sc_export< xtsc::xtsc_wire_write_if > wire_write_export

Protected Member Functions

• void handle_input (const std::string &input_name, xtsc::u32 bit_width, const
std::string &initial_value)
Handle input line.

• void handle_output (const std::string &output_name, xtsc::u32 bit_width, const

std::string &initial_value)
Handle output line.

• void handle_iterator ()
Handle iterator line.

• void handle_assign ()
Handle assign line.

• void handle_lua_function ()
Handle lua_function line.

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• bool parse_operand (xtsc::u32 index, std::string &io_name, bool &is_iterator,

xtsc::u32 &index_value)
Parse operand at m_words[index] (this could also be the LHS of the assign).

• virtual void end_of_elaboration (void)

SystemC callback.

• xtsc::u32 get_u32 (xtsc::u32 index, const std::string &argument_name)

Extract a u32 value (named argument_name) from the word at m_words[index].

• xtsc::i32 get_i32 (xtsc::u32 index, const std::string &argument_name)

Extract a i32 value (named argument_name) from the word at m_words[index].

• double get_double (xtsc::u32 index, const std::string &argument_name)

Extract a double value (named argument_name) from the word at m_words[index].

• const std::string & validate_identifier (xtsc::u32 index, const std::string &argument_-

name)
Throw an exception if m_words[index] (named argument_name) does not exists or is not a
valid C/C++ identifier, otherwise return the m_words[index].

• bool is_identifier (const std::string &name)

Return whether or not name is a valid identifier.

Protected Attributes

• log4xtensa::TextLogger & m_text

Used for logging.

• sc_core::sc_time m_clock_period
This device’s clock period.

• xtsc::xtsc_script_file ∗ m_p_definition_file
The script file from "definition_file" parameter.

• std::string m_definition_file
The name of the script file from the "definition_file" parameter.

• std::string m_line
Current line of script file.

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• xtsc::u32 m_line_count
Current line number in script file.

• std::vector< std::string > m_words

Current line in script file tokenized into words.

• output_definition_vector m_outputs
Vector of all output definitions.

• output_definition_vector m_delayed_outputs
Vector of output definitions for delayed outputs.

• output_definition_map m_output_definition_map
Map of output definitions.

• input_definition_vector m_inputs
Vector of all input definitions.

• input_definition_map m_input_definition_map
Map of input definitions.

• iterator_definition_map m_iterator_definition_map
Map of iterator definitions.

• iterator_definition_vector m_iterators
Vector of all iterator definitions.

• std::set< std::string > m_input_set

Set of names of all inputs.

• std::set< std::string > m_output_set

Set of names of all outputs.

• std::set< std::string > m_io_set

Set of names of all inputs and outputs.

• std::vector< bool > m_stack

Stack of operand values.

• xtsc::u32 m_max_depth
Maximum stack depth needed.

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• assignment_table m_assignments
List of all defined RPN assignments.

• xtsc::u32 m_next_delay_thread_index
Used by delay_thread upon entry to get its output.

• xtsc::xtsc_port_table m_port_table_all
All wire inputs and outputs.

• xtsc::xtsc_port_table m_port_table_all_inputs
All wire inputs.

• xtsc::xtsc_port_table m_port_table_all_outputs
All wire outputs.

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

Friends
• std::ostream & operator<< (std::ostream &os, const output_definition &output)
• std::ostream & operator<< (std::ostream &os, const input_definition &input)
• std::ostream & operator<< (std::ostream &os, const iterator_definition &output)

7.173.1 Detailed Description

A general-purpose glue logic device for the xtsc::xtsc_wire_write_if. This device supports
general-purpose glue and delay logic for the xtsc::xtsc_wire_write_if. It can have an arbi-
trary number of inputs and an arbitrary number of outputs and have each bit of each output
be an arbitrary function of the input bits. A file (named by the "definition_file" parameter
of xtsc_wire_logic_parms) is used to define the input and output ports and the mapping
between them.
This device has as many I/O ports as are defined in the definition file. The input ports
(technically, sc_export<xtsc_wire_write_if>) can be written by any device having an sc_-
port<xtsc_wire_write_if>, for example, a TIE export state of an xtsc::xtsc_core, an xtsc_-
mmio output, or an xtsc_wire_source. The output ports (technically, sc_port<xtsc_wire_-
write_if>) can be connected to any device implementing the xtsc::xtsc_wire_write_if, for
example, a system-level input wire of an xtsc::xtsc_core such as "BInterrupt" or "BReset",
an xtsc_mmio input, or an xtsc_wire.

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Because the I/O ports are not known until construction time (when the definition file is
processed), they are not named members of the class. To perform port binding, use the
xtsc::xtsc_connect() method or do manual SystemC port binding using the get_input() and
get_output() methods to obtain references to the desired ports.
Here is a block diagram of an xtsc_wire_logic as it is used in the example:

xtsc_wire_logic logic
(logic.def)
32
xtsc_wire not_A
not_A / (not_A.dat)

32
xtsc_wire A_and_B
A_and_B / (A_and_B.dat)

32
xtsc_wire A_or_B
A_or_B / (A_or_B.dat)
xtsc_wire_source source
(source.def)
(source.vec) nb_write() 32
xtsc_wire A_xor_B
A_xor_B / (A_xor_B.dat)
32
A / A
xtsc_wire A0
A0 (A0.dat)

nb_write()
32
xtsc_wire A1
B / B A1 (A1.dat)

32
xtsc_wire A_dup1
A_dup1 / (A_dup1.dat)

32
xtsc_wire A_dup2
A_dup2 / (A_dup2.dat)

64
xtsc_wire A_B
A_B / (A_B.dat)

Figure 7.25: xtsc_wire_logic Example

And here is the code to connect using the xtsc::xtsc_connect() method:

xtsc_connect(source, "A", "A", logic);

xtsc_connect(source, "B", "B", logic);

xtsc_connect(logic, "not_A", "wire_write", not_A);

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xtsc_connect(logic, "A_and_B", "wire_write", A_and_B);

xtsc_connect(logic, "A_or_B", "wire_write", A_or_B);
xtsc_connect(logic, "A_xor_B", "wire_write", A_xor_B);
xtsc_connect(logic, "A0", "wire_write", A0);
xtsc_connect(logic, "A1", "wire_write", A1);
xtsc_connect(logic, "A_dup1", "wire_write", A_dup1);
xtsc_connect(logic, "A_dup2", "wire_write", A_dup2);
xtsc_connect(logic, "A_B", "wire_write", A_B);

And here is the code to connect using manual SystemC port binding:

source.get_tlm_output("A")(logic.get_input("A"));
source.get_tlm_output("B")(logic.get_input("B"));

logic.get_output("not_A") (not_A);
logic.get_output("A_and_B")(A_and_B);
logic.get_output("A_or_B") (A_or_B);
logic.get_output("A_xor_B")(A_xor_B);
logic.get_output("A0") (A0);
logic.get_output("A1") (A1);
logic.get_output("A_dup1") (A_dup1);
logic.get_output("A_dup2") (A_dup2);
logic.get_output("A_B") (A_B);

See also:
xtsc_wire_logic_parms
xtsc::xtsc_core
xtsc_mmio
xtsc_wire
xtsc_wire_source
xtsc::xtsc_connect()
xtsc::xtsc_core::How_to_do_port_binding
xtsc::xtsc_core::get_export_state()
xtsc::xtsc_core::get_system_input_wire()
xtsc::xtsc_core::get_system_output_wire()

Definition at line 367 of file xtsc_wire_logic.h.

7.173.2 Constructor & Destructor Documentation

7.173.2.1 xtsc_wire_logic (sc_core::sc_module_name module_name, const

xtsc_wire_logic_parms & wire_logic_parms)

Constructor for a xtsc_wire_logic.

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Parameters:
module_name Name of the xtsc_wire_logic sc_module.
wire_logic_parms The remaining parameters for construction.

See also:
xtsc_wire_logic_parms

7.173.3 Member Function Documentation

7.173.3.1 sc_core::sc_export<xtsc::xtsc_wire_write_if>& get_input (const char ∗

input_name) const

Return the sc_export of the named input. This method is used for port binding. For exam-
ple, to bind the TIE export state named "foo" of an xtsc_core named core0 to the sc_export
input named "bar" of an xtsc_wire_logic named logic:
core0.get_export_state("foo")(logic.get_input("bar"));

7.173.3.2 sc_core::sc_port<xtsc::xtsc_wire_write_if, NSPP>& get_output (const

char ∗ output_name) const

Return the sc_port of the named output. This method is used for port binding. For exam-
ple, to bind the sc_port output named "vectors" of an xtsc_wire_logic named logic to the
"BInterrupt" system-level input of an xtsc_core named core0:
logic.get_output("vectors")(core0.get_input_wire("BInterrupt"));

7.173.3.3 virtual void execute (const std::string & cmd_line, const std::vector<
std::string > & words, const std::vector< std::string > & words_lc,
std::ostream & result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:
change_clock_period <ClockPeriodFactor>
Call xtsc_wire_logic::change_clock_period(<ClockPeriodFactor>). Return previous
<ClockPeriodFactor> for this device.

reset
Call xtsc_wire_logic::reset().

Implements xtsc_command_handler_interface.

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7.173.3.4 void connect (xtsc::xtsc_core & core, const char ∗ core_intf_name,

const char ∗ io_name)

Connect an xtsc_wire_logic input or output to an xtsc_core. This method connects an

export state or system-level output wire of an xtsc_core to this xtsc_wire_logic or it connects
this xtsc_wire_logic to a system-level input wire of an xtsc_core.

Parameters:
core The xtsc_core to connect to.
core_intf_name The export state or system-level output/input wire of the xtsc_core
that is to be connected to this xtsc_wire_logic. For an export state, core_intf_-
name is the name as it appears in the user’s TIE code (it must NOT begin with
the "TIE_" prefix). For a system-level output/input wire, core_intf_name is the
name as it appears in the Xtensa microprocessor data book.
io_name The output or input of this xtsc_wire_logic to be connected to the xtsc_core.
If core_intf_name is an xtsc_core export state or a system-level output wire then
io_name must name an input. If core_intf_name is an xtsc_core system-level
input wire then io_name must name an output.

See also:
xtsc::xtsc_core::get_output_wire().
xtsc::xtsc_core::get_input_wire().

7.173.3.5 void connect (xtsc::xtsc_tx_loader & loader, const char ∗ output_name,

const char ∗ input_name)

Connect the output of an xtsc_tx_loader to an input of this xtsc_wire_logic. This method

connects the named output of the specified xtsc_tx_loader to the named input of this xtsc_-
wire_logic.

Parameters:
loader The xtsc_tx_loader to be connected.
output_name The output of the xtsc_tx_loader to be connected to this xtsc_wire_-
logic.
input_name The input of this xtsc_wire_logic that the xtsc_tx_loader is to be con-
nected to.

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7.173.3.6 void connect (xtsc_wire_logic & logic, const char ∗ output_name, const
char ∗ input_name)

Connect the output of another xtsc_wire_logic to an input of this xtsc_wire_logic. This

method connects the named output of the specified xtsc_wire_logic to the named input of
this xtsc_wire_logic.

Parameters:
logic The other xtsc_wire_logic to be connected.
output_name The output of the other xtsc_wire_logic to be connected to this xtsc_-
wire_logic.
input_name The input of this xtsc_wire_logic that the xtsc_wire_logic is to be con-
nected to.

7.173.3.7 void connect (xtsc_mmio & mmio, const char ∗ output_name, const
char ∗ input_name)

Connect an xtsc_mmio output to an input of this xtsc_wire_logic. This method connects

the named output of the specified xtsc_mmio to the named input of this xtsc_wire_logic.

Parameters:
mmio The xtsc_mmio to be connected.
output_name The output of the xtsc_mmio to be connected to this xtsc_wire_logic.
input_name The input of this xtsc_wire_logic that the xtsc_mmio is to be connected
to.

7.173.3.8 void connect (xtsc_wire_source & source, const char ∗ output_name,

const char ∗ input_name)

Connect an xtsc_wire_source output to an input of this xtsc_wire_logic. This method con-

nects the named output of the specified xtsc_wire_source to the named input of this xtsc_-
wire_logic.

Parameters:
source The xtsc_wire_source to connect to this xtsc_wire_logic.
output_name The output of the xtsc_wire_source to be connected to this xtsc_wire_-
logic. If this parameter is NULL or empty then the default (first/only) output of
source will be connected.
input_name The input of this xtsc_wire_logic that the xtsc_wire_source is to be con-
nected to.

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7.173.3.9 void change_clock_period (xtsc::u32 clock_period_factor)

Method to change the clock period.

Parameters:
clock_period_factor Specifies the new length of this device’s clock period expressed
in terms of the SystemC time resolution (from sc_get_time_resolution()).

7.173.3.10 bool parse_operand (xtsc::u32 index, std::string & io_name, bool &
is_iterator, xtsc::u32 & index_value) [protected]

Parse operand at m_words[index] (this could also be the LHS of the assign).

Parameters:
index Index into m_words.
io_name A reference in which to return the input/output name found in the operand
is_iterator A reference in which to return whether operand is an iterator.
index_value A reference in which to return the iterator index or the input/output index.

Returns:
true if operand has an iterator or an input/output index.

The documentation for this class was generated from the following file:

• xtsc_wire_logic.h

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 Chapter 7. Class Documentation

7.174 xtsc_wire_logic_parms Class Reference

Constructor parameters for a xtsc_wire_logic object.

#include <xtsc/xtsc_wire_logic.h>Inheritance diagram for xtsc_wire_logic_parms:

xtsc_parms

xtsc_wire_logic_parms

Collaboration diagram for xtsc_wire_logic_parms:

xtsc_parms

xtsc_wire_logic_parms

Public Member Functions

• xtsc_wire_logic_parms (const char ∗definition_file="")
Constructor for an xtsc_wire_logic_parms object.

• virtual const char ∗ kind () const

Our C++ type (the xtsc_parms base class uses this for error messages).

7.174.1 Detailed Description

Constructor parameters for a xtsc_wire_logic object.

Xtensa SystemC (XTSC) Reference Manual 1213

Chapter 7. Class Documentation

Name Type Description

------------------ ---- --------------------------------------------------------

"definition_file" char* The name of a file providing input definitions, output

definitions, and the mapping from inputs to outputs.
Lines in this file must be in one of the following
formats (curly braces indicate optional elements):

input <InputName> <BitWidth> {<InitialValue>}

output <OutputName> <BitWidth> {<InitialValue> {<WritePolicy> {<Delay> {clock_period}}}}

iterator <Iterator> <Start> <Stop> {<StepSize>}

assign <OutputName> = <RpnExpression>

assign <OutputName>[<Iterator>] = <RpnExpression>

assign <OutputName>[<Index>] = <RpnExpression>

lua_function <OutputName> <LuaFunctionName> <InputName> ...

1. A line beginning with the keyword "input" defines an

sc_export<xtsc_wire_write_if> and its bit width.
2. A line beginning with the keyword "output" defines an
sc_port<xtsc_wire_write_if> and its bit width.
3. A line beginning with the keyword "iterator" defines
an iterator to be used in a subsequent assign line.
Its effect is to replicate any subsequent assign
line that uses the iterator one time for each value
in the iteration sequence. <Iterator> must be a valid
C/C++ identifier. Both <Start> and <Stop> must be
in the range of 0 to <BitWidth> minus 1 of any
inputs or outputs to which they are applied.
<StepSize> must be a non-zero integer. An
<Iterator> can be redefined and the new definition
will apply to subsequent assign lines.
The default <StepSize> is +1 or -1 (depending on
whether <Stop> is greater than or less than <Start>).
4. A line beginning with the keyword "assign" defines
the mapping between all the input bits and one
output bit (after iterator expansion) using a
Reverse Polish Notation (RPN) expression
(<RpnExpression>). The assign line has three
supported formats (as shown above). The first format
shown has an implied iterator from 0 to <BitWidth>
minus 1. If <OutputName> appears in an assign line
then it may not appear in any lua_function line.
5. A line beginning with the keyword "lua_function"
declares that <LuaFunctionName> is the name of a Lua
function defined in a #lua_beg/#lua_end block in the
definition file which takes 1 Lua string argument
for each <InputName> entry on the line and returns
one Lua string value to be assigned to <OutputName>.
The Lua strings for all <InputName> entries will
be in hexadecimal format with ((BitWidth + 3) / 4)

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 Chapter 7. Class Documentation

hex nibbles after the leading "0x" (where BitWidth

is from the <BitWidth> entry on the input line).
If <OutputName> appears in a lua_function line then
it may not appear in any assign line.
6. An <RpnExpression> is a space-separated sequence of
operand tokens and operator tokens. An operand
token must be in one of the following 3 formats (no
internal spaces are allowed):
<InputName>
<InputName>[<Iterator>]
<InputName>[<Index>]
The first <RpnExpression> format shown here has an
implied iterator from 0 to <BitWidth> minus 1 and it
may only be used with the first assign format shown
above (and <InputName> and <OutputName> must have
the same <BitWidth>). When <RpnExpression> is
evaluated (logically this occurs each time there is
a write to an input), each occurance of an operand
token causes its current value (0 or 1) to be pushed
onto the operand stack. Four single-character
operator tokens are supported as shown here with
their English language meaning in quotes followed
by an example RPN expression using it:
! "NOT" a !
| "OR" a b |
& "AND" a b &
^ "exclusive OR" a b ^
The ! operator pops one operand (a) off the stack,
then pushes "NOT a" onto the stack. The | operator
pops 2 operands (a,b) off the stack, computes "a OR b",
then pushes the result onto the stack. The &
operator pops two operands (a,b) off the stack,
computes "a AND b", then pushes the result onto the
stack. The ^ operator pops two operands (a,b) off
the stack, computes "a exclusive OR b", then pushes
the result onto the stack. After the <RpnExpression>
has been evaluated there should only be a single
operand remaining on the stack to assign to the
output.
7. <InputName> and <OutputName> must be valid C/C++
identifiers and must be unique.
8. <BitWidth> must be an integer greater then 0.
9. If the <InitialValue> element contains less bits
then the specified <BitWidth> then the missing
high-order bits are assumed to be 0.
Default = 0.
10. An input bit may appear in any number of assign or
lua_function lines or none at all.
11. An output bit may appear in zero or one assign line.
An output bit that does not appear in an assign line
and whose <OutputName> does not appear in a
lua_function line gets its constant value from the
<InitialValue> element of its output definition line.
12. The definitions for inputs and outputs referenced in
an assign or lua_function line must appear prior to
the assign or lua_function line.
13. <WritePolicy> can be one of always|change. If

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Chapter 7. Class Documentation

<WritePolicy> is always then a write to any input

that this output is dependent on will result in a
write to this output. If <WritePolicy> is change,
then a write to an input will result in a write to
this output only if the output value changes. At
start of simulation and at reset all output ports
are written with their initial value regardless of
this parameter.
Default = change.
14. <Delay> specifies how long to wait after an input is
written before writing any dependent outputs. By
default, <Delay> must be an integer and is taken to
be expressed in terms of the SystemC time resolution
(from sc_get_time_resolution()). However, if the
clock_period qualifier appears after <Delay> then
<Delay> may be an integer or floating point number
that will be multiplied by this device's clock
period (from the "clock_period" parameter). A
<Delay> of 0 means one delta cycle. A <Delay> of
now means no delay (nb_write calls to dependent
outputs occur during the nb_write call to the input).
Default = now.
15. Comments, extra whitespace, and blank lines are
ignored. See xtsc_script_file.
16. Here are some example "definition_file" contents.
- Bit 0 is the OR and Bit 1 is the AND of 2 inputs
input SigIn0 1
input SigIn1 1
output SigOut 2
assign SigOut[0] = SigIn0[0] SigIn1[0] |
assign SigOut[1] = SigIn0[0] SigIn1[0] &
- Swizzle the 3 bits of an input
input SigIn 3
output SigOut 3
iterator i 0 2
iterator j 2 0
assign SigOut[i] = SigIn[j]
- Delay a 12-bit signal 1 SystemC time resolution
input SigIn 12
output SigOut 12 0 always 1
assign SigOut = SigIn
- Delay a 12-bit signal 5 clock cycles
input SigIn 12
output SigOut 12 0 always 5 clock_period
assign SigOut = SigIn
- Invert all bits of a 32-bit input
input SigIn 32
output SigOut 32 0
assign SigOut = SigIn !
- Replicate 1 bit 2 times (fanout)
input SigIn 1
output SigOut0 1
output SigOut1 1
assign SigOut0 = SigIn
assign SigOut1 = SigIn
- Concatenate 6 bits and 3 bits giving 9 bits
input SigIn1 6

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 Chapter 7. Class Documentation

input SigIn2 3
output SigOut 9
iterator i 0 5
assign SigOut[i] = SigIn1[i]
iterator i 6 8
iterator j 0 2
assign SigOut[i] = SigIn2[j]
- 4 bit output is bit-wise AND of two 4-bit inputs
input SigIn1 4
input SigIn2 4
output SigOut 4
assign SigOut = SigIn1 SigIn2 &
- 1 bit output is reduction AND of 4 bit input
input In 4
output Out 1
assign Out = In[0] In[1] In[2] In[3] & & &
- 1 bit output is OR of 4 1-bit inputs
Using assign:
input In0 1
input In1 1
input In2 1
input In3 1
output Out 1
assign Out = In0 In1 In2 In3 | | |
Using lua_function:
#lua_beg
function my_or(arg1, arg2, arg3, arg4)
return ((arg1 == "0x1") or
(arg2 == "0x1") or
(arg3 == "0x1") or
(arg4 == "0x1")) and "0x1" or "0x0"
end
#lua_end
input In0 1
input In1 1
input In2 1
input In3 1
output Out 1
lua_function Out my_or In0 In1 In2 In3

"clock_period" u32 This is the length of this device's clock period

expressed in terms of the SystemC time resolution (from
sc_get_time_resolution()). A value of 0xFFFFFFFF means
to use the XTSC system clock period (from
xtsc_get_system_clock_period()). A value of 0 means one
delta cycle.
Default = 0xFFFFFFFF (i.e. use the system clock period).

See also:
xtsc_wire_logic
xtsc::xtsc_parms

Definition at line 269 of file xtsc_wire_logic.h.

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7.174.2 Constructor & Destructor Documentation

7.174.2.1 xtsc_wire_logic_parms (const char ∗ definition_file = "") [inline]

Constructor for an xtsc_wire_logic_parms object.

Parameters:
definition_file See the "definition_file" parameter

Definition at line 278 of file xtsc_wire_logic.h.

The documentation for this class was generated from the following file:

• xtsc_wire_logic.h

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 Chapter 7. Class Documentation

7.175 xtsc_wire_parms Class Reference

Constructor parameters for a xtsc_wire object.

#include <xtsc/xtsc_wire.h>Inheritance diagram for xtsc_wire_parms:

xtsc_parms

xtsc_wire_parms

Collaboration diagram for xtsc_wire_parms:

xtsc_parms

xtsc_wire_parms

Public Member Functions

• xtsc_wire_parms (xtsc::u32 width1=1, const char ∗write_file=0, const char ∗read_-

file=0, bool wraparound=false)
Constructor for an xtsc_wire_parms object.

• xtsc_wire_parms (const xtsc::xtsc_core &core, const char ∗core_intf_name, const

char ∗write_file=0, const char ∗read_file=0, bool wraparound=false)
Constructor for an xtsc_wire_parms object based upon an xtsc_core object and a named
TIE export state, import wire, or system-level output wire.

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Chapter 7. Class Documentation

• void init (xtsc::u32 width1=1, const char ∗write_file=0, const char ∗read_file=0, bool
wraparound=false)
Do initialization common to both constructors.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

7.175.1 Detailed Description

Constructor parameters for a xtsc_wire object. This class contains the constructor param-
eters for a xtsc_wire object.

Name Type Description

------------------ ---- --------------------------------------------------

"bit_width" u32 Width of wire in bits.

"initial_value" char* Initial value of wire. Does not apply if

"read_file" is specified.
Default = "0x0"

"vcd_handle" void* Pointer to SystemC VCD object (sc_trace_file *) or 0 if

tracing is not desired.
Default = 0 (NULL).

"write_file" char* Name of file to write values to instead of writing

them to the wire. If the "write_file" parameter
is non-null and non-empty, then calls to nb_write()
will cause the passed value to be written to the
file instead of the wire. If the file named by
the "write_file" parameter value does not exist,
it will be created. If it does exist, it will be
overwritten. If both "write_file" and "read_file"
parameters are null or empty, then calls to
nb_write() will cause the passed value to be written
to the wire.
Default = 0 (i.e. function as a normal wire).

"timestamp" bool If true, then each value written to "write_file"

will include the SystemC timestamp as an
xtsc_script_file comment. This parameter is ignored
unless "write_file" is non-null and non-empty.
Default = true.

"read_file" char* Name of file to read values from instead of reading

them from the wire. If the "read_file" parameter
is non-null and non-empty, then calls to nb_read()
will read their value from the file instead of
reading them from the wire. The file named by the
"read_file" parameter must exist. If both
"read_file" and "write_file" parameters are null or

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 Chapter 7. Class Documentation

empty, then calls to nb_read() will get their value

from the wire. Values in the file can be
expressed in decimal or hexadecimal (using leading
'0x') format. Element values must be separated by
white-space. See xtsc::xtsc_script_file.
Default = 0 (i.e. function as a normal wire).

"wraparound" bool Specifies what should happen when the end of file
(EOF) is reached on "read_file". When EOF is
reached and "wraparound" is true, "read_file" will
be reset to the beginning of file and nb_read() will
return the first value from the file. When EOF is
reached and "wraparound" is false, nb_read() will
return the last value in "read_file" (or 0 if
"read_file" is empty).
Default = false.

"host_shared_memory" bool If true the storage for the wire value will be created
at module construction time as host OS shared memory
using shm_open() on Linux and CreateFileMapping() on
MS Windows. If this parameter is set true, then neither
"read_file" nor "write_file" may be used.
Default = false.

"shared_memory_name" char* The name of the host OS shared memory. If this

parameter is left at its default setting of NULL, then
the shared memory name will be formed by concatenating
the user name, a period, and the module instance
hierarchical name. This parameter is only used if
"host_shared_memory" is true.
Default = NULL (use default shared memory name)

Note: To cause xtsc_wire to function as a normal wire, set both "write_file" and
"read_file" parameter values to null (the default) or empty and bind at least
one sc_port<xtsc_wire_write_if> to the xtsc_wire and bind at least one
sc_port<xtsc_wire_read_if> to the xtsc_wire.

To cause xtsc_wire to function as an infinite sink of values written to it,

specify a valid file name for "write_file" and bind at least one
sc_port<xtsc_wire_write_if> to the xtsc_wire.

To cause xtsc_wire to function as a source of values read from it, specify a

valid and existing file name for "read_file" and bind at least one
sc_port<xtsc_wire_read_if> to the xtsc_wire.

To cause xtsc_wire to sink from one file and source from another, specify both
file names and bind at least one sc_port<xtsc_wire_write_if> to the xtsc_wire
and bind at least one sc_port<xtsc_wire_read_if> to the xtsc_wire.

To use host OS shared memory for the wire value, set "host_shared_memory" to
true and do not set "read_file" or "write_file".

See also:
xtsc_wire

Xtensa SystemC (XTSC) Reference Manual 1221

Chapter 7. Class Documentation

xtsc::xtsc_parms

Definition at line 141 of file xtsc_wire.h.

7.175.2 Constructor & Destructor Documentation

7.175.2.1 xtsc_wire_parms (xtsc::u32 width1 = 1, const char ∗ write_file = 0, const

char ∗ read_file = 0, bool wraparound = false) [inline]

Constructor for an xtsc_wire_parms object.

Parameters:
width1 Width of the wire in bits.
write_file Name of file to write nb_write() values to instead of writing them to the wire.
read_file Name of file to read nb_read() values from instead of reading them from the
wire.
wraparound Indicates if read_file should wraparound to the beginning of the file after
the end of file is reached.

Definition at line 160 of file xtsc_wire.h.

7.175.2.2 xtsc_wire_parms (const xtsc::xtsc_core & core, const char ∗

core_intf_name, const char ∗ write_file = 0, const char ∗ read_file = 0,
bool wraparound = false)

Constructor for an xtsc_wire_parms object based upon an xtsc_core object and a named
TIE export state, import wire, or system-level output wire. This constructor will determine
width1 by querying the core object and then pass it to the init() method. If desired, after
the xtsc_wire_parms object is constructed, its data members can be changed using the
appropriate xtsc::xtsc_parms::set() method before passing it to the xtsc_wire constructor.

Parameters:
core A reference to the xtsc_core object upon which to base the xtsc_wire_parms.
core_intf_name The name of the TIE export state or import wire as it appears in the
user’s TIE code or the name of the system level output as it appears in the Xtensa
Microprocessor Data Book. Only a subset of system level outputs is supported.
See xtsc::xtsc_core::get_output_wire().
write_file Name of file to write nb_write() values to instead of writing them to the wire.
read_file Name of file to read nb_read() values from instead of reading them from the
wire.

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 Chapter 7. Class Documentation

wraparound Indicates if read_file should wraparound to the beginning of the file after
the end of file is reached.

The documentation for this class was generated from the following file:

• xtsc_wire.h

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Chapter 7. Class Documentation

7.176 xtsc_wire_read_if Class Reference

Interface for reading (sinking) a wire.

#include <xtsc/xtsc_wire_read_if.h>Inheritance diagram for xtsc_wire_read_if:

xtsc_wire_read_if

xtsc_wire

Public Member Functions

• virtual sc_dt::sc_unsigned nb_read ()=0
This method is called by the wire sink to read the value of the wire.

• virtual u32 nb_get_bit_width ()=0

Get the wire width in bits.

7.176.1 Detailed Description

Interface for reading (sinking) a wire. This TLM-level interface is for connecting between a
wire sink (e.g. an import wire of an xtsc_core) and a wire implementation provided by the
user (e.g. xtsc_component::xtsc_wire). The wire sink has an sc_port<xtsc_wire_read_if>
used to connect to the wire implementation which either inherits from this interface or has
an sc_export<xtsc_wire_read_if>.
Note: The methods of xtsc_wire_read_if are all non-blocking in the OSCI TLM sense. That
is, they must NEVER call wait() either directly or indirectly. The "nb_" method prefix stands
for Non-Blocking.

See also:
xtsc_wire_read_if
xtsc_core::How_to_do_port_binding
xtsc_core::get_import_wire

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 Chapter 7. Class Documentation

xtsc_component::xtsc_wire

Definition at line 40 of file xtsc_wire_read_if.h.

7.176.2 Member Function Documentation

7.176.2.1 virtual sc_dt::sc_unsigned nb_read () [pure virtual]

This method is called by the wire sink to read the value of the wire. For the typical case of
an xtsc_core TIE import wire, this method is called on each clock cycle in which the Xtensa
core reads a value from the TIE_xxx interface (where xxx is the import wire name in the
user TIE code).
This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implemented in xtsc_wire.

7.176.2.2 virtual u32 nb_get_bit_width () [pure virtual]

Get the wire width in bits. This method allows the wire sink to confirm that the implementa-
tion is using the correct size for the wire.
This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implemented in xtsc_wire.
The documentation for this class was generated from the following file:

• xtsc_wire_read_if.h

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Chapter 7. Class Documentation

7.177 xtsc_wire_source Class Reference

A scripted xtsc::xtsc_wire_write_if or pin-level source.

#include <xtsc/xtsc_wire_source.h>Inheritance diagram for xtsc_wire_source:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_wire_write_if

xtsc_wire_source

Collaboration diagram for xtsc_wire_source:

xtsc_wire_write_if

xtsc_connection_interface
xtsc_wire_write_if_impl
m_source
xtsc_module

xtsc_resettable xtsc_wire_source m_p_write_impl

m_p_test_vector_stream
xtsc_script_file
m_pin_floating

xtsc_signal_sc_bv_base xtsc_signal_sc_bv_base_floating

Classes
• class output_definition
Output definition and sc_port.

• class xtsc_wire_write_if_impl

Public Member Functions

• SC_HAS_PROCESS (xtsc_wire_source)
• virtual const char ∗ kind () const

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 Chapter 7. Class Documentation

Our C++ type (SystemC uses this).

• xtsc_wire_source (sc_core::sc_module_name module_name, const xtsc_wire_-

source_parms &source_parms)
Constructor for an xtsc_wire_source.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual std::string get_default_port_name () const

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• virtual void end_of_elaboration (void)

SystemC callback.

• void reset (bool hard_reset=false)

Reset the xtsc_wire_source.

• std::string get_default_output_name () const

Return the name of the first (or only) output.

• bool has_output (const char ∗output_name) const

Return true if the named output exists.

• xtsc::u32 get_bit_width (const char ∗output_name) const

Return the bit width of the named output.

• sc_core::sc_export< xtsc::xtsc_wire_write_if > & get_control_input () const

Return the sc_export of the optional control input.

• sc_core::sc_port< xtsc::xtsc_wire_write_if, NSPP > & get_tlm_output (const char

∗output_name) const
Return the sc_port of the named TLM output.

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Chapter 7. Class Documentation

• sc_core::sc_out< sc_dt::sc_bv_base > & get_output_pin (const char ∗output_name)

const
Return the sc_out<sc_bv_base> of the named pin-level output.

• std::set< std::string > get_output_set () const

Get the set of output names defined for this xtsc_wire_source.

• bool is_pin_level () const

Return whether output ports are pin-level (sc_out) or TLM (sc_port).

• void connect (xtsc_wire_logic &logic, const char ∗output_name)

Connect an xtsc_wire_logic output to the control input of this xtsc_wire_source.

• void connect (xtsc_mmio &mmio, const char ∗output_name)

Connect an xtsc_mmio output to the control input of this xtsc_wire_source.

• void connect (xtsc::xtsc_core &core, const char ∗input_name, const char ∗output_-
name=NULL)
Connect to an xtsc_core.

• void write_thread (void)

Thread to send the writes (from m_script_file) out the output ports.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

Public Attributes
• sc_core::sc_out< sc_dt::sc_bv_base > m_pin
Pin-level port.

• sc_core::sc_port< xtsc::xtsc_wire_write_if, NSPP > m_write

TLM port.

Protected Types
• typedef std::vector< output_definition ∗ > output_definition_vector
• typedef std::map< std::string, output_definition ∗ > output_definition_map
• typedef std::set< output_definition ∗ > output_set

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 Chapter 7. Class Documentation

• typedef sc_core::sc_port< xtsc::xtsc_wire_write_if, NSPP > tlm_port

• typedef sc_core::sc_out< sc_dt::sc_bv_base > pin_port
• typedef sc_core::sc_export< xtsc::xtsc_wire_write_if > wire_write_export

Protected Member Functions

• xtsc::u32 get_u32 (xtsc::u32 index, const std::string &argument_name, xtsc::xtsc_-
script_file ∗p_script_file)
Extract a u32 value (named argument_name) from the word at m_words[index].

• double get_double (xtsc::u32 index, const std::string &argument_name, xtsc::xtsc_-

script_file ∗p_script_file)
Extract a double value (named argument_name) from the word at m_words[index].

• const std::string & validate_identifier (xtsc::u32 index, const std::string &argument_-

name, xtsc::xtsc_script_file ∗p_script_file)
Throw an exception if m_words[index] (named argument_name) does not exists or is not a
valid C/C++ identifier, otherwise return the m_words[index].

• bool is_identifier (const std::string &name)

Return whether or not name is a valid identifier.

• void nb_write (const sc_dt::sc_unsigned &value)

This method is called by the wire driver to write a new value to the wire.

• xtsc::u32 nb_get_bit_width ()
Get the wire width in bits.

Protected Attributes
• log4xtensa::TextLogger & m_text
TextLogger.

• xtsc::u32 m_width1
Bit width of 1st output port.

• bool m_control
From "control" parameter.

• bool m_control_bound

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Chapter 7. Class Documentation

Something is connected to the control input.

• wire_write_export ∗ m_p_control
Optional control input.

• xtsc_wire_write_if_impl ∗ m_p_write_impl
Implementaion for optional control input.

• sc_dt::sc_unsigned m_control_value
Current value of the control input.

• xtsc::u32 m_control_write_count
Number of times control input is written.

• xtsc::u32 m_control_change_count
Number of times control input is written with a new value.

• sc_core::sc_event m_control_write_event
Notified when control input is written.

• bool m_wraparound
Should "script_file" wraparound.

• bool m_pin_level
True if pin-level, false if TLM.

• sc_core::sc_trace_file ∗ m_p_trace_file
Pointer to sc_trace_file or NULL if not tracing.

• std::string m_definition_file
Name of file to get outputs from (from "definition_file").

• std::string m_script_file
Name of file to read values from (from "script_file").

• xtsc::xtsc_script_file ∗ m_p_test_vector_stream
File to read values from.

• std::string m_line
Current line of "definition_file"/"script_file".

• xtsc::u32 m_line_count

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Current line number in "definition_file"/"script_file".

• std::vector< std::string > m_words

Tokenized words from "definition_file"/"script_file".

• std::vector< std::string > m_words_lc

Lower-case version of m_words.

• xtsc::u64 m_clock_period_value
This device’s clock period as u64.

• sc_core::sc_time m_clock_period
From "clock_period" parameter.

• sc_core::sc_time m_time_resolution
The SystemC time resolution.

• bool m_has_posedge_offset
True if m_posedge_offset is non-zero.

• sc_core::sc_time m_posedge_offset
From "posedge_offset" parameter.

• xtsc::u64 m_posedge_offset_value
m_posedge_offset as u64

• output_definition_vector m_outputs
Vector of all output definitions.

• output_definition_map m_output_definition_map
Map of output definitions.

• std::set< std::string > m_output_set

Set of names of all outputs.

• xtsc::xtsc_port_table m_port_table_all
All wire outputs and control input (if present).

• xtsc::xtsc_port_table m_port_table_all_outputs
All wire outputs.

• std::vector< sc_core::sc_process_handle > m_process_handles

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For reset.

• xtsc::xtsc_signal_sc_bv_base_floating m_pin_floating

7.177.1 Detailed Description

A scripted xtsc::xtsc_wire_write_if or pin-level source. This XTSC device implements a

source that reads an input file ("script_file") to determine when and what values to drive out
TLM wire write ports or pin-level ports. Multiple output ports can be defined and driven by
one xtsc_wire_source device; however, the ports driven by a particular xtsc_wire_source
object must be all TLM or all pin-level. The TLM wire write ports can be connected to any
xtsc::xtsc_wire_write_if implementation (such as an input of an xtsc_mmio or xtsc_wire_-
logic device, an xtsc_wire, or a system-level input wire of xtsc::xtsc_core). The pin-level
ports can be connected to a sc_signal<sc_bv_base> (such as would be connected to a
system-level input pin of xtsc::xtsc_core or to a Verilog module). To use pin-level ports, you
must set the "pin_level" parameter to true.
To provide a degree of feedback or control of the script, the "control" option can be set to
true and a wire writer such as xtsc_core, xtsc_mmio, or xtsc_wire_logic can be connected
to the control input. This allows the xtsc_wire_source device to better model certain SoC
components. For example, it can better model a source of a level-sensitive interrupt to
an xtsc_core because the control input provides a means for the xtsc_core to reset the
interrupt source by writing to the control input (this can be done using a TIE export state
of by writing to a memory location that maps to an xtsc_mmio device which converts the
memory-mapped write into a wire write to the control input of the xtsc_wire_source).
To perform port binding, use the xtsc::xtsc_connect() method or do manual SystemC port
binding using the get_control_input(), get_tlm_output(), or get_output_pin() methods to ob-
tain references to the desired sc_port/sc_out. If no "definition_file" is used, then manual
SystemC port binding can also be done using the xtsc_wire_source::m_write port ("pin_-
level" false) or xtsc_wire_source::m_pin port ("pin_level" true).
Here is a block diagram of an xtsc_wire_source as it is used in the xtsc_wire_source ex-
ample:

nb_write() xtsc_core core0

xtsc_wire_source BReset
(idle.out)
BReset.vec

BReset.m_write core0.get_input_wire(“BReset")

Figure 7.26: xtsc_wire_source Example

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Here is the code to connect the xtsc_wire_source to core0 using raw SystemC port binding
and the xtsc_wire_source::m_write data member:

BReset.m_write(core0.get_input_wire("BReset"));

Alternately, raw SystemC port binding can be done using the get_tlm_output() method
which will also work when a "definition_file" is used:

BReset.get_tlm_output("m_write")(core0.get_input_wire("BReset"));

And here is the code to connect using the xtsc::xtsc_connect() method:

xtsc_connect(BReset, "m_write", "BReset", core0);

See also:
xtsc_wire_source_parms
xtsc_wire
xtsc_wire_logic
xtsc::xtsc_wire_write_if
xtsc::xtsc_connect()
xtsc::xtsc_core
xtsc::xtsc_core::How_to_do_port_binding
xtsc::xtsc_core::get_system_input_wire()

Definition at line 302 of file xtsc_wire_source.h.

7.177.2 Constructor & Destructor Documentation

7.177.2.1 xtsc_wire_source (sc_core::sc_module_name module_name, const

xtsc_wire_source_parms & source_parms)

Constructor for an xtsc_wire_source.

Parameters:
module_name Name of the xtsc_wire_source sc_module.
source_parms The remaining parameters for construction.

See also:
xtsc_wire_source_parms

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7.177.3 Member Function Documentation

7.177.3.1 sc_core::sc_export<xtsc::xtsc_wire_write_if>& get_control_input ()

const

Return the sc_export of the optional control input. This method may be used for port binding
of the optional control input.
For example, to bind the TIE export state named "onebit" of an xtsc_core named core0 to
the control input of an xtsc_wire_source named source:
core0.get_export_state("onebit")(source.get_control_input());

7.177.3.2 sc_core::sc_port<xtsc::xtsc_wire_write_if, NSPP>& get_tlm_output

(const char ∗ output_name) const

Return the sc_port of the named TLM output. This method can be used for port binding
when "pin_level" is false.
For example, to bind the sc_port output named "vectors" of an xtsc_wire_source named
source to the "BInterrupt" system-level input of an xtsc_core named core0:
source.get_tlm_output("vectors")(core0.get_input_wire("BInterrupt"));

7.177.3.3 sc_core::sc_out<sc_dt::sc_bv_base>& get_output_pin (const char ∗

output_name) const

Return the sc_out<sc_bv_base> of the named pin-level output. This method can be used
for port binding when "pin_level" is true.
For example, to bind the sc_out<sc_bv_base> output named "vectors" of an xtsc_wire_-
source named source to the "BInterrupt" system-level input of an xtsc_core named core0
(the "SimPinLevelInterfaces" parameter of the xtsc_core_parms object used to create
core0 must have contained "BInterrupt"):
source.get_output_pin("vectors")(core0.get_input_pin("BInterrupt"));

7.177.3.4 void connect (xtsc_wire_logic & logic, const char ∗ output_name)

Connect an xtsc_wire_logic output to the control input of this xtsc_wire_source. This

method connects the specified output of the specified xtsc_wire_logic to the optional con-
trol input of this xtsc_wire_source. This method should not be used unless the "control"
parameter was set to true.

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Parameters:
logic The xtsc_wire_logic to connect to the control input of this xtsc_wire_source.
output_name The output of the xtsc_wire_logic.

7.177.3.5 void connect (xtsc_mmio & mmio, const char ∗ output_name)

Connect an xtsc_mmio output to the control input of this xtsc_wire_source. This method
connects the specified output of the specified xtsc_mmio to the optional control input of this
xtsc_wire_source. This method should not be used unless the "control" parameter was set
to true.

Parameters:
mmio The xtsc_mmio to connect to the control input of this xtsc_wire_source.
output_name The output of the xtsc_mmio.

7.177.3.6 void connect (xtsc::xtsc_core & core, const char ∗ input_name, const
char ∗ output_name = NULL)

Connect to an xtsc_core. This method connects the specified output of this xtsc_wire_-
source to a system-level TLM input of an xtsc_core. This method should not be used when
"pin_level" is true.

Parameters:
core The xtsc_core to connect to.
input_name The system-level input of the xtsc_core that this xtsc_wire_source is to
be connected to. input_name is the name as it appears in the Xtensa micropro-
cessor data book.
output_name The output of this xtsc_wire_source. If output_name is NULL, then the
default (first/only) output of this xtsc_wire_source is used.

7.177.3.7 void nb_write (const sc_dt::sc_unsigned & value) [inline, protected,

virtual]

This method is called by the wire driver to write a new value to the wire. For the typical
case of an xtsc_core TIE export state, this method is called on each clock cycle in which
the Xtensa core writes a value to the TIE_xxx interface (where xxx is the state name in the
user TIE code).

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Parameters:
value The sc_unsigned object containing the value to be written.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implements xtsc_wire_write_if.
Definition at line 707 of file xtsc_wire_source.h.

7.177.3.8 xtsc::u32 nb_get_bit_width () [inline, protected, virtual]

Get the wire width in bits. This method allows the wire driver to confirm that the implemen-
tation is using the correct size for the wire.
This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implements xtsc_wire_write_if.
Definition at line 708 of file xtsc_wire_source.h.
The documentation for this class was generated from the following file:

• xtsc_wire_source.h

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7.178 xtsc_wire_source_parms Class Reference

Constructor parameters for a xtsc_wire_source object.

#include <xtsc/xtsc_wire_source.h>Inheritance diagram for xtsc_wire_source_-
parms:

xtsc_parms

xtsc_wire_source_parms

Collaboration diagram for xtsc_wire_source_parms:

xtsc_parms

xtsc_wire_source_parms

Public Member Functions

• xtsc_wire_source_parms (xtsc::u32 bit_width=1, const char ∗script_file="", bool

wraparound=false, const char ∗definition_file=NULL)
Constructor for an xtsc_wire_source_parms object.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

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7.178.1 Detailed Description

Constructor parameters for a xtsc_wire_source object. This class contains the constructor
parameters for a xtsc_wire_source object.

Name Type Description

------------------ ---- --------------------------------------------------------

"definition_file" char* The name of an optional file providing output port

definitions. If this file is not provide, then there
will be a single output whose width is given by the
"bit_width" parameter and whose name is "m_write" (if
"pin_level" is false) or "m_pin" (if "pin_level" is
true). Lines in this file must be in the following
format (curly braces indicate an optional element):

output <OutputName> <BitWidth> {<InitialValue>}

1. A line must begin with the keyword "output" and it

defines an sc_port<xtsc_wire_write_if> and its bit
width.
2. <OutputName> must be valid C/C++ identifier and must
be unique.
3. <BitWidth> must be an integer greater then 0.
4. If the <InitialValue> element contains less bits
then the specified <BitWidth> then the missing
high-order bits are assumed to be 0.
Default = 0.
5. Comments, extra whitespace, and blank lines are
ignored. See xtsc_script_file.

"bit_width" u32 Width of single output port in bits. This parameter

is not used if a "definition_file" is provided.

"control" bool If true, then a 1-bit TLM control input will be created
and the "WAIT CONTROL" commands will be enabled in the
script file (see "script_file"). The control input can
be used to control the xtsc_wire_source device with
another device (for example, an xtsc_core when modeling
level-sensitive interrupts).
Default = false.
Note: The control input is a TLM interface regardless of
the "pin_level" setting.

"pin_level" bool If true, then pin-level ports will be used. If false,

then TLM ports will be used.
Default = false.

"vcd_handle" void* Pointer to SystemC VCD object (sc_trace_file *) or 0 if

tracing is not desired.
Default = 0 (NULL).

"script_file" char* The file to read the test vector commands from (if a
"definition_file" is provided and all outputs have an
<InitialValue> specified then this parameter is
optional). Each command occupies one line in the file.

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Valid command formats are shown below (the first two

formats show wire write transaction commands; curly
braces indicate an optional element and ellipses
indicate that an element may be repeated):

<delay> <value> { <value> } ...

<delay> <OutputName>=<value> { <OutputName>=<value> } ...
<delay> STOP
WAIT <duration>
WAIT CONTROL WRITE|CHANGE|<value> { <count> }
SYNC <time>
NOTE message
INFO message

1. Integers can appear in decimal or hexadecimal (using

'0x' prefix) format.
2. <delay> specifies how long to wait before writing
<value> to the wire or stopping the simulation.
<delay> can be 0 (to mean 1 delta cycle), or "now"
to mean no delta cycle delay, or a positive integer
or floating point number to mean that many clock
periods (see "clock_period").
3. Each <value> on a line specifies the value to write
to an output port. In the first format shown above,
the first value on the line applies to the first
output defined in the "definition_file" (or to the
single output port if no "definition_file" is
provided), the second value on the line applies to
the second output defined in the "definition_file",
etc. If <value> is - (a single hyphen) then that
value is not written. Trailing missing values are
assumed to be - (and are not written). In the
second format shown above, each non-hyphen value is
written to the named output port. To more easily
support toggle signals, if <value> is ~ (a tilde)
then the value written is the bit-wise complement of
the previous value written.
4. The "<delay> STOP" command causes simulation to stop
via a call to the sc_stop() method after the
specified delay.
5. The "WAIT <duration>" command can be used to cause a
wait of the specified duration. <duration> can be 0
(to mean 1 delta cycle) or a positive integer or
floating point number to mean that many clock
periods.
6. If the "control" parameter was set to true then the
"WAIT CONTROL" command can be used to cause a wait
until the specified activity occurs on the control
input. WRITE means any write even if its the same
value, CHANGE means a write of a new value, and
<value> (which can only be 0 or 1) means a write of
the specified value. An optional <count> can be
specified to mean the event has to occur <count>
times. The default <count> is 1. The default event
is WRITE (so "wait control" is the same thing as
"wait control write 1").
7. The "SYNC <time>" command with <time> less than 1.0

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can be used to cause a wait to the clock phase

(relative to posedge clock) specified by <time>.
Posedge clock is as specified by "posedge_offset".
For example, "sync 0.5" will cause the minimum wait
necessary to sync to negedge clock.
The "SYNC <time>" command with <time> greater than
or equal to 1.0 can be used to cause a wait until
the specified absolute simulation time.
8. The NOTE and INFO commands can be used to cause
the entire line to be logged at NOTE_LOG_LEVEL
or INFO_LOG_LEVEL, respectively.
9. Words are case insensitive.
10. Comments, extra whitespace, blank lines, and lines
between "#if 0" and "#endif" are ignored.
See xtsc_script_file for a complete list of
pseudo-preprocessor commands.

"clock_period" u32 This is the length of this device's clock period

expressed in terms of the SystemC time resolution
(from sc_get_time_resolution()). A value of
0xFFFFFFFF means to use the XTSC system clock
period (from xtsc_get_system_clock_period()).
Default = 0xFFFFFFFF (i.e. use the system clock
period).

"posedge_offset" u32 This specifies the time at which the first posedge of
this device's clock conceptually occurs. It is
expressed in units of the SystemC time resolution and
the value implied by it must be strictly less than the
value implied by the "clock_period" parameter. A value
of 0xFFFFFFFF means to use the same posedge offset as
the system clock (from
xtsc_get_system_clock_posedge_offset()).
Default = 0xFFFFFFFF.

"wraparound" bool If false (the default), "script_file" is only processed

one time. If true, the file pointer will be reset to
the beginning of the file each time the end of file is
reached.
Default = false.

See also:
xtsc_wire_source
xtsc::xtsc_parms
xtsc::xtsc_script_file

Definition at line 199 of file xtsc_wire_source.h.

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7.178.2 Constructor & Destructor Documentation

7.178.2.1 xtsc_wire_source_parms (xtsc::u32 bit_width = 1, const char ∗

script_file = "", bool wraparound = false, const char ∗ definition_file =
NULL) [inline]

Constructor for an xtsc_wire_source_parms object.

Parameters:
bit_width The width of the output port in bits (only used if definition_file is NULL).
script_file The file name to read test vectors from.
wraparound If false (the default), the file is only processed one time. If true, the file
pointer will be reset to the beginning of the file each time the end of file is reached.
definition_file See the "definition_file" parameter

Definition at line 217 of file xtsc_wire_source.h.

The documentation for this class was generated from the following file:

• xtsc_wire_source.h

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7.179 xtsc_wire_write_if Class Reference

Interface for writing (driving/sourcing) a wire.

#include <xtsc/xtsc_wire_write_if.h>Inheritance diagram for xtsc_wire_write_if:

xtsc_tlm2pin_wire_transactor_base< W, T >

xtsc_wire_write_if xtsc_wire_write_if_impl

xtsc_wire

xtsc_wire_source

Public Member Functions

• virtual void nb_write (const sc_dt::sc_unsigned &value)=0

This method is called by the wire driver to write a new value to the wire.

• virtual u32 nb_get_bit_width ()=0

Get the wire width in bits.

7.179.1 Detailed Description

Interface for writing (driving/sourcing) a wire. This TLM-level interface is for connecting
between a wire driver (e.g. an export state or system-level output of xtsc_core) and a
wire sink (e.g. an xtsc_component::xtsc_wire or system-level input of xtsc_core). The wire
driver has an sc_port<xtsc_wire_write_if> used to connect to the wire sink which either
inherits from this interface or has an sc_export<xtsc_wire_write_if>.
Note: The methods of xtsc_wire_write_if are all non-blocking in the OSCI TLM sense. That
is, they must NEVER call wait() either directly or indirectly. The "nb_" method prefix stands
for Non-Blocking.

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See also:
xtsc_wire_read_if
xtsc_core::How_to_do_port_binding
xtsc_component::xtsc_wire
xtsc_component::xtsc_wire_logic
xtsc_component::xtsc_wire_source

Definition at line 41 of file xtsc_wire_write_if.h.

7.179.2 Member Function Documentation

7.179.2.1 virtual void nb_write (const sc_dt::sc_unsigned & value) [pure

virtual]

This method is called by the wire driver to write a new value to the wire. For the typical
case of an xtsc_core TIE export state, this method is called on each clock cycle in which
the Xtensa core writes a value to the TIE_xxx interface (where xxx is the state name in the
user TIE code).

Parameters:
value The sc_unsigned object containing the value to be written.

This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implemented in xtsc_tlm2pin_wire_transactor_base< W, T >, xtsc_wire_write_if_impl,
xtsc_wire_write_if_impl, xtsc_wire_write_if_impl, xtsc_wire, xtsc_wire_write_if_impl, xtsc_-
wire_source, and xtsc_wire_write_if_impl.

7.179.2.2 virtual u32 nb_get_bit_width () [pure virtual]

Get the wire width in bits. This method allows the wire driver to confirm that the implemen-
tation is using the correct size for the wire.
This non-blocking method must never call the SystemC wait() method (either directly or
indirectly).
Implemented in xtsc_tlm2pin_wire_transactor_base< W, T >, xtsc_wire_write_if_impl,
xtsc_wire_write_if_impl, xtsc_wire_write_if_impl, xtsc_wire, xtsc_wire_write_if_impl, xtsc_-
wire_source, and xtsc_wire_write_if_impl.
The documentation for this class was generated from the following file:

• xtsc_wire_write_if.h

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7.180 xtsc_wire_write_if_impl Class Reference

Inheritance diagram for xtsc_wire_write_if_impl:

xtsc_wire_write_if

xtsc_wire_write_if_impl

Collaboration diagram for xtsc_wire_write_if_impl:

xtsc_connection_interface
xtsc_module
xtsc_resettable

xtsc_command_handler_interface

xtsc_queue_push_if

m_test_vector_stream xtsc_queue_producer
xtsc_script_file
m_full_floating
m_data_floating
m_push_floating
xtsc_signal_sc_bv_base xtsc_signal_sc_bv_base_floating
m_p_write_impl

xtsc_wire_write_if xtsc_wire_write_if_impl
m_producer

Public Member Functions

• xtsc_wire_write_if_impl (const std::string &port_name, xtsc_queue_producer &pro-

ducer)
Constructor.

• const char ∗ kind () const

The kind of sc_object we are.

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• virtual void nb_write (const sc_dt::sc_unsigned &value)

Receive writes from the wire source.

• virtual xtsc::u32 nb_get_bit_width ()

Get the wire width in bits.

Protected Member Functions

• void register_port (sc_core::sc_port_base &port, const char ∗if_typename)

SystemC callback when something binds to us.

Protected Attributes

• xtsc_queue_producer & m_producer

Our xtsc_queue_producer object.

• std::string m_name
Our name as a std::string.

• xtsc::u32 m_bit_width
Width in bits.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.180.1 Detailed Description

Definition at line 449 of file xtsc_queue_producer.h.

7.180.2 Member Function Documentation

7.180.2.1 virtual void nb_write (const sc_dt::sc_unsigned & value) [virtual]

Receive writes from the wire source.

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See also:
xtsc::xtsc_wire_write_if

Implements xtsc_wire_write_if.

7.180.2.2 virtual xtsc::u32 nb_get_bit_width () [inline, virtual]

Get the wire width in bits.

See also:
xtsc::xtsc_wire_write_if

Implements xtsc_wire_write_if.
Definition at line 474 of file xtsc_queue_producer.h.
The documentation for this class was generated from the following file:

• xtsc_queue_producer.h

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7.181 xtsc_wire_write_if_impl Class Reference

Implementation of xtsc_wire_write_if.
#include <xtsc/xtsc_wire_logic.h>Inheritance diagram for xtsc_wire_write_if_impl:

xtsc_wire_write_if

xtsc_wire_write_if_impl

Collaboration diagram for xtsc_wire_write_if_impl:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_command_handler_interface xtsc_script_file xtsc_wire_write_if

m_p_definition_file

xtsc_wire_logic xtsc_wire_write_if_impl

m_logic m_p_wire_write_impl m_input_definition

input_definition

Public Member Functions

• xtsc_wire_write_if_impl (const std::string &port_name, input_definition &definition,
xtsc::u32 bit_width)
Constructor.

• const char ∗ kind () const

The kind of sc_object we are.

• virtual void nb_write (const sc_dt::sc_unsigned &value)

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Receive writes from the master.

• virtual xtsc::u32 nb_get_bit_width ()

Get the wire width in bits.

Protected Member Functions

• void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to us.

Protected Attributes
• input_definition & m_input_definition
Our input_definition object.

• std::string m_name
Our name as a std::string.

• xtsc::u32 m_bit_width
Port width in bits.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

• log4xtensa::TextLogger & m_text

Used for logging.

7.181.1 Detailed Description

Implementation of xtsc_wire_write_if.
Definition at line 830 of file xtsc_wire_logic.h.

7.181.2 Member Function Documentation

7.181.2.1 virtual void nb_write (const sc_dt::sc_unsigned & value) [virtual]

Receive writes from the master.

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See also:
xtsc::xtsc_wire_write_if

Implements xtsc_wire_write_if.

7.181.2.2 virtual xtsc::u32 nb_get_bit_width () [virtual]

Get the wire width in bits.

See also:
xtsc::xtsc_wire_write_if

Implements xtsc_wire_write_if.
The documentation for this class was generated from the following file:

• xtsc_wire_logic.h

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7.182 xtsc_wire_write_if_impl Class Reference

Inheritance diagram for xtsc_wire_write_if_impl:

xtsc_wire_write_if

xtsc_wire_write_if_impl

Collaboration diagram for xtsc_wire_write_if_impl:

xtsc_wire_write_if xtsc_connection_interface xtsc_resettable xtsc_signal_sc_bv_base

xtsc_wire_write_if_impl xtsc_module xtsc_script_file xtsc_signal_sc_bv_base_floating

m_p_write_impl m_source m_p_test_vector_stream m_pin_floating

xtsc_wire_source

Public Member Functions

• xtsc_wire_write_if_impl (const std::string &port_name, xtsc_wire_source &source)
Constructor.

• const char ∗ kind () const

The kind of sc_object we are.

• virtual void nb_write (const sc_dt::sc_unsigned &value)

Receive writes from the wire source.

• virtual xtsc::u32 nb_get_bit_width ()

Get the wire width in bits.

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Protected Member Functions

• void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to us.

Protected Attributes
• xtsc_wire_source & m_source
Our xtsc_wire_source object.

• std::string m_name
Our name as a std::string.

• xtsc::u32 m_bit_width
Width in bits.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.182.1 Detailed Description

Definition at line 605 of file xtsc_wire_source.h.

7.182.2 Member Function Documentation

7.182.2.1 virtual void nb_write (const sc_dt::sc_unsigned & value) [virtual]

Receive writes from the wire source.

See also:
xtsc::xtsc_wire_write_if

Implements xtsc_wire_write_if.

7.182.2.2 virtual xtsc::u32 nb_get_bit_width () [inline, virtual]

Get the wire width in bits.

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See also:
xtsc::xtsc_wire_write_if

Implements xtsc_wire_write_if.
Definition at line 630 of file xtsc_wire_source.h.
The documentation for this class was generated from the following file:

• xtsc_wire_source.h

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7.183 xtsc_wire_write_if_impl Class Reference

Implementation of xtsc_wire_write_if.
#include <xtsc/xtsc_mmio.h>Inheritance diagram for xtsc_wire_write_if_impl:

xtsc_wire_write_if

xtsc_wire_write_if_impl

Collaboration diagram for xtsc_wire_write_if_impl:

m_p_wire_write_impl
xtsc_wire_write_if xtsc_wire_write_if_impl
xtsc_resettable m_input_definition

xtsc_module input_definition
m_mmio
xtsc_connection_interface
xtsc_command_handler_interface m_p_register_definition

m_mmio register_definition
m_p_definition_file
xtsc_script_file xtsc_mmio
m_mmio_parms m_mmio

xtsc_parms xtsc_mmio_parms m_active_request m_request_impl

xtsc_request_if_impl

xtsc_debug_if xtsc_request_if

xtsc_request m_p_request
stream_dumper
m_stream_dumper

Public Member Functions

• xtsc_wire_write_if_impl (const std::string &port_name, input_definition &definition,
xtsc::u32 bit_width)
Constructor.

• const char ∗ kind () const

The kind of sc_object we are.

• virtual void nb_write (const sc_dt::sc_unsigned &value)

Receive writes from the wire source.

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• virtual xtsc::u32 nb_get_bit_width ()

Get the wire width in bits.

Protected Member Functions

• void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to us.

Protected Attributes
• input_definition & m_input_definition
Our input_definition object.

• std::string m_name
Our name as a std::string.

• xtsc::u32 m_bit_width
Port width in bits.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.183.1 Detailed Description

Implementation of xtsc_wire_write_if.
Definition at line 832 of file xtsc_mmio.h.

7.183.2 Member Function Documentation

7.183.2.1 virtual void nb_write (const sc_dt::sc_unsigned & value) [virtual]

Receive writes from the wire source.

See also:
xtsc::xtsc_wire_write_if

Implements xtsc_wire_write_if.

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7.183.2.2 virtual xtsc::u32 nb_get_bit_width () [virtual]

Get the wire width in bits.

See also:
xtsc::xtsc_wire_write_if

Implements xtsc_wire_write_if.
The documentation for this class was generated from the following file:

• xtsc_mmio.h

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7.184 xtsc_wire_write_if_impl Class Reference

Inheritance diagram for xtsc_wire_write_if_impl:

xtsc_wire_write_if

xtsc_wire_write_if_impl

Collaboration diagram for xtsc_wire_write_if_impl:

xtsc_connection_interface xtsc_resettable xtsc_wire_write_if

xtsc_module xtsc_command_handler_interface xtsc_respond_if xtsc_script_file xtsc_wire_write_if_impl

m_script_file_stream
m_p_write_impl m_master
m_p_return_value_file

xtsc_master

Public Member Functions

• xtsc_wire_write_if_impl (const std::string &port_name, xtsc_master &master)

Constructor.

• const char ∗ kind () const

The kind of sc_object we are.

• virtual void nb_write (const sc_dt::sc_unsigned &value)

Receive writes from the wire source.

• virtual xtsc::u32 nb_get_bit_width ()

Get the wire width in bits.

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Protected Member Functions

• void register_port (sc_core::sc_port_base &port, const char ∗if_typename)
SystemC callback when something binds to us.

Protected Attributes
• xtsc_master & m_master
Our xtsc_master object.

• std::string m_name
Our name as a std::string.

• xtsc::u32 m_bit_width
Width in bits.

• sc_core::sc_port_base ∗ m_p_port
Port that is bound to us.

7.184.1 Detailed Description

Definition at line 739 of file xtsc_master.h.

7.184.2 Member Function Documentation

7.184.2.1 virtual void nb_write (const sc_dt::sc_unsigned & value) [virtual]

Receive writes from the wire source.

See also:
xtsc::xtsc_wire_write_if

Implements xtsc_wire_write_if.

7.184.2.2 virtual xtsc::u32 nb_get_bit_width () [inline, virtual]

Get the wire width in bits.

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See also:
xtsc::xtsc_wire_write_if

Implements xtsc_wire_write_if.
Definition at line 764 of file xtsc_master.h.
The documentation for this class was generated from the following file:

• xtsc_master.h

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7.185 xtsc_xttlm2tlm2_transactor Class Reference

Example module implementing an Xtensa TLM (xttlm) to OSCI TLM2 transactor.

#include <xtsc/xtsc_xttlm2tlm2_transactor.h>Inheritance diagram for xtsc_-
xttlm2tlm2_transactor:

xtsc_connection_interface xtsc_resettable

xtsc_module xtsc_mode_switch_if xtsc_command_handler_interface

xtsc_xttlm2tlm2_transactor

Collaboration diagram for xtsc_xttlm2tlm2_transactor:

xtsc_debug_if xtsc_request_if

m_transactor xtsc_request_if_impl

xtsc_connection_interface
m_request_impl
xtsc_module

xtsc_resettable

xtsc_mode_switch_if
m_transactor
xtsc_xttlm2tlm2_transactor m_nb_mm nb_mm

xtsc_command_handler_interface m_request m_transactor

tlm_bw_transport_if_impl

xtsc_request m_p_request m_tlm_bw_transport_if_impl

stream_dumper
m_stream_dumper

Classes
• class address_range
Class to keep track of address ranges and what DMI access has been granted/invalidated.

• class nb_mm
Class for tlm_mm_interface for nb_transport.

• class tlm_bw_transport_if_impl
Implementation of tlm_bw_transport_if.

• class transaction_info

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Class to keep track of xtsc_request, tlm_generic_payload, and xtsc_response when using

nb_transport.

• class xtsc_request_if_impl
Implementation of xtsc_request_if.

Public Types
• typedef tlm::tlm_initiator_socket< 32 > initiator_socket_4
initiator socket with BUSWIDTH = 32 bits ( 4 bytes)

• typedef tlm::tlm_initiator_socket< 64 > initiator_socket_8

initiator socket with BUSWIDTH = 64 bits ( 8 bytes)

• typedef tlm::tlm_initiator_socket< 128 > initiator_socket_16

initiator socket with BUSWIDTH = 128 bits (16 bytes)

• typedef tlm::tlm_initiator_socket< 256 > initiator_socket_32

initiator socket with BUSWIDTH = 256 bits (32 bytes)

• typedef tlm::tlm_initiator_socket< 512 > initiator_socket_64

initiator socket with BUSWIDTH = 512 bits (64 bytes)

Public Member Functions

• initiator_socket_4 & get_initiator_socket_4 (xtsc::u32 port_num=0)
Get a reference to the initiator socket with a 4-byte data interface.

• initiator_socket_8 & get_initiator_socket_8 (xtsc::u32 port_num=0)

Get a reference to the initiator socket with a 8-byte data interface.

• initiator_socket_16 & get_initiator_socket_16 (xtsc::u32 port_num=0)

Get a reference to the initiator socket with a 16-byte data interface.

• initiator_socket_32 & get_initiator_socket_32 (xtsc::u32 port_num=0)

Get a reference to the initiator socket with a 32-byte data interface.

• initiator_socket_64 & get_initiator_socket_64 (xtsc::u32 port_num=0)

Get a reference to the initiator socket with a 64-byte data interface.

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• SC_HAS_PROCESS (xtsc_xttlm2tlm2_transactor)
• virtual const char ∗ kind () const
Our C++ type (SystemC uses this).

• xtsc_xttlm2tlm2_transactor (sc_core::sc_module_name module_name, const xtsc_-

xttlm2tlm2_transactor_parms &transactor_parms)
Constructor for an xtsc_xttlm2tlm2_transactor.

• void end_of_simulation (void)

Print info on pools for debugging.

• virtual xtsc::u32 get_bit_width (const std::string &port_name, xtsc::u32 interface_-

num=0) const
For xtsc_connection_interface.

• virtual sc_core::sc_object ∗ get_port (const std::string &port_name)

For xtsc_connection_interface.

• virtual xtsc::xtsc_port_table get_port_table (const std::string &port_table_name)

const
For xtsc_connection_interface.

• xtsc::u32 get_byte_width () const

Return byte width of data interface (from "byte_width" parameter).

• xtsc::u32 get_num_ports () const

Return the number of memory ports this transactor has (from "num_ports" parameter).

• virtual bool prepare_to_switch_sim_mode (xtsc::xtsc_sim_mode mode)

for xtsc_mode_switch_if

• virtual bool switch_sim_mode (xtsc::xtsc_sim_mode mode)

For xtsc_mode_switch_if.

• virtual sc_core::sc_event & get_sim_mode_switch_ready_event ()

For xtsc_mode_switch_if.

• virtual xtsc::xtsc_sim_mode get_sim_mode () const

For xtsc_mode_switch_if.

• virtual bool is_mode_switch_pending () const

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For xtsc_mode_switch_if.

• void reset (bool hard_reset=false)

Reset the transactor.

• void change_clock_period (xtsc::u32 clock_period_factor)

Method to change the clock period.

• void execute (const std::string &cmd_line, const std::vector< std::string > &words,
const std::vector< std::string > &words_lc, std::ostream &result)
Implementation of the xtsc::xtsc_command_handler_interface.

• void connect (xtsc_arbiter &arbiter, xtsc::u32 port_num=0)

Connect an xtsc_arbiter with this xtsc_xttlm2tlm2_transactor.

• xtsc::u32 connect (xtsc::xtsc_core &core, const char ∗memory_port_name, xtsc::u32

port_num=0, bool single_connect=false)
Connect an xtsc_core with this xtsc_xttlm2tlm2_transactor.

• void connect (xtsc_master &master, xtsc::u32 port_num=0)

Connect an xtsc_master with this xtsc_xttlm2tlm2_transactor.

• xtsc::u32 connect (xtsc_memory_trace &memory_trace, xtsc::u32 trace_port=0,

xtsc::u32 port_num=0, bool single_connect=false)
Connect an xtsc_memory_trace with this xtsc_xttlm2tlm2_transactor.

• void connect (xtsc_router &router, xtsc::u32 router_port, xtsc::u32 port_num=0)

Connect an xtsc_router with this xtsc_xttlm2tlm2_transactor.

• log4xtensa::TextLogger & get_text_logger ()

Get the TextLogger for this component (e.g. to adjust its log level).

Public Attributes

• sc_core::sc_export< xtsc::xtsc_request_if > ∗∗ m_request_exports

From upstream master(s) to us.

• sc_core::sc_port< xtsc::xtsc_respond_if > ∗∗ m_respond_ports

From us to upstream master(s).

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Private Types

• typedef std::map< tlm::tlm_generic_payload ∗, transaction_info ∗ > transaction_-

info_map
• typedef tlm_utils::peq_with_get< tlm::tlm_generic_payload > peq

Private Member Functions

• void validate_port_and_width (xtsc::u32 port_num, xtsc::u32 width8)

Perform validation for the get_initiator_socket_BW() methods.

• tlm::tlm_generic_payload ∗ new_transaction ()
Get a new transaction object (from the pool).

• virtual void free (tlm::tlm_generic_payload ∗p_trans)

For tlm_mm_interface for b_transport.

• xtsc::xtsc_request ∗ new_request (const xtsc::xtsc_request &request)

Get a new xtsc_request (from the pool).

• void delete_request (xtsc::xtsc_request ∗&p_request)

Delete an xtsc_request (return it to the pool).

• transaction_info ∗ new_transaction_info (xtsc::xtsc_request ∗p_request)

Get a new transaction_info object (from the pool).

• xtsc::u8 ∗ new_buffer ()
Get a new u8 buffer object (from the pool). Size is m_width8∗m_max_transfers.

• void delete_buffer (xtsc::u8 ∗&p_buffer)

Delete a u8 buffer object (return it to the pool).

• void worker_thread (void)

Handle incoming requests from each master when using b_transport.

• void request_thread (void)

Handle incoming requests from each master when using nb_transport.

• void respond_thread (void)

Handle incoming responses from each slave when using nb_transport.

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• void send_response (xtsc::xtsc_response &response, xtsc::u32 port_num)

Common method for sending a response.

• void throw_invalid_pif_bus_width (xtsc::u32 port_num)

Throw when m_width8 is invalid for PIF-only (block/burst/rcw) transaction.

• void do_transport_dbg (tlm::tlm_generic_payload &trans, xtsc::u32 port_num)

Common method for calling transport_dbg() and handling the return count.

• bool do_get_direct_mem_ptr (tlm::tlm_generic_payload &trans, tlm::tlm_dmi &dmi_-

data, xtsc::u32 port_num)
Common method for calling get_direct_mem_ptr().

• tlm::tlm_sync_enum do_nb_transport_fw (tlm::tlm_generic_payload &trans,

tlm::tlm_phase &phase, xtsc::u32 port_num)
Common method for calling nb_transport_fw().

• void do_b_transport (xtsc::xtsc_response &response, tlm::tlm_generic_payload

&trans, sc_core::sc_time &delay, xtsc::u32 port_num)
Common method for calling b_transport() and handling the response status.

• void do_read (xtsc::xtsc_response &response, xtsc::u32 port_num)

Handle READ using b_transport.

• void do_block_read (xtsc::xtsc_response &response, xtsc::u32 port_num)

Handle BLOCK_READ using b_transport.

• void do_burst_read (xtsc::xtsc_response &response, xtsc::u32 port_num)

Handle BURST_READ using b_transport.

• void do_rcw (xtsc::xtsc_response &response, xtsc::u32 port_num)

Handle RCW using b_transport.

• void do_write (xtsc::xtsc_response &response, xtsc::u32 port_num)

Handle WRITE using b_transport.

• void do_block_write (xtsc::xtsc_response &response, xtsc::u32 port_num)

Handle BLOCK_WRITE using b_transport.

• void do_burst_write (xtsc::xtsc_response &response, xtsc::u32 port_num)

Handle BURST_WRITE using b_transport.

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• bool do_nb_read (transaction_info ∗p_info, xtsc::u32 port_num)

Handle READ using nb_transport, return true if AErr.

• bool do_nb_block_read (transaction_info ∗p_info, xtsc::u32 port_num)

Handle BLOCK_READ using nb_transport, return true if AErr.

• bool do_nb_burst_read (transaction_info ∗p_info, xtsc::u32 port_num)

Handle BURST_READ using nb_transport, return true if AErr.

• bool do_nb_rcw (transaction_info ∗p_info, xtsc::u32 port_num)

Handle RCW using nb_transport, return true if AErr.

• bool do_nb_write (transaction_info ∗p_info, xtsc::u32 port_num)

Handle WRITE using nb_transport, return true if AErr.

• bool do_nb_block_write (transaction_info ∗p_info, xtsc::u32 port_num)

Handle BLOCK_WRITE using nb_transport, return true if AErr.

• bool do_nb_burst_write (transaction_info ∗p_info, xtsc::u32 port_num)

Handle BURST_WRITE using nb_transport, return true if AErr.

Private Attributes
• initiator_socket_4 ∗∗ m_initiator_sockets_4
Initiator socket(s) for 4-byte interface.

• initiator_socket_8 ∗∗ m_initiator_sockets_8
Initiator socket(s) for 8-byte interface.

• initiator_socket_16 ∗∗ m_initiator_sockets_16
Initiator socket(s) for 16-byte interface.

• initiator_socket_32 ∗∗ m_initiator_sockets_32
Initiator socket(s) for 32-byte interface.

• initiator_socket_64 ∗∗ m_initiator_sockets_64
Initiator socket(s) for 64-byte interface.

• xtsc_request_if_impl ∗∗ m_request_impl
m_request_exports bind to these

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• tlm_bw_transport_if_impl ∗∗ m_tlm_bw_transport_if_impl
m_initiator_sockets_BW binds to these

• nb_mm m_nb_mm
tlm_mm_interface for nb_transport

• xtsc::u32 m_next_worker_port_num
Used by worker_thread to get its port number.

• xtsc::u32 m_next_request_port_num
Used by request_thread to get its port number.

• xtsc::u32 m_next_respond_port_num
Used by respond_thread to get its port number.

• xtsc::u32 m_num_ports
See the "num_ports" parameter.

• const char ∗ m_memory_interface_str

See the "memory_interface" parameter.

• xtsc::xtsc_core::memory_port m_memory_port
See the "memory_interface" parameter.

• xtsc::u32 m_width8
The bus width in bytes. See "byte_width".

• xtsc::u32 m_request_fifo_depth
See the "request_fifo_depth" parameter.

• xtsc::u32 m_max_burst_beats
See the "max_burst_beats" parameter.

• bool m_use_nb_transport
See the "use_nb_transport" parameter.

• bool m_turbo_switch
See the "turbo_switch" parameter.

• bool m_revoke_on_dmi_hint
See the "revoke_on_dmi_hint" parameter.

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• bool m_using_nb_transport
True if currently using nb_transport, false if using b_transport.

• bool m_use_tlm2_burst
See the "use_tlm2_burst" parameter.

• bool m_use_tlm2_busy
See the "use_tlm2_busy" parameter.

• bool m_immediate_timing
See "immediate_timing" parameter.

• bool m_has_pif_width
True if m_width8 is 4|8|16.

• xtsc::u32 m_rcw_support
See the "rcw_support" parameter.

• xtsc::u32 m_turbo_support
See the "turbo_support" parameter.

• std::vector< xtsc::u32 > m_deny_fast_access

See the "deny_fast_access" parameter.

• sc_core::sc_time m_clock_period
This transactor’s clock period.

• sc_core::sc_event ∗∗ m_worker_thread_event
To notify worker_thread when a request is accepted.

• sc_core::sc_event ∗∗ m_request_thread_event
To notify request_thread when a request is accepted.

• sc_core::sc_event ∗∗ m_request_phase_ended_event
To notify request_thread when the request phase ends.

• sc_core::sc_event m_ready_to_switch_event
Signal ready to switch simulation mode.

• peq ∗∗ m_respond_thread_peq
For respond_thread.

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• xtsc::xtsc_request ∗∗ m_request
Our copy of current request.

• sc_core::sc_fifo< xtsc::xtsc_request ∗ > ∗∗ m_worker_fifo

The fifos for incoming requests on each port for b_transport.

• sc_core::sc_fifo< xtsc::xtsc_request ∗ > ∗∗ m_request_fifo

The fifos for incoming requests on each port for nb_transport.

• bool ∗ m_busy
True when we have a current request (fifo not used).

• bool m_mode_switch_pending
Indicate simulation mode switch is in progress.

• bool m_dmi_invalidated
To ensure no DMI invalidate occurred.

• bool m_can_revoke_fast_access
All fast access requests (if any) allowed revocation.

• bool ∗ m_rcw_have_first_transfer
True when we’ve rec’d 1st xfer of RCW but not 2nd.

• bool ∗ m_first_block_write
Next BLOCK_WRITE is a first transfer Only used when "use_tlm2_burst" is true.

• xtsc::u8 ∗∗ m_rcw_compare_data
Comparison data from RCW request.

• xtsc::u8 ∗∗ m_burst_data
Accumulate data for BLOCK_READ|BURST_READ|BLOCK_WRITE|BURST_WRITE
(used when m_use_tlm2_burst is true).

• xtsc::u8 ∗∗ m_byte_enables
For byte enable pointer in gp.

• xtsc::u32 ∗ m_burst_index
Index into m_burst_data for BLOCK_WRITE|BURST_WRITE.

• sc_core::sc_time ∗ m_burst_start_time

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Time when 1st RCW|BLOCK_WRITE|BURST_WRITE arrives.

• sc_core::sc_time ∗ m_prev_response_time
When previous response was sent.

• transaction_info_map m_transaction_info_map
Map tlm_generic_payload to transaction_info.

• std::vector< tlm::tlm_generic_payload ∗ > m_transaction_pool

Maintain a pool to improve performance: tlm_generic_payload.

• std::vector< transaction_info ∗ > m_transaction_info_pool

Maintain a pool to improve performance: transaction_info.

• std::vector< xtsc::xtsc_request ∗ > m_request_pool

Maintain a pool to improve performance: xtsc_request.

• std::vector< xtsc::u8 ∗ > m_buffer_pool

Maintain a pool of u8 buffers of size m_width8∗m_max_transfers.

• xtsc::u32 m_transaction_count
Count each newly created transaction in new_transaction.

• xtsc::u32 m_transaction_info_count
Count each newly created transaction_info.

• xtsc::u32 m_request_count
Count each newly created xtsc_request.

• xtsc::u32 m_buffer_count
Count each newly created u8 buffer.

• std::list< address_range ∗ > ∗∗ m_allowed_ranges

Ranges TurboXim has been granted raw access to.

• std::set< xtsc::xtsc_fast_access_revocation_if ∗ > m_revocation_set

Set of fast access revocation interface objects.

• std::vector< sc_core::sc_process_handle > m_process_handles

For reset.

• log4xtensa::TextLogger & m_text

Text logger.

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Chapter 7. Class Documentation

Static Private Attributes

• static const xtsc::u32 m_max_transfers = 16

Max value allowed from xtsc::xtsc_request::get_num_transfers().

7.185.1 Detailed Description

Example module implementing an Xtensa TLM (xttlm) to OSCI TLM2 transactor. This
module can be used to connect an Xtensa TLM memory interface master (for example,
xtsc::xtsc_core, xtsc_component::xtsc_arbiter, etc.) to an OSCI TLM2 memory interface
slave (for example, xtsc_memory_tlm2).
By default, b_transport is used on the OSCI TLM2 side. The "use_nb_transport" parameter
can be set to true to cause the module to use nb_transport. In addition, the "turbo_switch"
parameter can be set to true to cause the module to use b_transport when the cycle-
accurate ISS is active and to use nb_transport when TurboXim is active.
For protocol and timing information specific to xtsc::xtsc_core and the Xtensa ISS, see
xtsc::xtsc_core::Information_on_memory_interface_protocols.
A TLM2 response status of TLM_ADDRESS_ERROR_RESPONSE is translated to an
Xtensa TLM RSP_ADDRESS_ERROR response status. A TLM2 response status of TLM_-
GENERIC_ERROR_RESPONSE is translated to an Xtensa TLM RSP_ADDRESS_DATA_-
ERROR response status. A TLM2 response status of TLM_INCOMPLETE_RESPONSE
is treated as an Xtensa TLM RSP_NACC if "use_tlm2_busy" is true, otherewise it causes
an exception to be thrown (as does any other TLM2 error response status not mentioned
here).
Note: Nothing in the TLM2 base protocol requires the target to respond within the deadline
that xtsc::xtsc_core requires for Xtensa local memories (1 cycle for a 5-stage pipeline and
2 cycles for 7-stage). This transactor should not be used for an Xtensa local memory
interface unless you can be sure the downstream TLM2 subsystem will always respond
within the required deadline.
Note: This model ignores the xtsc_request_if::nb_lock() call which is used if the Xtensa
processor executes an S32C1I instruction targeting DataRAM. This transactor should not
be used for an Xtensa DataRAM interface if S32C1I instructions might target that interface
unless there is an upstream model (e.g. xtsc_arbiter) that is handling nb_lock() calls or
unless you do not care if nb_lock() calls are ignored.
Note: If this transactor is used to connect to a TLM2 memory subsystem containing Xtensa
code (memory that will be accessed via Xtensa IFetch), then TurboXim should not be used
unless that memory subsystem can support either unrestricted DMI access (that is, DMI
pointers will always be given and will never be invalidated) or transport_dbg access. See
the "turbo_support" parameter.

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Here is a block diagram of xtsc_xttlm2tlm2_transactor objects being used in the xtsc_-

xttlm2tlm2_transactor example:

(*tran_dram0.m_request_exports[0])
(mem_dram0.get_target_socket_4(0))

core0.get_request_port(“dram0ls0”)
tran_dram0.get_initiator_socket_4(0)

dram0ls0
nb_request
b_transport
nb_respond invalidate_direct_mem_ptr
dram0ls0

xtsc_xttlm2tlm2_transactor xtsc_memory_tlm2
tran_dram0 mem_dram0
“num_ports” = 2 “num_ports” = 2
nb_request
dram0ls1

b_transport
nb_respond invalidate_direct_mem_ptr
dram0ls1

xtsc_core core0
(memory_test.out)

nb_request
pif
xtsc_xttlm2tlm2_transactor xtsc_memory_tlm2
tran_pif
b_transport
mem_pif
“num_ports” = 1 “num_ports” = 1
nb_respond invalidate_direct_mem_ptr
pif

(*tran_pif.m_respond_ports[0])

(core0.get_respond_export(“pif”))

Figure 7.27: xtsc_xttlm2tlm2_transactor Example

See also:
xtsc_xttlm2tlm2_transactor_parms
xtsc::xtsc_request
xtsc::xtsc_response
xtsc::xtsc_request_if
xtsc::xtsc_respond_if
xtsc::xtsc_core
xtsc::xtsc_core::Information_on_memory_interface_protocols.
xtsc_memory_tlm2
xtsc_tlm22xttlm_transactor

Definition at line 378 of file xtsc_xttlm2tlm2_transactor.h.

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7.185.2 Constructor & Destructor Documentation

7.185.2.1 xtsc_xttlm2tlm2_transactor (sc_core::sc_module_name module_name,

const xtsc_xttlm2tlm2_transactor_parms & transactor_parms)

Constructor for an xtsc_xttlm2tlm2_transactor.

Parameters:
module_name Name of the xtsc_xttlm2tlm2_transactor sc_module.
transactor_parms The remaining parameters for construction.

See also:
xtsc_xttlm2tlm2_transactor_parms

7.185.3 Member Function Documentation

7.185.3.1 void change_clock_period (xtsc::u32 clock_period_factor)

Method to change the clock period.

Parameters:
clock_period_factor Specifies the new length of this device’s clock period expressed
in terms of the SystemC time resolution (from sc_get_time_resolution()).

7.185.3.2 void execute (const std::string & cmd_line, const std::vector<

std::string > & words, const std::vector< std::string > & words_lc,
std::ostream & result) [virtual]

Implementation of the xtsc::xtsc_command_handler_interface. This implementation sup-

ports the following commands:

change_clock_period <ClockPeriodFactor>
Call xtsc_xttlm2tlm2_transactor::change_clock_period(<ClockPeriodFactor>).
Return previous <ClockPeriodFactor> for this device.

peek <StartAddress> <NumBytes>

Peek <NumBytes> of memory starting at <StartAddress>.

poke <StartAddress> <NumBytes> <Byte1> <Byte2> . . . <ByteN>

Poke <NumBytes> (=N) of memory starting at <StartAddress>.

reset [<Hard>]
Call xtsc_xttlm2tlm2_transactor::reset().

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Implements xtsc_command_handler_interface.

7.185.3.3 void connect (xtsc_arbiter & arbiter, xtsc::u32 port_num = 0)

Connect an xtsc_arbiter with this xtsc_xttlm2tlm2_transactor. This method connects the

master port pair of the xtsc_arbiter with the specified Xtensa TLM slave port pair of this
xtsc_xttlm2tlm2_transactor.

Parameters:
arbiter The xtsc_arbiter to connect with this xtsc_xttlm2tlm2_transactor.
port_num The Xtensa TLM slave port pair of this xtsc_xttlm2tlm2_transactor to con-
nect with the xtsc_arbiter.

7.185.3.4 xtsc::u32 connect (xtsc::xtsc_core & core, const char ∗

memory_port_name, xtsc::u32 port_num = 0, bool single_connect =
false)

Connect an xtsc_core with this xtsc_xttlm2tlm2_transactor. This method connects the

specified memory interface master port pair of the specified xtsc_core with the specified
Xtensa TLM slave port pair of this xtsc_xttlm2tlm2_transactor.

Parameters:
core The xtsc_core to connect with this xtsc_xttlm2tlm2_transactor.
memory_port_name The name of the memory interface master port pair of the xtsc_-
core to connect with this xtsc_xttlm2tlm2_transactor. Case-insensitive.
port_num The slave port pair of this xtsc_xttlm2tlm2_transactor to connect the xtsc_-
core with.
single_connect If true only one slave port pair of this device will be connected. If
false, the default, and if memory_port_name names the first port of an uncon-
nected multi-ported interface of core and if port_num is 0 and if the number of
ports this device has matches the number of multi-ports in the core interface,
then all master port pairs of the core interface specified by memory_port_name
will be connected to the slave port pairs of this xtsc_xttlm2tlm2_transactor.

See also:
xtsc::xtsc_core::How_to_do_memory_port_binding for a list of valid memory_port_-
name values.

Returns:
number of ports that were connected by this call (1 or 2)

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7.185.3.5 void connect (xtsc_master & master, xtsc::u32 port_num = 0)

Connect an xtsc_master with this xtsc_xttlm2tlm2_transactor. This method connects the

master port pair of the xtsc_master with the Xtensa TLM slave port pair of this xtsc_-
xttlm2tlm2_transactor.

Parameters:
master The xtsc_master to connect with this xtsc_xttlm2tlm2_transactor.
port_num The slave port pair of this xtsc_xttlm2tlm2_transactor to connect the xtsc_-
master with.

7.185.3.6 xtsc::u32 connect (xtsc_memory_trace & memory_trace, xtsc::u32

trace_port = 0, xtsc::u32 port_num = 0, bool single_connect = false)

Connect an xtsc_memory_trace with this xtsc_xttlm2tlm2_transactor. This method con-

nects the specified master port pair of the specified upstream xtsc_memory_trace with the
specified Xtensa TLM slave port pair of this xtsc_xttlm2tlm2_transactor.

Parameters:
memory_trace The xtsc_memory_trace to connect with this xtsc_xttlm2tlm2_-
transactor.
trace_port The master port pair of the xtsc_memory_trace to connect with this xtsc_-
xttlm2tlm2_transactor.
port_num The Xtensa TLM slave port pair of this xtsc_xttlm2tlm2_transactor to con-
nect the xtsc_memory_trace with.
single_connect If true only one Xtensa TLM slave port pair of this xtsc_xttlm2tlm2_-
transactor will be connected. If false, the default, then all contiguous, uncon-
nected slave port pairs of this xtsc_xttlm2tlm2_transactor starting at port_num
that have a corresponding existing master port pair in memory_trace (starting at
trace_port) will be connected with that corresponding memory_trace master port
pair.

Returns:
number of ports that were connected by this call (1 or more)

7.185.3.7 void connect (xtsc_router & router, xtsc::u32 router_port, xtsc::u32

port_num = 0)

Connect an xtsc_router with this xtsc_xttlm2tlm2_transactor. This method connects the

specified master port pair of the specified xtsc_router with the specified Xtensa TLM slave
port pair of this xtsc_xttlm2tlm2_transactor.

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Parameters:
router The xtsc_router to connect with this xtsc_xttlm2tlm2_transactor.
router_port The master port pair of the xtsc_router to connect with this xtsc_-
xttlm2tlm2_transactor. router_port must be in the range of 0 to the xtsc_router’s
"num_slaves" parameter minus 1.
port_num The Xtensa TLM slave port pair of this xtsc_xttlm2tlm2_transactor to con-
nect the xtsc_router with.

The documentation for this class was generated from the following file:

• xtsc_xttlm2tlm2_transactor.h

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7.186 xtsc_xttlm2tlm2_transactor_parms Class Refer-

ence

Constructor parameters for a xtsc_xttlm2tlm2_transactor object.

#include <xtsc/xtsc_xttlm2tlm2_transactor.h>Inheritance diagram for xtsc_-
xttlm2tlm2_transactor_parms:

xtsc_parms

xtsc_xttlm2tlm2_transactor_parms

Collaboration diagram for xtsc_xttlm2tlm2_transactor_parms:

xtsc_parms

xtsc_xttlm2tlm2_transactor_parms

Public Member Functions

• xtsc_xttlm2tlm2_transactor_parms (const char ∗memory_interface="PIF", xtsc::u32

width8=4, xtsc::u32 num_ports=1)
Constructor for an xtsc_xttlm2tlm2_transactor_parms object.

• xtsc_xttlm2tlm2_transactor_parms (const xtsc::xtsc_core &core, const char

∗memory_interface, xtsc::u32 num_ports=0)
Constructor for an xtsc_xttlm2tlm2_transactor_parms object based upon an xtsc_core ob-
ject and a named memory interface.

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• void init (const char ∗memory_interface, xtsc::u32 width8=4, xtsc::u32 num_ports=1)

Do initialization common to both constructors.

• virtual const char ∗ kind () const

Return what kind of xtsc_parms this is (our C++ type).

7.186.1 Detailed Description

Constructor parameters for a xtsc_xttlm2tlm2_transactor object.

Name Type Description

------------------ ---- --------------------------------------------------------

"memory_interface" char* The memory interface type. Valid values are "DRAM0",
"DRAM1", "DROM0", "IRAM0", "IRAM1", "IROM0", "URAM0",
"XLMI0", and "PIF" (case-insensitive).

"num_ports" u32 The number of Xtensa TLM (xttlm) port pairs this
transactor has as well as the number of TLM2 sockets
this transactor has.
Default = 1.
Minimum = 1.

"byte_width" u32 Bus width in bytes. Valid values are 4, 8, 16, 32, and
64. If byte_width is 32 or 64 then only READ and WRITE
requests are allowed. The exclusive-to-PIF transactions
(BLOCK_READ, BURST_READ, RCW, BLOCK_WRITE, and
BURST_WRITE) are only allowed if byte_width is 4|8|16.

"request_fifo_depth" u32 The request fifo depth. A value of 0 means to not use
a request fifo which causes the incoming request channel
to be blocked as soon as one request is accepted until
that request is completed.
If "use_nb_transport" is true, then "request_fifo_depth"
must be non-zero.
Default = 1.

"max_burst_beats" u32 This parameter specifies the maximum number of transfers

(beats) that will be allowed on PIF BURST_READ or
BURST_WRITE transactions. The original PIF Protocol 3.1
allowed up to 8 transfers. The enhanced PIF burst of
Xtensa iDMA hardware in RG-2017.8 and later allowed up
to 16 transfers.
Default = 8.

"use_nb_transport" bool If false, then b_transport() will be used which means

each request on a given port is handled one-at-a-time
to completion. If true, then nb_transport_fw() will be
used to send requests downstream which allows for
multiple requests per port to be downstream at the same

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time.
If "use_nb_transport" is true, then "immediate_timing"
must be false and "request_fifo_depth" must be non-zero.
Default = false.

"turbo_switch" bool When "use_nb_transport" is true, then this parameter can

be set to true to indicate that this transactor will use
nb_transport when the cycle-accurate ISS is active but
will use b_transport when TurboXim is active. When
"use_nb_transport" is false, then this parameter must
also be false.
Default = false.

"revoke_on_dmi_hint" bool If both "turbo_switch" and "revoke_on_dmi_hint" are

true, then TurboXim fast access will be revoked for the
address range of any transaction that returns from
b_transport() with a DMI hint, that is if
tlm_generic_payload::is_dmi_allowed() returns true.
When "turbo_switch" is false, then this parameter must
also be false.
Default = false.
Note: The "revoke_on_dmi_hint" parameter is an
experimental feature.

Note: A TLM2 transaction is considered a burst transfer transaction if the generic

payload data length attribute is greater then the BUSWIDTH template parameter
of the socket.

"use_tlm2_burst" bool If true, then a single TLM2 burst transfer transaction

will be used for BLOCK_READ, BURST_READ, BLOCK_WRITE,
and BURST_WRITE PIF transactions. If false, then
multiple non-burst TLM2 single transactions will be used
for these PIF transactions.
Caution: PIF protocol requires that the multiple
requests of BLOCK_WRITE and BURST_WRITE
transactions be integral (not be interspersed
with other requests). PIF 3 protocol requires
that the multiple responses of BLOCK_READ and
BURST_READ transactions be integral (not be
interspersed with other responses). If this
parameter is set to false then the user should
ensure that the downstream TLM2 subsystem can
preserve the integrity of the multiple request
sequence used for BLOCK_WRITE|BURST_WRITE and,
if PIF 3 is being used, the multiple response
sequence used for BLOCK_READ|BURST_READ.
Default = true.

"use_tlm2_busy" bool If true, then a TLM_INCOMPLETE_RESPONSE will be treated

as a busy signal (similar to RSP_NACC) and the TLM2
transport call will be repeated after a delay of
one clock period. If false, then an exception will
be thrown if a TLM_INCOMPLETE_RESPONSE is received.
This parameter only applies when using b_transport(),
if "use_nb_transport" is true, then "use_tlm2_busy"
is ignored.
Default = true.

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"rcw_support" u32 This parameter specifies how the model should support
the RCW transaction. The legal values and their meaning
are:
0 = Use the transport_dbg() interface.
Note: If this option is selected then RCW requests
may not have any disabled byte lanes.
1 = Use the b_transport() interface and throw an
exception if the read and write beats do not
occur at the same time and in the same delta cycle.
2 = Use the b_transport() interface and log a warning
if the read and write beats do not occur at the
same time and in the same delta cycle.
3 = Use the b_transport() interface and log at
INFO_LOG_LEVEL if the read and write beats do not
occur at the same time and in the same delta cycle.
Note: This model will make the read and write calls to
b_transport() back-to-back (without an intervening
wait() call) however, the downstream TLM2
sub-system might insert calls to wait() inside the
b_transport() call and this violates the atomicity
of the RCW sequence.
Caution: Options 2 and 3 are not recommended.
Caution: Option 0 is not recommended if the memory has
read/write side effects that transport_dbg()
won't trigger.
Default = 1.

"turbo_support" u32 This parameter specifies how the model should support
TurboXim fast access. The legal values and their
meaning are:
0 = Do not allow TurboXim fast access for load/store.
1 = Give TurboXim peek/poke fast access to all
addresses except those specified by
"deny_fast_access".
2 = Give TurboXim raw access to all addresses allowed
by the get_direct_mem_ptr() method except those
specified by "deny_fast_access".
Caution: Options 1 and 2 are not recommended if the
target memory has side effects.
Note: If TurboXim is denied fast access then it will use
non-fast access (XTSC:nb_request to
TLM2:b_transport) for loads and stores; however,
for IFetch it will use XTSC:nb_peek to
TLM2:transport_dbg.
Default = 2.

"deny_fast_access" vector<u32> A std::vector containing an even number of

addresses. Each pair of addresses specifies a range of
addresses that will be denied fast access. The first
address in each pair is the start address and the second
address in each pair is the end address. This parameter
is ignored if "turbo_support" is 0.

"immediate_timing" bool If true, the transactor attempts to interact with the

rest of the system without consuming any SystemC time or
delta cycles except as necessary to ensure responses are

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Chapter 7. Class Documentation

never sent to the upstream Xtensa TLM subsystem with

less then one clock period in between them and that
requests that get busied by the downstream OSCI TLM2
subsystem are only repeated after a wait of one clock
period. Also, the time argument returned in the
b_transport called is ignored. If false, the transactor
does a SystemC wait for a duration equal to the time
argument returned by each b_transport call. In
addition, each nb_request call takes one delta cycle to
notify worker_thread.
If "use_nb_transport" is true, then "immediate_timing"
must be false.
Default = false.

"clock_period" u32 This is the length of this transactor's clock period

expressed in terms of the SystemC time resolution
(from sc_get_time_resolution()). A value of
0xFFFFFFFF means to use the XTSC system clock period
(from xtsc_get_system_clock_period()). A value of 0
means one delta cycle.
Default = 0xFFFFFFFF (i.e. use the system clock period).

See also:
xtsc_xttlm2tlm2_transactor
xtsc::xtsc_parms

Definition at line 239 of file xtsc_xttlm2tlm2_transactor.h.

7.186.2 Constructor & Destructor Documentation

7.186.2.1 xtsc_xttlm2tlm2_transactor_parms (const char ∗ memory_interface =

"PIF", xtsc::u32 width8 = 4, xtsc::u32 num_ports = 1) [inline]

Constructor for an xtsc_xttlm2tlm2_transactor_parms object.

Parameters:
memory_interface The memory interface type. Valid values are "DRAM0", "DRAM1",
"DROM0", "IRAM0", "IRAM1", "IROM0", "URAM0", "XLMI0", and "PIF" (case-
insensitive).
width8 Memory data bus width in bytes.
num_ports The number of ports this transactor has.

Definition at line 254 of file xtsc_xttlm2tlm2_transactor.h.

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7.186.2.2 xtsc_xttlm2tlm2_transactor_parms (const xtsc::xtsc_core & core, const

char ∗ memory_interface, xtsc::u32 num_ports = 0)

Constructor for an xtsc_xttlm2tlm2_transactor_parms object based upon an xtsc_core ob-

ject and a named memory interface. This constructor will determine width8 and, optionally,
num_ports by querying the core object and then pass the values to the init() method. In
addition, the "clock_period" parameter will be set to match the core’s clock period. If de-
sired, after the xtsc_xttlm2tlm2_transactor_parms object is constructed, its data members
can be changed using the appropriate xtsc_parms::set() method before passing it to the
xtsc_xttlm2tlm2_transactor constructor.

Parameters:
core A reference to the xtsc_core object upon which to base the xtsc_xttlm2tlm2_-
transactor_parms.
memory_interface The memory interface type. Valid values are "DRAM0", "DRAM1",
"DROM0", "IRAM0", "IRAM1", "IROM0", "URAM0", "XLMI0", and "PIF" (case-
insensitive). Note: The core configuration must have the named memory inter-
face.
num_ports The number of ports this transactor has. If 0, the default, the number of
ports (1 or 2) will be inferred thusly: If memory_interface is a LD/ST unit 0 port
of a dual-ported core interface, and the core is dual-ported and has no CBox,
and if the 2nd port of the core has not been bound, then "num_ports" will be 2;
otherwise, "num_ports" will be 1.

The documentation for this class was generated from the following file:

• xtsc_xttlm2tlm2_transactor.h

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 Chapter 8. File Documentation

8. File Documentation

8.1 documentation.h File Reference

8.1.1 Detailed Description

Definition in file documentation.h.

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Chapter 8. File Documentation

8.2 xtsc.h File Reference

#include <xtsc/xtsc_types.h>
#include <ostream>
#include <string>
#include <set>
#include <vector>
#include <iomanip>
#include "xtensa-versions.h"
#include <xtsc/xtsc_exception.h>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_wire_write_if.h>
#include <xtsc/xtsc_mode_switch_if.h>
#include <log4xtensa/log4xtensa.h>
Include dependency graph for xtsc.h:

xtsc.h

ostream xtsc/xtsc_parms.h iomanip xtensa-versions.h xtsc/xtsc_exception.h xtsc/xtsc_wire_write_if.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h

string set vector map iostream stdexcept xtsc/xtsc_types.h

systemc

This graph shows which files directly or indirectly include this file:
xtsc.h

xtsc_request.h xtsc_lookup.h xtsc_lookup_driver.h xtsc_master_tlm2.h xtsc_mode_switch_if.h xtsc_queue.h xtsc_queue_consumer.h xtsc_queue_producer.h xtsc_wire.h xtsc_wire_source.h xtsc_lookup_pin.h xtsc_pin2tlm_lookup_transactor.h xtsc_queue_pin.h xtsc_tx_loader.h xtsc_wire_logic.h

xtsc_core.h xtsc_fast_access.h xtsc_response.h xtsc_mmio.h xtsc_memory_b.h

xtsc_module_pin_base.h xtsc_xttlm2tlm2_transactor.h xtsc_udma.h xtsc_router.h xtsc_slave.h xtsc_arbiter.h xtsc_memory_trace.h xtsc_tlm22xttlm_transactor.h xtsc_master.h xtsc_memory.h xtsc_memory_base.h xtsc_memory_tlm2.h

xtsc_pin2tlm_memory_transactor.h xtsc_tlm2pin_memory_transactor.h xtsc_dma_engine.h xtsc_cache.h xtsc_memory_pin.h

Classes

• class sc_unwind_exception
• class xtsc_initialize_parms
Configuration parameters for the call to xtsc_initialize().

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• class xtsc_switch_registration
Class for registering TurboXim simulation mode switching interfaces.

• class xtsc_signal_sc_bv_base
Pin-level signal for connecting to a TIE export state, TIE import wire, or system-level I/O of
xtsc_core.

• class xtsc_signal_sc_bv_base_floating
Floating signal for a capped (unused) TIE export state or import wire.

• class xtsc_signal_sc_uint_base
Pin-level signal for connecting certain pin-level memory ports.

• class xtsc_sc_out_sc_bv_base_adapter_base< W, T >

Base class for converting an sc_out<sc_bv_base> to sc_out<T>.

• class xtsc_sc_out_sc_bv_base_adapter< W, T >

User interface class for converting an sc_out<sc_bv_base> to sc_out<T>.

• class xtsc_sc_in_sc_bv_base_adapter_base< W, T >

Base class for converting an sc_in<T> to an sc_in<sc_bv_base>.

• class xtsc_sc_in_sc_bv_base_adapter< W, T >

User interface class for converting an sc_in<T> to an sc_in<sc_bv_base>.

• class xtsc_sc_out_sc_uint_base_adapter_base< W, T >

Base class for converting an sc_out<sc_uint_base> to sc_out<T>.

• class xtsc_sc_out_sc_uint_base_adapter< W, T >

User interface class for converting an sc_out<sc_uint_base> to sc_out<T>.

• class xtsc_sc_in_sc_uint_base_adapter_base< W, T >

Base class for converting an sc_in<T> to an sc_in<sc_uint_base>.

• class xtsc_sc_in_sc_uint_base_adapter< W, T >

User interface class for converting an sc_in<T> to an sc_in<sc_uint_base>.

• class xtsc_tlm2pin_wire_transactor_base< W, T >

Base class for converting an sc_out<xtsc_wire_write_if> to sc_out<T>.

• class xtsc_tlm2pin_wire_transactor< W, T >

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User interface class for connecting an sc_port<xtsc_wire_write_if> to an sc_out<T> or

an sc_signal<T>.

• class xtsc_pin2tlm_wire_transactor< W, T >

User interface class for connecting an sc_in<T> or an sc_signal<T> to an sc_-
export<xtsc_wire_write_if>.

• class xtsc_script_file
Utility class for handling a script-style file.

• class xtsc_command_handler_interface
Interface to be called by xtsc_dispatch_command().

• class xtsc_filter
The xtsc_filter class, in conjunction with the xtsc_filter_XXX() and xtsc_event_XXX() meth-
ods and the XTSC command facility, help support the system control and debug framework
in XTSC.

• class xtsc_resettable
Interface for objects which can be reset.

• class xtsc_connection_interface
This is the generic connection interface used to support plugin modules and the --connect
command in xtsc-run as well as the xtsc_connect() method in the XTSC core library.

• class xtsc_module
This composite interface combines the xtsc_connection_interface and xtsc_resettable in-
terfaces.

• class xtsc_plugin_interface
This interface is used to add plugin modules to an XTSC simulation.

• class XTSC_VERSION_INFO_STRING

Namespaces

• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

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Defines

• #define IEEE_1666_SYSTEMC 200703L

• #define NSPP 1
• #define XTSC_LOG_PREFIX(buf)
Macro to ensure a standard prefix to all XTSC log messages.

• #define XTSC_FATAL(logger, msg)

Macro for logging at the FATAL_LOG_LEVEL.

• #define XTSC_ERROR(logger, msg)

Macro for logging at the ERROR_LOG_LEVEL.

• #define XTSC_WARN(logger, msg)

Macro for logging at the WARN_LOG_LEVEL.

• #define XTSC_NOTE(logger, msg)

Macro for logging at the NOTE_LOG_LEVEL.

• #define XTSC_INFO(logger, msg)

Macro for logging at the INFO_LOG_LEVEL.

• #define XTSC_VERBOSE(logger, msg)

Macro for logging at the VERBOSE_LOG_LEVEL.

• #define XTSC_DEBUG(logger, msg)

Macro for logging at the DEBUG_LOG_LEVEL.

• #define XTSC_TRACE(logger, msg)

Macro for logging at the TRACE_LOG_LEVEL.

• #define XTSC_LOG(logger, level, msg)

This macro is used to log at a programmatic log level.

• #define SCP
• #define XTSC_REALQUOTE(a1) #a1
• #define XTSC_QUOTE(a1) XTSC_REALQUOTE(a1)
• #define XTSC_TOKEN_PASTER3_(a1, a2, a3) a1 ## a2 ## a3
• #define XTSC_TOKEN_PASTER_3(a1, a2, a3) XTSC_TOKEN_PASTER3_(a1, a2,
a3)
• #define XTSC_TOKEN_PASTER5_(a1, a2, a3, a4, a5) a1 ## a2 ## a3 ## a4 ## a5

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• #define XTSC_TOKEN_PASTER_5(a1, a2, a3, a4, a5) XTSC_TOKEN_PASTER5_-

(a1, a2, a3, a4, a5)
• #define XTSC_TOKEN_PASTER7_(a1, a2, a3, a4, a5, a6, a7) a1 ## a2 ## a3 ## a4
## a5 ## a6 ## a7
• #define XTSC_TOKEN_PASTER_7(a1, a2, a3, a4, a5, a6, a7) XTSC_TOKEN_-
PASTER7_(a1, a2, a3, a4, a5, a6, a7)
• #define XTSC_TOKEN_PASTER8_(a1, a2, a3, a4, a5, a6, a7, a8) a1 ## a2 ## a3
## a4 ## a5 ## a6 ## a7 ## a8
• #define XTSC_TOKEN_PASTER_8(a1, a2, a3, a4, a5, a6, a7, a8) XTSC_TOKEN_-
PASTER8_(a1, a2, a3, a4, a5, a6, a7, a8)
• #define XTSC_VERSION_INFO_XTENSATOOLS XTSC_TOKEN_PASTER_-
3(XtensaTools_, XTENSA_SWVERSION_NAME_IDENT, __)
• #define XTSC_VERSION_INFO_ARCH 32Bit__
• #define XTSC_VERSION_INFO_VENDOR Accellera__
• #define XTSC_VERSION_INFO_SYSTEMC_VERSION Unknown
• #define XTSC_VERSION_INFO_STRING

Typedefs

• typedef int Readme

typedef to indicate a dummy variable used to anchor doxygen documentation comments.

• typedef std::vector< std::pair< std::string, std::string > > xtsc_filter_table

Vector of key,value pairs constituting the main content of an xtsc_filter.

• typedef std::map< std::string, xtsc_port_type > xtsc_port_type_map

Map port names to their xtsc_port_type.

• typedef std::vector< std::string > xtsc_port_table

A table of port names.

• typedef xtsc_plugin_interface &(∗ xtsc_get_plugin_interface_t )()

The type of the method used by XTSC to get the plugin interface from the shared library.

Enumerations

• enum xtsc_port_type {
USER_DEFINED_PORT = 0,
DEBUG_PORT = 1,

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REQUEST_PORT = 2,
RESPOND_PORT = 3,
LOOKUP_PORT = 4,
QUEUE_PUSH_PORT = 5,
QUEUE_POP_PORT = 6,
WIRE_WRITE_PORT = 7,
WIRE_READ_PORT = 8,
TX_XFER_PORT = 9,
USER_DEFINED_OUTPUT = 16,
BOOL_OUTPUT = 17,
UINT_OUTPUT = 18,
WIDE_OUTPUT = 19,
USER_DEFINED_INITIATOR = 32,
INITIATOR_SOCKET_4 = 33,
INITIATOR_SOCKET_8 = 34,
INITIATOR_SOCKET_16 = 35,
INITIATOR_SOCKET_32 = 36,
INITIATOR_SOCKET_64 = 37,
conjugate_delta = 128,
USER_DEFINED_EXPORT = 128,
DEBUG_EXPORT = 129,
REQUEST_EXPORT = 130,
RESPOND_EXPORT = 131,
LOOKUP_EXPORT = 132,
QUEUE_PUSH_EXPORT = 133,
QUEUE_POP_EXPORT = 134,
WIRE_WRITE_EXPORT = 135,
WIRE_READ_EXPORT = 136,
TX_XFER_EXPORT = 137,
USER_DEFINED_INPUT = 144,
BOOL_INPUT = 145,
UINT_INPUT = 146,
WIDE_INPUT = 147,
USER_DEFINED_TARGET = 160,

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TARGET_SOCKET_4 = 161,
TARGET_SOCKET_8 = 162,
TARGET_SOCKET_16 = 163,
TARGET_SOCKET_32 = 164,
TARGET_SOCKET_64 = 165,
PORT_TABLE = 255 }
This enum specifies the conjugate port pairs that are supported by the generic connection
API (xtsc_connection_interface) and the generic connection method, xtsc_connect().

Functions

• XTSC_API bool xtsc_is_logging_configured ()

Return true if the logging facility (log4xtensa) has been configured.

• XTSC_API bool xtsc_pattern_match (const std::string &pattern, const std::string

&str)
Conveniece method to determine if a string matches a pattern.

• XTSC_API std::string xtsc_version ()

Return a string showing version information for the XTSC core library.

• XTSC_API void xtsc_set_system_clock_factor (u32 clock_factor, u32 posedge_-

factor=0)
Method to set the XTSC system clock period (SCP).

• XTSC_API u32 xtsc_get_system_clock_factor ()

This method returns the factor by which the SystemC time resolution is multiplied to deter-
mine the system clock period.

• XTSC_API void xtsc_initialize (const xtsc_initialize_parms &init_parms)

Initialize XTSC simulation.

• XTSC_API void xtsc_initialize (const char ∗text_logging_config_file=NULL, const

char ∗binary_logging_config_file=NULL)
Initialize XTSC simulation.

• XTSC_API xtsc_initialize_parms xtsc_get_xtsc_initialize_parms ()

Return a copy of the xtsc_initialize_parms used to initialize XTSC.

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• XTSC_API bool xtsc_is_initialized ()

Return true if xtsc_initialize has been called, else return false.

• XTSC_API void xtsc_finalize ()

This function should be called when simulation is over to ensure all resources are properly
released and all clients are properly finalized.

• XTSC_API void xtsc_reset_processes (std::vector< sc_core::sc_process_handle >

&process_handles)
This function can be called to reset each sc_process_handle in a vector.

• XTSC_API bool xtsc_set_call_sc_stop (bool call_sc_stop)

Set the flag that determines whether sc_stop() will be called when xtsc_finalize() is called.

• XTSC_API sc_core::sc_time xtsc_get_system_clock_period ()

This method returns the period of the conceptual system clock.

• XTSC_API sc_core::sc_time xtsc_get_system_clock_posedge_offset ()

Get the posedge offset of the conceptual system clock.

• XTSC_API void xtsc_wait (u32 num_periods=1)

This method waits the specified number of system clock periods.

• XTSC_API bool xtsc_is_big_endian_host ()

This method returns true if host processor is big endian, otherwise returns false.

• XTSC_API u64 xtsc_create_queue_ticket ()

This function returns a unique 64-bit number that can be associate with a new element
when it is added to a queue.

• XTSC_API void xtsc_fire_turboxim_event_id (u32 turboxim_event_id)

Fire (that is, signal or notify) the specified TurboXim event id.

• XTSC_API void xtsc_set_relaxed_simulation_barrier (const sc_core::sc_time

&delta)
This method is used to set an absolute time barrier for use by modules operating in fast
functional mode.

• XTSC_API sc_core::sc_time xtsc_get_relaxed_simulation_barrier ()

This method returns the absolute simulation time barrier beyond which modules should
cease running ahead of the current SystemC simulation time when in fast functional mode.

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• XTSC_API void xtsc_set_relaxed_simulation_interval (const sc_core::sc_time &inter-

val)
Set the amount of "equivalent time" that a module is allowed to run ahead of the actual
SystemC simulation time when operating in fast functional mode.

• XTSC_API sc_core::sc_time xtsc_get_relaxed_simulation_interval (void)

Get the amount of "equivalent time" that a module is allowed to run ahead of the actual
SystemC simulation time when operating in fast functional mode as set by the xtsc_set_-
relaxed_simulation_interval() method.

• XTSC_API sc_core::sc_time xtsc_get_remaining_relaxed_simulation_time (void)

This method returns the maximum amount of time that a module may run ahead of the
current SystemC simulation time.

• XTSC_API void xtsc_user_state_dump (std::ostream &os, const std::string &pat-

tern="")
Dump the name-value pairs (optionally limited to pattern) in the user-defined state map to
the specified ostream object.

• XTSC_API std::string xtsc_user_state_get (const std::string &name)

Get the value associated with the specified name in the user-defined state map.

• XTSC_API void xtsc_user_state_set (const std::string &name, const std::string

&value)
Add or replace a name-value pair in the user-defined state map.

• XTSC_API bool xtsc_trap_port_binding_failures (bool trap)

This is needed for when XTSC is being used with some commercial SystemC simulators.

• XTSC_API log4xtensa::LogLevel xtsc_set_constructor_log_level

(log4xtensa::LogLevel log_level)
This method sets the log level for constructor logging.

• XTSC_API log4xtensa::LogLevel xtsc_get_constructor_log_level ()

Get the current log level for constructor logging.

• XTSC_API bool xtsc_is_text_logging_enabled ()

Return value set by xtsc_enable_text_logging().

• XTSC_API bool xtsc_enable_text_logging (bool enable_logging=true)

Turn text logging on or off for XTSC_INFO and lower.

• XTSC_API void xtsc_set_text_logging_time_precision (u32 num_decimal_digits)

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Set number of digits after decimal point used when logging simulation time.

• XTSC_API u32 xtsc_get_text_logging_time_precision ()

Get number of digits after decimal point used when logging simulation time.

• XTSC_API void xtsc_set_text_logging_time_width (u32 num_characters)

Set total number of characters used when logging simulation time.

• XTSC_API u32 xtsc_get_text_logging_time_width ()

Get total number of characters used when logging simulation time.

• XTSC_API void xtsc_set_text_logging_delta_cycle_digits (u32 num_digits)

Set the number of least-significant decimal digits of the delta cycle count to be displayed
when logging.

• XTSC_API u32 xtsc_get_text_logging_delta_cycle_digits ()

Get the number of least-significant decimal digits of the delta cycle count to be displayed
when logging.

• XTSC_API std::string & xtsc_log_delta_cycle (std::string &buf)

Put the formatted delta cycle count into string reference buf and return it.

• XTSC_API void xtsc_dump_text_loggers (std::ostream &os=std::cout)

Dump currently registered text loggers.

• XTSC_API bool xtsc_set_hex_dump_left_to_right (bool left_to_right)

This method sets the flag that determines the order in which data is dumped by the xtsc_-
hex_dump(u32, const u8 ∗, ostream&) method.

• XTSC_API bool xtsc_get_hex_dump_left_to_right ()

This method returns the flag that determines the order in which data is dumped by the
xtsc_hex_dump(u32, const u8 ∗, ostream&) method.

• XTSC_API void xtsc_hex_dump (u32 size8, const u8 ∗buffer, std::ostream

&os=std::cout)
This method dumps the specified number of bytes from the data buffer in hex format (two
hex nibbles and a space for each byte in the buffer).

• XTSC_API void xtsc_hex_dump (bool left_to_right, u32 size8, const u8 ∗buffer,

std::ostream &os=std::cout, u32 bytes_per_line=0, bool show_address=false,
u32 start_byte_address=0x0, bool show_hex_values=true, bool do_column_-
heading=false, bool show_ascii_values=false, u32 initial_skipped_bytes=0)
This method dumps the specified number of bytes from the data buffer.

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• XTSC_API void xtsc_strtostrvector (const std::string &str, std::vector< std::string >

&vec, char sep= ’,’, const std::string &whitespace=" \t")
Utility method to convert a string of comma-separated values to a vector<string> with
leading/trailing whitespace removed.

• XTSC_API void xtsc_strtou32vector (const std::string &str, std::vector< u32 > &vec)

Utility method to convert a string of comma-separated values to a vector<u32> (or throw

xtsc_exception).

• XTSC_API u32 xtsc_strtou32 (const std::string &str)

Utility method to convert a string to a u32 (or throw xtsc_exception).

• XTSC_API u64 xtsc_strtou64 (const std::string &str)

Utility method to convert a string to a u64 (or throw xtsc_exception).

• XTSC_API i32 xtsc_strtoi32 (const std::string &str)

Utility method to convert a string to a i32 (or throw xtsc_exception).

• XTSC_API double xtsc_strtod (const std::string &str)

Utility method to convert a string to a double (or throw xtsc_exception).

• XTSC_API u32 xtsc_ceiling_log2 (u32 value)

Utility method to find log2 of a value rounded up.

• XTSC_API std::string xtsc_zero_extend_array_indices (const std::string &str)

Utility method to return a string which matches the input string except that bracketed array
indices containing less then 10 decimal digits, if any, will be zero-extended to 10 digits so
as to be suitable for sorting in a situation where it is desired that, for example, "foo[10]’
comes after "foo[9]" instead of after "foo[1].

• XTSC_API void xtsc_add_lua_script_file (const std::string &lua_script_file)

Run the specified Lua script file in its own SystemC thread process.

• XTSC_API std::string xtsc_get_user_name (const std::string &name, const std::string

&kind, const std::string &unknown="UNKNOWN_COWBOY")
Utility method to get the current user name.

• XTSC_API u8 ∗ xtsc_get_shared_memory (const std::string &sm_name, u64 num_-

bytes, const std::string &name, const std::string &kind, xtsc_address base_-
address=0x00000000)
Utility method to get a pointer to host OS shared memory.

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• XTSC_API void xtsc_byte_array_to_sc_unsigned (const xtsc::u8 ∗buf, sc_dt::sc_-

unsigned &value)
Utility method to convert a raw byte array to an existing sc_unsigned.

• XTSC_API void xtsc_sc_unsigned_to_byte_array (const sc_dt::sc_unsigned &value,

xtsc::u8 ∗buf)
Utility method to convert an sc_unsigned to an existing raw byte array.

• XTSC_API void xtsc_register_mode_switch_interface (const xtsc::xtsc_switch_-

registration &registration)
Registration function for registering TurboXim simulation mode switching interfaces.

• XTSC_API void xtsc_get_registered_mode_switch_interfaces (std::vector<

xtsc::xtsc_switch_registration > &ifs)
Fill a vector will all of the registered switch groups.

• XTSC_API void xtsc_switch_sim_mode (xtsc::xtsc_sim_mode mode)

Switch all modules in all switch groups that have registered a simulation mode switching
interface.

• XTSC_API bool xtsc_prepare_to_switch_sim_mode (xtsc::xtsc_sim_mode mode)

Polling-based dynamic simulation switching preparation.

• XTSC_API u32 xtsc_compute_fast_access_swizzle (const u32 ∗buf)

Compute the swizzle value from memory storage.

• XTSC_API char ∗ xtsc_dirname (char ∗path)

Get the portion of the path before the last path separator.

• XTSC_API char ∗ xtsc_basename (char ∗path)

Get the portion of the path after the last path separator.

• XTSC_API std::string xtsc_get_absolute_directory (const std::string &directory)

Utility function to get the absolute path of an existing directory.

• XTSC_API std::string xtsc_get_absolute_path (const std::string &file_name)

Utility function to get the absolute path of the directory containing an existing file.

• XTSC_API std::string xtsc_get_absolute_path_and_name (const std::string &file_-

name)
Utility function to get the absolute path and file name of an existing file.

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• XTSC_API void ∗ xtsc_load_library (const std::string &library_name, bool add_-

library_extension, const std::string &symbol_name)
Utility function to load a shared library (Linux shared object, MS Windows DLL) and then
get and return the address of a symbol in the library.

• XTSC_API void xtsc_log_multiline (log4xtensa::TextLogger &logger,

log4xtensa::LogLevel log_level, const std::string &msg, u32 indent=0)
This function splits up a multi-line message into multiple calls to the TextLogger::log()
method (one call per line).

• XTSC_API bool xtsc_parse_port_name (const std::string &full_name, std::string

&port_name, u32 &port_index)
This utility function parses a optionally-indexed port name into a name portion and and
index.

• XTSC_API bool xtsc_is_valid_identifier (const std::string &name)

This utility function can be used to determine if a string is a valid C/C++ identifier.

• XTSC_API char ∗ xtsc_copy_c_str (const char ∗str)

This utility function safely copies a c-string (char ∗).

• XTSC_API char ∗∗ xtsc_copy_c_str_array (const char ∗const ∗str_array)

This utility function safely copies an array of c-strings (char ∗∗).

• XTSC_API void xtsc_delete_c_str (char ∗&str)

This utility function deletes a c-string and then sets the pointer to NULL.

• XTSC_API void xtsc_delete_c_str_array (char ∗∗&str_array)

This utility function deletes an array of c-strings (char ∗∗).

• XTSC_API void xtsc_dump_systemc_objects (std::ostream &os=std::cout, const

std::string &name_pattern="∗", const std::string &kind_pattern="∗")
Dump a list of SystemC objects.

• XTSC_API void xtsc_register_command (sc_core::sc_object &object, xtsc_-

command_handler_interface &handler, const std::string &cmd, xtsc::u32 min_args,
xtsc::u32 max_args, const std::string &format, const std::string &man)
Method to register a command with the XTSC command facility.

• XTSC_API void xtsc_unregister_command (sc_core::sc_object &object, const

std::string &cmd)
Method to unregister a command with the XTSC command facility.

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• XTSC_API bool xtsc_dispatch_command (const std::string &cmd_line, std::ostream

&result=std::cout, bool echo_comment=true, const std::string &format_msg="", const
std::string &post_help="", const std::string &post_man="")
Method to dispatch an XTSC command line.

• XTSC_API bool xtsc_command_argtobool (const std::string &cmd_line, const

std::vector< std::string > &words, xtsc::u32 argument)
This convenience method is for use by the xtsc_command_handler_interface::execute()
method to make it easy to convert an argument to a bool value or to throw a meaningful
exception if this cannot be done.

• XTSC_API xtsc::i32 xtsc_command_argtoi32 (const std::string &cmd_line, const

std::vector< std::string > &words, xtsc::u32 argument)
This convenience method is for use by the xtsc_command_handler_interface::execute()
method to make it easy to convert an argument to a i32 value or to throw a meaningful
exception if this cannot be done.

• XTSC_API xtsc::u32 xtsc_command_argtou32 (const std::string &cmd_line, const

std::vector< std::string > &words, xtsc::u32 argument)
This convenience method is for use by the xtsc_command_handler_interface::execute()
method to make it easy to convert an argument to a u32 value or to throw a meaningful
exception if this cannot be done.

• XTSC_API xtsc::u64 xtsc_command_argtou64 (const std::string &cmd_line, const

std::vector< std::string > &words, xtsc::u32 argument)
This convenience method is for use by the xtsc_command_handler_interface::execute()
method to make it easy to convert an argument to a u64 value or to throw a meaningful
exception if this cannot be done.

• XTSC_API double xtsc_command_argtod (const std::string &cmd_line, const

std::vector< std::string > &words, xtsc::u32 argument)
This convenience method is for use by the xtsc_command_handler_interface::execute()
method to make it easy to convert an argument to a double value or to throw a meaningful
exception if this cannot be done.

• XTSC_API std::string xtsc_command_remainder (const std::string &cmd_line,

xtsc::u32 word)
This convenience method is for use by the xtsc_command_handler_interface::execute()
method to make it easy to get the remainder of the command line after and including the
specified word.

• XTSC_API void xtsc_command_throw (const std::string &cmd_line, const std::string

&error_msg)

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This convenience method is for use by the xtsc_command_handler_interface::execute()

method to make it slightly easier to throw a meaningful exception.

• XTSC_API std::string xtsc_event_register (sc_core::sc_event &event, const

std::string &base_name, sc_core::sc_object ∗p_object=NULL)
Register an sc_event with XTSC and give it a name in SystemC 2.2.

• XTSC_API bool xtsc_event_exists (const std::string &event_name)

This method returns true if the named sc_event was registered with XTSC (SystemC 2.2)
or if it exists as a hierarchically-named event (SystemC 2.3).

• XTSC_API sc_core::sc_event & xtsc_event_get (const std::string &event_name)

This method returns the named sc_event.

• XTSC_API void xtsc_event_dump (std::ostream &os=std::cout, const std::string

&pattern="∗")
This method dumps a list of all events registered with XTSC (SystemC 2.2) or that are
hierarchically-named events (SystemC 2.3).

• XTSC_API xtsc_host_mutex ∗ xtsc_host_mutex_open (const std::string &name)

This method opens a named, recursive mutex and returns a handle to it.

• XTSC_API void xtsc_host_mutex_lock (xtsc_host_mutex ∗p_mutex)

This method does a recursive lock on the specified mutex.

• XTSC_API bool xtsc_host_mutex_try_lock (xtsc_host_mutex ∗p_mutex, u64 millisec-

onds=0)
This method attempts a recursive lock with a timeout as specified in milliseconds on the
specified mutex.

• XTSC_API void xtsc_host_mutex_unlock (xtsc_host_mutex ∗p_mutex)

This method does a recursive unlock on the specified mutex.

• XTSC_API void xtsc_host_mutex_close (xtsc_host_mutex ∗p_mutex)

This method closes the specified mutex.

• XTSC_API u64 xtsc_host_milliseconds ()

This method returns the number of milliseconds of wall time since some unspecified begin-
ning time.

• XTSC_API void xtsc_host_sleep (u64 milliseconds=0)

This method causes a host OS sleep for the specified number of milliseconds.

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• XTSC_API u32 xtsc_get_next_watchfilter_number ()

Return a unique 32-bit number suitable for use as watchfilter number.

• XTSC_API void xtsc_filter_kind_register (const std::string &kind, const std::set<

std::string > &keys, const std::set< std::string > &range_keys)
Method to register a new xtsc_filter kind.

• XTSC_API void xtsc_filter_kind_dump (const std::string &kind="", std::ostream

&os=std::cout)
Method to dump the list of keys of a specific xtsc_filter kind or to dump a list of all registered
xtsc_filter kinds.

• XTSC_API bool xtsc_filter_exists (const std::string &name)

Method to determine if an xtsc_filter of a given name exists.

• XTSC_API const xtsc_filter & xtsc_filter_create (const std::string &kind, const

std::string &name, const xtsc_filter_table &key_value_pairs)
Method to create an xtsc_filter of the specified kind with the specified name.

• XTSC_API void xtsc_filter_dump (const std::string &kind="", const std::string

&name="", std::ostream &os=std::cout)
Method to dump a list of filters of the specified kind or to dump the key-value pairs of a
specific named xtsc_filter.

• XTSC_API const xtsc_filter & xtsc_filter_get (const std::string &name)

Method to get a reference to the xtsc_filter object specified by name.

• XTSC_API bool xtsc_filter_apply_xtsc_peek (const std::string &name, xtsc::u32 port,

xtsc::xtsc_address address, xtsc::u32 size, const xtsc::u8 ∗buffer)
Convenience method to a apply an xtsc_filter of kind xtsc_peek to an nb_peek payload.

• XTSC_API bool xtsc_filter_apply_xtsc_poke (const std::string &name, xtsc::u32 port,

xtsc::xtsc_address address, xtsc::u32 size, const xtsc::u8 ∗buffer)
Convenience method to a apply an xtsc_filter of kind xtsc_poke to an nb_poke payload.

• XTSC_API bool xtsc_filter_apply_xtsc_request (const std::string &name, xtsc::u32

port, const xtsc_request &request)
Convenience method to apply an xtsc_filter of kind xtsc_request to an nb_request payload.

• XTSC_API bool xtsc_filter_apply_xtsc_response (const std::string &name, xtsc::u32

port, const xtsc_response &response)
Convenience method to a apply an xtsc_filter of kind xtsc_response to an nb_respond
payload.

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• XTSC_API u32 xtsc_reset (bool hard_reset)

This method calls xtsc_resettable::reset(hard_reset) on all objects of type xtsc_resettable.

• XTSC_API std::string xtsc_get_port_type_name (xtsc_port_type port_type, bool

bare=false)
Return a string showing the C++ type of the port.

• XTSC_API bool xtsc_are_conjugate_port_types (xtsc_port_type type1, xtsc_port_-

type type2)
Returns true if the two xtsc_port_type values correspond to conjugate port pairs.

• XTSC_API bool xtsc_is_user_defined_port_type (xtsc_port_type port_type)

Returns true if the specified port type is a user-defined type.

• XTSC_API bool xtsc_is_xttlm_port_type (xtsc_port_type port_type)

Returns true if the interface associated with the specified port type is an Xtensa TLM inter-
face.

• XTSC_API bool xtsc_is_tlm2_port_type (xtsc_port_type port_type)

Returns true if the interface associated with the specified port type is an OSCI TLM2 inter-
face.

• XTSC_API bool xtsc_is_pin_level_port_type (xtsc_port_type port_type)

Returns true if the specified port type is a pin-level port type (sc_out<> or sc_in<>).

• XTSC_API void xtsc_confirm_conjugate_user_defined_port_types (xtsc_-

connection_interface &instance_a, const std::string &port_a, const std::string
&port_b, xtsc_connection_interface &instance_b)
This method will throw an exception if the two specified ports are not conjugate user-defined
port types.

• XTSC_API bool xtsc_port_type_check (xtsc_port_type port_type, sc_core::sc_object

∗p_port)
Determine if the specified sc_object is of the specified xtsc_port_type.

• XTSC_API xtsc::u32 xtsc_connect (xtsc_connection_interface &instance_a, const

std::string &port_a, const std::string &port_b, xtsc_connection_interface &instance_-
b)
This method can be used to connect two modules using named ports (or port tables) from
each module.

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Variables
• Readme xtsc_text_logging_macros
Summary of macros to disable or to do text logging.

• Readme sc_command_handler_commands
The following commands are supported by the global XTSC command handler called sc.

• Readme xtsc_command_handler_commands
The following commands are supported by the global XTSC command handler called xtsc.

8.2.1 Detailed Description

See also:
xtsc_text_logging_macros

Definition in file xtsc.h.

8.2.2 Define Documentation

8.2.2.1 #define XTSC_LOG_PREFIX(buf)

Value:
std::setprecision(xtsc::xtsc_get_text_logging_time_precision()) \
<< std::fixed \
<< std::setw(xtsc::xtsc_get_text_logging_time_width())
\
<< (sc_core::sc_time_stamp() /
xtsc::xtsc_get_system_clock_period()) \
<< xtsc::xtsc_log_delta_cycle(buf) \
<< ": "

Macro to ensure a standard prefix to all XTSC log messages. Note: This macro was
changed with the RD-2011.1 release to require the user to provide a non-const string buffer.
See xtsc_log_delta_cycle().

See also:
xtsc_set_text_logging_time_precision()
xtsc_set_text_logging_time_width()
xtsc_set_system_clock_factor()
xtsc_set_text_logging_delta_cycle_digits()

Definition at line 226 of file xtsc.h.

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8.2.2.2 #define XTSC_FATAL(logger, msg)

Value:

do { \
std::string buf; \
if (xtsc::xtsc_is_logging_configured())
{ \
LOG4XTENSA_FATAL (logger,
XTSC_LOG_PREFIX(buf) << msg); \
} \
else { \
std::cerr << "FATAL: " <<
XTSC_LOG_PREFIX(buf) << msg << std::endl; \
} \
} while (false)

Macro for logging at the FATAL_LOG_LEVEL. Note: calling this macro does not cause your
program to terminate.

Parameters:
logger A reference to a TextLogger object.
msg The message to log. msg can be any text acceptable to the ostringstream left-
shift operator.

Definition at line 246 of file xtsc.h.

8.2.2.3 #define XTSC_ERROR(logger, msg)

Value:

do { \
std::string buf; \
if (xtsc::xtsc_is_logging_configured())
{ \
LOG4XTENSA_ERROR (logger,
XTSC_LOG_PREFIX(buf) << msg); \
} \
else { \
std::cerr << "ERROR: " <<
XTSC_LOG_PREFIX(buf) << msg << std::endl; \
} \
} while (false)

Macro for logging at the ERROR_LOG_LEVEL.

Parameters:
logger A reference to a TextLogger object.

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msg The message to log. msg can be any text acceptable to the ostringstream left-
shift operator.

Definition at line 273 of file xtsc.h.

8.2.2.4 #define XTSC_WARN(logger, msg)

Value:

do { \
std::string buf; \
if (xtsc::xtsc_is_logging_configured())
{ \
LOG4XTENSA_WARN (logger,
XTSC_LOG_PREFIX(buf) << msg); \
} \
else { \
std::cerr << "WARN: " <<
XTSC_LOG_PREFIX(buf) << msg << std::endl; \
} \
} while (false)

Macro for logging at the WARN_LOG_LEVEL.

Parameters:
logger A reference to a TextLogger object.
msg The message to log. msg can be any text acceptable to the ostringstream left-
shift operator.

Definition at line 300 of file xtsc.h.

8.2.2.5 #define XTSC_NOTE(logger, msg)

Value:

do { \
std::string buf; \
if (xtsc::xtsc_is_logging_configured())
{ \
LOG4XTENSA_NOTE (logger,
XTSC_LOG_PREFIX(buf) << msg); \
} \
else { \
std::cout << "NOTE: " <<
XTSC_LOG_PREFIX(buf) << msg << std::endl; \
} \
} while (false)

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Macro for logging at the NOTE_LOG_LEVEL.

Parameters:
logger A reference to a TextLogger object.
msg The message to log. msg can be any text acceptable to the ostringstream left-
shift operator.

Definition at line 327 of file xtsc.h.

8.2.2.6 #define XTSC_INFO(logger, msg)

Value:
do { if (xtsc::xtsc_is_text_logging_enabled()) \
{ std::string buf; LOG4XTENSA_INFO (log
ger, XTSC_LOG_PREFIX(buf) << msg); } \
} while (false)

Macro for logging at the INFO_LOG_LEVEL.

Parameters:
logger A reference to a TextLogger object.
msg The message to log. msg can be any text acceptable to the ostringstream left-
shift operator.

Definition at line 354 of file xtsc.h.

Referenced by output_definition::complement_output(), and output_definition::drive().

8.2.2.7 #define XTSC_VERBOSE(logger, msg)

Value:
do { if (xtsc::xtsc_is_text_logging_enabled()) \
{ std::string buf; LOG4XTENSA_VERBOSE(log
ger, XTSC_LOG_PREFIX(buf) << msg); } \
} while (false)

Macro for logging at the VERBOSE_LOG_LEVEL.

Parameters:
logger A reference to a TextLogger object.
msg The message to log. msg can be any text acceptable to the ostringstream left-
shift operator.

Definition at line 371 of file xtsc.h.

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8.2.2.8 #define XTSC_DEBUG(logger, msg)

Value:

do { if (xtsc::xtsc_is_text_logging_enabled()) \
{ std::string buf; LOG4XTENSA_DEBUG (log
ger, XTSC_LOG_PREFIX(buf) << msg); } \
} while (false)

Macro for logging at the DEBUG_LOG_LEVEL.

Parameters:
logger A reference to a TextLogger object.
msg The message to log. msg can be any text acceptable to the ostringstream left-
shift operator.

Definition at line 388 of file xtsc.h.

8.2.2.9 #define XTSC_TRACE(logger, msg)

Value:

do { if (xtsc::xtsc_is_text_logging_enabled()) \
{ std::string buf; LOG4XTENSA_TRACE (log
ger, XTSC_LOG_PREFIX(buf) << msg); } \
} while (false)

Macro for logging at the TRACE_LOG_LEVEL.

Parameters:
logger A reference to a TextLogger object.
msg The message to log. msg can be any text acceptable to the ostringstream left-
shift operator.

Definition at line 405 of file xtsc.h.

8.2.2.10 #define XTSC_LOG(logger, level, msg)

Value:

do { \
if ((xtsc::xtsc_is_text_logging_enabled() || (level >= log4xtensa::NOTE_LOG_LEV
EL)) && logger.isEnabledFor(level)) { \
std::string buf; \

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log4xtensa::tostringstream _xtsc_buf; \
_xtsc_buf << XTSC_LOG_PREFIX(buf) << msg; \
logger.forcedLog(level, _xtsc_buf.str(), __FILE__, __LINE__); \
} \
else if (level == log4xtensa::NOTE_LOG_LEVEL) { \
std::string buf; \
std::cout << "NOTE: " << XTSC_LOG_PREFIX(buf) << msg << std::endl; \
} \
else if (level > log4xtensa::NOTE_LOG_LEVEL) { \
std::string buf; \
std::cerr << ((level >= log4xtensa::FATAL_LOG_LEVEL) ? "FATAL: " : (level >=
log4xtensa::ERROR_LOG_LEVEL) ? "ERROR: " : "WARN: ");\
std::cerr << XTSC_LOG_PREFIX(buf) << msg << std::endl; \
} \
} while (false)

This macro is used to log at a programmatic log level.

Definition at line 416 of file xtsc.h.

8.2.2.11 #define XTSC_VERSION_INFO_STRING

Value:

XTSC_TOKEN_PASTER_8(xtsc_version_info__, \
XTSC_VERSION_INFO_XTENSATOOL
S, \
XTSC_VERSION_INFO_COMPILER,
\
XTSC_VERSION_INFO_TARGET,
\
XTSC_VERSION_INFO_ARCH,
\
XTSC_VERSION_INFO_VENDOR,
\
XTSC_VERSION_INFO_SYSTEMC_VE
RSION, \
__end)

Definition at line 5934 of file xtsc.h.

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8.3 xtsc_address_range_entry.h File Reference

#include <xtsc/xtsc_types.h>
Include dependency graph for xtsc_address_range_entry.h:

xtsc_address_range_entry.h

xtsc/xtsc_types.h

systemc

This graph shows which files directly or indirectly include this file:

xtsc_address_range_entry.h

xtsc_arbiter.h xtsc_router.h xtsc_memory_trace.h

Classes

• class xtsc_address_range_entry
Address-range to port-number association (for example, a routing table entry).

Namespaces

• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

Functions

• XTSC_API std::ostream & operator<< (std::ostream &os, const xtsc_address_-

range_entry &entry)

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8.3.1 Detailed Description

Definition in file xtsc_address_range_entry.h.

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8.4 xtsc_arbiter.h File Reference

#include <xtsc/xtsc_request_if.h>
#include <xtsc/xtsc_respond_if.h>
#include <xtsc/xtsc_fast_access.h>
#include <xtsc/xtsc_request.h>
#include <xtsc/xtsc_response.h>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_address_range_entry.h>
#include <vector>
#include <deque>
Include dependency graph for xtsc_arbiter.h:

xtsc_arbiter.h

xtsc/xtsc_response.h deque

xtsc/xtsc_respond_if.h cstring xtsc/xtsc_request.h xtsc/xtsc_fast_access.h

xtsc/xtsc_address_range_entry.h xtsc/xtsc_request_if.h xtsc/xtsc.h

xtsc/xtsc_wire_write_if.h ostream xtsc/xtsc_exception.h iomanip xtensa-versions.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h xtsc/xtsc_parms.h

xtsc/xtsc_types.h stdexcept iostream string map set vector

systemc

Classes
• class xtsc_arbiter_parms
Constructor parameters for a xtsc_arbiter object.

• class xtsc_arbiter
A memory interface arbiter and/or address translator.

• class xtsc_request_if_impl
Implementation of xtsc_request_if.

• class xtsc_respond_if_impl
Implementation of xtsc_respond_if.

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• class request_info
Information about each request.

• class response_info
Information about each response.

• class req_rsp_info
Information for PIF width converter (PWC) mode.

• class port_policy_info
Information from "arbitration_policy" for arbitrate_policy().

Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

8.4.1 Detailed Description

Definition in file xtsc_arbiter.h.

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8.5 xtsc_cache.h File Reference

#include <xtsc/xtsc_memory.h>
Include dependency graph for xtsc_cache.h:

xtsc_cache.h

xtsc/xtsc_memory.h

xtsc/xtsc_memory_b.h xtsc/xtsc_response.h

xtsc/xtsc_respond_if.h xtsc/xtsc_request.h cstring

xtsc/xtsc_request_if.h xtsc/xtsc.h

ostream xtsc/xtsc_wire_write_if.h xtsc/xtsc_exception.h iomanip xtensa-versions.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h xtsc/xtsc_parms.h

xtsc/xtsc_types.h stdexcept iostream string map set vector

systemc

Classes

• class xtsc_cache_parms
Constructor parameters for an xtsc_cache object.

• class xtsc_cache
This class implements an XTSC model of a typical cache module.

• struct line_info
Cache line data structure.

• class xtsc_respond_if_impl
Implementation of xtsc_respond_if.

Namespaces

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

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8.5.1 Detailed Description

Definition in file xtsc_cache.h.

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 Chapter 8. File Documentation

8.6 xtsc_core.h File Reference

#include <xtsc/xtsc.h>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_request_if.h>
#include <xtsc/xtsc_respond_if.h>
#include <xtsc/xtsc_tx_xfer_if.h>
#include <xtsc/xtsc_queue_push_if.h>
#include <xtsc/xtsc_queue_pop_if.h>
#include <xtsc/xtsc_wire_write_if.h>
#include <xtsc/xtsc_wire_read_if.h>
#include <xtsc/xtsc_lookup_if.h>
#include <string>
#include <set>
#include <vector>
#include <cstring>
Include dependency graph for xtsc_core.h:

xtsc_core.h

xtsc/xtsc.h xtsc/xtsc_lookup_if.h xtsc/xtsc_respond_if.h xtsc/xtsc_tx_xfer_if.h xtsc/xtsc_queue_push_if.h xtsc/xtsc_queue_pop_if.h xtsc/xtsc_wire_read_if.h cstring

xtensa-versions.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h ostream iomanip xtsc/xtsc_parms.h xtsc/xtsc_exception.h xtsc/xtsc_wire_write_if.h xtsc/xtsc_request_if.h

string vector map iostream stdexcept set xtsc/xtsc_types.h

systemc

This graph shows which files directly or indirectly include this file:

xtsc_core.h

xtsc_module_pin_base.h xtsc_udma.h xtsc_xttlm2tlm2_transactor.h

xtsc_memory_pin.h xtsc_pin2tlm_memory_transactor.h xtsc_tlm2pin_memory_transactor.h

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Chapter 8. File Documentation

Classes
• class xtsc_core_parms
Constructor parameters for a xtsc_core object.

• class xtsc_core
A Tensilica core Instruction Set Simulator (ISS).

Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

Functions
• XTSC_API xtsc_core::memory_port & operator++ (xtsc_core::memory_port &port)
Prefix operator++ used to iterate memory_port.

• XTSC_API xtsc_core::memory_port & operator++ (xtsc_core::memory_port &port,

int)
Postfix operator++ used to iterate memory_port.

• XTSC_API xtsc_core::memory_port & operator+= (xtsc_core::memory_port &port,

int i)
Operator += for memory_port.

• XTSC_API xtsc_core::memory_port operator+ (xtsc_core::memory_port &port, int i)

Operator + for memory_port.

8.6.1 Detailed Description

Definition in file xtsc_core.h.

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8.7 xtsc_dma_engine.h File Reference

#include <xtsc/xtsc_memory.h>
#include "xtsc/xtsc_dma_request.h"
#include <deque>
Include dependency graph for xtsc_dma_engine.h:

xtsc_dma_engine.h

xtsc/xtsc_memory.h xtsc/xtsc_dma_request.h deque

xtsc/xtsc_memory_b.h xtsc/xtsc_response.h

xtsc/xtsc_respond_if.h xtsc/xtsc_request.h cstring

xtsc/xtsc_request_if.h xtsc/xtsc.h

ostream xtsc/xtsc_wire_write_if.h xtsc/xtsc_exception.h iomanip xtensa-versions.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h xtsc/xtsc_parms.h

xtsc/xtsc_types.h stdexcept iostream string map set vector

systemc

Classes

• class xtsc_dma_engine_parms
Constructor parameters for a xtsc_dma_engine object.

• class xtsc_dma_engine
An example DMA engine implementation.

• class xtsc_respond_if_impl
Implementation of xtsc_respond_if.

Namespaces

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

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8.7.1 Detailed Description

Definition in file xtsc_dma_engine.h.

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8.8 xtsc_dma_request.h File Reference

Structures for defining DMA Programming Registers. This graph shows which files directly
or indirectly include this file:

xtsc_dma_request.h

xtsc_dma_engine.h

Classes
• struct xtsc_dma_request
This struct is plain old data (POD) used to define a DMA request.

• struct xtsc_dma_descriptor
This struct is plain old data (POD) used to define each descriptor of a DMA request.

Namespaces
• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

Typedefs
• typedef struct xtsc_dma_request xtsc_dma_request
• typedef struct xtsc_dma_descriptor xtsc_dma_descriptor

8.8.1 Detailed Description

Structures for defining DMA Programming Registers. This file is suitable for including in
both host simulator code (XTSC) and Xtensa target code.
Definition in file xtsc_dma_request.h.

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8.9 xtsc_exception.h File Reference

#include <stdexcept>
#include <iostream>
#include "xtsc/xtsc_types.h"
Include dependency graph for xtsc_exception.h:

xtsc_exception.h

stdexcept iostream xtsc/xtsc_types.h

systemc

This graph shows which files directly or indirectly include this file:
xtsc_exception.h

xtsc.h

xtsc_request.h xtsc_lookup.h xtsc_lookup_driver.h xtsc_master_tlm2.h xtsc_mode_switch_if.h xtsc_queue.h xtsc_queue_consumer.h xtsc_queue_producer.h xtsc_wire.h xtsc_wire_source.h xtsc_lookup_pin.h xtsc_pin2tlm_lookup_transactor.h xtsc_queue_pin.h xtsc_tx_loader.h xtsc_wire_logic.h

xtsc_core.h xtsc_fast_access.h xtsc_response.h xtsc_mmio.h xtsc_memory_b.h

xtsc_module_pin_base.h xtsc_xttlm2tlm2_transactor.h xtsc_udma.h xtsc_router.h xtsc_slave.h xtsc_arbiter.h xtsc_memory_trace.h xtsc_tlm22xttlm_transactor.h xtsc_master.h xtsc_memory.h xtsc_memory_base.h xtsc_memory_tlm2.h

xtsc_pin2tlm_memory_transactor.h xtsc_tlm2pin_memory_transactor.h xtsc_dma_engine.h xtsc_cache.h xtsc_memory_pin.h

Classes
• class xtsc_exception
Base class for all XTSC exceptions.

Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

8.9.1 Detailed Description

Definition in file xtsc_exception.h.

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 Chapter 8. File Documentation

8.10 xtsc_fast_access.h File Reference

#include <xtsc/xtsc.h>
Include dependency graph for xtsc_fast_access.h:

xtsc_fast_access.h

xtsc/xtsc.h

ostream xtsc/xtsc_parms.h iomanip xtensa-versions.h xtsc/xtsc_exception.h xtsc/xtsc_wire_write_if.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h

string set vector map iostream stdexcept xtsc/xtsc_types.h

systemc

This graph shows which files directly or indirectly include this file:

xtsc_fast_access.h

xtsc_arbiter.h xtsc_router.h xtsc_slave.h xtsc_memory_trace.h xtsc_tlm22xttlm_transactor.h xtsc_udma.h xtsc_xttlm2tlm2_transactor.h

Classes
• class xtsc_fast_access_if
Interface for fast access (turbo mode).

• class xtsc_fast_access_block
Value class for a block that surrounds a request address.

• class xtsc_fast_access_revocation_if
Interface to be implemented by memory-interface masters that wish to support revocation
of previously-granted fast access requests.

• class xtsc_fast_access_request
Class to hold request and response information to set up fast access data transfers.

Namespaces
• namespace xtsc

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All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

8.10.1 Detailed Description

Definition in file xtsc_fast_access.h.

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 Chapter 8. File Documentation

8.11 xtsc_lookup.h File Reference

#include <xtsc/xtsc.h>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_lookup_if.h>
#include <string>
#include <vector>
#include <map>
#include <deque>
Include dependency graph for xtsc_lookup.h:

xtsc_lookup.h

xtsc/xtsc.h xtsc/xtsc_lookup_if.h deque

ostream iomanip xtensa-versions.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h xtsc/xtsc_parms.h xtsc/xtsc_exception.h xtsc/xtsc_wire_write_if.h

vector string set iostream stdexcept xtsc/xtsc_types.h map

systemc

Classes

• class xtsc_lookup_parms
Constructor parameters for a xtsc_lookup object.

• class xtsc_lookup
An TIE lookup implementation that connects using TLM-level ports.

• class xtsc_lookup_if_impl
Implementation of xtsc_lookup_if.

Namespaces

• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

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Chapter 8. File Documentation

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

8.11.1 Detailed Description

Definition in file xtsc_lookup.h.

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 Chapter 8. File Documentation

8.12 xtsc_lookup_driver.h File Reference

#include <xtsc/xtsc.h>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_lookup_if.h>
#include <string>
#include <vector>
#include <fstream>
Include dependency graph for xtsc_lookup_driver.h:

xtsc_lookup_driver.h

xtsc/xtsc.h xtsc/xtsc_lookup_if.h fstream

xtsc/xtsc_parms.h log4xtensa/log4xtensa.h xtsc/xtsc_exception.h ostream xtsc/xtsc_wire_write_if.h iomanip xtensa-versions.h xtsc/xtsc_mode_switch_if.h

string vector map set iostream stdexcept xtsc/xtsc_types.h

systemc

Classes

• class xtsc_lookup_driver_parms
Constructor parameters for a xtsc_lookup_driver object.

• class xtsc_lookup_driver
A scripted driver for a lookup.

Namespaces

• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

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Chapter 8. File Documentation

8.12.1 Detailed Description

Definition in file xtsc_lookup_driver.h.

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 Chapter 8. File Documentation

8.13 xtsc_lookup_if.h File Reference

#include <xtsc/xtsc_types.h>
Include dependency graph for xtsc_lookup_if.h:

xtsc_lookup_if.h

xtsc/xtsc_types.h

systemc

This graph shows which files directly or indirectly include this file:

xtsc_lookup_if.h

xtsc_core.h xtsc_lookup.h xtsc_lookup_driver.h xtsc_pin2tlm_lookup_transactor.h

xtsc_module_pin_base.h xtsc_xttlm2tlm2_transactor.h xtsc_udma.h

xtsc_memory_pin.h xtsc_pin2tlm_memory_transactor.h xtsc_tlm2pin_memory_transactor.h

Classes

• class xtsc_lookup_if
Interface for connecting a TIE lookup client to an implementation.

Namespaces

• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

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Chapter 8. File Documentation

8.13.1 Detailed Description

Definition in file xtsc_lookup_if.h.

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 Chapter 8. File Documentation

8.14 xtsc_lookup_pin.h File Reference

#include <xtsc/xtsc.h>
#include <xtsc/xtsc_parms.h>
#include <string>
#include <vector>
#include <map>
Include dependency graph for xtsc_lookup_pin.h:

xtsc_lookup_pin.h

xtsc/xtsc.h

iomanip xtensa-versions.h xtsc/xtsc_wire_write_if.h xtsc/xtsc_exception.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h ostream xtsc/xtsc_parms.h

xtsc/xtsc_types.h stdexcept iostream set vector string map

systemc

Classes
• class xtsc_lookup_pin_parms
Constructor parameters for a xtsc_lookup_pin object.

• class xtsc_lookup_pin
A TIE lookup implementation using the pin-level interface.

Namespaces
• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

8.14.1 Detailed Description

Definition in file xtsc_lookup_pin.h.

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Chapter 8. File Documentation

8.15 xtsc_master.h File Reference

#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_request_if.h>
#include <xtsc/xtsc_respond_if.h>
#include <xtsc/xtsc_request.h>
#include <xtsc/xtsc_response.h>
#include <xtsc/xtsc_wire_write_if.h>
#include <string>
#include <vector>
#include <fstream>
#include <deque>
Include dependency graph for xtsc_master.h:

xtsc_master.h

xtsc/xtsc_response.h fstream deque

xtsc/xtsc_request.h cstring xtsc/xtsc_respond_if.h

xtsc/xtsc.h xtsc/xtsc_request_if.h

xtsc/xtsc_parms.h xtensa-versions.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h ostream iomanip xtsc/xtsc_exception.h xtsc/xtsc_wire_write_if.h

vector string map set iostream stdexcept xtsc/xtsc_types.h

systemc

Classes

• class xtsc_master_parms
Constructor parameters for a xtsc_master object.

• class xtsc_master
A scripted memory interface master.

• class xtsc_wire_write_if_impl

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Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

8.15.1 Detailed Description

Definition in file xtsc_master.h.

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Chapter 8. File Documentation

8.16 xtsc_master_tlm2.h File Reference

#include <tlm.h>
#include <xtsc/xtsc.h>
#include <xtsc/xtsc_parms.h>
#include <string>
#include <vector>
#include <map>
#include <fstream>
Include dependency graph for xtsc_master_tlm2.h:

xtsc_master_tlm2.h

tlm.h xtsc/xtsc.h fstream

iomanip xtensa-versions.h xtsc/xtsc_wire_write_if.h xtsc/xtsc_exception.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h ostream xtsc/xtsc_parms.h

xtsc/xtsc_types.h stdexcept iostream set vector string map

systemc

Classes

• class xtsc_master_tlm2_parms
Constructor parameters for a xtsc_master_tlm2 object.

• class xtsc_master_tlm2
A scripted OSCI TLM2 memory interface master.

• class tlm_bw_transport_if_impl
Implementation of tlm_bw_transport_if.

Namespaces

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

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8.16.1 Detailed Description

Definition in file xtsc_master_tlm2.h.

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Chapter 8. File Documentation

8.17 xtsc_memory.h File Reference

#include <xtsc/xtsc_request_if.h>
#include <xtsc/xtsc_respond_if.h>
#include <xtsc/xtsc_request.h>
#include <xtsc/xtsc_response.h>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_memory_b.h>
#include <cstring>
#include <vector>
Include dependency graph for xtsc_memory.h:

xtsc_memory.h

xtsc/xtsc_memory_b.h xtsc/xtsc_response.h

xtsc/xtsc_respond_if.h xtsc/xtsc_request.h cstring

xtsc/xtsc_request_if.h xtsc/xtsc.h

ostream xtsc/xtsc_wire_write_if.h xtsc/xtsc_exception.h iomanip xtensa-versions.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h xtsc/xtsc_parms.h

xtsc/xtsc_types.h stdexcept iostream string map set vector

systemc

This graph shows which files directly or indirectly include this file:

xtsc_memory.h

xtsc_cache.h xtsc_dma_engine.h

Classes
• class xtsc_memory_parms
Constructor parameters for a xtsc_memory object.

• class xtsc_memory

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A PIF, XLMI, or local memory.

• class address_info
POD class to help keep track of information related to a special address or address range.

• class xtsc_request_if_impl
Implementation of xtsc_request_if.

• class request_info
Information about each request.

• class watchfilter_info
Information about each watchfilter.

Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

Functions
• XTSC_COMP_API std::ostream & operator<< (std::ostream &os, const xtsc_-
memory::address_info &info)

8.17.1 Detailed Description

Definition in file xtsc_memory.h.

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8.18 xtsc_memory_b.h File Reference

#include <xtsc/xtsc.h>
#include <cstring>
Include dependency graph for xtsc_memory_b.h:

xtsc_memory_b.h

xtsc/xtsc.h cstring

ostream xtsc/xtsc_parms.h iomanip xtensa-versions.h xtsc/xtsc_exception.h xtsc/xtsc_wire_write_if.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h

string set vector map iostream stdexcept xtsc/xtsc_types.h

systemc

This graph shows which files directly or indirectly include this file:

xtsc_memory_b.h

xtsc_memory.h xtsc_memory_tlm2.h xtsc_memory_base.h xtsc_memory_pin.h xtsc_tlm2pin_memory_transactor.h

xtsc_cache.h xtsc_dma_engine.h

Classes

• class xtsc_memory_b
Class for a memory model.

Namespaces

• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

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8.18.1 Detailed Description

Definition in file xtsc_memory_b.h.

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Chapter 8. File Documentation

8.19 xtsc_memory_pin.h File Reference

#include <map>
#include <vector>
#include <deque>
#include <string>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_module_pin_base.h>
#include <xtsc/xtsc_memory_b.h>
#include <xtsc/xtsc_request_if.h>
Include dependency graph for xtsc_memory_pin.h:

xtsc_memory_pin.h

deque xtsc/xtsc_module_pin_base.h

xtsc/xtsc_response.h

xtsc/xtsc_core.h xtsc/xtsc_request.h xtsc/xtsc_memory_b.h

xtsc/xtsc_request_if.h xtsc/xtsc_queue_push_if.h xtsc/xtsc_wire_read_if.h xtsc/xtsc_lookup_if.h xtsc/xtsc_queue_pop_if.h xtsc/xtsc_tx_xfer_if.h xtsc/xtsc.h cstring

xtsc/xtsc_respond_if.h xtsc/xtsc_wire_write_if.h xtsc/xtsc_parms.h xtsc/xtsc_exception.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h ostream iomanip xtensa-versions.h

map set xtsc/xtsc_types.h iostream stdexcept string vector

systemc

Classes

• class xtsc_memory_pin_parms
Constructor parameters for a xtsc_memory_pin object.

• class xtsc_memory_pin
This device implements a pin-level memory model.

• class xtsc_debug_if_impl
Implementation of xtsc_debug_if.

• class pif_req_info
Information about each request.

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Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

8.19.1 Detailed Description

Definition in file xtsc_memory_pin.h.

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Chapter 8. File Documentation

8.20 xtsc_memory_tlm2.h File Reference

#include <tlm.h>
#include <tlm_utils/peq_with_get.h>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_memory_b.h>
#include <cstring>
#include <vector>
Include dependency graph for xtsc_memory_tlm2.h:

xtsc_memory_tlm2.h

tlm.h tlm_utils/peq_with_get.h xtsc/xtsc_memory_b.h

xtsc/xtsc.h cstring

xtsc/xtsc_parms.h ostream iomanip xtensa-versions.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h xtsc/xtsc_exception.h xtsc/xtsc_wire_write_if.h

vector string map set iostream stdexcept xtsc/xtsc_types.h

systemc

Classes
• class xtsc_memory_tlm2_parms
Constructor parameters for a xtsc_memory_tlm2 object.

• class xtsc_memory_tlm2
A PIF, XLMI, or local memory which uses OSCI TLM2.

• class tlm_fw_transport_if_impl
Implementation of tlm_fw_transport_if<>.

Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

• namespace xtsc_component

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All XTSC component library objects are in the xtsc_component namespace.

8.20.1 Detailed Description

Definition in file xtsc_memory_tlm2.h.

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Chapter 8. File Documentation

8.21 xtsc_memory_trace.h File Reference

#include <xtsc/xtsc.h>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_request_if.h>
#include <xtsc/xtsc_respond_if.h>
#include <xtsc/xtsc_request.h>
#include <xtsc/xtsc_response.h>
#include <xtsc/xtsc_address_range_entry.h>
#include <xtsc/xtsc_fast_access.h>
#include <vector>
#include <map>
#include <cstring>
Include dependency graph for xtsc_memory_trace.h:

xtsc_memory_trace.h

xtsc/xtsc_response.h xtsc/xtsc_fast_access.h

xtsc/xtsc_request.h cstring xtsc/xtsc_respond_if.h

xtsc/xtsc.h xtsc/xtsc_address_range_entry.h xtsc/xtsc_request_if.h

xtsc/xtsc_parms.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h ostream iomanip xtensa-versions.h xtsc/xtsc_exception.h xtsc/xtsc_wire_write_if.h

map vector string set iostream stdexcept xtsc/xtsc_types.h

systemc

Classes

• class xtsc_memory_trace_parms
Constructor parameters for a xtsc_memory_trace object.

• class xtsc_memory_trace
Example XTSC model which generates a value-change dump (VCD) file of the data mem-
bers of each xtsc::xtsc_request and xtsc::xtsc_response that passes through it ("allow_-
tracing" true) and/or which tracks the lifetime, latency, and counters of each transaction by
request type and by port number ("track_latency" true).

• class transaction_info

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This class is used to keep track of 4 key times during each transaction’s lifecycle in order
to compute transaciton lifetime and latency.

• class statistic_info
This class is used to keep track of transaction statistics.

• class xtsc_request_if_impl
Implementation of xtsc_request_if.

• class xtsc_respond_if_impl
Implementation of xtsc_respond_if.

Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

8.21.1 Detailed Description

Definition in file xtsc_memory_trace.h.

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Chapter 8. File Documentation

8.22 xtsc_mmio.h File Reference

#include <map>
#include <set>
#include <vector>
#include <string>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_request.h>
#include <xtsc/xtsc_request_if.h>
#include <xtsc/xtsc_respond_if.h>
#include <xtsc/xtsc_wire_write_if.h>
Include dependency graph for xtsc_mmio.h:

xtsc_mmio.h

xtsc/xtsc_request.h xtsc/xtsc_respond_if.h

xtsc/xtsc.h xtsc/xtsc_request_if.h

xtsc/xtsc_parms.h ostream xtsc/xtsc_exception.h iomanip xtensa-versions.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h xtsc/xtsc_wire_write_if.h

map set vector string iostream stdexcept xtsc/xtsc_types.h

systemc

Classes
• class xtsc_mmio_parms
Constructor parameters for a xtsc_mmio object.

• class xtsc_mmio
A general-purpose memory-mapped input/output (MMIO) register device.

• class xtsc_request_if_impl
Implementation of xtsc_request_if.

• class register_definition
Register definition and value.

• class output_definition

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Output definition and sc_port.

• class input_definition
Input definition and sc_export.

• class xtsc_wire_write_if_impl
Implementation of xtsc_wire_write_if.

Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

Functions
• std::ostream & operator<< (std::ostream &os, const xtsc_mmio::register_definition
&reg)
• std::ostream & operator<< (std::ostream &os, const xtsc_mmio::output_definition
&output)
• std::ostream & operator<< (std::ostream &os, const xtsc_mmio::input_definition
&input)

8.22.1 Detailed Description

Definition in file xtsc_mmio.h.

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8.23 xtsc_mode_switch_if.h File Reference

#include <xtsc/xtsc.h>
Include dependency graph for xtsc_mode_switch_if.h:

xtsc_mode_switch_if.h

xtsc/xtsc.h

xtsc/xtsc_wire_write_if.h xtsc/xtsc_exception.h xtsc/xtsc_parms.h ostream iomanip xtensa-versions.h log4xtensa/log4xtensa.h

xtsc/xtsc_types.h stdexcept iostream string map set vector

systemc

This graph shows which files directly or indirectly include this file:
xtsc_mode_switch_if.h

xtsc.h

xtsc_request.h xtsc_lookup.h xtsc_lookup_driver.h xtsc_master_tlm2.h xtsc_queue.h xtsc_queue_consumer.h xtsc_queue_producer.h xtsc_wire.h xtsc_wire_source.h xtsc_lookup_pin.h xtsc_pin2tlm_lookup_transactor.h xtsc_queue_pin.h xtsc_tx_loader.h xtsc_wire_logic.h

xtsc_memory_b.h xtsc_core.h xtsc_mmio.h xtsc_response.h xtsc_fast_access.h

xtsc_memory_base.h xtsc_memory_tlm2.h xtsc_module_pin_base.h xtsc_memory.h xtsc_udma.h xtsc_xttlm2tlm2_transactor.h xtsc_master.h xtsc_arbiter.h xtsc_slave.h xtsc_router.h xtsc_memory_trace.h xtsc_tlm22xttlm_transactor.h

xtsc_memory_pin.h xtsc_tlm2pin_memory_transactor.h xtsc_dma_engine.h xtsc_pin2tlm_memory_transactor.h xtsc_cache.h

Classes
• class xtsc_mode_switch_if
Interface for dynamic simulation mode switching between fast-functional and cycle-accurate
modes.

Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

Typedefs
• typedef enum xtsc::xtsc_sim_mode xtsc_sim_mode

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Type used to identify simulation modes.

Enumerations
• enum xtsc_sim_mode {
XTSC_CYCLE_ACCURATE = 0,
XTSC_FUNCTIONAL }
Type used to identify simulation modes.

8.23.1 Detailed Description

Definition in file xtsc_mode_switch_if.h.

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8.24 xtsc_module_pin_base.h File Reference

#include <map>
#include <set>
#include <vector>
#include <string>
#include <xtsc/xtsc.h>
#include <xtsc/xtsc_core.h>
#include <xtsc/xtsc_request.h>
#include <xtsc/xtsc_response.h>
Include dependency graph for xtsc_module_pin_base.h:
xtsc_module_pin_base.h

xtsc/xtsc_response.h

xtsc/xtsc_request.h xtsc/xtsc_core.h

xtsc/xtsc.h cstring xtsc/xtsc_respond_if.h xtsc/xtsc_tx_xfer_if.h xtsc/xtsc_queue_push_if.h xtsc/xtsc_queue_pop_if.h xtsc/xtsc_wire_read_if.h xtsc/xtsc_lookup_if.h

log4xtensa/log4xtensa.h ostream iomanip xtensa-versions.h xtsc/xtsc_mode_switch_if.h xtsc/xtsc_parms.h xtsc/xtsc_exception.h xtsc/xtsc_wire_write_if.h xtsc/xtsc_request_if.h

map set iostream stdexcept vector string xtsc/xtsc_types.h

systemc

This graph shows which files directly or indirectly include this file:

xtsc_module_pin_base.h

xtsc_memory_pin.h xtsc_pin2tlm_memory_transactor.h xtsc_tlm2pin_memory_transactor.h

Classes
• class xtsc_module_pin_base
This is a base class for modules implementing pin-level interfaces, especially pin-level
memory interfaces.

• class req_cntl
Class to manage the bits of POReqCntl/PIReqCntl.

• class resp_cntl
Class to manage the bits of PORespCntl/PIRespCntl/SnoopRespCntl.

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 Chapter 8. File Documentation

Namespaces
• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

8.24.1 Detailed Description

Definition in file xtsc_module_pin_base.h.

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8.25 xtsc_parms.h File Reference

#include <xtsc/xtsc_types.h>
#include <map>
#include <set>
#include <vector>
#include <string>
#include <iostream>
Include dependency graph for xtsc_parms.h:

xtsc_parms.h

xtsc/xtsc_types.h map set vector string iostream

systemc

This graph shows which files directly or indirectly include this file:
xtsc_parms.h

xtsc.h

xtsc_lookup.h xtsc_lookup_driver.h xtsc_master_tlm2.h xtsc_queue.h xtsc_queue_consumer.h xtsc_queue_producer.h xtsc_mode_switch_if.h xtsc_request.h xtsc_wire.h xtsc_wire_source.h xtsc_lookup_pin.h xtsc_pin2tlm_lookup_transactor.h xtsc_queue_pin.h xtsc_tx_loader.h xtsc_wire_logic.h xtsc_memory_b.h

xtsc_fast_access.h xtsc_response.h xtsc_mmio.h xtsc_core.h xtsc_memory_base.h xtsc_memory_tlm2.h

xtsc_tlm22xttlm_transactor.h xtsc_router.h xtsc_slave.h xtsc_arbiter.h xtsc_memory_trace.h xtsc_udma.h xtsc_master.h xtsc_xttlm2tlm2_transactor.h xtsc_memory.h xtsc_module_pin_base.h

xtsc_dma_engine.h xtsc_cache.h xtsc_pin2tlm_memory_transactor.h xtsc_tlm2pin_memory_transactor.h xtsc_memory_pin.h

Classes

• class xtsc_parms
Base class for core and component module construction parameters.

Namespaces

• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

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8.25.1 Detailed Description

Definition in file xtsc_parms.h.

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8.26 xtsc_pin2tlm_lookup_transactor.h File Reference

#include <xtsc/xtsc.h>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_lookup_if.h>
#include <string>
#include <vector>
#include <fstream>
Include dependency graph for xtsc_pin2tlm_lookup_transactor.h:

xtsc_pin2tlm_lookup_transactor.h

xtsc/xtsc.h xtsc/xtsc_lookup_if.h fstream

xtsc/xtsc_parms.h log4xtensa/log4xtensa.h xtsc/xtsc_exception.h ostream xtsc/xtsc_wire_write_if.h iomanip xtensa-versions.h xtsc/xtsc_mode_switch_if.h

string vector map set iostream stdexcept xtsc/xtsc_types.h

systemc

Classes
• class xtsc_pin2tlm_lookup_transactor_parms
Constructor parameters for a xtsc_pin2tlm_lookup_transactor object.

• class xtsc_pin2tlm_lookup_transactor
A transactor to convert a pin-level TIE lookup interface to Xtensa TLM.

Namespaces
• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

8.26.1 Detailed Description

Definition in file xtsc_pin2tlm_lookup_transactor.h.

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8.27 xtsc_pin2tlm_memory_transactor.h File Reference

#include <deque>
#include <vector>
#include <string>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_request.h>
#include <xtsc/xtsc_request_if.h>
#include <xtsc/xtsc_respond_if.h>
#include <xtsc/xtsc_module_pin_base.h>
Include dependency graph for xtsc_pin2tlm_memory_transactor.h:
xtsc_pin2tlm_memory_transactor.h

deque xtsc/xtsc_module_pin_base.h

xtsc/xtsc_response.h

xtsc/xtsc_core.h xtsc/xtsc_request.h

xtsc/xtsc_request_if.h xtsc/xtsc_respond_if.h xtsc/xtsc_wire_read_if.h xtsc/xtsc_lookup_if.h xtsc/xtsc_queue_push_if.h xtsc/xtsc_queue_pop_if.h cstring xtsc/xtsc.h

xtsc/xtsc_tx_xfer_if.h xtsc/xtsc_wire_write_if.h xtsc/xtsc_parms.h xtsc/xtsc_exception.h ostream iomanip xtensa-versions.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h

vector map xtsc/xtsc_types.h iostream stdexcept string set

systemc

Classes

• class xtsc_pin2tlm_memory_transactor_parms
Constructor parameters for a xtsc_pin2tlm_memory_transactor transactor object.

• class xtsc_pin2tlm_memory_transactor
This device converts memory transactions from pin level to transaction level.

• class xtsc_respond_if_impl
Implementation of xtsc_respond_if.

• class xtsc_debug_if_impl
Implementation of xtsc_debug_if.

• class request_info
Information about each request.

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• class subbank_activity
Keep track of subbank activity to a given given bank to ensure all responses are consistent
(all RSP_OK or all RSP_NACC).

Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

8.27.1 Detailed Description

Definition in file xtsc_pin2tlm_memory_transactor.h.

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 Chapter 8. File Documentation

8.28 xtsc_queue.h File Reference

#include <xtsc/xtsc.h>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_queue_push_if.h>
#include <xtsc/xtsc_queue_pop_if.h>
#include <vector>
Include dependency graph for xtsc_queue.h:

xtsc_queue.h

xtsc/xtsc_queue_push_if.h xtsc/xtsc_queue_pop_if.h xtsc/xtsc.h

log4xtensa/log4xtensa.h ostream xtsc/xtsc_wire_write_if.h iomanip xtsc/xtsc_exception.h xtensa-versions.h xtsc/xtsc_mode_switch_if.h xtsc/xtsc_parms.h

xtsc/xtsc_types.h stdexcept iostream string map set vector

systemc

Classes
• class xtsc_queue_parms
Constructor parameters for an xtsc_queue object.

• class xtsc_queue
A queue implementation that connects using TLM-level ports.

• class xtsc_queue_push_if_impl
Implementation of xtsc_queue_push_if for single producer.

• class xtsc_queue_pop_if_impl
Implementation of xtsc_queue_pop_if for single consumer.

• class xtsc_queue_push_if_multi_impl
Implementation of xtsc_queue_push_if for multi-client queue (either m_num_producers or
m_num_consumers > 1).

• class xtsc_queue_pop_if_multi_impl
Implementation of xtsc_queue_pop_if for multi-client queue (either m_num_producers or
m_num_consumers > 1).

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Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

8.28.1 Detailed Description

Definition in file xtsc_queue.h.

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 Chapter 8. File Documentation

8.29 xtsc_queue_consumer.h File Reference

#include <xtsc/xtsc.h>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_queue_pop_if.h>
#include <string>
#include <vector>
#include <fstream>
Include dependency graph for xtsc_queue_consumer.h:

xtsc_queue_consumer.h

xtsc/xtsc.h xtsc/xtsc_queue_pop_if.h fstream

xtsc/xtsc_parms.h log4xtensa/log4xtensa.h xtsc/xtsc_exception.h ostream xtsc/xtsc_wire_write_if.h iomanip xtensa-versions.h xtsc/xtsc_mode_switch_if.h

string vector map set iostream stdexcept xtsc/xtsc_types.h

systemc

Classes

• class xtsc_queue_consumer_parms
Constructor parameters for a xtsc_queue_consumer object.

• class xtsc_queue_consumer
A scripted consumer to drain a queue.

Namespaces

• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

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8.29.1 Detailed Description

Definition in file xtsc_queue_consumer.h.

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8.30 xtsc_queue_pin.h File Reference

#include <xtsc/xtsc.h>
#include <xtsc/xtsc_parms.h>
#include <vector>
#include <fstream>
Include dependency graph for xtsc_queue_pin.h:

xtsc_queue_pin.h

xtsc/xtsc.h fstream

xtsc/xtsc_parms.h ostream iomanip xtensa-versions.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h xtsc/xtsc_exception.h xtsc/xtsc_wire_write_if.h

vector set map string iostream stdexcept xtsc/xtsc_types.h

systemc

Classes
• class xtsc_queue_pin_parms
Constructor parameters for a xtsc_queue_pin object.

• class xtsc_queue_pin
A TIE queue implementation using the pin-level interface.

Namespaces
• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

8.30.1 Detailed Description

Definition in file xtsc_queue_pin.h.

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8.31 xtsc_queue_pop_if.h File Reference

#include <xtsc/xtsc_types.h>
Include dependency graph for xtsc_queue_pop_if.h:

xtsc_queue_pop_if.h

xtsc/xtsc_types.h

systemc

This graph shows which files directly or indirectly include this file:

xtsc_queue_pop_if.h

xtsc_core.h xtsc_queue.h xtsc_queue_consumer.h xtsc_tx_loader.h

xtsc_module_pin_base.h xtsc_udma.h xtsc_xttlm2tlm2_transactor.h

xtsc_memory_pin.h xtsc_pin2tlm_memory_transactor.h xtsc_tlm2pin_memory_transactor.h

Classes

• class xtsc_queue_pop_if
This interface is for connecting between a consumer and a queue.

Namespaces

• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

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8.31.1 Detailed Description

Definition in file xtsc_queue_pop_if.h.

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Chapter 8. File Documentation

8.32 xtsc_queue_producer.h File Reference

#include <xtsc/xtsc.h>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_queue_push_if.h>
#include <string>
#include <vector>
#include <fstream>
Include dependency graph for xtsc_queue_producer.h:

xtsc_queue_producer.h

xtsc/xtsc.h xtsc/xtsc_queue_push_if.h fstream

xtsc/xtsc_parms.h log4xtensa/log4xtensa.h xtsc/xtsc_exception.h ostream xtsc/xtsc_wire_write_if.h iomanip xtensa-versions.h xtsc/xtsc_mode_switch_if.h

string vector map set iostream stdexcept xtsc/xtsc_types.h

systemc

Classes

• class xtsc_queue_producer_parms
Constructor parameters for a xtsc_queue_producer object.

• class xtsc_queue_producer
A scripted producer to supply a queue.

• class xtsc_wire_write_if_impl

Namespaces

• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

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8.32.1 Detailed Description

Definition in file xtsc_queue_producer.h.

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Chapter 8. File Documentation

8.33 xtsc_queue_push_if.h File Reference

#include <xtsc/xtsc_types.h>
Include dependency graph for xtsc_queue_push_if.h:

xtsc_queue_push_if.h

xtsc/xtsc_types.h

systemc

This graph shows which files directly or indirectly include this file:

xtsc_queue_push_if.h

xtsc_core.h xtsc_queue.h xtsc_queue_producer.h xtsc_tx_loader.h

xtsc_module_pin_base.h xtsc_udma.h xtsc_xttlm2tlm2_transactor.h

xtsc_memory_pin.h xtsc_pin2tlm_memory_transactor.h xtsc_tlm2pin_memory_transactor.h

Classes

• class xtsc_queue_push_if
Interface for connecting between a producer and a queue.

Namespaces

• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

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8.33.1 Detailed Description

Definition in file xtsc_queue_push_if.h.

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Chapter 8. File Documentation

8.34 xtsc_request.h File Reference

#include <xtsc/xtsc.h>
Include dependency graph for xtsc_request.h:

xtsc_request.h

xtsc/xtsc.h

ostream xtsc/xtsc_parms.h iomanip xtensa-versions.h xtsc/xtsc_exception.h xtsc/xtsc_wire_write_if.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h

string set vector map iostream stdexcept xtsc/xtsc_types.h

systemc

This graph shows which files directly or indirectly include this file:

xtsc_request.h

xtsc_response.h xtsc_mmio.h

xtsc_arbiter.h xtsc_master.h xtsc_memory.h xtsc_router.h xtsc_slave.h xtsc_memory_trace.h xtsc_module_pin_base.h xtsc_tlm22xttlm_transactor.h xtsc_udma.h xtsc_xttlm2tlm2_transactor.h

xtsc_dma_engine.h xtsc_cache.h xtsc_memory_pin.h xtsc_pin2tlm_memory_transactor.h xtsc_tlm2pin_memory_transactor.h

Classes

• class xtsc_request
Class representing a PIF, XLMI, local memory, snoop, or inbound PIF request transfer.

• class stream_dumper
Helper class to make it easy to dump xtsc_request to an ostream with or without data
values.

Namespaces

• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

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Functions
• XTSC_API std::ostream & operator<< (std::ostream &os, const xtsc_request &re-
quest)
Dump an xtsc_request object.

• XTSC_API std::ostream & operator<< (std::ostream &os, const xtsc_-

request::stream_dumper &dumper)
Dump an xtsc_request object.

8.34.1 Detailed Description

Definition in file xtsc_request.h.

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8.35 xtsc_request_if.h File Reference

#include <xtsc/xtsc_types.h>
Include dependency graph for xtsc_request_if.h:

xtsc_request_if.h

xtsc/xtsc_types.h

systemc

This graph shows which files directly or indirectly include this file:

xtsc_request_if.h

xtsc_core.h xtsc_arbiter.h xtsc_master.h xtsc_memory.h xtsc_mmio.h xtsc_router.h xtsc_slave.h xtsc_memory_trace.h xtsc_tlm22xttlm_transactor.h

xtsc_udma.h xtsc_module_pin_base.h xtsc_xttlm2tlm2_transactor.h xtsc_dma_engine.h xtsc_cache.h

xtsc_tlm2pin_memory_transactor.h xtsc_memory_pin.h xtsc_pin2tlm_memory_transactor.h

Classes

• class xtsc_debug_if
Interface for non-hardware communication from a memory interface master to a memory
interface slave.

• class xtsc_request_if
Interface for sending requests from a memory interface master to a memory interface slave.

Namespaces

• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

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8.35.1 Detailed Description

Definition in file xtsc_request_if.h.

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Chapter 8. File Documentation

8.36 xtsc_respond_if.h File Reference

#include <xtsc/xtsc_types.h>
Include dependency graph for xtsc_respond_if.h:

xtsc_respond_if.h

xtsc/xtsc_types.h

systemc

This graph shows which files directly or indirectly include this file:
xtsc_respond_if.h

xtsc_core.h xtsc_arbiter.h xtsc_master.h xtsc_memory.h xtsc_mmio.h xtsc_router.h xtsc_slave.h xtsc_memory_trace.h xtsc_tlm22xttlm_transactor.h

xtsc_udma.h xtsc_module_pin_base.h xtsc_xttlm2tlm2_transactor.h xtsc_cache.h xtsc_dma_engine.h

xtsc_pin2tlm_memory_transactor.h xtsc_memory_pin.h xtsc_tlm2pin_memory_transactor.h

Classes
• class xtsc_respond_if
Interface for sending responses from a memory interface slave back to the requesting mem-
ory interface master.

Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

8.36.1 Detailed Description

Definition in file xtsc_respond_if.h.

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 Chapter 8. File Documentation

8.37 xtsc_response.h File Reference

#include <xtsc/xtsc.h>
#include <xtsc/xtsc_request.h>
#include <cstring>
Include dependency graph for xtsc_response.h:

xtsc_response.h

xtsc/xtsc_request.h cstring

xtsc/xtsc.h

ostream xtsc/xtsc_parms.h iomanip xtensa-versions.h xtsc/xtsc_exception.h xtsc/xtsc_wire_write_if.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h

string set vector map iostream stdexcept xtsc/xtsc_types.h

systemc

This graph shows which files directly or indirectly include this file:

xtsc_response.h

xtsc_arbiter.h xtsc_master.h xtsc_memory.h xtsc_router.h xtsc_slave.h xtsc_memory_trace.h xtsc_module_pin_base.h xtsc_tlm22xttlm_transactor.h xtsc_udma.h xtsc_xttlm2tlm2_transactor.h

xtsc_cache.h xtsc_dma_engine.h xtsc_memory_pin.h xtsc_pin2tlm_memory_transactor.h xtsc_tlm2pin_memory_transactor.h

Classes

• class xtsc_response
Class representing a PIF, XLMI, local memory, or inbound PIF response transfer.

• class stream_dumper
Helper class to make it easy to dump xtsc_response to an ostream with or without data
values.

Namespaces

• namespace xtsc

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Chapter 8. File Documentation

All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

Functions
• XTSC_API std::ostream & operator<< (std::ostream &os, const xtsc_response &re-
sponse)
Dump an xtsc_response object.

• XTSC_API std::ostream & operator<< (std::ostream &os, const xtsc_-

response::stream_dumper &dumper)
Dump an xtsc_response object.

8.37.1 Detailed Description

Definition in file xtsc_response.h.

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 Chapter 8. File Documentation

8.38 xtsc_router.h File Reference

#include <xtsc/xtsc.h>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_request_if.h>
#include <xtsc/xtsc_respond_if.h>
#include <xtsc/xtsc_request.h>
#include <xtsc/xtsc_response.h>
#include <xtsc/xtsc_address_range_entry.h>
#include <xtsc/xtsc_fast_access.h>
#include <vector>
#include <cstring>
#include <map>
Include dependency graph for xtsc_router.h:

xtsc_router.h

xtsc/xtsc_response.h xtsc/xtsc_fast_access.h

xtsc/xtsc_request.h cstring xtsc/xtsc_respond_if.h

xtsc/xtsc.h xtsc/xtsc_address_range_entry.h xtsc/xtsc_request_if.h

xtsc/xtsc_parms.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h ostream iomanip xtensa-versions.h xtsc/xtsc_exception.h xtsc/xtsc_wire_write_if.h

map vector string set iostream stdexcept xtsc/xtsc_types.h

systemc

Classes

• class xtsc_router_parms
Constructor parameters for a xtsc_router object.

• class xtsc_router
Example XTSC module implementing a router on a PIF network or local memory intercon-
nect.

• struct bit_field_info
• class xtsc_request_if_impl
Implementation of xtsc_request_if.

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• class xtsc_respond_if_impl
Implementation of xtsc_respond_if.

• class request_info
Information about each request.

• class response_info
Information about each response.

• class req_rsp_info
Information for PIF width converter (PWC) mode.

• class watchfilter_info
Information about each watchfilter.

Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

8.38.1 Detailed Description

Definition in file xtsc_router.h.

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 Chapter 8. File Documentation

8.39 xtsc_slave.h File Reference

#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_request_if.h>
#include <xtsc/xtsc_respond_if.h>
#include <xtsc/xtsc_response.h>
#include <xtsc/xtsc_fast_access.h>
#include <string>
#include <vector>
#include <deque>
#include <fstream>
Include dependency graph for xtsc_slave.h:

xtsc_slave.h

xtsc/xtsc_response.h deque fstream

cstring xtsc/xtsc_request.h xtsc/xtsc_fast_access.h xtsc/xtsc_respond_if.h

xtsc/xtsc.h xtsc/xtsc_request_if.h

xtsc/xtsc_parms.h ostream iomanip xtsc/xtsc_exception.h xtsc/xtsc_wire_write_if.h xtensa-versions.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h

vector string map set iostream stdexcept xtsc/xtsc_types.h

systemc

Classes

• class xtsc_slave_parms
Constructor parameters for a xtsc_slave object.

• class xtsc_slave
A scripted memory interface slave.

• class response_info
This class helps keep track of a response and when it is due.

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Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

8.39.1 Detailed Description

Definition in file xtsc_slave.h.

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 Chapter 8. File Documentation

8.40 xtsc_tlm22xttlm_transactor.h File Reference

#include <tlm.h>
#include <tlm_utils/peq_with_get.h>
#include <xtsc/xtsc.h>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_request_if.h>
#include <xtsc/xtsc_request.h>
#include <xtsc/xtsc_respond_if.h>
#include <xtsc/xtsc_response.h>
#include <xtsc/xtsc_fast_access.h>
#include <deque>
#include <vector>
#include <list>
#include <cstring>
Include dependency graph for xtsc_tlm22xttlm_transactor.h:

xtsc_tlm22xttlm_transactor.h

tlm.h tlm_utils/peq_with_get.h xtsc/xtsc_response.h deque list

xtsc/xtsc_request.h cstring xtsc/xtsc_fast_access.h xtsc/xtsc_respond_if.h

xtsc/xtsc_request_if.h xtsc/xtsc.h

xtsc/xtsc_wire_write_if.h xtensa-versions.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h ostream xtsc/xtsc_exception.h iomanip xtsc/xtsc_parms.h

vector xtsc/xtsc_types.h stdexcept iostream map string set

systemc

Classes

• class xtsc_tlm22xttlm_transactor_parms
Constructor parameters for a xtsc_tlm22xttlm_transactor object.

• class xtsc_tlm22xttlm_transactor
Example module implementing an OSCI TLM2 to Xtensa TLM (xttlm) transactor.

• class transaction_info

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Information about each transaction.

• class xtsc_respond_if_impl
Implementation of xtsc_respond_if.

• class tlm_fw_transport_if_impl
Implementation of tlm_fw_transport_if<>.

• class address_range
Class to keep track of address ranges and what DMI access has been granted/invalidated.

Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

8.40.1 Detailed Description

Definition in file xtsc_tlm22xttlm_transactor.h.

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 Chapter 8. File Documentation

8.41 xtsc_tlm2pin_memory_transactor.h File Reference

#include <deque>
#include <map>
#include <vector>
#include <string>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_request.h>
#include <xtsc/xtsc_request_if.h>
#include <xtsc/xtsc_respond_if.h>
#include <xtsc/xtsc_module_pin_base.h>
#include <xtsc/xtsc_memory_b.h>
#include <xtsc/xtsc_core.h>
Include dependency graph for xtsc_tlm2pin_memory_transactor.h:
xtsc_tlm2pin_memory_transactor.h

deque xtsc/xtsc_module_pin_base.h

xtsc/xtsc_response.h

xtsc/xtsc_memory_b.h xtsc/xtsc_request.h xtsc/xtsc_core.h

cstring xtsc/xtsc.h xtsc/xtsc_queue_push_if.h xtsc/xtsc_queue_pop_if.h xtsc/xtsc_wire_read_if.h xtsc/xtsc_lookup_if.h xtsc/xtsc_request_if.h xtsc/xtsc_respond_if.h

xtsc/xtsc_parms.h xtensa-versions.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h ostream iomanip xtsc/xtsc_exception.h xtsc/xtsc_wire_write_if.h xtsc/xtsc_tx_xfer_if.h

map vector string iostream stdexcept set xtsc/xtsc_types.h

systemc

Classes

• class xtsc_tlm2pin_memory_transactor_parms
Constructor parameters for a xtsc_tlm2pin_memory_transactor transactor object.

• class xtsc_tlm2pin_memory_transactor
This transactor converts memory transactions from transaction level (TLM) to pin level.

• class response_info
Information about each response.

• class xtsc_request_if_impl
Implementation of xtsc_request_if.

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• class xtsc_debug_if_cap
To cap an unconnected m_debug_ports port when the user can’t bind anything to it.

Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

8.41.1 Detailed Description

Definition in file xtsc_tlm2pin_memory_transactor.h.

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 Chapter 8. File Documentation

8.42 xtsc_tx_loader.h File Reference

#include <xtsc/xtsc.h>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_tx_xfer_if.h>
#include <xtsc/xtsc_tx_xfer.h>
#include <xtsc/xtsc_queue_push_if.h>
#include <xtsc/xtsc_queue_pop_if.h>
#include <vector>
#include <cstring>
#include <fstream>
Include dependency graph for xtsc_tx_loader.h:

xtsc_tx_loader.h

xtsc/xtsc_tx_xfer.h xtsc/xtsc_queue_push_if.h xtsc/xtsc_queue_pop_if.h xtsc/xtsc_tx_xfer_if.h xtsc/xtsc.h cstring fstream

xtsc/xtsc_wire_write_if.h ostream iomanip xtensa-versions.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h xtsc/xtsc_exception.h xtsc/xtsc_parms.h

xtsc/xtsc_types.h stdexcept iostream string map set vector

systemc

Classes

• class xtsc_tx_loader_parms
Constructor parameters for a xtsc_tx_loader object.

• class xtsc_tx_loader
XTSC module to model a boot loader for a TX Xtensa chain.

• class xtsc_tx_xfer_if_impl
Implementation of xtsc_tx_xfer_if.

• class xtsc_queue_push_if_impl
Implementation of xtsc_queue_push_if.

• class xtsc_queue_pop_if_impl
Implementation of xtsc_queue_pop_if.

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Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

8.42.1 Detailed Description

Definition in file xtsc_tx_loader.h.

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 Chapter 8. File Documentation

8.43 xtsc_tx_xfer.h File Reference

#include <xtsc/xtsc_types.h>
Include dependency graph for xtsc_tx_xfer.h:

xtsc_tx_xfer.h

xtsc/xtsc_types.h

systemc

This graph shows which files directly or indirectly include this file:

xtsc_tx_xfer.h

xtsc_tx_loader.h

Classes
• class xtsc_tx_xfer
This class carries the information of a TLM transaction on the TX Xtensa XFER (boot
loader) interface.

Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

Functions
• XTSC_API std::ostream & operator<< (std::ostream &os, const xtsc_tx_xfer &xfer)

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Chapter 8. File Documentation

Dump an xtsc_tx_xfer object.

8.43.1 Detailed Description

Definition in file xtsc_tx_xfer.h.

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 Chapter 8. File Documentation

8.44 xtsc_tx_xfer_if.h File Reference

#include <xtsc/xtsc_types.h>
Include dependency graph for xtsc_tx_xfer_if.h:

xtsc_tx_xfer_if.h

xtsc/xtsc_types.h

systemc

This graph shows which files directly or indirectly include this file:

xtsc_tx_xfer_if.h

xtsc_core.h xtsc_tx_loader.h

xtsc_module_pin_base.h xtsc_udma.h xtsc_xttlm2tlm2_transactor.h

xtsc_memory_pin.h xtsc_pin2tlm_memory_transactor.h xtsc_tlm2pin_memory_transactor.h

Classes

• class xtsc_tx_xfer_if
Interface for sending TLM TX XFER interface transactions.

Namespaces

• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

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Chapter 8. File Documentation

8.44.1 Detailed Description

Definition in file xtsc_tx_xfer_if.h.

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 Chapter 8. File Documentation

8.45 xtsc_types.h File Reference

#include "systemc"
Include dependency graph for xtsc_types.h:

xtsc_types.h

systemc

This graph shows which files directly or indirectly include this file:
xtsc_types.h

xtsc_exception.h xtsc_parms.h xtsc_wire_write_if.h xtsc_tx_xfer.h

xtsc.h xtsc_lookup_if.h xtsc_wire_read_if.h xtsc_queue_push_if.h xtsc_queue_pop_if.h xtsc_tx_xfer_if.h

xtsc_memory_b.h xtsc_master_tlm2.h xtsc_lookup_pin.h xtsc_mode_switch_if.h xtsc_request.h xtsc_respond_if.h xtsc_request_if.h xtsc_queue_pin.h xtsc_wire_logic.h xtsc_wire_source.h xtsc_pin2tlm_lookup_transactor.h xtsc_queue_producer.h xtsc_lookup.h xtsc_lookup_driver.h xtsc_queue_consumer.h xtsc_wire.h xtsc_queue.h xtsc_tx_loader.h

xtsc_memory_base.h xtsc_memory_tlm2.h xtsc_address_range_entry.h xtsc_fast_access.h xtsc_response.h xtsc_mmio.h xtsc_core.h

xtsc_memory.h xtsc_memory_trace.h xtsc_router.h xtsc_tlm22xttlm_transactor.h xtsc_arbiter.h xtsc_xttlm2tlm2_transactor.h xtsc_slave.h xtsc_module_pin_base.h xtsc_udma.h xtsc_master.h

xtsc_cache.h xtsc_memory_pin.h xtsc_pin2tlm_memory_transactor.h xtsc_tlm2pin_memory_transactor.h

Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

Defines
• #define XTSC_PRAGMA_WARNING(arg)
• #define declare_thread_process(handle, name, host_tag, func) SC_THREAD(func)

• #define SYSTEMC_VERSION 20070314

• #define XTSC_API
• #define XTSC_COMP_API
• #define XTSC_VP_API
• #define XTSC_MAY_THROW

Typedefs
• typedef unsigned long long u64

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64-bit unsigned number.

• typedef unsigned int u32

32-bit unsigned number.

• typedef unsigned short u16

• typedef unsigned char u8
8-bit unsigned number.

• typedef signed long long i64

• typedef signed int i32
• typedef signed short i16
• typedef signed char i8
• typedef i32 word
Host word size - signed.

• typedef u32 uword

Host word size - unsigned.

• typedef unsigned int xtsc_address

Xtensa address.

• typedef u64 xtsc_byte_enables

Byte enables.

8.45.1 Detailed Description

Definition in file xtsc_types.h.

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 Chapter 8. File Documentation

8.46 xtsc_udma.h File Reference

#include <xtsc/xtsc.h>
#include <xtsc/xtsc_core.h>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_lookup_if.h>
#include <xtsc/xtsc_respond_if.h>
#include <xtsc/xtsc_request_if.h>
#include <xtsc/xtsc_request.h>
#include <xtsc/xtsc_response.h>
#include <xtsc/xtsc_wire_write_if.h>
#include <xtsc/xtsc_fast_access.h>
Include dependency graph for xtsc_udma.h:
xtsc_udma.h

xtsc/xtsc_fast_access.h xtsc/xtsc_response.h

xtsc/xtsc_request.h xtsc/xtsc_core.h

xtsc/xtsc.h cstring xtsc/xtsc_wire_read_if.h xtsc/xtsc_queue_push_if.h xtsc/xtsc_queue_pop_if.h xtsc/xtsc_lookup_if.h xtsc/xtsc_request_if.h xtsc/xtsc_respond_if.h

ostream iomanip xtensa-versions.h xtsc/xtsc_exception.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h xtsc/xtsc_parms.h xtsc/xtsc_wire_write_if.h xtsc/xtsc_tx_xfer_if.h

set stdexcept iostream string map vector xtsc/xtsc_types.h

systemc

Classes
• class xtsc_udma_parms
Constructor parameters for an xtsc_udma object.

• class xtsc_udma
The xtsc_udma class provides an XTSC model of Cadence/Tensilica’s micro-DMA engine
(uDMA).

• struct udma_descriptor
Data structure used to store a uDMA descriptor.

• class xtsc_rer_lookup_if_impl
Implementation of xtsc_lookup_if for RER port.

• class xtsc_wer_lookup_if_impl

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Chapter 8. File Documentation

Implementation of xtsc_lookup_if for WER port.

• class xtsc_ram_respond_if_impl
Implementation of xtsc_respond_if for local RAM port.

• class xtsc_pif_respond_if_impl
Implementation of xtsc_respond_if for system RAM port.

Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

8.46.1 Detailed Description

Definition in file xtsc_udma.h.

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 Chapter 8. File Documentation

8.47 xtsc_wire.h File Reference

#include <xtsc/xtsc.h>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_wire_write_if.h>
#include <xtsc/xtsc_wire_read_if.h>
#include <vector>
Include dependency graph for xtsc_wire.h:

xtsc_wire.h

xtsc/xtsc_wire_read_if.h xtsc/xtsc.h

xtsc/xtsc_wire_write_if.h xtensa-versions.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h xtsc/xtsc_exception.h ostream iomanip xtsc/xtsc_parms.h

xtsc/xtsc_types.h stdexcept iostream string map set vector

systemc

Classes

• class xtsc_wire_parms
Constructor parameters for a xtsc_wire object.

• class xtsc_wire
A wire implementation that connects using TLM-level ports.

Namespaces

• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

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Chapter 8. File Documentation

8.47.1 Detailed Description

Definition in file xtsc_wire.h.

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 Chapter 8. File Documentation

8.48 xtsc_wire_logic.h File Reference

#include <xtsc/xtsc.h>
#include <xtsc/xtsc_parms.h>
#include <deque>
#include <map>
#include <set>
#include <string>
#include <vector>
Include dependency graph for xtsc_wire_logic.h:

xtsc_wire_logic.h

xtsc/xtsc.h deque

xtsc/xtsc_wire_write_if.h xtsc/xtsc_exception.h ostream iomanip xtensa-versions.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h xtsc/xtsc_parms.h

xtsc/xtsc_types.h stdexcept iostream string set vector map

systemc

Classes

• class xtsc_wire_logic_parms
Constructor parameters for a xtsc_wire_logic object.

• class xtsc_wire_logic
A general-purpose glue logic device for the xtsc::xtsc_wire_write_if.

• class output_info
Information about a delayed output value.

• class output_definition
Output definition and sc_port.

• class input_definition
Input definition and sc_export.

• class xtsc_wire_write_if_impl
Implementation of xtsc_wire_write_if.

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Chapter 8. File Documentation

• class iterator_definition
Iterator definition.

Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

Functions
• std::ostream & operator<< (std::ostream &os, const xtsc_wire_logic::output_-
definition &output)
• std::ostream & operator<< (std::ostream &os, const xtsc_wire_logic::input_-
definition &input)
• std::ostream & operator<< (std::ostream &os, const xtsc_wire_logic::iterator_-
definition &iterator)

8.48.1 Detailed Description

Definition in file xtsc_wire_logic.h.

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 Chapter 8. File Documentation

8.49 xtsc_wire_read_if.h File Reference

#include <xtsc/xtsc_types.h>
Include dependency graph for xtsc_wire_read_if.h:

xtsc_wire_read_if.h

xtsc/xtsc_types.h

systemc

This graph shows which files directly or indirectly include this file:

xtsc_wire_read_if.h

xtsc_core.h xtsc_wire.h

xtsc_module_pin_base.h xtsc_udma.h xtsc_xttlm2tlm2_transactor.h

xtsc_memory_pin.h xtsc_pin2tlm_memory_transactor.h xtsc_tlm2pin_memory_transactor.h

Classes

• class xtsc_wire_read_if
Interface for reading (sinking) a wire.

Namespaces

• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

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Chapter 8. File Documentation

8.49.1 Detailed Description

Definition in file xtsc_wire_read_if.h.

1394 Xtensa SystemC (XTSC) Reference Manual

 Chapter 8. File Documentation

8.50 xtsc_wire_source.h File Reference

#include <xtsc/xtsc.h>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_wire_write_if.h>
#include <string>
#include <vector>
#include <fstream>
Include dependency graph for xtsc_wire_source.h:

xtsc_wire_source.h

xtsc/xtsc.h fstream

xtsc/xtsc_parms.h log4xtensa/log4xtensa.h ostream iomanip xtsc/xtsc_exception.h xtensa-versions.h xtsc/xtsc_mode_switch_if.h xtsc/xtsc_wire_write_if.h

string vector map set iostream stdexcept xtsc/xtsc_types.h

systemc

Classes

• class xtsc_wire_source_parms
Constructor parameters for a xtsc_wire_source object.

• class xtsc_wire_source
A scripted xtsc::xtsc_wire_write_if or pin-level source.

• class output_definition
Output definition and sc_port.

• class xtsc_wire_write_if_impl

Namespaces

• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

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Chapter 8. File Documentation

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

8.50.1 Detailed Description

Definition in file xtsc_wire_source.h.

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 Chapter 8. File Documentation

8.51 xtsc_wire_write_if.h File Reference

#include <xtsc/xtsc_types.h>
Include dependency graph for xtsc_wire_write_if.h:

xtsc_wire_write_if.h

xtsc/xtsc_types.h

systemc

This graph shows which files directly or indirectly include this file:
xtsc_wire_write_if.h

xtsc.h

xtsc_request.h xtsc_lookup.h xtsc_lookup_driver.h xtsc_master_tlm2.h xtsc_mode_switch_if.h xtsc_queue.h xtsc_queue_consumer.h xtsc_queue_producer.h xtsc_lookup_pin.h xtsc_pin2tlm_lookup_transactor.h xtsc_queue_pin.h xtsc_tx_loader.h xtsc_wire_logic.h xtsc_wire.h xtsc_wire_source.h

xtsc_mmio.h xtsc_response.h xtsc_fast_access.h xtsc_core.h xtsc_memory_b.h

xtsc_master.h xtsc_module_pin_base.h xtsc_router.h xtsc_memory_trace.h xtsc_arbiter.h xtsc_slave.h xtsc_tlm22xttlm_transactor.h xtsc_xttlm2tlm2_transactor.h xtsc_memory.h xtsc_udma.h xtsc_memory_base.h xtsc_memory_tlm2.h

xtsc_pin2tlm_memory_transactor.h xtsc_cache.h xtsc_dma_engine.h xtsc_tlm2pin_memory_transactor.h xtsc_memory_pin.h

Classes
• class xtsc_wire_write_if
Interface for writing (driving/sourcing) a wire.

Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

8.51.1 Detailed Description

Definition in file xtsc_wire_write_if.h.

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Chapter 8. File Documentation

8.52 xtsc_xttlm2tlm2_transactor.h File Reference

#include <tlm.h>
#include <tlm_utils/peq_with_get.h>
#include <xtsc/xtsc.h>
#include <xtsc/xtsc_parms.h>
#include <xtsc/xtsc_request_if.h>
#include <xtsc/xtsc_respond_if.h>
#include <xtsc/xtsc_request.h>
#include <xtsc/xtsc_response.h>
#include <xtsc/xtsc_fast_access.h>
#include <xtsc/xtsc_core.h>
#include <vector>
#include <list>
#include <set>
#include <map>
#include <cstring>
Include dependency graph for xtsc_xttlm2tlm2_transactor.h:
xtsc_xttlm2tlm2_transactor.h

tlm.h tlm_utils/peq_with_get.h xtsc/xtsc_response.h list

xtsc/xtsc_request.h xtsc/xtsc_fast_access.h xtsc/xtsc_core.h

cstring xtsc/xtsc.h xtsc/xtsc_queue_pop_if.h xtsc/xtsc_wire_read_if.h xtsc/xtsc_lookup_if.h xtsc/xtsc_queue_push_if.h xtsc/xtsc_request_if.h xtsc/xtsc_respond_if.h

xtensa-versions.h xtsc/xtsc_mode_switch_if.h log4xtensa/log4xtensa.h ostream iomanip xtsc/xtsc_parms.h xtsc/xtsc_exception.h xtsc/xtsc_wire_write_if.h xtsc/xtsc_tx_xfer_if.h

map set vector iostream stdexcept string xtsc/xtsc_types.h

systemc

Classes
• class xtsc_xttlm2tlm2_transactor_parms
Constructor parameters for a xtsc_xttlm2tlm2_transactor object.

• class xtsc_xttlm2tlm2_transactor
Example module implementing an Xtensa TLM (xttlm) to OSCI TLM2 transactor.

• class xtsc_request_if_impl

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Implementation of xtsc_request_if.

• class tlm_bw_transport_if_impl
Implementation of tlm_bw_transport_if.

• class address_range
Class to keep track of address ranges and what DMI access has been granted/invalidated.

• class nb_mm
Class for tlm_mm_interface for nb_transport.

• class transaction_info
Class to keep track of xtsc_request, tlm_generic_payload, and xtsc_response when using
nb_transport.

Namespaces
• namespace xtsc
All xtsc library objects (non-member functions, non-member data, and classes including
xtsc_core) and their associated typedef and enum types are in the xtsc namespace.

• namespace xtsc_component
All XTSC component library objects are in the xtsc_component namespace.

8.52.1 Detailed Description

Definition in file xtsc_xttlm2tlm2_transactor.h.

Xtensa SystemC (XTSC) Reference Manual 1399

INDEX

Index

add xtsc, 56
xtsc::xtsc_parms, 746–752, 754, 755 BOOL_OUTPUT
add_bool_input xtsc, 56
xtsc_component::xtsc_module_pin_- breakpoint_interrupt
base, 729 xtsc::xtsc_core, 315
add_bool_output BURST_READ
xtsc_component::xtsc_module_pin_- xtsc::xtsc_request, 900
base, 730 BURST_WRITE
add_uint_input xtsc::xtsc_request, 900
xtsc_component::xtsc_module_pin_- byte_dump
base, 729 xtsc::xtsc_memory_b, 594
add_uint_output xtsc_component::xtsc_memory, 580
xtsc_component::xtsc_module_pin_- xtsc_component::xtsc_memory_pin,
base, 730 635
add_wide_input xtsc_component::xtsc_memory_tlm2,
xtsc_component::xtsc_module_pin_- 656
base, 729
add_wide_output change_clock_period
xtsc_component::xtsc_module_pin_-
xtsc::xtsc_core, 292
base, 731
xtsc::xtsc_udma, 1180
adjust_block_write
xtsc_component::xtsc_arbiter, 201
xtsc::xtsc_request, 906
xtsc_component::xtsc_lookup, 477
allow_callbacks_access
xtsc_component::xtsc_memory, 581
xtsc::xtsc_fast_access_request, 444
xtsc_component::xtsc_memory_tlm2,
allow_custom_callbacks_access
659
xtsc::xtsc_fast_access_request, 444
xtsc_component::xtsc_mmio, 704
allow_interface_access
xtsc_component::xtsc_router, 1019
xtsc::xtsc_fast_access_request, 443
allow_raw_access xtsc_component::xtsc_tlm22xttlm_-
xtsc::xtsc_fast_access_request, 443 transactor, 1091
arbitrate xtsc_component::xtsc_wire_logic, 1211
xtsc_component::xtsc_arbiter, 200 xtsc_component::xtsc_xttlm2tlm2_-
arbitrate_policy transactor, 1272
xtsc_component::xtsc_arbiter, 200 check_for_too_few_parameters
xtsc_component::xtsc_master, 535
BAD_DESCRIPTOR_ERROR xtsc_component::xtsc_master_tlm2,
xtsc::xtsc_udma, 1179 554
BLOCK_READ check_for_too_many_parameters
xtsc::xtsc_request, 900 xtsc_component::xtsc_master, 535
BLOCK_WRITE xtsc_component::xtsc_master_tlm2,
xtsc::xtsc_request, 900 554
BOOL_INPUT cntr_latency

1400 Xtensa SystemC (XTSC) Reference Manual

 INDEX

xtsc_component::xtsc_memory_trace, xtsc_component::xtsc_memory_tlm2,
676 658, 659
cntr_lifetime xtsc_component::xtsc_memory_trace,
xtsc_component::xtsc_memory_trace, 681–683
676 xtsc_component::xtsc_mmio, 700–703
cntr_req_beats xtsc_component::xtsc_pin2tlm_-
xtsc_component::xtsc_memory_trace, memory_transactor, 786
676 xtsc_component::xtsc_queue, 816, 817
cntr_req_busys xtsc_component::xtsc_queue_-
xtsc_component::xtsc_memory_trace, consumer, 824
676 xtsc_component::xtsc_queue_-
cntr_rsp_beats producer, 867
xtsc_component::xtsc_memory_trace, xtsc_component::xtsc_router, 1020–
676 1022
cntr_rsp_busys xtsc_component::xtsc_slave, 1074–
xtsc_component::xtsc_memory_trace, 1076
676 xtsc_component::xtsc_tlm22xttlm_-
cntr_transactions transactor, 1091, 1092
xtsc_component::xtsc_memory_trace, xtsc_component::xtsc_tlm2pin_-
676 memory_transactor, 1117–1119
cntr_type xtsc_component::xtsc_wire, 1197,
xtsc_component::xtsc_memory_trace, 1198
676 xtsc_component::xtsc_wire_logic,
coherence_t 1209–1211
xtsc::xtsc_request, 900 xtsc_component::xtsc_wire_source,
xtsc::xtsc_response, 993 1234, 1235
compute_special_response xtsc_component::xtsc_xttlm2tlm2_-
xtsc_component::xtsc_memory, 586 transactor, 1273, 1274
CONFIG connect_user_defined_port_type
xtsc::xtsc_udma, 1178 xtsc::xtsc_connection_interface, 248
conjugate_delta convert_response
xtsc, 56 xtsc_component::xtsc_arbiter, 205
connect copy_void_pointer
xtsc::xtsc_core, 301, 302 xtsc::xtsc_parms, 757
xtsc::xtsc_tx_loader, 1149 create_module
xtsc_component::xtsc_arbiter, 202– xtsc::xtsc_plugin_interface, 802
204 create_parms
xtsc_component::xtsc_lookup, 478, xtsc::xtsc_plugin_interface, 801
479 CROSS_RAM_BOUNDARY_ERROR
xtsc_component::xtsc_master, 534, xtsc::xtsc_udma, 1179
535
xtsc_component::xtsc_memory, 582– DEBUG_EXPORT
585 xtsc, 56
xtsc_component::xtsc_memory_pin, DEBUG_PORT
636 xtsc, 55

Xtensa SystemC (XTSC) Reference Manual 1401

INDEX

default_event xtsc::xtsc_core, 332

xtsc::xtsc_lookup_if, 498 dump_filtered_request
xtsc::xtsc_queue_pop_if, 849 xtsc::xtsc_core, 302
xtsc::xtsc_queue_push_if, 877 dump_filtered_response
DESCCURPTR xtsc::xtsc_core, 302
xtsc::xtsc_udma, 1178 dump_import_wires
DESCFIRSTPTR xtsc::xtsc_core, 332
xtsc::xtsc_udma, 1178 dump_input_pins
DESCLASTPTR xtsc::xtsc_core, 332
xtsc::xtsc_udma, 1178 dump_input_queues
DESCNUM xtsc::xtsc_core, 331
xtsc::xtsc_udma, 1178 dump_interface_values
DESCNUMINCR xtsc::xtsc_core, 329
xtsc::xtsc_udma, 1178 dump_last_line_info
DESTPTR xtsc::xtsc_script_file, 1063
xtsc::xtsc_udma, 1178 dump_last_read_write
direction_t xtsc_component::xtsc_master_tlm2,
xtsc::xtsc_udma, 1179 553
disassemble dump_latencies
xtsc::xtsc_core, 342 xtsc_component::xtsc_memory_trace,
documentation.h, 1283 677
dump dump_latency_histogram
xtsc::xtsc_parms, 744 xtsc_component::xtsc_memory_trace,
xtsc::xtsc_request, 920 679
xtsc::xtsc_response, 1002 dump_lifetime_histogram
xtsc::xtsc_tx_xfer, 1159 xtsc_component::xtsc_memory_trace,
dump_all_registers 680
xtsc::xtsc_core, 344 dump_lookups
dump_bool_map xtsc::xtsc_core, 331
xtsc::xtsc_parms, 747 dump_memory_interfaces
dump_by_type xtsc::xtsc_core, 330
xtsc::xtsc_parms, 744 dump_output_pins
dump_c_str_array_map xtsc::xtsc_core, 332
xtsc::xtsc_parms, 754 dump_output_queues
dump_c_str_map xtsc::xtsc_core, 331
xtsc::xtsc_parms, 753 dump_ports
dump_configuration xtsc_component::xtsc_module_pin_-
xtsc::xtsc_core, 304 base, 728
dump_core_interfaces_by_type dump_ports_and_tables
xtsc::xtsc_core, 330 xtsc::xtsc_connection_interface, 249
dump_descriptor dump_profile_results
xtsc::xtsc_udma, 1180 xtsc::xtsc_udma, 1180
dump_double_map xtsc_component::xtsc_arbiter, 202
xtsc::xtsc_parms, 748 xtsc_component::xtsc_router, 1024
dump_export_states dump_response_history

1402 Xtensa SystemC (XTSC) Reference Manual

 INDEX

xtsc_component::xtsc_master, 532 xtsc::xtsc_core, 324

dump_statistic_info enable_tracing
xtsc_component::xtsc_memory_trace, xtsc_component::xtsc_memory_trace,
678 677
dump_status error_t
xtsc::xtsc_core, 304 xtsc::xtsc_udma, 1179
dump_sysio_interfaces evaluate_lua_expression
xtsc::xtsc_core, 330 xtsc::xtsc_script_file, 1063
dump_sysio_wires EXCLUSIVE
xtsc::xtsc_core, 339 xtsc::xtsc_request, 900
dump_system_input_wires xtsc::xtsc_response, 993
xtsc::xtsc_core, 339 execute
dump_system_output_wires xtsc::xtsc_command_handler_-
xtsc::xtsc_core, 339 interface, 238
dump_tie_interfaces xtsc::xtsc_core, 296
xtsc::xtsc_core, 331 xtsc::xtsc_udma, 1181
dump_tie_interfaces_by_type xtsc_component::xtsc_arbiter, 201
xtsc::xtsc_core, 331 xtsc_component::xtsc_cache, 229
dump_transaction_id_counts xtsc_component::xtsc_dma_engine,
xtsc_component::xtsc_router, 1025 421
dump_type xtsc_component::xtsc_lookup, 478
xtsc::xtsc_parms, 745 xtsc_component::xtsc_master, 533
dump_u32_map xtsc_component::xtsc_master_tlm2,
xtsc::xtsc_parms, 750 553
dump_u32_vector_map xtsc_component::xtsc_memory, 581
xtsc::xtsc_parms, 751 xtsc_component::xtsc_memory_tlm2,
dump_value 657
xtsc::xtsc_parms, 745 xtsc_component::xtsc_memory_trace,
dump_void_pointer_map 680
xtsc::xtsc_parms, 752 xtsc_component::xtsc_mmio, 699
dump_xtsc_parms_map xtsc_component::xtsc_queue, 815
xtsc::xtsc_parms, 755 xtsc_component::xtsc_queue_-
dumpable consumer, 824
xtsc::xtsc_parms, 745 xtsc_component::xtsc_queue_-
producer, 866
enable_clock xtsc_component::xtsc_router, 1019
xtsc::xtsc_core, 327 xtsc_component::xtsc_tlm22xttlm_-
enable_cores transactor, 1091
xtsc::xtsc_core, 307 xtsc_component::xtsc_tlm2pin_-
enable_debug memory_transactor, 1117
xtsc::xtsc_core, 309 xtsc_component::xtsc_wire, 1197
enable_latency_tracking xtsc_component::xtsc_wire_logic, 1209
xtsc_component::xtsc_memory_trace, xtsc_component::xtsc_xttlm2tlm2_-
677 transactor, 1272
enable_register_tracing exists

Xtensa SystemC (XTSC) Reference Manual 1403

INDEX

xtsc::xtsc_parms, 745 xtsc::xtsc_response, 999, 1000

extract_parms get_byte_address
xtsc::xtsc_parms, 756 xtsc::xtsc_request, 905
xtsc::xtsc_response, 994
fast_access get_byte_enables
xtsc_component::xtsc_tlm2pin_- xtsc::xtsc_request, 912
memory_transactor, 1120 get_byte_size
fast_read xtsc::xtsc_request, 907
xtsc::xtsc_fast_access_request, 442 xtsc::xtsc_response, 994
fast_write get_callback_arg
xtsc::xtsc_fast_access_request, 442 xtsc::xtsc_fast_access_request, 448
get_clock_factor
get_access_type xtsc::xtsc_core, 293
xtsc::xtsc_fast_access_request, 445 get_clock_period_factor
get_access_type_c_str xtsc::xtsc_core, 293
xtsc::xtsc_fast_access_request, 445 get_clock_phase_delta_factors
get_address xtsc::xtsc_core, 353
xtsc::xtsc_fast_access_block, 433 get_coherence
xtsc::xtsc_tx_xfer, 1156 xtsc::xtsc_request, 915
get_addresses xtsc::xtsc_response, 996
xtsc_component::xtsc_memory, 587 get_commit_stage
get_all_cores xtsc::xtsc_core, 340
xtsc::xtsc_core, 351 get_config_xfer
get_all_cores_exited_event xtsc::xtsc_tx_xfer, 1156
xtsc::xtsc_core, 306 get_connection_interface
get_all_registers xtsc::xtsc_plugin_interface, 802
xtsc::xtsc_core, 343 get_control_input
get_alt_reset_vec xtsc_component::xtsc_master, 534
xtsc::xtsc_core, 344 xtsc_component::xtsc_queue_-
get_binterrupt_index producer, 866
xtsc::xtsc_core, 345 xtsc_component::xtsc_wire_source,
get_bit_width 1234
xtsc::xtsc_connection_interface, 245 get_counter
get_block_address xtsc_component::xtsc_memory_trace,
xtsc::xtsc_fast_access_block, 433 677
get_block_end_address get_custom_read_callback
xtsc::xtsc_fast_access_block, 434 xtsc::xtsc_fast_access_request, 449
get_bool_input get_custom_write_callback
xtsc_component::xtsc_module_pin_- xtsc::xtsc_fast_access_request, 449
base, 727 get_data
get_bool_output xtsc::xtsc_tx_xfer, 1156
xtsc_component::xtsc_module_pin_- get_data_from_address
base, 728 xtsc_component::xtsc_lookup, 479
get_buffer get_debug_poll_interval
xtsc::xtsc_request, 917 xtsc::xtsc_core, 313

1404 Xtensa SystemC (XTSC) Reference Manual

 INDEX

get_default_port_name get_local_block
xtsc::xtsc_connection_interface, 246 xtsc::xtsc_fast_access_request, 446
get_done get_local_memory_byte_size
xtsc::xtsc_tx_xfer, 1156 xtsc::xtsc_core, 320
get_dram_attribute get_local_memory_starting_byte_address
xtsc::xtsc_request, 908 xtsc::xtsc_core, 319
get_exclusive get_lookup
xtsc::xtsc_request, 919 xtsc::xtsc_core, 289
get_exclusive_ok get_lookup_address_bit_width
xtsc::xtsc_response, 1002 xtsc::xtsc_core, 337
get_exclusive_req get_lookup_data_bit_width
xtsc::xtsc_response, 1001 xtsc::xtsc_core, 338
get_export_state get_lookup_latency
xtsc::xtsc_core, 290 xtsc::xtsc_core, 338
get_fast_access_if get_memory_port
xtsc::xtsc_fast_access_request, 448 xtsc::xtsc_core, 294
get_hardware_address get_memory_port_name
xtsc::xtsc_request, 906 xtsc::xtsc_core, 294
get_id get_multi_port_count
xtsc::xtsc_request, 912 xtsc::xtsc_core, 317
xtsc::xtsc_response, 998 get_multi_port_zero
get_import_wire xtsc::xtsc_core, 317
xtsc::xtsc_core, 290 get_non_empty_c_str
get_input xtsc::xtsc_parms, 753
xtsc_component::xtsc_mmio, 699 get_non_zero_u32
xtsc_component::xtsc_wire_logic, 1209 xtsc::xtsc_parms, 749
get_input_pin get_nth_multi_port
xtsc::xtsc_core, 291 xtsc::xtsc_core, 318
get_input_pin_set get_num_transfers
xtsc::xtsc_core, 329 xtsc::xtsc_request, 911
get_input_queue xtsc_component::xtsc_module_pin_-
xtsc::xtsc_core, 289 base::req_cntl, 136
get_instantiation_number get_object
xtsc::xtsc_core, 307 xtsc::xtsc_connection_interface, 245
get_instr_width get_orig_raw_data
xtsc::xtsc_core, 341 xtsc::xtsc_fast_access_request, 447
get_instruction_fetch get_output
xtsc::xtsc_request, 914 xtsc_component::xtsc_mmio, 699
get_interrupt_number xtsc_component::xtsc_wire_logic, 1209
xtsc::xtsc_core, 345 get_output_pin
get_last_stage xtsc::xtsc_core, 290
xtsc::xtsc_core, 341 xtsc_component::xtsc_wire_source,
get_last_transfer 1234
xtsc::xtsc_request, 914 get_output_pin_set
xtsc::xtsc_response, 995 xtsc::xtsc_core, 329

Xtensa SystemC (XTSC) Reference Manual 1405

INDEX

get_output_queue xtsc_component::xtsc_lookup, 478

xtsc::xtsc_core, 289 get_register
get_parameter_type xtsc_component::xtsc_mmio, 704
xtsc::xtsc_parms, 746 get_register_bit_width
get_parms xtsc::xtsc_core, 344
xtsc::xtsc_core, 307 get_register_value
get_pc xtsc::xtsc_core, 342
xtsc::xtsc_core, 341 get_request_export
xtsc::xtsc_request, 916 xtsc::xtsc_core, 287
xtsc::xtsc_response, 997 get_request_port
get_pif_attribute xtsc::xtsc_core, 287, 296
xtsc::xtsc_request, 907 get_resolved_port_table
get_pif_req_domain xtsc::xtsc_connection_interface, 249
xtsc::xtsc_request, 908 get_respond_export
get_pin_bit_width xtsc::xtsc_core, 287, 296
xtsc::xtsc_core, 335 get_respond_port
get_pin_set xtsc::xtsc_core, 288
xtsc::xtsc_core, 329 get_response
get_plugin_names xtsc_component::xtsc_master, 532
xtsc::xtsc_plugin_interface, 801 get_response_block
get_port xtsc::xtsc_fast_access_request, 446
xtsc::xtsc_connection_interface, 246 get_response_history_count
get_port_and_apply_address_translation xtsc_component::xtsc_master, 533
xtsc_component::xtsc_router, 1024 get_response_history_depth
get_port_by_type xtsc_component::xtsc_master, 533
xtsc_component::xtsc_router, 1025 get_result_block
get_port_table xtsc::xtsc_fast_access_request, 446
xtsc::xtsc_connection_interface, 247 get_route_id
get_port_type xtsc::xtsc_request, 909
xtsc::xtsc_connection_interface, 245 xtsc::xtsc_response, 998
get_port_type_map get_sim_mode
xtsc::xtsc_connection_interface, 245 xtsc::xtsc_mode_switch_if, 712
get_ports get_sim_mode_switch_ready_event
xtsc_component::xtsc_memory_trace, xtsc::xtsc_mode_switch_if, 712
684 get_simcall_arg
get_priority xtsc::xtsc_core, 306
xtsc::xtsc_request, 913 get_simcall_callback_event
xtsc::xtsc_response, 999 xtsc::xtsc_core, 306
get_raw_data get_snoop_virtual_address
xtsc::xtsc_fast_access_request, 447 xtsc::xtsc_request, 916
get_read_callback get_stage_store_info
xtsc::xtsc_fast_access_request, 448 xtsc::xtsc_core, 350
get_read_data get_stall
xtsc::xtsc_tx_xfer, 1157 xtsc::xtsc_core, 326
get_ready_enable get_static_vector_select

1406 Xtensa SystemC (XTSC) Reference Manual

 INDEX

xtsc::xtsc_core, 344 xtsc::xtsc_fast_access_request, 447

get_status get_trigin_idma
xtsc::xtsc_response, 995 xtsc::xtsc_core, 325
get_status_for_testing_failures get_turbo
xtsc_component::xtsc_memory, 587 xtsc::xtsc_tx_xfer, 1157
get_status_name get_turbo_max_relaxed_cycles
xtsc::xtsc_response, 995 xtsc::xtsc_core, 354
get_stop_after_all_cores_exit get_tx_xfer_export
xtsc::xtsc_core, 305 xtsc::xtsc_core, 288
get_store_buffer_count get_tx_xfer_port
xtsc::xtsc_core, 349 xtsc::xtsc_core, 288
get_store_buffer_info get_type
xtsc::xtsc_core, 349 xtsc::xtsc_request, 910
get_summary_count get_type_name
xtsc::xtsc_core, 340 xtsc::xtsc_request, 910
get_swizzle get_types
xtsc::xtsc_fast_access_request, 447 xtsc_component::xtsc_memory_trace,
get_sysio_bit_width 684
xtsc::xtsc_core, 338 get_uint_input
get_system_input_wire xtsc_component::xtsc_module_pin_-
xtsc::xtsc_core, 291 base, 727
get_system_output_wire get_uint_output
xtsc::xtsc_core, 292 xtsc_component::xtsc_module_pin_-
get_system_ram_byte_size base, 728
xtsc::xtsc_core, 321 get_user_data
get_system_ram_starting_byte_address xtsc::xtsc_request, 918
xtsc::xtsc_core, 320 xtsc::xtsc_response, 1000
get_system_rom_byte_size get_user_data_for_logging
xtsc::xtsc_core, 321 xtsc::xtsc_request, 918
get_system_rom_starting_byte_address xtsc::xtsc_response, 1001
xtsc::xtsc_core, 320 get_user_defined_port_type
get_tag xtsc::xtsc_connection_interface, 247
xtsc::xtsc_request, 920 get_wide_input
xtsc::xtsc_response, 1002 xtsc_component::xtsc_module_pin_-
xtsc::xtsc_tx_xfer, 1157 base, 728
get_tie_bit_width get_wide_output
xtsc::xtsc_core, 337 xtsc_component::xtsc_module_pin_-
get_tie_interface_set base, 728
xtsc::xtsc_core, 328 get_words
get_tlm_output xtsc::xtsc_script_file, 1062
xtsc_component::xtsc_wire_source, get_write
1234 xtsc::xtsc_tx_xfer, 1156
get_transfer_number get_write_callback
xtsc::xtsc_request, 911 xtsc::xtsc_fast_access_request, 448
get_translated_request_address get_xfer_en

Xtensa SystemC (XTSC) Reference Manual 1407

INDEX

xtsc::xtsc_request, 915 xtsc::xtsc_connection_interface, 245

getline has_register
xtsc::xtsc_script_file, 1061 xtsc::xtsc_core, 342
has_snoop_data
has_busy xtsc::xtsc_response, 996
xtsc::xtsc_core, 319 has_sysio_wire
has_dram_attribute xtsc::xtsc_core, 339
xtsc::xtsc_request, 909 has_system_input_wire
has_export_state xtsc::xtsc_core, 339
xtsc::xtsc_core, 334 has_system_output_wire
has_import_wire xtsc::xtsc_core, 339
xtsc::xtsc_core, 333 has_tie_interface
has_input_pin xtsc::xtsc_core, 332
xtsc::xtsc_core, 334 have_all_cores_exited
has_input_queue xtsc::xtsc_core, 315
xtsc::xtsc_core, 333 help
has_lookup
xtsc::xtsc_plugin_interface, 801
xtsc::xtsc_core, 332
How_to_do_input_pin_binding
has_lookup_ready
xtsc::xtsc_core, 367
xtsc::xtsc_core, 333
How_to_do_memory_port_binding
has_memory_port
xtsc::xtsc_core, 356
xtsc::xtsc_core, 315, 316
How_to_do_output_pin_binding
has_output_pin
xtsc::xtsc_core, 366
xtsc::xtsc_core, 334
How_to_do_port_binding
has_output_queue
xtsc::xtsc_core, 333 xtsc::xtsc_core, 354
has_pin How_to_do_system_input_wire_binding
xtsc::xtsc_core, 334 xtsc::xtsc_core, 369
has_pin_level_export_state How_to_do_system_output_wire_binding
xtsc::xtsc_core, 337 xtsc::xtsc_core, 370
has_pin_level_import_wire How_to_do_tie_export_state_binding
xtsc::xtsc_core, 336 xtsc::xtsc_core, 365
has_pin_level_input_queue How_to_do_tie_import_wire_binding
xtsc::xtsc_core, 336 xtsc::xtsc_core, 365
has_pin_level_interface How_to_do_tie_lookup_binding
xtsc::xtsc_core, 335 xtsc::xtsc_core, 362
has_pin_level_lookup How_to_do_tie_queue_binding
xtsc::xtsc_core, 336 xtsc::xtsc_core, 363
has_pin_level_output_queue How_to_do_tx_xfer_port_binding
xtsc::xtsc_core, 336 xtsc::xtsc_core, 361
has_pin_level_sysio_interface How_to_get_input_and_output_ports
xtsc::xtsc_core, 335 xtsc_component::xtsc_memory_pin,
has_pin_level_tie_interface 637
xtsc::xtsc_core, 335 xtsc_component::xtsc_pin2tlm_-
has_port memory_transactor, 787

1408 Xtensa SystemC (XTSC) Reference Manual

 INDEX

xtsc_component::xtsc_tlm2pin_- is_subbanked_dram0
memory_transactor, 1120 xtsc::xtsc_core, 294
is_subbanked_dram1
Information_on_memory_interface_- xtsc::xtsc_core, 295
protocols is_tracing_enabled
xtsc::xtsc_core, 371 xtsc_component::xtsc_memory_trace,
initialize 676
xtsc::xtsc_request, 904 is_writable
INITIATOR_SOCKET_16 xtsc::xtsc_fast_access_request, 445
xtsc, 56
INITIATOR_SOCKET_32 kind
xtsc, 56 xtsc::xtsc_parms, 744
INITIATOR_SOCKET_4
load_client
xtsc, 56
xtsc::xtsc_core, 347
INITIATOR_SOCKET_64
load_client_file
xtsc, 56
xtsc::xtsc_core, 348
INITIATOR_SOCKET_8
load_file
xtsc, 56
xtsc::xtsc_core, 345
INVALID
load_initial_values
xtsc::xtsc_response, 993
xtsc::xtsc_memory_b, 595
INVALIDATE
xtsc_component::xtsc_memory, 588
xtsc::xtsc_request, 900 xtsc_component::xtsc_memory_tlm2,
is_clock_enabled 659
xtsc::xtsc_core, 327 load_program
is_dual_ported xtsc::xtsc_core, 346
xtsc::xtsc_core, 316 lock
is_fast_functional_mode xtsc::xtsc_memory_b, 595
xtsc::xtsc_core, 326 log_disassembly
is_latency_tracking_enabled xtsc::xtsc_core, 326
xtsc_component::xtsc_memory_trace, LOOKUP_EXPORT
677 xtsc, 56
is_ls_dual_port LOOKUP_PORT
xtsc::xtsc_core, 295 xtsc, 55
is_mode_switch_pending
xtsc::xtsc_mode_switch_if, 712 m_banked
is_multi_port_zero xtsc_component::xtsc_module_pin_-
xtsc::xtsc_core, 316 base, 732
is_readable m_coherence
xtsc::xtsc_fast_access_request, 446 xtsc_component::xtsc_memory_-
is_register_tracing_enabled trace::xtsc_request_if_impl, 958
xtsc::xtsc_core, 324 xtsc_component::xtsc_memory_-
is_snoop trace::xtsc_respond_if_impl, 977
xtsc::xtsc_response, 996 m_done_descriptor_deque
is_subbanked_dram xtsc_component::xtsc_dma_engine,
xtsc::xtsc_core, 295 422

Xtensa SystemC (XTSC) Reference Manual 1409

INDEX

m_req_rdy_fifo xtsc::xtsc_core, 282

xtsc_component::xtsc_pin2tlm_- MEM_DRAM0B1S03
memory_transactor, 787 xtsc::xtsc_core, 282
m_response_history_depth MEM_DRAM0B1S04
xtsc_component::xtsc_master, 536 xtsc::xtsc_core, 282
man MEM_DRAM0B1S05
xtsc::xtsc_command_handler_- xtsc::xtsc_core, 282
interface, 239 MEM_DRAM0B1S06
MEM_DRAM0B0S00 xtsc::xtsc_core, 282
xtsc::xtsc_core, 281 MEM_DRAM0B1S07
MEM_DRAM0B0S01 xtsc::xtsc_core, 282
xtsc::xtsc_core, 281 MEM_DRAM0B1S08
MEM_DRAM0B0S02 xtsc::xtsc_core, 282
xtsc::xtsc_core, 281 MEM_DRAM0B1S09
MEM_DRAM0B0S03 xtsc::xtsc_core, 282
xtsc::xtsc_core, 281 MEM_DRAM0B1S10
MEM_DRAM0B0S04 xtsc::xtsc_core, 282
xtsc::xtsc_core, 281 MEM_DRAM0B1S11
MEM_DRAM0B0S05 xtsc::xtsc_core, 282
xtsc::xtsc_core, 281 MEM_DRAM0B1S12
MEM_DRAM0B0S06 xtsc::xtsc_core, 282
xtsc::xtsc_core, 281 MEM_DRAM0B1S13
MEM_DRAM0B0S07 xtsc::xtsc_core, 282
xtsc::xtsc_core, 281 MEM_DRAM0B1S14
MEM_DRAM0B0S08 xtsc::xtsc_core, 282
xtsc::xtsc_core, 281 MEM_DRAM0B1S15
MEM_DRAM0B0S09 xtsc::xtsc_core, 282
xtsc::xtsc_core, 281 MEM_DRAM0B2S00
MEM_DRAM0B0S10 xtsc::xtsc_core, 282
xtsc::xtsc_core, 281 MEM_DRAM0B2S01
MEM_DRAM0B0S11 xtsc::xtsc_core, 282
xtsc::xtsc_core, 282 MEM_DRAM0B2S02
MEM_DRAM0B0S12 xtsc::xtsc_core, 282
xtsc::xtsc_core, 282 MEM_DRAM0B2S03
MEM_DRAM0B0S13 xtsc::xtsc_core, 282
xtsc::xtsc_core, 282 MEM_DRAM0B2S04
MEM_DRAM0B0S14 xtsc::xtsc_core, 282
xtsc::xtsc_core, 282 MEM_DRAM0B2S05
MEM_DRAM0B0S15 xtsc::xtsc_core, 282
xtsc::xtsc_core, 282 MEM_DRAM0B2S06
MEM_DRAM0B1S00 xtsc::xtsc_core, 282
xtsc::xtsc_core, 282 MEM_DRAM0B2S07
MEM_DRAM0B1S01 xtsc::xtsc_core, 282
xtsc::xtsc_core, 282 MEM_DRAM0B2S08
MEM_DRAM0B1S02 xtsc::xtsc_core, 282

1410 Xtensa SystemC (XTSC) Reference Manual

 INDEX

MEM_DRAM0B2S09 xtsc::xtsc_core, 283

xtsc::xtsc_core, 282 MEM_DRAM0DMARD
MEM_DRAM0B2S10 xtsc::xtsc_core, 281
xtsc::xtsc_core, 282 MEM_DRAM0DMAWR
MEM_DRAM0B2S11 xtsc::xtsc_core, 281
xtsc::xtsc_core, 282 MEM_DRAM0LS0RD
MEM_DRAM0B2S12 xtsc::xtsc_core, 281
xtsc::xtsc_core, 282 MEM_DRAM0LS0WR
MEM_DRAM0B2S13 xtsc::xtsc_core, 281
xtsc::xtsc_core, 283 MEM_DRAM0LS1RD
MEM_DRAM0B2S14 xtsc::xtsc_core, 281
xtsc::xtsc_core, 283 MEM_DRAM0LS1WR
MEM_DRAM0B2S15 xtsc::xtsc_core, 281
xtsc::xtsc_core, 283 MEM_DRAM0LS2RD
MEM_DRAM0B3S00 xtsc::xtsc_core, 281
xtsc::xtsc_core, 283 MEM_DRAM0LS2WR
MEM_DRAM0B3S01 xtsc::xtsc_core, 281
xtsc::xtsc_core, 283 MEM_DRAM0P0
MEM_DRAM0B3S02 xtsc::xtsc_core, 281
xtsc::xtsc_core, 283 MEM_DRAM0P1
MEM_DRAM0B3S03 xtsc::xtsc_core, 281
xtsc::xtsc_core, 283 MEM_DRAM0P2
MEM_DRAM0B3S04 xtsc::xtsc_core, 281
xtsc::xtsc_core, 283 MEM_DRAM0P3
MEM_DRAM0B3S05 xtsc::xtsc_core, 281
xtsc::xtsc_core, 283 MEM_DRAM1B0S00
MEM_DRAM0B3S06 xtsc::xtsc_core, 283
xtsc::xtsc_core, 283 MEM_DRAM1B0S01
MEM_DRAM0B3S07 xtsc::xtsc_core, 283
xtsc::xtsc_core, 283 MEM_DRAM1B0S02
MEM_DRAM0B3S08 xtsc::xtsc_core, 283
xtsc::xtsc_core, 283 MEM_DRAM1B0S03
MEM_DRAM0B3S09 xtsc::xtsc_core, 284
xtsc::xtsc_core, 283 MEM_DRAM1B0S04
MEM_DRAM0B3S10 xtsc::xtsc_core, 284
xtsc::xtsc_core, 283 MEM_DRAM1B0S05
MEM_DRAM0B3S11 xtsc::xtsc_core, 284
xtsc::xtsc_core, 283 MEM_DRAM1B0S06
MEM_DRAM0B3S12 xtsc::xtsc_core, 284
xtsc::xtsc_core, 283 MEM_DRAM1B0S07
MEM_DRAM0B3S13 xtsc::xtsc_core, 284
xtsc::xtsc_core, 283 MEM_DRAM1B0S08
MEM_DRAM0B3S14 xtsc::xtsc_core, 284
xtsc::xtsc_core, 283 MEM_DRAM1B0S09
MEM_DRAM0B3S15 xtsc::xtsc_core, 284

Xtensa SystemC (XTSC) Reference Manual 1411

INDEX

MEM_DRAM1B0S10 xtsc::xtsc_core, 284

xtsc::xtsc_core, 284 MEM_DRAM1B2S01
MEM_DRAM1B0S11 xtsc::xtsc_core, 284
xtsc::xtsc_core, 284 MEM_DRAM1B2S02
MEM_DRAM1B0S12 xtsc::xtsc_core, 284
xtsc::xtsc_core, 284 MEM_DRAM1B2S03
MEM_DRAM1B0S13 xtsc::xtsc_core, 284
xtsc::xtsc_core, 284 MEM_DRAM1B2S04
MEM_DRAM1B0S14 xtsc::xtsc_core, 284
xtsc::xtsc_core, 284 MEM_DRAM1B2S05
MEM_DRAM1B0S15 xtsc::xtsc_core, 285
xtsc::xtsc_core, 284 MEM_DRAM1B2S06
MEM_DRAM1B1S00 xtsc::xtsc_core, 285
xtsc::xtsc_core, 284 MEM_DRAM1B2S07
MEM_DRAM1B1S01 xtsc::xtsc_core, 285
xtsc::xtsc_core, 284 MEM_DRAM1B2S08
MEM_DRAM1B1S02 xtsc::xtsc_core, 285
xtsc::xtsc_core, 284 MEM_DRAM1B2S09
MEM_DRAM1B1S03 xtsc::xtsc_core, 285
xtsc::xtsc_core, 284 MEM_DRAM1B2S10
MEM_DRAM1B1S04 xtsc::xtsc_core, 285
xtsc::xtsc_core, 284 MEM_DRAM1B2S11
MEM_DRAM1B1S05 xtsc::xtsc_core, 285
xtsc::xtsc_core, 284 MEM_DRAM1B2S12
MEM_DRAM1B1S06 xtsc::xtsc_core, 285
xtsc::xtsc_core, 284 MEM_DRAM1B2S13
MEM_DRAM1B1S07 xtsc::xtsc_core, 285
xtsc::xtsc_core, 284 MEM_DRAM1B2S14
MEM_DRAM1B1S08 xtsc::xtsc_core, 285
xtsc::xtsc_core, 284 MEM_DRAM1B2S15
MEM_DRAM1B1S09 xtsc::xtsc_core, 285
xtsc::xtsc_core, 284 MEM_DRAM1B3S00
MEM_DRAM1B1S10 xtsc::xtsc_core, 285
xtsc::xtsc_core, 284 MEM_DRAM1B3S01
MEM_DRAM1B1S11 xtsc::xtsc_core, 285
xtsc::xtsc_core, 284 MEM_DRAM1B3S02
MEM_DRAM1B1S12 xtsc::xtsc_core, 285
xtsc::xtsc_core, 284 MEM_DRAM1B3S03
MEM_DRAM1B1S13 xtsc::xtsc_core, 285
xtsc::xtsc_core, 284 MEM_DRAM1B3S04
MEM_DRAM1B1S14 xtsc::xtsc_core, 285
xtsc::xtsc_core, 284 MEM_DRAM1B3S05
MEM_DRAM1B1S15 xtsc::xtsc_core, 285
xtsc::xtsc_core, 284 MEM_DRAM1B3S06
MEM_DRAM1B2S00 xtsc::xtsc_core, 285

1412 Xtensa SystemC (XTSC) Reference Manual

 INDEX

MEM_DRAM1B3S07 xtsc::xtsc_core, 285

xtsc::xtsc_core, 285 MEM_DROM0P2
MEM_DRAM1B3S08 xtsc::xtsc_core, 285
xtsc::xtsc_core, 285 MEM_DROM0P3
MEM_DRAM1B3S09 xtsc::xtsc_core, 285
xtsc::xtsc_core, 285 MEM_IDMA0
MEM_DRAM1B3S10 xtsc::xtsc_core, 286
xtsc::xtsc_core, 285 MEM_IRAM0
MEM_DRAM1B3S11 xtsc::xtsc_core, 285
xtsc::xtsc_core, 285 MEM_IRAM1
MEM_DRAM1B3S12 xtsc::xtsc_core, 285
xtsc::xtsc_core, 285 MEM_IROM0
MEM_DRAM1B3S13 xtsc::xtsc_core, 285
xtsc::xtsc_core, 285 MEM_PIF
MEM_DRAM1B3S14 xtsc::xtsc_core, 286
xtsc::xtsc_core, 285 MEM_URAM0
MEM_DRAM1B3S15 xtsc::xtsc_core, 286
xtsc::xtsc_core, 285 MEM_XLMI0P0
MEM_DRAM1DMARD xtsc::xtsc_core, 286
xtsc::xtsc_core, 283 MEM_XLMI0P1
MEM_DRAM1DMAWR
xtsc::xtsc_core, 286
xtsc::xtsc_core, 283
memory_port
MEM_DRAM1LS0RD
xtsc::xtsc_core, 281
xtsc::xtsc_core, 283
MODIFIED
MEM_DRAM1LS0WR
xtsc::xtsc_response, 993
xtsc::xtsc_core, 283
MEM_DRAM1LS1RD
xtsc::xtsc_core, 283 nb_can_pop
MEM_DRAM1LS1WR xtsc::xtsc_queue_pop_if, 848
xtsc::xtsc_core, 283 xtsc::xtsc_tx_loader::xtsc_queue_-
MEM_DRAM1LS2RD pop_if_impl, 851
xtsc::xtsc_core, 283 xtsc_component::xtsc_queue::xtsc_-
MEM_DRAM1LS2WR queue_pop_if_impl, 854
xtsc::xtsc_core, 283 xtsc_component::xtsc_queue::xtsc_-
MEM_DRAM1P0 queue_pop_if_multi_impl, 857
xtsc::xtsc_core, 283 xtsc_component::xtsc_queue_-
MEM_DRAM1P1 consumer, 824
xtsc::xtsc_core, 283 nb_can_push
MEM_DRAM1P2 xtsc::xtsc_queue_push_if, 876
xtsc::xtsc_core, 283 xtsc::xtsc_tx_loader::xtsc_queue_-
MEM_DRAM1P3 push_if_impl, 880
xtsc::xtsc_core, 283 xtsc_component::xtsc_queue::xtsc_-
MEM_DROM0P0 queue_push_if_impl, 883
xtsc::xtsc_core, 285 xtsc_component::xtsc_queue::xtsc_-
MEM_DROM0P1 queue_push_if_multi_impl, 886

Xtensa SystemC (XTSC) Reference Manual 1413

INDEX

xtsc_component::xtsc_queue_- xtsc::xtsc_tlm2pin_wire_transactor_-
producer, 867 base, 1136
nb_fast_access xtsc::xtsc_tx_loader::xtsc_queue_-
xtsc::xtsc_debug_if, 396 pop_if_impl, 851
xtsc_component::xtsc_arbiter::xtsc_- xtsc::xtsc_tx_loader::xtsc_queue_-
request_if_impl, 951 push_if_impl, 880
xtsc_component::xtsc_memory::xtsc_- xtsc::xtsc_wire_read_if, 1225
request_if_impl, 934 xtsc::xtsc_wire_write_if, 1243
xtsc_component::xtsc_memory_- xtsc_component::xtsc_master::xtsc_-
pin::xtsc_debug_if_impl, 404 wire_write_if_impl, 1257
xtsc_component::xtsc_memory_- xtsc_component::xtsc_mmio::input_-
trace::xtsc_request_if_impl, 957 definition::xtsc_wire_write_if_impl,
xtsc_component::xtsc_mmio::xtsc_- 1254
request_if_impl, 938 xtsc_component::xtsc_queue::xtsc_-
xtsc_component::xtsc_pin2tlm_- queue_pop_if_impl, 854
memory_transactor::xtsc_debug_- xtsc_component::xtsc_queue::xtsc_-
if_impl, 408 queue_pop_if_multi_impl, 858
xtsc_component::xtsc_router::xtsc_- xtsc_component::xtsc_queue::xtsc_-
request_if_impl, 946 queue_push_if_impl, 883
xtsc_component::xtsc_tlm2pin_- xtsc_component::xtsc_queue::xtsc_-
memory_transactor::xtsc_debug_- queue_push_if_multi_impl, 887
if_cap, 401 xtsc_component::xtsc_queue_-
xtsc_component::xtsc_tlm2pin_- consumer, 825
memory_transactor::xtsc_- xtsc_component::xtsc_queue_-
request_if_impl, 929 producer, 869
xtsc_component::xtsc_xttlm2tlm2_- xtsc_component::xtsc_queue_-
transactor::xtsc_request_if_impl, producer::xtsc_wire_write_if_impl,
942 1246
nb_fast_access_read xtsc_component::xtsc_wire, 1199
xtsc::xtsc_fast_access_if, 435 xtsc_component::xtsc_wire_-
nb_fast_access_write logic::input_definition::xtsc_-
xtsc::xtsc_fast_access_if, 436 wire_write_if_impl, 1249
nb_get_address_bit_width xtsc_component::xtsc_wire_source,
xtsc::xtsc_lookup_if, 497 1236
xtsc::xtsc_udma::xtsc_rer_lookup_if_- xtsc_component::xtsc_wire_-
impl, 961 source::xtsc_wire_write_if_impl,
xtsc::xtsc_udma::xtsc_wer_lookup_if_- 1251
impl, 1190 nb_get_data
xtsc_component::xtsc_lookup::xtsc_- xtsc::xtsc_lookup_if, 497
lookup_if_impl, 501 xtsc::xtsc_udma::xtsc_rer_lookup_if_-
xtsc_component::xtsc_lookup_driver, impl, 961
489 xtsc::xtsc_udma::xtsc_wer_lookup_if_-
nb_get_bit_width impl, 1190
xtsc::xtsc_queue_pop_if, 849 xtsc_component::xtsc_lookup::xtsc_-
xtsc::xtsc_queue_push_if, 877 lookup_if_impl, 500

1414 Xtensa SystemC (XTSC) Reference Manual

 INDEX

xtsc_component::xtsc_lookup_driver, xtsc_component::xtsc_tlm2pin_-
488 memory_transactor::xtsc_-
nb_get_data_bit_width request_if_impl, 930
xtsc::xtsc_lookup_if, 498 xtsc_component::xtsc_xttlm2tlm2_-
xtsc::xtsc_udma::xtsc_rer_lookup_if_- transactor::xtsc_request_if_impl,
impl, 961 942
xtsc::xtsc_udma::xtsc_wer_lookup_if_- nb_peek
impl, 1190 xtsc::xtsc_debug_if, 395
xtsc_component::xtsc_lookup::xtsc_- xtsc_component::xtsc_arbiter::xtsc_-
lookup_if_impl, 501 request_if_impl, 950
xtsc_component::xtsc_lookup_driver, xtsc_component::xtsc_memory::xtsc_-
489 request_if_impl, 934
nb_is_ready xtsc_component::xtsc_memory_-
xtsc::xtsc_lookup_if, 496 pin::xtsc_debug_if_impl, 403
xtsc::xtsc_udma::xtsc_rer_lookup_if_- xtsc_component::xtsc_memory_-
impl, 960 trace::xtsc_request_if_impl, 956
xtsc::xtsc_udma::xtsc_wer_lookup_if_- xtsc_component::xtsc_mmio::xtsc_-
impl, 1189 request_if_impl, 938
xtsc_component::xtsc_lookup::xtsc_- xtsc_component::xtsc_pin2tlm_-
lookup_if_impl, 500 memory_transactor::xtsc_debug_-
xtsc_component::xtsc_lookup_driver, if_impl, 407
488 xtsc_component::xtsc_router::xtsc_-
nb_load_retired request_if_impl, 945
xtsc::xtsc_request_if, 925 xtsc_component::xtsc_tlm2pin_-
xtsc_component::xtsc_arbiter::xtsc_- memory_transactor::xtsc_debug_-
request_if_impl, 951 if_cap, 400
xtsc_component::xtsc_memory::xtsc_- xtsc_component::xtsc_tlm2pin_-
request_if_impl, 935 memory_transactor::xtsc_-
xtsc_component::xtsc_memory_- request_if_impl, 929
trace::xtsc_request_if_impl, 957 xtsc_component::xtsc_xttlm2tlm2_-
xtsc_component::xtsc_router::xtsc_- transactor::xtsc_request_if_impl,
request_if_impl, 947 942
xtsc_component::xtsc_tlm2pin_- nb_peek_coherent
memory_transactor::xtsc_- xtsc::xtsc_debug_if, 397
request_if_impl, 930 xtsc_component::xtsc_arbiter::xtsc_-
nb_lock request_if_impl, 950
xtsc::xtsc_request_if, 925 xtsc_component::xtsc_memory_-
xtsc_component::xtsc_arbiter::xtsc_- trace::xtsc_request_if_impl, 957
request_if_impl, 951 xtsc_component::xtsc_pin2tlm_-
xtsc_component::xtsc_memory::xtsc_- memory_transactor::xtsc_debug_-
request_if_impl, 935 if_impl, 407
xtsc_component::xtsc_memory_- xtsc_component::xtsc_router::xtsc_-
trace::xtsc_request_if_impl, 958 request_if_impl, 946
xtsc_component::xtsc_router::xtsc_- nb_poke
request_if_impl, 947 xtsc::xtsc_debug_if, 396

Xtensa SystemC (XTSC) Reference Manual 1415

INDEX

xtsc_component::xtsc_arbiter::xtsc_- nb_push
request_if_impl, 950 xtsc::xtsc_queue_push_if, 876
xtsc_component::xtsc_memory::xtsc_- xtsc::xtsc_tx_loader::xtsc_queue_-
request_if_impl, 934 push_if_impl, 880
xtsc_component::xtsc_memory_- xtsc_component::xtsc_queue::xtsc_-
pin::xtsc_debug_if_impl, 404 queue_push_if_impl, 883
xtsc_component::xtsc_memory_- xtsc_component::xtsc_queue::xtsc_-
trace::xtsc_request_if_impl, 956 queue_push_if_multi_impl, 886
xtsc_component::xtsc_mmio::xtsc_- xtsc_component::xtsc_queue_-
request_if_impl, 938 producer, 868
xtsc_component::xtsc_pin2tlm_- nb_read
memory_transactor::xtsc_debug_- xtsc::xtsc_wire_read_if, 1225
if_impl, 407 xtsc_component::xtsc_wire, 1199
xtsc_component::xtsc_router::xtsc_- nb_request
request_if_impl, 946 xtsc::xtsc_request_if, 924
xtsc_component::xtsc_tlm2pin_- xtsc_component::xtsc_arbiter::xtsc_-
memory_transactor::xtsc_debug_- request_if_impl, 950
if_cap, 400 xtsc_component::xtsc_memory::xtsc_-
xtsc_component::xtsc_tlm2pin_- request_if_impl, 934
memory_transactor::xtsc_- xtsc_component::xtsc_memory_-
request_if_impl, 929 trace::xtsc_request_if_impl, 957
xtsc_component::xtsc_xttlm2tlm2_- xtsc_component::xtsc_mmio::xtsc_-
transactor::xtsc_request_if_impl, request_if_impl, 938
942 xtsc_component::xtsc_router::xtsc_-
nb_poke_coherent request_if_impl, 946
xtsc::xtsc_debug_if, 397 xtsc_component::xtsc_tlm2pin_-
xtsc_component::xtsc_arbiter::xtsc_- memory_transactor::xtsc_-
request_if_impl, 951 request_if_impl, 930
xtsc_component::xtsc_memory_- xtsc_component::xtsc_xttlm2tlm2_-
trace::xtsc_request_if_impl, 957 transactor::xtsc_request_if_impl,
xtsc_component::xtsc_pin2tlm_- 942
memory_transactor::xtsc_debug_- nb_respond
if_impl, 407 xtsc::xtsc_respond_if, 967
xtsc_component::xtsc_router::xtsc_- xtsc::xtsc_udma::xtsc_pif_respond_if_-
request_if_impl, 946 impl, 760
nb_pop xtsc::xtsc_udma::xtsc_ram_respond_-
xtsc::xtsc_queue_pop_if, 848 if_impl, 889
xtsc::xtsc_tx_loader::xtsc_queue_- xtsc_component::xtsc_arbiter::xtsc_-
pop_if_impl, 851 respond_if_impl, 979
xtsc_component::xtsc_queue::xtsc_- xtsc_component::xtsc_cache::xtsc_-
queue_pop_if_impl, 854 respond_if_impl, 984
xtsc_component::xtsc_queue::xtsc_- xtsc_component::xtsc_dma_-
queue_pop_if_multi_impl, 857 engine::xtsc_respond_if_impl,
xtsc_component::xtsc_queue_- 986
consumer, 825 xtsc_component::xtsc_memory_-

1416 Xtensa SystemC (XTSC) Reference Manual

 INDEX

trace::xtsc_respond_if_impl, 977 xtsc_component::xtsc_queue_-

xtsc_component::xtsc_pin2tlm_- producer::xtsc_wire_write_if_impl,
memory_transactor::xtsc_- 1245
respond_if_impl, 982 xtsc_component::xtsc_wire, 1198
xtsc_component::xtsc_router::xtsc_- xtsc_component::xtsc_wire_-
respond_if_impl, 972 logic::input_definition::xtsc_-
xtsc_component::xtsc_tlm22xttlm_- wire_write_if_impl, 1248
transactor::xtsc_respond_if_impl, xtsc_component::xtsc_wire_source,
970 1235
nb_retire_flush xtsc_component::xtsc_wire_-
xtsc::xtsc_request_if, 925 source::xtsc_wire_write_if_impl,
xtsc_component::xtsc_arbiter::xtsc_- 1251
request_if_impl, 951 NONCOHERENT
xtsc_component::xtsc_memory::xtsc_- xtsc::xtsc_request, 900
request_if_impl, 935 xtsc::xtsc_response, 993
xtsc_component::xtsc_memory_- num_available
trace::xtsc_request_if_impl, 958 xtsc_component::xtsc_queue, 814
xtsc_component::xtsc_router::xtsc_- num_free
request_if_impl, 947 xtsc_component::xtsc_queue, 814
xtsc_component::xtsc_tlm2pin_- NUMREGS
memory_transactor::xtsc_- xtsc::xtsc_udma, 1179
request_if_impl, 930
nb_send_address operator<<
xtsc::xtsc_lookup_if, 496 xtsc, 93, 94
xtsc::xtsc_udma::xtsc_rer_lookup_if_- operator++
impl, 960 xtsc, 93
xtsc::xtsc_udma::xtsc_wer_lookup_if_- optionally_get_coherence
impl, 1189 xtsc_component::xtsc_master, 535
xtsc_component::xtsc_lookup::xtsc_- xtsc_component::xtsc_slave, 1076
lookup_if_impl, 500
xtsc_component::xtsc_lookup_driver, PARM_TYPE_BOOL
487 xtsc::xtsc_parms, 743
nb_tx_xfer PARM_TYPE_C_STR
xtsc::xtsc_tx_loader::xtsc_tx_xfer_if_- xtsc::xtsc_parms, 743
impl, 1163 PARM_TYPE_C_STR_ARRAY
xtsc::xtsc_tx_xfer_if, 1160 xtsc::xtsc_parms, 743
nb_write PARM_TYPE_DOUBLE
xtsc::xtsc_tlm2pin_wire_transactor_- xtsc::xtsc_parms, 743
base, 1136 PARM_TYPE_U32
xtsc::xtsc_wire_write_if, 1243 xtsc::xtsc_parms, 743
xtsc_component::xtsc_master::xtsc_- PARM_TYPE_U32_VECTOR
wire_write_if_impl, 1257 xtsc::xtsc_parms, 743
xtsc_component::xtsc_mmio::input_- PARM_TYPE_VOID_POINTER
definition::xtsc_wire_write_if_impl, xtsc::xtsc_parms, 743
1254 PARM_TYPE_XTSC_PARMS

Xtensa SystemC (XTSC) Reference Manual 1417

INDEX

xtsc::xtsc_parms, 743 xtsc_component::xtsc_tlm2pin_-

parse_operand memory_transactor, 1120
xtsc_component::xtsc_wire_logic, 1212 poke_physical
parse_port_name_and_bit_width xtsc::xtsc_core, 322
xtsc_component::xtsc_module_pin_- poke_virtual
base, 731 xtsc::xtsc_core, 323
peek PORT_TABLE
xtsc::xtsc_memory_b, 593 xtsc, 57
xtsc_component::xtsc_lookup, 479 prepare_to_switch_sim_mode
xtsc_component::xtsc_memory, 579 xtsc::xtsc_mode_switch_if, 711
xtsc_component::xtsc_memory_pin,
634 QUEUE_POP_EXPORT
xtsc_component::xtsc_memory_tlm2, xtsc, 56
656 QUEUE_POP_PORT
xtsc_component::xtsc_queue, 814 xtsc, 56
xtsc_component::xtsc_tlm2pin_- QUEUE_PUSH_EXPORT
memory_transactor, 1120 xtsc, 56
peek_dtlb QUEUE_PUSH_PORT
xtsc::xtsc_core, 323 xtsc, 56
peek_itlb
RAM2PIF
xtsc::xtsc_core, 323
xtsc::xtsc_udma, 1179
peek_physical
RAM2RAM
xtsc::xtsc_core, 321
xtsc::xtsc_udma, 1179
peek_virtual
RCW
xtsc::xtsc_core, 322
xtsc::xtsc_request, 900
PIF2PIF READ
xtsc::xtsc_udma, 1179 xtsc::xtsc_request, 900
PIF2RAM register_address_map
xtsc::xtsc_udma, 1179 xtsc::xtsc_udma, 1178
PIF_ADDRESS_DATA_ERROR remove_address_range
xtsc::xtsc_udma, 1179 xtsc::xtsc_fast_access_block, 432
PIF_ADDRESS_ERROR xtsc::xtsc_fast_access_request, 444
xtsc::xtsc_udma, 1179 REQ_ALL
PIF_DATA_ERROR xtsc_component::xtsc_memory, 579
xtsc::xtsc_udma, 1179 REQ_BLOCK_READ
poke xtsc_component::xtsc_memory, 578
xtsc::xtsc_memory_b, 594 REQ_BLOCK_WRITE_1
xtsc_component::xtsc_lookup, 479 xtsc_component::xtsc_memory, 578
xtsc_component::xtsc_memory, 579 REQ_BLOCK_WRITE_10
xtsc_component::xtsc_memory_pin, xtsc_component::xtsc_memory, 578
634 REQ_BLOCK_WRITE_11
xtsc_component::xtsc_memory_tlm2, xtsc_component::xtsc_memory, 578
656 REQ_BLOCK_WRITE_12
xtsc_component::xtsc_queue, 815 xtsc_component::xtsc_memory, 578

1418 Xtensa SystemC (XTSC) Reference Manual

 INDEX

REQ_BLOCK_WRITE_13 xtsc_component::xtsc_memory, 578

xtsc_component::xtsc_memory, 578 REQ_RCW_2
REQ_BLOCK_WRITE_14 xtsc_component::xtsc_memory, 578
xtsc_component::xtsc_memory, 578 REQ_READ
REQ_BLOCK_WRITE_15 xtsc_component::xtsc_memory, 578
xtsc_component::xtsc_memory, 578 REQ_WRITE
REQ_BLOCK_WRITE_16 xtsc_component::xtsc_memory, 578
xtsc_component::xtsc_memory, 579 REQUEST_EXPORT
REQ_BLOCK_WRITE_2 xtsc, 56
xtsc_component::xtsc_memory, 578 REQUEST_PORT
REQ_BLOCK_WRITE_3 xtsc, 55
xtsc_component::xtsc_memory, 578 request_type_t
REQ_BLOCK_WRITE_4 xtsc_component::xtsc_memory, 578
xtsc_component::xtsc_memory, 578 reset
REQ_BLOCK_WRITE_5 xtsc::xtsc_module, 717
xtsc_component::xtsc_memory, 578 xtsc_component::xtsc_memory_pin,
REQ_BLOCK_WRITE_6 636
xtsc_component::xtsc_memory, 578 xtsc_component::xtsc_pin2tlm_-
REQ_BLOCK_WRITE_7 memory_transactor, 787
xtsc_component::xtsc_memory, 578 xtsc_component::xtsc_tlm2pin_-
REQ_BLOCK_WRITE_8 memory_transactor, 1120
xtsc_component::xtsc_memory, 578 reset_address
REQ_BLOCK_WRITE_9 xtsc::xtsc_fast_access_block, 433
xtsc_component::xtsc_memory, 578 RESPOND_EXPORT
REQ_BURST_READ xtsc, 56
xtsc_component::xtsc_memory, 578 RESPOND_PORT
REQ_BURST_WRITE_1 xtsc, 55
xtsc_component::xtsc_memory, 578 restrict_to_block
REQ_BURST_WRITE_2 xtsc::xtsc_fast_access_block, 433
xtsc_component::xtsc_memory, 578 xtsc::xtsc_fast_access_request, 445
REQ_BURST_WRITE_3 revoke_fast_access
xtsc_component::xtsc_memory, 578 xtsc::xtsc_fast_access_revocation_if,
REQ_BURST_WRITE_4 450
xtsc_component::xtsc_memory, 578 RSP_ADDRESS_DATA_ERROR
REQ_BURST_WRITE_5 xtsc::xtsc_response, 993
xtsc_component::xtsc_memory, 578 RSP_ADDRESS_ERROR
REQ_BURST_WRITE_6 xtsc::xtsc_response, 993
xtsc_component::xtsc_memory, 578 RSP_DATA_ERROR
REQ_BURST_WRITE_7 xtsc::xtsc_response, 993
xtsc_component::xtsc_memory, 578 RSP_NACC
REQ_BURST_WRITE_8 xtsc::xtsc_response, 993
xtsc_component::xtsc_memory, 578 RSP_OK
REQ_NONE xtsc::xtsc_response, 993
xtsc_component::xtsc_memory, 579
REQ_RCW_1 sc_command_handler_commands

Xtensa SystemC (XTSC) Reference Manual 1419

INDEX

xtsc, 95 set_exclusive_ok
sc_core::sc_unwind_exception, 159 xtsc::xtsc_response, 1002
send_client_command set_id
xtsc::xtsc_core, 348 xtsc::xtsc_request, 912
set xtsc::xtsc_response, 998
xtsc::xtsc_parms, 746, 747, 749, 750, set_instruction_fetch
752–755 xtsc::xtsc_request, 914
set_alt_reset_vec set_interrupt
xtsc::xtsc_core, 345 xtsc::xtsc_core, 328
set_breakpoint_callback set_last_transfer
xtsc::xtsc_core, 314 xtsc::xtsc_request, 913
set_buffer xtsc::xtsc_response, 995
xtsc::xtsc_request, 917 set_multiple_registers
xtsc::xtsc_response, 999 xtsc::xtsc_core, 343
set_byte_address set_num_transfers
xtsc::xtsc_request, 905 xtsc::xtsc_request, 910
set_byte_enables set_pc
xtsc::xtsc_request, 912 xtsc::xtsc_core, 341
set_byte_size xtsc::xtsc_request, 916
xtsc::xtsc_request, 907 xtsc::xtsc_response, 997
set_clock_phase_delta_factors set_pif_attribute
xtsc::xtsc_core, 351 xtsc::xtsc_request, 907
set_coherence set_pif_req_domain
xtsc::xtsc_request, 915 xtsc::xtsc_request, 908
xtsc::xtsc_response, 996 set_priority
set_config_xfer xtsc::xtsc_request, 913
xtsc::xtsc_tx_xfer, 1158 xtsc::xtsc_response, 998
set_data set_read_data
xtsc::xtsc_tx_xfer, 1158 xtsc::xtsc_tx_xfer, 1158
set_debug_poll_interval set_ready_enable
xtsc::xtsc_core, 312 xtsc_component::xtsc_lookup, 477
set_debugger_connect_callback set_register_value
xtsc::xtsc_core, 313 xtsc::xtsc_core, 343
set_debugger_disconnect_callback set_response_history_depth
xtsc::xtsc_core, 313 xtsc_component::xtsc_master, 533
set_debugger_resume_callback set_route_id
xtsc::xtsc_core, 314 xtsc::xtsc_request, 909
set_done xtsc::xtsc_response, 997
xtsc::xtsc_tx_xfer, 1157 set_sim_mode_switch_callback
set_dram_attribute xtsc::xtsc_core, 308
xtsc::xtsc_request, 908 set_simcall_callback
set_dumpable xtsc::xtsc_core, 307
xtsc::xtsc_parms, 758 set_simcall_return_value
set_exclusive xtsc::xtsc_core, 306
xtsc::xtsc_request, 919 set_snoop_data

1420 Xtensa SystemC (XTSC) Reference Manual

 INDEX

xtsc::xtsc_response, 996 xtsc::xtsc_core, 280

set_snoop_virtual_address SNOOP
xtsc::xtsc_request, 916 xtsc::xtsc_request, 900
set_stall SRCPTR
xtsc::xtsc_core, 325 xtsc::xtsc_udma, 1178
set_static_vector_select STATUS
xtsc::xtsc_core, 344 xtsc::xtsc_udma, 1178
set_status status_t
xtsc::xtsc_response, 994 xtsc::xtsc_response, 993
set_stop_after_all_cores_exit step
xtsc::xtsc_core, 305 xtsc::xtsc_core, 327
set_trigin_idma summary
xtsc::xtsc_core, 325 xtsc::xtsc_core, 328
set_turbo support_exclusive
xtsc::xtsc_tx_xfer, 1159 xtsc_component::xtsc_memory, 581
xtsc_component::xtsc_dma_engine, switch_sim_mode
421 xtsc::xtsc_mode_switch_if, 711
set_turbo_max_relaxed_cycles swizzle_buffer
xtsc::xtsc_core, 354 xtsc_component::xtsc_mmio, 704
set_type
xtsc::xtsc_request, 910 TARGET_SOCKET_16
set_user_data xtsc, 57
xtsc::xtsc_request, 918 TARGET_SOCKET_32
xtsc::xtsc_response, 1000 xtsc, 57
set_write TARGET_SOCKET_4
xtsc::xtsc_tx_xfer, 1158 xtsc, 56
set_xfer_en TARGET_SOCKET_64
xtsc::xtsc_request, 915 xtsc, 57
setup_debug TARGET_SOCKET_8
xtsc::xtsc_core, 310 xtsc, 56
setup_false_error_responses tlm_fw_transport_if_impl
xtsc_component::xtsc_memory, 586 xtsc_component::xtsc_memory_-
setup_multicore_debug tlm2::tlm_fw_transport_if_impl,
xtsc::xtsc_core, 311 172
setup_random_rsp_nacc_responses xtsc_component::xtsc_tlm22xttlm_-
xtsc_component::xtsc_arbiter, 201 transactor::tlm_fw_transport_if_-
SHARED impl, 170
xtsc::xtsc_request, 900 translate_request_address
xtsc::xtsc_response, 993 xtsc::xtsc_fast_access_request, 443
show_data translate_virtual
xtsc::xtsc_request, 921 xtsc::xtsc_core, 324
xtsc::xtsc_response, 1003 TX_XFER_EXPORT
sim_mode_switch_callback xtsc, 56
xtsc::xtsc_core, 280 TX_XFER_PORT
simcall_callback xtsc, 56

Xtensa SystemC (XTSC) Reference Manual 1421

INDEX

type_t xtsc, 56
xtsc::xtsc_request, 900 WIRE_WRITE_PORT
xtsc, 56
UDMA_OK writable
xtsc::xtsc_udma, 1179 xtsc::xtsc_parms, 746
UINT_INPUT WRITE
xtsc, 56 xtsc::xtsc_request, 900
UINT_OUTPUT write_outputs
xtsc, 56 xtsc_component::xtsc_-
unlock mmio::register_definition, 133
xtsc::xtsc_memory_b, 595
USER_DEFINED_EXPORT xfer_reset
xtsc, 56 xtsc::xtsc_core, 328
USER_DEFINED_INITIATOR xtsc, 35
xtsc, 56 BOOL_INPUT, 56
USER_DEFINED_INPUT BOOL_OUTPUT, 56
xtsc, 56 conjugate_delta, 56
USER_DEFINED_OUTPUT DEBUG_EXPORT, 56
xtsc, 56 DEBUG_PORT, 55
USER_DEFINED_PORT INITIATOR_SOCKET_16, 56
xtsc, 55 INITIATOR_SOCKET_32, 56
USER_DEFINED_TARGET INITIATOR_SOCKET_4, 56
xtsc, 56 INITIATOR_SOCKET_64, 56
INITIATOR_SOCKET_8, 56
watchfilter_add LOOKUP_EXPORT, 56
xtsc::xtsc_core, 303 LOOKUP_PORT, 55
xtsc_component::xtsc_memory, 585 operator<<, 93, 94
xtsc_component::xtsc_router, 1023 operator++, 93
watchfilter_dump PORT_TABLE, 57
xtsc::xtsc_core, 303 QUEUE_POP_EXPORT, 56
xtsc_component::xtsc_memory, 585 QUEUE_POP_PORT, 56
xtsc_component::xtsc_router, 1023 QUEUE_PUSH_EXPORT, 56
watchfilter_remove QUEUE_PUSH_PORT, 56
xtsc::xtsc_core, 304 REQUEST_EXPORT, 56
xtsc_component::xtsc_memory, 586 REQUEST_PORT, 55
xtsc_component::xtsc_router, 1024 RESPOND_EXPORT, 56
WIDE_INPUT RESPOND_PORT, 55
xtsc, 56 sc_command_handler_commands, 95
WIDE_OUTPUT TARGET_SOCKET_16, 57
xtsc, 56 TARGET_SOCKET_32, 57
WIRE_READ_EXPORT TARGET_SOCKET_4, 56
xtsc, 56 TARGET_SOCKET_64, 57
WIRE_READ_PORT TARGET_SOCKET_8, 56
xtsc, 56 TX_XFER_EXPORT, 56
WIRE_WRITE_EXPORT TX_XFER_PORT, 56

1422 Xtensa SystemC (XTSC) Reference Manual

 INDEX

UINT_INPUT, 56 xtsc_filter_apply_xtsc_request, 90
UINT_OUTPUT, 56 xtsc_filter_apply_xtsc_response, 90
USER_DEFINED_EXPORT, 56 xtsc_filter_create, 87
USER_DEFINED_INITIATOR, 56 xtsc_filter_dump, 88
USER_DEFINED_INPUT, 56 xtsc_filter_exists, 87
USER_DEFINED_OUTPUT, 56 xtsc_filter_get, 88
USER_DEFINED_PORT, 55 xtsc_filter_kind_dump, 86
USER_DEFINED_TARGET, 56 xtsc_filter_kind_register, 86
WIDE_INPUT, 56 xtsc_finalize, 59
WIDE_OUTPUT, 56 xtsc_fire_turboxim_event_id, 61
WIRE_READ_EXPORT, 56 xtsc_get_absolute_directory, 72
WIRE_READ_PORT, 56 xtsc_get_absolute_path, 72
WIRE_WRITE_EXPORT, 56 xtsc_get_absolute_path_and_name,
WIRE_WRITE_PORT, 56 73
xtsc_add_lua_script_file, 69 xtsc_get_hex_dump_left_to_right, 67
xtsc_basename, 72 xtsc_get_next_watchfilter_number, 86
xtsc_byte_array_to_sc_unsigned, 70 xtsc_get_plugin_interface_t, 54
xtsc_command_argtobool, 78 xtsc_get_port_type_name, 91
xtsc_command_argtod, 80 xtsc_get_relaxed_simulation_barrier,
xtsc_command_argtoi32, 79 62
xtsc_command_argtou32, 79 xtsc_get_relaxed_simulation_interval,
xtsc_command_argtou64, 80 63
xtsc_command_handler_commands, xtsc_get_remaining_relaxed_-
96 simulation_time, 63
xtsc_command_remainder, 81 xtsc_get_shared_memory, 69
xtsc_command_throw, 81 xtsc_get_system_clock_factor, 58
xtsc_compute_fast_access_swizzle, 71 xtsc_get_system_clock_period, 60
xtsc_confirm_conjugate_user_- xtsc_get_system_clock_posedge_-
defined_port_types, 92 offset, 60
xtsc_connect, 93 xtsc_get_user_name, 69
xtsc_copy_c_str, 75 xtsc_hex_dump, 67
xtsc_copy_c_str_array, 75 xtsc_host_milliseconds, 85
xtsc_create_queue_ticket, 61 xtsc_host_mutex_close, 85
xtsc_delete_c_str, 75 xtsc_host_mutex_lock, 83
xtsc_delete_c_str_array, 76 xtsc_host_mutex_open, 83
xtsc_dirname, 72 xtsc_host_mutex_try_lock, 84
xtsc_dispatch_command, 77 xtsc_host_mutex_unlock, 84
xtsc_dump_systemc_objects, 76 xtsc_host_sleep, 85
xtsc_enable_text_logging, 66 xtsc_initialize, 58, 59
xtsc_event_dump, 83 xtsc_is_pin_level_port_type, 92
xtsc_event_exists, 82 xtsc_is_tlm2_port_type, 92
xtsc_event_get, 82 xtsc_is_user_defined_port_type, 91
xtsc_event_register, 81 xtsc_is_valid_identifier, 74
xtsc_filter_apply_xtsc_peek, 89 xtsc_is_xttlm_port_type, 91
xtsc_filter_apply_xtsc_poke, 89 xtsc_load_library, 73

Xtensa SystemC (XTSC) Reference Manual 1423

INDEX

xtsc_log_delta_cycle, 66 MEM_DRAM0B0S02, 281

xtsc_log_multiline, 74 MEM_DRAM0B0S03, 281
xtsc_parse_port_name, 74 MEM_DRAM0B0S04, 281
xtsc_pattern_match, 57 MEM_DRAM0B0S05, 281
xtsc_port_type, 54 MEM_DRAM0B0S06, 281
xtsc_port_type_check, 92 MEM_DRAM0B0S07, 281
xtsc_prepare_to_switch_sim_mode, 71 MEM_DRAM0B0S08, 281
xtsc_register_command, 76 MEM_DRAM0B0S09, 281
xtsc_register_mode_switch_interface, MEM_DRAM0B0S10, 281
70 MEM_DRAM0B0S11, 282
xtsc_reset, 90 MEM_DRAM0B0S12, 282
xtsc_reset_processes, 59 MEM_DRAM0B0S13, 282
xtsc_sc_unsigned_to_byte_array, 70 MEM_DRAM0B0S14, 282
xtsc_set_call_sc_stop, 60 MEM_DRAM0B0S15, 282
xtsc_set_constructor_log_level, 65 MEM_DRAM0B1S00, 282
xtsc_set_hex_dump_left_to_right, 66 MEM_DRAM0B1S01, 282
xtsc_set_relaxed_simulation_barrier, MEM_DRAM0B1S02, 282
62 MEM_DRAM0B1S03, 282
xtsc_set_relaxed_simulation_interval, MEM_DRAM0B1S04, 282
63 MEM_DRAM0B1S05, 282
xtsc_set_system_clock_factor, 57 MEM_DRAM0B1S06, 282
xtsc_switch_sim_mode, 71 MEM_DRAM0B1S07, 282
xtsc_text_logging_macros, 94 MEM_DRAM0B1S08, 282
xtsc_unregister_command, 77 MEM_DRAM0B1S09, 282
xtsc_user_state_dump, 64 MEM_DRAM0B1S10, 282
xtsc_user_state_get, 64 MEM_DRAM0B1S11, 282
xtsc_user_state_set, 65 MEM_DRAM0B1S12, 282
xtsc_wait, 61 MEM_DRAM0B1S13, 282
xtsc_zero_extend_array_indices, 68 MEM_DRAM0B1S14, 282
xtsc.h, 1284 MEM_DRAM0B1S15, 282
XTSC_DEBUG, 1304 MEM_DRAM0B2S00, 282
XTSC_ERROR, 1302 MEM_DRAM0B2S01, 282
XTSC_FATAL, 1301 MEM_DRAM0B2S02, 282
XTSC_INFO, 1304 MEM_DRAM0B2S03, 282
XTSC_LOG, 1305 MEM_DRAM0B2S04, 282
XTSC_LOG_PREFIX, 1301 MEM_DRAM0B2S05, 282
XTSC_NOTE, 1303 MEM_DRAM0B2S06, 282
XTSC_TRACE, 1305 MEM_DRAM0B2S07, 282
XTSC_VERBOSE, 1304 MEM_DRAM0B2S08, 282
XTSC_VERSION_INFO_STRING, MEM_DRAM0B2S09, 282
1306 MEM_DRAM0B2S10, 282
XTSC_WARN, 1303 MEM_DRAM0B2S11, 282
xtsc::xtsc_core MEM_DRAM0B2S12, 282
MEM_DRAM0B0S00, 281 MEM_DRAM0B2S13, 283
MEM_DRAM0B0S01, 281 MEM_DRAM0B2S14, 283

1424 Xtensa SystemC (XTSC) Reference Manual

 INDEX

MEM_DRAM0B2S15, 283 MEM_DRAM1B1S00, 284

MEM_DRAM0B3S00, 283 MEM_DRAM1B1S01, 284
MEM_DRAM0B3S01, 283 MEM_DRAM1B1S02, 284
MEM_DRAM0B3S02, 283 MEM_DRAM1B1S03, 284
MEM_DRAM0B3S03, 283 MEM_DRAM1B1S04, 284
MEM_DRAM0B3S04, 283 MEM_DRAM1B1S05, 284
MEM_DRAM0B3S05, 283 MEM_DRAM1B1S06, 284
MEM_DRAM0B3S06, 283 MEM_DRAM1B1S07, 284
MEM_DRAM0B3S07, 283 MEM_DRAM1B1S08, 284
MEM_DRAM0B3S08, 283 MEM_DRAM1B1S09, 284
MEM_DRAM0B3S09, 283 MEM_DRAM1B1S10, 284
MEM_DRAM0B3S10, 283 MEM_DRAM1B1S11, 284
MEM_DRAM0B3S11, 283 MEM_DRAM1B1S12, 284
MEM_DRAM0B3S12, 283 MEM_DRAM1B1S13, 284
MEM_DRAM0B3S13, 283 MEM_DRAM1B1S14, 284
MEM_DRAM0B3S14, 283 MEM_DRAM1B1S15, 284
MEM_DRAM0B3S15, 283 MEM_DRAM1B2S00, 284
MEM_DRAM0DMARD, 281 MEM_DRAM1B2S01, 284
MEM_DRAM0DMAWR, 281 MEM_DRAM1B2S02, 284
MEM_DRAM0LS0RD, 281 MEM_DRAM1B2S03, 284
MEM_DRAM0LS0WR, 281 MEM_DRAM1B2S04, 284
MEM_DRAM0LS1RD, 281 MEM_DRAM1B2S05, 285
MEM_DRAM0LS1WR, 281 MEM_DRAM1B2S06, 285
MEM_DRAM0LS2RD, 281 MEM_DRAM1B2S07, 285
MEM_DRAM0LS2WR, 281 MEM_DRAM1B2S08, 285
MEM_DRAM0P0, 281 MEM_DRAM1B2S09, 285
MEM_DRAM0P1, 281 MEM_DRAM1B2S10, 285
MEM_DRAM0P2, 281 MEM_DRAM1B2S11, 285
MEM_DRAM0P3, 281 MEM_DRAM1B2S12, 285
MEM_DRAM1B0S00, 283 MEM_DRAM1B2S13, 285
MEM_DRAM1B0S01, 283 MEM_DRAM1B2S14, 285
MEM_DRAM1B0S02, 283 MEM_DRAM1B2S15, 285
MEM_DRAM1B0S03, 284 MEM_DRAM1B3S00, 285
MEM_DRAM1B0S04, 284 MEM_DRAM1B3S01, 285
MEM_DRAM1B0S05, 284 MEM_DRAM1B3S02, 285
MEM_DRAM1B0S06, 284 MEM_DRAM1B3S03, 285
MEM_DRAM1B0S07, 284 MEM_DRAM1B3S04, 285
MEM_DRAM1B0S08, 284 MEM_DRAM1B3S05, 285
MEM_DRAM1B0S09, 284 MEM_DRAM1B3S06, 285
MEM_DRAM1B0S10, 284 MEM_DRAM1B3S07, 285
MEM_DRAM1B0S11, 284 MEM_DRAM1B3S08, 285
MEM_DRAM1B0S12, 284 MEM_DRAM1B3S09, 285
MEM_DRAM1B0S13, 284 MEM_DRAM1B3S10, 285
MEM_DRAM1B0S14, 284 MEM_DRAM1B3S11, 285
MEM_DRAM1B0S15, 284 MEM_DRAM1B3S12, 285

Xtensa SystemC (XTSC) Reference Manual 1425

INDEX

MEM_DRAM1B3S13, 285 INVALIDATE, 900

MEM_DRAM1B3S14, 285 NONCOHERENT, 900
MEM_DRAM1B3S15, 285 RCW, 900
MEM_DRAM1DMARD, 283 READ, 900
MEM_DRAM1DMAWR, 283 SHARED, 900
MEM_DRAM1LS0RD, 283 SNOOP, 900
MEM_DRAM1LS0WR, 283 WRITE, 900
MEM_DRAM1LS1RD, 283 xtsc::xtsc_response
MEM_DRAM1LS1WR, 283 EXCLUSIVE, 993
MEM_DRAM1LS2RD, 283 INVALID, 993
MEM_DRAM1LS2WR, 283 MODIFIED, 993
MEM_DRAM1P0, 283 NONCOHERENT, 993
MEM_DRAM1P1, 283 RSP_ADDRESS_DATA_ERROR, 993
MEM_DRAM1P2, 283 RSP_ADDRESS_ERROR, 993
MEM_DRAM1P3, 283 RSP_DATA_ERROR, 993
MEM_DROM0P0, 285 RSP_NACC, 993
MEM_DROM0P1, 285 RSP_OK, 993
MEM_DROM0P2, 285 SHARED, 993
MEM_DROM0P3, 285 xtsc::xtsc_udma
MEM_IDMA0, 286 BAD_DESCRIPTOR_ERROR, 1179
MEM_IRAM0, 285 CONFIG, 1178
MEM_IRAM1, 285 CROSS_RAM_BOUNDARY_ERROR,
MEM_IROM0, 285 1179
MEM_PIF, 286 DESCCURPTR, 1178
MEM_URAM0, 286 DESCFIRSTPTR, 1178
MEM_XLMI0P0, 286 DESCLASTPTR, 1178
MEM_XLMI0P1, 286 DESCNUM, 1178
XTSC_SB_DISPATCHED, 286 DESCNUMINCR, 1178
XTSC_SB_DISPATCHING, 286 DESTPTR, 1178
XTSC_SB_PENDING, 286 NUMREGS, 1179
xtsc::xtsc_parms PIF2PIF, 1179
PARM_TYPE_BOOL, 743 PIF2RAM, 1179
PARM_TYPE_C_STR, 743 PIF_ADDRESS_DATA_ERROR, 1179
PARM_TYPE_C_STR_ARRAY, 743 PIF_ADDRESS_ERROR, 1179
PARM_TYPE_DOUBLE, 743 PIF_DATA_ERROR, 1179
PARM_TYPE_U32, 743 RAM2PIF, 1179
PARM_TYPE_U32_VECTOR, 743 RAM2RAM, 1179
PARM_TYPE_VOID_POINTER, 743 SRCPTR, 1178
PARM_TYPE_XTSC_PARMS, 743 STATUS, 1178
xtsc::xtsc_request UDMA_OK, 1179
BLOCK_READ, 900 xtsc::xtsc_address_range_entry, 183
BLOCK_WRITE, 900 xtsc_address_range_entry, 184
BURST_READ, 900 xtsc::xtsc_command_handler_interface,
BURST_WRITE, 900 235
EXCLUSIVE, 900 execute, 238

1426 Xtensa SystemC (XTSC) Reference Manual

 INDEX

man, 239 execute, 296

xtsc::xtsc_connection_interface, 240 get_all_cores, 351
connect_user_defined_port_type, 248 get_all_cores_exited_event, 306
dump_ports_and_tables, 249 get_all_registers, 343
get_bit_width, 245 get_alt_reset_vec, 344
get_default_port_name, 246 get_binterrupt_index, 345
get_object, 245 get_clock_factor, 293
get_port, 246 get_clock_period_factor, 293
get_port_table, 247 get_clock_phase_delta_factors, 353
get_port_type, 245 get_commit_stage, 340
get_port_type_map, 245 get_debug_poll_interval, 313
get_resolved_port_table, 249 get_export_state, 290
get_user_defined_port_type, 247 get_import_wire, 290
has_port, 245 get_input_pin, 291
xtsc_connection_interface, 244 get_input_pin_set, 329
xtsc::xtsc_core, 251 get_input_queue, 289
breakpoint_interrupt, 315 get_instantiation_number, 307
change_clock_period, 292 get_instr_width, 341
connect, 301, 302 get_interrupt_number, 345
disassemble, 342 get_last_stage, 341
dump_all_registers, 344 get_local_memory_byte_size, 320
dump_configuration, 304 get_local_memory_starting_byte_-
dump_core_interfaces_by_type, 330 address, 319
dump_export_states, 332 get_lookup, 289
dump_filtered_request, 302 get_lookup_address_bit_width, 337
dump_filtered_response, 302 get_lookup_data_bit_width, 338
dump_import_wires, 332 get_lookup_latency, 338
dump_input_pins, 332 get_memory_port, 294
dump_input_queues, 331 get_memory_port_name, 294
dump_interface_values, 329 get_multi_port_count, 317
dump_lookups, 331 get_multi_port_zero, 317
dump_memory_interfaces, 330 get_nth_multi_port, 318
dump_output_pins, 332 get_output_pin, 290
dump_output_queues, 331 get_output_pin_set, 329
dump_status, 304 get_output_queue, 289
dump_sysio_interfaces, 330 get_parms, 307
dump_sysio_wires, 339 get_pc, 341
dump_system_input_wires, 339 get_pin_bit_width, 335
dump_system_output_wires, 339 get_pin_set, 329
dump_tie_interfaces, 331 get_register_bit_width, 344
dump_tie_interfaces_by_type, 331 get_register_value, 342
enable_clock, 327 get_request_export, 287
enable_cores, 307 get_request_port, 287, 296
enable_debug, 309 get_respond_export, 287, 296
enable_register_tracing, 324 get_respond_port, 288

Xtensa SystemC (XTSC) Reference Manual 1427

INDEX

get_simcall_arg, 306 has_system_input_wire, 339

get_simcall_callback_event, 306 has_system_output_wire, 339
get_stage_store_info, 350 has_tie_interface, 332
get_stall, 326 have_all_cores_exited, 315
get_static_vector_select, 344 How_to_do_input_pin_binding, 367
get_stop_after_all_cores_exit, 305 How_to_do_memory_port_binding,
get_store_buffer_count, 349 356
get_store_buffer_info, 349 How_to_do_output_pin_binding, 366
get_summary_count, 340 How_to_do_port_binding, 354
get_sysio_bit_width, 338 How_to_do_system_input_wire_-
get_system_input_wire, 291 binding, 369
get_system_output_wire, 292 How_to_do_system_output_wire_-
get_system_ram_byte_size, 321 binding, 370
get_system_ram_starting_byte_- How_to_do_tie_export_state_binding,
address, 320 365
get_system_rom_byte_size, 321 How_to_do_tie_import_wire_binding,
get_system_rom_starting_byte_- 365
address, 320 How_to_do_tie_lookup_binding, 362
get_tie_bit_width, 337 How_to_do_tie_queue_binding, 363
get_tie_interface_set, 328 How_to_do_tx_xfer_port_binding, 361
get_trigin_idma, 325 Information_on_memory_interface_-
get_turbo_max_relaxed_cycles, 354 protocols, 371
get_tx_xfer_export, 288 is_clock_enabled, 327
get_tx_xfer_port, 288 is_dual_ported, 316
has_busy, 319 is_fast_functional_mode, 326
has_export_state, 334 is_ls_dual_port, 295
has_import_wire, 333 is_multi_port_zero, 316
has_input_pin, 334 is_register_tracing_enabled, 324
has_input_queue, 333 is_subbanked_dram, 295
has_lookup, 332 is_subbanked_dram0, 294
has_lookup_ready, 333 is_subbanked_dram1, 295
has_memory_port, 315, 316 load_client, 347
has_output_pin, 334 load_client_file, 348
has_output_queue, 333 load_file, 345
has_pin, 334 load_program, 346
has_pin_level_export_state, 337 log_disassembly, 326
has_pin_level_import_wire, 336 memory_port, 281
has_pin_level_input_queue, 336 peek_dtlb, 323
has_pin_level_interface, 335 peek_itlb, 323
has_pin_level_lookup, 336 peek_physical, 321
has_pin_level_output_queue, 336 peek_virtual, 322
has_pin_level_sysio_interface, 335 poke_physical, 322
has_pin_level_tie_interface, 335 poke_virtual, 323
has_register, 342 send_client_command, 348
has_sysio_wire, 339 set_alt_reset_vec, 345

1428 Xtensa SystemC (XTSC) Reference Manual

 INDEX

set_breakpoint_callback, 314 remove_address_range, 432

set_clock_phase_delta_factors, 351 reset_address, 433
set_debug_poll_interval, 312 restrict_to_block, 433
set_debugger_connect_callback, 313 xtsc_fast_access_block, 432
set_debugger_disconnect_callback, xtsc::xtsc_fast_access_if, 435
313 nb_fast_access_read, 435
set_debugger_resume_callback, 314 nb_fast_access_write, 436
set_interrupt, 328 xtsc::xtsc_fast_access_request, 437
set_multiple_registers, 343 allow_callbacks_access, 444
set_pc, 341 allow_custom_callbacks_access, 444
set_register_value, 343 allow_interface_access, 443
set_sim_mode_switch_callback, 308 allow_raw_access, 443
set_simcall_callback, 307 fast_read, 442
set_simcall_return_value, 306 fast_write, 442
set_stall, 325 get_access_type, 445
set_static_vector_select, 344 get_access_type_c_str, 445
set_stop_after_all_cores_exit, 305 get_callback_arg, 448
set_trigin_idma, 325 get_custom_read_callback, 449
set_turbo_max_relaxed_cycles, 354 get_custom_write_callback, 449
setup_debug, 310 get_fast_access_if, 448
setup_multicore_debug, 311 get_local_block, 446
sim_mode_switch_callback, 280 get_orig_raw_data, 447
simcall_callback, 280 get_raw_data, 447
step, 327 get_read_callback, 448
summary, 328 get_response_block, 446
translate_virtual, 324 get_result_block, 446
watchfilter_add, 303 get_swizzle, 447
watchfilter_dump, 303 get_translated_request_address, 447
watchfilter_remove, 304 get_write_callback, 448
xfer_reset, 328 is_readable, 446
xtsc_core, 286 is_writable, 445
xtsc_sb_state, 286 remove_address_range, 444
xtsc::xtsc_core_parms, 376 restrict_to_block, 445
xtsc_core_parms, 393 translate_request_address, 443
xtsc::xtsc_debug_if, 394 xtsc_fast_access_request, 442
nb_fast_access, 396 xtsc::xtsc_fast_access_revocation_if, 450
nb_peek, 395 revoke_fast_access, 450
nb_peek_coherent, 397 xtsc::xtsc_filter, 451
nb_poke, 396 xtsc_filter_create, 456
nb_poke_coherent, 397 xtsc::xtsc_initialize_parms, 458
xtsc::xtsc_exception, 430 xtsc_initialize_parms, 467
xtsc::xtsc_fast_access_block, 431 xtsc::xtsc_lookup_if, 495
get_address, 433 default_event, 498
get_block_address, 433 nb_get_address_bit_width, 497
get_block_end_address, 434 nb_get_data, 497

Xtensa SystemC (XTSC) Reference Manual 1429

INDEX

nb_get_data_bit_width, 498 writable, 746

nb_is_ready, 496 xtsc_parameter_type, 743
nb_send_address, 496 xtsc::xtsc_pin2tlm_wire_transactor, 797
xtsc::xtsc_memory_b, 589 xtsc::xtsc_plugin_interface, 799
byte_dump, 594 create_module, 802
load_initial_values, 595 create_parms, 801
lock, 595 get_connection_interface, 802
peek, 593 get_plugin_names, 801
poke, 594 help, 801
unlock, 595 xtsc::xtsc_queue_pop_if, 847
xtsc_memory_b, 593 default_event, 849
xtsc::xtsc_mode_switch_if, 710 nb_can_pop, 848
get_sim_mode, 712 nb_get_bit_width, 849
get_sim_mode_switch_ready_event, nb_pop, 848
712 xtsc::xtsc_queue_push_if, 875
is_mode_switch_pending, 712 default_event, 877
prepare_to_switch_sim_mode, 711 nb_can_push, 876
switch_sim_mode, 711 nb_get_bit_width, 877
xtsc::xtsc_module, 714 nb_push, 876
reset, 717 xtsc::xtsc_request, 890
xtsc_module, 716 adjust_block_write, 906
xtsc::xtsc_parms, 733 coherence_t, 900
add, 746–752, 754, 755 dump, 920
copy_void_pointer, 757 get_buffer, 917
dump, 744 get_byte_address, 905
dump_bool_map, 747 get_byte_enables, 912
dump_by_type, 744 get_byte_size, 907
dump_c_str_array_map, 754 get_coherence, 915
dump_c_str_map, 753 get_dram_attribute, 908
dump_double_map, 748 get_exclusive, 919
dump_type, 745 get_hardware_address, 906
dump_u32_map, 750 get_id, 912
dump_u32_vector_map, 751 get_instruction_fetch, 914
dump_value, 745 get_last_transfer, 914
dump_void_pointer_map, 752 get_num_transfers, 911
dump_xtsc_parms_map, 755 get_pc, 916
dumpable, 745 get_pif_attribute, 907
exists, 745 get_pif_req_domain, 908
extract_parms, 756 get_priority, 913
get_non_empty_c_str, 753 get_route_id, 909
get_non_zero_u32, 749 get_snoop_virtual_address, 916
get_parameter_type, 746 get_tag, 920
kind, 744 get_transfer_number, 911
set, 746, 747, 749, 750, 752–755 get_type, 910
set_dumpable, 758 get_type_name, 910

1430 Xtensa SystemC (XTSC) Reference Manual

 INDEX

get_user_data, 918 get_exclusive_req, 1001

get_user_data_for_logging, 918 get_id, 998
get_xfer_en, 915 get_last_transfer, 995
has_dram_attribute, 909 get_pc, 997
initialize, 904 get_priority, 999
set_buffer, 917 get_route_id, 998
set_byte_address, 905 get_status, 995
set_byte_enables, 912 get_status_name, 995
set_byte_size, 907 get_tag, 1002
set_coherence, 915 get_user_data, 1000
set_dram_attribute, 908 get_user_data_for_logging, 1001
set_exclusive, 919 has_snoop_data, 996
set_id, 912 is_snoop, 996
set_instruction_fetch, 914 set_buffer, 999
set_last_transfer, 913 set_coherence, 996
set_num_transfers, 910 set_exclusive_ok, 1002
set_pc, 916 set_id, 998
set_pif_attribute, 907 set_last_transfer, 995
set_pif_req_domain, 908 set_pc, 997
set_priority, 913 set_priority, 998
set_route_id, 909 set_route_id, 997
set_snoop_virtual_address, 916 set_snoop_data, 996
set_type, 910 set_status, 994
set_user_data, 918 set_user_data, 1000
set_xfer_en, 915 show_data, 1003
show_data, 921 status_t, 993
type_t, 900 xtsc_response, 994
xtsc_request, 901–903 xtsc::xtsc_response::stream_dumper, 162
xtsc::xtsc_request::stream_dumper, 163 xtsc::xtsc_sc_in_sc_bv_base_adapter,
xtsc::xtsc_request_if, 922 1038
nb_load_retired, 925 xtsc::xtsc_sc_in_sc_bv_base_adapter_-
nb_lock, 925 base, 1039
nb_request, 924 xtsc::xtsc_sc_in_sc_uint_base_adapter,
nb_retire_flush, 925 1041
xtsc::xtsc_resettable, 962 xtsc::xtsc_sc_in_sc_uint_base_adapter_-
xtsc::xtsc_respond_if, 966 base, 1042
nb_respond, 967 xtsc::xtsc_sc_out_sc_bv_base_adapter,
xtsc::xtsc_response, 987 1044
coherence_t, 993 xtsc::xtsc_sc_out_sc_bv_base_adapter_-
dump, 1002 base, 1046
get_buffer, 999, 1000 xtsc::xtsc_sc_out_sc_uint_base_adapter,
get_byte_address, 994 1048
get_byte_size, 994 xtsc::xtsc_sc_out_sc_uint_base_adapter_-
get_coherence, 996 base, 1050
get_exclusive_ok, 1002 xtsc::xtsc_script_file, 1052

Xtensa SystemC (XTSC) Reference Manual 1431

INDEX

dump_last_line_info, 1063 set_config_xfer, 1158

evaluate_lua_expression, 1063 set_data, 1158
get_words, 1062 set_done, 1157
getline, 1061 set_read_data, 1158
xtsc_script_file, 1060 set_turbo, 1159
xtsc::xtsc_signal_sc_bv_base, 1064 set_write, 1158
xtsc::xtsc_signal_sc_bv_base_floating, xtsc_tx_xfer, 1155
1066 xtsc::xtsc_tx_xfer_if, 1160
xtsc::xtsc_signal_sc_uint_base, 1068 nb_tx_xfer, 1160
xtsc::xtsc_switch_registration, 1081 xtsc::xtsc_udma, 1165
xtsc_switch_registration, 1082 change_clock_period, 1180
xtsc::xtsc_tlm2pin_wire_transactor, 1133 direction_t, 1179
xtsc::xtsc_tlm2pin_wire_transactor_base, dump_descriptor, 1180
1135 dump_profile_results, 1180
nb_get_bit_width, 1136 error_t, 1179
nb_write, 1136 execute, 1181
xtsc::xtsc_tx_loader, 1138 register_address_map, 1178
connect, 1149 xtsc_udma, 1179
xtsc_tx_loader, 1148 xtsc::xtsc_udma::udma_descriptor, 179
xtsc::xtsc_tx_loader::xtsc_queue_pop_if_- xtsc::xtsc_udma::xtsc_pif_respond_if_impl,
impl, 850 759
nb_can_pop, 851 nb_respond, 760
nb_get_bit_width, 851 xtsc::xtsc_udma::xtsc_ram_respond_if_-
nb_pop, 851 impl, 888
xtsc::xtsc_tx_loader::xtsc_queue_push_if_- nb_respond, 889
impl, 879 xtsc::xtsc_udma::xtsc_rer_lookup_if_impl,
nb_can_push, 880 959
nb_get_bit_width, 880 nb_get_address_bit_width, 961
nb_push, 880 nb_get_data, 961
xtsc::xtsc_tx_loader::xtsc_tx_xfer_if_impl, nb_get_data_bit_width, 961
1162 nb_is_ready, 960
nb_tx_xfer, 1163 nb_send_address, 960
xtsc_tx_xfer_if_impl, 1163 xtsc::xtsc_udma::xtsc_wer_lookup_if_impl,
xtsc::xtsc_tx_loader_parms, 1150 1188
xtsc_tx_loader_parms, 1152 nb_get_address_bit_width, 1190
xtsc::xtsc_tx_xfer, 1153 nb_get_data, 1190
dump, 1159 nb_get_data_bit_width, 1190
get_address, 1156 nb_is_ready, 1189
get_config_xfer, 1156 nb_send_address, 1189
get_data, 1156 xtsc::xtsc_udma_parms, 1182
get_done, 1156 xtsc_udma_parms, 1186
get_read_data, 1157 xtsc::XTSC_VERSION_INFO_STRING,
get_tag, 1157 1187
get_turbo, 1157 xtsc::xtsc_wire_read_if, 1224
get_write, 1156 nb_get_bit_width, 1225

1432 Xtensa SystemC (XTSC) Reference Manual

 INDEX

nb_read, 1225 XTSC_SB_DISPATCHED

xtsc::xtsc_wire_write_if, 1242 xtsc::xtsc_core, 286
nb_get_bit_width, 1243 XTSC_SB_DISPATCHING
nb_write, 1243 xtsc::xtsc_core, 286
xtsc_component::xtsc_memory XTSC_SB_PENDING
REQ_ALL, 579 xtsc::xtsc_core, 286
REQ_BLOCK_READ, 578 xtsc_add_lua_script_file
REQ_BLOCK_WRITE_1, 578 xtsc, 69
REQ_BLOCK_WRITE_10, 578 xtsc_address_range_entry
REQ_BLOCK_WRITE_11, 578 xtsc::xtsc_address_range_entry, 184
REQ_BLOCK_WRITE_12, 578 xtsc_address_range_entry.h, 1307
REQ_BLOCK_WRITE_13, 578 xtsc_arbiter
REQ_BLOCK_WRITE_14, 578 xtsc_component::xtsc_arbiter, 200
REQ_BLOCK_WRITE_15, 578 xtsc_arbiter.h, 1309
REQ_BLOCK_WRITE_16, 579 xtsc_arbiter_parms
REQ_BLOCK_WRITE_2, 578 xtsc_component::xtsc_arbiter_parms,
REQ_BLOCK_WRITE_3, 578 216
REQ_BLOCK_WRITE_4, 578 xtsc_basename
REQ_BLOCK_WRITE_5, 578 xtsc, 72
REQ_BLOCK_WRITE_6, 578 xtsc_byte_array_to_sc_unsigned
REQ_BLOCK_WRITE_7, 578 xtsc, 70
REQ_BLOCK_WRITE_8, 578 xtsc_cache
REQ_BLOCK_WRITE_9, 578 xtsc_component::xtsc_cache, 229
REQ_BURST_READ, 578 xtsc_cache.h, 1311
REQ_BURST_WRITE_1, 578 xtsc_command_argtobool
REQ_BURST_WRITE_2, 578 xtsc, 78
REQ_BURST_WRITE_3, 578 xtsc_command_argtod
REQ_BURST_WRITE_4, 578 xtsc, 80
REQ_BURST_WRITE_5, 578 xtsc_command_argtoi32
REQ_BURST_WRITE_6, 578 xtsc, 79
REQ_BURST_WRITE_7, 578 xtsc_command_argtou32
REQ_BURST_WRITE_8, 578 xtsc, 79
REQ_NONE, 579 xtsc_command_argtou64
REQ_RCW_1, 578 xtsc, 80
REQ_RCW_2, 578 xtsc_command_handler_commands
REQ_READ, 578 xtsc, 96
REQ_WRITE, 578 xtsc_command_remainder
xtsc_component::xtsc_memory_trace xtsc, 81
cntr_latency, 676 xtsc_command_throw
cntr_lifetime, 676 xtsc, 81
cntr_req_beats, 676 xtsc_component, 100
cntr_req_busys, 676 xtsc_component::xtsc_arbiter, 185
cntr_rsp_beats, 676 arbitrate, 200
cntr_rsp_busys, 676 arbitrate_policy, 200
cntr_transactions, 676 change_clock_period, 201

Xtensa SystemC (XTSC) Reference Manual 1433

INDEX

connect, 202–204 xtsc_dma_engine, 421

convert_response, 205 xtsc_component::xtsc_dma_engine::xtsc_-
dump_profile_results, 202 respond_if_impl, 985
execute, 201 nb_respond, 986
setup_random_rsp_nacc_responses, xtsc_component::xtsc_dma_engine_parms,
201 423
xtsc_arbiter, 200 xtsc_component::xtsc_dma_request, 428
xtsc_component::xtsc_arbiter::port_policy_- xtsc_component::xtsc_lookup, 468
info, 131 change_clock_period, 477
xtsc_component::xtsc_arbiter::req_rsp_- connect, 478, 479
info, 139 execute, 478
xtsc_component::xtsc_arbiter::request_info, get_data_from_address, 479
147 get_ready_enable, 478
xtsc_component::xtsc_arbiter::response_- peek, 479
info, 157 poke, 479
xtsc_component::xtsc_arbiter::xtsc_- set_ready_enable, 477
request_if_impl, 948 xtsc_lookup, 477
nb_fast_access, 951 xtsc_component::xtsc_lookup::xtsc_-
nb_load_retired, 951 lookup_if_impl, 499
nb_lock, 951 nb_get_address_bit_width, 501
nb_peek, 950 nb_get_data, 500
nb_peek_coherent, 950 nb_get_data_bit_width, 501
nb_poke, 950 nb_is_ready, 500
nb_poke_coherent, 951 nb_send_address, 500
nb_request, 950 xtsc_component::xtsc_lookup_driver, 481
nb_retire_flush, 951 nb_get_address_bit_width, 489
xtsc_request_if_impl, 950 nb_get_data, 488
xtsc_component::xtsc_arbiter::xtsc_- nb_get_data_bit_width, 489
respond_if_impl, 978 nb_is_ready, 488
nb_respond, 979 nb_send_address, 487
xtsc_component::xtsc_arbiter_parms, 206 xtsc_lookup_driver, 487
xtsc_arbiter_parms, 216 xtsc_component::xtsc_lookup_driver_-
xtsc_component::xtsc_cache, 218 parms, 490
execute, 229 xtsc_lookup_driver_parms, 494
xtsc_cache, 229 xtsc_component::xtsc_lookup_parms, 502
xtsc_component::xtsc_cache::line_info, 119 xtsc_lookup_parms, 509
xtsc_component::xtsc_cache::xtsc_- xtsc_component::xtsc_lookup_pin, 511
respond_if_impl, 983 xtsc_lookup_pin, 517
nb_respond, 984 xtsc_component::xtsc_lookup_pin_parms,
xtsc_component::xtsc_cache_parms, 231 518
xtsc_component::xtsc_dma_descriptor, 409 xtsc_lookup_pin_parms, 521
xtsc_component::xtsc_dma_engine, 411 xtsc_component::xtsc_master, 523
execute, 421 check_for_too_few_parameters, 535
m_done_descriptor_deque, 422 check_for_too_many_parameters, 535
set_turbo, 421 connect, 534, 535

1434 Xtensa SystemC (XTSC) Reference Manual

 INDEX

dump_response_history, 532 xtsc_component::xtsc_memory::address_-

execute, 533 info, 107
get_control_input, 534 xtsc_component::xtsc_memory::request_-
get_response, 532 info, 144
get_response_history_count, 533 xtsc_component::xtsc_-
get_response_history_depth, 533 memory::watchfilter_info, 181
m_response_history_depth, 536 xtsc_component::xtsc_memory::xtsc_-
optionally_get_coherence, 535 request_if_impl, 932
set_response_history_depth, 533 nb_fast_access, 934
xtsc_master, 532 nb_load_retired, 935
xtsc_component::xtsc_master::xtsc_wire_- nb_lock, 935
write_if_impl, 1256 nb_peek, 934
nb_get_bit_width, 1257 nb_poke, 934
nb_write, 1257 nb_request, 934
xtsc_component::xtsc_master_parms, 537 nb_retire_flush, 935
xtsc_master_parms, 544 xtsc_request_if_impl, 934
xtsc_component::xtsc_master_tlm2, 546 xtsc_component::xtsc_memory_base, 597
check_for_too_few_parameters, 554 xtsc_component::xtsc_memory_parms, 599
check_for_too_many_parameters, 554 xtsc_memory_parms, 614
dump_last_read_write, 553 xtsc_component::xtsc_memory_pin, 616
execute, 553 byte_dump, 635
xtsc_master_tlm2, 553 connect, 636
xtsc_component::xtsc_master_tlm2::tlm_- How_to_get_input_and_output_ports,
bw_transport_if_impl, 165 637
xtsc_component::xtsc_master_tlm2_parms, peek, 634
555 poke, 634
xtsc_master_tlm2_parms, 558 reset, 636
xtsc_component::xtsc_memory, 560 xtsc_memory_pin, 634
byte_dump, 580 xtsc_component::xtsc_memory_pin::pif_-
change_clock_period, 581 req_info, 129
compute_special_response, 586 xtsc_component::xtsc_memory_pin::xtsc_-
connect, 582–585 debug_if_impl, 402
execute, 581 nb_fast_access, 404
get_addresses, 587 nb_peek, 403
get_status_for_testing_failures, 587 nb_poke, 404
load_initial_values, 588 xtsc_component::xtsc_memory_pin_parms,
peek, 579 638
poke, 579 xtsc_memory_pin_parms, 645, 646
request_type_t, 578 xtsc_component::xtsc_memory_tlm2, 648
setup_false_error_responses, 586 byte_dump, 656
support_exclusive, 581 change_clock_period, 659
watchfilter_add, 585 connect, 658, 659
watchfilter_dump, 585 execute, 657
watchfilter_remove, 586 load_initial_values, 659
xtsc_memory, 579 peek, 656

Xtensa SystemC (XTSC) Reference Manual 1435

INDEX

poke, 656 nb_respond, 977

xtsc_memory_tlm2, 656 xtsc_respond_if_impl, 977
xtsc_component::xtsc_memory_tlm2::tlm_- xtsc_component::xtsc_memory_trace_-
fw_transport_if_impl, 171 parms, 686
tlm_fw_transport_if_impl, 172 xtsc_memory_trace_parms, 688, 689
xtsc_component::xtsc_memory_tlm2_- xtsc_component::xtsc_mmio, 690
parms, 661 change_clock_period, 704
xtsc_memory_tlm2_parms, 666 connect, 700–703
xtsc_component::xtsc_memory_trace, 668 execute, 699
cntr_type, 676 get_input, 699
connect, 681–683 get_output, 699
dump_latencies, 677 get_register, 704
dump_latency_histogram, 679 swizzle_buffer, 704
dump_lifetime_histogram, 680 xtsc_mmio, 699
dump_statistic_info, 678 xtsc_component::xtsc_mmio::input_-
enable_latency_tracking, 677 definition, 112
enable_tracing, 677 xtsc_component::xtsc_mmio::input_-
execute, 680 definition::xtsc_wire_write_if_impl,
get_counter, 677 1253
get_ports, 684 nb_get_bit_width, 1254
get_types, 684 nb_write, 1254
is_latency_tracking_enabled, 677 xtsc_component::xtsc_mmio::output_-
is_tracing_enabled, 676 definition, 121
xtsc_memory_trace, 676 xtsc_component::xtsc_mmio::register_-
xtsc_component::xtsc_memory_- definition, 132
trace::statistic_info, 160 write_outputs, 133
xtsc_component::xtsc_memory_- xtsc_component::xtsc_mmio::xtsc_-
trace::transaction_info, 173 request_if_impl, 936
xtsc_component::xtsc_memory_- nb_fast_access, 938
trace::xtsc_request_if_impl, 953 nb_peek, 938
m_coherence, 958 nb_poke, 938
nb_fast_access, 957 nb_request, 938
nb_load_retired, 957 xtsc_component::xtsc_mmio_parms, 706
nb_lock, 958 xtsc_mmio_parms, 709
nb_peek, 956 xtsc_component::xtsc_module_pin_base,
nb_peek_coherent, 957 718
nb_poke, 956 add_bool_input, 729
nb_poke_coherent, 957 add_bool_output, 730
nb_request, 957 add_uint_input, 729
nb_retire_flush, 958 add_uint_output, 730
xtsc_request_if_impl, 956 add_wide_input, 729
xtsc_component::xtsc_memory_- add_wide_output, 731
trace::xtsc_respond_if_impl, dump_ports, 728
974 get_bool_input, 727
m_coherence, 977 get_bool_output, 728

1436 Xtensa SystemC (XTSC) Reference Manual

 INDEX

get_uint_input, 727 xtsc_pin2tlm_memory_transactor_-

get_uint_output, 728 parms, 795
get_wide_input, 728 xtsc_component::xtsc_queue, 803
get_wide_output, 728 connect, 816, 817
m_banked, 732 execute, 815
parse_port_name_and_bit_width, 731 num_available, 814
xtsc_module_pin_base, 727 num_free, 814
xtsc_component::xtsc_module_pin_- peek, 814
base::req_cntl, 134 poke, 815
get_num_transfers, 136 xtsc_queue, 814
xtsc_component::xtsc_module_pin_- xtsc_component::xtsc_queue::xtsc_-
base::resp_cntl, 149 queue_pop_if_impl, 853
xtsc_component::xtsc_pin2tlm_lookup_- nb_can_pop, 854
transactor, 761 nb_get_bit_width, 854
xtsc_pin2tlm_lookup_transactor, 765 nb_pop, 854
xtsc_component::xtsc_pin2tlm_lookup_- xtsc_component::xtsc_queue::xtsc_-
transactor_parms, 766 queue_pop_if_multi_impl, 856
xtsc_pin2tlm_lookup_transactor_- nb_can_pop, 857
parms, 768 nb_get_bit_width, 858
xtsc_component::xtsc_pin2tlm_memory_- nb_pop, 857
transactor, 769 xtsc_component::xtsc_queue::xtsc_-
connect, 786 queue_push_if_impl, 882
How_to_get_input_and_output_ports, nb_can_push, 883
787 nb_get_bit_width, 883
m_req_rdy_fifo, 787 nb_push, 883
reset, 787 xtsc_component::xtsc_queue::xtsc_-
xtsc_pin2tlm_memory_transactor, 785 queue_push_if_multi_impl, 885
xtsc_component::xtsc_pin2tlm_memory_- nb_can_push, 886
transactor::request_info, 141 nb_get_bit_width, 887
xtsc_component::xtsc_pin2tlm_memory_- nb_push, 886
transactor::subbank_activity, 164 xtsc_component::xtsc_queue_consumer,
xtsc_component::xtsc_pin2tlm_memory_- 818
transactor::xtsc_debug_if_impl, connect, 824
405 execute, 824
nb_fast_access, 408 nb_can_pop, 824
nb_peek, 407 nb_get_bit_width, 825
nb_peek_coherent, 407 nb_pop, 825
nb_poke, 407 xtsc_queue_consumer, 823
nb_poke_coherent, 407 xtsc_component::xtsc_queue_consumer_-
xtsc_component::xtsc_pin2tlm_memory_- parms, 827
transactor::xtsc_respond_if_impl, xtsc_queue_consumer_parms, 830
980 xtsc_component::xtsc_queue_parms, 831
nb_respond, 982 xtsc_queue_parms, 834
xtsc_component::xtsc_pin2tlm_memory_- xtsc_component::xtsc_queue_pin, 836
transactor_parms, 789 xtsc_queue_pin, 842

Xtensa SystemC (XTSC) Reference Manual 1437

INDEX

xtsc_component::xtsc_queue_pin_parms, nb_fast_access, 946

843 nb_load_retired, 947
xtsc_queue_pin_parms, 846 nb_lock, 947
xtsc_component::xtsc_queue_producer, nb_peek, 945
859 nb_peek_coherent, 946
connect, 867 nb_poke, 946
execute, 866 nb_poke_coherent, 946
get_control_input, 866 nb_request, 946
nb_can_push, 867 nb_retire_flush, 947
nb_get_bit_width, 869 xtsc_component::xtsc_router::xtsc_-
nb_push, 868 respond_if_impl, 971
xtsc_queue_producer, 866 nb_respond, 972
xtsc_component::xtsc_queue_- xtsc_respond_if_impl, 972
producer::xtsc_wire_write_if_impl, xtsc_component::xtsc_router_parms, 1026
1244 xtsc_router_parms, 1036
nb_get_bit_width, 1246 xtsc_component::xtsc_slave, 1069
nb_write, 1245 connect, 1074–1076
xtsc_component::xtsc_queue_producer_- optionally_get_coherence, 1076
parms, 870 xtsc_slave, 1074
xtsc_queue_producer_parms, 874 xtsc_component::xtsc_slave::response_-
xtsc_component::xtsc_router, 1004 info, 155
change_clock_period, 1019 xtsc_component::xtsc_slave_parms, 1077
connect, 1020–1022 xtsc_slave_parms, 1080
dump_profile_results, 1024 xtsc_component::xtsc_tlm22xttlm_-
dump_transaction_id_counts, 1025 transactor, 1083
execute, 1019 change_clock_period, 1091
get_port_and_apply_address_- connect, 1091, 1092
translation, 1024 execute, 1091
get_port_by_type, 1025 xtsc_tlm22xttlm_transactor, 1090
watchfilter_add, 1023 xtsc_component::xtsc_tlm22xttlm_-
watchfilter_dump, 1023 transactor::address_range, 109
watchfilter_remove, 1024 xtsc_component::xtsc_tlm22xttlm_-
xtsc_router, 1019 transactor::tlm_fw_transport_-
xtsc_component::xtsc_router::bit_field_info, if_impl, 169
111 tlm_fw_transport_if_impl, 170
xtsc_component::xtsc_router::req_rsp_info, xtsc_component::xtsc_tlm22xttlm_-
137 transactor::transaction_info, 175
xtsc_component::xtsc_router::request_info, xtsc_component::xtsc_tlm22xttlm_-
146 transactor::xtsc_respond_if_impl,
xtsc_component::xtsc_router::response_- 969
info, 153 nb_respond, 970
xtsc_component::xtsc_router::watchfilter_- xtsc_component::xtsc_tlm22xttlm_-
info, 182 transactor_parms, 1094
xtsc_component::xtsc_router::xtsc_- xtsc_tlm22xttlm_transactor_parms,
request_if_impl, 944 1096

1438 Xtensa SystemC (XTSC) Reference Manual

 INDEX

xtsc_component::xtsc_tlm2pin_memory_- get_input, 1209

transactor, 1097 get_output, 1209
connect, 1117–1119 parse_operand, 1212
execute, 1117 xtsc_wire_logic, 1208
fast_access, 1120 xtsc_component::xtsc_wire_logic::input_-
How_to_get_input_and_output_ports, definition, 114
1120 xtsc_component::xtsc_wire_logic::input_-
peek, 1120 definition::xtsc_wire_write_if_impl,
poke, 1120 1247
reset, 1120 nb_get_bit_width, 1249
xtsc_tlm2pin_memory_transactor, nb_write, 1248
1117 xtsc_component::xtsc_wire_logic::iterator_-
xtsc_component::xtsc_tlm2pin_memory_- definition, 117
transactor::response_info, 151 xtsc_component::xtsc_wire_logic::output_-
xtsc_component::xtsc_tlm2pin_memory_- definition, 123
transactor::xtsc_debug_if_cap, xtsc_component::xtsc_wire_logic::output_-
399 info, 128
nb_fast_access, 401 xtsc_component::xtsc_wire_logic_parms,
nb_peek, 400 1213
nb_poke, 400 xtsc_wire_logic_parms, 1218
xtsc_component::xtsc_tlm2pin_memory_- xtsc_component::xtsc_wire_parms, 1219
transactor::xtsc_request_if_impl, xtsc_wire_parms, 1222
927 xtsc_component::xtsc_wire_source, 1226
nb_fast_access, 929 connect, 1234, 1235
nb_load_retired, 930 get_control_input, 1234
nb_lock, 930 get_output_pin, 1234
nb_peek, 929 get_tlm_output, 1234
nb_poke, 929 nb_get_bit_width, 1236
nb_request, 930 nb_write, 1235
nb_retire_flush, 930 xtsc_wire_source, 1233
xtsc_component::xtsc_tlm2pin_memory_- xtsc_component::xtsc_wire_-
transactor_parms, 1122 source::output_definition, 126
xtsc_tlm2pin_memory_transactor_- xtsc_component::xtsc_wire_source::xtsc_-
parms, 1131 wire_write_if_impl, 1250
xtsc_component::xtsc_wire, 1191 nb_get_bit_width, 1251
connect, 1197, 1198 nb_write, 1251
execute, 1197 xtsc_component::xtsc_wire_source_parms,
nb_get_bit_width, 1199 1237
nb_read, 1199 xtsc_wire_source_parms, 1241
nb_write, 1198 xtsc_component::xtsc_xttlm2tlm2_-
xtsc_wire, 1196 transactor, 1259
xtsc_component::xtsc_wire_logic, 1200 change_clock_period, 1272
change_clock_period, 1211 connect, 1273, 1274
connect, 1209–1211 execute, 1272
execute, 1209 xtsc_xttlm2tlm2_transactor, 1272

Xtensa SystemC (XTSC) Reference Manual 1439

INDEX

xtsc_component::xtsc_xttlm2tlm2_- xtsc_delete_c_str_array
transactor::address_range, 110 xtsc, 76
xtsc_component::xtsc_xttlm2tlm2_- xtsc_dirname
transactor::nb_mm, 120 xtsc, 72
xtsc_component::xtsc_xttlm2tlm2_- xtsc_dispatch_command
transactor::tlm_bw_transport_- xtsc, 77
if_impl, 167 xtsc_dma_engine
xtsc_component::xtsc_xttlm2tlm2_- xtsc_component::xtsc_dma_engine,
transactor::transaction_info, 177 421
xtsc_component::xtsc_xttlm2tlm2_- xtsc_dma_engine.h, 1315
transactor::xtsc_request_if_impl, xtsc_dma_request.h, 1317
940 xtsc_dump_systemc_objects
nb_fast_access, 942 xtsc, 76
nb_lock, 942 xtsc_enable_text_logging
nb_peek, 942 xtsc, 66
nb_poke, 942 XTSC_ERROR
nb_request, 942 xtsc.h, 1302
xtsc_component::xtsc_xttlm2tlm2_- xtsc_event_dump
transactor_parms, 1276 xtsc, 83
xtsc_xttlm2tlm2_transactor_parms, xtsc_event_exists
1280 xtsc, 82
xtsc_compute_fast_access_swizzle xtsc_event_get
xtsc, 71 xtsc, 82
xtsc_confirm_conjugate_user_defined_- xtsc_event_register
port_types xtsc, 81
xtsc, 92 xtsc_exception.h, 1318
xtsc_connect xtsc_fast_access.h, 1319
xtsc, 93 xtsc_fast_access_block
xtsc_connection_interface xtsc::xtsc_fast_access_block, 432
xtsc::xtsc_connection_interface, 244 xtsc_fast_access_request
xtsc_copy_c_str xtsc::xtsc_fast_access_request, 442
xtsc, 75 XTSC_FATAL
xtsc_copy_c_str_array xtsc.h, 1301
xtsc, 75 xtsc_filter_apply_xtsc_peek
xtsc_core xtsc, 89
xtsc::xtsc_core, 286 xtsc_filter_apply_xtsc_poke
xtsc_core.h, 1313 xtsc, 89
xtsc_core_parms xtsc_filter_apply_xtsc_request
xtsc::xtsc_core_parms, 393 xtsc, 90
xtsc_create_queue_ticket xtsc_filter_apply_xtsc_response
xtsc, 61 xtsc, 90
XTSC_DEBUG xtsc_filter_create
xtsc.h, 1304 xtsc, 87
xtsc_delete_c_str xtsc::xtsc_filter, 456
xtsc, 75 xtsc_filter_dump

1440 Xtensa SystemC (XTSC) Reference Manual

 INDEX

xtsc, 88 xtsc, 67
xtsc_filter_exists xtsc_host_milliseconds
xtsc, 87 xtsc, 85
xtsc_filter_get xtsc_host_mutex_close
xtsc, 88 xtsc, 85
xtsc_filter_kind_dump xtsc_host_mutex_lock
xtsc, 86 xtsc, 83
xtsc_filter_kind_register xtsc_host_mutex_open
xtsc, 86 xtsc, 83
xtsc_finalize xtsc_host_mutex_try_lock
xtsc, 59 xtsc, 84
xtsc_fire_turboxim_event_id xtsc_host_mutex_unlock
xtsc, 61 xtsc, 84
xtsc_get_absolute_directory xtsc_host_sleep
xtsc, 72 xtsc, 85
xtsc_get_absolute_path XTSC_INFO
xtsc, 72 xtsc.h, 1304
xtsc_get_absolute_path_and_name xtsc_initialize
xtsc, 73 xtsc, 58, 59
xtsc_get_hex_dump_left_to_right xtsc_initialize_parms
xtsc, 67 xtsc::xtsc_initialize_parms, 467
xtsc_get_next_watchfilter_number xtsc_is_pin_level_port_type
xtsc, 86 xtsc, 92
xtsc_get_plugin_interface_t xtsc_is_tlm2_port_type
xtsc, 54 xtsc, 92
xtsc_get_port_type_name xtsc_is_user_defined_port_type
xtsc, 91 xtsc, 91
xtsc_get_relaxed_simulation_barrier xtsc_is_valid_identifier
xtsc, 62 xtsc, 74
xtsc_get_relaxed_simulation_interval xtsc_is_xttlm_port_type
xtsc, 63 xtsc, 91
xtsc_get_remaining_relaxed_simulation_- xtsc_load_library
time xtsc, 73
xtsc, 63 XTSC_LOG
xtsc_get_shared_memory xtsc.h, 1305
xtsc, 69 xtsc_log_delta_cycle
xtsc_get_system_clock_factor xtsc, 66
xtsc, 58 xtsc_log_multiline
xtsc_get_system_clock_period xtsc, 74
xtsc, 60 XTSC_LOG_PREFIX
xtsc_get_system_clock_posedge_offset xtsc.h, 1301
xtsc, 60 xtsc_lookup
xtsc_get_user_name xtsc_component::xtsc_lookup, 477
xtsc, 69 xtsc_lookup.h, 1321
xtsc_hex_dump xtsc_lookup_driver

Xtensa SystemC (XTSC) Reference Manual 1441

INDEX

xtsc_component::xtsc_lookup_driver, xtsc_memory_tlm2
487 xtsc_component::xtsc_memory_tlm2,
xtsc_lookup_driver.h, 1323 656
xtsc_lookup_driver_parms xtsc_memory_tlm2.h, 1338
xtsc_component::xtsc_lookup_driver_- xtsc_memory_tlm2_parms
parms, 494 xtsc_component::xtsc_memory_tlm2_-
xtsc_lookup_if.h, 1325 parms, 666
xtsc_lookup_parms xtsc_memory_trace
xtsc_component::xtsc_lookup_parms, xtsc_component::xtsc_memory_trace,
509 676
xtsc_lookup_pin xtsc_memory_trace.h, 1340
xtsc_component::xtsc_lookup_pin, 517 xtsc_memory_trace_parms
xtsc_lookup_pin.h, 1327 xtsc_component::xtsc_memory_-
xtsc_lookup_pin_parms trace_parms, 688, 689
xtsc_component::xtsc_lookup_pin_- xtsc_mmio
parms, 521 xtsc_component::xtsc_mmio, 699
xtsc_master xtsc_mmio.h, 1342
xtsc_component::xtsc_master, 532 xtsc_mmio_parms
xtsc_master.h, 1328 xtsc_component::xtsc_mmio_parms,
xtsc_master_parms 709
xtsc_component::xtsc_master_parms, xtsc_mode_switch_if.h, 1344
544
xtsc_module
xtsc_master_tlm2
xtsc::xtsc_module, 716
xtsc_component::xtsc_master_tlm2,
xtsc_module_pin_base
553
xtsc_component::xtsc_module_pin_-
xtsc_master_tlm2.h, 1330
base, 727
xtsc_master_tlm2_parms
xtsc_module_pin_base.h, 1346
xtsc_component::xtsc_master_tlm2_-
parms, 558 XTSC_NOTE
xtsc_memory xtsc.h, 1303
xtsc_component::xtsc_memory, 579 xtsc_parameter_type
xtsc_memory.h, 1332 xtsc::xtsc_parms, 743
xtsc_memory_b xtsc_parms.h, 1348
xtsc::xtsc_memory_b, 593 xtsc_parse_port_name
xtsc_memory_b.h, 1334 xtsc, 74
xtsc_memory_parms xtsc_pattern_match
xtsc_component::xtsc_memory_- xtsc, 57
parms, 614 xtsc_pin2tlm_lookup_transactor
xtsc_memory_pin xtsc_component::xtsc_pin2tlm_-
xtsc_component::xtsc_memory_pin, lookup_transactor, 765
634 xtsc_pin2tlm_lookup_transactor.h, 1350
xtsc_memory_pin.h, 1336 xtsc_pin2tlm_lookup_transactor_parms
xtsc_memory_pin_parms xtsc_component::xtsc_pin2tlm_-
xtsc_component::xtsc_memory_pin_- lookup_transactor_parms, 768
parms, 645, 646 xtsc_pin2tlm_memory_transactor

1442 Xtensa SystemC (XTSC) Reference Manual

 INDEX

xtsc_component::xtsc_pin2tlm_- xtsc::xtsc_request, 901–903

memory_transactor, 785 xtsc_request.h, 1364
xtsc_pin2tlm_memory_transactor.h, 1351 xtsc_request_if.h, 1366
xtsc_pin2tlm_memory_transactor_parms xtsc_request_if_impl
xtsc_component::xtsc_pin2tlm_- xtsc_component::xtsc_arbiter::xtsc_-
memory_transactor_parms, 795 request_if_impl, 950
xtsc_port_type xtsc_component::xtsc_memory::xtsc_-
xtsc, 54 request_if_impl, 934
xtsc_port_type_check xtsc_component::xtsc_memory_-
xtsc, 92 trace::xtsc_request_if_impl, 956
xtsc_prepare_to_switch_sim_mode xtsc_reset
xtsc, 71 xtsc, 90
xtsc_queue xtsc_reset_processes
xtsc_component::xtsc_queue, 814 xtsc, 59
xtsc_queue.h, 1353 xtsc_respond_if.h, 1368
xtsc_queue_consumer xtsc_respond_if_impl
xtsc_component::xtsc_queue_- xtsc_component::xtsc_memory_-
consumer, 823 trace::xtsc_respond_if_impl, 977
xtsc_queue_consumer.h, 1355 xtsc_component::xtsc_router::xtsc_-
xtsc_queue_consumer_parms respond_if_impl, 972
xtsc_component::xtsc_queue_- xtsc_response
consumer_parms, 830 xtsc::xtsc_response, 994
xtsc_queue_parms xtsc_response.h, 1369
xtsc_component::xtsc_queue_parms, xtsc_router
834 xtsc_component::xtsc_router, 1019
xtsc_queue_pin xtsc_router.h, 1371
xtsc_component::xtsc_queue_pin, 842 xtsc_router_parms
xtsc_queue_pin.h, 1357 xtsc_component::xtsc_router_parms,
xtsc_queue_pin_parms 1036
xtsc_component::xtsc_queue_pin_- xtsc_sb_state
parms, 846 xtsc::xtsc_core, 286
xtsc_queue_pop_if.h, 1358 xtsc_sc_unsigned_to_byte_array
xtsc_queue_producer xtsc, 70
xtsc_component::xtsc_queue_- xtsc_script_file
producer, 866 xtsc::xtsc_script_file, 1060
xtsc_queue_producer.h, 1360 xtsc_set_call_sc_stop
xtsc_queue_producer_parms xtsc, 60
xtsc_component::xtsc_queue_- xtsc_set_constructor_log_level
producer_parms, 874 xtsc, 65
xtsc_queue_push_if.h, 1362 xtsc_set_hex_dump_left_to_right
xtsc_register_command xtsc, 66
xtsc, 76 xtsc_set_relaxed_simulation_barrier
xtsc_register_mode_switch_interface xtsc, 62
xtsc, 70 xtsc_set_relaxed_simulation_interval
xtsc_request xtsc, 63

Xtensa SystemC (XTSC) Reference Manual 1443

INDEX

xtsc_set_system_clock_factor xtsc_udma.h, 1387

xtsc, 57 xtsc_udma_parms
xtsc_slave xtsc::xtsc_udma_parms, 1186
xtsc_component::xtsc_slave, 1074 xtsc_unregister_command
xtsc_slave.h, 1373 xtsc, 77
xtsc_slave_parms xtsc_user_state_dump
xtsc_component::xtsc_slave_parms, xtsc, 64
1080 xtsc_user_state_get
xtsc_switch_registration xtsc, 64
xtsc::xtsc_switch_registration, 1082 xtsc_user_state_set
xtsc_switch_sim_mode xtsc, 65
xtsc, 71 XTSC_VERBOSE
xtsc_text_logging_macros xtsc.h, 1304
xtsc, 94 XTSC_VERSION_INFO_STRING
xtsc_tlm22xttlm_transactor xtsc.h, 1306
xtsc_component::xtsc_tlm22xttlm_- xtsc_wait
transactor, 1090 xtsc, 61
xtsc_tlm22xttlm_transactor.h, 1375 XTSC_WARN
xtsc_tlm22xttlm_transactor_parms xtsc.h, 1303
xtsc_component::xtsc_tlm22xttlm_- xtsc_wire
transactor_parms, 1096 xtsc_component::xtsc_wire, 1196
xtsc_tlm2pin_memory_transactor xtsc_wire.h, 1389
xtsc_component::xtsc_tlm2pin_- xtsc_wire_logic
memory_transactor, 1117 xtsc_component::xtsc_wire_logic, 1208
xtsc_tlm2pin_memory_transactor.h, 1377 xtsc_wire_logic.h, 1391
xtsc_tlm2pin_memory_transactor_parms xtsc_wire_logic_parms
xtsc_component::xtsc_tlm2pin_- xtsc_component::xtsc_wire_logic_-
memory_transactor_parms, 1131 parms, 1218
XTSC_TRACE xtsc_wire_parms
xtsc.h, 1305 xtsc_component::xtsc_wire_parms,
xtsc_tx_loader 1222
xtsc::xtsc_tx_loader, 1148 xtsc_wire_read_if.h, 1393
xtsc_tx_loader.h, 1379 xtsc_wire_source
xtsc_tx_loader_parms xtsc_component::xtsc_wire_source,
xtsc::xtsc_tx_loader_parms, 1152 1233
xtsc_tx_xfer xtsc_wire_source.h, 1395
xtsc::xtsc_tx_xfer, 1155 xtsc_wire_source_parms
xtsc_tx_xfer.h, 1381 xtsc_component::xtsc_wire_source_-
xtsc_tx_xfer_if.h, 1383 parms, 1241
xtsc_tx_xfer_if_impl xtsc_wire_write_if.h, 1397
xtsc::xtsc_tx_loader::xtsc_tx_xfer_if_- xtsc_xttlm2tlm2_transactor
impl, 1163 xtsc_component::xtsc_xttlm2tlm2_-
xtsc_types.h, 1385 transactor, 1272
xtsc_udma xtsc_xttlm2tlm2_transactor.h, 1398
xtsc::xtsc_udma, 1179 xtsc_xttlm2tlm2_transactor_parms

1444 Xtensa SystemC (XTSC) Reference Manual

 INDEX

xtsc_component::xtsc_xttlm2tlm2_-
transactor_parms, 1280
xtsc_zero_extend_array_indices
xtsc, 68

Xtensa SystemC (XTSC) Reference Manual 1445