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Design of A Low Noise Amplifier Using AW

This document describes the design of a low noise amplifier (LNA) using AWR Microwave Office software. Key aspects include: - The LNA is designed for a center frequency of 2.4 GHz using the BFP 420 transistor with biases of 1.5V and 15mA. - S-parameters are used to characterize the transistor and calculate the available gain. Input and output matching networks are designed using transmission lines. - Simulations show the circuit has a gain of over 15 dB and is unconditionally stable over the frequency range based on Rollet's stability factors. Additional components are added to improve low frequency stability.

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0% found this document useful (0 votes)
106 views5 pages

Design of A Low Noise Amplifier Using AW

This document describes the design of a low noise amplifier (LNA) using AWR Microwave Office software. Key aspects include: - The LNA is designed for a center frequency of 2.4 GHz using the BFP 420 transistor with biases of 1.5V and 15mA. - S-parameters are used to characterize the transistor and calculate the available gain. Input and output matching networks are designed using transmission lines. - Simulations show the circuit has a gain of over 15 dB and is unconditionally stable over the frequency range based on Rollet's stability factors. Additional components are added to improve low frequency stability.

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© © All Rights Reserved
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Design of a Low Noise Amplifier using AWR


Microwave Office.

Conference Paper · July 2013

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Maganti akhil chandra Rahul Enishetty


Hochschule Bremen Hochschule Bremen
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DESIGN OF LOW NOISE AMPLIFIER
ABSTRACT: The objective of the project is to design a
Low Noise Amplifier(LNA). The amplifier is designed for
different specific parameters depending on the application.
Typical parameters are maximum transducer gain, output
power , low noise, circuit stability. Here a LNA is designed
to obtain an optimum gain with minimum noise figure for a
design frequency. In the project transistor BFP 420 with a
DC operating point (Vce=1.5v,Ic=15ma) and designed for a Fig 1 : Two Port network.
maximum center frequency(f=2.4Ghz). The entire design is
carried out with the AWR Microwave Office design Given specifications are : Transistor – BFP 420
tool,and the simulation results for each of the stages are Frequency = 2.4Ghz.
clearly presented. Bias : Vc = 1.5v, Ic = 15v

I. INTRODUCTION The S-Parameters of the transistor for the given


specifications are :
The demand for compact, low cost, high gain and
low noise amplifier has increased significantly for the S- Polar Form Rectangular Form
antenna design with the wide spread proliferation in Parameter
the wireless communication technology in recent S11 0.494∠160.90 -0.467+0.1617i
years. The objective is to describe the bilateral design
procedure of a low noise amplifier for given S12 0.075∠42.32 0.056+0.0508i
parameters. Maximum transducer gain should be S21 5.29∠52.83 2.66+4.576i
achieved. S22 0.186∠227.91 -0.125-0.1384i

A. Low Noise Amplifier (LNA) :


Reflection coefficient are found as :
Low Noise Amplifiers (LNA) are used for
amplification of extremely weak input signals. The Γs = -0.7160-0.1376i
LNA is usually placed in the first stage of a
microwave receiver circuit because the first stage
decides the quality factor of the receiver. The first ΓL = 0.0147+0.5727i
stage affects the overall noise figure of the receiver
and thereby placement of a LNA in this stage reduces
the overall cost of the amplifier. The most important Where , B1 = 1+| S11|2-| S22|2-|Δ|2 =1.0621
parameters and keywords for a LNA design are gain,
noise figure, non-linearity, stability and matching. B2 = 1+| S22|2-| S11|2-|Δ|2 = 0.6432
The applications of LNA are in GPS receivers,
Cellular phones, Wireless LANs, Satellite C1= S11-Δ S22* = -0.4945 + 0.0956i
communication etc .
C2= S22-Δ S11* = 0.0078 - 0.2739i
B. Design Using S-Parameteres:
Δ= (S11 *S22)-( S12* S21) = 0.116-0.350i
S-parameters are widely used because of their ease to
measure and work, than with Y-parameters. They are
Gain of the Amplifier :
easy to comprehend, convenient and provide a wealth
of information at a glance.

Two port networks can be characterized by their s- ,


parameters. S-parametres help in calculation of
maximum available gain, potential instabilities, input
and output impedances and transducer gain. S- ,
parameters also allow the calculation of optimum
source and load impedances, to choose the source
and load impedances for a specified transducer gain.
musweepTxline
2.4 GHz MU1()
1.5 1.39 LowNoiseAmp
MU2()
LowNoiseAmp

1
II. Network Matching
0.5

Network matching can be done in two ways either by


0

inserting capacitive and inductive elements or by 0.1 1.1 2.1 3.1


Frequency (GHz)
4.1 5

inserting a combination of transmission line and a


stub line that produces same impedance effect as of Fig 4: stability μ-sweep
the reactive elements and matches the network to the
characteristic impedance. The lengths of the stub As the μ1 and μ2 values are greater than 1 at the
lines can be found using the smith chart (Stub line design frequency the circuit is unconditionally stable.
matching technique). At higher frequencies the stability decreases down to
1.
The input and output matching networks along with
the specified transistor BFP 420 along with DC In order to obtain stability also for low frequencies
operating point is shown below : such as at 1 GHz the following circuit was introduced
using a resistor in parallel and a capacitor in parallel.
TLIN
ID=TL1 SUBCKT
TLIN
ID=TL4
The best stability was obtained by using the tuning
PORT Z0=50 Ohm ID=S1 Z0=50 Ohm
P=1
Z=50 Ohm
EL=14.76 Deg
F0=2.4 GHz
NET="bfp420_spar"
Vc=1.5 V
Ic=15.0 mA
EL=18 Deg
F0=2.4 GHz tool of MWO. The new circuit design and the
2 C
PORT
P=2
resulting simulations can be understood from.
TLOC 1 Z=50 Ohm
ID=TL2 TLOC
Z0=50 Ohm B ID=TL3
EL=65.88 Deg Z0=50 Ohm
F0=2.4 GHz EL=125.6 Deg
E F0=2.4 GHz TLIN TLIN
ID=TL1 SUBCKT ID=TL4
PORT Z0=50 Ohm ID=S1 Z0=50 Ohm
P=1 EL=14.76 Deg NET="bfp420_spar" EL=21.4 Deg
Z=50 Ohm F0=2.4 GHz Vc=1.5 V F0=2.4 GHz
Ic=15.0 mA

2 C
PORT
P=2
TLOC 1 RES Z=50 Ohm
ID=TL2 ID=R2
Z0=50 Ohm B R=60 Ohm
EL=64.98 Deg
F0=2.4 GHz
E

Fig 2: Ideal Low Noise Amplifier. TLIN


TLOC
ID=TL3
Z0=50 Ohm
EL=124.6 Deg
F0=2.4 GHz
ID=TL5
Z0=50 Ohm
EL=90 Deg
F0=2.4 GHz

The response of the ideal amplifier circuit is shown in CAP


ID=C2

the below figure :


C=100 pF

sparameters
40
2.4 GHz
Fig 5: Improved LNA with Stability Circuit.
16.7 dB
20

0
The resulting stability can be found from the
-20
DB(|S(1,1)|)
LowNoiseAmp
following chart.
-40 DB(|S(1,2)|)
LowNoiseAmp
DB(|S(2,1)|)
-60 LowNoiseAmp

0.1 1.1 DB(|S(2,2)|) 2.1 3.1 4.1 5 mu sweep


LowNoiseAmp 1.8
Frequency (GHz)

1.6

1.4

Fig 3 : Ideal response (s-parameter sweep) 1.2 MU1()


LowNoiseAmp
MU2()
LowNoiseAmp
1
0.001 1 2 3 4
Frequency (GHz)

For the above given specifications, the theoretical


calculations are done . The calculated gain is 16.7db
Fig 6 : Stability µ-sweep.
and is verified with the simulation result.
sparameters
A. Stability : 40
2.4 GHz
16.7 dB
20

Stability refers to an amplifier's immunity to causing -20


DB(|S(1,1)|)

spurious oscillation. The first step in designing a LNA -40


LowNoiseAmp
DB(|S(1,2)|)
LowNoiseAmp
DB(|S(2,1)|)

is determining its stability factor. It is important to -60


0.1 1.1
LowNoiseAmp
DB(|S(2,2)|)2.1
LowNoiseAmp
3.1
Frequency (GHz)
4.1 5

check the stability of an amplifier because otherwise


the amplifier may function like an oscillator.
Fig 7: S-parameter sweep for improved circuit
The stability of the amplifier increases for an increase
As the μ1 and μ2 values are greater than 1 at all the
in the frequency. At frequency of 1GHz amplifier has
frequencies the circuit is unconditionally stable. The
stability lower than 1 and increases until the
amplifier is found to be stable at all frequencies using
maximum is reached at our desired frequency of
the µ-sweep chart.
2.4GHz
III. Design using Microstrip Lines
and stability network

The design can be improved using the real


transmission lines i.e. Microstrip lines. Here, we use
the substrate RO4003c with thickness 32 mil and
copper thickness 17um.

A. Proof of Unconditional Stability( µ-test) :

The stability of the amplifier is theoretically proven Figure 9 : Tx line window.


by applying the µ-Test. The parameter must be larger
than 1 in order to prove that the circuit is 6. To compensate the extra length that is added when
a T-Junction is inserted a short open line is added at
unconditional stable.
the 3rd port of the T-junction. This was done by
using the tuning tool of MWO.

The S-parameter sweep, Stability µ-sweep and Noise


Figure(NF) are simulated for the amplifier circuit
B. Design of circuit using Microstrip Lines : with Microstrip lines and can be observed in the
below figures.
The real amplifier circuit design is now realized as
described below using design procedure. The circuit sparameter_step3
40

containing microstrip instead of ideal lines as well as 20


2.4 GHz
16.5 dB

2.401 GHz
0.0723 dB

stability compensated T-junctions, looks as follows. 0


DB(|S(1,1)|)
step3_LNA
-20 DB(|S(1,2)|)
step3_LNA
DB(|S(2,1)|)
step3_LNA
-40
DB(|S(2,2)|)
SUBCKT MLIN MLIN MLIN step3_LNA
ID=S1 ID=TL26 ID=TL6 ID=TL24
NET="bfp420_spar" W=1.79 mm MTEE$ W=1.79 mm MTEE$ W=1.79 mm DB(NF())
Vc=1.5 V L=1 mm ID=TL22 L=2.69 mm ID=TL17 L=15 mm
Ic=15.0 mA -60 step3_LNA
MLIN MLIN 1 2 1 2
PORT
P=1
ID=TL1
W=1.79 mm MTEE$
ID=TL4
W=1.79 mm
2 C 0.1 1.1 2.1 3.1 4.1 DB(NFMin()) 5
3 3 PORT
step3_LNA
Z=50 Ohm L=10 mm ID=TL12 L=3.06 mm
1
P=2
Z=50 Ohm
Frequency (GHz)
1 2
B
3 MVIA1P
ID=V1
D=1 mm E MLIN
ID=TL28
H=1 mm MLIN
W=1.79 mm
T=0.05 mm ID=TL3
L=1 mm
W=1 mm W=1.79 mm
RHO=1 L=26.3 mm
MLIN
ID=TL5
W=1.79 mm
L=12.61 mm

Fig 10 : S-parameter sweep and Noise Figure.


RES
ID=R1
R=60 Ohm

MSUB
Er=3.55
H=0.8128 mm MVIA1P
T=0.017 mm ID=V2
Rho=0.7 D=1 mm
H=1 mm MLIN
Tand=0.0027
T=0.05 mm ID=TL27
ErNom=3.48
W=1 mm W=1.79 mm
Name=RO/RO4003
RHO=1 L=18.7 mm

CAP mu sweep_step3 MU1()


ID=C1
C=100 pF
2.5 step3_LNA

MVIA1P
MU2()
ID=V3
D=1 mm step3_LNA
H=1 mm
T=0.05 mm
W=1 mm
RHO=1

2.397 GHz
1.496

1.5
Fig 8 : Design of amplifier using Microstrip Lines.
1
0.1 1.1 2.1 3.1 4.1 5
C. Design Procedure: Frequency (GHz)

1. In order to have the stability also at low


Fig 11 : Stability µ-sweep.
frequencies a resistor is added in parallel with the
output port and also a capacitor in parallel.
Layout of the Circuit including biasing network
2. Since the gain decreases when the resistor is added
the ideal transmission line is added in series with and RF-DC decoupling :
parallel resistance.
3. In the next step the ideal line is replaced with the Now, we add the radial stubs for the biasing
micro strip line (MSTUB) which can be understood networks. The radial stub is connected to a microstrip
from Fig 8. The dimension of this line can be line having a length of /4 which acts as an open line
calculated by the TX line tool shown below. The for the RF signal. An additional line is connected to
general physical characteristics shown in Fig 9 were provide a port to connect the DC power source. At
applied to all microstrip lines. the base and collector terminal, blocking capacitors
4. In order to add the resistor and other additional
components in the circuit we are adding extra micro are added to isolate the RF signal from the DC power
strip lines in our circuit(see Fig 8). source.
5. All lines were connected with the help of T-
Junctions(see Fig 8).
MLIN
ID=TL16
W=1.79 mm MTEE$
MLIN
ID=TL13
W=1.79 mm
VNA. Hence we do not have to worry about
attaching DC wires directly to the circuit under test.
L=1 mm ID=TL25 L=1 mm

MLIN MLIN 1 2
ID=TL10 ID=TL8
W=1.79 mm MTEE$ W=1.79 mm 3 MRSTUB2W$
L=1 mm ID=TL21 L=1 mm ID=TL23
W=W@1 mm
1 2 Ro=13.5 mm
Theta=45 Deg
3

5. Slowly apply the VCE voltage according to the


MRSTUB2W$
ID=TL11 MLIN
W=W@1 mm ID=TL18
Ro=13.5 mm W=1.79 mm
Theta=45 Deg L=18.7 mm

MLIN
ID=TL15
SUBCKT MLIN MLIN MLIN MLIN MLIN
W=1.79 mm CAP
ID=S1 ID=TL26 ID=TL6 ID=TL7 ID=TL19 ID=TL24
L=18.7 mm ID=C2

required bias and VBE voltage, such that you reach


NET="bfp420_spar" W=1.79 mm MTEE$ W=1.79 mm MTEE$ W=1.79 mm W=1.79 mm W=1.79 mm
Vc=1.5 V L=1 mm ID=TL22 L=2.69 mm ID=TL17 L=5 mm 3 L=1 mm C=100 pF L=15 mm
Ic=15.0 mA
MLIN MLIN MLIN MLIN 1 2 1 2 2 1
PORT ID=TL1 CAP ID=TL20 ID=TL9 ID=TL4
ID=C3 2 C
P=1 W=1.79 mm W=1.79 mm W=1.79 mm MTEE$ W=1.79 mm 3 3 MTEE$ PORT
Z=50 Ohm L=10 mm C=100 pF L=1 mm 3 L=5 mm ID=TL12 L=3.06 mm ID=TL14 P=2
1 Z=50 Ohm
2 1 1 2
B

the required IC.


MTEE$ 3 MVIA1P
ID=TL2 ID=V1
D=1 mm E MLIN
ID=TL28
H=1 mm MLIN
W=1.79 mm
T=0.05 mm ID=TL3
L=1 mm
MSUB W=1 mm W=1.79 mm
Er=3.55 RHO=1 L=26.3 mm
MLIN
H=0.8128 mm
ID=TL5
T=0.017 mm
W=1.79 mm
Rho=0.7

6. Read off the S-parameters and save the data.


L=12.61 mm
Tand=0.0027
ErNom=3.48
Name=RO/RO4003 RES
ID=R1
R=60 Ohm

MVIA1P
ID=V2
D=1 mm
H=1 mm MLIN
T=0.05 mm ID=TL27
W=1 mm W=1.79 mm
RHO=1 L=18.7 mm

DB(|S(1,1)|)
CAP
sparameter_LNA_practical G06
ID=C1
C=100 pF
50
MVIA1P
ID=V3
D=1 mm
DB(|S(1,2)|)
G06
H=1 mm
T=0.05 mm
W=1 mm
RHO=1

0 DB(|S(2,1)|)
G06
DB(|S(2,2)|)
G06
-50
Fig 12 : Design of amplifier including biasing DB(|S(1,1)|)
step4_LNA
network and RF-DC decoupling. -100
DB(|S(1,2)|)
step4_LNA
DB(|S(2,1)|)
step4_LNA
-150
0.1 2.1 4.1 6 DB(|S(2,2)|)
Frequency (GHz) step4_LNA

Fig 14: S-parameter sweep of both simulated and


etched circuit.

The simulated s-parameter values of the transistor are


matched with the s-parameter values of the etched
design circuit and shows that the Low Noise
Fig 13 : Layout of the Low Noise Amplifier. Amplifier for the desired specifications has been
succesfully designed.
Step4_LNA DB(|S(1,1)|)
50 step4_LNA
2.405 GHz
15.85 dB
DB(|S(1,2)|) V. Conclusion
step4_LNA
0
DB(|S(2,1)|)
step4_LNA

-50 DB(|S(2,2)|) The objective to design a low noise amplifier for


step4_LNA

-100
maximum gain was reached by using computation
methods from Microwave office as well as the Smith
-150
0.1 1.1 2.1 3.1
Frequency (GHz)
4.1 5
chart. With the help of the theoretical design the ideal
transmission lines were realized. The gain was
optimized by introducing resistors at the output port.
Fig 14 : S-parameter sweep of the Low Noise
By using the Microwave Office tuning tool the
Amplifier.
stability was improved for operation at lower
IV. Manufacturing frequencies. The microstrips lines were successfully
implemented from the ideal lines, further real
The final layout obtained through the MWO office microstrip elements were added and optimized for
tool is etched on a copper board. After the etching stability using the MWO tuning tool. The biasing
process the board is cleaned with the solvent called network for RF-DC decoupling was included from
PCB cleaner. Then the resistors and capacitors are which the final layout of the low noise amplifier was
soldered on the copper board and the VIA’s are obtained. The simulated s-parameter values of the
inserted using the rivet press. Now, the circuit is transistor are matched with the s-parameter values of
ready for test using the Vector Network Analyser the etched design circuit and shows that the Low
(VNA) . Noise Amplifier for the desired specifications has
been succesfully designed.
A. Test Using VNA :
VI. References
1.Set the correct frequency range to the VNA. Set the
input power to -10 dBm. 1.[Online].Available:http://en.wikipedia.org/wiki/Lo
2. Calibrate the VNA. w-noise_amplifier. [Accessed 14 JULY 2013].
3. Connect the LNA input to port 1 of the VNA, 2.[Online].Available:http://en.wikipedia.org/wiki/Mi
Connect the LNA output to port 2 of the VNA. crostrip. [Accessed 14 August 2012].
4. The VNA can bias the circuit through the attached 3.S.Peik, “AMW_LECURE_NOTES”, Chap. 8,
double DC supply. A Bias network is build into the Hochschule Bremen University of Applied Sciences.

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