Design of A Low Noise Amplifier Using AW
Design of A Low Noise Amplifier Using AW
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1
II. Network Matching
0.5
2 C
PORT
P=2
TLOC 1 RES Z=50 Ohm
ID=TL2 ID=R2
Z0=50 Ohm B R=60 Ohm
EL=64.98 Deg
F0=2.4 GHz
E
sparameters
40
2.4 GHz
Fig 5: Improved LNA with Stability Circuit.
16.7 dB
20
0
The resulting stability can be found from the
-20
DB(|S(1,1)|)
LowNoiseAmp
following chart.
-40 DB(|S(1,2)|)
LowNoiseAmp
DB(|S(2,1)|)
-60 LowNoiseAmp
1.6
1.4
2.401 GHz
0.0723 dB
MSUB
Er=3.55
H=0.8128 mm MVIA1P
T=0.017 mm ID=V2
Rho=0.7 D=1 mm
H=1 mm MLIN
Tand=0.0027
T=0.05 mm ID=TL27
ErNom=3.48
W=1 mm W=1.79 mm
Name=RO/RO4003
RHO=1 L=18.7 mm
MVIA1P
MU2()
ID=V3
D=1 mm step3_LNA
H=1 mm
T=0.05 mm
W=1 mm
RHO=1
2.397 GHz
1.496
1.5
Fig 8 : Design of amplifier using Microstrip Lines.
1
0.1 1.1 2.1 3.1 4.1 5
C. Design Procedure: Frequency (GHz)
MLIN MLIN 1 2
ID=TL10 ID=TL8
W=1.79 mm MTEE$ W=1.79 mm 3 MRSTUB2W$
L=1 mm ID=TL21 L=1 mm ID=TL23
W=W@1 mm
1 2 Ro=13.5 mm
Theta=45 Deg
3
MLIN
ID=TL15
SUBCKT MLIN MLIN MLIN MLIN MLIN
W=1.79 mm CAP
ID=S1 ID=TL26 ID=TL6 ID=TL7 ID=TL19 ID=TL24
L=18.7 mm ID=C2
MVIA1P
ID=V2
D=1 mm
H=1 mm MLIN
T=0.05 mm ID=TL27
W=1 mm W=1.79 mm
RHO=1 L=18.7 mm
DB(|S(1,1)|)
CAP
sparameter_LNA_practical G06
ID=C1
C=100 pF
50
MVIA1P
ID=V3
D=1 mm
DB(|S(1,2)|)
G06
H=1 mm
T=0.05 mm
W=1 mm
RHO=1
0 DB(|S(2,1)|)
G06
DB(|S(2,2)|)
G06
-50
Fig 12 : Design of amplifier including biasing DB(|S(1,1)|)
step4_LNA
network and RF-DC decoupling. -100
DB(|S(1,2)|)
step4_LNA
DB(|S(2,1)|)
step4_LNA
-150
0.1 2.1 4.1 6 DB(|S(2,2)|)
Frequency (GHz) step4_LNA
-100
maximum gain was reached by using computation
methods from Microwave office as well as the Smith
-150
0.1 1.1 2.1 3.1
Frequency (GHz)
4.1 5
chart. With the help of the theoretical design the ideal
transmission lines were realized. The gain was
optimized by introducing resistors at the output port.
Fig 14 : S-parameter sweep of the Low Noise
By using the Microwave Office tuning tool the
Amplifier.
stability was improved for operation at lower
IV. Manufacturing frequencies. The microstrips lines were successfully
implemented from the ideal lines, further real
The final layout obtained through the MWO office microstrip elements were added and optimized for
tool is etched on a copper board. After the etching stability using the MWO tuning tool. The biasing
process the board is cleaned with the solvent called network for RF-DC decoupling was included from
PCB cleaner. Then the resistors and capacitors are which the final layout of the low noise amplifier was
soldered on the copper board and the VIA’s are obtained. The simulated s-parameter values of the
inserted using the rivet press. Now, the circuit is transistor are matched with the s-parameter values of
ready for test using the Vector Network Analyser the etched design circuit and shows that the Low
(VNA) . Noise Amplifier for the desired specifications has
been succesfully designed.
A. Test Using VNA :
VI. References
1.Set the correct frequency range to the VNA. Set the
input power to -10 dBm. 1.[Online].Available:http://en.wikipedia.org/wiki/Lo
2. Calibrate the VNA. w-noise_amplifier. [Accessed 14 JULY 2013].
3. Connect the LNA input to port 1 of the VNA, 2.[Online].Available:http://en.wikipedia.org/wiki/Mi
Connect the LNA output to port 2 of the VNA. crostrip. [Accessed 14 August 2012].
4. The VNA can bias the circuit through the attached 3.S.Peik, “AMW_LECURE_NOTES”, Chap. 8,
double DC supply. A Bias network is build into the Hochschule Bremen University of Applied Sciences.