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Unit 3: Bus Structure, Memory and I/O Interfacing

A microcomputer consists of a CPU, memory, and I/O units that communicate via a bus. A bus contains multiple parallel lines that transmit binary data and control signals. The main types of buses in a system bus are: 1) A data bus transports data between components, 2) An address bus specifies memory and I/O locations, and 3) A control bus regulates access and operations using signals like read, write, acknowledge, and interrupt requests.

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461 views1 page

Unit 3: Bus Structure, Memory and I/O Interfacing

A microcomputer consists of a CPU, memory, and I/O units that communicate via a bus. A bus contains multiple parallel lines that transmit binary data and control signals. The main types of buses in a system bus are: 1) A data bus transports data between components, 2) An address bus specifies memory and I/O locations, and 3) A control bus regulates access and operations using signals like read, write, acknowledge, and interrupt requests.

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yogesh deo
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Unit 3: Bus Structure, Memory and I/O Interfacing

BUS STRUCTURE:
A microcomputer consists of a set of components or modules of three basic types CPU
memory and I/O units which communicate with each other. A bus is a communication
pathway between two or more such components. A bus actually consists of multiple
communication pathway or lines. Each line is capable of transmitting signals representing
binary 1 and 0. Several lines of the bus can be used to transmit binary data simultaneously.
The bus that connects major microcomputer components such as CPU, memory or I/O is
called the system bus. System bus consists of number of separate lines. Each line assigned a
particular function. Fundamentally in any system bus the lines can be classified into three
group buses.
1. Data Bus: Data bus provides the path for monitoring data between the system
modules. The bus has various numbers of separate lines like 8, 16, 32, or 64. Which
referred as the width of data bus .These number represents the no. of bits they can
carry because each carry 1 bit.
2. Address Bus: Each Lines of address bus are used to designate the source or
destination of the data on data bus. For example, if the CPU requires reading a word
(8, 16, 32) bits of data from memory, it puts the address of desired word on address
bus. The address bus is also used to address I/O ports. Bus width determines the total
memory the up can handle.
3. Control Bus: The control bus is a group of lines used to control the access to control
signals and the use of the data and address bus. The control signals transmit both
command and timing information between the system modules. The timing signals
indicate the validity of data and address information, whereas command signals
specify operations to be performed. Some of the control signals are:
Memory Write (MEMW): It causes data on the bus to be loaded in to the address
location.
Memory Read (MEMR): It causes data from the addressed location to be placed on
the data bus.
I/O Write (IOW): It causes the data on the bus to be output to the addressed I/O port.
I/O Read (IOR): It causes the data from the addressed I/O port to be placed on the
bus.
Transfer Acknowledge: This signal indicates that data have been accepted from or
placed on the bus.
Bus Request: It is used to indicate that a module wants to gain control of the bus.
Bus Grant: It indicates that a requesting module has been granted for the control of
bus.
Interrupt Request: It indicates that an interrupt has been pending.
Interrupt Acknowledge: it indicates that the pending interrupt has been recognized.

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