FINFET
Index
Sr no Topic
1 Basics of FinFET
2 Structure of FinFET
3 Types of FinFET
4 SG FinFET and IG FinFET
5 Fabrication process of FinFET
6 Characteristics of FinFET
7 Advantages of FinFET
8 Disadvantages of FinFET
9 Application of FinFET
1.basics of finfet
It is Type of Multi Gate MOSFET.
It is widely used over planar CMOS FET.
Fin is channel in between source and drain.
FinFET can have two or four or more Fin in same structure.
It gives following advantages over FET
Area of performance
Lower Leakage power
Low voltage operation
2.structure of finfet
2.1..Traditional planar mosfet finfet
3.types of FinFET
A) shortgate and insulated gate
3.1 short gate and insulated gate FinFET
SG FinFET IG FinFET
• It is 3T FinFET. • It is 4T FinFET.
• Front and Back Gates are shorted. • Front and Back Gates are isolated.
• Threshold Voltage can not be controlled • Threshold Voltage Vt controlled externally
by using back gate bias.
externally.
• More area occupied.
• Less area occupied
• Can apply different voltage on both gates.
• High on and off current
• Can not apply different voltage on both
gate
3.2 Bulk and SOI FinFET
Bulk FinFET SOI FinFET
• Easy fabrication • Provides isolation between adjacent
• Less costly device.
• Difficult to control • Low leakage current
• Consumes high power and high leakage • Fabrication steps are difficult as pure
current quality silicon deposited on oxide.
• Device isolation to be done separately • Costly fabrication.
4.Fabrication process of FinFET
Following steps are included to make FinFET
• Substrate: In fabrication process, 1st lightly doped P type substrate is fabricated and hard mask
is fabricated over the substrate.
• Fin Etch: Then by a highly an isotropic process fins are formed.
• Oxide Deposition: Over Fins oxide layers are formed to isolate the fins.
• Planarization: It is planarized by chemical mechanical polishing process.
• Recess Etch: By this process excess oxide is etched.
• Gate Oxide : To isolate the channel from the gate by thermal oxidation process gate oxide is
deposited over the fins.
• Deposition of the Gate: highly doped N+ poly silicon gate layer is formed and deposited over
fins.
5.characteristics of FinFET
Drain Current will increase with respect to Vgs (Gate source voltage).
Initially, la will increase with increase in Vds (Drain to source voltage), after that FinFET enters
into saturation region where ld current will be constant.
6.Application of FinFET
• Lower Power consumption
• Operates at low voltage
• Operating Speed is higher
• Static leakage current is reduced up to 90% Compact.
Disadvantages of FinFET
• Fabrication cost is higher then CMOS circuit.
• Controlling Fin Depth is difficult.
7.Applications
• Used in Microprocessor
• Used in Microcontroller
• Used in Smart Phone Used in compact chip
• Qualcomm 625 CPU-example
REFERENCE
• Finfet modelling for 10 nm and beyond by yogesh s chauhan(assistant prof,iit kanpur)
• FinFET design by Dr.KG sharma