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DE Assignment - 2

This document contains instructions and questions for an assignment on digital electronics for three groups of students. It provides details on drawing universal shift register circuits, designing synchronous counters, and creating state diagrams and circuits for Moore sequence detectors. Students are instructed to answer all questions neatly in an A4 sheet by the deadline of November 11th for a maximum of 7.5 marks.

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Ahmad Raza
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89 views4 pages

DE Assignment - 2

This document contains instructions and questions for an assignment on digital electronics for three groups of students. It provides details on drawing universal shift register circuits, designing synchronous counters, and creating state diagrams and circuits for Moore sequence detectors. Students are instructed to answer all questions neatly in an A4 sheet by the deadline of November 11th for a maximum of 7.5 marks.

Uploaded by

Ahmad Raza
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Department of Computer Science & Engineering.

DIGITAL ELECTORNICS [19CSE33]

Instructions:
 ANSWER NEATLY AND LEGIBLY in A4 Sheet only.
 Sketch diagrams wherever relevant. Explain your notations explicitly and
clearly.
 An incomplete assignment is not acceptable for submission.
 Once you submit your assignment, you will be expected to answer all the
questions there INDEPENDENTLY.
 Leave clear left margin on every page. Add the Page boarder and number.
 Answer all questions based on allotted group
New Horizon College of Engineering, Bengaluru
Autonomous College affiliated to VTU, Accredited by NAAC with ‘A’ Grade
DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING

ASSIGNMENT – 2
GROUP 1
COURSE: DIGITAL ELECTORNICS COURSE CODE: 19CSE33
DATE OF PUBLISHING: 06-11-21 SEM/SEC: 3/D,E
LAST DATE OF SUBMISSION: 11-11-21 MAX. MARKS: 7.5

NOTE: Answer all questions.

RBT
Q# Question COs POs Marks
Level
Draw the Universal shift register circuit
diagram for the fallowing conditions of mux
S1 S2 ACTION

1 0 0 Shift Right L3 CO4 PO1, PO2, PO3, PO4 2.5


0 1 Parallel load
1 0 Shift left
1 0 No change
Design Synchronous counter for the given count
2 L4 CO5 PO1, PO2, PO3, PO4 2.5
1->3->9->15->2->7->6->4->1
Draw the state diagram and circuit diagram
3 L3 CO5 PO1, PO2, PO3, PO4 2.5
for the moore Sequence detector of 1011
New Horizon College of Engineering, Bengaluru
Autonomous College affiliated to VTU, Accredited by NAAC with ‘A’ Grade
DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING

ASSIGNMENT – 2
GROUP 2
COURSE: DIGITAL ELECTORNICS COURSE CODE: 19CSE33
DATE OF PUBLISHING: 06-11-21 SEM/SEC: 3/D,E
LAST DATE OF SUBMISSION: 11-11-21 MAX. MARKS: 7.5

NOTE: Answer all questions.

RBT
Q# Question COs POs Marks
Level
Draw the Universal shift register circuit
diagram for the fallowing conditions of mux
S1 S2 ACTION

1 0 0 Parallel load L3 CO4 PO1, PO2, PO3, PO4 2.5


0 1 Shift Right
1 0 Shift left
1 0 No change
Design Synchronous counter for the given count
2 L4 CO5 PO1, PO2, PO3, PO4 2.5
0->3->7->15->2->13->6->4->0
Draw the state diagram and circuit diagram
3 L3 CO5 PO1, PO2, PO3, PO4 2.5
for the moore Sequence detector of 1100
New Horizon College of Engineering, Bengaluru
Autonomous College affiliated to VTU, Accredited by NAAC with ‘A’ Grade
DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING

ASSIGNMENT – 2
GROUP 3
COURSE: DIGITAL ELECTORNICS COURSE CODE: 19CSE33
DATE OF PUBLISHING: 06-11-21 SEM/SEC: 3/D,E
LAST DATE OF SUBMISSION: 11-11-21 MAX. MARKS: 7.5

NOTE: Answer all questions.

RBT
Q# Question COs POs Marks
Level
Draw the Universal shift register circuit
diagram for the fallowing conditions of mux
S1 S2 ACTION

1 0 0 Shift Right L3 CO4 PO1, PO2, PO3, PO4 2.5


0 1 Parallel load
1 0 No change
1 0 Shift left
Design Synchronous counter for the given count
2 L4 CO5 PO1, PO2, PO3, PO4 2.5
5->3->8->15->2->9->6->4->5
Draw the state diagram and circuit diagram
3 L3 CO5 PO1, PO2, PO3, PO4 2.5
for the moore Sequence detector of 0011

Faculty In charge HOD-CSE

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