UNDERGRADUATE PROGRAM

SYLLABUS
(Under Decision No.1009/QĐ-ĐHFPT dated 01/09/2021)

1 Course Name
2 Course Code
3 No of credits
4 Degree Level

5 Time Allocation

6 Pre-requisite

7 Main objectives

8 Description

9 Student's task

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 Teaching &
10 Learning
Materials

Assessment
11
scheme

12 Scoring scale
13 Schedule
14 Exam structure

15 Approval Date

16 Approval Level

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 FPT UNIVERSITY
UNDERGRADUATE PROGRAM
SYLLABUS
(Under Decision No.1009/QĐ-ĐHFPT dated 01/09/2021)

COMPUTER ORGANIZATION AND ARCHITECTURE

CEA201
3
Bachelor
Contact time: 30 sessions; 1 session = 90'
Lectures: 15
Tutorials 15

Upon successful completion of this course, students should:

1. Knowledge:
- Understand the structure and function of computers generally and a distinction between computer orga
computer architecture.
- Understand computer organization: roles of processors, main memory, and interface between the comp
peripherals
- Understand computer architecture: instruction set, the number of bits used to represent various data typ
mechanism and techniques for addressing memory
2. Skills:
- Be able to solve binary math operations using the computer.
- Be able to write simple assembly language programs
- Be able to prepare engineering reports and do presentations scientifically
- Be able to apply knowledges to do research projects.

This course addresses mainly ABET outcomes:

a. Ability to apply knowledge of mathematics, science and engineering.
d. Ability to function on multidisciplinary teams.
g. Ability to communicate effectively.
e. Ability to identify, formulate and solve engineering problems.
and partly outcomes:
f. An understanding of professional and ethical responsibility
i. A recognition of the need for, and an ability to engage in life-long learning
k. Ability to use the techniques, skills and modern engineering tools necessary for engineering practice.

This course in an introduction to computer architecture and organization. It will cover topics in both the p
the computer (organization) and the logical design of the computer (architecture). The main contents incl
organization of a simple stored-program computer: CPU, busses and memory; Instruction sets, machine
assembly language; Conventions for assembly language generated by compilers; Floating-point number
Hardware organization of simple processors; Address translation and virtual memory; Very introductory e
input/output devices, interrupt handling and multi-tasking systems.
Chapter covered: Computer Evolution and Performance; A Top-Level View of Computer Function and
Cache Memory; Internal Memory; External Memory; Input/Output; Operating System Support; Instruction
Characteristics and Functions; Processor Structure and Function; Reduced Instruction Set Computers; In
Parallelism and Superscalar Processors; Parallel Processing; Multicore Computers.

- Students must attend at least 80% of contact sessions in order to be accepted to the final examination.
'- Student is responsible to do all exercises and practical given by instructor in class or at home and subm
quizzes during class.
- Constantly follow announcements on intranet/CMS at http://cms.fpt.edu.vn for up-to-date course inform

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Main textbook/ resources:
1) William Stallings, 2012, Computer Organization and Architecture: Design for Performance, 9th (or 10th
Prentice Hall.
2) For instructors:
- PowerPoint Lecture Slides
- Instructor Solutions Manual
- Instructor Project Manual
- Test banks
- Website
http://williamstallings.com/ComputerOrganization/COA9e-Instructor/
4) For student
http://williamstallings.com/ComputerOrganization/COA9e-student/

Reference:
1) John L. Hennessy, David A Patterson, 2011, Computer architecture : A quantitative approach ,5th ed
Kaufmann

Technical facilities:

1) On-going asessment:
- 4 Exercises: 30%
- 02 Assignment: (2 Assembly programs) 30%
2) Final exam: 40%
3) Final result: 100%
Completion Criteria:
1) Every on-going assessment component >0
2) Final Exam Score >=4 & Final Result >=5

10
See Appendix 1
See Appendix 2

LT:TH

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20
30

30
(LT)
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50:50:00

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30

20
35

100
55:45

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 Back to Syllabus

Student's materials
Category
Slot Content before class
Introduction to the course
Chapter 1: Introduction Lecture &
1.1 Organization and Architecture Tutorial - Slide
1 1.2 Structure and Function - Text Book,
Assessing exercises of chapter 1
Chapter 2: Computer Evolution and Performance
2.1 A Brief History of Computers Lecture &
2.2 Designing for Performance Tutorial - Slide
2 - Text Book,
Chapter 2 contd. Lecture &
2.3 Multicore, MICs, and GPGPUs Tutorial - Slide
3 2.6 Performance Assessment - Text Book,
Assessing exercises of chapter 2
Chapter 3 A Top-Level View of Computer Function
and Interconnection Lecture &
3.1 Computer Components Tutorial - Slide
4 3.2 Computer Function - Text Book,
Chapter 3 contd. Lecture &
3.3 Interconnection Structures Tutorial - Slide
5 3.4 Bus Interconnection - Text Book,
Assessing exercises of chapter 3
Chapter 4 Cache Memory Lecture &
4.1 Computer Memory System Overview Tutorial - Slide
6 4.2 Cache Memory Principles - Text Book,
Lecture &
Chapter 4 contd. Tutorial - Slide
7 4.3 Elements of Cache Design - Text Book,
Assessing exercises of chapter 4
Chapter 5 Internal Memory Lecture &
5.1 Semiconductor Main Memory Tutorial - Slide
8 5.2 Error Correction - Text Book,
Lecture &
Chapter 5 contd. Tutorial - Slide
9 5.3 Advanced Dram Organization - Text Book,
Assessing exercises of chapter 5
Chapter 6 External Memory Lecture &
6.1 Magnetic Disk Tutorial - Slide
10 6.2 Raid - Text Book,
Chapter 6 External Memory contd. Lecture &
6.2 Raid contd Tutorial - Slide
11 6.3 Solid State Drives - Text Book,
Assessing exercises of chapter 6
Chapter 7 Input/Output
7.1 External Devices Lecture &
7.2 I/O Modules Tutorial - Slide
12 7.3 Programmed I/O - Text Book,
 Chapter 7 Input/Output contd.
7.4 Interrupt-Driven I/O Lecture &
7.5 Direct Memory Access Tutorial - Slide
13 7.6 I/O Channels and Processors - Text Book,
Assessing exercises of chapter 7 Lecture &
Chapter 8 Operating System Support Tutorial - Slide
14 8.1 Operating System Overview - Text Book,
Chapter 8 Operating System Support contd. Lecture &
8.2 Scheduling Tutorial - Slide
15 8.3 Memory Management - Text Book,
Assessing exercises of chapter 8
Chapter 11 Digital Logic
11.1- Boolean Algebra Lecture &
11.2-Gates Tutorial - Slide
16 11.3- Combinational Circuit - Text Book,
Assessing exercises of chapter 9
Chapter 12 Instruction Sets: Characteristics and
Functions Lecture &
12.1 Machine Instruction Characteristics Tutorial - Slide
17 12.2 Types of Operands - Text Book,
Chapter 12 Instruction Sets: Characteristics and Lecture &
Functions cont. Tutorial - Slide
18 12.4 Types of Operations - Text Book,

Assessing exercises of chapter 12

Chapter 13 Instruction Sets: Addressing Modes and
Formats
13.1 Addressing Modes Lecture &
13.3 Instruction Formats Tutorial - Slide
19 13.5 Assembly Language - Text Book,
Lecture &
Tutorial - Slide
20 Practical Assembly Laguage - Text Book,
Lecture &
Tutorial - Slide
21 Practical Assembly Laguage - Text Book,
Lecture &
Tutorial - Slide
22 Practical Assembly Laguage - Text Book,
Lecture &
Practical Assembly Laguage Tutorial - Slide
23 Assignment introduction (2 programs) - Text Book,
Assessing exercises of chapter 13
Chapter 14 Processor Structure and Function Lecture &
14.1 Processor Organization Tutorial - Slide
24 14.2 Register Organization - Text Book,
Chapter 14 Processor Structure and Function contd. Lecture &
14.3 Instruction Cycle Tutorial - Slide
25 14.4 Instruction Pipelining - Text Book,
 Assessing exercises of chapter 14
Chapter 15 Reduced Instruction Set Computers
15.1 Instruction Execution Characteristics
15.2 The Use of a Large Register File Lecture &
15.3 Compiler-Based Register Optimization Tutorial - Slide
26 15.4 Reduced Instruction Set Architecture - Text Book,
Assessing exercises of chapter 15
Chapter 16 Instruction-Level Parallelism and
Superscalar Processors Lecture &
16.1 Overview Tutorial - Slide
27 16.2 Design Issues - Text Book,

Assessing exercises of chapter 16

Chapter 17 Parallel Processing
17.1 Multiple Processor Organizations
17.2 Symmetric Multiprocessors Lecture &
17.3 Cache Coherence and the MESI Protocol Tutorial - Slide
28 17.4 Multithreading and Chip Multiprocessors - Text Book,
Assessing exercises of chapter 16
Chapter 18 Multicore Computers
18.1 Hardware Performance Issues Lecture &
18.2 Software Performance Issues Tutorial - Slide
29 18.3 Multicore Organization - Text Book,
Assessing assigments Tutorial
30 Review
 Student's task after
Teacher's Materials
class

- Slide
- Text Book, Do exercises

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 Back to Syllabus ASSESSMENT STRUCTURES
Scope of
Evaluation Type of Number of
# Duration knowledge and How?
Category questions questions
skill of questions
Option 1: Depends
Option 1: N/A Option 1: Writing
on chapters
Option2: (For Option 2 (For
Option 2 (For studied chapters;
Constructivism Constructivism Students write answers to their
1 Exercises Constructivism knowledge and
Approach only): Approach only): notebook
Approach only): skills
Follow lecturer's Follow lecturer's
Follow lecturer's
proposal proposal
proposal

Option 1:
Option 1: At home
Developing Option 1: 2
Option2: (For
Assemly program Option 2 (For
Constructivism
Option 2 (For Constructivism Teachers assess their works on
2 Assignment Approach only): Basic programs
Constructivism Approach only): their computers
Follow lecturer's
Approach only): Follow lecturer's
proposal
Follow lecturer's proposal
proposal

All chapters;
knowledge and
Computer
3 Final exam 60' 50 skills of digital by Exam board
gradable
system;

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 Note

30% of total progress mark

30% of total progress mark

40% of total progress mark

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Research Project Topics:
Here are some ideas for research project topics:
• web PC, web TV
• Image Retrieval Systems
• SPEC benchmark
• cache coherence protocols
• network media technologies
• RAM bus
• flat panel displays
• active matrix LCD displays
• register allocation
• N-version programming/recovery blocks
• MPEG-2
• graph theory
• encryption hardware
• design for test
• adaptive control
• imaging systems
• image recognition
• quantum well transistors
• computing in space
• Linux
• SunOS
• Spring
• Windows NT/ Windows ‘95
• OSF/1
• Mach kernel
• taligent
• alpha
• ultraSPARC
• MIPS R10000
• Intel's IA-64 architecture
• PowerPC family
• AMD K5, other P5 clones

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