CD4070BC Quad 2-Input EXCLUSIVE-OR Gate

October 1987
Revised January 1999

CD4070BC
Quad 2-Input EXCLUSIVE-OR Gate
General Description protected from damage due to static discharge by diode
clamps to VDD and VSS.
The CD4070BC employs complementary MOS (CMOS)
transistors to achieve wide power supply operating range,
low power consumption, and high noise margin, the Features
CD4070BC provide basic functions used in the implemen- ■ Wide supply voltage range: 3.0V to 15V
tation of digital integrated circuit systems. The N- and P- ■ High noise immunity: 0.45 VDD typ.
channel enhancement mode transistors provide a symmet-
rical circuit with output swing essentially equal to the supply ■ Low power TTL compatibility:
voltage. No DC power other than that caused by leakage Fan out of 2 driving 74L or 1 driving 74LS
current is consumed during static condition. All inputs are ■ Pin compatible to CD4030A
Equivalent to MM74C86 and MC14070B

Ordering Code:
Order Number Package Number Package Description
CD4070BCM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
CD4070BCN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram Truth Table

Pin Assignments for SOIC and DIP Inputs Outputs
A B Y
L L L
L H H
H L H
H H L

Top View

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CD4070BC
Absolute Maximum Ratings(Note 1) Recommended Operating
(Note 2) Conditions (Note 2)
DC Supply Voltage (VDD) −0.5 to +18 VDC DC Supply Voltage (VDD) 3V to 15 VDC
Input Voltage (VIN) −0.5 to VDD +0.5 VDC Input Voltage (VIN) 0 to VDD VDC
Storage Temperature Range (TS) −65°C to +150°C Operating Temperature Range (TA) −40°C to +85°C
Power Dissipation (PD) Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. They are not meant to imply
Dual-In-Line 700 mW that the devices should be operated at these limits. The table of “Recom-
Small Outline 500 mW mended Operating Conditions” and “Electrical Characteristics” provides
conditions for actual device operation.
Lead Temperature (TL)
Note 2: VSS = 0V unless otherwise specified.
(Soldering, 10 seconds) 260°C

DC Electrical Characteristics (Note 3)

−40°C +25°C +85°C
Symbol Parameter Conditions Units
Min Max Min Typ Max Min Max
IDD Quiescent Device VDD = 5V, 1.0 1.0 7.5 µA
Current VIN = VDD or VSS
VDD = 10V, 2.0 2.0 15 µA
VIN = VDD or VSS
VDD = 15V, 4.0 4.0 30 µA
VIN = VDD or VSS
VOL LOW Level |IO| < 1 µA
Output Voltage VDD = 5V 0.05 0 0.05 0.05 V
VDD = 10V 0.05 0 0.05 0.05 V
VDD = 15V 0.05 0 0.05 0.05 V
VOH HIGH Level |IO| < 1 µA
Output Voltage VDD = 5V 4.95 4.95 5 4.95 V
VDD = 10V 9.95 9.95 10 9.95 V
VDD = 15V 14.95 14.95 15 14.95 V
VIL LOW Level |IO| < 1 µA
Input Voltage VDD = 5V, VO = 4.5V or 0.5V 1.5 1.5 1.5 V
VDD = 10V, VO = 9V or 1.0V 3.0 3.0 3.0 V
VDD = 15V, VO = 13.5V or 1.5V 4.0 4.0 4.0 V
VIH HIGH Level |IO| < 1 µA
Input Voltage VDD = 5V, VO = 0.5V or 4.5V 3.5 3.5 3.5 V
VDD = 10V, VO = 1V or 9.0V 7.0 7.0 7.0 V
VDD = 15V, VO = 1.5V or 13.5V 11.0 11.0 11.0 V
IOL LOW Level Output VDD = 5V, VO = 0.4V 0.52 0.44 0.88 0.36 mA
Current VDD = 10V, VO = 0.5V 1.3 1.1 2.25 0.9 mA
VDD = 15V, VO = 1.5V 3.6 3.0 8.8 2.4 mA
IOH HIGH Level Output VDD = 5V, VO = 4.6V −0.52 −0.44 −0.88 −0.36 mA
Current VDD = 10V, VO = 9.5V −1.3 −1.1 −2.25 −0.9 mA
VDD = 15V, VO = 13.5V −3.6 −3.0 −8.8 −2.4 mA
IIN Input Current VDD = 15V, VIN = 0V −0.3 −10−5 −0.3 −1.0 µA
VDD = 15V, VIN = 15V 0.3 10−5 0.3 1.0 µA
Note 3: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the
devices should be operated at these limits. The table of “Recommended Operating Conditions” and “Electrical Characteristics” provides conditions for actual
device operation.

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 CD4070BC
AC Electrical Characteristics (Note 4)
TA = 25°C, CL = 50 pF, RL = 200k, tr and tf ≤ 20 ns, unless otherwise specified
Symbol Parameter Conditions Min Typ Max Units

tPHLor Propagation Delay Time VDD = 5V 110 185 ns

tPLH from Input to Output VDD = 10V 50 90 ns
VDD = 15V 40 75 ns
tTHL or Transition Time VDD = 5V 100 200 ns
tTLH VDD = 10V 50 100 ns
VDD = 15V 40 80 ns
CIN Average Input Capacitance Any Input 5 7.5 pF
CPD Power Dissipation Capacitance Any Input (Note 5) 20 pF
Note 4: AC Parameters are guaranteed by DC correlated testing.
Note 5: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see 74C Family Characteristics Application
Note—AN-90.

Typical PerformanceCharacteristics

Propagation Delay Time

vs Load Capacitance

AC Test Circuit and Switching Time Waveforms

Note: Delays measured with input t r, tf = 20 ns.

tr = tf = 20 ns

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CD4070BC
Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
Package Number M14A

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 CD4070BC Quad 2-Input EXCLUSIVE-OR Gate
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Package (PDIP), JEDEC MS-001, 0.300” Wide

Package Number N14A

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