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LPM Unit 4

Logical addresses are abstract while physical addresses are actual locations. Memory management translates logical to physical addresses. Code and data can be separated into two parts with separate base-limit registers, allowing code sharing among users while keeping data private. Placement algorithms like first-fit, best-fit, and worst-fit are used to allocate memory to processes of different sizes from partitions of available memory. Page tables map virtual to physical addresses using page numbers and offsets.

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165 views2 pages

LPM Unit 4

Logical addresses are abstract while physical addresses are actual locations. Memory management translates logical to physical addresses. Code and data can be separated into two parts with separate base-limit registers, allowing code sharing among users while keeping data private. Placement algorithms like first-fit, best-fit, and worst-fit are used to allocate memory to processes of different sizes from partitions of available memory. Page tables map virtual to physical addresses using page numbers and offsets.

Uploaded by

Joselshane B. Olar
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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MODULE 4: MEMORY MANAGEMENT

Name:_____________________ _____________________________Score:_________________
Course/ Section___________Schedule:___ ___Date Submitted:___ ___

1. Name two differences between logical and physical addresses.


First, a logical address is not really an address but is an abstract one, while the physical address is an
actual physical address. Second, a physical address is the product generated when the memory
management unit translates the logical address.

2. Discuss the advantages and disadvantages of this scheme. Consider a system in which a program can be
separated into two parts: code and data. The CPU knows whether it wants an instruction (instruction fetch) or
data (data fetch or store). Therefore, two base –limit register pairs are provided: one for instructions and one for
data. The instruction base –limit register pair is automatically read-only, so programs can be shared among
different users.
The advantage of the given scheme is that the code and data sharing will be more effective because a
code can be shared simultaneously by the memory and another process that needs it. On the other
hand, in this scheme, the data and code together in the compiler-generated code will be separated.

3. Given six memory partitions of 300 KB, 600 KB, 350 KB, 350 KB, 750 KB, and 125 KB (in order), how would the
first fit, best fit and worst fit algorithms place processes of size 115KB, 500KB, 200KB and 375KB(in order)?
 First fit P1 300 KB
P2 600 KB
P1 = 115
P3 350 KB
P2 = 500
P3 = 200 350 KB
P4 = 375 P4 750 KB
125 KB

 Best fit P3 300 KB


P2 600 KB
P1 = 115 350 KB
P2 = 500 350 KB
P3 = 200
P4 = 375 P4 750 KB
P1 125 KB

 Worst fit 300 KB


P2 600 KB
P1 = 115 P3 350 KB
P2 = 500 350 KB
P3 = 200
P1 750 KB
P4 = 375
125 KB

4. Assuming a 1-KB page size, what are the page numbers and offsets for the following address references
(provided as decimal numbers): a. 3085 b. 42095 c. 215201 d. 650000 e. 2000001?
Page size: 210 = 1024 No. of bits in offset: 10

Given logical Given logical address Page no. Offset (10 Page no. Offset in
address in binary in binary bits) decimal decimal
308510 1100000011012 00112 00000011012 3 13
4209510 10100100011011112 001010012 00011011112 41 111
21520110 1101001000101000012 110100102 00101000012 210 161
65000010 100111101011000100002 10011110102 11000100002 634 784
200000110 1111010000100100000012 111101000012 00100000012 1953 129
5. The BTV operating system has a 21-bit virtual address, yet on certain embedded devices, it has only a 16-bit
physical address. It also has a 2-KB page size. How many entries are there in each of the following?
a. A conventional, single-level page table
221 /211 = 210 or 1024
b. An inverted page table
216 / 211 = 25 or 32 entries
What is the maximum amount of physical memory in the BTV operating system?

The BTV has 16-bit of physical address so the maximum amount of physical address is 2 16 = 65,536 or 64 KB.

6. Consider a logical address space of 256 pages with a 4-KB page size, mapped onto a physical memory of 64
frames.
a. How many bits are required in the logical address?
Logical address space is equal to number of pages multiplied by the page size so:
Logical address = (256)(4096) = 1,048,576 or 2 20
Needed bits: 20

b. How many bits are required in the physical address?


Physical address is equal to number of frames multiplied by frame size.
Physical address = (64)(4096) = 262144 or 218
Needed bits: 18

7. Consider a computer system with a 32-bit logical address and 4-KB page size. The system supports up to 512 MB
of physical memory. How many entries are there in each of the following?
a. A conventional, single-level page table
Virtual Memory size: 232
Single page size: 4 KB = 212
Needed for offset: 12
Bits for page number: 32-12 = 20
Entries: 2^20 or 1,048,576

b. An inverted page table


Frames: 229 /219 = 217
Entries: 217 = 131,072/1024 = 128 entries

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