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Mux 4 N

This document describes a 4-to-1 multiplexer entity with 4 inputs labeled e1 through e4, 2 select signals s0 and s1, and 1 output sortie. The multiplexer uses the values of s0 and s1 as a 2-bit code to select which input drives the output.

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Audrey SAMBALA ANNE-LAURE
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23 views1 page

Mux 4 N

This document describes a 4-to-1 multiplexer entity with 4 inputs labeled e1 through e4, 2 select signals s0 and s1, and 1 output sortie. The multiplexer uses the values of s0 and s1 as a 2-bit code to select which input drives the output.

Uploaded by

Audrey SAMBALA ANNE-LAURE
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as TXT, PDF, TXT or read online on Scribd
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library ieee;

use ieee.std_logic_1164.all;

entity mux4n is

port (
e1 : in std_logic;
e2 : in std_logic;
e3 : in std_logic;
e4 : in std_logic;
s0,s1: in std_logic;
sortie: out std_logic) ;

end mux4n ;

architecture todo of mux4n is

signal selecteur : std_logic_vector(1 downto 0 );

begin

selecteur <= s0&s1;

with selecteur select

sortie <= e1 when "00" ,


e2 when "10" ,
e3 when "01" ,
e4 when others ;

end todo;

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