Experiment #5-Part#1 JFET Characteristics: Object
Experiment #5-Part#1 JFET Characteristics: Object
Name: Electronic I
Experiment no.: 5
College of Engineering
Lab. Supervisor: Munther N. Thiyab
Dept. of Electrical Engineering
Object
The purpose of this experiment is to determine and sketch the characteristics
of the JFET and to find its parameters.
Required Parts and Equipment's
1. Electronic Test Board. (M100)
2. Dual Polarity Variable DC Power Supply
3. Digital Multimeters.
4. N-Channel JFET 2N3823/3824
5. Resistors 207KΩ, 220 Ω.
Theory
The Junction Field Effect Transistor (JFET) is a three-terminal device with one
terminal (called the gate) capable of controlling the current between the other two
terminals (drain and source). The primary difference between FET and BJT
transistors is the fact that the BJT transistor is a current-controlled device, while
the JFET transistor is a voltage-controlled device. The FET transistor is a unipolar
device depending on either electron conduction (N-channel JFET) or hole
conduction (P-channel JFET). In contrast, the BJT transistor is a bipolar device,
meaning that the conduction depends on two charge carriers (electrons and holes)
in the same time.
Another difference between two devices is the high input impedance of the JFET
when compared with the BJT. The input impedance is usually larger than 1 MΩ.
However, typical AC voltage gains for BJT amplifiers are greater than those for
FET amplifiers. Furthermore, FETs are more temperature stable than BJTs and are
usually smaller in size, making them particularly useful in integrated circuit chips.
1
University of Anbar Lab. Name: Electronic I
Experiment no.: 5
College of Engineering
Lab. Supervisor: Munther N. Thiyab
Dept. of Electrical Engineering
The basic construction of an N-channel JFET is shown in Fig.1 together with its
symbol.
..................................(1)
Where VP is called the pinch-off voltage and IDSS is known as the drain saturation
current. When VGS = VP then ID = 0, and the FET is in the cut-off region. Equation
(1) indicates that the FET is a square-law device.
The relation between ID and VGS is also referred as the transfer characteristic of the
JFET and is presented in Fig.2. This curve is obtained by varying the negative
voltage VGS between VP and 0 and measuring ID for a given value of the drain to
source voltage (VDS). Equation (1) can approximate this curve to an acceptable
level.
2
University of Anbar Lab. Name: Electronic I
Experiment no.: 5
College of Engineering
Lab. Supervisor: Munther N. Thiyab
Dept. of Electrical Engineering
On the other hand, to sketch the drain characteristic, the gate-source voltage VGS
must be kept at a certain level while varying VDS in several steps and recording ID
in each step. Figure 4 shows the drain (or output) characteristics of the JFET.
As shown from Fig.4, for small values of VDS (VDS < |VP|) the drain current increases
linearly with VDS. This region is called the linear or Ohmic region in which the
JFET behaves as a voltage-controlled resistor. For larger values of VDS (VDS > |VP|),
the drain current (ID) is approximately constant and enters the saturation region.
The transconductance of the JFET (gm) is defined as the change in drain current
(ΔID) for a given change in gate-to-source voltage (ΔVGS) with the drain-to-source
voltage (VDS) kept constant. It has the unit of Siemens (S).
..................................(2)
4
University of Anbar Lab. Name: Electronic I
Experiment no.: 5
College of Engineering
Lab. Supervisor: Munther N. Thiyab
Dept. of Electrical Engineering
Because the transfer characteristic curve for a JFET is nonlinear, gm varies in value
depending on the location on the curve as depicted in Fig.5. A datasheet normally
gives the value of gm measured at VGS = 0, which is referred as gmo.
Theoretically, gm can be calculated at any point on the transfer characteristic curve
from the following equation:
...................................(3)
........................................(4)