RTD2668 LCD TV/Monitor Controller
RTD2668 LCD TV/Monitor Controller
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RTD2668
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LCD TV/Monitor Controller
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Revision 1.00
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August 5, 2009
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Author: Realtek
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Content
1. GENERAL DESCRIPTION........................................................................................................................ 3
2. FEATURE ..................................................................................................................................................... 4
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3. SYSTEM APPLICATION ........................................................................................................................... 6
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3.1. LQFP128 ................................................................................................................................................ 6
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4. PIN ................................................................................................................................................................. 8
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4.1. LQFP128 PIN OUTLINE ........................................................................................................................... 8
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1. General Description
RTD2668 LCDTV controller is a highly integrated SoC for TV application. With embedded IF
demodulator, video decoder and audio decoder, the BOM cost and PCB complication are greatly reduced.
In video input, it supports various graphic and video sources input such as CVBS, S-video, VGA, HDMI,
DVI, YPbPr, SCART, ITU-R BT.656 etc. In audio input/output, analog stereo audio input/output, SPDIF
input/output and headphone output are supported. In the panel interface, LVDS, RSDS and TTL interfaces are
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designed for different applications.
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With Realtek advanced image processing functions, excellent image quality and/or customer’s specific
image quality can be achieved. Ultra-Zoom™II is designed for linear and non-linear scaling. The
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PixelComposerTMII performs high quality cross color suppression, de-interlace and noise reduction. Through
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the Vivid-Color™II engine, user’s can easily adjust color to suit their preferences. Various display formats such
as PIP, POP, Multi-Picture are also supported.
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2. Feature
Analog TV IF demodulator 9 1 x HDMI RX port with D-switch is supported
9 Support NTSC / PAL / SECAM IF demodulator 9 HDMI RX input which is shared as DVI input
9 108MHz 12bit ADCx1 input 9 Single link on-chip TMDS receiver
9 Digital VIF 12 bits output 9 Long cable support to 3.4GHz Direct connect to HDMI
compliant TMDS transmitters
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9 Digital SIF 12 bits output
9 High-Bandwidth Digital Content Protection (HDCP) 1.1
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compliant
Analog TV Video decoder 9 Enhanced protection of HDCP secret key
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9 Support NTSC/PAL/SECAM decode : 9 Support long-cable
z NTSC-M, NTSC-443. 9 Support Hot-Plug function
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z PAL-BDGHI, PAL-M, PAL-N, PAL-60, PAL-CN 9 Support CEC
z SECAM. 9 EIA/CEA-861B
9 2 x 10bit 27MHz analog ADC
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9 Support up to 2x CVBS input
9 Support up to 1x S-video input Digital Video Output Interface
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9 2D comb filter for NTSC / PAL 9 Built-in fully programmable display timing generator
9 2D/1D comb filter for NTSC/PAL and SECAM 9 Integrated dual 8-bit LVDS transmitter
9 Support Macrovision 9 Support single 6-bit RSDS interface with programmable
TCON
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9 Support color and video process function
z Luminance Brightness/Contrast. 9 Support single 6-bit TTL output interface
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z Luminance Peaking and Coring. 9 Support up to 170MHz (up to WUXGA
z Simple NEC White Balance Function 1920x1080p@60Hz)
9 Integrated high-quality Spread-Spectrum Display PLL
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TV audio-in standard Audio IO
9 Supports multi-standard TV broadcasting includes : 9 Two channel (Stereo) DAC support 32KHz, 44.1KHz,
48KHz, 96KHz, 192KHz sample rate
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9 If the audio format is FM-A2, just supports one of the sampling rate audio format
FM-A2 channel. And plays as mono sound. 9 Support 16-bit, 20-bit, 24-bit PCM data
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user-defined mode
9 Smart engine for Phase and Image position calibration
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Vivid-ColorTM Peripheral IO
9 Up to 10 bit processing 9 Support two 16550 UARTs, each has 16-byte FIFO.
9 Input color space conversion 9 Support one IrDA Rx interface, which complies with NEC,
9 Support YUV/YCrCb/YPrPb to RGB color-space SHARP, Sony SIRC protocol I, and Philips RC-5.
conversion 9 Support 2 x I2C master interfaces to access tuner,
9 Digital hue and saturation adjustments
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demodulator, or LCD TV controller and any other I2C
9 Digital brightness and contrast adjustments slave compliant modules.
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9 Support DLTI/DCTI video-quality improvement 9 Support 1x I2C slave interface
9 ICM for 6 Independent Color Manager 9
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Support up to 16 PWM output.
9 Support Black/White Level Expansion 9 Support 3 Timers/Counters for CPU and 1 watchdog timer
9 Support Y peaking filter and coring 9 Embedded DDC support DDC1, DDC2B, DDC/CI
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9 Support DCC 9 Support GPIO with digital output
9 sRGB compliance 9 Support 4x low speed 8 bit ADC
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9 Support dual R/G/B 10-bit Gamma correction
9 3DitherTM serves as advanced dithering function VBI part
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9 CC : CC1, 2, 3 and4, Text 1, 2, 3 and 4, XDS (eXtension
Embedded OSD Data Service), V Chip
9 Embedded 16.5K SRAM dynamically stores OSD 9 WSS : ETSI EN 300 294, ITU-R BT.119 method,
command and fonts
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IEC-61880 method, CC-XDS method
9 Support multi-color RAM font, 1, 2 and 4-bit per pixel 9 CGMS : ETSI EN 300 294, ITU-R BT.119 method,
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9 64 color palette IEC-61880 method, CC-XDS method
9 Maximum 10 window with alpha-blending/
gradient / gradient target color / gradient reversed
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Teletext
color/ dynamic fade-in/fade-out, bordering/shadow/3D 9 Support Teletext 1.5 and capable of 10 page navigation.
window typeOSD-made internal pattern generator for
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9 Support TOP/FLOF/FASTEXT navigation
factory mode 9 Support Subtitle and News Flash
9 Rotary 90,180,270 degree
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9 Support external serial FLASH with 256Kbyte and 9 3.3V/1.2V power supplier
512Kbyte
9 128-pin LQFP package
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3. System Application
3.1. LQFP128
Headphone
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mux
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VGA
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RGB
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SCART (AV+RGB)
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RTD2668
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I2C SPI-Flash
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CVBS
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Tuner
Tuner
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CVBS
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Headphone
mux
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PVR
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只播不錄
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L+R RTD2668
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LVDS 8bit Panel
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I2C SPI-Flash
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Tuner
Tuner
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4. Pin Assignment
4.1. LQFP128 Pin Layout
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
US1
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V3.3APLL
GPIOA6
GPIOA5
V12CORE
DDC1_SCL
DDC0_SCL
SPI_CS#
SPI_DO
V3.3TMDS
RX2P
RX1P
RX0P
RXCP
V1.2TMDS
SPI_SCK
DDC1_SDA
DDC0_SDA
EPAD
VSYNCVIN
HSYNCVIN
RX2N
RX1N
RX0N
RXCN
CEC
REXT
SPI_DI
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1 102
2 G3.3APLL SPDIFO 101
3 V1.2Y PPADC SPDIFI 100
4 BIN1N I2C_S_SDA 99
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5 BIN1P I2C_S_SCL 98
6 GIN1N I2C_M0_SDA 97
7 GIN1P I2C_M0_SCL 96
RIN1N IRRX
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8 95
9 RIN1P RF_AGC 94
10 V3.3Y PPADC RESET 93
11 AIN_5R TCON13 92
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12 AIN_5L LSADC3 91
13 BIN0N LSADC2 90
14 BIN0P LSADC1 89
15 GIN0N LSADC0 88
16 GIN0P LSADC_REF 87
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17 RIN0N V3.3IO 86
18 RIN0P V12CORE 85
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19 V3.3BB1 TEAN 84
20 G3.3BB1 TEAP 83
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V3.3BB0
VCM_BB
AOUT_MONO
RTD2668/LQFP128
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TEBP
TECN
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23 80
24 AIN_MONO TECP 79
25 AOUT_R TECLKN 78
AOUT_L TECLKP
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26 77
27 AIO_1R TEDN 76
28 AIO_1L TEDP 75
29 AIO_2R V3.3LVDS 74
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30 AIO_2L TOAN 73
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31 AIN_3R TOAP 72
32 AIN_3L TOBN 71
33 HPOUT_R TOBP 70
34 HPOUT_L TOCN 69
35 G3.3BB0 TOCP 68
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36 AIN_1L TOCLKN 67
37 AIN_1R TOCLKP 66
38 G3.3VDADC TODN 65
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V3.3VDADC
G3.3IFADC
V3.3IFADC
VIN00P TODP
V1.2CORE
G3.3VDAC
V3.3VDAC
RGBSW0
RGBSW1
AVOUT1
AVOUT2
G3.3PLL
V3.3PLL
AIN_2R
VIN10P
VIN01P
VIN11P
VIN02P
VIN12P
VIN03P
AIN_2L
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VIN0N
VIN1N
XOUT
IF1N
IF1P
XIN
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42
43
44
45
46
47
48
49
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53
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56
57
58
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62
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8 RIN1P AI R channel 1 +
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9 V3.3YPPADC AP 3.3V YPbPr ADC Power
10 AIN_5R AO Audio R ADC input 5
11 AIN_5L AO Audio L ADC input 5
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12 BIN0N AI B channel 0 -
13 BIN0P AI B channel 0 +
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14 GIN0N AI G channel 0 -
15 GIN0P AI G channel 0 +
16 RIN0N AI R channel 0 -
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17 RIN0P AI R channel 0 +
18 V3.3BB1 IO 3.3V BaseBand Audio Power1
19 G3.3BB1 AP BaseBand Audio ADC/DAC Ground1
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20 V3.3BB0 IO 3.3V BaseBand Audio Power0
21 VCM_BB AO BaseBand Audio ADC Common mode voltage 1uF to G3.3BB
22 AOUT_MONO AO Audio mono output
23 AIN_MONO AO Audio mono input
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24 AOUT_R P Audio R DAC output
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25 AOUT_L P Audio L DAC output
26 AIO_1R AIO Audio R ADC input 1/DAC output1
27 AIO_1L AIO Audio L ADC input 1/DAC output1
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28 AIO_2R AIO Audio R ADC input 2/DAC output2
29 AIO_2L AIO Audio L ADC input 2/DAC output2
30 AIN_3R AO Audio R ADC input 3
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31 AIN_3L AO Audio L ADC input 3
32 HPOUT_R IO HeadPhone output R
33 HPOUT_L IO HeadPhone output L
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57 IF1P AI IF input +
58 IF1N AI IF input -
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62 XOUT AO XTALO
63 V3.3PLL AP 3.3V PLL Power
64 V1.2CORE P 1.2V Core Power
65 TODP AIO LVDS Odd port D+
66 TODN AIO LVDS Odd port D-
67 TOCLKP AIO LVDS Odd port CLK+
68 TOCLKN AIO LVDS Odd port CLK-
69 TOCP AIO LVDS Odd port C+
70 TOCN AIO LVDS Odd port C-
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81 TECN AO LVDS Even port C-
82 TEBP AO LVDS Even port B+
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83 TEBN AO LVDS Even port B-
84 TEAP AO LVDS Even port A+
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85 TEAN AO LVDS Even port A-
86 V1.2CORE P 1.2V Core Power
87 V3.3IO P 3.3V IO Power
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88 LSADC_REF AP LSADC Reference Voltage 10K to G3.3LSADC
89 LSADC0 AI LSADC input 0
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90 LSADC1 AI LSADC input 1
91 LSADC2 AI LSADC input 2
92 LSADC3 AI LSADC input 3
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93 TCON13 IO TCON13 output
94 RESET# AI Reset# input
95 RF_AGC O RF AGC contol pin
96 IRRX IO IrDA Receiver data
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97 I2C_M0_SCL IO I2C Master 0 Serial Clock
98 I2C_M0_SDA IO I2C Master 0 Serial Data
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99 I2C_S_SCL IO I2C Slave Serial Clock
100 I2C_S_SDA IO I2C Slave Serial Data
101 SPDIFI IO SPDIF Input
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102 SPDIFO IO SPDIF Output
103 SPI_DO O SPI FLASH Serial Data Output
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104 SPI_DI I SPI FLASH Serial Data Input
105 SPI_SCK O SPI FLASH Serial Clock Output
106 SPI_CS# O SPI FLASH Chip Select
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2. AI : Analog Input
3. AO : Analog Output
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7. O: Digital Output
8. IO : Digital Input/Output
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29 AIO_2L AGPO
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38 VIN00P AGPO
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39 VIN10P AGPO
40 VIN01P AGPO
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41 VIN11P AGPO
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42 VIN0N AGPO
43 AGPO
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VIN02P
44 VIN12P AGPO
45 AGPO
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VIN1N
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46 VIN03P AGPO
48 RGBSW0 AGPO ra
49 AIN_2L AGPO
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50 RGBSW1 AGPO
51 AIN_2R AGPO
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54 AVOUT2 AGPO
65 TODP B_R0P TTL_BLU9 TOAP
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92 LSADC3 AGPO
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93 TCON13 GPIOA[7]/PWM IRQ_OUT IRRX V8_DATA7 XTAL_OUT IF_AGC
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95 RF_AGC GPIOC[3]/PWM TCON10
96 IRRX GPIOC[2]/PWM TCON11 XTAL_OUT V8_CLK
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97 I2C_M0_SCL GPIOC[1]/PWM TCON12 UART0_TX I2C_S_SCL
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98 I2C_M0_SDA GPIOC[0]/PWM TCON13 UART0_RX I2C_S_SDA
99 I2C_S_SCL GPIOA[4]/PWM TCON0 XTAL_OUT V8_DATA4 I2S_O_DATA2 I2C_M1_SCL I2S_I_DATA2
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100 I2C_S_SDA GPIOA[3]/PWM TCON1 SPDIFO V8_DATA3 I2S_O_DATA1 I2C_M1_SDA I2S_I_DATA1
101 SPDIFI GPIOA[2]/PWM TCON2 TTL_DEN V8_DATA2 I2S_O_DATA0 I2S_I_DATA0
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102 SPDIFO GPIOA[1]/PWM TCON3 TTL_DVS V8_DATA1 I2S_O_MCLK I2S_I_MCLK
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103 SPI_DO GPIOB[7]/PWM ra
104 SPI_DI GPIOB[6]/PWM
105 GPIOB[5]/PWM
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SPI_SCK
106 SPI_CS# GPIOB[4]/PWM
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DDC1_SCL
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32 HPOUT_R Head phone Head Phone
33 HPOUT_L Head phone Head Phone
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35 AIN_1R Half SCART Audio in R Audio in of CVBS0 R
36 AIN_1L Half SCART Audio in L Audio in of CVBS0 L
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38 VIN00P SV_Y+ CVBS0+
39 VIN10P SV_C+ CVBS1+
40 VIN01P CVBS0+ SV_Y+
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41 VIN11P CVBS1+ SV_C+
42 VIN0N ADC0 negative ADC0 negative
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43 VIN02P Half SCART SV_Y+ Can be GPO
44 VIN12P Half SCART SV_C+ Can be GPO
45 VIN1N ADC1 negative ADC1 negative
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46 VIN03P Full SCART CVBS+ Can be GPO
48 RGBSW0 Full SCART Can be GPO
49 AIN_2L Audio in of SV/CVBS L Can be GPO
50 RGBSW1 Can be GPO Can be GPO
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51 AIN_2R Audio in of SV/CVBS R Can be GPO
53 AVOUT1 Full SCART AVOUT AVOUT
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54 AVOUT2 Half SCART AVOUT Can be GPO
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4.5. Package Identification
Green package is indicated by a ‘G’ in the location marked ‘T’.
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5. Electrical Characteristics
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Parameter
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IO Supply Voltage (V3.3IO) -0.5 4 V
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Core Supply Voltage (V1.2CORE) -0.5 V
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Analog Supply Voltage (V1.2YPbPrADC) -0.5 V
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V3.3TMDS
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V3.3LSADC
V3.3YPbPrADC
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V3.3VDADC
V3.3PLL
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V3.3LVDS
3.3AVDD_ADAC
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Power Dissipation W
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V3.3LSADC
V3.3YPPADC
V3.3VDADC
Realtek Confidential 14 The above information is the exclusive intellectual property of
RTD2668_Brochure.doc Realtek Semiconductor Corporation and shall not be disclosed,
Moidfy:Robinson-09/08/05 7:42 Print Robinson-09/08/05 distributed without permission from Realtek.
Realtek Confidential
LCDTV Controller RTD2668
V3.3IFADC
V3.3VDAC
V3.3PLL
V3.3LVDS
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V3.3BB
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Ambient Temperature 0 70 ℃
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Maximum Junction Temperature +125 ℃
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5.3. Crystal Condition
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Parameter Min Typ Max Units
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Stability -30 +30 ppm
Load Capacitance 20 pF
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6. Mechanical Dimensions
6.1. 128 LQFP(14X20X1.4mm)
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7. Ordering Information
Table 1. Ordering Information
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