Crystalfontz America, Inc.: Customer Model Cfah1602B-Ngg-Jpv By: Data: Approval

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Crystalfontz America, Inc.

CUSTOMER

MODEL CFAH1602B-NGG-JPV

APPROVAL BY: DATA:

SALES BY APPROVED BY CHECKED BY PREPARED BY

Crystalfontz America, Inc.


12412 East Saltese Avenue
Spokane Valley, WA 99216-0357

Phone: (888) 206-9720


Fax: (509) 892-1203
Email: [email protected]
URL: www.crystalfontz.com
Contents
1.Module Classification Information

2.Precautions in use of LCD Modules

3.General Specification

4.Absolute Maximum Ratings

5.Electrical Characteristics

6.Optical Characteristics

7.Interface Pin Function

8.Contour Drawing & Block Diagram

9.Function Description

10.Character Generator ROM Pattern

11.Instruction Table

12.Timing Characteristics

13.Initializing of LCM

14.Quality Assurance

15.Reliability
1.Module Classification Information

CFA H 1 6 0 2 B-N G G- JPV


c d e f ghi j
c Brand: CRYSTALFONTZ AMERICA, INCORPORATED
d Display Type: H→ Character Type, G→ Graphic Type
e Display’s logical dimensions: 16 columns by 02 lines
f Model serials no.
g Backlight Type: N→ Without backlight Y→ LED, Yellow Green
B→ EL, Blue green A→ LED, Amber
D→ EL, Green R→ LED, Red
W→ EL, White O→ LED, Orange
F→ CCFL, White G→ LED, Green
T→ LED, White
h LCD Mode: B→ TN Positive, Gray M→ STN Negative, Blue
N→ TN Negative, F→ FSTN Positive
G→ STN Positive, Gray T→ FSTN Negative
Y→ STN Positive, Yellow Green
i LCD Polarizer Type, A→ Reflective, N.T, 6:00 H→ Transflective, W.T,6:00
Temperature range,
Viewing direction: D→ Reflective, N.T, 12:00 K→ Transflective, W.T,12:00
G→ Reflective, W. T, 6:00 C→ Transmissive, N.T,6:00
J→ Reflective, W. T, 12:00 F→ Transmissive, N.T,12:00
B→ Transflective, N.T,6:00 I→ Transmissive, W. T, 6:00
E→ Transflective, N.T.12:00 L→ Transmissive, W.T,12:00
j Special Code: JP→ English and Japanese standard font
V→ Built-in Negative Voltage Generator
#→ RoHS Compliant (Lead Free)
2.Precautions in use of LCD Modules

(1)Avoid applying excessive shocks to the module or making any alterations or modifications to
it.
(2)Don’t make extra holes on the printed circuit board, modify its shape or change the
components of LCD module.
(3)Don’t disassemble the LCM.
(4)Don’t operate it above the absolute maximum rating.
(5)Don’t drop, bend or twist LCM.
(6)Soldering: only to the I/O terminals.
(7)Storage: please storage in anti-static electricity container and clean environment.

3.General Specification

Item Dimension Unit


Number of Characters 16 characters x 2 Lines -

Module dimension 80.0 x 36.0 x 9.7(MAX) mm


View area 66.0 x 17.0 mm
Active area 56.2 x 11.5 mm
Dot size 0.55 x 0.65 mm
Dot pitch 0.60 x 0.70 mm
Character size 2.95 x 5.55 mm
Character pitch 3.55 x 5.95 mm
LCD type STN, Positive, Reflective,Gray
Duty 1/16
View direction 6 o’clock
Backlight Type N/A
4.Absolute Maximum Ratings

Item Symbol Min Typ Max Unit


Operating Temperature TOP -20 - +70 ℃

Storage Temperature TST -30 - +80 ℃

Input Voltage VI VSS - VDD V

Supply Voltage For Logic VDD-VSS -0.3 - 7 V

Supply Voltage For LCD VDD-V0 -0.3 - 13 V

5.Electrical Characteristics

Item Symbol Condition Min Typ Max Unit

Supply Voltage For Logic VDD-VSS - 2.7 - 5.5 V

Ta=-20℃ - - 5.2
V
Ta=25℃ -
Supply Voltage For LCD VDD-V0 - 4.2 V

- - V
Ta=+70℃ 3.8

Input High Volt. VIH - 2.2 - VDD V

Input Low Volt. VIL - - - 0.6 V

Output High Volt. VOH - 2.4 - - V

Output Low Volt. VOL - - - 0.4 V

Supply Current IDD VDD=5V - 1.2 - mA


6.Optical Characteristics

Item Symbol Condition Min Typ Max Unit

(V)θ CR≧ 2 10 - 40 deg


View Angle
(H)φ CR≧ 2 -30 - 30 deg

Contrast Ratio CR - - 3 - -

T rise - - 200 300 ms


Response Time
T fall - - 200 300 ms

Definition of Operation Voltage (Vop) Definition of Response Time ( Tr , Tf )

Non-selected Non-selected
Conition Selected Conition Conition
Intensity Selected Wave
100% Non-selected Wave Intensity

10%
Cr Max
Cr = Lon / Loff 90%
100%

Vop
Driving Voltage(V) Tr Tf

[positive type] [positive type]

Conditions :

Operating Voltage : Vop Viewing Angle(θ ,φ ) : 0°, 0°

Frame Frequency : 64 HZ Driving Waveform : 1/N duty , 1/a bias

Definition of viewing angle(CR≧ 2)


θ b
θ f
φ = 180°
θ l
θ r

φ = 270° φ = 90°

φ = 0°
7.Interface Pin Function

Pin No. Symbol Level Description


1 VSS 0V Ground
2 VDD 5.0V Supply Voltage for logic
(3V) (3V option)
3 VO (Variable) Operating voltage for LCD
4 RS H/L H: DATA, L: Instruction code
5 R/W H/L H: Read(MPU→ Module) L: Write(MPU→ Module)

6 E H,H→ L Chip enable signal

7 DB0 H/L Data bit 0


8 DB1 H/L Data bit 1
9 DB2 H/L Data bit 2
10 DB3 H/L Data bit 3
11 DB4 H/L Data bit 4
12 DB5 H/L Data bit 5
13 DB6 H/L Data bit 6
14 DB7 H/L Data bit 7
15 Vee -5v Negative Voltage Output
16 NC NC

7a. Negative Voltage Generator Application Note

Connect a 20K ohm potentiometer from pin 15 (Vee which is -5v generated by the module)
to pin 2 (Vcc which is +5v supplied by you), with the wiper connected to pin 3 (Vo, the
contrast adjustment). This will take advantage of the negative voltage generator to enable
operation at wider temperatures.
8.Contour Drawing &Block Diagram
80.0 0.5
1 Vss
4.95 71.2
7.55 66.0(VA) 2 Vdd
12.45 56.2(AA) 3 Vo
8.0 P2.54*15=38.1 9.7 MAX 4 RS
15.76
12.55
11.76
9.8

2.5

2.5
5.2

3.0 1.8 16- 1.0 PTH 5.1 5 R/W


6 E
1 16
K 7 DB0

18.3
8 DB1
11.5(AA)
36.0 0.5

16(VA)

13.08
5.08

31.0
26.2

9 DB2
10 DB3
A
11 DB4
12 DB5
4- 1.0 40.55 4- 2.5 PTH 1.6
2.5 75.0 4- 5.0 PAD 13 DB6
14 DB7
EL or NO B/L
15 A/Vee
3.55
16 K
2.95 0.6
0.6
0.55
0.7
0.65
5.55
5.95

The non-specified tolerance of dimension is 0.3mm.


0.4

DOT SIZE

RS Com1~16
R/W Controller/Com Driver
MPU
E
DB0~DB7
HD44780
or 16X2 LCD
80 series Equivalent
or
68 series
Power Circuit

Seg1~40
Vdd Seg41~80
Bias and

VR Vo
D Seg Driver
10K~20K Vss

M
CL1
Generator

CL2
Vee
N.V.

Vdd,Vss,V1~V5
External contrast adjustment.
Optional

Character located 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
DDRAM address 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
DDRAM address 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F
9.Function Description

The LCD display Module is built in a LSI controller, the controller has two 8-bit registers, an
instruction register (IR) and a data register (DR).
The IR stores instruction codes, such as display clear and cursor shift, and address information
for display data RAM (DDRAM) and character generator (CGRAM). The IR can only be written
from the MPU. The DR temporarily stores data to be written or read from DDRAM or
CGRAM. When address information is written into the IR, then data is stored into the DR from
DDRAM or CGRAM. By the register selector (RS) signal, these two registers can be selected.

RS R/W Operation
0 0 IR write as an internal operation (display clear, etc.)
0 1 Read busy flag (DB7) and address counter (DB0 to DB7)
1 0 Write data to DDRAM or CGRAM (DR to DDRAM or CGRAM)
1 1 Read data from DDRAM or CGRAM (DDRAM or CGRAM to DR)

Busy Flag (BF)


When the busy flag is 1, the controller LSI is in the internal operation mode, and the next
instruction will not be accepted. When RS=0 and R/W=1, the busy flag is output to DB7. The
next instruction must be written after ensuring that the busy flag is 0.

Address Counter (AC)


The address counter (AC) assigns addresses to both DDRAM and CGRAM
Display Data RAM (DDRAM)
This DDRAM is used to store the display data represented in 8-bit character codes. Its extended

capacity is 80×8 bits or 80 characters. Below figure is the relationships between DDRAM

addresses and positions on the liquid crystal display.

High bits Low bits

Example: DDRAM addresses 4E


AC
AC6 AC5 AC4 AC3 AC2 AC1 AC0 1 0 0 1 1 1 0
(hexadecimal)

Display position DDRAM address

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F
2-Line by 16-Character Display

Character Generator ROM (CGROM)

The CGROM generate 5×8 dot or 5×10 dot character patterns from 8-bit character codes. See

Table 2.

Character Generator RAM (CGRAM)

In CGRAM, the user can rewrite character by program. For 5×8 dots, eight character patterns

can be written, and for 5×10 dots, four character patterns can be written.

Write into DDRAM the character code at the addresses shown as the left column of table 1. To
show the character patterns stored in CGRAM.
Relationship between CGRAM Addresses, Character Codes (DDRAM) and Character
patterns

Table 1.

F o r 5 * 8 d o t c h a ra c te r p a tte rn s
C h a ra c te r C o d e s C h a ra c te r P a tte rn s
C G R A M A d d re ss
( D D R A M d a ta ) ( C G R A M d a ta )

7 6 5 4 3 2 1 0 5 4 3 2 1 0 7 6 5 4 3 2 1 0
H ig h Low H ig h Low H ig h Low
0 0 0 * * * 0
0 0 1 * * * 0 0 0
0 1 0 * * * 0 0 0
0 1 1 * * * 0 C h a ra c te r
0 0 0 1 0 0 * * * 0 0 0 p a tte rn ( 1 )
0 0 0 0 * 0 0 0
1 0 1 * * * 0 0 0
1 1 0 * * * 0 0 0
1 1 1 * * * 0 0 0 0 0 C u rs o r p a tte rn
0 0 0 * * * 0 0 0
0 0 1 * * * 0 0 0
0 1 0 * * *
0 1 1 * * * 0 0 0 0 C h a ra c te r
0 0 0 0 * 0 0 1 0 0 1 1 0 0 * * * p a tte rn ( 2 )
1 0 1 * * * 0 0 0 0
1 1 0 * * * 0 0 0 0
1 1 1 * * * 0 0 0 0 0 C u rs o r p a tte rn
0 0 0 * * *
0 0 1

0 0 0 0 * 1 1 1 1 1 1 1 0 0
1 0 1
1 1 0
1 1 1 * * *
F o r 5 * 1 0 d o t c h a ra c te r p a tte rn s
C h a ra c te r C o d e s C h a ra c te r P a tte rn s
C G R A M A d d re ss
( D D R A M d a ta ) ( C G R A M d a ta )

7 6 5 4 3 2 1 0 5 4 3 2 1 0 7 6 5 4 3 2 1 0
H ig h Low H ig h Low H ig h Low
0 0 0 0 * * * 0 0 0 0 0
0 0 0 1 * * * 0 0 0 0 0
0 0 1 0 * * * 0 0
0 0 1 1 * * * 0 0
0 1 0 0 * * * 0 0 0
0 0 0 0 * 0 0 0 0 0 0 1 0 1 * * * 0 0 0
0 1 1 0 * * * 0 C h a ra c te r
0 1 1 1 * * * 0 0 0 0 p a tte rn
1 0 0 0 * * * 0 0 0 0
1 0 0 1 * * * 0 0 0 0
1 0 1 0 * * * 0 0 0 0 0 C u rs o r p a tte rn

1 1 1 1 * * * * * * * *

: " H ig h "
10.Character Generator ROM Pattern

Table.2

Upper
4 bit
Lower LLLL LLLH LLHL LLHH LHLL LHLH LHHL LHHH HLLL HLLH HLHL HLHH HHLL HHLH HHHL HHHH
4 bit
CG
RAM
LLLL (1)

LLLH (2)

LLHL (3)

LLHH (4)

LHLL (5)

LHLH (6)

LHHL (7)

LHHH (8)

HLLL (1)

HLLH (2)

HLHL (3)

HLHH (4)

HHLL (5)

HHLH (6)

HHHL (7)

HHHH (8)
11.Instruction Table

Instruction Code
Execution time
Instruction Description (fosc=270Khz)

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Write “00H” to DDRAM and set


Clear Display 0 0 0 0 0 0 0 0 0 1 DDRAM address to “00H” from 1.53ms
AC
Set DDRAM address to “00H”
from AC and return cursor to its
Return Home 0 0 0 0 0 0 0 0 1 - original position if shifted. The 1.53ms
contents of DDRAM are not
changed.
Assign cursor moving direction
Entry Mode Set 0 0 0 0 0 0 0 1 I/D SH and enable the shift of entire 39μ s
display.

Display Set display (D), cursor (C ), and


ON/OFF 0 0 0 0 0 0 1 D C B blinking of cursor (B) on/off 39μ s
Control control bit.
Set cursor moving and display
Cursor or shift control bit, and the direction,
Display Shift 0 0 0 0 0 1 S/C R/L - - 39μ s
without changing of DDRAM
data.
Set interface data length
(DL:8-bit/4-bit), numbers of
Function Set 0 0 0 0 1 DL N F - - display line (N:2-line/1-line)and, 39μ s
display font type (F:5×11 dots/5×
8 dots)
Set CGRAM Set CGRAM address in address
Address 0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 39μ s
counter.
Set DDRAM Set DDRAM address in address
Address 0 0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0 39μ s
counter.
Whether during internal operation
Read Busy Flag or not can be known by reading
and Address 0 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 0μ s
BF. The contents of address
counter can also be read.

Write Data to Write data into internal RAM


RAM 1 0 D7 D6 D5 D4 D3 D2 D1 D0 43μ s
(DDRAM/CGRAM).

Read Data from Read data from internal RAM


RAM 1 1 D7 D6 D5 D4 D3 D2 D1 D0 43μ s
(DDRAM/CGRAM).

* ”-”:don’t care
12.Timing Characteristics

12.1 Write Operation

RS VIH1
VIL1
tsu1 th1

R/W
VIL1 VIL1
tw th1
tf
E VIH1 VIH1
VIL1
VIL1 VIL1
tsu2 th2
tr
VIH1 Valid Data VIH1
DB0~DB7 VIL1 VIL1

tc

(VDD=4.5V~5.5V , Ta=-30~+85℃)

Mode Characteristic Symbol Min. Typ. Max. Unit


E cycle Time tc 500 - -

E Rise/Fall Time tR, tF - - 20

E Pulse Width (High, tw 230 - -


Low)
Write Mode R/W and RS Setup Time tsu1 40 - - ns

R/W and RS Hold Time tH1 10 - -

Data Setup Time tsu2 80 - -

Data Hold Time tH2 10 - -


12.2 Read Operation

RS VIH1
VIL1
tsu th

R/W
VIH1 VIH1
tw th
tf
E VIH1 VIH1
VIL1
VIL1 VIL1
tD tDH
tr
VIH1 Valid Data VOH1
DB0~DB7 VIL1 VOL1

tc

(VDD=4.5V~5.5V , Ta=-30~+85℃)

Mode Characteristic Symbol Min. Typ. Max. Unit


E cycle Time tc 500 - -

E Rise/Fall Time tR, tF - - 20

E Pulse Width (High, tw 230 - -


Low)
Read Mode R/W and RS Setup Time tsu 40 - - ns

R/W and RS Hold Time tH 10 - -

Data Output Delay Time tD - - 120

Data Hold Time tDH 5 - -


13.Initializing of LCM

Power on

Wait for more than 15 ms after V CC rises to 4.5 V

BF can not be checked before this instruction.


RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set ( Interface is 8 bits long. )
0 0 0 0 1 1 * * * *

Wait for more than 4.1 ms

BF can not be checked before this instruction.


RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set ( Interface is 8 bits long. )
0 0 0 0 1 1 * * * *

Wait for more than 100 μs

BF can not be checked before this instruction.


RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set ( Interface is 8 bits long. )
0 0 0 0 1 1 * * * *

BF can be checked after the following instructions.


When BF is not checked , the waiting time between
instructions is longer than execution instruction time.

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set ( Interface is 8 bits long. Specify
0 0 0 0 1 1 N F * * the number of display lines and font. )
0 0 0 0 0 0 1 0 0 0 The number of display lines and character font
0 0 0 0 0 0 0 0 0 1 can not be changed after this point.
0 0 0 0 0 0 0 1 I/D S Display off
Display clear
Entry mode set

Initialization ends

8-Bit Ineterface
Power on

Wait for more than 15 ms after V CC rises to 4.5 V

BF can not be checked before this instruction.


RS R/W DB7 DB6 DB5 DB4
Function set ( Interface is 8 bits long. )
0 0 0 0 1 1

Wait for more than 4.1 ms

BF can not be checked before this instruction.


RS R/W DB7 DB6 DB5 DB4 Function set ( Interface is 8 bits long. )
0 0 0 0 1 1

Wait for more than 100 μs

BF can not be checked before this instruction.


RS R/W DB7 DB6 DB5 DB4
Function set ( Interface is 8 bits long. )
0 0 0 0 1 1

RS R/W DB7 DB6 DB5 DB4 BF can be checked after the following instructions.
0 0 0 0 1 0 When BF is not checked , the waiting time between
0 0 0 0 1 0 instructions is longer than execution instruction time.
0 0 N F * *
Function set ( Set interface to be 4 bits long. )
0 0 0 0 0 0 Interface is 8 bits in length.
0 0 1 0 0 0
0 0 0 0 0 0 Function set ( Interface is 4 bits long. Specify
0 0 0 0 0 1 the number of display lines and character font. )
0 0 0 0 0 0 The number of display lines and character font
0 0 0 0 I/D S can not be changed after this point.
Display off
Display clear
Entry mode set

Initialization ends

4-Bit Ineterface
14.Quality Assurance

Screen Cosmetic Criteria


Item Defect Judgment Criterion Partition
A)Clear
Size: d mm Acceptable Qty in active area
d ≦ 0.1 Disregard
0.1<d≦ 0.2 6
0.2<d≦ 0.3 2
0.3<d 0
Note: Including pin holes and defective dots which must
1 Spots Minor
be within one pixel size.
B)Unclear
Size: d mm Acceptable Qty in active area
d ≦ 0.2 Disregard
0.2<d≦ 0.5 6
0.5<d≦ 0.7 2
0.7<d 0
Size: d mm Acceptable Qty in active area
d≦ 0.3 Disregard
2 Bubbles in Polarize 0.3<d≦ 1.0 3 Minor
1.0<d≦ 1.5 1
1.5<d 0
In accordance with spots cosmetic criteria. When the light
3 Scratch reflects on the panel surface, the scratches are not to be Minor
remarkable.
Above defects should be separated more than 30mm each
4 Allowable Density Minor
other.
Not to be noticeable coloration in the viewing area of the
LCD panels.
5 Coloration Minor
Back-light type should be judged with back-light on state
only.
15.Reliability

Content of Reliability Test


Environmental Test
Applicable
Test Item Content of Test Test Condition
Standard
High
Endurance test applying the high storage 80℃
Temperature ——
temperature for a long time. 200hrs
storage
Low
Endurance test applying the high storage -30℃
Temperature ——
temperature for a long time. 200hrs
storage
High Endurance test applying the electric stress
70℃
Temperature (Voltage & Current) and the thermal stress ——
Operation to the element for a long time. 200hrs
Low
Endurance test applying the electric stress -20℃
Temperature ——
under low temperature for a long time. 200hrs
Operation
High
Endurance test applying the high
Temperature/ 80℃,90%RH
temperature and high humidity storage for a ——
Humidity 96hrs
long time.
Storage
High Endurance test applying the electric stress
Temperature/ (Voltage & Current) and temperature / 70℃,90%RH
——
Humidity humidity stress to the element for a long 96hrs
Operation time.
Endurance test applying the low and high
temperature cycle.
Temperature -30℃ 25℃ 80℃ -30℃/80℃
——
Cycle 10 cycles
30min 5min 30min
1 cycle
Mechanical Test

10~22Hz→ 1.5mmp-p
Endurance test applying the vibration
Vibration test 22~500Hz→ 1.5G ——
during transportation and using.
Total 0.5hrs
50G Half sign
Constructional and mechanical endurance
wave 11 msedc
Shock test test applying the shock during ——
3 times of each
transportation.
direction
Atmospheric Endurance test applying the atmospheric 115mbar
——
pressure test pressure during transportation by air. 40hrs
Others

VS=800V,RS=1.5kΩ
Static electricity Endurance test applying the electric stress to
CS=100pF ——
test the terminal.
1 time

***Supply voltage for logic system=5V. Supply voltage for LCD system =Operating voltage at 25℃

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