Crystalfontz America, Inc.: Customer Model Cfah1602B-Ngg-Jpv By: Data: Approval
Crystalfontz America, Inc.: Customer Model Cfah1602B-Ngg-Jpv By: Data: Approval
Crystalfontz America, Inc.: Customer Model Cfah1602B-Ngg-Jpv By: Data: Approval
CUSTOMER
MODEL CFAH1602B-NGG-JPV
3.General Specification
5.Electrical Characteristics
6.Optical Characteristics
9.Function Description
11.Instruction Table
12.Timing Characteristics
13.Initializing of LCM
14.Quality Assurance
15.Reliability
1.Module Classification Information
(1)Avoid applying excessive shocks to the module or making any alterations or modifications to
it.
(2)Don’t make extra holes on the printed circuit board, modify its shape or change the
components of LCD module.
(3)Don’t disassemble the LCM.
(4)Don’t operate it above the absolute maximum rating.
(5)Don’t drop, bend or twist LCM.
(6)Soldering: only to the I/O terminals.
(7)Storage: please storage in anti-static electricity container and clean environment.
3.General Specification
5.Electrical Characteristics
Ta=-20℃ - - 5.2
V
Ta=25℃ -
Supply Voltage For LCD VDD-V0 - 4.2 V
- - V
Ta=+70℃ 3.8
Contrast Ratio CR - - 3 - -
Non-selected Non-selected
Conition Selected Conition Conition
Intensity Selected Wave
100% Non-selected Wave Intensity
10%
Cr Max
Cr = Lon / Loff 90%
100%
Vop
Driving Voltage(V) Tr Tf
Conditions :
φ = 270° φ = 90°
φ = 0°
7.Interface Pin Function
Connect a 20K ohm potentiometer from pin 15 (Vee which is -5v generated by the module)
to pin 2 (Vcc which is +5v supplied by you), with the wiper connected to pin 3 (Vo, the
contrast adjustment). This will take advantage of the negative voltage generator to enable
operation at wider temperatures.
8.Contour Drawing &Block Diagram
80.0 0.5
1 Vss
4.95 71.2
7.55 66.0(VA) 2 Vdd
12.45 56.2(AA) 3 Vo
8.0 P2.54*15=38.1 9.7 MAX 4 RS
15.76
12.55
11.76
9.8
2.5
2.5
5.2
18.3
8 DB1
11.5(AA)
36.0 0.5
16(VA)
13.08
5.08
31.0
26.2
9 DB2
10 DB3
A
11 DB4
12 DB5
4- 1.0 40.55 4- 2.5 PTH 1.6
2.5 75.0 4- 5.0 PAD 13 DB6
14 DB7
EL or NO B/L
15 A/Vee
3.55
16 K
2.95 0.6
0.6
0.55
0.7
0.65
5.55
5.95
DOT SIZE
RS Com1~16
R/W Controller/Com Driver
MPU
E
DB0~DB7
HD44780
or 16X2 LCD
80 series Equivalent
or
68 series
Power Circuit
Seg1~40
Vdd Seg41~80
Bias and
VR Vo
D Seg Driver
10K~20K Vss
M
CL1
Generator
CL2
Vee
N.V.
Vdd,Vss,V1~V5
External contrast adjustment.
Optional
Character located 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
DDRAM address 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
DDRAM address 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F
9.Function Description
The LCD display Module is built in a LSI controller, the controller has two 8-bit registers, an
instruction register (IR) and a data register (DR).
The IR stores instruction codes, such as display clear and cursor shift, and address information
for display data RAM (DDRAM) and character generator (CGRAM). The IR can only be written
from the MPU. The DR temporarily stores data to be written or read from DDRAM or
CGRAM. When address information is written into the IR, then data is stored into the DR from
DDRAM or CGRAM. By the register selector (RS) signal, these two registers can be selected.
RS R/W Operation
0 0 IR write as an internal operation (display clear, etc.)
0 1 Read busy flag (DB7) and address counter (DB0 to DB7)
1 0 Write data to DDRAM or CGRAM (DR to DDRAM or CGRAM)
1 1 Read data from DDRAM or CGRAM (DDRAM or CGRAM to DR)
capacity is 80×8 bits or 80 characters. Below figure is the relationships between DDRAM
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F
2-Line by 16-Character Display
The CGROM generate 5×8 dot or 5×10 dot character patterns from 8-bit character codes. See
Table 2.
In CGRAM, the user can rewrite character by program. For 5×8 dots, eight character patterns
can be written, and for 5×10 dots, four character patterns can be written.
Write into DDRAM the character code at the addresses shown as the left column of table 1. To
show the character patterns stored in CGRAM.
Relationship between CGRAM Addresses, Character Codes (DDRAM) and Character
patterns
Table 1.
F o r 5 * 8 d o t c h a ra c te r p a tte rn s
C h a ra c te r C o d e s C h a ra c te r P a tte rn s
C G R A M A d d re ss
( D D R A M d a ta ) ( C G R A M d a ta )
7 6 5 4 3 2 1 0 5 4 3 2 1 0 7 6 5 4 3 2 1 0
H ig h Low H ig h Low H ig h Low
0 0 0 * * * 0
0 0 1 * * * 0 0 0
0 1 0 * * * 0 0 0
0 1 1 * * * 0 C h a ra c te r
0 0 0 1 0 0 * * * 0 0 0 p a tte rn ( 1 )
0 0 0 0 * 0 0 0
1 0 1 * * * 0 0 0
1 1 0 * * * 0 0 0
1 1 1 * * * 0 0 0 0 0 C u rs o r p a tte rn
0 0 0 * * * 0 0 0
0 0 1 * * * 0 0 0
0 1 0 * * *
0 1 1 * * * 0 0 0 0 C h a ra c te r
0 0 0 0 * 0 0 1 0 0 1 1 0 0 * * * p a tte rn ( 2 )
1 0 1 * * * 0 0 0 0
1 1 0 * * * 0 0 0 0
1 1 1 * * * 0 0 0 0 0 C u rs o r p a tte rn
0 0 0 * * *
0 0 1
0 0 0 0 * 1 1 1 1 1 1 1 0 0
1 0 1
1 1 0
1 1 1 * * *
F o r 5 * 1 0 d o t c h a ra c te r p a tte rn s
C h a ra c te r C o d e s C h a ra c te r P a tte rn s
C G R A M A d d re ss
( D D R A M d a ta ) ( C G R A M d a ta )
7 6 5 4 3 2 1 0 5 4 3 2 1 0 7 6 5 4 3 2 1 0
H ig h Low H ig h Low H ig h Low
0 0 0 0 * * * 0 0 0 0 0
0 0 0 1 * * * 0 0 0 0 0
0 0 1 0 * * * 0 0
0 0 1 1 * * * 0 0
0 1 0 0 * * * 0 0 0
0 0 0 0 * 0 0 0 0 0 0 1 0 1 * * * 0 0 0
0 1 1 0 * * * 0 C h a ra c te r
0 1 1 1 * * * 0 0 0 0 p a tte rn
1 0 0 0 * * * 0 0 0 0
1 0 0 1 * * * 0 0 0 0
1 0 1 0 * * * 0 0 0 0 0 C u rs o r p a tte rn
1 1 1 1 * * * * * * * *
: " H ig h "
10.Character Generator ROM Pattern
Table.2
Upper
4 bit
Lower LLLL LLLH LLHL LLHH LHLL LHLH LHHL LHHH HLLL HLLH HLHL HLHH HHLL HHLH HHHL HHHH
4 bit
CG
RAM
LLLL (1)
LLLH (2)
LLHL (3)
LLHH (4)
LHLL (5)
LHLH (6)
LHHL (7)
LHHH (8)
HLLL (1)
HLLH (2)
HLHL (3)
HLHH (4)
HHLL (5)
HHLH (6)
HHHL (7)
HHHH (8)
11.Instruction Table
Instruction Code
Execution time
Instruction Description (fosc=270Khz)
* ”-”:don’t care
12.Timing Characteristics
RS VIH1
VIL1
tsu1 th1
R/W
VIL1 VIL1
tw th1
tf
E VIH1 VIH1
VIL1
VIL1 VIL1
tsu2 th2
tr
VIH1 Valid Data VIH1
DB0~DB7 VIL1 VIL1
tc
(VDD=4.5V~5.5V , Ta=-30~+85℃)
RS VIH1
VIL1
tsu th
R/W
VIH1 VIH1
tw th
tf
E VIH1 VIH1
VIL1
VIL1 VIL1
tD tDH
tr
VIH1 Valid Data VOH1
DB0~DB7 VIL1 VOL1
tc
(VDD=4.5V~5.5V , Ta=-30~+85℃)
Power on
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set ( Interface is 8 bits long. Specify
0 0 0 0 1 1 N F * * the number of display lines and font. )
0 0 0 0 0 0 1 0 0 0 The number of display lines and character font
0 0 0 0 0 0 0 0 0 1 can not be changed after this point.
0 0 0 0 0 0 0 1 I/D S Display off
Display clear
Entry mode set
Initialization ends
8-Bit Ineterface
Power on
RS R/W DB7 DB6 DB5 DB4 BF can be checked after the following instructions.
0 0 0 0 1 0 When BF is not checked , the waiting time between
0 0 0 0 1 0 instructions is longer than execution instruction time.
0 0 N F * *
Function set ( Set interface to be 4 bits long. )
0 0 0 0 0 0 Interface is 8 bits in length.
0 0 1 0 0 0
0 0 0 0 0 0 Function set ( Interface is 4 bits long. Specify
0 0 0 0 0 1 the number of display lines and character font. )
0 0 0 0 0 0 The number of display lines and character font
0 0 0 0 I/D S can not be changed after this point.
Display off
Display clear
Entry mode set
Initialization ends
4-Bit Ineterface
14.Quality Assurance
10~22Hz→ 1.5mmp-p
Endurance test applying the vibration
Vibration test 22~500Hz→ 1.5G ——
during transportation and using.
Total 0.5hrs
50G Half sign
Constructional and mechanical endurance
wave 11 msedc
Shock test test applying the shock during ——
3 times of each
transportation.
direction
Atmospheric Endurance test applying the atmospheric 115mbar
——
pressure test pressure during transportation by air. 40hrs
Others
VS=800V,RS=1.5kΩ
Static electricity Endurance test applying the electric stress to
CS=100pF ——
test the terminal.
1 time
***Supply voltage for logic system=5V. Supply voltage for LCD system =Operating voltage at 25℃