Mandelbrot Zoom Report
Mandelbrot Zoom Report
1
Table of Contents
Introduction 3-4
Implementation 4-5
Results 7
FPGA Utilization 8
Conclusion 9
2
Introduction
The Mandelbrot set is the set of complex numbers for which the function 𝑓𝑓_𝑐𝑐 (𝑧𝑧)=𝑧𝑧^2+𝑐𝑐 does not
converge. A point c belongs in the Mandelbrot set if and only if |𝑧𝑧_𝑛𝑛 | ≤ 2 for all 𝑛𝑛 ≥ 0. The escape time
algorithm was used to determine the n at which the magnitude of z_n exceeded 2. The mandelbrot set
was visualized in this project by assignining the color intensity of a pixel to the maximum number of
iterations in which it did not diverge. If a point did not diverge after n=64, then it was assigned the
highest pixel intensity. The following examples show how to determine if a complex number is
contained in the mandelbrot set.
Example (c = -1 + 0i)
𝑓𝑓_𝑐𝑐 (0)= 0^2−1
𝑓𝑓_𝑐𝑐 (−1)= (−1)^2−1
𝑓𝑓_𝑐𝑐 (0)=0^2−1
𝑓𝑓_𝑐𝑐 (−1)=〖(−1)〗^2−1
|z_n| does not exceed 2, thus -1 + 0i is within the Mandelbrot set.
Example (c = 1 + 0i)
𝑓𝑓_𝑐𝑐 (0)=0^2+1
𝑓𝑓_𝑐𝑐 (1)=1^2+1
𝑓𝑓_𝑐𝑐 (2)=2^2+1
𝑓𝑓_𝑐𝑐 (5)=5^2+1|z_n| exceeds 2 at n = 4, thus 1 + 0i is not within the Mandelbrot set.
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On the FPGA, complex numbers were converted to real numbers. The following equations show a
complex number z and the real and imaginary components of z^2.
𝑧𝑧=𝑥𝑥+𝑖𝑖𝑖𝑖
𝑧𝑧^2=𝑥𝑥^2+2𝑖𝑖𝑖𝑖𝑖𝑖 − 𝑦𝑦^2
𝑥𝑥=𝑅𝑅𝑅𝑅(𝑧𝑧)= 𝑥𝑥^2−𝑦𝑦^2
𝑦𝑦=𝐼𝐼𝐼𝐼(𝑧𝑧)=2𝑥𝑥𝑥𝑥
𝑥𝑥^2+ 𝑦𝑦^2≤4
The escape time algorithm determined the iteration at which a point diverged from the Mandelbrot set:
while ( 𝑥𝑥^2+ 𝑦𝑦^2 ≤4 and iteration < max_iteration )
𝑦𝑦=2𝑥𝑥𝑥𝑥+ 𝑦𝑦_0
𝑥𝑥= 𝑥𝑥^2−𝑦𝑦^2+𝑥𝑥_𝑜𝑜
iteration += 1
Implementation
The video zoomed in on a point on the edge of the Mandelbrot set. The geometry shown in Figure 2
shows how the zooming parameters were calculated.
x_start, y_start: point at the top left of the current frame
x_inc, y_inc: distance between pixels in horizontal and vertical directions
The pixel locations were calculated with the VHDL fixed point library. The following is an example of how
fractional numbers were used to calculate pixel locations:
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a <= resize(To_sfixed(1,2,-4)/To_sfixed(2,2,-4),a); …1/2
b <= resize(To_sfixed(1,2,-4)/To_sfixed(4,2,-4),a); …1/4
c <= resize(a+b,c) … 3/4
Binary equivalent of 3/4: 000.1100
The state diagram in Figure 3 shows the state diagram that was used. A pixel location was mapped to a
pixel on the VGA screen. Then, it was assigned a color from the result of the escape time algorithm.
When all pixel colors were assigned, a delay occurred to increase the time each zoom iteration was
displayed.
A simple dual port block RAM was used to store the color assignments of each pixel so they could be
continuously displayed to the screen. The port width was 6 bits, and the port depth was 307,200
(480*640). The 6 bit width allowed for 64 iterations of the escape time algorithm to be used. The
numbers 0-63 were mapped to 0-255 with the following transformation:
An HDMI-out library was used to output VGA on the HDMI TX of the Zybo-Z7. The library generated
timing signals and converted video data to TDMS (transition-minimized differential signaling) which
transmitted the serial data.
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Simulation and Testing
The contents of the BRAM were written to a file in Vivado simulation. The data was imported into
MATLAB and reconstructed as an image with the same dimensions as VGA, 640x480:
for I = 1:480
for j = 1:640
img(i,j) = data(640*(i-1)+j);
end
end
The output of the simulation was compared to the expected results from the following MATLAB code:
xpixel=100;
ypixel=100;
num_iter = 64;
mandelbrot_check(-2+.0046879999708962*xpixel+1i*(1-.00416666666569654*ypixel),num_iter)
function [counter] = mandelbrot_check(c,maxIter)
z=0;
counter = 0;
while abs(z) < 2 && counter < maxIter
z = z^2 + c;
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counter = counter + 1;
end
if counter == maxIter
inSet = true;
else
inSet = false;
end
end
Results
https://youtu.be/Am59BlNa_mY
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FPGA Utilization
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Conclusion
This project helped me become more comfortable working with VHDL and Vivado. I practiced
the syntax of VHDL so I can write complete code without using external resources. The main
challenges of this project were:
• Understanding the Mandelbrot set
• Using the VHDL fixed library
• Meeting resource requirements for the Zybo Z7
• Creating a plan for the zooming algorithm
• Understanding the HDMI out library
• Waiting for slow simulation, synthesis and implementation
A known bug in this program is that the screen is slightly misaligned on the left side. This is
probably because the BRAM memory address counter is slightly misaligned from the VGA sync
signals.
If a device with a larger BRAM was used, the Mandelbrot set could be plotted with more detail
because the number of iterations could increase. The program would be able to zoom in
further.
There were a lot of steps to completing this project including initial research and planning,
testing, and synthesizing. I initially hoped that the video could zoom in further than 1,000,000x,
but the constraints of memory did not allow it. It was rewarding to get this project working and
I look forward to continuing to combine programming and art in the future.