Computer Organization and Architecture: Tutorial 6
Computer Organization and Architecture: Tutorial 6
Architecture
Tutorial 6
Kenneth Lee
For example:
2 bits 2s complement:
10 11 00 01
-2 -1 0 +1
4 bits 2s complement:
1000 1001 1010 1011 1100 1101 1110 1111 0000 0001 0010 0011 0100 0101 0110 0111
-8 -7 -6 -5 -4 -3 -2 -1 0 +1 +2 +3 +4 +5 +6 +7
b. For the normalized floating-point numbers, the difference with above is that
the first bit can not be 0, so the largest value will keep the same.
But the smallest positive value will be b-1
(e.g. if b is 2 and significant is 3 digits, the largest positive is (0.1)2;
if b is 10 and significant is 3 digits, the largest positive is (0.1)10 )
so the smallest positive significant is b-1x(b-q)
c. Minus means the sign is 1
(-1.5)10 = (-1.1)2x20 so E is 0 and its biased representation is 01111111 (0+27-1)
(0.5)10 = (0.1)2 so the significant is 100000000000000000000000
The exponent value is in 1~2046 (0 and 2047 are kept for special use)
The bias is 1023 so the biased exponent is in -1022~+1023
c=A BC BC ABC ABC
(c is 1 when A=1,B=1,C=0 or A=1,B=0,C=1)
d=(A+B)(A+C)(A+B)
=AAA AAB+AAC+ABC+AAB+ABB+ABC+BBC
=ABC+AB+ABC
=ABC+AB
(d is 1 when A=0,B=1,C=1, or A=1,B=0)
B.2 simplify the following expressions according to the commutative law
AB+AC+BA
=AB+AC+AB
=AB+AC
(LMN)(AB)(CDE)(MNL)
=(LMN)(AB)(CDE)(LMN)
=(LMN)(AB)(CDE)
F(K+R)+SV+WX VS+XW+(R+K)F
=F(K+R)+SV+WX SV+WX+F(K+R)
=F(K+R)+SV+WX
B.4 Apply DeMorgen’s theorem
F=V+A+L=VAL
F=A+B+C+D=ABCD
B.4 Simplify the following expressions
A=ST+VW+RST
=ST+VW
A=TUV+XY+Y
=TUV+Y
A=F(E+F+G)=F
A=(PQ+R+ST)TS=ST
A=DDE
D+D+E
=D+E
A=Y(W+X+Y+Z)Z
=YZ(W+X+YZ)
=YZ
A=(BE+C+F)C=C
B.5 Construct the operation XOR from Boolean AND, OR, and NOT
A B XOR
0 0 0
0 1 1
1 0 1
1 1 0
A XOR B = AB + AB
B.6 Given a NOR gate and NOT gates, draw a three input AND function
AND(A,B,C)
=ABC
=ABC
=A+B+C
=NOR(A,B,C)
B.7 Write the Boolean expression for a four-input NAND gate
NAND(A,B,C,D)
=NOT(AND(A,B,C,D))
=ABCD