Program Structure for Second Year Computer Engineering UNIVERSITY OF MUMBAI(With Effect from 2020-2021) Semester TIT . Teaching Scheme edits Assigne Com’ | Course Name (Contact Hours) Credits Assigned ‘ode Theory | Pract. | Tut. | Theory | Pract. | Tut, | Total CSC301_| Applied Mathematies-Ill [3 - | 3 ~ 1 4 “scaon | Diserete Structures and 5 CSC302 | Graph Theory 5 ~ 3 = 5 CSC303_| Data Structure 3 = = 3 ~ = 3 “scaoq | Digital Logie & 3 CSC304 | Computer Architecture 5 = : 3 ~ 3 CSC305_[ Computer Graphies 3 = = 3 = = 3 CSL301_| Data Structure Lab ~ 2 = = 1 = I Digital Logic & CSL302 | Computer Architecture - 2 - - 1 - 1 Lab, CSL303_ | Computer Graphies Lab [ 2 = = 1 = 1 Skill base Lab CSL304 | course:Object Oriented | ae] ~ 2 - 2 Programming with Java i CSM301_| Mini Project — 1 A £ \ 2 2 Total 15 14 1 ) Ns 07 1 2B Examination Scheme Term | Pract i Work | &oral | Tt! Course N End | Exam. Code Course Name Internal Agse¥#inent | Sem. | Duration Exam|_(in Hrs) foctfol/ Fest | Ave 2/. C301 | Applied Mathematifeunt | )20 | 20 [ 20 | so | 3 3 | 125 cscao2 | Discrete Stucturesand WF 55 | 99 | oo) go | 3 ~ )o 100 Graph Theor CSC303_| Data Structure 20 | 20 | 20 | #0 | 3 = [= 100 S04 | Digital Logie & 5 CSC3O4 | Computer Architecture | 7° | 2° | 29 | 89 | 5 eo 100 C8C305 | Computer Graphics 20 | 20 | 2] 80 | 3 = |= 100 CSL301_| Data Structure Lab - [|-|[-[- = 25 | 2s 50 Digital Logic & SL302 | Computer Architecture f —~ | ~ | ~ | ~ - 2s 2s Lab. 03 | Computer Graphies Lab | — | = | = | = = 25 | 25 50 Skill base Lab course: CSL304 | Object Oriented - |-|-|- - so | 25 15 Programming with Java CSM301 | Mini Project -1 A 2s | 2s 50 Total = [= [100 [400 [= [200-78 775 *Should be conducted batchwise and $ indicates workload of Leamer (Not Faculty), Students can form groups with minimum 2 (Two) and not more than 4 (Four), Faculty Load: 1 hour per week per four groupsCourse Code Course Name Credit CSC304 Digital Logic & Computer Organization and Architecture 3 Pre-requisite: Knowledge on number systems Course Objective: 1] To have the rough understanding of the basic structure and operation of basic digital circuits and digital computer. 2 | To discuss in detail arithmetic operations in digital system. 3 To discuss generation of control signals and different ways of communication with /O devic 4 | To study the hierarchical memory and principles of advanced computing. urse Outcome: To lear different number systems and basic structure of computer system. To demonstrate the arithmetic algorithms, To understand the basic concepts of digital components and processor organization To understand the generation of control signals of computer. w]e] To demonstrate the memory organization. 6 | To describe the concepts of parallel processing and different Buses. Module] _ [Detailed Content Hours 1 (Computer Fundamentals 3 1.1[Introduction to Number System and Codeg 1.2[Number Systems: Binary, Octal, De€iial, Hexadecimal, 1.3|Codes: Grey, BCD, Excess-3, ASCII, Boolean Algebra. 1.4|Logic Gates: AND,OR,NOT,NANDINORIEX-OR 1.5 [Overview of computer organiation and architectur 1.6/Basic Organization of Compiiter ad Block Level functional Units, Von- Neumann Model, 2 Data Representation andgAnithmetic algorithms 8 2.1|Binary Arithmeiex Addition, Subtraction, Multiplication, Division using Sign Magnitude, 18 and 2%§ cémpliment, BCD and Hex Arithmetic Operation. 2.2/Booths Multiplicatigh Algorithm, Restoring and Non-restoring Division! Algorithm. 3|IEEE-754 Floating point Representation. 3 Processor Organization and Architecture 6 Introduction: Half adder, Full adder, MUX, DMUX, Encoder, Decoder(IC level). Introduction to Flip Flop: SR, JK, D, T (Truth table), Register Organization, Instruction Formats, Addressing modes, Instruction Cycle, Interpretation and sequencing. q (Control Unit Design 6 [4.1 [Hardwired Control Unit: State Table Method, Delay Element Methods. '4.2|Microprogrammed Control Unit: Micro Instruction-Format, Sequencing and execution, Micro operations, Examples of microprograms. 5 Memory Organization 6 5.1/Introduction and characteristics of memory, Types of RAM and ROM, Memor Hierarchy, 2-level Memory Characteristic, 5.2/Cache Memory: Concept, locality of reference, Des mapping techniques, Cache coherence and write poli Interleaved and Associative Memory. problems based on 6 Principles of Advanced Processor and Buses 86. Basic Pipelined Data path and control, data dependencies, data hazards, branch) hazards, delayed branch, and branch prediction, Performance measures-CPI, ‘Speedup, Efficiency, throughput, Amdhal’s law. (6.2|Flynn’s Classification, Introduction to multicore architecture. [6.3]Introduction to buses: ISA, PCI, USB. Bus Contention and Arbitration. Textbooks: 1| R. P. Jain, “Modern Digital Electronic”, McGraw-Hill Publication, 4"Edition. 2| William Stalling, “Computer Organization and Architecture: Designing and Performance”, Pearson Publication 10"! Edition. 3| John P Hayes, Edition. “Computer Architecture and Organization”, McGraw-Hill Publication, 3°” 4 | Dr. M. Usha and T. S. Shrikanth, “Computer system Architecture and Organization”, Wiley publication. Reference: 1 | Andrew S, Tanenbaum, structured Computer Organization”, Pearson Publication, B.Govindarajalu, “Computer Architecture and Organization”, McGraw-Hill Publication, 2 3 | Malvino, “Digital computer Electronics”, McGraw-Hill Publication, 3"Edition. 4] Smruti Ranjan Sarangi, “Computer Organization and Architecture”, MeGraw-Hill Publication. ‘Assessment: Internal Assessment: ‘Assessment consists of two class tests of 20 marksfeach The first class test is to be conducted when approx. 40% syllabus is completed and"Secon@ela§s test when additional 40% syllabus is completed. Duration of each test shall be oné\hour. End Semester Theory Examinations |_| Question paper will comprise of} qlléstions, cach carrying 20 marks. 2__| The students need (o solve totihd Questions. 3 | Question No.1 will be compulgorprand based on entire syllabus. 4 | Remaining question (Q.2%o Q'6) will be selected from all the modules. Useful Links hhttos:// wn. classcentral,com/course/swavam-computer organization and architecture a pedagogical aspect-9824 httos://nptel ac in/courses/106/103/106103068/ https: //wwnw.coursera.org/learn/comparch =]e|is httos://wwnw.edx.org/learn/computer-architecture