SolidPractices: Thermal Management

using Electronics Cooling Module

SOLIDWORKS® Flow Simulation
Updated: April 2021
Revision 2.0

3DS.COM © Dassault Systèmes | Confidential Information | 06/27/2017 ref.: Document_Reference |

Table of Contents

1) PREFACE................................................................................................................................................................4
2) FUNDAMENTALS OF THERMAL MANAGEMENT..................................................................................................5

A) INTRODUCTION ..................................................................................................................................................... 5
B) MOORE’S LAW ..................................................................................................................................................... 5
C) WHAT IS THERMAL MANAGEMENT? .......................................................................................................................... 5
D) WHY THERMAL MANAGEMENT? ............................................................................................................................... 6
E) ELECTRONIC PACKAGES AND PRIMARY HEAT PATH: ....................................................................................................... 7
F) DTMS VS CTMS APPROACH .................................................................................................................................... 8
3) SOLIDWORKS FLOW SIMULATION ELECTRONICS COOLING MODULE ................................................................9

A) ADDITIONAL CAPABILITIES IN THE ECM ...................................................................................................................... 9

B) ECM FACT SHEET .................................................................................................................................................. 9
C) TWO-RESISTOR COMPACT MODEL ............................................................................................................................. 9
D) HEAT PIPE .......................................................................................................................................................... 11
E) PRINTED CIRCUIT BOARD (PCB).............................................................................................................................. 12
F) JOULE HEATING CALCULATION ................................................................................................................................ 13
G) SHORTCUT NUMBER & BOTTLENECK NUMBER ........................................................................................................... 14

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 Revision History
Rev # Date Description
1.0 April 2019 Created document
2.0 April 2021 Document verified for current software release & modified: new section
added on ‘DTMs vs CTMs approach?’ and added detailed information
about two-resistor compact model & PCB.

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1) Preface
This SolidPractices document provides insight into the importance of managing the ever-
increasing level of heat generation in electronics, and discusses the SOLIDWORKS Flow
Simulation Electronics Cooling Module (ECM), which can help users quickly solve problems
that relate to heat generation.

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2) Fundamentals of Thermal Management

a) Introduction

The increasing difficulty of thermal management in the electronics industry is closely related
to Moore’s Law.

In 1965, Gordon Moore (co-founder and chairman emeritus of Intel Corporation) made a
prediction that ended up pacing the modern digital revolution. From his careful observation
of an emerging trend at that time, he came to the conclusion that the computing would
dramatically increase in power, and decrease in relative cost, at an exponential speed. This
turn out to be the golden rule for the electronics industry and a basis for innovations. This
rule is now widely known as Moore’s Law.

b) Moore’s Law
Moore’s Law states that the number of transistors that can be placed inexpensively on an
integrated circuit will double every 18 to 24 months.

Now, after more than 50 years, this law is still in effect and electronics industries are
extending it to set goals for 2020, 2025, 2030, and beyond through the implementation of 3D
packaging structures. These structures are stacking chips, sort of like nano-sized 3D
skyscrapers.

Nevertheless, today in these 3D packages, the heat dissipation (of several kW) by all of the
layers of circuitry share a common thermal path. Therefore, industry again has only one main
challenge from the last 50 years, from transistor scaling to such novel packaging, and that is
the removal of heat from the packaging structures. In other words, “thermal management”.

c) What is thermal management?

The significant internal heat generation within an operating microelectronic component is the
result of resistance to the flow of electrical current through the leads, poly-silicon layers, and
transistors of a semiconductor device. In the absence of a heat removal mechanism, the
temperature of components will rise at a constant rate until it reaches a magnitude at which
the electronic operation of a device ceases. The electronics device at high temperature loses
physical integrity, which can damage the inside parts and lead to electrical failure. Operations
that exceed the allowable environmental temperature range can cause overstressing of wire
bonds. This can tear the connections loose, crack the semiconductor dies, or cause packaging
cracks. Humidity and subsequent high temperature heating may also cause cracking, as can
mechanical damage or shock.

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 Thermal management and packaging places the semiconductor device in contact with a lower
temperature solid or fluid, which facilitates heat flow away from the component. Due to this
heat removal mechanism – cooling, the temperature rise is moderated as it asymptotically
approaches an acceptable steady-state value.

For successful thermal packaging, Engineers and Designers are inserting more intense heat
removal mechanisms. These include a judicious combination of thermal conduction,
convection, radiation, and phase change mechanisms to stabilize the component temperature
at an acceptable level.

d) Why thermal management?

An instant and total damage of electronic function and package integrity almost always
relates to an enormous temperature increase. This may lead to a drastic deterioration in
semiconductor behavior, fractures, delamination, melting, vaporization, and even combustion
of the packaging material.

An individual electronic component contains no moving parts like a mechanical system. If

the component operates at or near room temperature, it can perform unfailingly for many
years. However, integrated circuits operate at substantially higher temperatures and most of
the electronic components are prone to failure from prolonged exposure to elevated
temperatures.

As shown in the Figure 1, the failure rate of electronic devices increases rapidly with an
increase in operating temperature. One can estimate that the rise in temperature from 75º
Celsius to 125º Celsius can result in a five-fold increase in the failure rate. Beyond this, an
addition of 10º Celsius to 20º Celsius increase in chip temperature can double the component
failure rate. The operation of an electronic
device is more reliable with a heat removal
mechanism. Therefore, to increase the useful
life of equipment and to prevent catastrophic
failure, the use of cooling systems – “thermal
management” remains crucial. In the future,
thermal management will be a key enabling
technology in the development of advance
electronics.

Figure 1: Variation of failure factor versus temperature.

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e) Electronic packages and primary heat path:

Figure 2: Typical plastic ball grid array package Figure 3: Primary heat path in PBGA

As an example, consider a single-chip plastic ball grid array (PBGA) package on the PCB
board of a device (Figure 2). The primary heat transfer paths for this package are shown in
Figure 3. Basically, there are two main heat dissipation paths from the silicon die. These are
1) to the case of the package (upward), and 2) through the PBGA and into the PCB
(downward). Heat from the case and board then passes to the skin of the device for
convection to the ambient environment.

The PBGA package consists of a silicon die (chip), which is mounted on the substrate using a
die attach (thermally conducting adhesive). The package substrate is a multilayer printed
circuit board with metal circuit traces and through holes (routing vias) to connect the front of
the laminate with the ball pads on the back side. On the top surface of the substrate, there are
metal pads to which the gold wires bond. The pads on the semiconductor chip are arranged
around the perimeter allowing for ease in wire bonding from the chip to the pads on the
substrate. This entire integrated circuit and gold wire bond are encapsulated in a plastic mold,
shown as the epoxy overmold in Figure 2.

Figure 4: Typical PBGA Top Bottom Photo (416 Pin, 1.0 mm Pitch, 27 X 27 mm sq.)

The solder spheres (or balls) connect the semiconductor substrate with the PCB or
motherboard. In practice, the PBGA manufacturers place the solder balls on the bottom
surface of the substrate and ship to the customer. Customers then mount PBGA on the printed
circuit board or motherboard for final use.

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f) DTMs vs CTMs approach
For efficient thermal management, Engineers and Designers are replacing exact physical
models (also known as detailed thermal models, or DTMs) with compact thermal models
(CTMs). Constructing DTMs exactly identical to the actual package geometry is time
consuming and computational resources required for solving such large problems would be
unnecessary.

On other hand, a CTM is a behavioral model that aims to accurately predict the temperature
of the package only at a few critical points by using far less computational efforts. A CTM
never mimics the geometry and material properties of the actual component, in fact it uses a
thermal resistor network to construct the analytical model and simulate the response of a
component to the environment in which it is placed. Two-resistor and DELPHI are the most
popular types of CTMs in use today.

The SOLIDWORKS Flow Simulation ECM has an extensive library of more than 150 Two-
Resistor components that represent the entire integrated circuits.

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3) SOLIDWORKS Flow Simulation Electronics Cooling Module
The SOLIDWORKS Flow Simulation ECM enriches the flow simulation capabilities by
helping users quickly solve the problem particular to the electronics cooling industry. The
ECM provides accurate analysis of PCB and enclosure design based on the more realistic
modeling of individual components and PCBs.

a) Additional capabilities in the ECM

 A two-resistor compact model to accurately simulate electronic packages

 Heat pipes for modeling a predominant cooling approach
 PCB generators to accurately model multilayer PCBs
 Joule heating calculation
 An enriched Flow Simulation Engineering database with a wide range of fans,
thermoelectric coolers, and interface materials
b) ECM fact sheet

 ECM was introduced in SOLIDWORKS Flow Simulation 2011

 It is an add-on module that requires additional purchase
 It appears as a separate item on the Product Activation list
 It is not a stand-alone product and instead requires same version installations of the
SOLIDWORKS and SOLIDWORKS Flow Simulation products
c) Two-resistor compact model

The two-resistor compact model consists of three nodes connected by two thermal resistors.
These three nodes represent the measured values of the Junction-Board (JB) and Junction-
Case ( JC) resistance shown in Figure 5.

In other words, in this type of CTM, the heat leaving path is identical to the primary heat
transfer path as shown in Figure 3. However, this does not account for heat leaving or
transfer through the side of package is not accounted.

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 Figure 5: Two-resistor model (Reference - https://www.jedec.org)

Therefore, in a two-resistor model, instead of considering the exact geometry package

(chip), the model is considered to consist of three nodes:
 The junction is considered as a high conductivity solid plate with heat-insulating side
walls. Only the top and bottom surfaces can exchange heat with the environment.
 The board is considered to be in direct thermal contact with the local environment
immediately below the footprint of the package. This is normally the printed circuit
board (PCB).
 The case is considered to be in direct thermal contact with the local environment
immediately above the top of the package. This is normally air or a thermal interface
material used in conjunction with a heat sink.
A two-resistor component is created by selecting at least one face of the component as a Top
Face as shown in Figure 6. The software considers this as the case node and the Bottom
surface as the board node automatically. The top and bottom surfaces of the geometry or
component must be parallel to each other.

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 Figure 6: Creating two-resistor component

For an example, Figure 7 illustrates placement of a single package on the PCB and the
equivalent two-resistor model (image source: “Two-Resistor Compact Model Guideline”,
JESD15-3).

Figure 7: Creating a two-resistor component

For additional technical information and references, see the Knowledge Base solution S-
064106.

d) Heat pipe

Heat pipes are one of the most efficient methods of thermal management in the electronics
industry. The heat pipe consists of a wick on the inner diameter, and cool working fluid
moves through the wick from the colder side (condenser) to the hotter side (evaporator)
where it vaporizes. The working fluids vapor moves to the condenser side and condenses,
releasing its latent heat in the condenser. It then repeats the cycle to continuously remove
heat from hotter parts of the system. For more information, see the Knowledge Base solution
S-063969.

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e) Printed circuit board (PCB)
A printed circuit board (PCB) manufactured from FR-4 material mechanically supports and
electrically connects electrical or electronic components using conductive tracks, pads and
other features fixed from one or more sheet layers of copper laminated onto or between sheet
layers of a non-conductive substrate. Modeling the actual PCB along with its detailed copper
traces, vias (to pass connections between layers of copper) is challenging, time-consuming
and not desirable. In SOLIDWORKS Flow Simulation ECM, users can pick the predefined
PCB to replace the actual component in the graphics area (see Figure 8).

Figure 8: User interface & dialog box, defining Printed Circuit Board

Users also need to define density (ρ), specific heat (C), and thermal conductivity (K) for both
dielectric (denoted by D index) and conductor materials (denoted by C index) of the PCB.

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 In addition, users must describe the internal structure of the PCB in one of the available
types, namely Conductor Volume Fraction, Board Mass and Layer Definition. For more
information, see the Knowledge Base solution S-064105 or refer to the topic “Creating a
Printed Circuit Board” in the “SOLIDWORKS Flow Simulation Online User’s Guide”.

For the Layer Definition type, specify the PCB total thickness and the number of conducting
layers (in the Tables and Curves tab). Additionally, each conducting layer user input is
required for the Percentage Cover (the volume fraction of conductor material in the layer)
and the Layer Thickness.

Figure 9: Cross section of 2s2p PCB showing trace and dielectric thicknesses

For example, Figure 9 (Reference: https://www.jedec.org/system/files/docs/JESD51-9.pdf)

shows the typical cross section of a four layer PCB. Two layers are dedicated as power
supply and ground planes, and the other two layers are used for signal wiring between
components. This is commonly known as a 2s2p board, displaying trace and dielectric
thicknesses.

The generated PCB possesses the equivalent anisotropic thermal conductivity based upon all
of these input (and as per the modeling specifications from the JEDEC standards).

f) Joule heating calculation

Users can perform Joule heating calculations by defining current sources. Set the electrical
power W=R*I^2 as a volume source, where:

I = Current, in amperes

R = Electrical resistance of the wire, in ohms

W = Electrical power (Joule heating), in Watts, which is evolved inside the component

This electrical power can then be set as a volume source in the component.

For more information, see the Knowledge Base solutions S-055466 and S-073931.

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g) Shortcut number & Bottleneck number
Electronics thermal management is all about planning an effective way to remove heat from
the packaged IC to a surrounding ambient. If you can identify how the heat flow is restricted
in in a thermal model, then you can apply corrective design modifications to ease the flow of
heat and reduce temperature rises. This leads to the idea of thermal Bottleneck and Shortcut
numbers.

The Bottleneck (Bn) number identifies flow paths that carry high heat but at the same time
resist the flow of that heat. The Shortcut (Sc) number reveals chances for alternate and more
efficient heat flow paths.

The Shortcut number is calculated as the cross product of the heat flux and temperature
gradient vector magnitudes. The Bottleneck number is the dot product of the two vector
qualities. As shown in the following Figure 10, the length of the heat flux vector arrow
expresses the heat flux magnitude, and similarly, the length of the gradient vector arrow
defines the temperature gradient magnitude.

Figure 10: Calculating Bn and Sc numbers from data

For example, if the two vectors align perfectly, then the Cos  = 1 and the Bn number is
purely the product of the vector magnitude. This high Bn value indicates large heat flows
attempting to pass through large thermal resistance. On the other hand, the large Sc number
(if Sin  = 1) reveals areas in which heat is not moving directly toward a significantly cold
region. These regions are the alternate for a new heat transfer path for better thermal
management.

For additional information, see the article “Thermal Bottlenecks and Shortcuts in
SOLIDWORKS Flow Simulation” in the SOLIDWORKS Tech Blog at:

https://blogs.solidworks.com/tech/2016/01/solidworks-support-monthly-news-january-
2016.html

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