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Q No. Questions Marks CO Section-A: B.Tech (CSE)

This document contains an exam paper for the subject "Computer Organization and Architecture" for CSE second year third semester students. It has two sections - Section A contains 4 multiple choice questions worth 2.5 marks each from three different units of the subject. Section B contains 4 questions worth 5 marks each, with two questions from unit 1 and two from unit 3. The questions test various concepts related to computer organization including types of buses, instruction formats, microoperations, stack operations, addressing modes, bus arbitration techniques, instruction formats and pipeline execution.

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BAL KRISHNA PANDEY
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42 views1 page

Q No. Questions Marks CO Section-A: B.Tech (CSE)

This document contains an exam paper for the subject "Computer Organization and Architecture" for CSE second year third semester students. It has two sections - Section A contains 4 multiple choice questions worth 2.5 marks each from three different units of the subject. Section B contains 4 questions worth 5 marks each, with two questions from unit 1 and two from unit 3. The questions test various concepts related to computer organization including types of buses, instruction formats, microoperations, stack operations, addressing modes, bus arbitration techniques, instruction formats and pipeline execution.

Uploaded by

BAL KRISHNA PANDEY
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Name of the School CET IILM AHL Name of the Department B.

Tech(CSE)
Name of the Subject Computer Subject Code KCS302
Organisation and
Architecture
Session 2020-2021 Branch, Year & Semester CSE,2,3
Sessional Number (Ist ) Name of the Subject Dr.Anuradha
Teacher
Time: 60 Minutes Maximum Marks 30 Set: I
Note: 1) Attempt All Section A & B.
2) Section A consists of 4 questions. Two questions from each unit. Questions may have internal
choice from the same unit. Students will have to attempt 4 out of 4.
3) Section B consists of 4 questions. Two questions from each unit. Questions may have internal
choice from the same unit. Students will have to attempt 4 out of 4.

Q No. QUESTIONS MARKS CO


SECTION-A

1 Describe different types of buses? Explain significance of each bus. 2.5 1

2 Enlighten the difference between a direct and indirect address instruction? 2.5 1
How many references to memory are needed for each type of instruction to
bring an operand into a processor register?
3 Determine the microoperations that will be executed in the processor when 2.5 3
the following 14-bit control words are applied on
(1) 00101001100101 (2) 01001001001100 (3) 11110001110000
4 Let SP = 000000 in the stack. How many items are there in the stack if: a. 2.5 3
FULL = 1 and EMTY = 0? b. FULL = 0 and EMTY = 1? Justify your
answer.
SECTION-B

5 An instruction is stored at location 300 with its address field at location 5 1


301.The address field has the value 400.A processor register R1 contains the
number 200.Evaluate effective address if the addressing mode of the
instruction is (a) direct (b) immediate (c) relative (d)register direct (e)index
with R1 as the index register
6 Illustrate centralised bus arbitration technique 5 1

7 Explain any two of the following with suitable example: 5 3


1.Zero address instructions
2.One-address instructions
2.Two-address instructions
8 Illustrate Phase-Time Diagram, when 3 instructions with 4 stages are 5 3
executed in pipeline.

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