Combinational Logic: By: Ali Mustafa
Combinational Logic: By: Ali Mustafa
By : Ali Mustafa
Contents
• Decoder
• Encoder
• Multiplexer
Decoder
1. .
2. .
Decoder
Need to activate only one
product:
–1: activated (product released)
–0: not activated
• Only one slot can be activated at
a time.
Design a Decoder
• Design a combinational circuit with 2 inputs
(a, b) and 4 outputs (do,d1,d2,d3).
d0 = a’b’
d1 = a’b
d2 = ab’
d3 = ab
2 x 4 decoder
4- Draw the logic circuit
2 x 4 Decoder with NAND
Design a 3 inputs 8 output decoder
3 x 8 Decoder
3 x 8 Decoder
3x8
Decoder
BCD to Decimal Decoder
1.
2.
BCD to Decimal Decoder
DECIMAL W X Y Z D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
0 0 0 0 0 1
1 0 0 0 1 1
2 0 0 1 0 1
3 0 0 1 1 1
4 0 1 0 0 1
5 0 1 0 1 1
6 0 1 1 0 1
7 0 1 1 1 1
8 1 0 0 0 1
9 1 0 0 1 1
10 1 0 1 0 X
11 1 0 1 1 X
12 1 1 0 0 X
13 1 1 0 1 X
14 1 1 1 0 X
15 1 1 1 1 X
BCD to Decimal Decoder
BCD to Decimal Decoder
Implementing Adder using decoder
• Recall full adder equations, and let X, Y, and Z
be the inputs:
– S(X,Y,Z) = ∑ m(1,2,4,7)
– C(X,Y,Z) = ∑ m(3, 5, 6, 7).
Implementing Adder using decoder
Example
• Implement the following Boolean Function
using 3:8 decoder and external gates.
F (a,b,c) = m(2,4,5,7)
m0
a F
b 3:8
DECODER
c
m7
Class Task
• Implement the following Boolean Function
using 3:8 decoder and external gates.
–F (a,b,c) = m(1,5,6)
–F (a,b,c) = m(1,7) + (2,4)
Decoder with Enable Input
1. .
2. .
3.
Decoder with Enable Input
Fig: 2 x 4 Decoder
D0
A
D1
2:4
Decoder D2
B
D3
ENABLE
3:8 decoder using two 2:4 decoders
4:16 Decoder using 3:8
Decoder: Demultiplexer
1. .
2. .
3. .
Decoder: Demultiplexer
Encoder
• An encoder is a digital circuit that performs the
inverse operation of a decoder.
• An encoder has 2^n input lines and n output
lines.
• Output lines generate the binary equivalent of
the input line whose value is 1.
8:3 Encoder
8:3 Encoder
Priority Encoders
• Reading Task