P20veTio1 DIGITAL SYSTEM DESIGNUSING VHDL = $s) 6 SMS 3 45 Course Objectives + To expose the students in the fundamentals of combinational and sequential circuits + To study the concepts of VHDL for digital circuits + To implement combinational circuits using VHOL + To understand concept of Programmable Devices, PLA, PAL, and memories * To simulate combinational and sequential circuits using HOL Course Outcomes After completion of the course, the students will be abte to CO1-Design combinational and sequential logic circuits.{K3) Go2- Describe and write VHDL coding for combinational and sequential circuit (K3) 603 - Design the network for performing arithmetic operations. (K3) COA. Design and implement digital system design using PLD and memories. (K3) COS. Simulate Combinational and sequential ceuits using VHOL.(Ks) UNIT -1 DIGITAL SYSTEMS OVERVIEW (9 Hrs) Review of combinational circuits: Adder, subtractor, code converter, decoder, encoder, Multiplexer, demultiplexer. Review of sequential circuits: Flip-fops, shift registers, synchronous counter, ripple counter, mod counter, ring counter, Johnson counter, non sequential counters, UNIT -II HARDWARE DESCRIPTION LANGUAGE. (9 Hrs) ‘VHDL Description of Combinational Networks. Modelling Flip-flops using VHDL Processes. VHDL Models for ‘a Multiplexer, Compilation and Simulation of VHDL Code, Modelling a Sequential Machine, Variables, Signals, and Constants, Arrays VHDL Operators, VHDL Functions, VHDL Procedures, Packages and Libraries. UNIT -IIl DESIGN OF NETWORKS FOR ARITHMETIC OPERATIONS. (9 Hrs) Design of Parallel adder/subtractor with accumulator, serial adder with accumulator, design of binary multiplier and binary divider, signed multiplier using VHDL, UNIT -IV DESIGNING WITH PROGRAMMABLE LOGIC DEVICES (9 Hrs) Read Only Memories, Programmable Array Logic PALs, Programmable Logic Arrays PLAs — PLA ‘minimization and PLA folding, Other Sequential PLDs, Design of combinational circuits using PLD's, UNIT -V INSTRUCTIONAL ACTIVITY (9 Hrs) ‘Simulation of logic gates, adder, subtractor, decoder, multiplexer, flip flops, counters using VHOL. Text Books 1. dr Charles H.Roth, “Fundamentals of Digital Design *, PWS Pub Co, 7th Edition, 2014, 2. Charles H. Roth, “Digital System Design using VHDL", Thomson Learning, 3rd Edition, 2007. 3, Peter Ashenden, “Digital Design using VHDL, Elsevier, 2007. Reference Books ‘Na Vikraman, "Advanced Digital System Design Using VHDL", Atlantic Publisher, 2020. Peter Ashenden, “Digital Design using Verilog’, Elsevier, 2007, Clive Maxfield, ‘The Design Warriors’s Guide to FPGAs", Elsevier, 2004 John F-Wakerly, "Digital Design Principles and Practices", Prentice Hall, 4th Edition, 2001 M.S. Smith, “Application Specific Integrated Circuits", Pearson, 2000. Web References http:/iwww2.cs.uidaho edu/~krings/CS449 http:/www.cs.colostate.edur~malaiya/530/08/ Intro. pat http:/iwww ida liu, se/~TDDB47/lectures/tddb47-dependabilty-2x3.pdt https://www tutorialspoint. comvvisi_design/visi_design_vhdl_introduction.htm http:/www.eng.auurn.edul~strouce/elec4200 himCOsIPOsiPSOs Mapping cos Program Outcomes (POs) Progam | pot | poz | Pos | pos | Pos | pos | Pso1 | Pso2 | PSO3 1 2 * 3 2 - 1 3 3 - 2 | 2 : 3 2 - 1 3 3 : 3 [2 7 3 2 : i 3 3 : 4 [2 - [3 2 = 1 3 3 = 5 | 2 2 3 2 2 1 3 3 5 Correlation Level: 4-Low, 2-Medium, 3- High