Computer Architecture &

Organization
Prepared by:
Yowhannes K.
August 21, 2021

1
Introduction
• This course is about the structure and function of computers. Its purpose is to present, as
clearly and completely as possible, the nature and characteristics of modern-day
computers.
• This course is challenging one for two reasons:
1. First, there is a tremendous variety of products, from single-chip microcomputers
costing a few dollars to supercomputers costing tens of millions of dollars, that can
highly claim the name computer. Variety is not exhibited not only in cost, but also in
size, performance, and application.
2. Second, the rapid pace of change that has always characterized computer technology
continues with no letup. These changes cover all aspects of computer technology,
from the underlying integrated circuit technology used to construct computer
components to the increasing use of parallel organization concepts in combing those
components.
• So, the course cover thorough discussion of the fundamentals of computer organization
and architecture and to relate these to contemporary computer design issues.

2
Organization and architecture
• Computer Architecture is concerned with the structure and behavior of
the various functional modules of the computer. It includes the
information formats or the number of bits used to represent various data
types, the instruction set, techniques for addressing memory, and I/O
mechanisms.
• Whereas, Computer organization is concerned with the way the hardware
components are connected together to form a computer system. It refers
to the operational units and their interconnections that realize the
architectural specifications.
• Organizational attributes include those hardware details transparent to the
programmer, such as control signals, interface between the computer and
peripherals, and the memory technology used.

3
Cont.
• As an example, it is an architectural design issue whether a computer
will have a multiply instruction. It is an organizational issue whether
that instruction will be implemented by a special multiply unit or by
a mechanism that makes repeated use of the add unit of the system.
• The organization decision may be based on the anticipated
frequency of use of the multiply instruction, the relative speed of
the two approaches, and the cost and physical size of a special
multiply unit.

4
Structure and function of computer
• A computer is a complex system; contemporary computers contain
millions of elementary electronic components. How, then, can one
clearly describe them? The Key is to recognize the hierarchical nature
of most complex systems, including the computer.
• A hierarchical system is a set of interrelated subsystems, each of the
subsystems in turn, hierarchical in structure until we reach some
lowest level of elementary subsystems.
• The hierarchical nature of complex systems is essential to both their
design and their description. At each level, the system consists of a
set of components and their interrelationships

5
Cont.
• At each level, the designer is concerned with structure and function:
• Structure – The way in which the components are interrelated.
• Function – The operation of each individual component as part of the structure.
• In terms of description, we have two choices: starting at the bottom and
building up to a complete description, or beginning with a top view and
decomposing the system into its subparts. Evidence from a number of
fields suggests that the top-down approach is the clearest and most
effective.
• The approach taken in this book follows from this viewpoint. The computer
system will be described from the top down. We begin with the major
components of a computer, describing their structure and function, and
proceed to successively lower layers of the hierarchy.

6
Function
• Figure depicts the basic functions that a
computer can perform. In general terms,
there are only four:
• Data Processing: The computer, of course, must be
able to process data.
• Data Storage: Data on processing must be saved
somewhere in the system.
• Data movement: The computer must be able to move
data between itself and outside world, i.e., I/O, Data
communication.
• Control: There must be control of the three
operations. A control unit manages the computer’s
resources, i.e., time, memory, etc.

7
Structure
• Figure below shows simplest possible structure of a
computer. The computer interacts in some fashion with
its external environment. In general, all of its linkages to
the external environment can be classified as peripheral
devices or communication lines.
• There are four main internal structural components of
computer system:
1. Central Processing Unit (CPU):Controls the operation of the
computer and performs its data processing functions; often
simply referred to as Processor.
2. Main Memory: Stores data.
3. I/O: Moves data between the computer and its external
environment.
4. System Interconnection: Some mechanism that provides
for communication among CPU, main memory, and I/O.

8
Cont.
• The most interesting and complex part of computer,
CPU, have following major components:
1. Arithmetic & Logic Unit (ALU): Performs the computer’s
data processing functions.
2. Control unit: Controls the operation of the CPU and hence the
computer.
3. Registers: Provides storage internal to the CPU.
4. CPU interconnection: Some mechanism that provides for
communication among the control unit, ALU, and registers.
• Computer basic components will be covered in the
rest of the chapters.

9
History of computer
1. The First Generation: Vacuum Tubes
• ENIAC The ENIAC (Electronic Numerical Integrator And Computer),
designed and constructed at the University of Pennsylvania, was the
world’s first general purpose electronic digital computer. The project
was a response to U.S. needs during World War II.
• The machine was enormous, weighing 30 tons, occupying 1500
square feet of floor space, and containing more than 18,000 vacuum
tubes. When operating, it consumed 140 kilowatts of power. It was
also substantially faster than any electromechanical computer,
capable of 5000 additions per second.

10
Cont.
2. The Second Generation: Transistors
• The first major change in the electronic computer came with the
replacement of the vacuum tube by the transistor. The transistor is
smaller, cheaper, and dissipates less heat than a vacuum tube but can be
used in the same way as a vacuum tube to construct computers.
• Unlike tubes, which requires wires, metal plates, a glass capsule, and a
vacuum, the transistor is a solid-state device, made from silicon.
• The use of the transistor defines the second generation of computers. It
has become widely accepted to classify computers into generations based
on the fundamental hardware technology employed.
• Each new generation is characterized by greater processing performance,
larger memory capacity, and smaller size that the previous one.

11
Cont.
3. The Third Generation: Integrated Circuits (ICs)
• The third generation was a transformation of Transistors to ICs. A
single IC has many transistors, resistors, and capacitors along with
the associated circuitry.
• The IC was invented by Jack Kilby. This development made computers
smaller in size, reliable, and effiecient.

12
Performance Assessment
• In evaluating processor hardware and setting requirements for new systems,
performance is one of the key parameters to consider, along with cost, size, security,
reliability, and, in some cases power consumption.
• It is difficult to make meaningful performance comparisons among different processors,
even among processors in the same family. Raw speed is far less important than how a
processor performs when executing a given application. Unfortunately, application
performance depends not just on the raw speed of the processor, but on the instruction
set, choice of implementation language, efficiency of the compiler, and skill of the
programming done to implement the application.
• Even though there is no precise estimation of processor performance, a common
measure of performance is the rate at which instructions are executed, expressed as
millions of instructions per second (MIPS), referred to as the MIPS rate. We can express
the MIPS rate in terms of the clock rate and CPI (Cycles Per Instruction) as follows:
𝑓
MIPS rate =
𝐶𝑃𝐼 𝑋106

13
Ch. 2- The Central Processing Unit
The Arithmetic and Logic Unit
• The ALU is that part of the computer that actually performs arithmetic and logical
operations on data. All of the other elements of the computer system—control
unit, registers, memory, I/O—are there mainly to bring data into the ALU for it to
process and then to take the results back out. Figure indicates how the ALU is
interconnected with the rest of the processor. Data are presented to the ALU in
registers, and the results of an operation are stored in registers. These registers
are temporary storage locations within the processor that are connected by signal
paths to the ALU.
• The ALU may also set flags as the result
of an operation like Overflow in
operation. . The control unit provides
signals that control the operation of the
ALU and the movement of the data into
and out of the ALU.
14
INTEGER REPRESENTATION
• In the binary number system,1 arbitrary numbers can be represented with just the digits zero and
one, the minus sign, and the period, or radix point.
• For purposes of computer storage and processing, however, we do not have the benefit of minus
signs and periods. Only binary digits (0 and 1) may be used to represent numbers. If we are
limited to nonnegative integers, the representation is straightforward.
• An 8-bit word can represent the numbers from 0 to 255, including
00000000 = 0
00000001 = 1
…
11111111 = 255
• In general, if an n-bit sequence of binary digits is interpreted as an unsigned integer A, its value is
A = σ𝑛−1 𝑖
𝑖=0 2 𝑎𝑖
•

15
Sign-Magnitude Representation
• There are several alternative conventions used to represent negative as well as positive integers, all of which
involve treating the most significant (leftmost) bit in the word as a sign bit. If the sign bit is 0, the number is
positive; if the sign bit is 1, the number is negative.
• The simplest form of representation that employs a sign bit is the sign-magnitude representation. In an n-bit
word, the rightmost bits hold the magnitude of the integer.
+ 18 = 00010010
- 18 = 10010010 (sign Magnitude)
• The general case can be expressed as follows:
σ𝑛−2 𝑖
𝑖=0 2 𝑎𝑖 𝑖𝑓 𝑎𝑛−1 = 0
Sign Magnitude 𝐴 = ൝
− σ𝑛−2 𝑖
𝑖=0 2 𝑎𝑖 𝑖𝑓 𝑎𝑛−1 = 1
• There are several drawbacks to sign-magnitude representation. One is that addition and subtraction require
a consideration of both the signs of the numbers and their relative magnitudes to carry out the required
operation. Another drawback is that there are two representations of 0:
+0 = 00000000
-0 = 10000000 (sign magnitude)

16
Cont.
• This is inconvenient because it is slightly more difficult to test for 0
(an operation performed frequently on computers) than if there were
a single representation. Because of these drawbacks, sign-magnitude
representation is rarely used in implementing the integer portion of
the ALU. Instead, the most common scheme is twos complement
representation.
•

17
Twos Complement Representation
• Like sign magnitude, twos complement representation uses the most
significant bit as a sign bit, making it easy to test whether an integer is
positive or negative. It differs from the use of the sign-magnitude
representation in the way that the other bits are interpreted.

18
Cont.
• Consider an n-bit integer, A, in twos complement representation. If A is positive, then the sign bit,
is zero. The remaining bits represent the magnitude of the number in the same fashion as for sign
magnitude:
𝐴 = σ𝑛−2 𝑖
𝑖=0 2 𝑎𝑖 𝑓𝑜𝑟 𝐴 ≥ 0
• The number zero is identified as positive and therefore has a 0 sign bit and a magnitude of all 0s.
We can see that the range of positive integers that may be represented is from 0 (all of the
magnitude bits are 0) through (all of the magnitude bits are 1). Any larger number would require
more bits.
• Now, for a negative number the sign bit, is one. The remaining bits can take on any 𝑛−1
one of values.
Therefore, the range of negative integers that can be represented is from −1 𝑡𝑜 − 2 − 1.
• This is the convention used in twos complement representation, yielding the following expression
for negative numbers:
Twos Complement 𝐴 = −2𝑛−1 𝑎𝑛−1 + σ𝑛−2 𝑖
𝑖=0 2 𝑎𝑖
• How to calculate
𝒏
Twos Complement: The twos complement of an n-digit number N in base 2 is
defined as 𝒓 − 𝑵 𝑓𝑜𝑟 𝑵 ≠ 𝟎 and 0 for 𝑵 = 𝟎.

19
Cont.

20
INTEGER ARITHMETIC
• Let us see arithmetic functions on numbers in twos complement
representation.
Negation
• In twos complement notation, the negation of an integer can be
formed with the following rules:
1. Take the Boolean complement of each bit of the integer (including the sign bit). That
is, set each 1 to 0 and each 0 to 1.
2. Treating the result as an unsigned binary integer, add 1.
• This two-step process is referred to as the twos complement
operation, or the taking of the twos complement of an integer.

21
Cont.
Example:
+18 = 00010010 (twos complement)
Bitwise complement = 11101101
+ 1
11101110 = -18
• As expected, the negative of the negative of that number is itself:
-18 = 11101110 (twos complement)
Bitwise complement = 00010001
+ 1
00010010 = +18

22
Addition and Subtraction
• Addition proceeds as if the two numbers were unsigned integers. The first
four examples illustrate successful operations. If the result of the operation
is positive, we get a positive number in twos complement form, which is
the same as in unsigned-integer form. If the result of the operation is
negative, we get a negative number in twos complement form. Note that,
in some instances, there is a carry bit beyond the end of the word
(indicated by shading), which is ignored.
• On any addition, the result may be larger than can be held in the word size
being used. This condition is called overflow. When overflow occurs, the
ALU must signal this fact so that no attempt is made to use the result. To
detect overflow, the following rule is observed:
OVERFLOW RULE: If two numbers are added, and they are both positive or
both negative, then overflow occurs if and only if the result has the opposite sign.

23
Cont.
• e and f show examples of
overflow. Note that overflow can
occur whether or not there is a
carry.

24
Cont.
• Subtraction is easily handled with the
following rule:
SUBTRACTION RULE: To subtract one number
(subtrahend) from another (minuend), take the
twos complement (negation) of the
subtrahend and add it to the minuend.
• Thus, subtraction is achieved using
addition. The last two examples
demonstrate that the overflow rule still
applies.
• Read about Multiplication & Division of
twos complement numbers.
25
Group Project
• Write a Java/C++/C/Python or whatever you love
programming with program that Read an Assembly
program saved in .txt file format. Your program only
works for only one arithmetic operation (+,-,*,/ or %).
Cheating or having the same program is strictly result
in 0 marks.
• Due data for submission of project is September 5,2021.

26
Ch. 3: Register Transfer and Micro-
operations
• Digital system design invariably uses a modular approach. The modules are
constructed from such digital components as registers, decoders, arithmetic
elements, and control logic. The various modules are interconnected with
common data and control paths to form a digital computer system. Digital
modules are best defined by the registers they contain and the operations that
are performed on the data stored in them. The operations executed on data
stored in registers are called Micro-operations. A Micro-operation is an
elementary operation performed on the information stored in one or more
registers.
• The internal hardware organization of a digital computer is best defined by
specifying:
1. The set of registers it contains and their function
2. The sequence of Micro-operations performed on the binary information stored in the
registers
3. The control that initiates the sequence of Micro-operations

27
Cont.
• It is possible to specify the sequence of micro-operations in a computer by
explaining every operation in words, but this procedure usually involves a lengthy
descriptive explanation. It is more convenient to adopt a suitable symbology to
describe the sequence of transfers between registers and the various arithmetic
and logic micro-operations associated with the transfers. The use of symbols
instead of a narrative explanation provides an organized and concise manner for
listing the micro-operation sequences in registers and the control functions that
initiate them. The symbolic notation used to describe the micro-operation
transfer among registers is called a register transfer language. The term “register
transfer” implies the availability of hardware logic circuits that can perform a
stated micro-operation and transfer the result of the operation to the same or
another register. A programming language is a procedure for writing symbols to
specify a given a computational process. Similarly, a register transfer language is a
system for expressing in symbolic form the micro-operation sequences among the
registers of a digital module.

28
Register Transfer
• Computer registers are designated by capital letters to denote the function of the
register. For example, the register that holds an address for the memory unit is usually
called a memory address register and is designated by the name MAR. Other
designations for registers are PC (for Program counter), IR (Instruction Register) and R1
(for processor register).
• Information transfer from one register to another is designed in symbolic form by means
of a replacement operator. The statement
R2  R1
• denotes a transfer of the content of register
R1 into register R2. A statement that
specifies a register transfer implies that
circuits are available from the outputs of
the source register to the inputs of the
destination register and that the
destination register has a parallel load
capability. Below figure shows the basic
symbols for Register Transfer:
29
Bus and Memory Transfer
• A typical digital computer has many registers, and
paths must be provided to transfer information
from one register to another. The number of
wires will be excessive if separate lines are used
between each register and all other registers in
the system. A more efficient scheme for
transferring information between registers in a
multiple-register configuration is a common bus
system. A bus structure consists of a set of
common lines, one for each bit of a register,
through which binary information is transferred
one at a time. Control signals determine which
register is selected by the bus during each
particular register transfer. One way of
constructing a common bus system is with
multiplexers. The multiplexers select the source
register whose binary information is then placed
on the bus. Below figure shows bus system for
four registers of size 4-bit:
30
Cont.
• The selection lines S1 and S0 choose the four bits of one register and
transfer them into the four-line common bus. In general, a bus system
will multiplex k registers of n bits each to produce an n-line common
bus. The number of multiplexers needed to construct the bus is equal
to n, the number of bits in each register.

31
Three-state Bus Buffers
• A bus system can be constructed with three-state gates instead of
multiplexers. A three-state gate is a digital circuit that exhibits three
states. Two of the states are signals equivalent to logic 1 and 0. The
third state is a high-impedance state. The high-impedance behaves
like an open circuit which means that the output is disconnected and
does not have logic significance. The control input determines the
output state. The graphic symbol of a three-state buffer gate is shown
below.

32
Cont.
• The construction of a bus system with three-state
buffers is demonstrated in below figure.
• To construct a common bus for four registers of n
bits each using three-state buffers, we need n
circuits with four buffers in each as shown above
figure. Each group of four buffers receives one
significant bit from the four registers. Each common
output produces one of the lines for the common
bus for total of n lines. Only one decoder is
necessary to select between the four registers.
• Word in memory is a group of bits that move in or
out of the memo as a unit. A memo word will be
symbolized by the letter M. The particular memo
word among the many available is selected by the
memo address during the transfer. It is necessary to
specify the address of M when writing memo
transfer operations.
33
Arithmetic Circuit
• Arithmetic circuit is a combinational circuit
that carries out below operations. The basic
component of an arithmetic circuit is the
parallel adder. Below figure shows 4-bit
arithmetic circuit.

34
Logic Micro-operations
• Logic micro-operations specify binary
operations for strings of bits stored in
registers. These operations consider
each bit of the register separately and
treat them as binary variables.
• There are 16 different logic operations
that can be performed with two binary
variables as shown below.

35
Hardware Implementation
• The hardware implementation of logic micro-operations requires that logic
gates be inserted for each bit or pair of bits in the registers to perform the
required logic function. Although there are 16 logic micro-operations, most
computers use only four – AND, OR, XOR and complement from which all
other can be derived. Below figure shows one stage of a circuit that
generates the four basic logic micro-operations.

36
Ch. 4 - Basic Computer Organization and
Design
Instruction Code
• The organization of the computer is defined by its internal registers, the timing
and control structure, and the set of instructions that it uses. The internal
organization of a digital system is defined by the sequence of micro-operations it
performs on data stored in its registers. A digital computer is capable of executing
various micro-operations and, in addition, can be instructed as to what specific
sequence of operations it must perform. The user of a computer can control the
process by means of a program. A program is a set of instructions that specify the
operations, operands, and the sequence by which processing has to occur. A
computer instruction is a binary code that specifies a sequence of micro-
operations for the computer. Instruction codes together with data are stored in
memory. The computer reads each instruction from memo and places it in a
control register. The control then interprets the binary code of the instruction and
proceeds to execute it by issuing a sequence of micro-operations. Every computer
has its own instruction set.

37
Cont.
• An instruction code is a group of bits that instruct the computer to perform
a specific operation. It is usually divided into parts. The most basic part of
an instruction code is its operation part which specifies the type of
operation. The number of bits required for the operation code of an
instruction depends on the total number of operations available in the
computer. The operation code consist of at least n bits for a given 2n (or
less) distinct operations. The operations must be performed on some data
stored in processor registers or in memo. An instruction code must
therefore specify not only the operation but also the registers or the memo
words where the operands are to be found, as well as the register or memo
word where the result is to be stored. Instruction code formats are
conceived by computer designers who specify the architecture of the
computer.

38
Stored Program Organization
• The simplest way to organize a computer
is to have one processor register
(Accumulator Register) and an instruction
format with two parts. The first part
specifies the operation to be performed
and the second specifies an address. In
this type of organization instructions are
stored in one section of memo and data in
another as shown in below figure. It is
sometimes convenient to use the address
bits of an instruction code not as an
address but as the actual operand. When
the second part of an instruction code
specifies an operand, the instruction is
said to have an immediate operand.

39
Cont.
• When the second part specifies the address of an operand, the
instruction is said to have a direct address. And when the second part
specifies an address of a memo word in which the address of the
operand is found, the instruction is said to have indirect address.

40
Computer Registers
• The basic computer has eight registers. The names and function of
these registers is shown below.

41
Common Bus System
• A computer consist set of registers and a memory unit. So, paths must
be provided to transfer information from one register to another and
between memory and registers. The connection of the registers and
memo of the basic computer to a common bus is shown in below
figure. The accumulator register accept data from DR, AC and INPR
register only. The input register only transfers data from i/p devices to
AC register. The common bus receives information from six registers
and the memory unit. The bus lines are connected to six registers and
the memo unit.

42
Cont.
• The 16 inputs of Ac come from
an Adder and Logic circuit. This
circuit is used to implement
register micro-operations such as
complement AC and shift AC.

43
Computer Instructions
• The basic computer has three instruction formats, Memo – Reference
instruction, Register – Reference instruction and Input – Output
instruction. Each format has 16 bits. The operation code (opcode)
part of the instruction contains three bits and the meaning of the
remaining 13 bits depends on the opcode encountered.

44
Cont.
• The type of instruction is recognized
by the computer control from the
four bits in positions 12 through 15
of the instruction. Only three bits of
the instruction are used for the
operation code. The register –
reference and input – output
instructions use the remaining 12
bits as part of the operation code,
thus the total number of
instructions for the basic computer
is 25.
45
Instruction Set Completeness
• A computer should have a set of instructions so that the user can construct
machine language programs to evaluate any function that is known to be
computable. The set of instruction are said to be complete if the computer
includes a sufficient number of instructions in each of the following categories:
1. Arithmetic, logical and shift instructions
2. Instructions for moving information to and from memo and processor registers
3. Program control instructions together with instructions that check status conditions
4. Input and output instructions
• Although the set of instructions for the basic computer is complete, it is not
efficient because frequently used operations are not performed rapidly. An
efficient set of instructions will include such instructions as subtract, multiply, OR,
and exclusive-OR. These operations must be programmed in the basic computer.

46
Timing and Control
• The timing for all registers in the basic computer is controlled by a
master clock generator. The clock pulses are applied to all flip-flops
and registers in the system, including the flip-flops and registers in the
control unit. The control signals are generated in the control unit and
provide control inputs for the multiplexers in the common bus,
control inputs in processor registers, and micro-operations for the
accumulator. There are two major types of control organization:
hardwired control and microprogrammed control. In the hardwired
organization, the control logic is implemented with gates, flip-flops,
decoders, and other digital circuits. In microprogrammed organization
the control information is stored in a control memory.
47
Instruction Cycle
• A program consists of a sequence of instruction. The program is
executed in the computer by going through a cycle for each
instruction. Each instruction cycle in turn is subdivided into a
sequence of sub-cycles or phases. In the basic computer each
instruction cycle consists of the following phases:
1. Fetch an instruction from memo
2. Decode the instruction
3. Execute the instruction

48
Fetch and Decode
• Initially, the program counter PC is loaded with the address of the first
instruction in the program. Then using the address available in program
counter PC read the instruction stored in memo and store it in Instruction
register IR. Then decode the opcode to determine the type of operation
required to perform. Then update PC to the next instruction to be
executed. The micro-operations for the fetch and decode phases can be
specified by the following register transfer statements:
Fetch AR  PC
IR  M [AR], PC  PC + 1
Decode D0,....D7  Decode IR(12-14), AR  IR(0 -11), I  IR(15)
• The Below figure shows the instruction cycle and how the control
determines the instruction type after the decoding for basic computer.
49
Cont.

50
Register-Reference Instructions
• Register-reference instructions are recognized by the control
when D7=1 and I=0. These instructions use bits 0 through 11 of
the instruction code to specify one of 12 instructions. Below table
shows a list of register-reference instructions.

51
Memory-Reference Instructions
• Effective address is the address of the actual operand. It is stored in address
register AR. The symbolic description of each instruction is specified in the table
below in terms of register transfer notation. The actual execution of the
instruction will require a sequence of micro-operations. This is because data
stored in memory can’t be processed directly. The data must be read from
memory to a register where they can be operated on with logic circuits.

52
Cont.
AND to AC
• This instruction performs the AND logic operation on pairs of bits in AC and the
memory word specified by the effective address. The result of the operation is
transferred to AC. The micro-operation that execute this instruction are:
DR  M [AR]
AC  AC DR
ADD to AC
• Adds the content of the memory word specified by the effective address to the
value of AC. The sum is transferred into AC and the output carry Cout is
transferred to the E (extended accumulator) flip-flop. The micro-operations
needed to execute this instruction are:
DR  M [AR]
AC  AC + DR, E Cout
53
Cont.
LDA: Load to AC
• Transfers the memory word specified by the effective address to AC. The micro-
operations needed to execute this instruction are
DR  M [AR]
AC  DR
• The adder and logic circuit receive information from DR which can be transferred into.
Therefore, it is necessary to read the memory word into DR first and then transfer the
content of DR into AC. The reason for not connecting the bus to the inputs of AC is the
delay encountered in the adder and logic circuit.
STA: Store AC
• Stores the content of AC into the memory word specified by the effective address. Since
the output of the AC is applied to the bus and the data input of memory is connected to
the bus, we can execute this instruction with one micro-operation:
M [AR}  AC

54
Cont.
BUN: Branch Unconditionally
• Transfers the program to the instruction specified by the effective address. Remember that PC
holds the address of the instruction to be read from memory in the next instruction cycle. The
BUN instruction allows the programmer to specify an instruction out of sequence and we say that
the program branches (or jumps) unconditionally. The instruction is executed with one micro-
operation:
PCAR
• BSA: Branch and Save Return Address
• Useful for branching to a portion of the program called subroutine or procedure. When executed,
the BSA instruction stores the address of the next instruction in sequence (which is available in
PC) into a memory location specified by the effective address. The effective address plus one is
then transferred to PC to serve as the address of the first instruction in the subroutine. This
operation is carried out with the following register transfer:
M [AR]  PC, ARAR+1
PC  AR

55
Cont.
• Let’s see how we use this instruction: The BSA is assumed to be in memory at
address 20 as shown in below figure. The I bit is 0 and the address part of the
instruction has the binary equivalent of 135. After the fetch and decode phases,
PC contains 21 which is the address of the next instruction in the program
(referred to as the return address) and AR holds the effective address 135 i.e.
M[135] 21, PC 135+1=13

56
Cont.
• The return to the original program is accomplished by means of an
indirect BUN instruction placed at the end of the subroutine. The BSA
instruction performs the function usually referred to as a subroutine
call. The indirect BUN instruction at the end of the subroutine
performs the function referred to as a subroutine return. In most
computers, the return address is stored in either a processor register
or in a portion of memory called a stack.
•

57
Cont.
ISZ: Increment and Skip if Zero
• Increments the word specified by the effective address, and if the
incremented value is equal to 0, PC is incremented by 1. Since it is not
possible to increment a word inside the memory, it is necessary to
read the word into DR, increment DR, and store the word back into
memory. This is done by the following sequence of microoperations:
DR  M [AR]
DR  DR +1
M[AR]  DR, if (DR=0) then (PC  PC + 1)

58
Input-Output and Interrupt
Input-Output Configuration
• The input and output configuration with
digital computer is as shown below. An
intermediate material is used to
interface the two devices. The terminal
sends and receives serial information.
Each quantity of information has eight
bits of an alphanumeric code. The two
registers (OUTR & INPR) communicate
with a communication interface serially
and with AC in parallel.

59
Cont.
• The 1-bit input flag FGI is a control flip-flop. The flag bit is set to 1 when
information is available in the input device and is cleared to 0 when the
information is accepted by the computer. Similarly, the FGO is 1-bit control flip-
flop. Initially, the output flag FGO is set 1. The computer checks the flag bit; if it is
1, the information from AC is transferred in parallel to OUTR and FGO is cleared
to 0.
Input-Output Instructions
• These instructions are needed for transferring information to and from AC
register, for checking the flag bits, and for controlling the interrupt facility. The 6
i/o instructions are:

60
Cont.
• Interrupt cycle is the time given for handling input and output
communications. Demonstration of interrupt cycle is shown below.
Here we choose the memory location at address 0 as the place for
storing the return address. Control then inserts address 1 into PC and
clears IEN and interrupt flip-flop so that no more interruptions can
occur until the interrupt request from the flag has been serviced.
• Suppose that an interrupt occurs and flip-flop is set to 1 while the
control is executing the instruction at address 255. At this time, the
return address 256 is in pc. The programmer has previously placed an
input-output service program in memory starting from address 1120
and a BUN 1120 instruction at address 1.

61
Cont.
• When the control finds the flip-flop is set to 1, it proceeds with interrupt
cycle. The content of PC (256) is stored in memory location 0, PC is set to 1,
and flip-flop is cleared to 0. The next instruction to execute is the
instruction read from memory in address 1 since this is the content of PC.
The branch instruction at address 1 causes the program to transfer to the
input-output service program at address 1120.
• The instruction that returns the computer to the original place in the main
program is a branch indirect instruction with an address part of 0. This
instruction is placed at the end of the I/O service program. After this
instruction is read from memory during the fetch phase, control goes to
the indirect phase (because I=1) to read the effective address. The effective
address is in location 0 and is the return address that was stored there
during the previous interrupt cycle. The execution of the indirect BUN
instruction results in placing into PC the return address from location 0.

62
Cont.

63
Design of Basic Computer
• The basic computer consists of the following hardware components:
1. A memory unit with 4096 words of 16 bits each
2. Nine registers: AR, PC, DR, AC, TR, OUTR, INPR, and SC
3. Seven flip-flops: I, S, E, R, IEN, FGI and FGO
4. Two decoders: a 3X8 operation decoder and a 4X16 timing decoder
5. A 16-bit common bus
6. Control logic gates
7. Adder and logic circuit connected to the input of AC

64
Ch. 5 - Programming the basic Computer
Introduction
• Writing a program for a computer consists of specifying, directly or
indirectly, a sequence of machine instructions. Machine instructions
inside the computer form a binary pattern which is difficult, if not
impossible, for people to work with and understand. It is preferable to
write programs with the more familiar symbols of the alphanumeric
character set. As a consequence, there is a need for translating user-
oriented symbolic programs into binary programs recognized by the
hardware.

65
Machine Language
• A program is a list of instructions or statements for directing the computer to
perform a required data processing task. A program written in any other language
must be translated to the binary representation of instructions before they can
be executed by the computer. Programs written for a computer may be in one of
the following categories:
1. Binary code.
2. Octal or hexadecimal
3. Symbolic code: the user employs symbols (letters, numerals, or special characters) for the
operation part, the address part, and other parts of the instruction code. Each symbolic
instruction can be translated into one binary coded instruction. This translation is done by
a special program called an assembler. Because an assembler translates the symbols, this
type of symbolic program is referred to as an assembly language program.
4. High-level programing languages: compiler translates high-level language program to
binary code equivalent.
• Below tables show program in different levels:

66
Cont.

• Above program is an assembly language. We can go one step

further and replace each hexadecimal address by a symbolic
address and each hexadecimal operand by a decimal operand.

67
Cont.
• The symbol ORG specifies an origin, that is, the memory location of
the next instruction below it. The last line has the symbol END
indicating the end of the program. The symbols ORG, DEC, and END
are called pseudo-instructions.

68
Assembly Language
• Any programming language has its own rules. The specific language is defined by
a set of rules that specify the symbols that can be used and how they may be
combined to form a line of code. The rule of an assembly language for writing
symbolic programs for the basic computer is as seen below.
Rules of the Language
• Each line of an assembly language program is arranged in three columns called
field. The fields specify the following information.
1. The label field may be empty or it may specify a symbolic address.
2. The instruction field specifies a machine instruction or a pseudo-instruction
3. The comment field may/not include a comment
• Symbolic address consists up to three alphanumeric characters. The first
character must be a letter; the next two may be letters or numerals. A symbolic
address in the label field is terminated by a comma so that it will be recognized as
a label by the assembler.

69
Cont.
• The instruction field in an assembly language program may specify one of
the following items:
• A memory-reference instruction (MRI)
• A register-reference or input-output instruction (non-MRI)
• A pseudo-instruction with or without an operand
• A memo-reference instruction occupies two or three symbols separated by
spaces. The first must be a three-letter symbol defining an MRI operation
code. The second is a symbolic address. The third symbol, which may or
may not be present, is the letter I. If I is missing, the line denotes a direct
address instruction. The presence of I denotes an indirect address
instruction. A non-MRI is defined as an instruction that does not have an
address part. A non-MRI is recognized in the instruction field of a program
by any one of the three-letter symbols.

70
Cont.
• Symbolic address in the instruction field specifies the memory location of
an operand. This location must be defined somewhere in the program by
appearing again as a label in the first column. A pseudo-instruction is not a
machine instruction but rather an instruction to the assembler giving
information about some phase of the translation. The ORG pseudo-
instruction informs the assembler that the instruction or operand in the
following line is to be placed in a memory location specified by the number
next to ORG. The END symbol is placed at the end of the program to inform
the assembler that the program is terminated. DEC and HEX specify the
radix of the operand and tell the assembler how to convert the listed
number to a binary number. The third field is reserved for comments. It is
preceded by slash for the assembler to recognize the beginning of the
comment field.

71
Cont.
• An Example: a program for subtraction

72
Cont.
• Example 2: Write a program that checks weather the value in address
140 is zero. If it is not, complement AC.

73
Translation to Binary
• The translation of the symbolic program into binary is done by a special
program called an assembler. For above program the binary equivalent
code is:
• The translation process can be simplified if we can scan the entire symbolic
program twice. No translation is done during the first scan. We merely
assign a memory location to each machine instruction and operand. The
location assignment will define the address value of labels and facilitate the
translation process during the second scan.
• Thus in below table, we assign location 100 to the first instruction after
ORG. we then assign sequential locations for each line of code that has a
machine instruction or operand up to the end of the program. When the
first scan is completed, we associate with each label its location number
and form a table that defines the hexadecimal value of each symbolic
address. For the above program, the address symbol table is as follows:
74
Cont.

75
Cont.
• During the second scan of the symbolic program we refer to the
address symbol table to determine the address value of a memo
reference instruction. For example, the line of code LDA SUB is
translated during the second scan by getting the hexadecimal value of
LDA and the hexadecimal value of SUB from the address-symbol table
shown above.
• The first scan is called first pass, and the second is called the second
pass.

76
First Pass
• During the first pass, it generates a
table that correlates all user defined
address symbols with their binary
equivalent value. The binary
translation is done during the second
pass. To keep track of the location of
instructions, the assembler uses a
memo word called a location counter
(LC). The content of LC stores the
value of the memo location assigned
to the instruction or operand
presently being processed.
77
Second Pass
• Machine instructions are translated during the second pass by means of table lookup
procedures. A table-lookup procedure is a search of table entries to determine whether a
specific item matches one of the items stored in the table. The assembler uses four
tables. Any symbol that is encountered in the program must be available as an entry in
one of these tables; otherwise, the symbol cannot be interpreted. The four tables are:
• Pseudo-instruction table
• MRI table
• Non-MRI table
• Address symbol table
• The first three tables are built in table for the assembler. The entries of the pseudo-
instruction table are the four symbols ORG, END, DEC, and HEX. Each entry refers the
assembler to a subroutine that processes the pseudo-instruction when encountered in
the program. The MRI table contains the seven symbols of the memo-reference
instructions and their 3-bit operation code equivalent. The Non-MRI table contains the
symbols for the 18 register and i/p-o/p instructions and their 16 bit binary code
equivalent.

78
Program Loops
• A program loop is a sequence of
instructions that are executed many
times, each time with a different set
of data.
• Example: Write an assembly
language that adds up values stored
starting address 500 and the number
of values to add is stored at address
499 and store.

79
Programming Arithmetic and Logic
operations
• In the basic computer, we only have ADD for arithmetic operation and OR,
AND & Complement for logic operations. So, other arithmetic and logic
operations are performed using only these instructions. Operations that
are implemented in a computer with one machine instruction are said to
be implemented by hardware. Operations implemented by a set of
instructions that constitute a program are said to be implemented by
software.
Multiplication program
• We can develop a program for multiplying two numbers using the ADD
arithmetic operation.
• Example: A program that multiply two values stored at address 505 and
460.
80
Cont.
• In the program, the multiplier is used as a
counter. First we store the 2’s complement
of the counter in memo. To do this we use
complement and increment instructions.
This is because ISZ uses negative numbers
as counter. Then using the ISZ instruction
we control the loop.

81
Double-Precision Addition
• A number stored in two memory word is said to have double
precision. Suppose we have two double-precision numbers. One of
the double precision numbers is placed in two consecutive memory
locations, AL and AH, with AL holding the 16 low-order bits. The other
number is placed in BL and BH. The two low-order portions are added
and the carry transferred into E. the AC is cleared and the bit in E is
circulated into the least significant position of the AC. The two high
order portions are then added to the carry and the double-precision
sum is stored in CL and CH.

82
Cont.

83
Logic Operation
• Any logic operation can be implemented using AND & complement
operations. For example, the OR operation is not available as a machine
instruction in the basic computer. From DeMorgan’s theorem we recognize
the relation X+Y= (X’Y’)’. A program that forms the OR operation:

• The other logic operations can be implemented by software in a similar

fashion.
84
Cont.

85