Forth Class Electrical Dept.

Communication II Nada Nasih

Cyclic Codes
Definition:A linear code is called a cyclic code if every cyclic shift of a
codeword is also a codeword. Thus, if , a=[an-1, an-2,……a0] is the
codeword of the cyclic code of length n, then the cyclic shift of this
codeword =[an-2, an-3,……a0, an-1] is the codeword of the same code.
Shifting all bits to the left one position yield another codeword as [an-3,
an-4,……a0, an-1, an-2].

Generation of Cyclic codes:

a. Non-Systematic cyclic codes: the output code word is generated
using polynomial multiplication.

Procedure:
1. For [D]=[a1, a2, …… ak] data word, write the data word in
terms of a power of a dummy variable and with a1 weighted
as MSB (Most Significant Bit) and ak as LSB (Least
Significant Bit).

i.e. D(X)=ak+ ak-1X+ ak-2X2+………..+a1Xk-1

where (+) is mod-2 addition EX-OR

for example if [D]=[11101] then

D(X)= 1+X2+X3+X4

If D(X)= 1+X2+X6 then

[D]=[1000101]

2. Multiplication: Multiply D(X) by what is called generator

polynomial g(X) of order r.
This g(X) is one of the factors of Xn+1.

For example, if n=7, then X7+1=(X+1)(X3+ X2+1)(X3+

X2+1)

For n=7, r=3, we can choose either g(X)= X3+ X2+1 or X3+
X+1.

3. The output code words will be C(X)=D(X)g(X) then C(X) is

used to find the output code word [C].

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Forth Class Electrical Dept.
Communication II Nada Nasih

Ex: Write down the code table for the (7,4) non systematic cyclic code
with generator polynomial g(X)= X3+ X+1.

Sol:
K=4, r=3 then D=[ a1 a2 a3 a4 ] so the code table will be:

a1 a2 a3 a4 c1 c2 c3 c4 c5 c6 c7 wi
0 0 0 0 0 0 0 0 0 0 0 ---
0 0 0 1 0 0 0 1 0 1 1 3
0 0 1 0 0 0 1 0 1 1 0 3
0 0 1 1 0 0 1 1 1 0 1 4
0 1 0 0 0 1 0 1 1 0 0 3
0 1 0 1 0 1 0 0 1 1 1 4
0 1 1 0 0 1 1 1 0 1 0 4
0 1 1 1 0 1 1 0 0 0 1 3
1 0 0 0 1 0 1 1 0 0 0 3
1 0 0 1 1 0 1 0 0 1 1 4
1 0 1 0 1 0 0 1 1 1 0 4
1 0 1 1 1 0 0 0 1 0 1 3
1 1 0 0 1 1 1 0 1 0 0 4
1 1 0 1 1 1 1 1 1 1 1 7
1 1 1 0 1 1 0 0 0 1 0 3
1 1 1 1 1 1 0 1 0 0 1 4

[D]=[0 0 0 1] then D(X)=1

C(X)=D(X)g(X)=1.( X3+ X+1)= X3+ X+1 [C]=[0001011]

[D]=[0 0 1 0] then D(X)=X

C(X)= X.( X3+ X+1)= X4+ X2+X [C]=[0010110]

[D]=[0 0 1 1] then D(X)=X+1

C(X)=(X+1).( X3+ X+1)=
X3+ X+1+ X4+ X2+X = X4+ X3+ X2+1 [C]=[0011101]

And so on with the rest of the codes.

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Forth Class Electrical Dept.
Communication II Nada Nasih

b. Systematic cyclic codes:

The polynomial representation may be used with the same
generator polynomial g(X) used in non-Systematic codes.

Procedure:
1. Find D(X) from [D]
2. Select g(X) of order r from factorization of Xn+1
X r D( X )
3. C ( X )  X r .D( X )  (Re m ) where Rem is the reminder
g( X )
of long division
4. Use C(X) to find [C].

Note that C(X) consists of two parts, the first is X r .D( X ) which is
the same information data shifted to left by r position, the second is the
X r D( X )
reminder Re m of order (r-1) which is the r LSBs of the output
g( X )
code word or parity bits, hence [C] will have the form:

[C]=[ a1, a2, …… ak c1, c2, ….cr]

Ex: find the code table for (7,4) systematic cyclic code generated by
g(X)= X3+ X2+1

Sol:
a1 a2 a3 a4 c1 c2 c3 wi
0 0 0 0 0 0 0 ---
0 0 0 1 1 0 1 3
0 0 1 0 1 1 1 4
0 0 1 1 0 1 0 3
0 1 0 0 0 1 1 3
0 1 0 1 1 1 0 4
0 1 1 0 1 0 0 3
0 1 1 1 0 0 1 4
1 0 0 0 1 1 0 3
1 0 0 1 0 1 1 4
1 0 1 0 0 0 1 3
1 0 1 1 1 0 0 4
1 1 0 0 1 0 1 4
1 1 0 1 0 0 0 3
1 1 1 0 0 1 0 4
1 1 1 1 1 1 1 7

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Forth Class Electrical Dept.
Communication II Nada Nasih

Here n=7, k=4, r=3

For [D]=[0001] , D(X)=1

1
Xr.D(X) =X3.1= X3 X 3  X 2 1 X 3
X 3  X 2 1
X 2 1
C(X)=XrD(X)+Reminder
=X3+ X2+1 [C]=[0001 101]

 Note that the reminder gives directly the r-parity bits if written in
binary form.

For [D]=[0010] , D(X)=X

X 1
r 3
X .D(X) =X .X= X 4
X  X 1 X
3 2 4

X4  X3  X
X3  X
X 3  X 2 1
X 2  X 1

C(X)= X4+ X2+X+1 [C]=[0010 111]

For [D]=[0011] , D(X)=X+1

Xr.D(X) =X3.(X+1)= X4+X3

X 1
X  X 1 X  X
3 2 4 3

X4  X3  X
X

C(X)= X4+ X3+X [C]=[0011 010]

And so on with the rest of the codes

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Forth Class Electrical Dept.
Communication II Nada Nasih

Implementation of Cyclic Encoder:

Practically, the long division required in encoding is done using logic
circuit. That implements the division by g(X) polynomial. In general :
g(X)=g0+ g1X+ g2X2+………..+grXr, then g0=gr=1 always for any
factorization of Xn+1. Hence only g1, g2…..,gr-1 is shown in the
implementation circuit:

g1 g2
Z control
D Cr D Cr-1 D C1
1
S
[C]
[a1, a2, …… ak] 2

 This logic circuit is called Modular.

 Feedback shift register implemented using D-flip flop with
synchronized clock.

Circuit Operation :-
Switch S is at position 1 giving the data bit to [C] output and at the
same time for k clock pulses, the control Z is enabled "Z=1" to
feedback the content to the registers to produce c 1, c2, ….. cr bits at
the end of last clock.
Switch S is at position 2, the Z disabled to get these r parity bits to [C]
and at the same time r 0's will be fed back to the register to initialize
the register to the next data block.

NOTE
Previous encoding procedure for systematic cyclic code can be done
faster without polynomial representation if instead of g(X) is
converted into binary form called the "divisor" of the cyclic code.

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Forth Class Electrical Dept.
Communication II Nada Nasih

Ex:
Using g(X)=X3+X2+1, find the output codeword for [D]=[0011] and
[D]=[0010]

Sol:
1. Convert from polynomial into binary form
g(X) =X3+X2+1 [G]=[1101]
2. Add r 0's as LSB to data=[a1, a2, …. ak] to get [a1, a2, ….
ak 0 0 0 ]
for [D]=[0011] we will have [0011000]
3. Divide it by [G]
1
1101 0011000
001101
000001 0
r-parity

Then [C]=[0011010]

For [D]=[0010]

The out put should be [C]=[0010111].. how??

Ex:
Using the encoder logic circuit to find the o/p codeword for
systematic cyclic code with g(x)= X3+X2+1 and for [D]=[0101],
[0010]

g1=0 g2=1
Z control
D C3 D C2 D C1
1
S
[C]
[a1, a2, a3, a4] 2

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Forth Class Electrical Dept.
Communication II Nada Nasih

Sol:
First we write the transition equations for c 1, c2, c3 (we write the next
state of them in terms of the present state and the input, this is done
when Z=1 then:

c3n+1=c1n+ai
c2n+1=c3n
c1n+1=c2n+ c1n +ai= c2n+ c3n+1
c3 c2 c1
For [D]=[0101]
0 0 0
0 0 0
ai
1 0 1
0
1 1 1
1
0 1 1
0
0 0 1
1
0 0 0
0 0 0
Then c1 c2 c3 =110 and [C]=[0101110]

For [D]=[0010]

ai c3 c2 c1
0 0 0 0
0 0 0 0
1 0 0 0
0 1 0 1
1 1 1
Then c1 c2 c3 =111 and [C]=[0010111] 0 1 1
0 0 1
0 0 0

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Forth Class Electrical Dept.
Communication II Nada Nasih

Decoding of Systematic Cyclic Code:-

At the receiver
[R]=[C]+[E] where [E] is the error word
Or
R(X)=C(X)+E(X) , E(X) is the error polynomial

Now if we divide above equation by g(X) taking the reminder :-

 R( X )  C( X )   E( X ) 
Re m    Re m    Re m  
 g( X )   g( X )   g( X ) 
C( X ) 
And since Re m    0 as shown before, then :-
 g( X ) 
 R( X )   E( X ) 
Re m    Re m    S ( X ) =syndrome polynomial of order (r-1).
 g( X )   g( X ) 

1. If S(X) = 0 then no error occurs.

2. If S(X) # 0 then error occurs

To find the locations of these errors, the receiver may prepare a syndrome
table, store it in its memory, use it to find [E] from [S] starting with less
number of errors.

Ex: Prepare the syndrome table for (7,4) systematic cyclic code with
g(X)=X3+X2+1 and for single error. Check the syndrome when double
error at first and last positions occur.

Sol:-

Error Word [E] S1 S2 S3

0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 1 0 0 1
0 0 0 0 0 1 0 0 1 0
0 0 0 0 1 0 0 1 0 0
0 0 0 1 0 0 0 1 0 1
0 0 1 0 0 0 0 1 1 1
0 1 0 0 0 0 0 0 1 1
1 0 0 0 0 0 0 1 1 0
0 0 0 0 0 1 1 0 1 1
0 0 0 0 1 0 1 1 0 1

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Forth Class Electrical Dept.
Communication II Nada Nasih

Each [S] is found from [E] by long division by g(X). for example if
[E]=[0100000] error at second position from the left then:-

1 1 0 1 0 1 0 0 0 0 0
1 1 0 1
0 1 0 1 0
1 1 0 1
0 1 1 1 0
1 1 0 1
0 0 1 1
[S]

 Note that no repeated [S] for all possible single error. This is
expected since wi(min)=3 and the given (7,4) code is a single error
correction. Note also for double error [E]=[0000011], then
[S]=[011] which is single error at the second position (from the
left), there by these errors cannot be corrected.

Now going back to the example for double error [E]=[1000001]

1 1 0 1 1 0 0 0 0 0 1
1 1 0 1
0 1 0 1 0
1 1 0 1
0 1 1 1 0
1 1 0 1
0 0 1 1 1
[S]

[S]=[111] which is the same [S] as if single error occurs at third position
from the left.

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Forth Class Electrical Dept.
Communication II Nada Nasih

Ex: using previous syndrome table, find the corrected word for the
received word [R]=[1010011].

Sol:-
First, the receiver will find [S] from the reminder of R(X)/g(X)

1 1 0 1 1 0 1 0 0 1 1
1 1 0 1
0 1 1 1 0
1 1 0 1
0 0 1 1 1 1
1 1 0 1
0 0 0 1 0
[S]
Hence, [S]=[010], using syndrome table and for this syndrome,
[E]=[0000010]
Then the corrected codeword

[C]=[R]+[E]
1010011
0000010
[C] = 1010001

Implementation of Cyclic Decoder:

The long division of [R] by [G] to obtain the reminder is implemented is
using logic circuit as shown for the generator g(X). The control Z is
enabled for "n" clock pulses and then disabled for "r" clock pulses.

g1 Z control
g2

Sr Sr-1 S1

[R]= [r1, r2, …, rn ] S=[S1 S2 …… Sr]

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Forth Class Electrical Dept.
Communication II Nada Nasih

Ex: use the decoder circuit to find the syndrome and the corrected word
for the received word [R]=[1011010] , if g(X)= X3+X2+1

Sol:-

g1=0 Z control
g2=1

Sr Sr-1 S1

[R]= [1011010] S=[S1 S2 S3]

First we write the transition equations for S1 S2 S3 when Z=1 :-

S3n+1=S1n+ri
S2n+1=S3n
S1n+1=S2n+ S1n

ri S3 S2 S1
--- 0 0 0
1 1 0 0
0 0 1 0
1 1 0 1
1 0 1 1
0
1 0 0
1
1 1 0
0
0 1 1

Then [S]=[110], using the syndrome table then [E]=[1000000].

The corrected code word

1011010
1000000
[C] = 0011010

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