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Chandra Shekar CA Lab Experiment 1

The document describes an experiment to implement and verify seven basic logic gates - NOT, AND, OR, XOR, NAND, NOR, and XNOR - using a circuit simulator. It provides the theory of operation for each gate and screenshots of simulating each gate on the CircuitVerse simulator. The experiment concludes that all seven logic gates were successfully verified through simulation with different input combinations.

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chandu devisetti
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82 views10 pages

Chandra Shekar CA Lab Experiment 1

The document describes an experiment to implement and verify seven basic logic gates - NOT, AND, OR, XOR, NAND, NOR, and XNOR - using a circuit simulator. It provides the theory of operation for each gate and screenshots of simulating each gate on the CircuitVerse simulator. The experiment concludes that all seven logic gates were successfully verified through simulation with different input combinations.

Uploaded by

chandu devisetti
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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EXPERIMENT-1

Date:10/08/21

Aim: To implement and verify the basic logic gates (7404(NOT), 7408(AND), 7432(OR),
7486(XOR)), NAND, NOR, XNOR using simulator.

Software Required: https://circuitverse.org/simulator .

Theory:

A logic gate is an idealized model of computation or physical electronic device implementing a


Boolean function, a logical operation performed on one or more binary inputs that produces a
single binary output.

In this experiment, we are going to implement 7 types of gates. They are: NOT, AND, OR, XOR,
NAND, NOR, and XNOR.

Experiment:

1.NOT GATE:

A NOT gate performs logical negation on its input. In other words, if the input is 1, then the
output will be 0. Similarly, 0 input results in a output 1.

INPUT OUTPUT
A B
1 0
0 1

Fig.1: Screenshot of NOT gate


2.AND GATE:

An AND gate is an electrical circuit that combines two signals so that the output is on if both
signals are present.

INPUT INPUT OUTPUT


A B C
0 0 0
0 1 0
1 0 0
1 1 1

Fig.2: Screenshot of AND gate

3.OR GATE:

An OR gate is a digital logic gate that gives an output of 1 when any of its inputs are 1, otherwise
0.

INPUT INPUT Output


A B C
0 0 0
0 1 1
1 0 1
1 1 1

Fig.3: Screenshot of OR gate

4.XOR GATE:

The simplest XOR gate is a two-input digital circuit that outputs a logical “1” if the two input
values differ, i.e., its output is a logical “1” if either of its inputs are 1, but not at the same time.

INPUT INPUT Output


A B C
0 0 0
0 1 1
1 0 1
1 1 0

Fig.4: Screenshot of XOR gate

5.NAND GATE:

A logic gate which produces an output which is 0 only if all its inputs are 1; thus its output is
complement to that of an AND gate.
INPUT INPUT Output
A B C
0 0 1
0 1 1
1 0 1
1 1 0

Fig.5: Screenshot of NAND gate

6.NOR GATE:

A digital logic gate that implements logical NOR – it behaves according to the truth table to the
right. A HIGH output (1) results if both the inputs to the gate are LOW (0); if one or both input is
HIGH (1), a LOW output (0) results. NOR is the result of the negation of the OR operator.

INPUT INPUT Output


A B C
0 0 1
0 1 0
1 0 0
1 1 0
Fig.6: Screenshot of NOR gate

7.XNOR GATE:

A digital logic gate with two or more inputs and one output that performs logical equality.

INPUT INPUT Output


A B C
0 0 1
0 1 0
1 0 0
1 1 1

Fig.7: Screenshot of XNOR gate

PROCEDURE:

1. Setup the circuit

2. Test all circuits


3.Give various combinations of inputs

4.Repeat the procedure for each circuit

RESULT:

1.NOT GATE:

Fig.8: Screenshot of NOT gate simulation on simulator (Circuit Verse)

NOT gate is verified.

2.AND GATE:
Fig.9: Screenshot of AND gate simulation on simulator (Circuit Verse)

AND gate is verified.

3.OR GATE:

Fig.10: Screenshot of OR gate simulation on simulator (Circuit Verse)

OR gate is verified.
4.XOR GATE:

Fig.11: Screenshot of XOR gate simulation on simulator (Circuit Verse)

XOR gate is verified.

5.NAND GATE:
Fig.12: Screenshot of NAND gate simulation on simulator (Circuit Verse)

NAND gate is verified.

6.NOR GATE:

Fig.13: Screenshot of NOR gate simulation on simulator (Circuit Verse)

NOR gate is verified.

7.XNOR GATE:
Fig.14: Screenshot of XNOR gate simulation on simulator (Circuit Verse)

XNOR gate is verified.

CONCLUSION:

All gates are verified and simulated on a simulator (Circuit Verse).

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