HCMUT – Falculty of Electrical and Electronics Engineering

Course: Solid State Electronic Devices (EE2411) – Instructor: Hồ Trung Mỹ

Solved problems for Chapter 5 – Junctions
Notes:
· For an electron: m = 9.1 x 10 –31 kg and q = 1.6 x 10–19 Coulomb.
· For silicon at T = 300 K, ni = 1.5 × 1010 cm–3; silicon bandgap energy Eg = 1.12 eV.
· The Boltzmann constant kB = k = 8.61 × 10−5 eV/K; h = 6.62 x 10–34 Joule‐sec.
· Silicon dielectric constant eS = 11.9 x 8.85 x 10-14 F/cm; VT = 0.026V @300K

1. Name the major steps (in order) of fabrication of pn junction with planar technology. What is the role of
the SiO2 layers?
Ans.
· The major steps (in order) of fabrication of pn junction with planar technology:
1. Oxidation,
2. Photolithography,
3. Diffusion or ion implantation,
4. Metallization

· SiO2 layers function as insulator layers in a number of device structures or as barriers to

diffusion or implantation during device fabrication.

2. What are characteristics of a step pn+ junction?

Ans.
For pn+ junction, we have
ND >> NA
Since NAWP = NDWN Þ WP/WN = ND/NA >> 1 Þ Wp >> WN
Therefore, on p side of the junction we will find the majority of the depletion layer.

3. What is the difference between depletion and diffusion capacitance in a diode? Which one dominates in
forward bias?
Ans.
· Depletion capacitance: It is the capacitance due to fixed ions in the depletion region of the PN
junction (in forward or reverse bias)
· Diffusion capacitance: It is the capacitance due to transport of charge carriers only in the
forward biased PN junction.
· Diffusion capacitance dominates in forward bias.

4. Given M-S contact, metal has work function of 4.06 eV and n-type semiconductor has work function of
4.60 eV. Is this contact rectifying or Ohmic? What is direction of electron flow (from M to S or from S to
M)?
Ans.
We have FM = 4.06 eV < F S = 4.60 eV (n-type) (or ϕm < ϕn)
Þ This contact is Ohmic contact.
The direction of electron flow from lower work function to higher work function, i.e. from M to S.

5. Breakdown mechanism
(a) What is the breakdown mechanism in a lightly doped pn junction under reverse biased condition?
(b) What is the breakdown mechanism in a highly doped pn junction under reverse biased condition?
(c) Consider a voltage regulator diode in reverse breakdown region, breakdown voltage at temperature T1
is V1, at T2 is V2. If T2 >T1 and V2 > V1, what is the breakdown mechanism of this diode?
Ans.
(a) Zener breakdown
(b) Avalance breakdown
(c) TCVBR = (V2 – V1)/(T2 – T1) > 0 Þ This is Avalance breakdown mechanism!

SSED – Solved problems For Chapter 5 – page 1/7

6. A step p+ n Si junction is doped with Nd = 1016 cm–3 on the n side, where Dp = 10 cm2/s and tp = 0.1ms.
The junction area is 10-5 cm2. Calculate the reverse saturation current I0, and the forward current when V =
0.6 V.
Ans.
pn = ni2/Nd = (1.5x1010)2/1016 = 2.25 x 104 cm–3
Lp = sqrt(Dptp) = sqrt(10 x 0.1 x 10–6) = 10–3 cm
I0 = qADppn/Lp = 1.602 x 10–19 x 10–5 x 10 x 2.25 x 104 /10–3 = 3 x 10–16 A
ID = I0exp(VD/VT) = 3 x 10–16 x exp(0.6/0.026) = 3.7886 x 10–6 A = 3.7886 mA

7. An abrupt Si p-n junction (cross section A = 10–4 cm2) has the following properties at 300K:
p side n side
Na = 1016cm–3 Nd = 1017cm–3
tn = 10 ms tp = 0.1ms
mn = 1300 cm2/Vs mn = 700 cm2/Vs
mp = 450 cm2/Vs mp = 250 cm2/Vs
a) Draw the equilibrium band diagram for this junction, including numerical values for the Fermi level
position relative to the intrinsic level on each side.
b) Calculate the contact potential.
c) Calculate the depletion width on each side.
d) Calculate the maximum electric field.
e) Calculate the minority-carrier concentrations np and pn at the depletion-layer edges under thermal
equilibrium.
f) Calculate the applied voltage at a forward current of 1mA.
Ans.
a) EFn – Ein and Eip – EFP
EFn – Ein = VTln(Nd/ni) = 0.026 x ln(1017/(1.5x1010)) = 0.4085 eV
Eip – EFP = VTln(Na/ni) = 0.026 x ln(1016/(1.5x1010)) = 0.3487 eV

b) The contact potential V0

V0 = VTln(NaNd/ni2) = 0.7572 V
(second method : V0 = (EFn – Ein + Eip – EFP )/e = 0.7572 V)

c) The depletion width on each side

W = WN + W P = 3.113 x 10–5 cm
WN = W/(1+Nd/Na) = 3.0103 x 10–6 cm
W P = W – W N = 3.0103 x 10–5 cm

d) The maximum electric field Em

Em = 0.5V0W = 4.5734 x 104 V/cm = 4.5734 x 106 V/m

e) The minority-carrier concentrations np and pn at the depletion-layer edges under thermal

equilibrium
np = ni2/Na = (1.5 x 1010)2 / 1016 = 2.25 x 104 cm–3
pn = ni2/Nd = (1.5 x 1010)2 / 1017 = 2.25 x 103 cm–3

f) The applied voltage at a forward current of 1mA

VD » VT ln(ID/I0)
where ID = 1 mA, I0 = qA(Dppn/Lp + Dnnp/Ln), and D/L = sqrt(VTm/t)
We have:
Dp/Lp = sqrt(VTmp/tp) = 8.0623 x 103 cm/s
Dn/Ln = sqrt(VTmn/tn) = 581.3777 cm/2
Þ I0 = qA(Dppn/Lp + Dnnp/Ln) = 4.9954 x 10–16 A
Þ VD = VTln(ID/I0) = 0.026 x ln(10–3/(4.9954x10–16)) = 0.6766 V

8. A diode is doped with NA=5x1014 cm–3 and ND=1017cm–3.

1) On which side of the junction (p or n?) will we find the majority of the depletion layer? What is its
concentration?

SSED – Solved problems For Chapter 5 – page 2/7

 2) What is the built-in potential V0 for this diode?
3) What is the width of the depletion layer under a reverse bias of 3V? Assume one-sided step junction
with V0 = 0.7V. (give answer in mm)
4) If the diode has a current of 1mA under a forward bias voltage of 0.5V, what is the reverse saturation
current I0 of the device?
5) What is the maximum electric field E0 at equilibrium?
6) What is the depletion with W0 at equilibrium?
Ans.
1) We have
NAWP = NDWN Þ WP/WN = ND/NA = 1017/(5x1014) = 200 >> 1 Þ Wp >> WN
Therefore, on p side of the junction we will find the majority of the depletion layer and its
concentration is 5 x 1014cm–3.

2) V0 = Vbi = VTln(NAND/ni2) = 0.026ln(5x1014 x 1017/(1.5 x1010)2) = 0.6793V

3) The width of the depletion layer under a reverse bias of 3V

2e S (V0 + VR ) æ 1 1 ö 2e S (V0 + VR )
W= ç + ÷»
q è NA ND ø qN A
W = 3.11 x 10–4 cm = 3.11 x 10–6 m = 3.11mm

4) The reverse saturation current I0 of the device

I0 » ID/exp(VD/VT) = 1 x 10–3 A/exp(0.5/0.026) = 4.4482 x 10–6 A = 4.4482 mA

5) The maximum electric field E0 at equilibrium

Em = 0.5V0W0 = 1.016 x 104 V/cm = 1.016 x 106 V/cm

6) The depletion with W0 at equilibrium

2e SV0
W0 » Þ W0 = 1.3374 mm
qN A

9. (5.21) In a p+-n junction, the n-doping Nd is doubled. How do the following change if everything else
remains unchanged? Indicate only increase or decrease.
(a) Junction capacitance
(b) Built-in potential
(c) Breakdown voltage
(d) Ohmic losses
Ans.
2e S (V0 + VR )
Note that in a p+-n junction W »
qN D
(a) Junction capacitance increases (CJ = eSA/W)
(b) Built-in potential increases (V0 = VTln(NAND/ni2)
(c) Breakdown voltage decreases
(d) Ohmic losses decreases (sp = qpmp = qNDmp)

10. (5.20) A Si n+-p junction has an area of 25 mm2. Calculate the total junction capacitance associated
with this junction at an applied reverse bias of 2 V. Assume that the n+ region is doped 1020 cm–3 and the p
doping is 1 x 1016 cm–3. If we forward bias this junction 0.5 V, what is the electric field far from the
junction on the p side, assuming a hole mobility of 250 cm2/Vs, an electron mobility of 100 cm2/Vs, and a
reverse saturation current density of 1 nA/cm2 for this ideal diode?
Ans.
a) The total junction capacitance (CJ) associated with this junction at an applied reverse bias of 2
V
CJ/A = eS/W
where A = 25 mm2, = 25 x 10–8 cm2

SSED – Solved problems For Chapter 5 – page 3/7

 2e S (V0 + VR ) æ 1 1 ö 2e S (V0 + VR )
W= ç + ÷»
q è NA ND ø qN A
e S qN A
Þ CJ » A
2(V0 + VR )
where V0 = VTln(NAND/ni2) = 0.026 ln(1020 x 1016/(1.5x1010)2) = 0.9368V

Þ CJ = 4.2344 x 10–15 F » 4.2 x 10–15 F

b) If we forward bias this junction 0.5 V, the electric field far from the junction on the p side is
We have
J » J0exp(VD/VT) = 10–9 exp(0.5/0.026) A/cm2 = 0.2248 » 0.225 A/cm2
In p side far from junction, because there is only drift current:
J = qmpppE
Þ E = J/qmppp = 0.5625 V/cm » 0.563 V/cm

11. A silicon [step] p-n diode maintained at 300K has a doping of Na=3x1018 cm–3 and Nd=1.0x1016 cm–3
and mobilities in the two regions of μn=1000 cm2/Vs, μp=200 cm2/Vs, minority carrier lifetimes in the two
regions of τn=10 μs τp=1.2 μs.
a) What is the built in voltage?
b) What is the capacitance per unit area and the small signal diode resistance at 0 volts? (Assuming the
diode area is 2.0 x 10–5 cm2)
c) What is the capacitance per unit area at –3 volts (i.e. reverse bias)?
d) What is the capacitance per unit area and the small signal diode resistance at +0.5 volts (i.e. forward
bias)?
e) The diode is to be used in a 3GHz oscillator circuit for a cell phone and thus is placed in parallel
with a 12 nH inductor. If the device is intended to be biased at –3 V (see results from problem
above), what diode area is required?
f) If the bias voltage is changed to –1V, what is the shift in frequency that results?
Ans.
a) V0 = VTln(NAND/ni2) = 0.026 ln(3x1018 x 1016/(1.5x1010)2) = 0.8456V
b) At VA = 0, CJ /A and rd =1/gd
We have
CJ/A = eS/W
where A = 2 x 10–5 cm2,
2e S (V0 - VA ) æ 1 1 ö
W= ç + ÷
q è NA ND ø
Þ W = 3.342 x 10–5 cm
Þ CJ/A = eS/W = 3.1512 x 10–8 F/cm2
Since ID = I0(exp(VD/VT)–1) Þ gd = dID/dVD = (I0/VT)exp(VD/VT) = (ID + I0)/VT
At VD = VA = 0 Þ ID = 0 Þ gd = I0/VT Þ rd = 1/gd = VT/I0
We have
Dp/Lp = sqrt(VTmp/tp) = 2.0817 x 103 cm/s
Dn/Ln = sqrt(VTmn/tn) = 1.6125 x 103 cm/s
Þ I0 = qA(Dppn/Lp + Dnnp/Ln) = 1.5027 x 10–16 A
Þ rd = VT/I0 = 1.7303 x 1014 W

c) The capacitance per unit area at –3 volts (i.e. reverse bias):

(CJ(VA = –3V)/A)/(CJ(VA = 0)/A) = W(VA=0)/W(VA=–3V) = 1/sqrt(1 + VR/V0)
where CJ(VA = 0)/A = 3.1512 x 10–8 F/cm2 (from b)
Þ CJ(VA = –3V)/A = 3.1512 x 10–8 / sqrt(1 + 3/0.8456) = 1.4777 x 10–8 F/cm2

d) The capacitance per unit area and the small signal diode resistance at +0.5 volts
(i.e. forward bias):
CJ(VA = 0.5V)/A = 3.1512 x 10–8 / sqrt(1 – 0.5/0.8456) = 4.9291 x 10–8 F/cm2
SSED – Solved problems For Chapter 5 – page 4/7
 rd = 1/gd » VT/ID = VT/(I0exp(VD/VT)) = 7.6965 x 105W

e) The diode area is required:

f = 1/(2psqrt(LCJ)) Þ CJ = 1/(L(2pf)2) = 2.3454 x 10–13 F
CJ(VA = –3V)/A = 1.4777 x 10–8 F/cm2 (from c)
Þ A = 2.3454 x 10–13 F/ 1.4777 x 10–8 F/cm2 = 1.5872 x 10–5 cm2

f) The shift in frequency

CJ(VA = –1V)/CJ(VA = –3) = sqrt((Vbi + 3)/(Vbi + 1))
where CJ(VA = –3) = 2.3454 x 10–13 F (from c)
Þ CJ(VA = –1V) = 3.3855 x 10–13 F/cm2
Þ f (at VA = –1V) = 1/(2psqrt(LCJ)) = 2.497 x 109 Hz = 2.497 GHz
Þ Df = f(VA = –3V) – f(VA = –1V) = 3 GHz – 2.497 GHz = 0.5030 GHz

12. A Si n+-p junction has an area of 25 mm2. Calculate the total junction capacitance associated with this
junction at an applied reverse bias of 3 V. Assume that the n+ region is doped 1020 cm–3 and the p doping
is 1 x 1016 cm–3.
Ans.
The total junction capacitance (CJ) associated with this junction at an applied reverse bias of 3 V
CJ/A = eS/W
where A = 25 mm2 = 25 x 10–8 cm2
2e S (V0 + VR ) æ 1 1 ö 2e S (V0 + VR )
W= ç + ÷»
q è NA ND ø qN A
e S qN A
Þ CJ » A
2(V0 + VR )
where V0 = VTln(NAND/ni2) = 0.026 ln(1020 x 1016/(1.5x1010)2) = 0.9368V

Þ CJ = 3.6571 x 10–15 F » 3.66 x 10–15 F

13. Consider a varicap with an abrupt pn junction. Let VR be the applied reverse bias. If the junction
capacitance (Cj) is 6 pF for Vbi + VR = 1 V, then for Vbi + VR = 9 V, what is the value of Cj ?
Ans.
We have CJ = K/sqrt(Vbi + VR) Þ CJ2/CJ1 = sqrt(Vbi+VR1)/sqrt(Vbi+VR2) (sqr = square root)
Þ CJ2 = CJ1 x sqrt((Vbi+VR1)/(Vbi + VR2)) = 6 x sqrt(1/9) = 6/3 = 2 pF
Thus for Vbi + VR = 9 V, CJ2 = 2 pF

14. Solve the circuit below for current I and potential V (or VO) using the constant voltage drop model
with VON = 0.7 V . Demonstrate that your answer is consistent with the assumptions you made.

(a) (b)

SSED – Solved problems For Chapter 5 – page 5/7

Ans.
(a) Assume that both diodes are ON Þ V = 0 [Volt].
Let IA be the current in resistor of 5kW and IB be the current in resistor of 10kW.
IA = (3V – 0.7V)/5kW = 0.46 mA
IB = (0V –(–3V))/10kW = 0.3 mA (IB > 0 means that D2 is ON)
Þ I = IA – IB = 0.46 – 0.3 = 0.16 mA (I > 0 means that D1 is ON)
Therefore I = 0.16 mA và V = 0 Volt

(b) Assume that both diodes are ON Þ V0 = 2 x 0.7V + (–15V) = –13.6V .

The current I = (0 – V0) / 2kW = 13.6V/2kW = 6.8 mA (I > 0 means that D1 and D2 are ON)
Therefore I = 6.8 mA và V0 = –13.6 Volt

15.

Fig.1 Fig.2 Fig.3

1. Find the bias mode of the diode in Fig.1.
2. Given a circuit shown in Fig. 2, V1 = 3.5V and V2 = 3V, we apply the constant voltage drop model
(VON = 0.7V) for finding IX and VX.
3. A voltage regulator (Fig.3) with VS = 8 V, R = 25 W and Zener diode with VZ = 6V, IZmin = 2mA
and IZmax = 20mA. To keep VL unchanged (=VZ), what is the range of RL?
Ans.
Note: With generic bias circuit as follows:

V1 – V2 Diode D
< 0 Reverse bias
=0 No bias
>0 Forward bias

1. We find the Thevenin equivalent for the bias circuit:

VTh = 18 x 10/(1+10) + (–18) x 1/(1+10) = 18x9/11 V > 0 Þ Diode in forward bias.

2. With this question, after checking assumptions (each diode ON or OFF) they find that
If (V1 – (–3V)) > VON and (V2 – (–3V)) > VON
Then
if V1 > V2 then D1 is ON and D2 is OFF; end if;
if V1 < V2 then D1 is OFF and D2 is ON; end if;
end if;
We have
3.5 –(–3) = 7 > 0.7; 3 –(–3) = 6 > 0.7; and V1 = 3.5V > V2 = 3V
Þ D1 is ON and D2 is OFF
Þ VX = V1 – VON – (–3) = 3.5 – 0.7 + 3 = 5.8 V
Þ IX = VX/2kW = 5.8/2 mA = 2.9 mA

3. Let IL be the current in RL and IR be the current in R.

Zener diode is still in voltage regulator if: IZmin < IZ < IZmax Þ 0.002A < IZ < 0.020A

SSED – Solved problems For Chapter 5 – page 6/7

Since the circuit Þ IZ = IR – IL = (VS–VZ)/R – VZ/RL = (8 – 6)/25 – 6/RL = 0.08A – 6/RL
Þ 0.002A < 0.08A – 6/RL < 0.020A Þ 6/0.078 < RL < 6/0.06
Þ 77 W < RL < 100W

16. Solve the circuit below for currents I1 and I2 using the constant voltage drop model with VON = 0.7 V .
Demonstrate that your answer is consistent with the assumptions you made.

Ans.
We assume diode is ON
ÞVD = VON = 0.7V
Þ I1 = VD/68 = 0.0103 A = 10.3 mA
Þ I2 = (10 – 0.7)/1000 – I1 = 9.3 mA – 10.3 mA = –1 mA < 0 Þ It conflicts our assumption!
Therefore, diode is OFF Þ I2 = 0 and I1 = 10V/(1000+ 68) = 0.0094 A = 9.4 mA
Recheck:
VD = 68 x 0.0094 = 0.6367 V < VON = 0.7 V Þ Diode is OFF

17. Determine the output voltage VO for the circuit below using the constant voltage drop model with VON
= 0.7 V

Ans.
We use the Thevenin theorem for voltage source of 5V and two 1K-resistors:
VTh = 1KW x 5V/(1KW + 1KW) =2.5V
RTh = 1KW//1KW = 500W
We remark that VTh = 2.5V > VON = 0.7V Þ diode is ON
Þ VD =VON = 0.7V
Þ ID = (2.5 – 0.7)/(500+100) = 3.83 x 10–3A = 3.83 mA
Þ V0 = 100 x ID + VD = 100 x 3.83 x 10–3 + 0.7 » 1V

SSED – Solved problems For Chapter 5 – page 7/7