Slicing Tree Is a Complete Floorplan Representation 

Minghorng Lai and D. F. Wong

Department of Computer Sciences, The University of Texas at Austin, Austin, TX 78712, USA

Abstract 11, 12, 14, 15]. Although they are efficient for handling hard
modules, many of these representations are unable to take
Slicing tree has been an effective tool for VLSI floorplan de- advantage of shape and orientation flexibility of soft mod-
sign. Floorplanners using slicing tree representation take ules. As a result, they either use very complicated special-
full advantage of shape and orientation flexibility of circuit ized procedures or require computation-intensive techniques
modules to find highly compact slicing floorplans. However, for sizing soft modules.
slicing floorplans are commonly believed to suffer from poor In this paper we prove that slicing tree is a complete rep-
utilization of space when all modules are hard. For this rea- resentation of general floorplans. We show that augmented
son, a large body of literature has recently been devoted to with a simple compaction procedure, slicing tree representa-
various new representations of non-slicing floorplans to im- tion can generate all maximally compact placements of mod-
prove space utilization. In this paper, we prove that by using ules. In conclusion, slicing tree is a complete representation
slicing tree representation and compaction, all maximally of both slicing and non-slicing floorplans.
compact placements of modules can be generated. In con- The remainder of the paper is organized as follows: In
clusion, slicing tree is a complete floorplan representation Section 2, we discuss the general floorplan design problem.
for all non-slicing floorplans as well. In Section 3, we review the slicing tree representation of slic-
ing floorplans. In Section 4, we prove that slicing tree, when
1 Introduction
augmented with a simple compaction procedure, is a com-
plete representation of floorplans. In Section 5, we provide
Floorplanning has become one of the most challenging tasks some concluding remarks.
facing VLSI circuit designers as deep sub-micron fabrication
technology is close to making billion-transistor chips a real- 2 Floorplan Design Problem
ity. As a result of the enormous sizes of the new circuits, it is
practically impossible for even the most experienced circuit A module Mi is a rectangle with fixed area Ai , height hi ,
designers to optimally arrange all the components on a VLSI and width wi . The aspect ratio ri of module Mi is defined to
chip manually without resorting to design automation tools. be hi =wi : A hard module is a circuit component with fixed
Furthermore, with rapidly narrowing interconnects and esca- height and width. A soft module has flexibility in its shape:
lating interconnect-delay/gate-delay ratio in circuits, floor- the aspect ratio of a soft module is required to be in a range
planning is also becoming a crucial phase in timing consid- [rmin ; rmax ]. A module has free orientation if rotation of the
erations. Therefore, a good floorplanning strategy is highly module is allowed. A module with fixed orientation cannot
desirable in the early stage of the physical design process. be rotated freely.
Floorplans can be classified into two categories: slicing A placement of the modules fixes the locations of the
and non-slicing. Slicing floorplans, generally represented modules in the floorplan. A feasible placement is one in
by slicing trees or Polish expressions, are obtained by re- which no modules overlap each other and all soft modules
cursively bisecting the chip areas horizontally or vertically are consistent with their aspect ratio constraints. The area
with a slicing line. There have been several efficient algo- A of a placement is defined to be the area of the smallest
rithms [4, 10, 13, 17, 18] for finding optimal slicing floor- enclosing rectangle. The total wiring cost is W . The main
plans. These algorithms are very efficient because the slic- objective of floorplan design is to find a feasible placement
ing structure limits the size of the solution space and because of a set of modules that minimizes the cost function A + W .
they exploit shape and orientation flexibility of the mod- If most modules in the set are soft modules, slicing floor-
ules. Slicing tree representation has been shown to be a good planners using slicing tree representation (Section 3) exploit
choice for handling various placement constraints as well the shape and orientation flexibility to find highly compact
[17]. Furthermore, it has been mathematically proven that slicing floorplans. In Section 4, we show that augmented
slicing floorplans are capable of producing compact place- with compaction, slicing tree representation is also able to
ment for modules with shape flexibility [16]. represent all non-slicing placements of modules.
However, it is still commonly believed that even an opti-
mal slicing floorplan suffers from poor utilization of space.
3 Slicing Tree Representation of Slicing Floorplans
For this reason, many efforts have been devoted to creating
representations of non-slicing floorplans [1, 2, 3, 5, 6, 7, 8, 9, A slicing floorplan is a rectangular area that is sliced recur-
 This work was partially supported by the National Science Foundation under
sively by a horizontal or vertical slicing line into a set of
grant CCR-9912390, by the Texas Advanced Research Program under Grant No.
003658288, and by grants from Avant!, Intel and IBM. rectangular regions, called rooms, to accommodate a set of
circuit modules M . Slicing floorplans (Fig. 1) are gener- plan - no dimensional or positional information of the mod-
ally represented by slicing trees (or equivalently, by Polish ules is specified. One of the objective of floorplan design is
expressions.) to minimize the area of the bounding rectangle. As a result,
for a slicing tree T , slicing floorplanners produce a slicing
6 7
floorplan with the smallest bounding rectangle. Sometimes
1
there exists a small amount of dead space even in the small-
5 est bounding rectangle. In this case, the slicing lines are free
2 3 to move in the floorplan, without increasing the area of the
4 bounding rectangle, as long as the rooms stay large enough
to accommodate the modules. Therefore, a slicing tree rep-
* resents a set of equivalent slicing floorplans with the same
dimensions (Fig. 2). For example, floorplan 2(a), 2(b), and
+
+ 2(c) have exactly the same dimensions; however, the loca-
* 1 + tions of slicing lines are different. For our discussion, we
* assume that in the corresponding slicing floorplan for a slic-
4 5
2 3 6 7 ing tree T, no horizontal slicing lines can be moved to the
left and no vertical slicing lines can be moved downward.
For each slicing tree, there is exactly one such correspond-
Polish Expression: 2 3 * 1 + 4 5 + 6 7 * + *
ing slicing floorplan (Fig. 2(d)). The modules can be placed
anywhere in their rooms. We define the slicing placement Ps
Figure 1: Slicing floorplan, slicing tree, and Polish expres- of a slicing tree T to be the placement where each module is
sion. placed in the lower left corner of its room in the correspond-
The leaf nodes in a slicing tree represent the modules. ing slicing floorplan for T . In Fig. 2, placement 2(d) is the
Each internal node of a slicing tree is labeled by operator  slicing placement for the slicing tree in Fig. 1.
or operator +, corresponding to a vertical or horizontal slic- When most modules are soft, slicing floorplanners have
ing line, respectively. Every subtree rooted at an internal been mathematically proven to be very efficient for generat-
node represents a supermodule consisting of one or more ing highly compact placements [16]. Experiments show that
component modules and/or supermodules. In a slicing floor- slicing tree representation is able to produce close-to-zero
plan, each supermodule has a rectangular shape. The Polish dead space for soft modules. However, when all modules
expression for a slicing floorplan is obtained by traversing are hard, it is believed that even an optimal slicing floor-
the slicing tree in postorder. plan suffers from poor utilization of space because slicing
trees cannot represent non-slicing floorplans. We will show
6 7
in next section that by performing simple compaction, slic-
1 6 7 1
ing tree representation can generate all maximally compact
5 placements of modules.
5
2 3 2 3
4
4 4 Slicing Tree Is a Complete Representation of Non-Slicing
Floorplans

(a) (b)

4 7
1 1
6 7 5
7 6
6
3
5 5
2 3 2
3 2
4 4 1

(c) (d)
Figure 3: A maximally compact placement of M =

Figure 2: Slicing floorplans and placements corresponding f1; 2; 3; 4; 5; 6; 7g.

to the same slicing tree in Fig. 1. Floorplans in (a), (b), (c),
and (d) are equivalent floorplans represented by the same We define a maximally compact placement (Fig. 3) of a
slicing tree. The slicing lines in floorplan (d) cannot be set of modules to be a placement in which no module can
moved horizontally to the left or vertically downward. Ad- move horizontally to its left or vertically downward without
ditionally, the modules in (d) are all placed in the lower left moving any other modules (This is equivalently defined as
corner in their individual rooms. The placement in (d) is de- an admissible packing in [2].) Notice that the slicing place-
fined to be the slicing placement for the slicing tree in Fig. 1. ment Ps of a slicing tree T is not necessarily a maximally
compact placement since if slicing lines are removed, mod-
We note that a slicing tree is merely a hierarchical de- ules in slicing placement Ps are then free to move left or
scription of the bisections of rectangular areas in the floor- downward (Fig. 4). We prove in this section that slicing tree
 4 7
representations, augmented with a simple compaction pro- 4 7

cedure, generate all maximally compact placements of mod-

(a) 3 3 6
ules. 2
6
2 1 5
1
5

6 7 7
6
4 4
(b) 2 2
1
1
Figure 4: Slicing placement is not necessarily a maximally 3
5 3 5
compact placement.

The x-compaction is a procedure that slides modules in a Figure 6: Placements and their corresponding horizontal ad-
placement horizontally toward the left boundary of the floor- jacency graphs.
plan. The y -compaction slides modules in a placement ver-
tically toward the lower boundary of the floorplan. The it-
erative xy -compaction is a sequence of successive x- and area. For example, vertices 1, 3, and 4 in Fig. 6(a) and ver-
y -compactions (Fig. 5). The iterative yx-compaction is a tices 1 and 6 in Fig. 6(b) are left-boundary vertices. It is
sequence of successive y - and x-compactions. Compaction easy to see that all left-boundary vertices have in-degree 0.
is especially helpful for placements in slicing floorplans. In The converse may not be true in general (e.g., vertex 2 in
Fig. 5, the dead space was reduced from over 20% to a highly Fig. 6(a)), but it is true for maximally compact placements
compact placement by simple compaction procedure. Note (see Fig. 6(b)). Another important observation is that for
that the placement produced by the compaction is a non- a maximally compact placement, all vertices in G are con-
slicing placement. nected to the set of left-boundary vertices. We summarize
our observations in the following Lemma 1.
x−compaction
Lemma 1 Let G be the horizontal adjacency graph of a
maximally compact placement. Let B be the set of left-
1 2 1 2
3 3
4 4 boundary vertices. We have (1) G is a directed acyclic graph,
(2) B is exactly the set of vertices with in-degree 0, and (3)
each vertex v in G is reachable from at least one vertex u in
6 6
5 5

B (i.e., there exists a path from u to v ).

y−compaction
We prove next that we can obtain all maximally compact
1
placements of modules by performing compaction on slicing
1
3 3 floorplans.
4
Theorem 1 Given any maximally compact placement P , there
4
2
2
6
exists a slicing tree T such that performing compaction on
6
5 5

x−compaction
the slicing placement Ps of T generates P .

Proof:
Figure 5: A maximally compact placement is obtained by Let G be the horizontal adjacency graph of P . Let B =
performing an iterative xy -compaction on a placement in fb1; b2 ;


; bmg be the set of left-boundary vertices. Ac-
slicing floorplan. cording to Lemma 1, every vertex in G is reachable from at
least one vertex in B . It follows that we can find a spanning
Given any placement of modules, we can construct a hor- forest Q = fT1 ; T2 ;


; Tm g of G where Ti is a tree rooted
izontal adjacency graph G = (V; E ) as follows. The set of at left-boundary vertex bi , i = 1; 2;


; m. (Recall that a
vertices V corresponds to the set of modules. There is an spanning forest of a graph is a collection of disjoint trees
edge (u; v ) in E if and only if the left boundary of v is im- which are subgraphs of the given graph and that every ver-
mediately adjacent to (i.e. touching) the right boundary of tex is in one of the trees.) For example, the graph in Fig. 7(b)
u. The vertical adjacency graph can be similarly defined in is a spanning forest (consisting of three trees) of the horizon-
terms of the abuttment of the top/bottom boundaries of the tal adjacency graph in Fig. 7(a) with left-boundary vertices
modules. It is easy to see that G is a directed acyclic graph. A, D, and G as the roots of the trees.
Fig. 6 shows the horizontal adjacency graphs of two differ- We now describe how to obtain a slicing tree from Q.
ent placements where the placement in (a) is not maximally We may assume that b1 ; b2 ;


; bm are in the order of in-
compact but the one in (b) is. creasing y positions. We create m 1 horizontal slicing
A vertex u in G is said to be a left-boundary vertex if lines dividing the floorplan into m panels for the trees rooted
u is a module placed on the left boundary of the placement at b1 ; b2 ;


; bm . For each tree, the transformations shown
 H
I Z
G H G Z
I (a)
D E D E
F
F
A B B Z
C A C (b) T’ Z T’

(a)

H Tm’
I
G
Tm’

E
D F Z
(c) Z
B T2’
C T2’
A
T1’
(b) T1’

+
G H I
+
*
Figure 8: Generating slicing floorplans from trees in span-
A * * *
D E ning forests.
B + G *
D E
H I F
C F A B
C
Input: A maximally compact placement P
ABCF+**DE*GHI**++ Output: A slicing tree T (in Polish expression)

(c) (d)
Generate a horizontal adjacency graph G for P .
Find a spanning forest in G: fT1 ; T2 ;


; Tn g. (Ti0 s are
in the order of increasing y -positions of root modules.)
I
+ + +
return g(T1 ) g(T2 )


g(Tn ) 1 2 : : : (n 1)
G H
g(tree T ) f
D
E u = root of T
if u has no children
F return u
A B
C
if u has one child v
Tv = subtree rooted at v
return u (g(Tv )) 
(e)
if u has m children v1 ; v2 ;


vm m;  2
Tvi = subtree rooted at vi
Figure 7: Generating a slicing placement from a spanning return u g(Tv1 ) g(Tv2 )


g(Tvm ) +1 +2 ::: +(m 1) 
forest in the horizontal adjacency graph. A maximally com- g
pact placement and its horizontal adjacency graph is shown
in (a). One spanning forest in the horizontal adjacency graph
is shown in (b). For the spanning forest in (b) we can gen-
erate a slicing tree T (c) and its corresponding slicing place- Figure 9: Generating a slicing tree T from a spanning forest
ment Ps (e) such that performing compaction on Ps gener- in the horizontal adjacency graph of a maximally compact
ates the original maximally compact placement. placement P .

in Fig. 8 are applied recursively to the sub-trees to further The slicing tree is represented by its equivalent Polish ex-
expand the slicing structure of the floorplan. For example, pression. The procedure described in Fig. 9 is based on a
in Fig. 7(d) two slicing lines divide the floorplan into three breadth-first marking procedure. We start this procedure on
horizontal panels for the three trees in Fig. 7(b). Then the each of the trees in the spanning forest, in the order of in-
transformation procedures in Fig. 8 are applied recursively creasing y -positions of the modules at the roots of the trees.
to generate the slicing floorplan in Fig. 7(d). From the slicing We traverse each tree in a breadth-first fashion, generating
floorplan, we can generate the slicing placement Ps (Fig. 7(e)) the Polish expression for one level of the tree at a time. This
corresponding to the slicing tree. (Remember in a slicing is a very efficient procedure with linear complexity. For the
placement, the slicing lines cannot move left or downward. spanning forest in Fig. 7(b), the procedure generates the slic-
Furthermore, the modules are placed in the lower left cor- ing tree T in Fig. 7(c). Fig. 7(e) is the slicing placement of T
ner of their individual rooms.) It can be shown that the in Fig. 7(c). We then perform a simple y -compaction on the
x-positions of the modules in the slicing placement are the slicing placement in Fig. 7(e) to generate the original maxi-
same as their original x-positions in the maximally compact mally compact placement P in Fig. 7(a).
placement P . Therefore, a simple y -compaction transforms Another example of slicing tree generation is shown in
Ps into P . Fig. 10. In this example, the vertical adjacency graph and
Given a maximally compact placement, the formal pro- its spanning forest are used to generate the slicing tree. In
cedure for generating a slicing tree T is shown in Fig. 9. this case, the x-compaction is used to transform the slicing
 preferable to perform iterative xy - or yx-compactions to en-
H I
G

sure that a maximally compact placement is evaluated during

E F
D each iteration. We have shown that slicing tree representa-
tions can be used to generate all maximally compact place-
B C
A ments of modules. Therefore, floorplanning based on slicing
(a) tree representation should remain an active area of research.
*

+
*
G H References
I
A + + +
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5 Concluding Remarks
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