0% found this document useful (0 votes)
104 views

ECEN 325 Lab 8: BJT Amplifier Configurations

Uploaded by

Sam Alba
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
104 views

ECEN 325 Lab 8: BJT Amplifier Configurations

Uploaded by

Sam Alba
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 7

ECEN 325 Lab 8: BJT Amplifier Configurations

Objectives
The purpose of the lab is to examine the properties of the BJT amplifier configurations and investigate their small-
signal performance, with the emphasis on the design of BJT amplifiers.

Introduction
Superposition Theorem - Linear and Nonlinear Circuit Solution
The superposition theorem states that in a linear circuit with multiple sources, any branch current or node voltage
is the sum of the currents or voltages produced by each source applied individually. Linear components include
resistors, capacitors, inductors, and controlled sources, therefore any combination of these elements yield a linear
circuit. Figure 1 shows the application of superposition theorem to solve linear circuits, where the DC and AC
solutions are obtained by applying only DC and AC sources, respectively, providing the total solution as Vo =
Vo,dc + Vo,ac .

VCC VCC

Linear Circuit Vo Linear Circuit Vo,dc Linear Circuit Vo,ac


Vi Vi
−VEE −VEE

Figure 1: Application of the superposition theorem to linear circuits

The superposition theorem can be extended to solve nonlinear circuits under certain restrictions, which are known
as small-signal conditions. The DC solution usually requires using simplified DC models for the nonlinear devices
(such as using the constant-voltage-drop model for a diode or a base-emitter junction, instead of the exponential
model), and can be obtained by applying only DC sources. AC small-signal model parameters are dependent on
the DC solution, as well as other device parameters. Once the linearized circuit using AC small-signal models
is constructed, AC solution can be obtained by applying only AC sources. Figure 2 illustrates extension of the
superposition theorem to nonlinear circuits, where the approximate solution is Vo ≈ Vo,dc + Vo,ac .

VCC VCC

Nonlinear Circuit Linearized Circuit


Nonlinear Circuit Vo Simplified DC Models
Vo,dc Small−signal AC Models
Vo,ac
Vi Vi
−VEE −VEE

Figure 2: Extension of the superposition theorem to nonlinear circuits

BJT Small-Signal AC models


BJTs are nonlinear devices, where the collector current is an exponential function of the base-emitter voltage. Typical
BJT amplifiers include DC sources providing the DC bias, as well as AC sources as the signals to be amplified.
Extension of superposition to BJT amplifiers requires finding the DC solution first, where the BJTs must be biased
in the active region. Figure 3 shows the AC small-signal models for NPN and PNP BJTs in the active region.
© Department of Electrical and Computer Engineering, Texas A&M University

1
C E
iC iE
B NPN B PNP
iB iB
iE iC
E C
π model T model π model T model

ib ic C E E
B C α ie ie
re ie
rπ vbe gm vbe ro B ro rπ veb gm veb ro B ro
re ie
ie B C α ie
ib ic
E
E C

Figure 3: Small-signal AC models for NPN and PNP BJTs

Small-signal parameters in Fig. 3 can be calculated as


IC β VT β VA
gm = rπ = re = α= ro = (1)
VT gm IE β+1 IC
where IC and IE are DC collector and emitter currents, respectively, VT is the thermal voltage (approximately 25mV
at room temperature), β is the current gain of the transistor (around 100 or larger), and VA is the Early Voltage
(around 100V). For typical discrete BJT circuit implementations, ro will not have a significant impact, therefore will
be ignored. For small-signal AC analysis, π-model and T-model provide identical results, however the T-model
allows more intuitive analysis with simpler calculations. Table 1 shows node impedances and node-to-node gains
for generic BJT configurations, which are derived by substituting the transistor with its T-model, where ro = ∞.

Table 1: BJT Node Impedances and Node-to-Node Gains when ro = ∞

NPN PNP Impedance NPN PNP Gain

ZC ZE
ZC ZE
vc
vc −αZC
Zbase = (β+1)(re+ZE ) vb vc =
vb vb re + ZE
Zbase Zbase
ZE ZC ZE ZC

Zemitter ZC ve
ZC
vc
ZB vc vc αZC
ZB Zemitter = re + ZB =
β +1 ve Zemitter
ZB ZC ZB ZC
ve
Zemitter

Zcollector
ZE
ZE
vb ve ve
ve ZE
ZB Zcollector = ∞ =
ZE vb re + ZE
ZE ZB vb
Zcollector

2
BJT Amplifier Configurations
Common-Emitter Configuration
Figures 4 and 5 show the common-emitter configurations for NPN and PNP BJTs, respectively. Analysis of this
configuration yields
RB2 VRE
DC : VRB2 ≈ VCC VRE = VRB2 − 0.7 IE = ≈ IC (2)
RB1 + RB2 RE
Vo,ac RC
AC : Av = ≈− Ri = RB1 k RB2 k (β + 1)(re + (RE k RG )) Ro = RC (3)
Vi re + (RE k RG )

VCC VCC

RB1 RC RB1 VRC RC RC


Vo Vo,dc Ri Vo,ac
Ro
Vi Vi RB
RB2 RE RG RB2 VRB2 VRE RE RE ||RG

(a) (b) (c)

Figure 4: (a) NPN Common-Emitter Configuration (b) DC equivalent (c) AC equivalent

VCC VCC

RB2 RE RG RB2 VRB2 VRE RE RE ||RG


Ri
Ro
Vi Vo Vo,dc Vi RB Vo,ac
RB1 RC RB1 VRC RC RC

(a) (b) (c)

Figure 5: (a) PNP Common-Emitter Configuration (b) DC equivalent (c) AC equivalent

Typical design specifications for the common-emitter configuration includes:

• 0-to-peak unclipped output voltage swing: V̂o


Vo,ac
• Voltage gain: Av =
Vi
• Input and output resistances: Ri and Ro
• THD at the maximum output level
• Sensitivity to β and |VBE | variations

Based on the typical specifications, design procedure for the common-emitter amplifier in Figs. 4 and 5 can be given
as follows:

í Choose VRE ≥ 1V to have less than 10% variation of IC when VBE = 0.7 ± 0.1.
í To have an unclipped output swing of V̂o , VRC should be chosen such that (VCC − V̂o − VRE − 0.2) ≥ VRC ≥ V̂o .
Choice of VRC does not only affect the available signal swing at the output, but also determines the available
gain as well as the linearity of the amplifier as follows:

3
RC VRC /IC VRC VRC ,max VCC − V̂o − VRE − 0.2
P RG = 0 ⇒ |Av | = = = ⇒ |Av |max = =
re VT /IC VT VT VT
V̂o
P Small-signal condition: v̂be = VT  VT ⇒ V̂o  VRC
VRC
To maximize the available gain and linearity, choose VRC = VRC ,max = VCC − V̂o − VRE − 0.2
Note that VCE ,sat ≈ 0.2V is an approximation, you may increase it up to 0.5V to avoid clipping in case operat-
ing point shifts due to resistor tolerances.
í Choose IC such that
β 1
IC ≤
Ri N N |Av |
+ +
VRE + 0.7 VCC − VRE − 0.7 VRC
IRB1
where Ri is the minimum input resistance specified, and N ≈ ≥ 10 for β-insensitive design.
IB
Note that as long as VRC and VRE are kept the same, choice of IC does not change the output swing or the
available gain, but affects the input and output resistances, as well as the resistor values in the amplifier.
í Find the resistor values
VRC VRE RC β(VCC − VRE − 0.7) β(VRE + 0.7)
RC = RE = RG ≈ − re RB1 = RB2 =
IC IC |Av | NIC NIC
í Simulate the circuit for the final adjustment of RG .

Common-Collector Configuration
Figures 6 and 7 show the common-collector configurations for NPN and PNP BJTs, respectively. Also known as the
emitter-follower, analysis of this configuration yields
RB2 VRE
DC : VRB2 ≈ VCC VRE = VRB2 − 0.7 IE = ≈ IC (4)
RB1 + RB2 RE
Vo,ac RE
AC : Av = = Ri = RB1 k RB2 k (β + 1)(re + RE ) Ro = RE k re (5)
Vi re + RE
VCC VCC

RB1 RB1 Ri
Ro
Vi Vo Vo,dc Vi RB Vo,ac
RB2 RE RB2 VRB2 VRE RE RE

(a) (b) (c)

Figure 6: (a) NPN Common-Collector (Emitter-Follower) Configuration (b) DC equivalent (c) AC equivalent

VCC VCC

RB2 RE RB2 VRB2 VRE RE RE


Vo Vo,dc Ri Vo,ac
Ro
Vi RB1 RB1 Vi RB

(a) (b) (c)

Figure 7: (a) PNP Common-Collector (Emitter-Follower) Configuration (b) DC equivalent (c) AC equivalent

In typical multi-stage amplifiers, emitter follower is directly connected to a gain stage, such as a common-emitter
amplifier, without the extra biasing resistors RB1 and RB2 . Therefore, DC voltage levels in an emitter follower is
typically dependent on the previous amplifier stage.

4
Common-Base Configuration
Figures 8 and 9 show the common-base configurations for NPN and PNP BJTs, respectively. Analysis of this con-
figuration yields
RB2 VRE
DC : VRB2 ≈ VCC VRE = VRB2 − 0.7 IE = ≈ IC (6)
RB1 + RB2 RE
Vo,ac RC
AC : Av = = Ri = RE k re Ro = RC (7)
Vi re

VCC VCC

RB1 RC RB1 VRC RC RC Ro


Vo Vo,dc Vo,ac
Ri

RB2 RE Vi RB2 VRB2 VRE RE RE Vi

(a) (b) (c)

Figure 8: (a) NPN Common-Base Configuration (b) DC equivalent (c) AC equivalent

VCC VCC

RB2 RE RB2 VRB2 VRE RE RE Ri

Vi Ro Vi
Vo Vo,dc Vo,ac
RB1
RB1 RC VRC RC RC

(a) (b) (c)

Figure 9: (a) PNP Common-Base Configuration (b) DC equivalent (c) AC equivalent

Common-base stages are typically used in cascode or folded-cascode amplifiers, where a common-base stage is
directly following a common-emitter amplifier.

Calculations
1. Design the common-emitter amplifier in Fig. 4(a) with the following specifications:

Supply Voltage, VCC 5V


0-to-Peak Output Swing, V̂o ≥ 1V
Voltage Gain, |Av | 25
Input Resistance, Ri ≥ 2kΩ
Output Resistance, Ro ≤ 1.8kΩ
THD for 5kHz 1V (0-to-peak) Sine Wave Output Voltage, Vo ≤ 4%
Relative Variation of IC for VBE = 0.7 ± 0.1V ≤ 10%
Transistor’s Current Gain, β ≥ 100

Show your design procedure and all your calculations. Your design should be insensitive to β variations.
2. Using the same RB1 , RB2 and RE values from your common-emitter amplifier, calculate Av , Ri and Ro for the
emitter follower in Fig. 6.
3. Using the same RB1 , RB2 , RC and RE values from your common-emitter amplifier, calculate Av , Ri and Ro for
the common-base amplifier in Fig. 8.

5
Simulations
For all simulations, provide screenshots showing the schematics and the plots with the simulated values prop-
erly labeled.

1. Draw the common-emitter amplifier schematics in Figs. 4(a) and 5(a) using the calculated component values
and 2N3904 and 2N3906 transistors. For both circuits,
(a) Perform DC operating point or interactive simulation to obtain the DC solution for VRB2 , VRE , VRC ,
Vo,dc and IC .
(b) Perform AC simulation to obtain Av , Ri and Ro .
(c) Apply a 5kHz 40mV sine wave signal to the input Vi and obtain the time-domain waveforms for the
input and output voltages using transient simulation. Perform Fourier simulation to measure the total
harmonic distortion (THD) on the output waveform.
(d) Increase the input amplitude to measure the clipping levels at the output voltage Vo .
2. Draw the emitter-follower schematics in Figs. 6(a) and 7(a) using the calculated component values and 2N3904
and 2N3906 transistors. For both circuits,
(a) Perform DC operating point or interactive simulation to obtain the DC solution for VRB2 , VRE and IC .
(b) Perform AC simulation to obtain Av , Ri and Ro .
(c) Apply a 5kHz 0.8V sine wave signal to the input Vi and obtain the time-domain waveforms for the
input and output voltages using transient simulation. Perform Fourier simulation to measure the total
harmonic distortion (THD) on the output waveform.
3. Draw the common-base amplifier schematics in Figs. 8(a) and 9(a) using the calculated component values and
2N3904 and 2N3906 transistors. For both circuits,
(a) Perform DC operating point or interactive simulation to obtain the DC solution for VRB2 , VRE , VRC ,
Vo,dc and IC .
(b) Perform AC simulation to obtain Av , Ri and Ro .
(c) Apply a 5kHz 8mV sine wave signal to the input Vi and obtain the time-domain waveforms for the
input and output voltages using transient simulation. Perform Fourier simulation to measure the total
harmonic distortion (THD) on the output waveform.

Measurements
For all measurements, provide screenshots showing the plots with the measured values properly labeled.

1. Build the common-emitter amplifiers in Figs. 4(a) and 5(a) using the simulated component values and 2N3904
and 2N3906 transistors. For both circuits,
(a) Measure the DC values for VRB2 , VRE , VRC , Vo,dc and IC using the voltmeter or scope.
(b) Measure Av , Ri and Ro using the network analyzer.
(c) Apply a 5kHz 40mV sine wave signal to the input Vi and obtain the time-domain waveforms for the
input and output voltages using the scope. Measure the total harmonic distortion (THD) on the output
waveform using the spectrum analyzer.
(d) Increase the input amplitude to measure the clipping levels at the output voltage Vo using the scope.
2. Build the emitter-follower circuits in Figs. 6(a) and 7(a) using the simulated component values and 2N3904
and 2N3906 transistors. For both circuits,
(a) Measure the DC values for VRB2 , VRE and IC using the voltmeter or scope.
(b) Measure Av , Ri and Ro using the network analyzer.
(c) Apply a 5kHz 0.8V sine wave signal to the input Vi and obtain the time-domain waveforms for the
input and output voltages using the scope. Measure the total harmonic distortion (THD) on the output
waveform using the spectrum analyzer.

6
3. Build the common-base amplifiers in Figs. 8(a) and 9(a) using the simulated component values and 2N3904
and 2N3906 transistors. For both circuits,
(a) Measure the DC values for VRB2 , VRE , VRC , Vo,dc and IC using the voltmeter or scope.
(b) Measure Av , Ri and Ro using the network analyzer.
(c) Apply a 5kHz 8mV sine wave signal to the input Vi and obtain the time-domain waveforms for the
input and output voltages using the scope. Measure the total harmonic distortion (THD) on the output
waveform using the spectrum analyzer.

Report
1. Include calculations, schematics, simulation plots, and measurement plots.
2. Prepare a table showing calculated, simulated and measured results.
3. Compare the results and comment on the differences.

Demonstration
1. Build the common-emitter amplifier circuits in Figs. 4(a) and 5(a) on your breadboard and bring it to your lab
session. Be prepared to convert these two circuits into emitter followers in Figs. 6(a) and 7(a), and common-
base amplifiers in Figs. 8(a) and 9(a).
2. Your name and UIN must be written on the side of your breadboard.
3. Submit your report to your TA at the beginning of your lab session.
4. For the common-emitter amplifiers in Figs. 4(a) and 5(a):

• Measure Av , Ri , and Ro using the network analyzer.


• Apply a 5kHz 40mV sine wave input and show the time-domain output voltage using the scope.
• With the 5kHz 40mV sine wave input, measure the THD at the output using the spectrum analyzer.
5. Convert Figs. 4(a) and 5(a) to Figs. 6(a) and 7(a) by short-circuiting RC with a wire and removing the bypass
capacitor at the emitter, then
• Apply a 5kHz 0.8V sine wave input and show the time-domain waveforms at the input and the output
using the scope.
6. Remove the wire short-circuiting RC , add the bypass capacitor back to the emitter, remove RG , and AC-ground
the base through the capacitor to obtain the common-base amplifiers in Figs. 8(a) and 9(a), then
• Apply a 5kHz 8mV sine wave input and show the time-domain waveforms at the input and the output
using the scope.

You might also like