REVA UNIVERSITY School of ECE

CONTENTS

Sl.
Experiments Page Nos.
No.
1. Verification of Sampling Theorem 7-9
2. Delta Modulation 10-12
3. Adaptive Delta Modulation 13-15
4. TDM of two band limited Signals 16-19
5. ASK generation and detection 20-22
6. FSK generation and detection 23-26
7. PSK generation and detection 27-29
8. Line Coding and Decoding 30-38
9. DPSK generation and detection 39-42
10. QPSK generation and detection 43-47
11. PCM generation and detection using a CODEC chip 48-50
12. Optical Fiber (propagation loss, Bending loss, Numerical aperture) 51-55
13. Analog and Digital (with TDM) Communication link using OFC 56-60

Challenge Experiments - MATLAB Simulation

1. FSK generation and detection (MATLAB Simulation) 61-65

2. QPSK generation and detection (MATLAB Simulation) 66-71

Model Viva Questions 72-79

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REVA University School of ECE

B19EC5090 L T P C
Digital Communications Lab
Duration :14 Wks 0 0 2 2

Prerequisites:
Fundamentals of communications

Course Description:
Digital communication has proliferated in a big way in previous and today’s
electronic and telecommunication industries. It allows devices to exchange information digitally
while making the communication more clear and accurate without losses. In addition to
changing our daily lives, the transformation in digital communications paves a way to many
applications in fields such as signal processing, video compression, data compression, mobile
technology, etc. This course helps students to get a good idea of how the signals are digitized
and why digitization is needed. Various waveform coding techniques are discussed in detail.
The clear intentions behind choosing an appropriate digital modulation scheme are taught. This
course also covers different techniques to share a common channel among multiple devices for
data transmission. Finally, it presents various methods of spread spectrum technology in pursuit
of achieving secured communication.

Course Objectives:
The objectives of this course are to:
1. Demonstrate the Digital communication experiments.
1. Verify Sampling theorem for different frequencies.
2. Demonstrate different waveform coding techniques.
3. Demonstrate different digital modulation techniques.
4. Demonstrate losses and multiplexing techniques over an OFC.
Course Outcomes:
On completion of this course the student will be able to
1. Develop ability to verify sampling theorem.
1. Demonstrate multiplexing of two signals.
2. Construct the circuits for various digital modulation techniques.
3. Develop ability to generate PCM signals.

Mapping of Course Outcomes with program Outcomes

Cours POS/ P P P P P P PO P P P P P PS PS PS
e COs O O O O O O 7 O O O O O O1 O2 O3
Code 1 2 3 4 5 6 8 9 10 11 12
B18E CO1 1 2 3 4 1 2 1
C CO2 1 2 4 3 1 2 2
5090 CO3 1 2 2 4 1 2 3
CO4 2 2 3 4 1 2 3

I –CYCLE

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 Verification of Sampling Theorem

 Delta Modulation

 Adaptive Delta Modulation.

 TDM of two band limited Signals.

 ASK Generation and Detection.

II –CYCLE
 FSK generation and detection.

 PSK generation and detection

 Line Coding and Decoding.

 DPSK generation and detection.

III -CYCLE
 QPSK generation and detection

 PCM generation and detection using a CODEC chip.

 Optical Fiber (propagation loss, Bending loss, Numerical aperture).

 Analog and Digital (with TDM) Communication link using OFC.

CHALLENGE EXPERIMENTS - MATLAB SIMULATION

 a. FSK generation and detection (MATLAB Simulation)

b. Modify the above simulation to get BER < .

c. Demonstrate the constellation diagram for FSK.

 a. QPSK generation and detection (MATLAB Simulation)

b. Modify the above simulation to get BER < .

c. Demonstrate the constellation diagram for QPSK.

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1. VERIFICATION OF SAMPLING THEOREM

AIM: To verify the sampling theorem for under sampling, over sampling & Right sampling
for the given message signal and reconstruct the same with the help of suitable reconstruction
filter.

APPARATUS RERQUIRED: Resistors 47 K,1 K,3.3 K,Capacitor 0.1  f ,transistor

BC107, Op- amp A 741 ,Function Generator, Regulated DC Power supply, CRO.

THEORY: Sampling theorem states that a base band signal band limited to fm Hz can be
reconstructed from its samples only when it is sampled at a rate, fs greater than or equal to 2
fm.Flat top sampling is one of the practical aspects of sampling & signal recovery. In practice,
the sampling of analog signal is accomplished by means of high speed switching transistor
circuits. The operation of a physical switching circuit, however fast, generates a sequence of
rectangular samples of the signal. On another hand, rectangular sampling reduces the required
transmission bandwidth compared to ideal sampling.
Flat top sampling introduces amplitude distortion as well as a delay of T / 2, where T is
the duration of rectangular sample. The distortion caused by lengthening the samples is
referred to as ‘aperture effect’. This distortion may be corrected by connecting an equalizer in
cascade with the low-pass reconstruction filter.

TRANSISTOR BC 107:

CIRCUIT DIAGRAM:
Sampling Circuit:

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Sampling circuit Design:

We know that, R C > TS

Where TS = 1/fs
Also, Fs=5 kHz (sampling frequency)
TS = 200µs
Then R C >>200µs
Choose, R C = 4.7ms
Let C=0.1µf
Then R=47KΩ

Reconstructed Low pass Filter:

Reconstructed Low pass Filter Design:

Fm=500Hz (input message signal frequency)
C=0.1µf
Fm = 1/2πRC
= 3.183KΩ
R = 3.3KΩ

PROCEDURE:
1. Connections are made as shown in the circuit diagram.
2. Apply a sine wave of 5Vpp, 500 Hz as the test modulating signal.
3. Apply a pulse carrier signal of about 5-10Vpp, 5 KHz as the carrier signal.
4. The wave forms for the sampled output using reconstruction signal are
observed on the CRO.
5. Plot the input and output waveforms on a graph sheet.

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WAVEFORMS:

RESULT: Sampling Theorem has been verified for fc<2fm, fc=2fm, fc>2fm.

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2. DELTA MODULATION AND DEMODULATION

AIM: To demonstrate Delta modulation and demodulation.

APPARATUS REQUIRED: Delta modulation kit, patch chords, CRO.

THEORY: Delta modulation (DM) is an analog-to-digital and digital-to-analog-signal

conversion technique used for transmission of voice information where quality is not of
primary importance. In Delta modulation the transmitted data is 1-bit data stream or one-bit
version of the DPCM.In its basic form, DM provides a staircase approximation to the
oversampled version of an input baseband signal. The difference between the input and the
approximation is quantized into two levels, namely  , corresponding to positive and negative
differences, respectively. Thus, if the approximation falls below the signal at any sampling
epoch, it is increased by .If, on the other hand, the approximation lies above the signal, it is
diminished by.

BLOCK DIAGRAM:

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PROCEDURE:

1. Connections are made as shown in the connection diagram.

2. Apply an input sine wave of 250 HZ of 0 V through pot p1 and connect port 250 Hz to
port IN of the input buffer.

3. Connect output of buffer port out to digital sampler input port IN1.

4. Selecta a clock rate of 8 KHz by pressing Switch S1.The selected clock is indicated by
LED glow.

5. Keep the switch S2 in Delta () position.

6. Connect the output of digital sampler port OUT to input port IN of integrator 1.

7. Connect the output of integrator 1 port OUT to input port IN2 of digital sampler.

8. Observe the Delta modulated output at the output of digital sampler port OUT and
compare it with the clock rate selected.

9. Repeat the above mentioned procedure with different signal sources and selecting the
different clock rates and observe the response of delta modulator.

10. Connect the Delta modulated output port OUT of digital sampler to the input of Delta
Demodulator section port IN of Demodulator.

11. Connect output of demodulator port OUT to the input of integrator 3 port IN.

12. Connect output of integrator 3 port OUT to the input of output buffer port IN.

13. Connect output of output buffer port OUT to the input of 2nd order filter port IN.

14. Connect output of 2nd order filter port OUT to the input of 4th order filter port IN.

15. Keep the switch S4 in HIGH position.

16. Observe the reconstructed signal through 2nd order filter and 4th order filter.

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WAVEFORMS:

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RESULT: Delta Modulation and Demodulation has been verified.

3. ADAPTIVE DELTA MODULATION AND DEMODULATION

AIM: To demonstrate adaptive Delta modulation and demodulation.

APPARATUS REQUIRED: Delta modulation kit, patch cords, CRO.

THEORY: Adaptive delta modulation is a modification of delta modulation in which the step
size is not fixed and is in time varying form. In particular, during a steep segment of the input
signal the step size is increased .Conversely, when the input signal is varying slowly, the step
size is reduced. In this way the step size is adapted to the level of the input signal. The resulting
method is called as adaptive delta modulation. ADM reduces slope error, at the expense of
increasing quantizing error. This error can be reduced by using a low pass filter.

BLOCK DIAGRAM:

PROCEDURE:

1. Connections are made as shown in the connection diagram.

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2. Apply a input sine wave of 500 HZ of 2 V or above through pot P2 and connect port
1KHz to port IN of the input buffer.

3. Connect output of buffer port OUT to digital sampler input port IN1.

4. Select a clock rate of 32 KHz by pressing Switch S1.The selected clock is indicated by
LED glow.

5. Keep the switch S2 in Delta () position.

6. Connect the output of digital sampler port OUT to input port IN of integrator 2.

7. Connect the output of integrator 2 port OUT to input port IN2 of digital sampler.

8. Keep the switch S3 in LOW position.

9. Connect the Delta modulated output port OUT of digital sampler to the input of Delta
Demodulator section port IN of Demodulator.

10. Connect output of demodulator port OUT to the input of integrator 3 port IN.

11. Connect output of integrator 3 port OUT to the input of output buffer port IN.

12. Connect output of output buffer port OUT to the input of 2nd order filter port IN.

13. Connect output of 2nd order filter post OUT to the input of 4th order filter post IN.

14. Keep the switch S4 in LOW position.

15. Observe the reconstructed signal through 2nd order filter and 4th order filter.

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WAVEFORMS:

RESULT: Adaptive Delta Modulation and Demodulation has been verified.

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4. TDM OF TWO BANDLIMITED SIGNALS

AIM: To illustrate the working of Time division multiplexing and recovery of two
bandlimited signals.
APPARATUS REQUIRED: Transistor SL100, SK100, Op-amp μA 741, Resistors 1KΩ
8nos, 1.5KΩ, Function Generator, Regulated DC Power supply, CRO.

THEORY: TDM is a technique used for transmitting several message signals over a
communication channel by dividing the time frame into slots, one slot for each message signal.
This is a digital technique in which the circuit is highly modular in nature and provides reliable
and efficient operation. There is no cross talk in TDM due to circuit non-linearity since the
pulses are completely isolated. But it also has disadvantages, which include timing jitter and
synchronization is required.
Here, the carrier used is a square wave like in pulse modulation techniques. When the
carrier is ON, one of the messages gets sampled and is output. When the carrier is OFF,
another message gets sampled and is output. The amplitude of a periodic train of pulses is thus
varied in proportion to the message signals. TDM provides an effective method for sharing a
communication channel.

CIRCUIT DIAGRAM:
Modulation:

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Demodulation:

PROCEDURE:
1. Rig up the circuit as shown in the circuit diagram for Multiplexer.
2. Apply two input message signals m1 (sinewave) and m2 (Triangular) of 2V (P-P),
200Hz.
3. Apply a carrier signal of 2V (P-P), 2 kHz.
4. Observe the multiplexed output in CRO.
5. Rig up the Demodulator circuit as shown in the circuit diagram for Demultiplexer.
6. Observe the Demultiplexer output in the CRO.
7. Plot the input and output waveforms on a graph sheet.
WAVEFORMS:

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MULTIPLEXED OUTPUT:

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DEMULTIPLEXED OUTPUT:

RESULT: TDM and its recovery has been verified by observing the waveforms.
5. ASK GENERATION AND DETECTION

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AIM: To Generate and detect ASK to transmit digital data using a suitable carrier signal.

APPARATUS REQUIRED: Transistor SL100, Op-amp μA 741, Diode OA 79, Resistors

1.5KΩ, 4.7KΩ, 10KΩ (pot), 10KΩ, 1KΩ, Capacitors 0.22f ,Function Generator, Regulated
DC Power supply, CRO.

THEORY: In binary ASK system binary symbol 1 is represented by transmitting a sinusoidal

carrier wave of fixed amplitude Ac and fixed frequency fc for the bit duration Tb whereas binary
symbol 0 is represented by switching of the carrier for Tb seconds.
ASK signal can be generated by applying the incoming binary data and the sinusoidal carrier to
the two inputs of a product modulator. The resulting output is the ASK wave. The ASK signal
is demodulated using an envelope detector and comparator.

CIRCUIT DIAGRAM:
Modulation:

Demodulation:

DESIGN:

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(a) Modulation:
Let ICsat = 2mA, hfe = 30 VBEsat = 0.7V, VCEsat = 0.2v
We know that IB > IC/ hfe
= 2mA/30
IB = 0.06667mA
Choose IB = 1 mA
Then RE = VE/IE == (Vc-VCE)/IE (IE=IB+IC)
= (5-0.2)/3mA
= 1.6KΩ (Choose standard value 1.5KΩ)
Also RB= (Vm-VBE-VE)/IB
= (10-0.7-0-4.8)/ 1mA
=4.5K Ω (Choose standard value 4.7KΩ)
(b) Demodulation:
We know that for envelope detector 1/fc < RC < 1/fm
Take fcmax = 10 kHz
Then, 1/10 kHz < R x C <1/1 kHz
So, 0.1ms< R x C < 1ms.
Take R x C = 0.22ms, and let C = 0.22F
Then R = 1KΩ

PROCEDURE:
1. Rig up the modulation circuit as shown in the figure.
2. Apply a message signal of pulse wave of 10 V (P-P), 1 kHz.
3. Apply a carrier signal of sinusoidal wave of 10V (P-P), 10 kHz.
4. Note the peak to peak value of the ASK modulated signal from the CRO.
5. Rig up the demodulation circuit and observe demodulated signal in CRO.
6. Plot the input and output waveforms on a graph sheet.

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WAVEFORMS:

RESULT: Amplitude shift keying generation and detection has been verified.

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6. FSK GENERATION AND DETECTION

AIM: To generate and detect FSK to transmit digital data using a suitable carrier signal.

APPARATUS REQUIRED: Transistor SL100, SK100,Op-amp μA 741 (2nos), Diode OA79,

Resistors 680Ω (2nos), 560Ω (2nos), 10KΩ (4nos), 10KΩpot, Capacitors 0.1F (3nos),
0.22F, Function Generator, Regulated DC Power supply, CRO.

THEORY: Frequency Shift Keying is the process of generating a modulated signal from a
digital data input. If the incoming bit is 1, a signal with frequency f1 is sent for the duration of
the bit Tb. If the bit is 0, a signal with frequency f2 is sent for the duration of this bit. This is
the basic principle behind FSK modulation.
Two transistors are used in switching configuration to obtain FSK signal. When the input bit is
1, NPN transistor is ON and the corresponding carrier signal is output. If the input bit is 0, PNP
transistor is ON and the corresponding carrier is output. The output is given to an OP-AMP to
achieve amplification.
In the demodulator circuit, the FSK modulated signal is applied to a low pass filter. This filter
passes the frequency of either 0 or 1. This filter passes the selected frequency and rejects the
other. Thus ASK is obtained and then demodulated using envelope detector and comparator.

CIRCUIT DIAGRAM:
Modulation:

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Demodulation:

DESIGN:

Modulation:
ICsat = 2mA; hfe = 30; VBEsat = 0.7V; VCEsat = 0.2v
We know that IB =IC/ hfe
= 2mA/0.3
IB = 0.0667mA
Choose IB=6.67mA (To make Q point be very much in the saturation region)
Also RE = VE/IE == (Vc-VCE)/IE
= (5-0.2)/8.667mA
= 553.82Ω (=560 Ω)
Also RB= (Vm-VBE-VE)/IB
= (10-0.7-0-4.8)/ IB
RB=675 Ω (=680 Ω)

Demodulation:

For LPF:

To convert FSK signal to ASK, the LPF must allow 1 KHz signal but reject 3 KHz signal
or vice versa.

Here, the LPF is designed to pass 1 KHz.

So the design equation can be written as:

1
1KHz   f c , LPF  3KHz
2RC .

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Choose fc=1.5 KHz.

1
R  1.06 K
Let C=0.1  F, then 2f c , LPF C
(Choose R=1KΩ)

For envelope detector:

We know that 1/fc < R x C < 1/fm

Take fcmax = 3 KHz

Then, 1/3 KHz < R x C <1/100

Implies, 0.3ms< R x C < 10ms.

Take R x C = 2.2ms, and let C = 0.22F

Then R = 10KΩ

PROCEDURE:
1. Rig up the modulation circuit as shown in the figure.

2. Generate a message signal of pulse wave of 5-10 V (P-P), 100Hz.

3. Generate two carrier signals of sinusoidal wave C1 (t) of 5-10V (P-P), 3 KHz and

C2 (t) of 5-10V (P-P), 1 KHz.

4. Note the frequencies fmax and fmin of the FSK modulated signal from the CRO.

5. Rig up the demodulation circuit and observe demodulated signal in CRO.

6. Plot the input and output waveforms on a graph sheet.

WAVEFORMS:

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RESULT: Frequency shift keying generation and detection has been verified.
7. PSK GENERATION AND DETECTION

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AIM: To generate and detect PSK to transmit digital data using a suitable carrier signal.

APPARATUS REQUIRED: Transistor SL100, SK100, Op-amp μA 741 (3nos), Diode OA

79, Resistors 560Ω (2nos), 680Ω (2nos), 10KΩ (6nos), Capacitors 0.1F (2nos), 0.22F,
Potentiometer 10KΩ (2nos), Function Generator, Regulated DC Power supply, CRO.

THEORY: Phase Shift Keying is a digital modulation Technique. A sinusoidal carrier of a

fixed amplitude and frequency is taken. The digital data of 1’s and 0’s is converted to
s (t )  AC cos(2f c t )
respectively. Here, Phase shift keying is obtained using a switch
s (t )  AC cos(2f c t   )
followed by OP-AMP circuitry. If incoming bit is 0, the output is same as the carrier; if it is
zero, the output is 1800 phase shifted version of the carrier signal. For demodulation the PSK
signal is converted to ASK signal using OPAMP circuit and then ASK signal is demodulated
using an envelope detector and comparator.

CIRCUIT DIAGRAM:
Modulation:

Demodulation:

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DESIGN:

Modulation:
ICsat = 2mA; hfe = 30; VBEsat = 0.7V; VCEsat = 0.2v
We know that IB > IC / hfe
> 2mA/30
IB >0.0667mA. So choose IB=6.67mA
Also RE = VE/IE == (Vc-VCE)/IE
= (5-0.2)/8.667mA = 553.82Ω (=560 Ω)
Also RB= (Vm-VBE-VE)/IB
= (10-0.7-0-4.8)/ IB =675 Ω (=680 Ω)

Demodulation:

We know that 1/fc < R x C < 1/fm. Here fcmax = 1 kHz

Then, 1/1kHz < R x C <1/100
Implies, 1ms< R x C < 10ms.
Take R x C = 2.2ms, and let C = 0.22F
Then R = 10KΩ (pot)

PROCEDURE:
1. Rig up the modulation circuit as shown in the circuit diagram.

2. Apply a message signal of pulse wave of 5-10 V (P-P), 100Hz.

3. Apply a carrier signal of sinusoidal wave C (t) of 5-10V (P-P), 1 K Hz.

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4. Note down the 180 degree phase shift of the PSK modulated signal from the CRO.

5. Rig up the demodulation circuit and observe demodulated signal in CRO.

6. Plot the input and output waveforms on a graph sheet.

WAVEFORMS:

RESULT: Phase shift keying generation and detection has been verified.
8. LINE CODING & DECODING

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AIM: To demonstrate several line coding and decoding formats for a given 8 bit binary data.

APPARATUS REQUIRED: Line coding and decoding Trainer Kits, Patch Cords and CRO.

THEORY: A line code is the code used for data transmission of a digital signal over a
transmission line. This process of coding is chosen so as to avoid overlap and distortion of
signal such as inter-symbol interference. A line code is a code chosen for use within a
communications system for transmitting a digital signal down a line. The common types of line
encoding are unipolar, polar, bipolar and Manchester encoding.
Non-Return to Zero (NRZ) - The most common and easiest way to transmit digital signals is to
use two different voltage levels for the two binary digits. These signals don’t return to zero
with the clock.
Logic 1 bit is sent as a high level/ high value/ positive voltage
Logic 0 bit is sent as a low level/ low value/ negative voltage
i) NRZ – L (Non return to zero level)
This is the standard positive logic signal format most extensively used in digital circuits.
Logic 1 bit is sent as a high value/ high level
Logic 0 bit is sent as a low value/ low level
ii) NRZ-M (Non return to zero mark)
These are most extensively used in magnetic tape recording.
Logic 1’s bit are marked by change in the levels
Logic 0’s bit are sent by no transitions (keeps sending the previous level).
iii) NRZ-S (Non return to zero space)
These are also used in magnetic tape recording. It is used in wireless and satellite applications.
This is complimentary to NRZ-M.
Logic 1’s bit are sent by no transitions (keeps sending the previous level).
Logic 0’s bit are marked by change in the levels
iv) Unipolar
In unipolar encoding technique, only one voltage levels are used. It uses only one polarity of
voltage level. It is used in non-coherent communication.
Logic 1’s bit are sent when there is a transition between 0 to + Vcc.
Logic 0’s bit are sent when no pulse (zero pulse)
v) Bipolar
In bipolar encoding technique, two voltage levels are used.
Logic 1’s bit are sent when there is a transition between +Vcc to –Vcc (ie, positive or negative
pulse for half the bit period).
0 keeps a zero level during bit period
Biphase (Phase Encoded)
To overcome the limitations of NRZ encoding, biphase encoding techniques can be adopted.
These are used in magnetic tape recording, OFC etc. It uses only half bit duration of pulse
transition. It is a synchronous clock coding technique used by physical layer (in LAN) to
encode the clock and data of synchronous bit stream.
vi) BIO-L (Biphase – Level / Manchester coding)
Two consecutive bits of the same type have a transition at the beginning of a bit period. In
Manchester coding the mid-bit transition serves as a clocking mechanism and also as data.
Logic 1 bit is represented by half bit duration pulse positioned at first half of the bit interval.
Logic 0 bit is represented by half bit duration pulse positioned at second half of the bit interval.
vii) BIO-M (Biphase – Mark / Differential Manchester coding)

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In Biphase-M, a transition occurs at the beginning of every bit interval. There is always a
transition halfway between the conditioned transitions.
Logic 1 bit is represented by half bit duration pulse at second transition of the bit interval
Logic 0 bit is represented by no transition (keeps level constant).
viii) BIO-S(Biphase – Space / Differential Manchester coding)
In Biphase-M, a transition occurs at the beginning of every bit interval. There is always a
transition halfway between the conditioned transitions. Thus, used in token ring. In this,
inversion in the middle of each bit is used for synchronization.
Logic 1 bit is represented by no transition (keeps level constant).
Logic 0 bit is represented by half bit duration pulse at second transition of the bit interval
ix) URZ (Unipolar Return to Zero)
Return to Zero signals return to zero with the clock. Thus it is Unipolar Return to Zero.
Logic 1 bit is represented by half bit duration pulse and return to zero
Logic 0 bit is represented by absence of a pulse.
x) RZ - AMI (Return to Zero – Alternate Mark Inversion)
It is commonly used multilevel signal (three or more levels of voltages) to represent the binary
data. It is used in satellites, telemetry systems.
Logic 1 bit is represented by equal amplitudes of alternating pulses (between +Vcc to –Vcc).
This return to zero after every half bit interval.
Logic 0 bit is represented by absence of a pulse.

BLOCK DIAGRAM:

BLOCK DIAGRAM FOR NRZ, URZ, BIO DATA FORMAT

BLOCK DIAGRAM FOR UNIPOLAR TO BIPOLAR AND BIPOLAR TO UNIPOLAR

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BLOCK DIAGRAM FOR AMI ENCODER AND DECODER

PROCEDURE:
1. Refer to the block diagram and carry out the following connections and switch settings.
2. Connect power supply in proper polarity to the kit DCL-05 and switch it on.
3. Select desired data pattern using switch SW1.
4. Connect DATA CLK and SERIAL DATA generated on board to CODE CLK and
DATA IN of DATA ENCODER respectively by means of the patch-chords provided.
5. Observe the encoded signal at respective outputs of DATA ENCODER on the
oscilloscope.
6. For decoding the signal connect DATA CLK to DECODE CLK and NRZ-L, NRZ-
M, NRZ-S, URZ, BIO-L, BIO-M, BIO-S output of DATA ENCODER to respective
inputs i.e. IN1, IN2, IN3, IN4, IN5, IN6, IN7 of DATA DECODER.
7. Observe the decoded signal at respective outputs i.e. OUT1, OUT2, OUT3, OUT4,
OUT5, OUT6, OUT7 of DATA DECODER on the oscilloscope. It should be same as
DATA IN.
8. Use RST switch for clear data observation if necessary.
9. Unipolar to Bipolar / Bipolar to Unipolar (Refer to the block diagram):
a. Connect SERIAL DATA signal to the input post IN10 of Unipolar to Bipolar and
Observe the Bipolar output at post OUT10 of Unipolar to Bipolar.
b. Then connect bipolar output signal OUT10 of Unipolar to Bipolar to the input post
IN11 of Bipolar to Unipolar and observe unipolar output at post OUT11 of Bipolar
to Unipolar. It should be same as IN10 of Unipolar to Bipolar.
10. AMI Encoder and Decoder (Refer to the block diagram):
a. Connect SERIAL DATA signal to the input post IN8 of AMI Encoder should be
same as serial data.
b. Observe the AMI Encoder output at post OUT8.
c. Then connect OUT8 of AMI Encoder to the input post IN9 of AMI Decoder and
Observe the AMI Decoder output at post OUT9. It should be same as IN8

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WAVEFORMS:

CH 1 : DATA IN & CH 2: NRZ-L

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CH 1 : IN 10 & CH 2: OUT 11

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RESULT: Various line coding and decoding formats as been verified for a given 8 bit binary
data.

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9. DPSK GENERATION AND DETECTION

AIM: To Demonstrate DPSK generation and detection for a given 8 bit binary input data.

APPARATUS REQUIRED: DPSK trainer kit, Patch Cords, and CRO.

BLOCK DIAGRAM: (Using Micro Lab Kit)

THEORY: Differential phase shift keying (DPSK) is a common form of phase modulation
conveys data by changing the phase of carrier wave. Thus it can be regarded as a noncoherent
version of BPSK. DPSK eliminates the need for a coherent reference signal at the receiver by
combination of two basic operations: i) Differential encoding of binary input ii) Phase Shift
keying (PSK). For symbol 0, a carrier signal with 180˚ phase shift is transmitted and for
symbol 1, a carrier signal with 0˚ phase shift (phase unchanged) is transmitted. In DPSK
Transmitter, Binary input data with an arbitrary bit as reference is differentially encoded with
XOR encoder.

DPSK receiver implementation merely requires that sample values be stored, thereby avoiding
the need for delay lines that may be needed otherwise. During the demodulation, the DPSK
signal is converted into a +5v square wave signal using a transistor and is applied to one input
of an EXOR gate. To the second input of the gate, carrier signal is applied after conversion into
a +5v signal. So the, EX-OR gate output is equivalent to the differential signal of the
modulating data. This differential data is applied to the one input of an XOR gate and to the

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second input, after one-bit delay the same signal is given. So the output of this is modulating
signal.
PROCEDURE:
1. Connect the power supply in proper polarity to the DPSK trainer kit and switch it on.
2. Connect the carrier output of carrier SIN0 (TP3) and SIN180 (TP4) degree to the
PSK/DPSK modulator Block TP9 and TP7 respectively as show in the connection
diagram.
3. Connect the Serial Data Bit output (TP14) to the Differential Encoder-2 (EX-OR logic)
input at TP20.
4. Observe the differential data with EX-OR logic at the output of Differential Encoder -2
at TP23.
5. Connect the Differential Encoder-2 output at TP23 to Data input (TP11) of PSK/DPSK
Modulator block.
6. Observe the DPSK output signal at TP13 using CRO.
7. Connect the DPSK signal at TP13 to PSK/DPSK Demodulator at TP23/TP24.
8. Observe the DPSK demodulated data (ie, recovered data from DPSK signal) at TP27
using CRO.
9. Plot the input and output waveforms on a graph sheet.
WAVEFORMS:

RESULT: DPSK generation and detection has been verified for the given 8 bit binary data
input.

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9. DPSK GENERATION AND DETECTION

AIM: To Demonstrate DPSK generation and detection for a given 8 bit binary input data.

EQUIPMENTS:
 Experimenter Kit ADCL-01.
 Connecting Cords.
 Power supply.
 20 MHz Dual Trace Oscilloscope.

BLOCK DIAGRAM: (Using Falcon Kit)

PROCEDURE:

1. Refer to the block diagram and carry out the following connections and switch settings.

2. Connect the power supply in proper polarity to the kits ADCL-01 and switch it on.

3. Select Data pattern of simulated data using switch SW1.

4. Connect SDATA generated to DATA IN of the NRZ-L CODER.

5. Connect the NRZ-L DATA out to the DATA IN of the DIFFERENTIAL ENCODER.

6. Connect the clock generated SCLOCK to CLK IN of the DIFFERENTIAL ENCODER.

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7. Connect the differentially encoded data to control input C1 of CARRIER MODULATOR.

8. Connect carrier component SIN 1 to IN1 and SIN 2 to IN2 of the Carrier modulator Logic.

9. Connect DPSK modulated signal MOD OUT to MOD IN of the BPSK DEMODULATOR.

10.Connect output of BPSK demodulator b(t) OUT to input of DELAY SECTION b(t) IN and
one output b(t) IN of decision device.

11. Connect the output of delay section b (t-Tb) OUT to the input b (t-Tb) IN of Decision
device

12. Compare the DPSK decoded data at DATA OUT with respect to input SDATA.

13.Observe the various waveforms as, if recovered data mismatches with respect to the
transmitter data, then use RESET switch for clear observation of data output.

14. Plot the input and output waveforms on a graph sheet.

MODEL WAVEFORMS:

RESULT: DPSK generation and detection has been verified for the given 8 bit binary data
input.

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10. QPSK GENERATION AND DETECTION

AIM: To Demonstrate QPSK generation and detection for a given 8 bit binary input data.
APPARATUS REQUIRED: QPSK trainer kit, Patch Cords, and CRO.
BLOCK DIAGRAM : (Using Microlab Kit)

THEORY: The “PSK” in QPSK refers to the use of Phased Shift Keying. PSK refers to
discrete number of states. With half the number of states, it is BPSK. With twice the number of
states as QPSK. QPSK refers to PSK with 4 states, ie, “Quad” in QPSK refers to four phases
in which a carrier is sent in 0º, 90º, 180º, and 270º.There are various methods to modulate and
demodulate. One way is of modulating the data bits is, the incoming data stream is divided into

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2 streams, one containing the odd bit stream (I bit at TP7), and the other having even bit stream
(Q bit at TP8). Both are converted into PSK modulated signals. The carriers used for
modulating the two data streams have same frequency but are 900 out-of-phase with each other.
The thus obtained two BPSK modulated signals are added together to produce a QPSK
modulated signal.

QPSK modulator generates four modified carrier phases (0°, 90°, 180°, and 270°) obtained in
the modulator by rotating the angles of the QPSK constellation. Then, a simple XNOR
operation between each phase and the modulated signal will produce a logic "1" only if both
coincide. If the received phase is 0° (related to dibit 00), all XNORs produce a logic "0" .If the
phase is 90° (dibit 10), only the upper branch gives a "1". This situation is inverted for 270°
(dibit 01). In this case, the logic "1" is produced at the lower branch. But if the phase is 180°
(dibit 11), a logic "1" is added to both branches. The result is the demodulated PCM signal.

PROCEDURE:
QPSK Modulation
1. Connect the power supply in proper polarity to the QPSK trainer kit and switch it on.
2. For the given 8 bit binary input data, observe the 8 bit Serial data out at Testpoint1(TP1)
and Testpoint2(TP2).
3. Connect the Serial Output Data (TP2) to Serial Data input (TP5).
4. Observe the carrier SIN0, SIN90, SIN180 and SIN270 in TP15, TP13, TP17 and TP11
respectively.
5. Connect the TP15 (SIN0) to TP18 (SIN0) of QPSK Modulator.
6. Connect the TP13 (SIN90) to TP19 (SIN90) of QPSK Modulator.
7. Connect the TP 17 (SIN180) to TP20 (SIN180) of QPSK Modulator.
8. Connect the TP11 (SIN270) to TP21 (SIN270) of QPSK Modulator.
9. Observe the Even (I bits) and odd (Q bits) bits at TP7 and TP9 respectively.
10. Connect the Even bit (TP7) to the Even bits (TP22) of QPSK Modulator.
11. Connect the Odd bit (TP9) to the Odd (TP23) of QPSK Modulator.
12. Observe and Sketch the QPSK Modulated output at TP25 using CRO.
QPSK Demodulation
1. Connect the QPSK Modulated output (TP25) to the QPSK input (TP27).
2. Observe and sketch the Even Bit at TP30.
3. Observe and sketch the Odd Bit at TP31.
4. Combine the EVEN and Odd bits to get original Data bits at the TP32.
5. Observe and Sketch the QPSK demodulated output at TP32 using CRO.
6. Plot the input and output waveforms on a graph sheet.

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WAVEFORMS:

RESULT: QPSK generation and detection has been verified for the given 8 bit binary data
input.

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10. QPSK MODULATOR & DEMODULATOR

AIM: To Demonstrate QPSK generation and detection for a given 8 bit binary input
data.

EQUIPMENTS:
 Experimenter kits ADCL-02 & ADCL-03
 Connecting Chords
 Power supply
 20 MHz Dual Trace Oscilloscope

BLOCK DIGRAM :( Using Falcon Kit)

PROCEDURE:
1. Refer to the block diagram and carry out the following connections and switch settings.
2. Connect power supply in proper polarity to the kits ADCL-02 & ADCL-03 and switch
it on.
3. Select Data pattern of simulated data using switch SW1.
4. Connect SDATA generated to DATA IN of the NRZ-L CODER.
5. Connect NRZ-L to DATA IN of the DIBIT CONVERSION.
6. Connect SCLOCK to CLK IN of the DIBIT CONVERSION.
7. Connect the dibit data 1 & Q bit to control input C1 and C2 of CARRIER
MODULATIOR respectively. NOTE: Adjust 1 & Q bit as shown in fig by operating
RST Switch on ADCL-2 before connecting it to C1 & C2.
8. Connect carrier component to input of CARRIER MODULATOR as follows:
a. SIN 1 to IN1
b. SIN 2 to IN2
c. SIN 3 to IN3
d. SIN 4 to IN4

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9. Connect QPSK modulated signal MOD OUT on ADCL-02 to the MOD IN of the
QPSK DEMODULATOR on ADCL-03. NOTE: Adjust recovered 1 & Q bit an
ADCL-03 as per ADCL-02 by RST switch on ADCL-03.
10. Connect 1BIT, Q BIT & CLK OUT outputs of QPSK Demodulator to 1 BIT IN, Q
BIT & CLK IN posts of Data Decoder respectively.
11. Observe various waveforms as mentioned below fig.

WAVEFORMS:

RESULT: QPSK generation and detection has been verified for the given 8 bit binary data
input.

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11. PCM GENERATION AND DETECTION USING A CODEC

CHIP
AIM: To generate and detect a PCM signal using a CODEC chip.

APPARATUS REQUIRED: IC 7493 (2nos), IC 44233 (1no), Resistors 1KΩ, 560Ω,

Function Generator, Regulated DC Power supply, CRO.

THEORY: PCM is a digital representation of an analog signal where the magnitude of the
signal is sampled regularly at uniform intervals, then quantized to a series of symbols in a
numeric (usually binary) code.
It refers to a system in which the standard values of a quantized wave are indicated by a
series of coded pulses. When these pulses are decoded, they indicate the standard values of the
original quantized wave. In this method of signal coding, the message signal is sampled and the
amplitude of each sample is rounded off (approximated) to the nearest one of a finite set of
discrete levels, so that both time and amplitude are represented in discrete form. This allows
the message to be transmitted by means of a digital (coded) waveform, thereby distinguishing
pulse-code modulation form all analog modulation techniques. The essential operations in the
transmitter of a PCM system are sampling, quantizing and encoding and the whole process is
called as analog- to- digital conversion. At the receiver the operations of decoding and
reconstruction are performed to recover the analog message signal and whole process is called
as digital-to-analog conversion.

PIN DETAILS OF IC 7493 PIN DETAILS OF IC 44233

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CIRCUIT DIAGRAM:

PROCEDURE:
1. Connections are made as per the circuit diagram.
2. A TLL, clock of 2MHz is applied to the counter IC 7493 at pin number 14 and observe
the output at pin number 11 and it should be 125 kHz (divided by 16 of 2MHz).
3. Check the output at pin number 11 of the 2nd IC7493, which will be approximately 8 kHz
(divided by 16 of 2MHz).
4. Apply a sinusoidal message 1 V (P-P), 1 kHz at pin no 1 of IC44233.
5. Observe the PCM output at pin number 8 of IC44233. You may have to change the time
range of oscilloscope to convenient range to observe the frame time (50 μs range) and the
8-bit word length (0.5 μs range).
6. Observe the demodulated output at pin number 5 of IC44233 and compare it with
original message signal.
7. Observe the changes at the PCM output and demodulated output by changing the
frequency and amplitude of the message signal.
8. Plot the input and output waveforms on a graph sheet.

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WAVEFORMS:

RESULT: Generation and detection of PCM signal has been verified using a CODEC chip.

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12. OPTICAL FIBER (Propagation Loss, Bending Loss, Numerical

Aperture)
AIM: To determine the attenuation loss, bending loss, numerical aperture in a Optical Fiber
communication.

APPARATUS REQUIRED: Optical fiber trainer Kit, Optical Fiber Cables (1m & 3m),
Numerical aperture measurement jig, Function generator, CRO.

THEORY: Optical Fibers are available in different variety of materials. These materials are
usually selected by taking into account their absorption characteristics for different
wavelengths of light. In case of Optical Fiber, since the signal is transmitted in the form of
light, which is completely different in nature to study the losses in fiber.
Losses are introduced in fiber due to various reasons. As light propagates from one end of
Fiber to another end, part of it is absorbed in the material exhibiting absorption loss. Also part
of the light is reflected back or in some other directions from the impurity particles present in
the material contributing to the loss of the signal at the other end of the Fiber. In general terms
it is known as propagation loss.
Whenever the condition for angle of incidence of the incident light is violated the losses are
introduced due to refraction of light. This occurs when fiber is subjected to bending loss.
Lower the radius of curvature more is the loss.
Numerical aperture refers to the maximum angle at the light incident on the fiber end is
totally internally reflected and is transmitted properly along the Fiber. The cone formed by the
rotations of this angle along the axis of the Fiber is the cone of acceptance of the Fiber. The
light ray should strike the fiber end within its cone of acceptance; else it is refracted out of the
fiber core.

BLOCK DIAGRAM:
Propagation loss and bending loss:

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NOTE: - Keep all switch faults in off position.

PROCEDURE:
1. Connect the power supply cables with proper polarity to trainer kit. While connecting
this, ensure that the power supply is OFF.
2. Keep SW9 towards TX1 position for SFH756 (660nm).
3. Keep jumpers & SW8 position as shown in fig.
4. Keep intensity control pot P2 towards minimum position.
5. Switch ON the power supply.
6. Feed about 2Vpp sinusoidal signal of 1 KHz from the function generator to the Analog
Buffer.
7. Connect the output post out of Analog Buffer to the transmitter.
8. Slightly unscrew the cap of SFH756V (660nm). Do not remove the cap from the
connector. Once the cap is loosened, insert the 1 Meter Fiber into the cap. Now tighten
the cap by screwing it back.
9. Connect the other end of the Fiber to detector SFH 350V (Photo Transistor Detector)
very carefully as per the instruction in above step.
10. Observe the detected signal at post Analog out on oscilloscope. Adjust intensity control
pot P2 Optical Power control potentiometer so that you receive signal of 2Vpp
amplitude.

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a) Measurement of Propagation loss :

11. Measure the peak value of the received signal at Analog out terminal. Let this value be
V1.
12. Now replace 1 meter Fiber by 3 Meter Fiber between same LED and Detector. Do not
disturb and settings. Again take the peak voltage reading and let it be V2.
13. If α is the attenuation per km of the Fiber, then we have
10 V 
αdB=  Log 10  2 
L1  L2  V1 
Where α= dB/Km; L1=Fiber Length for V1; L2=Fiber Length for V2. This α is for the
wavelength of 660nm
14. Now switch off the power supply.
15. Keep SW9 towards TX1 position for SFH756.
16. Set the jumpers to form simple analog link using LED SFH450V at 950nm and
phototransistor SFH350V (Photo Transistor Detector) with 1meter Fiber Cable.
17. Switch on the power supply.
18. Repeat the same procedure as above again for this link to get α at 950nm.
19. Compare the two α values.

b) Measurement of bending loss:

1. Set up the 660nm analog link using 1-meter fiber as per procedure discussed previously.
2. Bend the Fiber in a loop. (As shown in fig) measure the amplitude of the received signal.
3. Keep reducing the diameter of bend to about 2cm & take corresponding out voltage
readings. (Do not reduce loop diameter less than 2cm).
4. Plot a graph of the received signal amplitude versus the loop diameter.

Sl .no Loop diameter Voltage

1 8 cm

2 6 cm

3 5 cm

4 4 cm

5 3 cm

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Numerical Aperture:

Ray diagram indicating Acceptance Angle:

PROCEDURE:
1. Make connections as shown in fig. and connect the power supply cables with proper
polarity to Link-B kit. While connecting this, ensure that the power supply is off.
2. Keep Intensity control pot P2 towards minimum position.
3. Keep Bias control pot P1 fully clockwise position.
4. Switch on the power supply.
5. Slightly unscrew the cap of SFH756V (660nm). Do not remove the cap from the
connector. Once the cap is loosened, insert the 1 Meter Fiber into the cap. Now

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tighten the cap by screwing it back.

6. Set up the 660nm analog link using 1-meter fiber. Insert the other end of the Fiber
into the numerical aperture measurement jig. Adjust the fiber such that its cut face is
perpendicular to the axis of the fiber.
7. Keep the distance of about 5mm between the fiber tip and the screen. Gently tighten
the screw and thus fix the fiber in the place.
8. Increase the intensity pot P2 to get bright red light circular patch.
9. Now observe the illuminated circular patch of light on the screen.
10. Measure exactly the distance d and also the vertical and horizontal diameters MR and
PN as indicated in the fig.
11. Mean radius is calculated using the following formula r = (MR+PN)/ 4.
r
12. Find the numerical aperture of the Fiber using NA =sin(θmax) = where, θmax
d 2
 r2
is the maximum angle at which the light incident is properly transmitted through the
given fiber.
13. Keep Intensity control pot P2 towards minimum position.

RESULT: Optical fiber communication conducted with the the propagation loss =________,
Bending loss =____________ and numerical aperture=____________

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13. Analog and Digital (with TDM) COMMUNICATION LINK

USING OFC

AIM: To demonstrate the working of analog and digital communication link (with TDM) using
Optical Fiber.

APPARATUS REQUIRED: Optical Fiber trainer Kit, Optical Fiber Cables (1m & 3m),
Function generator, CRO.

THEORY: Fiber optic links can be used for transmission of analog as well as digital signals.
Basically a fiber optic link contains three main elements a transmitter, an optical fiber and a
receiver. The transmitter module takes the input signal in electrical form and transforms it into
optical (light) energy containing the same information. The optical fiber is the medium which
carries this energy to the receiver. At the receiver, the light energy is converted back into
electrical form with the same pattern as originally fed to the transmitter.

In TDM various signals are sampled and transmitted for a fixed duration of time
one after the other. At the receiving end, these signals are extracted in the same order and form
of transmission. Using this technique, more number of data channels can be transmitted on a
single transmission link. The time slot for each channel repeats after regular intervals. Marker
used in TDM is a unique bit pattern placed at some fixed position in the frame and used to
determine the start of the frame at the receiver.

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BLOCKDIAGRAM:

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PROCEDURE:
1. Observe & measure the frequencies for DATA CLK, MUX CLK & FRM CLK (FRAME
CLOCK).

2. Observe the marker at test point MRTX1 on the channel & frame clock on the CRO
channel.

3. Observe the second marker MRTX2 & frame clock similarly at the output of OR gate.

4. Now observe the test point of marker i.e.channel-1 with respect to MRTX1 & MRTX2
and plot the waveform.

5. Observe the channel-1 signal with respect to the frame clock. You will find the markers
are present alternately in each frame.

STUDY OF CHANNEL INPUTS & PCM DATA IN TDM

1. Observe the test points of TDM OUT with respect to the frame clock on CRO.

2. Put the channel switch ON & OFF & observe the position of each channel in a frame.
Observe how the frame respects itself at regular intervals.

3. Observe the marker MRTX1 & MRTX2 with respect to the frame data & see how the
two markers are transmitted in alternate frame.

4. Observe the PCM coded voice date at the PCM OUT test points of codec 1 & codec 2
with respect to the frame clock & also with respect to the TDM OUT test point.
Observe the position of PCM data in the frame.

5. Plot the input and output waveforms on a graph sheet.

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WAVEFORMS:

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RESULT: Analog and digital communication link (with TDM) has been verified.

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CHALLENGE
EXPERIMENTS
MATLAB
SIMULATION

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1. FSK MODULATION AND DEMODULATION

AIM: To Generate the Frequency Shift Keying Modulation and Demodulation signals using
MATLAB
SOFTWARE REQUIRED: MATLAB 2008 or 2015
ALGORITHM:
Step 1: The binary input bit sequence is taken and stored into a variable.
Step 2: The carrier frequencies for both low frequency and high frequency bits are selected and
the respective carriers are generated.
Step 3: The input bits are given separately to two level shifters as one as the direct bits and for
another through the inverter.
Step 4: Both the level shifter outputs are multiplied with the respective carrier (High frequency
carrier for bit ‘1’ and low frequency carrier for bit’0’).
Step 5: Both the multiplier outputs are added up to get the output FSK wave form.
Step 6: In the FSK detector process at first the input FSK wave is given to the band pass filter
and then passed through the limiting circuit.
Step 7: The limiting circuit output is given to the FM detector circuit.
Step 8: The FM detector output is then passed through low pass filter which acts as an
integrator that adds up all the values of the signal.
Step 9: The low pass filter output is then given to the decision device which gives us the output
as the input bit stream.

BLOCK DIAGRAM:

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MATLAB PROGRAM:

% FSK modulation
clc;
clf;
clear all;
close all;
b=input('enter binary data:');
f1=4000;f2=12000;
t=linspace(0,1/4000,50);
ec1=cos(2*pi*f1*t);
ec2=cos(2*pi*f2*t);
fskout=[ ];
bin=[ ];
car1=[ ];
car2=[ ];

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for i=1:length(b);
if b(i)==1
fskout=[fskout,b(i)*ec2];
else
fskout=[fskout,(1-b(i))*ec1];
end;
bin=[bin,b(i)*ones(1,50)];
car1=[car1,ec1];
car2=[car2,ec2];
end;

% FSK demodulation

Bal1=[];
Bal2=[];
Demod=[];

for i=1:length(fskout);
bal1=[bal1,car1(i)*fskout(i)];
bal2=[bal2,car2(i)*fskout(i)];
end;

for i=1:50:length(fskout);
sum1=0, sum2=0; sum=0;

for i=i:i+49
sum1=sum1+bal1(i);
sum2=sum2+bal2(i);
end;

sum=-sum1+sum2;
if sum>0
demod=[demod,ones(1,50)];
else
demod=[demod,zeros(1,50)];
end;
end;

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% ploting the graph

subplot(5,1,1);
plot(car1,'linewidth',3);
title('carrier 1');
xlabel('time');
ylabel('amplitude');

subplot(5,1,2);
plot(car2,'linewidth',3);
title('carrier 2');
xlabel('time');
ylabel('amplitude');

subplot(5,1,3);
plot(0:length(bin)-1,bin,'k','linewidth',3);
title('input data');

xlabel('time');
ylabel('amplitude');

subplot(5,1,4);
plot(fskout,'r-','linewidth',3);
title('FSK output');
xlabel('time');
ylabel('amplitude');

subplot(5,1,5);
plot(demod,'r-','linewidth',3);
title('Demodulated output');
xlabel ('time');
ylabel ('amplitude');

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2. QPSK MODULATION AND DEMODULATION

AIM: To Generate the Quadrature phase Shift Keying Modulation and Demodulation
using MATLAB

SOFTWARE REQUIRED: MATLAB 2008 or 2015

ALGORITHM:

Step 1: The binary bit sequence is first taken into a variable.

Step 2: The suitable carrier frequency is selected and two carriers one with zero phase and
other with 90 degree phase are generated.
Step 3: The input bit stream is given to the de-multiplexer and is decoded.
Step 4: The de-multiplexer output is divided into two and one is multiplied with in phase
Component and the other with the out of phase component.
Step 5: Both the multiplexer outputs are taken and are added together which gives us the
QPSK output wave.
Step 6: In the de-modulation process the input QPSK wave is multiplied with both the in Phase
and out phase components by an multiplier.
Step 7: Both the outputs are passed through an low pass filter which acts as an Integrator that
adds up all the values of the signal.
Step 8: The low pass filter outputs are given to the decision device which assigns the Values to
the wave.
Step 9: The decision device output is given to the multiplexer circuit which gives the output
as the input bit stream.

BLOCK DIAGRAM:

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MATLAB PROGRAM:
% QPSK modulation
clc;
clf;
clear ll;
close all;
b=input('enter binary data:'); fc=4000;
t=linspace(0,1/4000,50); ec2=cos(2*pi*fc*t); ec1=sin(2*pi*fc*t);
qpskout=[ ];bin=[ ];car1=[ ];car2=[ ];be=[ ];bo=[ ];bal1=[ ];bal2=[ ];

for i=1:length(b);
bin=[bin,b(i)*ones(1,50)];
car1=[car1,ec1];
car2=[car2,ec2];

if mod(i,2)==0
if b(i)==0

be=[be,-ones(1,100)];
else

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be=[be,ones(1,100)];
end;
bal1=[bal1,be(i*50-1)*ec1,be(i*50-)*ec1];
else
if b(i)==1
bo=[bo,ones(1,100)];
else

bo=[bo,-ones(1,100)];

end; bal2=[bal2,bo(i*50-1)*ec2,bo(i*50-1)*ec2];
end; end;

for i=1:2:length(b)
if b(i)==0 && b(i+1)==0
qpskout=[qpskout,-ec1-ec2,-ec1-ec2];

elseif b(i)==0 && b(i+1)==1

qpskout=[qpskout,-ec1+ec2,-ec1+ec2];

elseif b(i)==1 && b(i+1)==0

qpskout=[qpskout,ec1-ec2,ec1-ec2];

else
qpskout=[qpskout,ec1+ec2,ec1+ec2];
end;

end;

% plotting the graph

subplot(4,1,1);
plot(bin,'linewidth',3);
title('binary data');
xlabel('time');
ylabel('amplitude');

subplot(4,1,2);
plot(be,'r','linewidth',3);
title('even data');
xlabel('time');
ylabel('amplitude');

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subplot(4,1,3);
plot(bo,'g','linewidth',3);
title('odd data');
xlabel('time');
ylabel('amplitude');

subplot(4,1,4);
plot(car1,'linewidth',3);
title('carrier 1');
xlabel('time');
ylabel('amplitude');

figure;
subplot(4,1,1);
plot(car2,'linewidth',3);
title('carrier2');
xlabel('time');
ylabel('amplitude');

subplot(4,1,2);
plot(bal1,'r','linewidth',3);
title('bal mod 1 data');
xlabel('time');
ylabel('amplitude');

subplot(4,1,3);
plot(bal2,'g','linewidth',3);
title('bal mod 2 data');
xlabel('time');
ylabel('amplitude');

subplot(4,1,4);
plot(qpskout,'linewidth',3);
title('modulated');
xlabel('time');
ylabel('amplitude');

% QPSK Demodulation

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demod1=[ ];
demod2=[ ];
demod=[ ];
synd1=[ ];s
ynd2=[ ];
for i=1:length(qpskout);
synd1=[synd1,car1(i)*qpskout(i)];
synd2=[synd2,car2(i)*qpskout(i)]; end;

for i=1:100:length(qpskout);
sum1=0;sum2=0;
for i=i:i+99
sum1=sum1+synd1(i);
sum2=sum2+synd2(i);
end;

if sum1 > 0
demod1=[demod1,ones(1,50)];
else
demod1=[demod1,zeros(1,50)];
end;
if sum2 > 0
demod2=[demod2,ones(1,50)];
else
demod2=[demod2,zeros(1,50)];
end;
end;
demod1
demod2

for i=1:50:length(demod1);
demod=[demod,demod1(i:i+49),demod2(i:i+49)];
end;

% plotting the graph

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figure;
subplot(3,1,1) plot(synd1,'linewidth',3);
title('sync detector 2');
xlabel('time');
ylabel('amplitude');

subplot(3,1,2)
plot(synd2,'r','linewidth',3);
title('sync detector 2');
xlabel('time');
ylabel('amplitude');

subplot(3,1,3)
plot(demod,'g','linewidth',3);
title('demodulated');
xlabel('time');
ylabel('amplitude');

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MODEL
VIVA
QUESTIONS

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1. What are the disadvantages of Analog communication?

It’s not reliable, Noise effect is more on the signals, Power required for signal transmission
also more, Circuit complexity is more and costly.
2. What are the Advantages of Digital Communication?
Reliable, Noise effect is very less, power consumption is very less, and various Digital ICs
are available so circuits not complex, cheap, Error detection and correction is also possible.
3. What are different types of digital modulation?
ASK, FSK, PSK, PCM, DPCM, Delta modulation, Adaptive Delta modulation etc.
4. How to convert an analog signal into digital signal?
Blocks: Anti-aliasing filter, Sampler, Quantizer, encoder.
5. Define the functionality of Sampler, Quantizer?
Sampler: converts a continuous time signal into discrete time signal.
Quantizer: converts continuous in amplitude signal into discrete in amplitude signal.
6. What is meant by quantization?
While converting the signal value from analog to digital, quantization is performed. The
analog value is assigned to nearest digital value. This is called quantization. The quantized
value is then converted into equivalent binary value. The quantization levels are fixed
depending upon the number of bits. Quantization is performed in every Analog to Digital
Conversion.
7. What are some Coding techniques?
Pulse code modulation, Differential pulse code modulation, Delta modulation, Adaptive
delta modulation.
8. What is Sampling?
Converting a continuous time signal into discrete in time signal is called as Sampling
(similar to cutting a bread into slices)

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9. State Sampling theorem.

A bandlimited signal of finite energy, which has no frequency components higher than W
Hz, may be completely recovered from the knowledge of its samples at the rate of 2W
samples per second. (ie, To reconstruct the Continuous time signal from discrete time
signal, the sampling frequency should be more than equal to twice of Continuous time
signal frequency (max))
10. What is Nyquist Rate?
If the sampling frequency is twice of Continuous time signal frequency (max), then that is
called as Nyquist rate. Nyquist rate = 2W samples/sec
11. How many types of samplings are their? Explain briefly?
Impulse Sampling, Natural sampling, Flat top sampling.

12. What is aliasing effect? How to overcome it?

Due to imperfect sampling the signals will be interfered in frequency domain is called
aliasing effect in sampling. if sampling theorem satisfied in sampling or first by passing
signal from anti-aliasing filter before sampling then aliasing effect will be reduced
13. What are the Analog pulse modulation methods?
Pulse amplitude modulation, pulse width modulation and pulse position modulation.
14. Define Pulse amplitude modulation?
The carrier pulse height (amplitude) proportional to amplitude of message signal.
15. Define Pulse width modulation?
The carrier pulse width proportional to amplitude of message signal.
16. Define Pulse position modulation?
The carrier pulse position proportional to amplitude of message signal.
17. Compare PAM, PWM, PPM?

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18. What is Amplitude shift Keying (ASK)?

It represent the digital data as variations in amplitudes in carrier wave. i.e '1' represented by
transmitting a fixed amplitude carrier wave for the bit duration with constant frequency.
19. What is Phase shift keying (PSK)?
It represent the digital data as variations in phase shift in carrier wave. i.e '1' represented by
0 phase shift carrier wave , where '0' represented as 180 phase shift incarrier wave for the
bit duration with constant frequency
20. What is Frequency shift keying (FSK)?
It represent the digital data as variation in frequency in carrier wave, i.e for '1' more than
carrier frequency, for '0' less than carrier frequency.
21. What is Binary Phase shift Keying (BPSK)?
For each one bit of binary data (0 & 1) carrier phase will be changed (two different shifts:
0, 180)
22. What is Quadrature Phase shift Keying (QPSK)?
For each two bits of binary data (00, 01, 10 & 11) carrier phase will be changed (four
different shifts: 0, 90,180,270)
23. What is the difference between Bit Rate and Baud Rate?
Bit rate represents Bits per sec, Baud rate represents no. of symbols per second
i.e. in communications the no. of bits transmitted per sec is called as Bit Rate (units bps)
and The no. of times a signal (here carrier) changes its state (change in freq, phase,
amplitude) per sec is called as Baud rate.
24. What is bandwidth of BPSK signal?
2Fc, if Fc represents carrier frequency
25. Compare ASK, PSK and FSK?
Bandwidth: ASK< PSK < FSK
Power: ASK <PSK = FSK
Probability of error: ASK > PSK > FSK

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Signal to Noise Ratio: ASK < PSK < FSK

26. Why is ASK called as ON-OFF keying?
When input data is 1 then output is carrier, if input is 0 output is zero. so it looks like a
switch which will switch on when input is 1 and off when input is zero
27. What do you mean by Differential Phase Shift Keying (DPSK)?
DPSK is differentially coherent modulation method. It does not need a coherent carrier at
the demodulator. The input sequence of binary bits is modified such that the next bit
depends upon the previous bit. In DPSK the phase of the carrier changes only on symbol
‘1’, while in BPSK, phase of the carrier get changes both at ‘1’ and at ‘0’. So this is the
major difference between DPSK and BPSK.
28. What is Bandwidth of DPSK?
BW= fm.
29. Define Pulse code modulation?
Each and every quantized samples will be encoded with sequence of zeros and ones with 'n'
bits within sampling interval (Ts), so the bit duration will be Ts/n. as no. of bits (n)
increases error decreases but bandwidth increases.
30. How bits are needed to encode N different levels?
Log2 N
31. Define step size?
It is the difference between two successive no.s (levels), i.e. voltage difference between one
digital level and the next digital level. (Ex: 000 & 001, 1011 & 1100)
32. Define Quantization error?
It is the difference between sampled signal and Quantized signal.
33. What is the max value of Quantization error?
Half of the Step size.
34. What are the applications of PCM?
Computer Disk, Digital Telephony, Digital Audio Applications, etc.
35. What are the disadvantages of Pulse code modulation?
To get less Quantization Noise no. of bits should be increased, then bandwidth will be
increased. So we have to compromise with either Quantization error or bandwidth.
36. Define Differential pulse code modulation?
37. In DPCM, The difference between the consequent samples will be encoded with sequence
of zeros and ones.
38. Why DPCM is better than PCM?

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Instead of encoding each sample, It’s better to encode the difference between samples then
Quantization error will be minimized with less no. of bits, then bandwidth also get
decreased.
39. Mention the merits of DPCM.
1. Bandwidth requirement of DPCM is less compared to PCM.
2. Quantization error is reduced because of prediction filter
3. Numbers of bits used to represent one sample value are also reduced compared to PCM.
40. Define Delta modulation? Why it is better?
It is same as DPCM with no. of bits to encode is one bit only (either 0 or 1). by this
bandwidth will be decreased.
41. What are the two limitations of delta modulation?
1. Slope of overload distortion.
2. Granular noise.
42. What is granular noise? Define slope overload?
The Delta modulation is efficient when and only when signal is varying continuously with
less variations. If signal varies suddenly then we get two different Noises. Those are slope
overload and granular noise.
43. How Granular noise does occurs?
It occurs due to large step size and very small amplitude variation in the input signal.
44. When granular noise and slope overload occur in Delta modulation?
Granular Noise: Δ / Ts > slope of signal
Slope Overload Noise: Δ / Ts < slope of signal

45. What is Adaptive Delta Modulation and what are the advantages?
If the step size varies according to the slope of the signal then that is called as Adaptive
Delta modulation.
Granular and slope over load noise will be Reduced.
46. What is the main difference in DPCM and DM?

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DM encodes the input sample by one bit. It sends the information about + δ or -δ, ie step
rise or fall. DPCM can have more than one bit of encoding the sample. It sends the
information about difference between actual sample value and the predicted sample value.
47. Compare all Digital pulse modulation techniques (PCM, DPCM, DM, and ADM)?

48. How the message can be recovered from PAM?

The message can be recovered from PAM by passing the PAM signal through
reconstruction filter integrates amplitude of PAM pulses. Amplitude reconstruction signal
is done to remove amplitude discontinuities due to pulses.
49. What is the advantage of delta modulation over pulse modulation schemes?
1. Delta modulation transmits only one bit for one sample. Thus the signaling rate and
transmission channel bandwidth is quite small for delta modulation than PCM.
2. The transmitter and receiver implementation is very much simple for delta modulation.
There is no analog to digital converter involved in delta modulation.
50. What is multiplexing? How many types of multiplexing possible in communication?
Combining two or more signals to pass through a channel is called as multiplexing.
The different Multiplexing techniques are:1) Frequency division Multiplexing, 2) Time
division Multiplexing, 3) Wavelength division multiplexing, 4) Orthogonal frequency
division multiplexing.
51. What is TDM?
TDM is the process of dividing up one communication time slot into smaller time slots. (It
is the technique of separating the signal in time is called TDM.)
52. How would you find the propagation loss for two different known length and voltage of
optical fiber?
Propagation loss= 10/(L1-L2) log V2/V1 where L1,L2 are length of two
different optical fiber and V2 and V1 are the voltages across it.
53. What is the used formula to find out the bending loss for an optical fiber?

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There is no any fixed formula to find so, bending loss is the relation between the voltages
(V) to the diameter (d) of bended optical fiber.
54. What are the Properties of Line Coding
1. As the coding is done to make more bits transmit on a single signal, the bandwidth used
is much reduced.
2. For a given bandwidth, the power is efficiently used.
3. The probability of error is much reduced.
4. Error detection is done and the bipolar too has a correction capability.
5. Power density is much favorable.
6. The timing content is adequate.
7. Long strings of 1s and 0s is avoided to maintain transparency.
55. Why do you need encoding of data before sending over a medium?
Suitable encoding of data is required in order to transmit signal with minimum attenuation
and optimize the use of transmission media in terms of data rate and error rate.
56. Between RZ and NRZ encoding techniques, which requires higher bandwidth and why?
RZ encoding requires more bandwidth, as it requires two signal changes to encode one bit.
57. How does Manchester encoding differ from differential Manchester encoding?
In the Manchester encoding, a low-to-high transition represents a 1, and a high-to-low
transition represents a 0. There is a transition at the middle of each bit period, which serves
the purpose of synchronization and encoding of data.
In Differential Manchester, the encoding of a 0 is represented by the presence of a
transition at the beginning of a bit period, and a 1 is represented by the absence of a
transition at the beginning of a bit period. In this case, the midbit transition is only used for
synchronization.

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