DLD Exe-3 - Design of Adder Circuit

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DLD EXPT-3

DESIGN OF ADDER CIRCUIT


AIM:
Implementing half-adder and full-adder circuit using LTspice and verifying it’s
output.
THEORY:
Half Adder
The input bits in the half adder are two like A, B.

Half adder sum and carry equation is S = A⊕B ; C = A*B.

Full Adder
The input bits in the full adder are three like A, B & C-in

Full adder logic expression is SUM = A⊕ B ⊕ C-in; Carry = (A*B) + (C-in*(A⊕B)).

SOFTWARE:
LTspice

CIRCUIT DIAGRAM:
Circuit to make half adder symbol
Half-Adder:

HALF-ADDER CIRCUIT:
Full-Adder circuit:

WAVEFORMS:
Half-Adder circuit:
Full-adder circuit:

Truth tables:
Half adder
A-input B-input S-output C-output
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

Full adder
A-input B-input C-in-input Sum-output Carry-output
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
RESULT:
Thus, the half adder and full adder circuits was made in LTspice software and
its truth table was verified from the output waveforms.

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