Messung Systems NEXGEN - 5000

Processor 521x
User Manual

Document No.:ED-2002-037

Version: 1.0

MESSUNG SYSTEMS
EL-2, J- Block MIDC Bhosari,
Pune – 411026.(INDIA)

Tel: (+91)-020-712 0807, 712 2807.

Email : [email protected]
WEB: www.messung.com

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NEXGEN – 5000 Messung Systems

Revision:

Version Date Description

1.0 July 2002 Processor 521x User Manual

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Messung Systems NEXGEN - 5000

INDEX
1. PROCESSOR MODULE................................................................................................ 7
1.1 MODULE SPECIFICATIONS ............................................................................................. 7
2. COMPONENTS............................................................................................................ 10
2.1 LED INDICATIONS ....................................................................................................... 11
2.2 MEMORY .................................................................................................................... 12
2.2.1 RAM................................................................................................................... 12
2.2.2 Flash PROM ...................................................................................................... 14
2.3 BATTERY BACK UP...................................................................................................... 14
2.4 KEYPAD AND DISPLAY ................................................................................................. 15
2.5 SERIAL COMMUNICATION PORTS ................................................................................. 17
2.6 PLUG IN MODULES ...................................................................................................... 19
2.7 COMMUNICATION PORT 3 ............................................................................................ 19
2.8 2 - HSC + 2 PTO ....................................................................................................... 20
2.8.1 2- HSC and 2 PTO Specifications ..................................................................... 21
2.8.2 High Speed Counter .......................................................................................... 22
2.8.3 Pulse Train Output ............................................................................................ 25
3. PLC VARIABLES ........................................................................................................ 26
3.1 NAME ......................................................................................................................... 26
3.2 TYPE .......................................................................................................................... 26
3.2.1 Standard Data Types ........................................................................................ 26
3.2.2 Defined Data Types........................................................................................... 27
3.3 INITIAL VALUE ............................................................................................................. 28
3.4 ADDRESSING .............................................................................................................. 28
3.4.1 Memory Mapping............................................................................................... 29
3.5 CLASS ........................................................................................................................ 30
3.5.1 Local Variables .................................................................................................. 30
3.5.2 Global Variables ................................................................................................ 31
3.6 CONSTANT ................................................................................................................. 31
3.7 RETAIN ....................................................................................................................... 32
3.8 ADDRESSING RANGE................................................................................................... 33
4. SYSTEM VARIABLES................................................................................................. 34
5. PLC CONFIGURATION AND I/O ADDRESSING....................................................... 39
5.1 I/O ADDRESSING......................................................................................................... 39
6. OPERATING MODES.................................................................................................. 42
6.1 RUN .......................................................................................................................... 43
6.2 STOP ........................................................................................................................ 44
6.3 SINGLE CYCLE ............................................................................................................ 44
6.4 BOOTSTRAP LOAD ...................................................................................................... 44
7. TROUBLESHOOTING................................................................................................. 45
7.1 LED INDICATIONS ....................................................................................................... 45
7.2 SYSTEM MESSAGES .................................................................................................... 49
8. APPENDIX 1 - BOOTSTRAP LOADER TOOL........................................................... 50

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INDEX OF FIGURES

Figure 1: Front view of Processor module with front door open. ............................................ 10
Figure 2: 8- Key Keypad ...................................................................................................... 15
Figure 3: 4- Character alphanumeric display .......................................................................... 16
Figure 4: Connection diagram of communication port 1 ......................................................... 18
Figure 5: Connection diagram of communication port 2 ......................................................... 18
Figure 6 : Connection diagram of communication part 3 (RS-232C)..................................... 19
Figure 7: Connection diagram of communication port 3 (RS-422/485) .................................. 19
Figure 8: HSC Mode 0 ............................................................................................................ 22
Figure 9: HSC Mode 1 ............................................................................................................ 23
Figure 10: HSC Mode 2 .......................................................................................................... 24
Figure 11:PTO Mode 0 operation. .......................................................................................... 25
Figure 12: PTO Mode 1 operation .......................................................................................... 25
Figure 13: Addressing method for PLC variables. .................................................................. 28
Figure 14: Memory map of markers........................................................................................ 29
Figure 15: I/O Configuration of 5 I/O Basic rack. .................................................................... 40
Figure 16: I/O Configuration of two racks. .............................................................................. 40
Figure 17: I/O Configuration of three racks............................................................................. 41
Figure 18: PLC Scan............................................................................................................... 43
Figure 19: Back side view of Processor module. .................................................................... 50

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Guidelines for the Safety of the User and Protection

of the Processor 521x.
This manual provides information for the use of the Processor 521x Products. The manual has been
written to be used by trained and competent personnel. The definition of such a person or persons is as
follows:
a) Any engineer who is responsible for the planning, design and construction of automatic equipment using
the product associated with this manual should be of a competent nature, trained and qualified to the local
and national standards required to fulfill that role. These engineers should be fully aware of all aspects of
safety with regards to automated equipment.
b) Any commissioning or service engineer must be of a competent nature, trained and qualified to the local
and national standards required to fulfill that job. These engineers should also be trained In the use and
maintenance of the completed product. This includes being completely familiar with all associated
documentation for the said product. All maintenance should be carried out in accordance with established
safety practices.
c) All operators of the completed equipment should be trained to use that product in a safe and coordinated
manner in compliance to established safety practices. The operators should also be familiar with
documentation, which is connected with the actual operation of the completed equipment.
Note: Note the term-completed equipment refers to a third party constructed device, which contains or
uses the product associated with this manual.
Note on the Symbol used in this Manual
At various times through out this manual certain symbols will be used to highlight points of Information,
which are intended to ensure the users personal safety and protect the integrity of equipment. Whenever
any of the following symbols are encountered it’s associated.

Note must be read and understood. Each of the symbols used is listed below; with a brief description of its
meaning.

Warning !

4) Indicates special care must be taken when using this element of software.

5) Indicates a special point, which the user of the associate software element
should be aware of.

6) Indicates a point of interest of further explanation.

7) Indicates a point to remember.

Warning !

This product can only function correctly and safely if it is transported, stored,
setup, and installed correctly, and operated and maintained as recommended.

Warning !

The specifications of product and contents of manual are subject to

change without notice.

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1. Processor Module

Nexgen-5000 PLC system offers variety of Processor Modules to configure

any control system as per application need and cost. The Processor
Module stores application program and data and executes it. It provides
serial interface with external devices to program it, monitor the functionality.
Processor Module is fixed in a slot next to Power Supply Module in basic
rack. The following section explains the types and technical specifications
of Processor Module

1.1 Module Specifications

Processor modules are categorized depending on availability of third
communication port 3, Keypad- display, and plug in modules.
• Processor 5210
• Processor 5211
• Processor 5212
• Processor 5213
• Processor 5214

Following table explains the difference. All other features are common.

Processor Module with 5210 5211 5212 5213 5214

Plug In Module No Yes Yes No No
Communication Port 3 Not RS-232C RS-422 / Not Not
Applicable Hardware RS-485 Applicable Applicable
Interface Hardware
Interface
Keypad-Display Yes Yes Yes No Yes
Plug In Module No No No No Yes
2 HSC + 2 PTO

The technical specifications are given in table on next page.

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Technical specifications of Processor Module are given in table.

Processor 16 bit micro controller

BOOL 0.75 µsec
5210 RUN
BOOL/ BYTE /WORD
/DWORD/ REAL MOVE
1.2 / 1.2 / 1.2 / 2 / 2 µsec
PROCESSOR
CPU BYTE/WORD/DWORD/
2.1 / 2.1 / 3.5 / 12.6 µsec
I/O REAL ADD & SUB
MEM
BYTE/WORD/DWORD/
2.5 / 2.5 / 12 / 12.8 / 12 µsec
REAL MUL & DIV
LOW BAT
BYTE/WORD/DWORD
Execution Logical Operators 2.1 / 2.1 / 3.5 µsec
time (AND, OR, XOR)
BYTE/WORD/DWORD/
2.5 / 2.5 / 3.4 / 15.4 µsec
REAL Compare
1 sec (250 ms default setting)
Maximum program scan time
Maximum program scan time limit limit can be modified by
modifying system variable
_wLimitMaxScan
1024 Input points and
Number of I/O points
1024 Output points
Basic 1
Racks Supported
Expansion 3 Maximum
Marker Memory 15.872 Kb RAM
Data Memory
(Used as Application Data 32 Kb RAM
Memory, FB Instance Memory)
Unlimited.
Number of Timers Number of instances can be
(TON, TOF, TP, RTC) called. All can be retentive.
(User definable)
Timer resolution 1 ms for all the timers.
Timer Range 24.85 days maximum
Unlimited.
Number of Counters Number of instances can be
(CTD, CTU, CTUD) called. All can be retentive.
(User definable)
Real Time Clock Supported.
System Information Available.
RAM ( Application program
Application Program Memory Type
code is transferred from flash to
for execution
RAM at every power ON.)
Boot Project Memory for
64 Kb on-board flash
permanent storage
Application Program Source code
192 Kb on-board flash
Memory for permanent storage
Marker ( except 128 BYTEs
from MB0 to MB127), Data
memory can be retained.(User
Retaintivity
definable).
Input and Output data
memory can not be retained.

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Technical specifications of Processor Module continue.

Type 3 VDC Lithium

Battery back up
Life 2 Years
Yes
Downloadable operating system ( Downloadable from PC through
Bootstrap Loader Tool)
On line application program
Supported
change
Forcing, Writing, Watch and
Receipt for PLC Variables, Supported
Redirection of I/O points
Password protection supported
for
Application Program Security • Project file/ POU read or
write.
• Sourcecode upload.
Tasks supported Cyclic
Operating Modes RUN, STOP, Single cycle
• RUN
• CPU
Diagnostic LED indications • I/O
• MEM
• LOW BAT
4 character alphanumeric display
Display accessible in application
Diagnostic tools program.
8 key keypad accessible in
Keypad
application program.
RS-232C, By default used as
Port 1
Communication programming port.
ports Port 2 RS-422 / 485
(All ports are Open RS-232C / RS-422/485
ports) Port 3 Applicable for Processor 5211/
5212
Selectable up to 57.6 Kb for all
Communication Baud rate
ports
256 Bytes RAM for reception
Communication Buffer Memory and 256 bytes RAM for
transmission for each port.
Standard IEC 61131-3
Programming Software Windows based CoDeSys
Languages IL, LD, FBD, SFC, LD
Back-plane current 600 mA
AS per IEC 1000 – 4 - 4
2 KV Conductive Noise for
Noise immunity Power Supply
1 KV Capacitive Coupled Noise
for serial ports
Ordering Code 5210 / 5211 / 5212 / 5213 / 5214

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2. Components

The figure below shows front side of Processor Module along with nomenclature.

LED
Indications

4 Character
Alpha-Numeric
Display

8 Key Key Pad

+
3V
Lithium
2/3 AA
__
3 V Lithium
Battery
Replace with
same type
PORT 1

PORT 2

Port 1

Port 2

Figure 1: Front view of Processor module with front door open.

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2.1 LED Indications

Five LEDs provides status and diagnostic information of total PLC system
and is explained in table given below.

LED Color Status Indication

ON CPU is in 'RUN' mode i.e. in program execution mode.
CPU is in 'STOP' mode
Application program fault
OFF
RUN Green CPU watch dog fault
Auxiliary power supply in expansion rack fails.
Flash Forcing / Writing any PLC variable from programming device.
(5 Hz) Redirection of any I/O point
OFF CPU is healthy
Hardware fault of CPU module.
CPU Red
ON CPU watchdog fault.
CPU put in bootstrap load mode
All modules inserted are as per configuration declared in application
OFF
program and are healthy.
I/O bus read / write fault
I/O Red
Faulty or incorrect module present in slot.
ON
Faulty expansion cable or wrong connections of expansion cables
I/O modules not inserted properly or faulty.
OFF Application program is healthy.
ON Application program is invalid.
MEM Red
Flash
Scan time exceeds beyond permissible limit.
(5 Hz)
OFF Battery backup for CPU RAM is healthy.
LOW BAT Red Voltage of lithium battery is low (below 2.5 V)
ON
Battery is faulty.

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2.2 Memory
Processor Module has two on-board memory areas, RAM and flash PROM.
Following sections explains the utilization of memory

2.2.1 RAM
RAM has battery back up. The utilization of RAM depending on functionality
is as shown below.

Input Process Image ( %I ) 128 Bytes

Output Process Image ( %Q ) 128 Bytes
Marker ( %M ) 15872 Bytes
Data 32 Kb
Application Program for RUN time execution 64 Kb
Application Program storage for on-line change 64 Kb
System Variables, Communication port buffer area, etc Remaining RAM
utilization

Input Process Image

Processor Module scans all the input points from configured I/O modules in
input scan and stores the status in Input Process Image area. This is
addressable global memory area and can be accessed by external devices
like HMI and SCADA. This status is then referred for application program
execution. The input Process Image can be updated on demand for
particular I/O slot in logic scan by executing instruction ‘Refresh_In’.

Output Process Image

Processor Module updates the status of output points as per application
program in logic scan and stores the updated status in Output Process
Image area. This is addressable global memory area and can be accessed
by external devices like HMI and SCADA. This status is then referred for
output scan. After logic scan, Processor module executes output scan and
all the outputs of I/O modules configured are switched ON/OFF. The
output scan on demand can be executed for particular I/O slot in logic scan
by executing instruction ‘Refresh_Out’.

Markers
Marker Memory is used to store intermediate results in application program.
This is addressable global memory area and can be accessed by external
devices like HMI and SCADA.

Data
Data Memory is used to store intermediate results in application program
and Function Block instance data. This memory area can be a local or
global. The address for the variable in Data memory is assigned during
application program compilation time. This is not fixed address and hence
these variables can not be accessed by external devices like HMI and
SCADA.

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RUN time execution

Programming software ‘CoDeSys’ downloads application program code to
RAM first and then it can be stored in permanent flash PROM memory. On
every power ON, Processor copies application program from flash PROM
to RAM and starts execution from RAM.

If application program code is not stored in flash PROM, after power ON,
Processor declares invalid application program code in RAM and displays
‘MEMR’ on 4 – character alpha-numeric display and puts ON ‘MEM’ LED.
This puts PLC is ‘STOP’ mode.

During power ON, if LEFT and RIGHT keys on keypad are kept pressed
simultaneously, application program from flash PROM is not copied to RAM
and Processor detects invalid application program in RAM displaying ‘MEMR’
on 4-character display. In this case, it is necessary to download the
application program again from programming software ‘CoDeSys’

On-Line Application Program Change

Processor provides addition memory space required for on-line application
program change. During Run time, application program is executed from
RAM. When on-line change in application program is carried out, this
modified application program code is downloaded to additional memory
space. During this download, Processor continues to execute the old
application program. After download is complete, when ever a new PLC
scan is started, it is started for modified application program. Operating
system ensures smooth changeover between execution of old and modified
application program. Once new application program execution is started,
modified program code can be transferred to flash PROM.

RAM utilization
Remaining part of RAM is utilized for receiving and transmitting buffer
memory for serial ports, System Variables, etc.

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2.2.2 Flash PROM

The utilization of flash PROM depending on functionality is as shown

below.

Operating System 128 Kb

Boot Project 64 Kb
Application Program Source code 192 Kb

Operation System
Operating system is downloadable from PC. For the same, PC based
software Bootstrap Loader Tool is provided. Operation system binary file
can be downloaded through serial port 1 ( RS 232C), which is normally
used for programming through ‘CoDeSys’.

Application Program Code

Programming Software ‘CoDeSys’ converts application program to
executable binary code suitable for processor. This binary code is
downloaded from PC to RAM first and then it can be downloaded to flash
PROM as permanent storage by creating boot project. On every power ON,
Processor copies application program code from flash PROM to RAM and
executes application program code from RAM.

Application Program Sourcecode

Programming Software ‘CoDeSys’ converts application program project file
in a compressed format. This file is downloaded from PC to flash PROM as
Sourcecode download. The project file contains all project related data like,
ladder, comments, variable declaration, password, libraries (optional) etc. If
sourcecode is downloaded, it can be uploaded (READ from PLC) from
Processor Module whenever needed.

2.3 Battery Back Up

The application program data is stored in RAM, which is volatile. In the
event of a power failure, this data gets lost. To retain the same if required,
battery back up is required. Also, for Real Time Clock, battery back up is
needed. This is 3V lithium battery, which is accessible from front side of
Processor Module. This back-up battery retains retentive PLC variables.
Life of battery backup is two years. If PLC is powered OFF, retentive data
and Real Time Clock is retained for two years.

Battery should be replaced after switching OFF the PLC and it should take
less than 5 minutes to replace the same. During this period, retention of
application program and retentive PLC variables are ensured by internal
hardware.

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2.4 Keypad and Display

Processor provides 4-character alphanumeric display with keypad. This is
helpful for
• Displaying fault messages.
• Displaying systems messages.
• Viewing / modifying PLC variables.
• Redirection of I/O points.

Display and keypad is accessible in application program and information is

available in form of system variables. System variables are implicitly
defined global variables. User can develop own function blocks to handle
display and keypad as per application need.
System variable _bKeyStatus is associated with keypad. This is a byte and
eight bits holds status of eight keys respectively. The bits can be accessed
as _bKeyStatus.0 to _bKeyStatus.7.
When a key is pressed, corresponding bit becomes TRUE and remains
TRUE as long as key is pressed. When key is released, bit becomes
FALSE. Effect of key de-bounce is taken care by providing 5 ms filter for
key input.
Following figure shows keys and associated bits.
_bKeyStatus.1

_bKeyStatus.0 F1 F2 _bKeyStatus.2
_bKeyStatus.3 _bKeyStatus.5
_bKeyStatus.6 CLR ENT _bKeyStatus.4

_bKeyStatus.7
Figure 2: 8- Key Keypad

During power ON, if LEFT and RIGHT keys on keypad are kept pressed
simultaneously, application program from flash PROM is not copied to RAM
and Processor detects invalid application program in RAM displaying ‘MEMR’
on 4-character display. ‘MEM’ LED on Processor module glows and PLC
remains in STOP mode. In this case, it is necessary to download the
application program again from programming software ‘CoDeSys’

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System variable _aDisplay is associated with 4- character alpha-numeric

display.
This is a four byte array. One byte is associated with each character
display. The array bytes can be accessed as _aDisplay[0] to _aDisplay[3]
When ASCII value of any alphanumeric character is moved to system byte,
corresponding character is displayed at corresponding display position.
Following figure shows display characters and associated bytes.

AB32

_aDisplay[0] _aDisplay[3]

_aDisplay[1] _aDisplay[2]

Figure 3: 4- Character alphanumeric display

By default, display shows operating system version like ‘R102’ , ‘R103’.
Operating system writes version number to _sDisplay array in case of warm
start and cold start. Operating system updates display accrding to the
contents of _aDisplay array after every 100 ms.

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2.5 Serial Communication Ports

Processor Module supports three independent serial communication ports.

• Communication Port 1 – RS-232C
• Communication Port 2 – RS-422/485
• Communication Port 3 – RS -232C / RS-422/485
(Applicable for Processor 5211 / 5212 )

Port 1 and 2 are provided on-board and Port 3 is provided as optional plug
in module. All the three serial ports are open and user can define
communication parameters and handle serial communication using function
blocks as per protocol.
Communication port 1 is RS-232C hardware interface port and by default
assigned for programming through Programming software 'CoDeSys'. This
port is open for user.
Communication port 2 provides RS-422/485 hardware interface. This port is
open for user.
Communication port 3 is optional and provides RS-232C or RS-422/485 as
per selection. This port is available in form of optional plug-in module.
Processor 5211 provides RS-232 hardware interface and Processor 5212
provides RS-422 hardware interface. This port is open for user.

Processor module provides hardware for serial interface along with UART.
Operating system provides driver functions and function blocks which
directly controls the hardware interface. For a serial port, CPU provides
system buffer of 256 bytes each for reception and transmission.
Application program can exchange data from serial port through driver
functions and function blocks provided in operating system. Such driver
functions and function blocks are provided in form of library
Nexgen5000.lib.

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Following figures show the terminal diagrams for serial ports.

Communication Port 1
For communication port 1, 8 pin mini DIN female connector is provided.
Figure below shows front side view of connector.

6 3 1
GND
GND Tx

Rx
+12 V

8 5 2

Figure 4: Connection diagram of communication port 1

Communication Port 2
For communication port 2, 8-pin mini DIN female connector is provided.
Figure below shows front side view of connector.

6 3 1
GND
GND RxD-
TXD+ TxD-
RxD+
+12 V

8 5 2

Figure 5: Connection diagram of communication port 2

Communication Port 3
Communication port 3 is provided as optional plug in module and in
discussed under section Plug in modules.

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2.6 Plug In Modules

Processor Module supports plug in modules for extended functionality.
Two types of plug in modules are available.
• Communication Port 3
• 2 HSC + 2 PTO

Plug In Modules are factory installed as per Processor Module ordering

code.

2.6.1 Communication Port 3

Processor 5211 and Processor 5212 offers communication port 3.

Processor 5211 provides RS-232C hardware interface. For RS-232C port,
9-pin male D connector is provided. Processor 5212 provides RS-422/485
hardware interface. For RS-422/485 port, 9-pin female D connector is
provided. The following figures show connector details.

RS – 232C Port Connector

For RS – 232 port, 9-pin male D connector is provided. Figure below shows
front side view of connector.

1
6
RTS Rx
CTS Tx

9 GND
5

Figure 6 : Connection diagram of communication part 3 (RS-232C)

RS – 422 Port Connector

For RS – 422 port, 9-pin female D connector is provided. Figure below
shows front side view of connector.

5
9 Rx-
RTS-
Rx+
RTS+
Tx+
CTS+
Tx-
CTS- 6 GND
1

Figure 7: Connection diagram of communication port 3 (RS-422/485)

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2.6.2 2 - HSC + 2 - PTO

In Processor 5214, this plug in module is fixed at bottom side of Processor

Module. It provides two high-speed counter inputs and two pulse train
outputs. For external interface, a cable with 25-pin D connector at both
ends is provided. One end of cable is to be connected to 25-pin male D
connector provided at bottom side of CPU module. Second end of cable is
to be connected to 25 pin female D connector on patch panel for field
interface, which in DIN rail mountable. On this patch panel, connectors are
provided where HSC inputs and PTO outputs can be connected. The
following table explains the general specifications.

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2.6.2.1 2- HSC and 2 PTO Specifications

General specifications are given in the table below.

High Speed Counter Input

Channels 2 nos.
Inputs A, B and Z
Frequency 100 KHz Maximum
Counting Range -2147483648 to 2147483647
Type
Open Collector (18-30 VDC inclusive of ripple)
(Selectable by input
connections at Patch
Differential
Panel)
7 mA for open collector type of Input.
Current
15 mA for differential type of Input.
Min. ON time duration 10 µs
Min. OFF time
10 µs
duration
Pulse input , Counts at rising edge of
Mode 0 Direction input input depending upon
and Reset input Direction.
Pulse input , Counts at rising and falling
Mode of Operation Mode 1 Direction input edge of input depending
(Software Selectable) and Reset input upon Direction.
Phase A input,
Counts at rising and falling
Phase B input
Mode 2 edge of phase A input and
and Zero
phase B input.
Marker input
Pulse Train Output
Channels 2 nos.
Outputs FP+ and FP-
100 KHz, ±1% maximum for differential output with patch
panel 4962.
Frequency
5 KHz, ±1% maximum for open collector (PNP) output
with patch panel 4960.
Duty Cycle 50 %
Pulse output range 0 to 4294967296 with Direction
Open collector With patch panel
(18 – 30 VDC 2 HSC & 2 PNP type PTO
Type
including ripple) (Ordering Code – 4960)
(Selectable by type of
patch panel) With patch panel
Differential
2 HSC & 2 RS 422 type PTO
(Ordering Code – 4962
60 mA maximum for differential output with patch panel
4962.
Current
1.5 Amp maximum for open collector (PNP) output with
patch panel 4960.
Mode of Operation Mode 0 Pulses and Direction
(Software selectable) Mode 1 Forward Pulses and Reverse Pulses
For pulse output driving circuit.
External Power Supply
24 VDC ( 18 – 30 VDC including ripple), 100 mA

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2.6.2.2 High Speed Counter

Processor 5214 provides two independent channels for HSC (High Speed
Counter) inputs. Each channel provides three input interfaces as A, B and
Z. Channel provides hardware interface for open collector ( PNP and NPN )
inputs of 24 VDC or differential inputs. This depends on type of connection.
To configure and handle high speed input channels, Processor 5214
provides driver FB (function block) for each channel as HSC_DRV1 and
HSC_DRV2. These are provided in library PTO.lib. Driver FB sets mode of
operation and provides accumulated count and status of Z input. Counter
provides pulse count in double integer format. Pulse counting is as shown
below.

Up Direction

Down Direction
-2147483648 0 2147483647

For HSC, three modes of counting are provided as explained below.

Mode 0
In this mode, high speed input is interfaced to A input. Direction input is
interfaced to B Input. Counter increments its count by 1 at rising edge of
pulse input if direction input is FALSE. Counter decrements its count by 1 at
rising edge of pulse input if direction input is TRUE. The following figures
show the counter behavior in mode 0.

Count

Figure 8: HSC Mode 0

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Mode 1

In this mode, high speed input is interfaced to A input. Direction input is

interfaced to B Input. Counter increments its count by 1 at rising and falling
edge of pulse input if direction input is FALSE. Counter decrements its
count by 1 at rising edge and falling edge of pulse input if direction input is
TRUE. The following figures show the counter behavior mode 1.

Count

Figure 9: HSC Mode 1

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Mode 2

In this mode, encoder phase A input is interfaced to A input, phase B is

interfaced to B input and zero marker input is interfaced to Z input. If A
phase is leading to B phase, counter increments. Counter increments its
count by 1 at rising and falling edge of both A phase pulse input and B
phase pulse input. If A phase is lagging to B phase, counter decrements.
Counter decrements its count by 1 at rising and falling edge of both A
phase pulse input and B phase pulse input. The following figures show the
counter behavior in x 4 mode.

Count

Figure 10: HSC Mode 2

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2.6.2.3 Pulse Train Output

Processor 5214 provides two independent channels for PTO (Pulse Train
Output). Channel provides two output interfaces. The outputs functionality
depends on the mode of operation selected.
To configure and handle PTO, Processor 5214 provides driver FBs
PTO_DRV1 and PTO_DRV2. These are provided in library PTO.lib.
Driver FB selects the mode of operation, number of pulses, output
frequency and direction. The modes of operation are explained below

For PTO, two modes of counting are provided as explained below.

Mode 0

This mode provides two outputs, one as pulse output and another as
direction as shown below.

Pulse
Output

Direction

Forward Reverse Forward

Figure 11:PTO Mode 0 operation.

Mode 1

This mode provides two outputs, one as forward pulse output and another as
reverse pulse output as shown below.
Forward
Pulse

Reverse
Pulse

Figure 12: PTO Mode 1 operation

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3. PLC Variables

Intermediate results in application program can be stored in PLC variables.

These PLC variables are mapped in marker memory area or data area. For
declaration of any PLC variable, the following attributes are user definable.
• Name
• Type
• Initial Value
• Address
• Class
• Constant
• Retain

3.1 Name
Name is an unique identifier which is a sequence of letters, numbers, and
underscores that begins with a letter or an underscore.
The name should not contain any blank spaces or special characters and
cannot be the same as any of the keywords. The Name is not case
sensitive. The Name should not have more than one underscore character
in a row. The length of Name is unlimited.

3.2 Type
This attributes decides how much memory space is reserved and what type
of values it stores. The data types are divided in two groups as standard
data types and user defined data types as explained below.

3.2.1 Standard Data Types

Some standard data types are shown in table below.

Type Range Memory space

BOOL TRUE or FALSE 8 Bit
BYTE 0 to 255 8 Bit
WORD 0 to 65535 16 Bit
DWORD 0 to 4294967295 32 Bit
SINT -128 to 127 8 Bit
USINT 0 to 255 8 Bit
INT -32768 to 32767 16 Bit
UINT 0 to 65535 16 Bit
DINT -2147483648 to 2147483647 32 Bit
UDINT 0 to 4294967295 32 Bit
+38 -38
-3.4 E to -1.176 E
32 bit
REAL ±0
-38 +38 (IEEE floating point)
+1.176 E to +3.4 E

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Some more standard data types are explained below

STRING

A STRING type variable can contain group of characters. The size entry in
the declaration determines how much memory space should be reserved
for the variable. It refers to the number of characters in the string. If no size
specification is given, the default size of 80 characters will be used. End of
string is ‘/0’

Time Data Types

The data types TIME, TIME_OF_DAY (TOD), DATE and

DATE_AND_TIME (DT) are handled internally like DWORD.
Time is given in milliseconds in TIME and TOD, time in TOD begins at
12:00 A.M.
Time is given in seconds in DATE and DT beginning with January 1, 1970
at 12:00 A.M.

3.2.2 Defined Data Types

This data type is user configurable. User defines the number of elements
and size of data type.

ARRAY

One-, two-, and three-dimensional group of similar data types.

POINTER

Variable or function block addresses are saved in pointers while a program

is running.
This address is stored in a DWORD. A pointer can point to any data type or
function block even to user-defined types. ADR operator assigns the
address of a variable or function block to the pointer. A pointer can be de-
referenced by adding the content operator "^" after the pointer identifier.

ENUMERATION

Enumeration is a user-defined data type that is made up of a number of

string constants. These constants are referred to as enumeration values.

STRUCTURE

Structure is a group of any combination of data types.

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3.3 Initial Value

In some applications, it is necessary that the variables have predefined

value after power ON. This value should be programmed while declaring
the variable.
If such variable is also declared as retentive, then after warm start retained
value is
loaded. However after cold start or if variable is not retentive, variable is
initialized to the initial value.

3.4 Addressing

Variable can be associated with a definite address. The addressable

memory area is input image area (I ), output image area ( Q ) and Marker
area ( M ). The addressable memory area is basically a global area. The
table below shows the addressable memory area types.

Processor Module scans all the input points from configured I/O modules in
Input %I input scan and stores the status in Input Process Image area. This status is
then referred for application program execution.
Processor Module updates the status of output points as per application
program in logic scan and stores the updated status in Output Process Image
Output %Q area. This status is then referred for output scan. After logic scan, Processor
module executes output scan and all the outputs of I/O modules configured
are switched ON/OFF.
This memory area is used to store intermediate results in application
Marker %M
program. It is accessed and updated during logic scan.

The addressing method for accessing such variables is shown below

Denotes fixed %M X mmmm. n Bit address

address This identifies bit within
specified byte address.
The bit address can be 0 to 7.
Variable Type
Input I Delimiter.
Output Q This is a decimal point applicable
Marker M while accessing bit from BYTE,
WORD or DWORD

Bit Size Byte Address

BOOL X This byte address and
(Optional) range depends upon
BYTE B variable type
WORD W
DWORD D

Figure 13: Addressing method for PLC variables.

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Memory mapping of PLC variables along with addressing is explained in section

Memory Mapping.

3.4.1 Memory Mapping

Memory mapping basically is byte wise. The figure below shows memory
mapping for markers.

Bits 7 6 5 4 3 2 1 0
%MD0 %MW0 %MB0 Byte 0000
%MB1 Byte 0001
%MD2 %MW2 %MB2 Byte 0002
%MB3 %MX3.0 Byte 0003
%MD4 %MW4 %MB4 Byte 0004
%MB5 %MX5.7

%MB15867 Byte15867
%MD15868 %MW15868 %MB15868 Byte15868
%MB15869 Byte15869
%MW15870 %MB15870 Byte15870
%MB15871 Byte15871

%MX15871.5

Figure 14: Memory map of markers

Marker memory size is 15872 bytes. The addressing is from %MB0 to

%MB15871.
One byte consists of 8 bits. Bit 0 is Least Significant Bit and bit 7 is Most
Significant Bit. Individual bit in a byte is accessed with prefix X.

Address Data Type Memory Location

%MX3.0 BOOL 0th bit of fourth marker byte
%MX5.7 BOOL 7th bit of sixth marker byte
%MX15871.5 BOOL 5th bit of marker byte15871

Marker memory can be accessed as WORD type variable. Marker WORD is

accessed with prefix W.

Address Data Type Lower Byte Higher Byte

%MW0 WORD %MB0 %MB1
%MW2 WORD %MB2 %MB3
%MW15868 WORD %MB15868 %MB15869
%MW15870 WORD %MB15870 %MB15871

Only, even WORD addresses are valid. Odd addresses like %MW1,
%MW3, %MW15869 are invalid.

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Marker memory can be accessed as DWORD type variable. Marker DWORD

is accessed with prefix D.

Address Data Type Lower Byte Higher Byte

%MD0 DWORD %MW0 %MW2
%MD2 DWORD %MW2 %MW4
%MD15868 DWORD %MW15868 %MW15870

Only, even DWORD addresses are valid. Odd addresses like %MD1,
%MD3, %MD15867 invalid.
Input ( I ) and Output ( Q ) variables cab be accessed as BOOL or BYTE only.
e.g. %IX0.6, %IX5.0, %QX10.1, %IB20, %QB10 and not as %IW20,
%QD10, etc

3.5 Class
Class defines the scope of the variable. Variable scope can be local or global.

3.5.1 Local Variables

The scope of the local variable is limited to a POU where it is declared. The
variable do not carry same status or meaning through out the complete
application program even though the name is same. The different categories of
local variables are

VAR

These are local variables for storing temporary results of any POU. These
variables can not be referred by other POU.

VAR_IN

These are local variables acting as input to any POU. That means that at the
call position, the value of the variables can be given along with a call. These are
read only type of local variables inside that POU.

VAR_OUT

These are local variables acting as output of any POU. That means that these
values are returned back to the POU making the call. There they can be used
further

VAR_IN_OUT

These are local variables acting as input as well as output of any POU. The
value of such variable is passed by reference. This type of variable is not
appli8cable for functions (FUN)

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3.5.2 Global Variables

The scope of the global variable is global for application program consisting of
number of POUs. The variable carries same status or meaning through out the
complete application program. Number of POUs can access global variable and
modify it and this modified value is referred by another POU which is accessing it
latter. These variables are used to pass information from one POU to another
POU. By default variables %I, %Q and %M are global variables. These variables
are defined as VAR_GLOBAL.

3.6 Constant
Any variable can be declared as constant. The range of value and presentation
format depends on the data type. This variable can be a local variable or global
variable. The notations for different data types are different.

Notation Example Significance

No prefix 14, 11000 Decimal value
16# 16#AAC0, 16#1359 Hexadecimal value
8# 8#7, 8#14 Octal value
2# 2#11000000, 2#10101 Binary value
TRUE or FALSE TRUE or FALSE Boolean value
T# T#10m30s500ms, T#10s, TIME value
T#500ms
DATE# or D# D#2002-01-01 , d#2000-03-04 Date value
TIME_OF_DAY# or TOD#15:36:30.123, TIME_OF_DAY value
TOD# TOD#00:00:00
DATE_AND_TIME DT#2002-01-01-15:36:30 DATE_AND_TIME value
or DT#
No notation but number with 7.4 , 1.64e+009 REAL Values
Decimal point or e
String of characters ’Name of Operator’ , ’SS-1987’ STRING values
preceded and followed by
single quote.

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3.7 Retain

In the event of power fail, all the variable data stored in RAM may get lost. In
some applications it may be required to retain the values of variables even
after power fail. The local or global variables can be declared as retentive. If
any variable is declared as retentive, then after warm start retained value is
loaded in first PLC scan. However after cold start or if variable is not
retentive, variable is initialized to the initial value or to a standard value (
here, it is zero ).

Function Block instance like any PLC variable can be declared as retentive.

By default, PLC variables %M (except 128 bytes from %MB0 to

%MB127) are retentive if not explicitly declared in application program.
So it is necessary to avoid using directly such PLC variables as
%MX20.0, %MW100, %QB0 without explicit declaration in application
program.

In declaration, user can define whether such PLC variables are retentive
using keyword VAR_RETAIN.

PLC variables %I and %Q can not be retained.

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3.8 Addressing Range

Following table shows PLV variables and addressing range with respect to
data type.

Variable Type Data Type Range

%IX0.0 to %IX0.7
%IX1.0 to %IX1.7
Input X
I
BOOL ( X is optional )
%IX127.0 to %IX127.7
Input
I B %IB0, %IB1, %IB2 to %IB127
BYTE
%QX0.0 to %QX0.7
%QX1.0 to %QX1.7
Output X
Q
BOOL ( X is optional )
%QX127.0 to %QX127.7
Output
Q B %QB0, %QB1, %QB2 to %QB127
BYTE
%MX0.0 to %MX0.7
%MX1.0 to %MX1.7
Marker X
M
BOOL ( X is optional )
%MX15871.0 to %MX15871.7
Marker
M B %MB0, %MB1, %MB2 to %MB15871
BYTE
Marker
M W %MW0, %MW2, %MW4 to %MW15870
WORD
Marker
M D %MD0, %MD2, %MD4 to %MB15868
DWORD

Input ( I ) and Output ( Q ) variables cab be accessed as BOOL or BYTE

only. e.g. %IX0.6, %IX5.0, %QX10.1, %IB20, %QB10 and not as %IW20,
%QD10, etc.

Only, even WORD addresses are valid. Odd addresses like %MW1,
%MW3, %MW15869 are invalid.

Only, even DWORD addresses are valid. Odd addresses like %MD1,
%MD3, %MD15867 invalid.

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4. System Variables
The system variables are implicitly defined global variables, which can be
used for information exchange between Processor Module and application
program. Each system variable has unique Name which starts with
underscore ‘_’. The table below explains the function of system variables.

_BINITSTATUS BYTE Read only Holds the status of initialization. This byte is
updated when ever related action is executed.
1- Hot Start
_BINITSTATUS holds 1, if system detects a
power break for less than 25 ms but greater than
10 ms. In this case PLC functioning is normal as if
there is no power disturbance.
2- Warm Start
_BINITSTATUS holds 2 on power ON, if system
detects a prior power break for more than 25 ms.
It results resetting of all non-retentive data.
3- Cold Start
_BINITSTATUS holds 3, if
• system detects any change in application
program. If a new application program is
downloaded, cold start is observed.
• Destroying of battery back up retentive data
because of battery back up circuit fault.
• Related standard initialization command
(Reset Cold from CoDeSys)
• Any related fault in Power Supply Module
_INITACTFORCE BYTE Read / This executes user controlled initialization. This
Write byte is checked at beginning of every scan and
relevant action is taken.
2- Warm Start
If _INITACTFORCE byte value is modified to 2, it
results in warm start action resetting of all non-
retentive data.
3- Cold Start
If _INITACTFORCE byte value is modified to 3, it
results in cold start action resetting of all retentive
and non-retentive data.
5- Stop Mode
If _INITACTFORCE byte value is modified to 5, it
puts Processor in STOP mode and application
program execution is halted. It continues to
remain in STOP until power is on. It goes to RUN
mode after execution of any one of standard
command from CoDeSys like Run / Reset /
ResetCold / ResetOriginal'. If valid boot project is
loaded at next power-on, then CPU goes to RUN
mode.
Other values are ignored

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System Variables continues.

_WCOLDSTARTCOUNTER WORD Read Holds number of cold start initialization

Only occurrences. This variable is persistent.
_WWARMSTARTCOUNTER WORD Read Holds number of warm start initialization
Only occurrences. This variable is persistent.
_ADISPLAY ARRAY Read/ This four byte array is associated with 4-
[0..3] Write character alpha-numeric display. One byte is
OF associated with each character display.
BYTE _ADISPLAY[0] – First display character i.e.
AB32 leftmost character.
_ADISPLAY[1] – Second display character
_ADISPLAY[2] – Second display character
_ADISPLAY[3] – Second display character

To display any alpha-numeric character,

equivalent ASCII value is copied to display bytes.
e.g. To display ‘AB12’
_ADISPLAY[0]:=16#41
_ADISPLAY[1]:=16#42
_ADISPLAY[2]:=16#31
_ADISPLAY[3]:=16#32

Operating systems moves version number like

R103, R104 after warm start or cold start
initialization to _ADISPLAY array bytes.
Operating system updates display as per the
contents of _ADISPLAY after each 100 ms.
_WCURSCANTIME WORD Read Holds scan time of last scan with 1 ms
Only resolution. The value is updated at the end of
each scan. This value is initialized to zero on
every power ON or any standard initialization
action.
_WMINSCANTIME WORD Read Holds minimum scan time in all previous PLC
Only scans after power ON with 1 ms resolution. The
value is updated at the end of each scan. This
value is initialized to _WLIMITMAXSCAN on
every power ON or any standard initialization
action.
_WMAXSCANTIME WORD Read Holds maximum scan time in all previous PLC
Only scans after power ON with 1 ms resolution. The
value is updated at the end of each scan. This
value is initialized to zero on every power ON or
any standard initialization action.
_WLIMITMAXSCAN WORD Read / This is the maximum limit for scan time. If current
Write scan exceeds this limit PLC is put is STOP mode
with ‘MEM; LED flashing and ‘SCAN’ is
displayed. Default value for this variable is
250ms and it is loaded before every logic scan. If
at the beginning of logic scan this value is
modified ( maximum 1000 ms), then new value is
applicable for that scan only. Next scan is then
checked for default value unless & until the
required limit-value is unconditionally moved in to
this variable at beginning of every logic-Scan.

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System Variables continues.

_BREADSECS BYTE Read only Holds current seconds value of RTC in BCD
format.
_BREADMINS BYTE Read only Holds current minutes value of RTC in BCD
format..
_BREADHRS BYTE Read only Holds current hours value of RTC in BCD format.
_BREADDATE BYTE Read only Holds current date value of RTC in BCD format.
_BREADMONTH BYTE Read only Holds current month value of RTC BCD format.
_BREADYEARL BYTE Read only Holds current year value (lower byte) of RTC BCD
format.
_BREADYEARH BYTE Read only Holds current year value (higher byte) of RTC
BCD format.
_BRACK_0_IOERR BYTE Read only Holds slot error status of eight slots in rack 0 i.e.
basic rack. Least significant bit is status bit for
slot 0 and Most Significant bit is status bit for slot
7.
Bit is TRUE if
• Error in I/O configuration
• Wrong module insertion
• I/O slot not configured
• I/O module hardware fault
_BRACK_0_IOERR.0 is status bit for slot 0,
_BRACK_0_IOERR.7 is status bit for slot 7 and
so on.
_BRACK_1_IOERR BYTE Read only Holds slot error status of eight slots in rack 1 i.e.
expansion rack 1. Least significant bit is status bit
for slot 8 and Most Significant bit is status bit for
slot 15.
_BRACK_1_IOERR.0 is status bit for slot 8,
_BRACK_1_IOERR.7 is status bit for slot 15 and
so on.
_BRACK_2_IOERR BYTE Read only Holds slot error status of eight slots in rack 2 i.e.
expansion rack 2. Least significant bit is status bit
for slot 16 and Most Significant bit is status bit for
slot 23.
_BRACK_2_IOERR.0 is status bit for slot 16,
_BRACK_2_IOERR.7 is status bit for slot 23 and
so on.
_BRACK_3_IOERR BYTE Read only Holds slot error status of eight slots in rack 3 i.e.
expansion rack 3. Least significant bit is status bit
for slot 24 and Most Significant bit is status bit for
slot 31.
_BRACK_3_IOERR.0 is status bit for slot 24,
_BRACK_3_IOERR.7 is status bit for slot 31 and
so on.

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System Variables continues.

_BCPUSTATUS BYTE Read only Holds status of Processor. The significance of

individual bit is explained below.
Bit Status Significance
TRUE CPU in RUN mode
0
FALSE CPU in STOP mode
Redirection of any I/O point is
TRUE
carried out
1
No redirection of any I/O point
FALSE
is carried out.
Forcing of any PLC variable is
TRUE
active.
2
No forcing of any I/O point is
FALSE
carried out.
TRUE I/O error
3
FALSE No I/O error
Lithium battery voltage is
TRUE below 2.5 V or battery back up
4
circuit fault
FALSE Battery back up is healthy
_BCPUSTOPCAUSE Holds the reason for CPU to go in Stop Mode. It is
cleared while going to 'RUN' Mode.

Significance Details
1 Memory Error Invalid Application Program
Scan Time exceeds the
2 Scan Error
value of _wLimitMaxScan'
PFNMI generated But
3 PFNMI Error RESET not received after
defined 'PFRST' time.
User initiated STOP Mode
4 User Stop
command
Auxiliary Power Supply
5 APSF
Module fail
_BKEYSTATUS BYTE Read only Holds status of eight keys. If key is pressed
related bit becomes TRUE. Effect of key de-
F1 F2 bounce is taken care by providing 5 ms filter.
Bit Key
_BKEYSTATUS.0 F1
CLR ENT _BKEYSTATUS.1 UP
_BKEYSTATUS.2 F2
_BKEYSTATUS.3 LEFT
_BKEYSTATUS.4 ENT
_BKEYSTATUS.5 RIGHT
_BKEYSTATUS.6 CLR
_BKEYSTATUS.7 DOWN
During power ON, if LEFT and RIGHT keys are
kept pressed simultaneously, application program
from flash PROM is not copied to RAM and
Processor detects invalid application program in
RAM displaying ‘MEMR’ on 4-character display.
‘MEM’ LED on Processor module glows and PLC
remains in STOP mode. In this case, it is
necessary to download the application program
again from programming software ‘CoDeSys’

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System Variables continues.

_DWREDIRECTTBLPTR DWORD Read only Holds the Starting Address of Redirection Table.
This is updated at every Power ON.
_ASEGMENTPTR ARRAY Read only Array of Starting Addresses of
[0..5] Input (_ASEGMENTPTR[0]),
OF Output (_ASEGMENTPTR[1]),
DWORD Marker (_ASEGMENTPTR[2]),
Data (_ASEGMENTPTR[3]) memory area.
This array is modified at every Power-On and
after Project-Download.
_ASEGMENTLEN ARRAY Read only Array of Maximum lengths of
[0..5] Input (_ASEGMENTLEN[0]),
OF Output (_ASEGMENTLEN[0]),
WORD Marker (_ASEGMENTLEN[1]),
Data (_ASEGMENTLEN[2]) memory area.
This array is modified at every Power-On and
after Project-Download
_ADRRXPORT1 DWORD Read only This variable holds start address of serial port 1
receive buffer memory area ( of size 256 bytes).
_ADRTXPORT1 DWORD Read only This variable holds start address of serial port 1
transmit buffer memory area ( of size 256
bytes).
_ADRRXPORT2 DWORD Read only This variable holds start address of serial port 2
receive buffer memory area ( of size 256 bytes).
_ADRTXPORT2 DWORD Read only This variable holds start address of serial port 2
transmit buffer memory area ( of size 256
bytes).
_ADRRXPORT3 DWORD Read only This variable holds start address of serial port 3
receive buffer memory area ( of size 256 bytes).
_ADRTXPORT3 DWORD Read only This variable holds start address of serial port 3
transmit buffer memory area ( of size 256
bytes).

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5. PLC Configuration and I/O Addressing

I/O modules are fixed in I/O slots of mother board. For the same, base
plates and expansion plates with 3 I/O, 5 I/O and 8 I/O slots are provided.
Maximum four racks can be configured with one basic rack and three
expansion racks. So maximum 32 I/O modules can be configured for a
control system. I/O slots are of universal type i.e. any I/O module can be
fixed in any I/O slot. This leads to define I/O configuration in application
program. The configuration provides information to the Processor Module,
the type of module and its physical location. Processor during normal
course of application program execution, continuously checks programmed
configuration with actual configuration. In case of any mismatch, processor
sets specific system bits and puts ON I/O ERR LED. The following table
illustrates slot numbering associated with racks.

st nd rd th th th th th
1 2 3 4 5 6 7 8
I/O Slot I/O Slot I/O Slot I/O Slot I/O Slot I/O Slot I/O Slot I/O Slot
Basic Rack 0 Slot 00 Slot 01 Slot 02 Slot 03 Slot 04 Slot 05 Slot 06 Slot 07
Expansion Rack 1 Slot 08 Slot 09 Slot 10 Slot 11 Slot 12 Slot 13 Slot 14 Slot 15
Expansion Rack 2 Slot 16 Slot 17 Slot 18 Slot 19 Slot 20 Slot 21 Slot 22 Slot 23
Expansion Rack 3 Slot 24 Slot 25 Slot 26 Slot 27 Slot 28 Slot 29 Slot 30 Slot 31

5.1 I/O Addressing

The Processor has memory space to hold information related to inputs and
outputs. In this section, the relation between physical I/Os and memory
image is explained. Addressing of I/Os is dependant on
• Type of I/O module i.e. input or output
• Modules in previous slot
• Rack number

Following PLC configuration examples explain slot numbering and I/O

addressing.

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Example -1

Consider 5 I/O basic rack.

Power Processor 32 Point DC 16 Point DC 32 Point DC Blank 8 Point AC

Supply Module Input Module Output Input Module Output
Module Module Module
Slot 00 Slot 02 Slot 01 Slot 03 Slot 04
%IX0.0 - %IX0.7 %QX0.0 - %QX0.7 %IX4.0 - %IX4.7 %QX1.0 -
%IX1.0 - %IX1.7 %QX0.0 - %QX0.7 %IX5.0 - %IX5.7 %QX1.7
%IX2.0 - %IX2.7 %IX6.0 - %IX6.7
%IX3.0 - %IX3.7 %IX7.0 - %IX7.7

Figure 15: I/O Configuration of 5 I/O Basic rack.

Example -2

Consider 3 I/O basic rack and expansion rack 1.

Power Processor 16 Point DC 16 Point DC 32 Point DC

Supply Module Output Output Input
Module Module Module Module
Slot 00 Slot 02 Slot 01
%QX0.0- %QX0.7 %QX2.0- %QX2.7 %IX0.0- %IX0.7
%QX1.0- %QX1.7 %QX3.0- %QX3.7 %IX1.0- %IX1.7
%IX2.0- %IX2.7
%IX3.0- %IX3.7

Rack 1 16 Point DC 16+8 Point 32 Point DC

Input Mix Input
Module Module Module
Slot 08 Slot 09 Slot 10
%IX4.0- %IX4.7 %IX6.0- %IX6.7 %IX8.0- %IX8.7
%IX5.0- %IX5.7 %IX7.0- %IX7.7 %IX9.0 - %IX9.7
%QX4.0- %QX4.7 %IX10.0- %IX10.7
%IX11.0- %IX11.7

Figure 16: I/O Configuration of two racks.

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Example -3

Consider 3 I/O basic rack and two expansion rack 1 and 2.

Power Processor 16 Point DC 16 Point DC 32 Point DC

Supply Module Output Output Input
Module Module Module Module
Slot 00 Slot 02 Slot 01
%QX0.0- %QX0.7 %QX2.0- %QX2.7 %IX0.0- %IX0.7
%QX1.0- %QX1.7 %QX3.0- %QX3.7 %IX1.0- %IX1.7
%IX2.0- %IX2.7
%IX3.0- %IX3.7

Rack 1 16 Point DC 16+8 Point 32 Point DC

Input Mix Input
Module Module Module
Slot 08 Slot 09 Slot 10
%IX4.0- %IX4.7 %IX6.0- %IX6.7 %IX8.0- %IX8.7
%IX5.0- %IX5.7 %IX7.0- %IX7.7 %IX9.0 - %IX9.7
%QX4.0- %QX4.7 %IX10.0- %IX10.7
%IX11.0- %IX11.7

Rack 2 16 Point DC 16+8 Point 32 Point DC

Input Mix Input
Module Module Module
Slot 16 Slot 17 Slot 18
%IX12.0- %IX12.7 %IX14.0- %IX14.7 %IX16.0 - %IX16.7
%IX13.0- %IX13.7 %IX15.0- %IX15.7 %IX17.0- %IX17.7
%QX5.0- %QX5.7 %IX18.0- %IX18.7
%IX19.0- %IX19.7

Figure 17: I/O Configuration of three racks.

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6. Operating Modes

Processor has provided with three operating modes.

• RUN
• STOP
• Single cycle
• Bootstrap Load

The operating modes are explained in details below.

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6.1 RUN
In RUN mode, Processor executes application program. It performs its
execution in a definite way called as a PLC scan. The figure below shows
typical PLC scan cycle.

Input Scan

Keypad Scan

Input Redirection

Input Forcing

Logic Scan

Variable Forcing

Output Redirection

Output Forcing

Output Scan

Programming Port Communication Services

Figure 18: PLC Scan.

Processor scans the information related to various inputs and stores the
status. It updates this status as per redirection of forcing This stored status
is then referred in logic scan.
In logic scan, application program is executed line by line and results are
updated. Updated output status is stored.
After logic scan, output status is updated as per redirection and forcing.
Processor then performs output scan and updates physical output status.
After output scan, communication request from programming device is
handled. This completes one PLC scan. Processor continues this operation
as long as PLC is in RUN mode.

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6.2 STOP
In STOP mode, Processor stops executing application program. But
programming serial port remains functioning. When PLC is in STOP mode,
discrete outputs are put OFF physically. However their status is maintained
in output image.

6.3 Single Cycle

In Single Scan mode, Processor executes one scan cycle i.e. from input scan
to output scan and then PLC is put in STOP mode.

6.4 Bootstrap Load

Processor is put in bootstrap loading mode to download or update operation
system. In this mode, Processor remains in STOP mode indication CPU fault
putting ON CPU LED on module. In this mode, display remains blank .To put
Processor in bootstrap loading mode, toggle switch is provided on back side
of Processor module.

To download new operating system or to update existing operating system,

software utility Bootstrap Loader Tool is used.

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7. Troubleshooting

Processor module works on 5 VDC provided by power supply

module. It is fitted next to power supply module in basic rack. It
provides five LED indications and messages on 4 – character display
which gives status and diagnostic information of PLC system. The
subsequent topics explain in detail significance of this information.

7.1 LED Indications

The significance of these LEDs is explained in table below.

LED Color Status Indication

ON CPU is in 'RUN' mode i.e. in program execution mode.
CPU is in 'STOP' mode
Application program fault
OFF
RUN Green Hardware fault
Auxiliary power supply in expansion rack fails.
Flash Forcing / Writing any PLC variable from programming device.
(5 Hz) Redirection of any I/O point
OFF CPU is healthy
CPU Red Hardware fault of CPU module.
ON
CPU put in bootstrap load mode
All modules inserted are as per configuration declared in application
OFF
program and are healthy.
I/O bus read / write fault
I/O Red
Faulty or incorrect module present in slot.
ON
Faulty expansion cable or wrong connections of expansion cables
I/O modules not inserted properly or faulty.
OFF Application program is healthy.
ON Application program is invalid.
MEM Red
Flash
Scan time exceeds beyond permissible limit.
(5 Hz)
OFF Battery backup for CPU RAM is healthy.
LOW BAT Red Voltage of lithium battery is low (below 2.5 V)
ON
Battery is faulty.

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The table below explains significance of LEDs, probable cause and

remedial action to be taken. These LEDs can have following status.
• Indicates OFF status
• Indicates ON status
• Indicates Flashing status
• Indicates don’t care status

LED Indications Probable Cause Remedial Action

1. PLC in ‘STOP’ mode Put PLC in ‘RUN’ mode by
command ‘Run’ in PC based
5210 RUN
Programming Software
CoDeSys.
PROCESSOR 2. Processor module not The module is not getting
CPU
inserted properly 5 VDC. Fix the Processor
I/O
module properly.
MEM
3. Power Supply module not The module is not getting
LOW BAT
inserted properly. 5 VDC. Fix the power supply
module properly.
4. Processor module faulty Replace the module

1. Any PLC variable/s is/are This is not a fault condition.

Written or Forced in Online Forcing can be released in

5210 RUN
operation.

2. I/O point redirection is carried

Online operation.

This is not a fault condition.

PROCESSOR
CPU out from keypad or PLC Browser
I/O from CoDeSys
MEM 3. Processor module defective Replace the module.
LOW BAT

1. Processor module is put in Download operating system

Bootstrap load mode with the with the help of PC based

5210 RUN
help of toggle switch on back
side to download a new
Bootstrap Loader Tool. Put
PLC in RUN mode by restoring
PROCESSOR operating system. toggle switch position as
CPU explained in detail in Appendix
I/O 1.
MEM 2. Processor module hardware Replace the module.
LOW BAT
fault.

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LED Indications Probable Cause Remedial Action

1. I/O modules not inserted as Check the PLC configuration
per PLC Configuration and fix the module is racks
5210 RUN
programmed. accordingly. The faulty slot is
indicated by bits in system
PROCESSOR variables _bRack_0_IOErr ,
CPU
_bRack_1_IOErr
I/O , _bRack_2_IOErr
MEM and _bRack_3_IOErr.
LOW BAT 2. I/O modules not inserted Monitor system variables
properly. _bRack_0_IOErr to
_bRack_3_IOErr to find out
which slot is creating a
problem and fix the module
properly.
3. In case of multi-rack system, Check for valid connections of
expansion cable is not expansion cable. Fix up the
connected properly or cable expansion cable in IN and OUT
connections are loose. connectors on base plate
properly
4. In case of multi-rack system, Replace expansion cable.
expansion cable is faulty
5. I/O module is defective. Replace the I/O module/s
which is/are creating a
problem.
6. Processor module is Replace the Processor
defective. module.
7. Basic plate or expansion plate Find out which base plate is
is faulty. faulty and replace it.

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1. Application Program in Download valid application

RAM is not valid. This program and create boot
5210 RUN
indicated by message
‘MEMR’ on display
projects so that application
program is also stored in
PROCESSOR
CPU flash PROM.
I/O 2. Processor module Replace the module
MEM
defective.
LOW BAT

1. Application program scan By default, maximum scan

time exceeding permissible time limit is 250 ms. This
5210 RUN
range. This indicated by
message SCAN on display.
can be changed by system
variable _wLimitMaxScan
PROCESSOR
CPU up to 1 sec. If problem
I/O
persists check for the cause
like reverse jump is
MEM
application program or
LOW BAT
proper execution of FOR
loop / WHILE loop /
REPEAT loop.
2. Processor module faulty Replace the module.

1. Lithium battery voltage is Replace battery by same

below 2.5 VDC or battery is type.
5210 RUN
defective.
2. Processor module faulty Replace the module.
PROCESSOR
CPU
I/O
MEM
LOW BAT

During power ON, if LEFT and RIGHT keys on keypad are kept pressed
simultaneously, application program from flash PROM is not copied to RAM
and Processor detects invalid application program in RAM displaying ‘MEMR’
on 4-character display. ‘MEM’ LED on Processor module glows and PLC
remains in STOP mode. In this case, PLC can be put in running condition
after downloading application program again from programming software
‘CoDeSys’
This feature is useful if any invalid instruction during run time execution is
causing continuous resetting of Processor.

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7.2 System Messages

Operating system provides message on 4-character alpha numeric display

during power ON self test and in case of any system faults. The list below
explains such messages and their significance.

1SEC Operating system is in self test for checking minimum limit for watchdog.
2.5S Operating system is in self test for checking maximum limit for watchdog.
WDFL Indicates watch dog fault and puts PLC in STOP mode. This is Processor
module fault.
WARM Indicates that operating system has carried out warm start initialization.
COLD Indicates that operating system has carried out cold start initialization.
MEMR Indicates that application program in RAM is invalid and puts PLC is STOP mode
and ‘MEM’ LED on Processor module is put ON. User should download valid
application program.
PFER Indicates that incoming power for power supply module is below specifications
and puts PLC in STOP mode.
APSF Indicates that power supply module fixed in any expansion rack is failed and puts
PLC in STOP mode.
SCAN Indicates that application program scan time is exceeded the maximum
permissible limit. This puts PLC is STOP mode and ‘MEM’ LED on Processor
module starts flashing.

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8. Appendix 1 - Bootstrap Loader Tool

Bootstrap Loader Tool is PC based software, which is used to download a
binary file consisting of operation system of Nexgen 5000 Processor. This
tool is used to download a new operating system and update existing
operating system. For the same, first serial port (Rs-232 ) is used which is
normally used for programming. The same serial link cable (Ordering Code
4806 ) used for programming can be used for this purpose.

Module Mounting
Screw

48 Pin Male Euro Connector for

Mother Board Interface

Upward Switch Position

for Downloading New Operating System

Toggle Switch

Downward Switch Position

for Normal Operation

Back Side of Processor

Module

Hook for Mounting Module

Figure 19: Back side view of Processor module.

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To download a new operating system, a toggle switch is provided. Toggle

switch can be seen from back side of the module below 48-pin Male Euro
connector. Figure shows the toggle switch. So to download a new
operating system, it is necessary to remove Processor Module from rack
and change the toggle switch position. Toggle switch is not easily
accessible. A thin tip of any screwdriver can be used to change the switch
position.
For normal operation of Processor module, toggle switch position is at down
position. For downloading a new operating system, toggle switch position is
kept at up position.

For updating existing operating system, it is not necessary to change the

toggle switch position. Hence, operating system can be updated without
removing Processor Module from rack.

The subsequent section explains how to use Bootstrap Loader Tool.

After executing bootstrap.exe file, screen shows Menu bar

as shown below

File

In ‘File’ menu, commands ‘Open’ , ‘Save’ and ‘Exit’ are provided. The file
with extension
bin is opened. While opening .bin file, screen shows
relevant messages displaying size of file, etc. Once file
opening is successful, ‘File read
over…’ text is displayed. bin file can be saved or renamed
using command ‘Save’.

Command ‘Exit’ closes the application.

Settings

In ‘Settings’ menu, serial port, PLC type can be selected and commands for
erasing entire or part of flash PROM memory are provided.

Command ‘Comm Port’ provides options as Comm

1 to Comm 4. Selected communication port displays
check symbol. Default communication parameter
settings are 38.4 baud, None, 8, 1.

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Command ‘PLC’ provides options as Nexgen 5000,

Smartgen-20 and Smartgen-40. Selected PLC type
displays check symbol.

Command ‘Erase’ provides selection options

as Total Flash PROM, Only OS part, OS +
Boot project part and OS + Source code
part. Selected option displays check symbol.
While downloading this selection is
considered.

Download OS

Download OS menu provides two options as New OS and Update OS.

For downloading new operating system, toggle

switch position should be kept at upward position as
explained earlier. After powering ON, Processor
Module puts ON ‘CPU’ LED ON with blank display
on module. Open file with latest version. After
establishing serial link between PC communication
port and module serial port if option New OS is selected, flash PROM is
erased as per selection. At each stage of operation relevant message is
displayed on screen. Module display shows ‘ERAS’. After erasing flash
PROM, operating system binary file is downloaded. During this operation
module display shows, DATA’. When downloading is completed, module
display shows ‘OVER’. For normal operation of Processor Module, change
the toggle switch position to original position.

For updating existing operating system, option Updates OS is to be selected

after opening file with updated version. Processor Module puts ON ‘CPU’
LED ON with ‘OSUD’ display on module for a moment. If serial link between
PC communication port and module serial port is established, flash PROM is
erased as per selection. At each stage of operation relevant message is
displayed on screen. Module display shows ‘ERAS’. After erasing flash
PROM, operating system binary file is downloaded. During this operation
module display shows, DATA’. When downloading is completed, module
display shows ‘OVER’. System is resetted and normal operation of
Processor Module resumes with valid application program.

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NEXGEN – 5000 Messung Systems

MESSUNG SYSTEMS
EL – 2, J - Block, MIDC, Bhosari,
PUNE – 411 026. INDIA
Tel. – (+91) –020 – 712 0807, 712 2807
Fax. – (+91) –020 –712 0391

NEXGEN - 5000 PLC

Processor 521x User Manual (5210,5211,5212,5213)

Document No. ED-2002-037

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