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    EE301-Fall 2016: Laboratory #6: MOS TRANSISTORS

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    Orhun
    This document describes Laboratory #6 which focuses on studying MOS transistor characteristics. Students will learn how to measure current gain and experiment with NMOS and PMOS transistors. The lab manual instructs students to: 1) Simulate NMOS transistor circuits in SPICE and observe the effects of channel length modulation on drain current. 2) In the lab, construct circuits using NMOS and PMOS transistors to measure drain current while varying gate-source voltage and drain-source voltage. Plots of drain current versus these voltages will be created. 3) Experiments will examine temperature dependence of drain current and identify transistor operating regimes based on voltage measurements.

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    EE301-Fall 2016: Laboratory #6: MOS TRANSISTORS

    Uploaded by

    Orhun
    55 views3 pages
    This document describes Laboratory #6 which focuses on studying MOS transistor characteristics. Students will learn how to measure current gain and experiment with NMOS and PMOS transistors. The lab manual instructs students to: 1) Simulate NMOS transistor circuits in SPICE and observe the effects of channel length modulation on drain current. 2) In the lab, construct circuits using NMOS and PMOS transistors to measure drain current while varying gate-source voltage and drain-source voltage. Plots of drain current versus these voltages will be created. 3) Experiments will examine temperature dependence of drain current and identify transistor operating regimes based on voltage measurements.

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    EE301_Lab

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    This document describes Laboratory #6 which focuses on studying MOS transistor characteristics. Students will learn how to measure current gain and experiment with NMOS and PMOS transistors. The lab manual instructs students to: 1) Simulate NMOS transistor circuits in SPICE and observe the effects of channel length modulation on drain current. 2) In the lab, construct circuits using NMOS and PMOS transistors to measure drain current while varying gate-source voltage and drain-source voltage. Plots of drain current versus these voltages will be created. 3) Experiments will examine temperature dependence of drain current and identify transistor operating regimes based on voltage measurements.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    55 views3 pages

    EE301-Fall 2016: Laboratory #6: MOS TRANSISTORS

    Uploaded by

    Orhun
    This document describes Laboratory #6 which focuses on studying MOS transistor characteristics. Students will learn how to measure current gain and experiment with NMOS and PMOS transistors. The lab manual instructs students to: 1) Simulate NMOS transistor circuits in SPICE and observe the effects of channel length modulation on drain current. 2) In the lab, construct circuits using NMOS and PMOS transistors to measure drain current while varying gate-source voltage and drain-source voltage. Plots of drain current versus these voltages will be created. 3) Experiments will examine temperature dependence of drain current and identify transistor operating regimes based on voltage measurements.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 3

    EE301- Fall 2016

    Laboratory #6: MOS TRANSISTORS

    1. Objective:

    In this experiment, you will study MOS transistor characteristics. You will learn how to measure current
    gain of a transistor. At the end of this experiment, you will have gained hands on training on MOS
    transistor circuits.

    Equipment and circuit components: Signal Generator, Power supply with variable voltage, Multimeter,
    Breadboard, NMOS transistors (2N7000), PMOS transistors (ZVP3306A), Resistors (of specified
    values in the manual).

    2. Preliminary work:

    2.1. Construct the following circuit using SPICE.

    Cir 2.1. NMOS transistor

    Use the following model parameters for the NMOS:

    .model MOD1 NMOS VTO=2.5 Kp=0.296 LAMBDA=0.01

    In the above model VTO is used to specify threshold voltage for the MOS transistor (Note that VTH is
    positive for NMOS and negative for PMOS). Kp and LAMBDA are used to specify nCOx and the
    channel length modulation coefficient of the transistor, respectively. Sweep VG from 0V to 5V with
    0.01V steps for LAMBDA=0.0001 and LAMBDA=0.01. Plot drain current as a function of gate-source
    voltage for both cases on the same graph. Observe the effect of the channel length modulation on the
    drain current. (You may need to generate plots in log scale)

    1
    2.2. Using the same spice circuit that you used in part 2.1, set LAMBDA to 0.01. Sweep VDD from 0 to
    30V and plot drain current as a function of drain-source voltage for VG= 1, 2, 2.7, 2.8, 2.9 and 3 V.

    3. Lab tasks:

    In the lab you will be provided 2N7000TA and ZVP3306A MOS transistors. 2N7000 is NMOS and
    ZVP3306 is a PMOS transistor.

    Task 1.
     Construct the circuit shown in Cir 3.1 with 2N7000 NMOS transistor.
     Use the fixed +5V output of the power supply.
     Connect VG to the variable voltage source.
     Vary VG from 0 to 5V with 0.2V steps, measure voltage drop over drain resistor
     Plot ID vs VGS.

    Cir 3.1

     Let’s examine the temperature dependence of drain current. Set VG to get 1 mA drain current.
    Put two fingers around the transistor without disturbing the connections to heat up the
    transistor. Then observe drain current. How does drain current compare to the current that you
    measured without heating the transistor?
     Set VG to 4V and supply voltage (VDD) to 3V. Measure ID and VDS. What is the operation
    regime of the transistor?
     Set VG to -3V and supply voltage (VDD) to 5V. Measure ID and VDS. What is the operation
    regime of the transistor?

    2
    Task 2.
     In Cir 3.1, connect VDD to a variable source such that you can change it from 0 to 30V.
     Now set VDD to 5V
     Set VG such that IC is 0.5mA. Note VG voltage.
     Sweep VDD from 0 to 30V and measure ID. Plot ID vs VDS.
     Set VDD to 5V again.
     Set VG such that ID is 2mA. Note VG voltage.
     Sweep VDD from 0 to 30V and measure ID. Plot ID vs VDS.

    Task 3.

     Construct the circuit shown in Cir 3.2 with ZVP3306A transistor.


     Use the fixed +5V output of the power supply.
     Connect VG to the variable voltage source.
     Vary VG from 0 to 10V with 0.2V steps, measure voltage drops over drain resistor
     Plot ID vs VGS.

    Cir 3.2

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